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-rw-r--r--src/aig/ntl/ntlCheck.c2
-rw-r--r--src/aig/ntl/ntlExtract.c46
-rw-r--r--src/aig/ntl/ntlObj.c2
-rw-r--r--src/aig/ntl/ntlReadBlif.c24
-rw-r--r--src/aig/ntl/ntlTime.c29
-rw-r--r--src/aig/ntl/ntlWriteBlif.c4
6 files changed, 57 insertions, 50 deletions
diff --git a/src/aig/ntl/ntlCheck.c b/src/aig/ntl/ntlCheck.c
index b4125804..03e9e898 100644
--- a/src/aig/ntl/ntlCheck.c
+++ b/src/aig/ntl/ntlCheck.c
@@ -106,7 +106,7 @@ int Ntl_ModelCheck( Ntl_Mod_t * pModel, int fMain )
{
if ( Ntl_ModelLatchNum(pModel) > 0 )
{
- printf( "Root level model has %d registers.\n", pModel->pName, Ntl_ModelLatchNum(pModel) );
+ printf( "Root level model %s has %d registers.\n", pModel->pName, Ntl_ModelLatchNum(pModel) );
fStatus = 0;
}
goto checkobjs;
diff --git a/src/aig/ntl/ntlExtract.c b/src/aig/ntl/ntlExtract.c
index 8049ffb8..f6f1ebb2 100644
--- a/src/aig/ntl/ntlExtract.c
+++ b/src/aig/ntl/ntlExtract.c
@@ -85,7 +85,7 @@ Aig_Obj_t * Ntl_ConvertSopToAigInternal( Aig_Man_t * pMan, Ntl_Obj_t * pNode, ch
***********************************************************************/
Aig_Obj_t * Ntl_GraphToNetworkAig( Aig_Man_t * pMan, Dec_Graph_t * pGraph )
{
- Dec_Node_t * pNode;
+ Dec_Node_t * pNode = NULL; // Suppress "might be used uninitialized"
Aig_Obj_t * pAnd0, * pAnd1;
int i;
// check for constant function
@@ -526,15 +526,16 @@ Aig_Man_t * Ntl_ManCollapse( Ntl_Man_t * p, int fSeq )
}
nTruePis = Aig_ManPiNum(p->pAig);
// create inputs of seq boxes
- if ( fSeq )
- Ntl_ModelForEachBox( pRoot, pBox, i )
- {
- if ( !(Ntl_BoxIsSeq(pBox) && Ntl_BoxIsWhite(pBox)) )
- continue;
- Vec_IntPush( p->vBox1Cios, Aig_ManPiNum(p->pAig) );
- Ntl_ManCollapseBoxSeq1_rec( p, pBox, fSeq );
- Ntl_ObjForEachFanout( pBox, pNet, k )
- pNet->nVisits = 2;
+ if ( fSeq ) {
+ Ntl_ModelForEachBox( pRoot, pBox, i )
+ {
+ if ( !(Ntl_BoxIsSeq(pBox) && Ntl_BoxIsWhite(pBox)) )
+ continue;
+ Vec_IntPush( p->vBox1Cios, Aig_ManPiNum(p->pAig) );
+ Ntl_ManCollapseBoxSeq1_rec( p, pBox, fSeq );
+ Ntl_ObjForEachFanout( pBox, pNet, k )
+ pNet->nVisits = 2;
+ }
}
// derive the outputs
Ntl_ManForEachCoNet( p, pNet, i )
@@ -548,18 +549,19 @@ Aig_Man_t * Ntl_ManCollapse( Ntl_Man_t * p, int fSeq )
}
nTruePos = Aig_ManPoNum(p->pAig);
// create outputs of seq boxes
- if ( fSeq )
- Ntl_ModelForEachBox( pRoot, pBox, i )
- {
- if ( !(Ntl_BoxIsSeq(pBox) && Ntl_BoxIsWhite(pBox)) )
- continue;
- Ntl_ObjForEachFanin( pBox, pNet, k )
- if ( !Ntl_ManCollapse_rec( p, pNet, fSeq ) )
- {
- printf( "Ntl_ManCollapse(): Error: Combinational loop is detected.\n" );
- return 0;
- }
- Ntl_ManCollapseBoxSeq2_rec( p, pBox, fSeq, Vec_IntEntry(p->vBox1Cios, iBox++) );
+ if ( fSeq ) {
+ Ntl_ModelForEachBox( pRoot, pBox, i )
+ {
+ if ( !(Ntl_BoxIsSeq(pBox) && Ntl_BoxIsWhite(pBox)) )
+ continue;
+ Ntl_ObjForEachFanin( pBox, pNet, k )
+ if ( !Ntl_ManCollapse_rec( p, pNet, fSeq ) )
+ {
+ printf( "Ntl_ManCollapse(): Error: Combinational loop is detected.\n" );
+ return 0;
+ }
+ Ntl_ManCollapseBoxSeq2_rec( p, pBox, fSeq, Vec_IntEntry(p->vBox1Cios, iBox++) );
+ }
}
// make sure registers are added correctly
if ( Aig_ManPiNum(p->pAig) - nTruePis != Aig_ManPoNum(p->pAig) - nTruePos )
diff --git a/src/aig/ntl/ntlObj.c b/src/aig/ntl/ntlObj.c
index 10bfbbb7..55924db9 100644
--- a/src/aig/ntl/ntlObj.c
+++ b/src/aig/ntl/ntlObj.c
@@ -177,7 +177,7 @@ Ntl_Obj_t * Ntl_ModelCreateBox( Ntl_Mod_t * pModel, int nFanins, int nFanouts )
***********************************************************************/
Ntl_Obj_t * Ntl_ModelDupObj( Ntl_Mod_t * pModel, Ntl_Obj_t * pOld )
{
- Ntl_Obj_t * pNew;
+ Ntl_Obj_t * pNew = NULL; // Supprses "might be used uninitialized"
if ( Ntl_ObjIsPi( pOld ) )
pNew = Ntl_ModelCreatePi( pModel );
else if ( Ntl_ObjIsPo( pOld ) )
diff --git a/src/aig/ntl/ntlReadBlif.c b/src/aig/ntl/ntlReadBlif.c
index cc019732..e1b351b3 100644
--- a/src/aig/ntl/ntlReadBlif.c
+++ b/src/aig/ntl/ntlReadBlif.c
@@ -18,8 +18,10 @@
***********************************************************************/
+// The code in this file is developed in collaboration with Mark Jarvin of Toronto.
+
#include "ntl.h"
-#include <bzlib.h>
+#include "bzlib.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
@@ -803,7 +805,7 @@ static int Ioa_ReadParseLineModel( Ioa_ReadMod_t * p, char * pLine )
p->pNtk = Ntl_ModelAlloc( p->pMan->pDesign, Vec_PtrEntry(vTokens, 1) );
if ( p->pNtk == NULL )
{
- sprintf( p->pMan->sError, "Line %d: Model %s already exists.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens, 1) );
+ sprintf( p->pMan->sError, "Line %d: Model %s already exists.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
return 0;
}
return 1;
@@ -961,7 +963,7 @@ static int Ioa_ReadParseLineLatch( Ioa_ReadMod_t * p, char * pLine )
pObj->LatchId.regInit = 2;
if ( pObj->LatchId.regInit < 0 || pObj->LatchId.regInit > 2 )
{
- sprintf( p->pMan->sError, "Line %d: Initial state of the latch is incorrect \"%s\".", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens,3) );
+ sprintf( p->pMan->sError, "Line %d: Initial state of the latch is incorrect \"%s\".", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens,3) );
return 0;
}
// get the register class
@@ -988,7 +990,7 @@ static int Ioa_ReadParseLineLatch( Ioa_ReadMod_t * p, char * pLine )
}
if ( pObj->LatchId.regClass < 0 || pObj->LatchId.regClass > (1<<24) )
{
- sprintf( p->pMan->sError, "Line %d: Class of the latch is incorrect \"%s\".", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens,3) );
+ sprintf( p->pMan->sError, "Line %d: Class of the latch is incorrect \"%s\".", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens,3) );
return 0;
}
// get the clock
@@ -1134,7 +1136,7 @@ static int Ioa_ReadParseLineDelay( Ioa_ReadMod_t * p, char * pLine )
Delay = atof( pTokenNum );
if ( Delay == 0.0 && pTokenNum[0] != '0' )
{
- sprintf( p->pMan->sError, "Line %d: Delay value (%s) appears to be invalid.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntryLast(vTokens) );
+ sprintf( p->pMan->sError, "Line %d: Delay value (%s) appears to be invalid.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntryLast(vTokens) );
return 0;
}
// find the PI/PO numbers
@@ -1144,7 +1146,7 @@ static int Ioa_ReadParseLineDelay( Ioa_ReadMod_t * p, char * pLine )
RetValue1 = Ntl_ModelFindPioNumber( p->pNtk, 0, 0, Vec_PtrEntry(vTokens, 1), &Number1 );
if ( RetValue1 == 0 )
{
- sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs/POs.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens, 1) );
+ sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs/POs.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
return 0;
}
}
@@ -1154,14 +1156,14 @@ static int Ioa_ReadParseLineDelay( Ioa_ReadMod_t * p, char * pLine )
RetValue2 = Ntl_ModelFindPioNumber( p->pNtk, 0, 0, Vec_PtrEntry(vTokens, 2), &Number2 );
if ( RetValue2 == 0 )
{
- sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs/POs.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens, 2) );
+ sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs/POs.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 2) );
return 0;
}
}
if ( RetValue1 == RetValue2 && RetValue1 )
{
sprintf( p->pMan->sError, "Line %d: Both signals \"%s\" and \"%s\" listed appear to be PIs or POs.",
- Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens, 1), Vec_PtrEntry(vTokens, 2) );
+ Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1), (char*)Vec_PtrEntry(vTokens, 2) );
return 0;
}
if ( RetValue2 < RetValue1 )
@@ -1219,7 +1221,7 @@ static int Ioa_ReadParseLineTimes( Ioa_ReadMod_t * p, char * pLine, int fOutput
Delay = atof( pTokenNum );
if ( Delay == 0.0 && pTokenNum[0] != '0' )
{
- sprintf( p->pMan->sError, "Line %d: Delay value (%s) appears to be invalid.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntryLast(vTokens) );
+ sprintf( p->pMan->sError, "Line %d: Delay value (%s) appears to be invalid.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntryLast(vTokens) );
return 0;
}
// find the PI/PO numbers
@@ -1230,7 +1232,7 @@ static int Ioa_ReadParseLineTimes( Ioa_ReadMod_t * p, char * pLine, int fOutput
RetValue = Ntl_ModelFindPioNumber( p->pNtk, 0, 1, Vec_PtrEntry(vTokens, 1), &Number );
if ( RetValue == 0 )
{
- sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among POs.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens, 1) );
+ sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among POs.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
return 0;
}
}
@@ -1247,7 +1249,7 @@ static int Ioa_ReadParseLineTimes( Ioa_ReadMod_t * p, char * pLine, int fOutput
RetValue = Ntl_ModelFindPioNumber( p->pNtk, 1, 0, Vec_PtrEntry(vTokens, 1), &Number );
if ( RetValue == 0 )
{
- sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs.", Ioa_ReadGetLine(p->pMan, pToken), Vec_PtrEntry(vTokens, 1) );
+ sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs.", Ioa_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
return 0;
}
}
diff --git a/src/aig/ntl/ntlTime.c b/src/aig/ntl/ntlTime.c
index ee3e489b..121fb8ea 100644
--- a/src/aig/ntl/ntlTime.c
+++ b/src/aig/ntl/ntlTime.c
@@ -91,20 +91,21 @@ void Ntl_ManUnpackLeafTiming( Ntl_Man_t * p, Tim_Man_t * pMan )
pNet->dTemp = 0;
// store the PI timing
vTimes = pRoot->vTimeInputs;
- if ( vTimes )
- Vec_IntForEachEntry( vTimes, Entry, i )
- {
- dTime = Aig_Int2Float( Vec_IntEntry(vTimes,++i) );
- if ( Entry == -1 )
- {
- Ntl_ModelForEachPi( pRoot, pObj, v )
- Ntl_ObjFanout0(pObj)->dTemp = dTime;
- }
- else
- {
- pObj = Ntl_ModelPi( pRoot, Entry );
- Ntl_ObjFanout0(pObj)->dTemp = dTime;
- }
+ if ( vTimes ) {
+ Vec_IntForEachEntry( vTimes, Entry, i )
+ {
+ dTime = Aig_Int2Float( Vec_IntEntry(vTimes,++i) );
+ if ( Entry == -1 )
+ {
+ Ntl_ModelForEachPi( pRoot, pObj, v )
+ Ntl_ObjFanout0(pObj)->dTemp = dTime;
+ }
+ else
+ {
+ pObj = Ntl_ModelPi( pRoot, Entry );
+ Ntl_ObjFanout0(pObj)->dTemp = dTime;
+ }
+ }
}
// store box timing
Ntl_ModelForEachMapLeaf( pRoot, pObj, k )
diff --git a/src/aig/ntl/ntlWriteBlif.c b/src/aig/ntl/ntlWriteBlif.c
index 8c97d3d0..0ba330fb 100644
--- a/src/aig/ntl/ntlWriteBlif.c
+++ b/src/aig/ntl/ntlWriteBlif.c
@@ -18,10 +18,12 @@
***********************************************************************/
+// The code in this file is developed in collaboration with Mark Jarvin of Toronto.
+
#include "ntl.h"
#include "ioa.h"
-#include <bzlib.h>
+#include "bzlib.h"
#include <stdarg.h>
#ifdef _WIN32
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-02 16:03:45 +0000