393 files changed, 873 insertions, 127365 deletions

diff --git a/src/aig/aig/aig.h b/src/aig/aig/aig.h
index 2ed3c130..ad8ce927 100644
--- a/src/aig/aig/aig.h
+++ b/src/aig/aig/aig.h
@@ -18,8 +18,8 @@
 
 ***********************************************************************/
 
-#ifndef __AIG_H__
-#define __AIG_H__
+#ifndef ABC__aig__aig__aig_h
+#define ABC__aig__aig__aig_h
 
 
 ////////////////////////////////////////////////////////////////////////
@@ -32,8 +32,8 @@
 #include <assert.h>
 #include <time.h>
 
-#include "vec.h"
-#include "utilCex.h"
+#include "src/misc/vec/vec.h"
+#include "src/misc/util/utilCex.h"
 
 ////////////////////////////////////////////////////////////////////////
 ///                         PARAMETERS                               ///
@@ -222,20 +222,6 @@ static inline Aig_Cut_t *  Aig_CutNext( Aig_Cut_t * pCut )              { return
 ///                      MACRO DEFINITIONS                           ///
 ////////////////////////////////////////////////////////////////////////
 
-static inline int          Aig_IntAbs( int n )                    { return (n < 0)? -n : n;                                }
-//static inline int          Aig_Float2Int( float Val )             { return *((int *)&Val);                                 }
-//static inline float        Aig_Int2Float( int Num )               { return *((float *)&Num);                               }
-static inline int          Aig_Float2Int( float Val )             { union { int x; float y; } v; v.y = Val; return v.x;    }
-static inline float        Aig_Int2Float( int Num )               { union { int x; float y; } v; v.x = Num; return v.y;    }
-static inline int          Aig_Base2Log( unsigned n )             { int r; if ( n < 2 ) return n; for ( r = 0, n--; n; n >>= 1, r++ ); return r; }
-static inline int          Aig_Base10Log( unsigned n )            { int r; if ( n < 2 ) return n; for ( r = 0, n--; n; n /= 10, r++ ); return r; }
-static inline char *       Aig_UtilStrsav( char * s )             { return s ? strcpy(ABC_ALLOC(char, strlen(s)+1), s) : NULL; }
-static inline int          Aig_BitWordNum( int nBits )            { return (nBits>>5) + ((nBits&31) > 0);                  }
-static inline int          Aig_TruthWordNum( int nVars )          { return nVars <= 5 ? 1 : (1 << (nVars - 5));            }
-static inline int          Aig_InfoHasBit( unsigned * p, int i )  { return (p[(i)>>5] & (1<<((i) & 31))) > 0;              }
-static inline void         Aig_InfoSetBit( unsigned * p, int i )  { p[(i)>>5] |= (1<<((i) & 31));                          }
-static inline void         Aig_InfoXorBit( unsigned * p, int i )  { p[(i)>>5] ^= (1<<((i) & 31));                          }
-static inline unsigned     Aig_InfoMask( int nVar )               { return (~(unsigned)0) >> (32-nVar);                    }
 static inline unsigned     Aig_ObjCutSign( unsigned ObjId )       { return (1 << (ObjId & 31));                            }
 static inline int          Aig_WordCountOnes( unsigned uWord )
 {
@@ -254,13 +240,6 @@ static inline int          Aig_WordFindFirstBit( unsigned uWord )
     return -1;
 }
 
-static inline int          Aig_Var2Lit( int Var, int fCompl )     { return Var + Var + fCompl;                       }
-static inline int          Aig_Lit2Var( int Lit )                 { return Lit >> 1;                                 }
-static inline int          Aig_LitIsCompl( int Lit )              { return Lit & 1;                                  }
-static inline int          Aig_LitNot( int Lit )                  { return Lit ^ 1;                                  }
-static inline int          Aig_LitNotCond( int Lit, int c )       { return Lit ^ (int)(c > 0);                       }
-static inline int          Aig_LitRegular( int Lit )              { return Lit & ~01;                                }
-
 static inline Aig_Obj_t *  Aig_Regular( Aig_Obj_t * p )           { return (Aig_Obj_t *)((ABC_PTRUINT_T)(p) & ~01);  }
 static inline Aig_Obj_t *  Aig_Not( Aig_Obj_t * p )               { return (Aig_Obj_t *)((ABC_PTRUINT_T)(p) ^  01);  }
 static inline Aig_Obj_t *  Aig_NotCond( Aig_Obj_t * p, int c )    { return (Aig_Obj_t *)((ABC_PTRUINT_T)(p) ^ (c));  }
@@ -335,10 +314,10 @@ static inline void         Aig_ObjChild1Flip( Aig_Obj_t * pObj )  { assert( !Aig
 static inline Aig_Obj_t *  Aig_ObjCopy( Aig_Obj_t * pObj )        { assert( !Aig_IsComplement(pObj) ); return (Aig_Obj_t *)pObj->pData;               } 
 static inline void         Aig_ObjSetCopy( Aig_Obj_t * pObj, Aig_Obj_t * pCopy )     {  assert( !Aig_IsComplement(pObj) ); pObj->pData = pCopy;       } 
 static inline Aig_Obj_t *  Aig_ObjRealCopy( Aig_Obj_t * pObj )    { return Aig_NotCond((Aig_Obj_t *)Aig_Regular(pObj)->pData, Aig_IsComplement(pObj));}
-static inline int          Aig_ObjToLit( Aig_Obj_t * pObj )       { return Aig_Var2Lit( Aig_ObjId(Aig_Regular(pObj)), Aig_IsComplement(pObj) );       }
-static inline Aig_Obj_t *  Aig_ObjFromLit( Aig_Man_t * p,int iLit){ return Aig_NotCond( Aig_ManObj(p, Aig_Lit2Var(iLit)), Aig_LitIsCompl(iLit) );     }
+static inline int          Aig_ObjToLit( Aig_Obj_t * pObj )       { return Abc_Var2Lit( Aig_ObjId(Aig_Regular(pObj)), Aig_IsComplement(pObj) );       }
+static inline Aig_Obj_t *  Aig_ObjFromLit( Aig_Man_t * p,int iLit){ return Aig_NotCond( Aig_ManObj(p, Abc_Lit2Var(iLit)), Abc_LitIsCompl(iLit) );     }
 static inline int          Aig_ObjLevel( Aig_Obj_t * pObj )       { assert( !Aig_IsComplement(pObj) ); return pObj->Level;                            }
-static inline int          Aig_ObjLevelNew( Aig_Obj_t * pObj )    { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? 1 + Aig_ObjIsExor(pObj) + ABC_MAX(Aig_ObjFanin0(pObj)->Level, Aig_ObjFanin1(pObj)->Level) : Aig_ObjFanin0(pObj)->Level; }
+static inline int          Aig_ObjLevelNew( Aig_Obj_t * pObj )    { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? 1 + Aig_ObjIsExor(pObj) + Abc_MaxInt(Aig_ObjFanin0(pObj)->Level, Aig_ObjFanin1(pObj)->Level) : Aig_ObjFanin0(pObj)->Level; }
 static inline int          Aig_ObjSetLevel( Aig_Obj_t * pObj, int i ) { assert( !Aig_IsComplement(pObj) ); return pObj->Level = i;                    }
 static inline void         Aig_ObjClean( Aig_Obj_t * pObj )       { memset( pObj, 0, sizeof(Aig_Obj_t) );                                                             }
 static inline Aig_Obj_t *  Aig_ObjFanout0( Aig_Man_t * p, Aig_Obj_t * pObj )  { assert(p->pFanData && pObj->Id < p->nFansAlloc); return Aig_ManObj(p, p->pFanData[5*pObj->Id] >> 1); } 
@@ -653,7 +632,6 @@ extern unsigned *      Aig_ManCutTruth( Aig_Obj_t * pRoot, Vec_Ptr_t * vLeaves,
 /*=== aigTsim.c ========================================================*/
 extern Aig_Man_t *     Aig_ManConstReduce( Aig_Man_t * p, int fUseMvSweep, int nFramesSymb, int nFramesSatur, int fVerbose, int fVeryVerbose );
 /*=== aigUtil.c =========================================================*/
-extern unsigned        Aig_PrimeCudd( unsigned p );
 extern void            Aig_ManIncrementTravId( Aig_Man_t * p );
 extern char *          Aig_TimeStamp();
 extern int             Aig_ManHasNoGaps( Aig_Man_t * p );
diff --git a/src/aig/aig/aigCanon.c b/src/aig/aig/aigCanon.c
index 706a9c61..2c5e4d17 100644
--- a/src/aig/aig/aigCanon.c
+++ b/src/aig/aig/aigCanon.c
@@ -19,9 +19,9 @@
 ***********************************************************************/
 
 #include "aig.h"
-#include "kit.h"
-#include "bdc.h"
-#include "ioa.h"
+#include "src/bool/kit/kit.h"
+#include "src/bool/bdc/bdc.h"
+#include "src/aig/ioa/ioa.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -106,7 +106,7 @@ Aig_RMan_t * Aig_RManStart()
     p->pAig  = Aig_ManStart( 1000000 );
     Aig_IthVar( p->pAig, p->nVars-1 );
     // create hash table
-    p->nBins = Aig_PrimeCudd(5000);
+    p->nBins = Abc_PrimeCudd(5000);
     p->pBins = ABC_CALLOC( Aig_Tru_t *, p->nBins );
     p->pMemTrus = Aig_MmFlexStart();
     // bi-decomposition manager
@@ -182,7 +182,7 @@ clk = clock();
     pBinsOld = p->pBins;
     nBinsOld = p->nBins;
     // get the new Bins
-    p->nBins = Aig_PrimeCudd( 3 * nBinsOld ); 
+    p->nBins = Abc_PrimeCudd( 3 * nBinsOld ); 
     p->pBins = ABC_CALLOC( Aig_Tru_t *, p->nBins );
     // rehash the entries from the old table
     Counter = 0;
@@ -628,7 +628,7 @@ void Aig_RManRecord( unsigned * pTruth, int nVarsInit )
     else
         s_pRMan->nTtDsdNot++;
     // compute the number of words
-    nWords = Aig_TruthWordNum( nVars );
+    nWords = Abc_TruthWordNum( nVars );
     // copy the function
     memcpy( s_pRMan->pTruthInit, Kit_DsdObjTruth(pObj), 4*nWords );
     Kit_DsdNtkFree( pNtk );
diff --git a/src/aig/aig/aigCuts.c b/src/aig/aig/aigCuts.c
index 1bcf69ce..acff77d2 100644
--- a/src/aig/aig/aigCuts.c
+++ b/src/aig/aig/aigCuts.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "aig.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -58,7 +58,7 @@ Aig_ManCut_t * Aig_ManCutStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, in
     p->pAig     = pMan;
     p->pCuts    = ABC_CALLOC( Aig_Cut_t *, Aig_ManObjNumMax(pMan) );
     // allocate memory manager
-    p->nTruthWords = Aig_TruthWordNum(nLeafMax);
+    p->nTruthWords = Abc_TruthWordNum(nLeafMax);
     p->nCutSize = sizeof(Aig_Cut_t) + sizeof(int) * nLeafMax + fTruth * sizeof(unsigned) * p->nTruthWords;
     p->pMemCuts = Aig_MmFixedStart( p->nCutSize * p->nCutsMax, 512 );
     // room for temporary truth tables
diff --git a/src/aig/aig/aigDfs.c b/src/aig/aig/aigDfs.c
index 0c2989d8..2da609f3 100644
--- a/src/aig/aig/aigDfs.c
+++ b/src/aig/aig/aigDfs.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "aig.h"
-#include "tim.h"
+#include "src/misc/tim/tim.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -477,7 +477,7 @@ int Aig_ManLevelNum( Aig_Man_t * p )
     int i, LevelsMax;
     LevelsMax = 0;
     Aig_ManForEachPo( p, pObj, i )
-        LevelsMax = ABC_MAX( LevelsMax, (int)Aig_ObjFanin0(pObj)->Level );
+        LevelsMax = Abc_MaxInt( LevelsMax, (int)Aig_ObjFanin0(pObj)->Level );
     return LevelsMax;
 }
 
diff --git a/src/aig/aig/aigDoms.c b/src/aig/aig/aigDoms.c
index 0ac2b358..b81279b2 100644
--- a/src/aig/aig/aigDoms.c
+++ b/src/aig/aig/aigDoms.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "aig.h"
-#include "saig.h"
+#include "src/aig/saig/saig.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/aig/aigDup.c b/src/aig/aig/aigDup.c
index 94eaf497..c2127262 100644
--- a/src/aig/aig/aigDup.c
+++ b/src/aig/aig/aigDup.c
@@ -18,8 +18,8 @@
 
 ***********************************************************************/
 
-#include "saig.h"
-#include "tim.h"
+#include "src/aig/saig/saig.h"
+#include "src/misc/tim/tim.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -52,8 +52,8 @@ Aig_Man_t * Aig_ManDupSimple( Aig_Man_t * p )
     assert( p->pManHaig == NULL || Aig_ManBufNum(p) == 0 );
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     if ( p->vFlopNums )
@@ -124,7 +124,7 @@ Aig_Man_t * Aig_ManDupSimpleWithHints( Aig_Man_t * p, Vec_Int_t * vHints )
     assert( p->nAsserts == 0 || p->nConstrs == 0 );
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
@@ -203,8 +203,8 @@ Aig_Man_t * Aig_ManDupSimpleDfs( Aig_Man_t * p )
     assert( p->pManHaig == NULL || Aig_ManBufNum(p) == 0 );
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     if ( p->vFlopNums )
@@ -303,8 +303,8 @@ Aig_Man_t * Aig_ManDupOrdered( Aig_Man_t * p )
     int i, nNodes;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     if ( p->vFlopNums )
@@ -379,8 +379,8 @@ Aig_Man_t * Aig_ManDupCof( Aig_Man_t * p, int iInput, int Value )
     assert( p->pManHaig == NULL || Aig_ManBufNum(p) == 0 );
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     if ( p->vFlopNums )
@@ -456,8 +456,8 @@ Aig_Man_t * Aig_ManDupTrim( Aig_Man_t * p )
     int i, nNodes;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nConstrs = p->nConstrs;
     // create the PIs
     Aig_ManCleanData( p );
@@ -505,8 +505,8 @@ Aig_Man_t * Aig_ManDupExor( Aig_Man_t * p )
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
     pNew->fCatchExor = 1;
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     if ( p->vFlopNums )
@@ -608,8 +608,8 @@ Aig_Man_t * Aig_ManDupDfs( Aig_Man_t * p )
     int i, nNodes;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     if ( p->vFlopNums )
@@ -749,8 +749,8 @@ Aig_Man_t * Aig_ManDupDfsGuided( Aig_Man_t * p, Vec_Ptr_t * vPios )
     int i, nNodes;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     if ( p->vFlopNums )
@@ -821,8 +821,8 @@ Aig_Man_t * Aig_ManDupLevelized( Aig_Man_t * p )
     int i, k;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     if ( p->vFlopNums )
@@ -895,8 +895,8 @@ Aig_Man_t * Aig_ManDupWithoutPos( Aig_Man_t * p )
     int i;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
@@ -980,8 +980,8 @@ Aig_Man_t * Aig_ManDupRepres( Aig_Man_t * p )
     int i;
     // start the HOP package
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nConstrs = p->nConstrs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
@@ -1054,8 +1054,8 @@ Aig_Man_t * Aig_ManDupRepresDfs( Aig_Man_t * p )
     int i;
     // start the HOP package
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nConstrs = p->nConstrs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
@@ -1163,8 +1163,8 @@ Aig_Man_t * Aig_ManDupOrpos( Aig_Man_t * p, int fAddRegs )
     }
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
@@ -1212,8 +1212,8 @@ Aig_Man_t * Aig_ManDupOneOutput( Aig_Man_t * p, int iPoNum, int fAddRegs )
     assert( iPoNum < Aig_ManPoNum(p)-Aig_ManRegNum(p) );
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
@@ -1263,8 +1263,8 @@ Aig_Man_t * Aig_ManDupUnsolvedOutputs( Aig_Man_t * p, int fAddRegs )
     }
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
@@ -1321,7 +1321,7 @@ Aig_Man_t * Aig_ManDupArray( Vec_Ptr_t * vArray )
     }
     // create the new manager
     pNew = Aig_ManStart( 10000 );
-    pNew->pName = Aig_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Aig_ManForEachPi( p, pObj, i )
         Aig_ObjCreatePi(pNew);
     // create the PIs
diff --git a/src/aig/aig/aigFact.c b/src/aig/aig/aigFact.c
index 9c4e5689..40885365 100644
--- a/src/aig/aig/aigFact.c
+++ b/src/aig/aig/aigFact.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "aig.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -289,7 +289,7 @@ Vec_Ptr_t * Aig_SuppMinPerform( Aig_Man_t * p, Vec_Ptr_t * vOrGate, Vec_Ptr_t *
     Aig_Obj_t * pObj;
     Vec_Ptr_t * vTrSupp, * vTrNode, * vCofs;
     unsigned * uFunc, * uCare, * uFunc0, * uFunc1, * uCof;
-    int i, nWords = Aig_TruthWordNum( Vec_PtrSize(vSupp) );
+    int i, nWords = Abc_TruthWordNum( Vec_PtrSize(vSupp) );
     // assign support nodes
     vTrSupp = Vec_PtrAllocTruthTables( Vec_PtrSize(vSupp) );
     Vec_PtrForEachEntry( Aig_Obj_t *, vSupp, pObj, i )
diff --git a/src/aig/aig/aigFanout.c b/src/aig/aig/aigFanout.c
index d6317f43..d2fc1fe3 100644
--- a/src/aig/aig/aigFanout.c
+++ b/src/aig/aig/aigFanout.c
@@ -112,7 +112,7 @@ void Aig_ObjAddFanout( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pFanout )
     assert( pFanout->Id > 0 );
     if ( pObj->Id >= p->nFansAlloc || pFanout->Id >= p->nFansAlloc )
     {
-        int nFansAlloc = 2 * ABC_MAX( pObj->Id, pFanout->Id ); 
+        int nFansAlloc = 2 * Abc_MaxInt( pObj->Id, pFanout->Id ); 
         p->pFanData = ABC_REALLOC( int, p->pFanData, 5 * nFansAlloc );
         memset( p->pFanData + 5 * p->nFansAlloc, 0, sizeof(int) * 5 * (nFansAlloc - p->nFansAlloc) );
         p->nFansAlloc = nFansAlloc;
diff --git a/src/aig/aig/aigFrames.c b/src/aig/aig/aigFrames.c
index fdcd14aa..6840aadf 100644
--- a/src/aig/aig/aigFrames.c
+++ b/src/aig/aig/aigFrames.c
@@ -61,8 +61,8 @@ Aig_Man_t * Aig_ManFrames( Aig_Man_t * pAig, int nFs, int fInit, int fOuts, int
 
     // start the fraig package
     pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFs );
-    pFrames->pName = Aig_UtilStrsav( pAig->pName );
-    pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+    pFrames->pName = Abc_UtilStrsav( pAig->pName );
+    pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
     // map constant nodes
     for ( f = 0; f < nFs; f++ )
         Aig_ObjSetFrames( pObjMap, nFs, Aig_ManConst1(pAig), f, Aig_ManConst1(pFrames) );
diff --git a/src/aig/aig/aigInter.c b/src/aig/aig/aigInter.c
index aa019191..bb6cf987 100644
--- a/src/aig/aig/aigInter.c
+++ b/src/aig/aig/aigInter.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "aig.h"
-#include "cnf.h"
-#include "satStore.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satStore.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/aig/aigJust.c b/src/aig/aig/aigJust.c
index eca17d40..bff2baed 100644
--- a/src/aig/aig/aigJust.c
+++ b/src/aig/aig/aigJust.c
@@ -114,7 +114,7 @@ int Aig_NtkFindSatAssign_rec( Aig_Man_t * pAig, Aig_Obj_t * pNode, int Value, Ve
 //        if ( Aig_ObjId(pNode) % 1000 == 0 )
 //            Value ^= 1;
         if ( vSuppLits )
-            Vec_IntPush( vSuppLits, Aig_Var2Lit( Aig_ObjPioNum(pNode), !Value ) );
+            Vec_IntPush( vSuppLits, Abc_Var2Lit( Aig_ObjPioNum(pNode), !Value ) );
         return 1;
     }
     assert( Aig_ObjIsNode(pNode) );
@@ -221,8 +221,8 @@ int Aig_ObjTerSimulate( Aig_Man_t * pAig, Aig_Obj_t * pNode, Vec_Int_t * vSuppLi
     Aig_ManIncrementTravId( pAig );
     Vec_IntForEachEntry( vSuppLits, Entry, i )
     {
-        pObj = Aig_ManPi( pAig, Aig_Lit2Var(Entry) );
-        Aig_ObjSetTerValue( pObj, Aig_LitIsCompl(Entry) ? AIG_VAL0 : AIG_VAL1 );
+        pObj = Aig_ManPi( pAig, Abc_Lit2Var(Entry) );
+        Aig_ObjSetTerValue( pObj, Abc_LitIsCompl(Entry) ? AIG_VAL0 : AIG_VAL1 );
         Aig_ObjSetTravIdCurrent( pAig, pObj );
 //printf( "%d ", Entry );
     }
diff --git a/src/aig/aig/aigMan.c b/src/aig/aig/aigMan.c
index b0544c90..814e5248 100644
--- a/src/aig/aig/aigMan.c
+++ b/src/aig/aig/aigMan.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "aig.h"
-#include "tim.h"
+#include "src/misc/tim/tim.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -68,7 +68,7 @@ Aig_Man_t * Aig_ManStart( int nNodesMax )
     p->pConst1->fPhase = 1;
     p->nObjs[AIG_OBJ_CONST1]++;
     // start the table
-    p->nTableSize = Aig_PrimeCudd( nNodesMax );
+    p->nTableSize = Abc_PrimeCudd( nNodesMax );
     p->pTable = ABC_ALLOC( Aig_Obj_t *, p->nTableSize );
     memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
     return p;
@@ -92,8 +92,8 @@ Aig_Man_t * Aig_ManStartFrom( Aig_Man_t * p )
     int i;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // create the PIs
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachPi( p, pObj, i )
@@ -149,8 +149,8 @@ Aig_Man_t * Aig_ManExtractMiter( Aig_Man_t * p, Aig_Obj_t * pNode1, Aig_Obj_t *
     int i;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // create the PIs
     Aig_ManCleanData( p );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
diff --git a/src/aig/aig/aigMffc.c b/src/aig/aig/aigMffc.c
index 2f51e442..ed0015ac 100644
--- a/src/aig/aig/aigMffc.c
+++ b/src/aig/aig/aigMffc.c
@@ -269,7 +269,7 @@ int Aig_NodeMffcExtendCut( Aig_Man_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vLeaves
     // dereference the current cut
     LevelMax = 0;
     Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
-        LevelMax = ABC_MAX( LevelMax, (int)pObj->Level );
+        LevelMax = Abc_MaxInt( LevelMax, (int)pObj->Level );
     if ( LevelMax == 0 )
         return 0;
     // dereference the cut
diff --git a/src/aig/aig/aigObj.c b/src/aig/aig/aigObj.c
index 36578d35..71796993 100644
--- a/src/aig/aig/aigObj.c
+++ b/src/aig/aig/aigObj.c
@@ -122,11 +122,11 @@ Aig_Obj_t * Aig_ObjCreate( Aig_Man_t * p, Aig_Obj_t * pGhost )
     // create the power counter
     if ( p->vProbs )
     {
-        float Prob0 = Aig_Int2Float( Vec_IntEntry( p->vProbs, Aig_ObjFaninId0(pObj) ) );
-        float Prob1 = Aig_Int2Float( Vec_IntEntry( p->vProbs, Aig_ObjFaninId1(pObj) ) );
+        float Prob0 = Abc_Int2Float( Vec_IntEntry( p->vProbs, Aig_ObjFaninId0(pObj) ) );
+        float Prob1 = Abc_Int2Float( Vec_IntEntry( p->vProbs, Aig_ObjFaninId1(pObj) ) );
         Prob0 = Aig_ObjFaninC0(pObj)? 1.0 - Prob0 : Prob0;
         Prob1 = Aig_ObjFaninC1(pObj)? 1.0 - Prob1 : Prob1;
-        Vec_IntSetEntry( p->vProbs, pObj->Id, Aig_Float2Int(Prob0 * Prob1) );
+        Vec_IntSetEntry( p->vProbs, pObj->Id, Abc_Float2Int(Prob0 * Prob1) );
     }
     return pObj;
 }
@@ -563,7 +563,7 @@ void Aig_ObjReplace( Aig_Man_t * p, Aig_Obj_t * pObjOld, Aig_Obj_t * pObjNew, in
     if ( p->pFanData && Aig_ObjIsBuf(pObjOld) )
     {
         Vec_PtrPush( p->vBufs, pObjOld );
-        p->nBufMax = ABC_MAX( p->nBufMax, Vec_PtrSize(p->vBufs) );
+        p->nBufMax = Abc_MaxInt( p->nBufMax, Vec_PtrSize(p->vBufs) );
         Aig_ManPropagateBuffers( p, fUpdateLevel );
     }
 }
diff --git a/src/aig/aig/aigPack.c b/src/aig/aig/aigPack.c
index 0ecbf533..b89d6077 100644
--- a/src/aig/aig/aigPack.c
+++ b/src/aig/aig/aigPack.c
@@ -295,19 +295,19 @@ int Aig_ManPackAddPatternTry( Aig_ManPack_t * p, int iBit, Vec_Int_t * vLits )
     int i, Lit;
     Vec_IntForEachEntry( vLits, Lit, i )
     {
-        pInfo = Vec_WrdEntryP( p->vPiPats, Aig_Lit2Var(Lit) );
-        pPres = Vec_WrdEntryP( p->vPiCare, Aig_Lit2Var(Lit) );
-        if ( Aig_InfoHasBit( (unsigned *)pPres, iBit ) && 
-             Aig_InfoHasBit( (unsigned *)pInfo, iBit ) == Aig_LitIsCompl(Lit) )
+        pInfo = Vec_WrdEntryP( p->vPiPats, Abc_Lit2Var(Lit) );
+        pPres = Vec_WrdEntryP( p->vPiCare, Abc_Lit2Var(Lit) );
+        if ( Abc_InfoHasBit( (unsigned *)pPres, iBit ) && 
+             Abc_InfoHasBit( (unsigned *)pInfo, iBit ) == Abc_LitIsCompl(Lit) )
              return 0;
     }
     Vec_IntForEachEntry( vLits, Lit, i )
     {
-        pInfo = Vec_WrdEntryP( p->vPiPats, Aig_Lit2Var(Lit) );
-        pPres = Vec_WrdEntryP( p->vPiCare, Aig_Lit2Var(Lit) );
-        Aig_InfoSetBit( (unsigned *)pPres, iBit );
-        if ( Aig_InfoHasBit( (unsigned *)pInfo, iBit ) == Aig_LitIsCompl(Lit) )
-             Aig_InfoXorBit( (unsigned *)pInfo, iBit );
+        pInfo = Vec_WrdEntryP( p->vPiPats, Abc_Lit2Var(Lit) );
+        pPres = Vec_WrdEntryP( p->vPiCare, Abc_Lit2Var(Lit) );
+        Abc_InfoSetBit( (unsigned *)pPres, iBit );
+        if ( Abc_InfoHasBit( (unsigned *)pInfo, iBit ) == Abc_LitIsCompl(Lit) )
+             Abc_InfoXorBit( (unsigned *)pInfo, iBit );
     }
     return 1;
 }
@@ -335,16 +335,16 @@ void Aig_ManPackAddPattern( Aig_ManPack_t * p, Vec_Int_t * vLits )
         word * pInfo, * pPres;
         int i, Lit;
         Vec_IntForEachEntry( vLits, Lit, i )
-            printf( "%d", Aig_LitIsCompl(Lit) );
+            printf( "%d", Abc_LitIsCompl(Lit) );
         printf( "\n\n" );
         for ( k = 1; k < 64; k++ )
         {
             Vec_IntForEachEntry( vLits, Lit, i )
             {
-                pInfo = Vec_WrdEntryP( p->vPiPats, Aig_Lit2Var(Lit) );
-                pPres = Vec_WrdEntryP( p->vPiCare, Aig_Lit2Var(Lit) );
-                if ( Aig_InfoHasBit( (unsigned *)pPres, k ) )
-                    printf( "%d", Aig_InfoHasBit( (unsigned *)pInfo, k ) );
+                pInfo = Vec_WrdEntryP( p->vPiPats, Abc_Lit2Var(Lit) );
+                pPres = Vec_WrdEntryP( p->vPiCare, Abc_Lit2Var(Lit) );
+                if ( Abc_InfoHasBit( (unsigned *)pPres, k ) )
+                    printf( "%d", Abc_InfoHasBit( (unsigned *)pInfo, k ) );
                 else
                     printf( "-" );
             }
diff --git a/src/aig/aig/aigPart.c b/src/aig/aig/aigPart.c
index 6ee3930b..1510ddc7 100644
--- a/src/aig/aig/aigPart.c
+++ b/src/aig/aig/aigPart.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "aig.h"
-#include "tim.h"
-#include "fra.h"
+#include "src/misc/tim/tim.h"
+#include "src/proof/fra/fra.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -471,13 +471,13 @@ unsigned * Aig_ManSuppCharStart( Vec_Int_t * vOne, int nPis )
 {
     unsigned * pBuffer;
     int i, Entry;
-    int nWords = Aig_BitWordNum(nPis);
+    int nWords = Abc_BitWordNum(nPis);
     pBuffer = ABC_ALLOC( unsigned, nWords );
     memset( pBuffer, 0, sizeof(unsigned) * nWords );
     Vec_IntForEachEntry( vOne, Entry, i )
     {
         assert( Entry < nPis );
-        Aig_InfoSetBit( pBuffer, Entry );
+        Abc_InfoSetBit( pBuffer, Entry );
     }
     return pBuffer;
 }
@@ -499,7 +499,7 @@ void Aig_ManSuppCharAdd( unsigned * pBuffer, Vec_Int_t * vOne, int nPis )
     Vec_IntForEachEntry( vOne, Entry, i )
     {
         assert( Entry < nPis );
-        Aig_InfoSetBit( pBuffer, Entry );
+        Abc_InfoSetBit( pBuffer, Entry );
     }
 }
 
@@ -518,7 +518,7 @@ int Aig_ManSuppCharCommon( unsigned * pBuffer, Vec_Int_t * vOne )
 {
     int i, Entry, nCommon = 0;
     Vec_IntForEachEntry( vOne, Entry, i )
-        nCommon += Aig_InfoHasBit(pBuffer, Entry);
+        nCommon += Abc_InfoHasBit(pBuffer, Entry);
     return nCommon;
 }
 
@@ -558,7 +558,7 @@ int Aig_ManPartitionSmartFindPart( Vec_Ptr_t * vPartSuppsAll, Vec_Ptr_t * vParts
         if ( Vec_IntSize(vPartSupp) < 100 )
             Repulse = 1;
         else
-            Repulse = 1+Aig_Base2Log(Vec_IntSize(vPartSupp)-100);
+            Repulse = 1+Abc_Base2Log(Vec_IntSize(vPartSupp)-100);
         Value = Attract/Repulse;
         if ( ValueBest < Value )
         {
diff --git a/src/aig/aig/aigPartSat.c b/src/aig/aig/aigPartSat.c
index 48e5cf80..52fbe2e2 100644
--- a/src/aig/aig/aigPartSat.c
+++ b/src/aig/aig/aigPartSat.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "aig.h"
-#include "satSolver.h"
-#include "cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/cnf/cnf.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/aig/aigRepar.c b/src/aig/aig/aigRepar.c
index 03155e91..e0fe4cb1 100644
--- a/src/aig/aig/aigRepar.c
+++ b/src/aig/aig/aigRepar.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "aig.h"
-#include "cnf.h"
-#include "satSolver2.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver2.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -313,7 +313,7 @@ Aig_Man_t * Aig_ManInterRepar( Aig_Man_t * pMan, int fVerbose )
 
     // start the interpolant
     pBase = Aig_ManStart( 1000 );
-    pBase->pName = Aig_UtilStrsav( "repar" );
+    pBase->pName = Abc_UtilStrsav( "repar" );
     for ( k = 0; k < 2*nOuts; k++ )
         Aig_IthVar(pBase, i);
 
@@ -338,7 +338,7 @@ Aig_Man_t * Aig_ManInterRepar( Aig_Man_t * pMan, int fVerbose )
         Sat_Solver2PrintStats( stdout, pSat );
 
         // derive interpolant
-        pInter = Sat_ProofInterpolant( pSat, vVars );
+        pInter = (Aig_Man_t *)Sat_ProofInterpolant( pSat, vVars );
         Aig_ManPrintStats( pInter );
         // make sure interpolant does not depend on useless vars
         Aig_ManForEachPi( pInter, pObj, i )
diff --git a/src/aig/aig/aigRepr.c b/src/aig/aig/aigRepr.c
index 9966174f..d08b6553 100644
--- a/src/aig/aig/aigRepr.c
+++ b/src/aig/aig/aigRepr.c
@@ -271,8 +271,8 @@ Aig_Man_t * Aig_ManDupRepr( Aig_Man_t * p, int fOrdered )
     int i;
     // start the HOP package
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nConstrs = p->nConstrs;
     if ( p->vFlopNums )
         pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
diff --git a/src/aig/aig/aigRet.c b/src/aig/aig/aigRet.c
index f7774d22..acc5b6ec 100644
--- a/src/aig/aig/aigRet.c
+++ b/src/aig/aig/aigRet.c
@@ -176,7 +176,7 @@ void Rtm_ObjTransferToBig( Rtm_Man_t * p, Rtm_Edg_t * pEdge )
     assert( pEdge->nLats == 10 );
     if ( p->nExtraCur + 1 > p->nExtraAlloc )
     {
-        int nExtraAllocNew = ABC_MAX( 2 * p->nExtraAlloc, 1024 );
+        int nExtraAllocNew = Abc_MaxInt( 2 * p->nExtraAlloc, 1024 );
         p->pExtra = ABC_REALLOC( unsigned, p->pExtra, nExtraAllocNew );
         p->nExtraAlloc = nExtraAllocNew;
     }
@@ -202,7 +202,7 @@ void Rtm_ObjTransferToBigger( Rtm_Man_t * p, Rtm_Edg_t * pEdge )
     nWords = (pEdge->nLats + 1) >> 4;
     if ( p->nExtraCur + nWords + 1 > p->nExtraAlloc )
     {
-        int nExtraAllocNew = ABC_MAX( 2 * p->nExtraAlloc, 1024 );
+        int nExtraAllocNew = Abc_MaxInt( 2 * p->nExtraAlloc, 1024 );
         p->pExtra = ABC_REALLOC( unsigned, p->pExtra, nExtraAllocNew );
         p->nExtraAlloc = nExtraAllocNew;
     }
@@ -360,7 +360,7 @@ int Rtm_ManLatchMax( Rtm_Man_t * p )
             assert( Val == 1 || Val == 2 );
         }
 */
-        nLatchMax = ABC_MAX( nLatchMax, (int)pEdge->nLats );
+        nLatchMax = Abc_MaxInt( nLatchMax, (int)pEdge->nLats );
     }
     return nLatchMax;
 }
@@ -477,7 +477,7 @@ int Rtm_ObjGetDegreeFwd( Rtm_Obj_t * pObj )
     Rtm_Obj_t * pFanin;
     int i, Degree = 0;
     Rtm_ObjForEachFanin( pObj, pFanin, i )
-        Degree = ABC_MAX( Degree, (int)pFanin->Num );
+        Degree = Abc_MaxInt( Degree, (int)pFanin->Num );
     return Degree + 1;
 }
 
@@ -497,7 +497,7 @@ int Rtm_ObjGetDegreeBwd( Rtm_Obj_t * pObj )
     Rtm_Obj_t * pFanout;
     int i, Degree = 0;
     Rtm_ObjForEachFanout( pObj, pFanout, i )
-        Degree = ABC_MAX( Degree, (int)pFanout->Num );
+        Degree = Abc_MaxInt( Degree, (int)pFanout->Num );
     return Degree + 1;
 }
 
@@ -910,7 +910,7 @@ clk = clock();
                 if ( !Rtm_ObjCheckRetimeFwd( pNext ) ) // skip non-retimable
                     continue;
                 Degree = Rtm_ObjGetDegreeFwd( pNext );
-                DegreeMax = ABC_MAX( DegreeMax, Degree );
+                DegreeMax = Abc_MaxInt( DegreeMax, Degree );
                 if ( Degree > nStepsMax ) // skip nodes with high degree
                     continue;
                 pNext->fMark = 1;
@@ -931,7 +931,7 @@ clk = clock();
                 if ( !Rtm_ObjCheckRetimeBwd( pNext ) ) // skip non-retimable
                     continue;
                 Degree = Rtm_ObjGetDegreeBwd( pNext );
-                DegreeMax = ABC_MAX( DegreeMax, Degree );
+                DegreeMax = Abc_MaxInt( DegreeMax, Degree );
                 if ( Degree > nStepsMax ) // skip nodes with high degree
                     continue;
                 pNext->fMark = 1;
@@ -952,8 +952,8 @@ clk = clock();
 
     // get the new manager
     pNew = Rtm_ManToAig( pRtm );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     Rtm_ManFree( pRtm );
     // group the registers
 clk = clock();
diff --git a/src/aig/aig/aigScl.c b/src/aig/aig/aigScl.c
index 2bc7f8ea..74b56bcf 100644
--- a/src/aig/aig/aigScl.c
+++ b/src/aig/aig/aigScl.c
@@ -50,8 +50,8 @@ Aig_Man_t * Aig_ManRemap( Aig_Man_t * p, Vec_Ptr_t * vMap )
     int i, nTruePis;
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nAsserts = p->nAsserts;
     pNew->nConstrs = p->nConstrs;
     assert( p->vFlopNums == NULL || Vec_IntSize(p->vFlopNums) == p->nRegs );
diff --git a/src/aig/aig/aigSplit.c b/src/aig/aig/aigSplit.c
index 51b4f982..82f60e2d 100644
--- a/src/aig/aig/aigSplit.c
+++ b/src/aig/aig/aigSplit.c
@@ -19,9 +19,8 @@
 ***********************************************************************/
 
 #include "aig.h"
-#include "saig.h"
-#include "cuddInt.h"
-#include "extra.h"
+#include "src/aig/saig/saig.h"
+#include "src/misc/extra/extraBdd.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -84,7 +83,7 @@ Aig_Man_t * Aig_ManConvertBddsToAigs( Aig_Man_t * p, DdManager * dd, Vec_Ptr_t *
     Aig_ManCleanData( p );
     // generate AIG for BDD
     pNew = Aig_ManStart( Aig_ManObjNum(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachPi( p, pObj, i )
         pObj->pData = Aig_ObjCreatePi( pNew );
diff --git a/src/aig/aig/aigTable.c b/src/aig/aig/aigTable.c
index 13826065..ec2531c7 100644
--- a/src/aig/aig/aigTable.c
+++ b/src/aig/aig/aigTable.c
@@ -77,7 +77,7 @@ clk = clock();
     pTableOld = p->pTable;
     nTableSizeOld = p->nTableSize;
     // get the new table
-    p->nTableSize = Aig_PrimeCudd( 2 * Aig_ManNodeNum(p) ); 
+    p->nTableSize = Abc_PrimeCudd( 2 * Aig_ManNodeNum(p) ); 
     p->pTable = ABC_ALLOC( Aig_Obj_t *, p->nTableSize );
     memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
     // rehash the entries from the old table
diff --git a/src/aig/aig/aigTiming.c b/src/aig/aig/aigTiming.c
index 4ea93e29..e855e012 100644
--- a/src/aig/aig/aigTiming.c
+++ b/src/aig/aig/aigTiming.c
@@ -121,7 +121,7 @@ int Aig_ObjReverseLevelNew( Aig_Man_t * p, Aig_Obj_t * pObj )
     Aig_ObjForEachFanout( p, pObj, pFanout, iFanout, i )
     {
         LevelCur = Aig_ObjReverseLevel( p, pFanout );
-        Level = ABC_MAX( Level, LevelCur );
+        Level = Abc_MaxInt( Level, LevelCur );
     }
     return Level + 1;
 }
diff --git a/src/aig/aig/aigTruth.c b/src/aig/aig/aigTruth.c
index ddcb8736..5115c4f4 100644
--- a/src/aig/aig/aigTruth.c
+++ b/src/aig/aig/aigTruth.c
@@ -88,7 +88,7 @@ unsigned * Aig_ManCutTruth( Aig_Obj_t * pRoot, Vec_Ptr_t * vLeaves, Vec_Ptr_t *
     Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
         pObj->pData = Vec_PtrEntry( vTruthElem, i );
     // compute truths for other nodes
-    nWords = Aig_TruthWordNum( Vec_PtrSize(vLeaves) );
+    nWords = Abc_TruthWordNum( Vec_PtrSize(vLeaves) );
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         pObj->pData = Aig_ManCutTruthOne( pObj, (unsigned *)Vec_PtrEntry(vTruthStore, i), nWords );
     return (unsigned *)pRoot->pData;
diff --git a/src/aig/aig/aigTsim.c b/src/aig/aig/aigTsim.c
index 5e711ff6..99aa5c64 100644
--- a/src/aig/aig/aigTsim.c
+++ b/src/aig/aig/aigTsim.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "aig.h"
-#include "saig.h"
+#include "src/aig/saig/saig.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -133,10 +133,10 @@ Aig_Tsi_t * Aig_TsiStart( Aig_Man_t * pAig )
     p = ABC_ALLOC( Aig_Tsi_t, 1 );
     memset( p, 0, sizeof(Aig_Tsi_t) );
     p->pAig    = pAig;
-    p->nWords  = Aig_BitWordNum( 2*Aig_ManRegNum(pAig) );
+    p->nWords  = Abc_BitWordNum( 2*Aig_ManRegNum(pAig) );
     p->vStates = Vec_PtrAlloc( 1000 );
     p->pMem    = Aig_MmFixedStart( sizeof(unsigned) * p->nWords + sizeof(unsigned *), 10000 );
-    p->nBins   = Aig_PrimeCudd(TSI_MAX_ROUNDS/2);
+    p->nBins   = Abc_PrimeCudd(TSI_MAX_ROUNDS/2);
     p->pBins   = ABC_ALLOC( unsigned *, p->nBins );
     memset( p->pBins, 0, sizeof(unsigned *) * p->nBins );
     return p;
@@ -274,7 +274,7 @@ void Aig_TsiStatePrint( Aig_Tsi_t * p, unsigned * pState )
     int i, Value, nZeros = 0, nOnes = 0, nDcs = 0;
     for ( i = 0; i < Aig_ManRegNum(p->pAig); i++ )
     {
-        Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+        Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
         if ( Value == 1 )
             printf( "0" ), nZeros++;
         else if ( Value == 2 )
@@ -304,7 +304,7 @@ int Aig_TsiStateCount( Aig_Tsi_t * p, unsigned * pState )
     int i, Value, nCounter = 0;
     Aig_ManForEachLiLoSeq( p->pAig, pObjLi, pObjLo, i )
     {
-        Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+        Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
         nCounter += (Value == 1 || Value == 2);
     }
     return nCounter;
@@ -369,9 +369,9 @@ Vec_Ptr_t * Aig_ManTernarySimulate( Aig_Man_t * p, int fVerbose, int fVeryVerbos
         {
             Value = Aig_ObjGetXsim(pObjLo);
             if ( Value & 1 )
-                Aig_InfoSetBit( pState, 2 * i );
+                Abc_InfoSetBit( pState, 2 * i );
             if ( Value & 2 )
-                Aig_InfoSetBit( pState, 2 * i + 1 );
+                Abc_InfoSetBit( pState, 2 * i + 1 );
         }
 
 //        printf( "%d ", Aig_TsiStateCount(pTsi, pState) );
@@ -446,7 +446,7 @@ Aig_TsiStatePrint( pTsi, pState );
         for ( i = 0; i < pTsi->nWords - 1; i++ )
             if ( pState[i] != ~0 )
                 fConstants = 1;
-        if ( pState[i] != Aig_InfoMask( 2*Aig_ManRegNum(p) - 32*(pTsi->nWords-1) ) )
+        if ( pState[i] != Abc_InfoMask( 2*Aig_ManRegNum(p) - 32*(pTsi->nWords-1) ) )
             fConstants = 1;
     }
     if ( fConstants == 0 )
@@ -465,7 +465,7 @@ Aig_TsiStatePrint( pTsi, pState );
     nCounter = 0;
     Aig_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )
     {
-        Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+        Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
         nCounter += (Value == 1 || Value == 2);
         if ( Value == 1 )
             Vec_PtrPush( vMap, Aig_ManConst0(p) );
diff --git a/src/aig/aig/aigUtil.c b/src/aig/aig/aigUtil.c
index 8cbaa63b..5546c776 100644
--- a/src/aig/aig/aigUtil.c
+++ b/src/aig/aig/aigUtil.c
@@ -30,42 +30,6 @@ ABC_NAMESPACE_IMPL_START
 ///                     FUNCTION DEFINITIONS                         ///
 ////////////////////////////////////////////////////////////////////////
 
-/**Function********************************************************************
-
-  Synopsis    [Returns the next prime >= p.]
-
-  Description [Copied from CUDD, for stand-aloneness.]
-
-  SideEffects [None]
-
-  SeeAlso     []
-
-******************************************************************************/
-unsigned int Aig_PrimeCudd( unsigned int p )
-{
-    int i,pn;
-
-    p--;
-    do {
-        p++;
-        if (p&1) {
-        pn = 1;
-        i = 3;
-        while ((unsigned) (i * i) <= p) {
-        if (p % i == 0) {
-            pn = 0;
-            break;
-        }
-        i += 2;
-        }
-    } else {
-        pn = 0;
-    }
-    } while (!pn);
-    return(p);
-
-} /* end of Cudd_Prime */
-
 /**Function*************************************************************
 
   Synopsis    [Increments the current traversal ID of the network.]
@@ -140,7 +104,7 @@ int Aig_ManLevels( Aig_Man_t * p )
     Aig_Obj_t * pObj;
     int i, LevelMax = 0;
     Aig_ManForEachPo( p, pObj, i )
-        LevelMax = ABC_MAX( LevelMax, (int)Aig_ObjFanin0(pObj)->Level );
+        LevelMax = Abc_MaxInt( LevelMax, (int)Aig_ObjFanin0(pObj)->Level );
     return LevelMax;
 }
 
@@ -791,7 +755,7 @@ void Aig_ManDumpBlif( Aig_Man_t * p, char * pFileName, Vec_Ptr_t * vPiNames, Vec
         pObj->iData = Counter++;
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         pObj->iData = Counter++;
-    nDigits = Aig_Base10Log( Counter );
+    nDigits = Abc_Base10Log( Counter );
     // write the file 
     pFile = fopen( pFileName, "w" );
     fprintf( pFile, "# BLIF file written by procedure Aig_ManDumpBlif()\n" );
@@ -906,7 +870,7 @@ void Aig_ManDumpVerilog( Aig_Man_t * p, char * pFileName )
         pObj->iData = Counter++;
     Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
         pObj->iData = Counter++;
-    nDigits = Aig_Base10Log( Counter );
+    nDigits = Abc_Base10Log( Counter );
     // write the file
     pFile = fopen( pFileName, "w" );
     fprintf( pFile, "// Verilog file written by procedure Aig_ManDumpVerilog()\n" );
@@ -1299,7 +1263,7 @@ void Aig_NodeIntersectLists( Vec_Ptr_t * vArr1, Vec_Ptr_t * vArr2, Vec_Ptr_t * v
     Aig_Obj_t ** pBeg2 = (Aig_Obj_t **)vArr2->pArray;
     Aig_Obj_t ** pEnd1 = (Aig_Obj_t **)vArr1->pArray + vArr1->nSize;
     Aig_Obj_t ** pEnd2 = (Aig_Obj_t **)vArr2->pArray + vArr2->nSize;
-    Vec_PtrGrow( vArr, ABC_MAX( Vec_PtrSize(vArr1), Vec_PtrSize(vArr2) ) );
+    Vec_PtrGrow( vArr, Abc_MaxInt( Vec_PtrSize(vArr1), Vec_PtrSize(vArr2) ) );
     pBeg  = (Aig_Obj_t **)vArr->pArray;
     while ( pBeg1 < pEnd1 && pBeg2 < pEnd2 )
     {
@@ -1324,8 +1288,8 @@ void Aig_NodeIntersectLists( Vec_Ptr_t * vArr1, Vec_Ptr_t * vArr2, Vec_Ptr_t * v
 
 ABC_NAMESPACE_IMPL_END
 
-#include "fra.h"
-#include "saig.h"
+#include "src/proof/fra/fra.h"
+#include "src/aig/saig/saig.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -1353,45 +1317,45 @@ void Aig_ManCounterExampleValueStart( Aig_Man_t * pAig, Abc_Cex_t * pCex )
     assert( Aig_ManRegNum(pAig) > 0 ); // makes sense only for sequential AIGs
     assert( pAig->pData2 == NULL );    // if this fail, there may be a memory leak
     // allocate memory to store simulation bits for internal nodes
-    pAig->pData2 = ABC_CALLOC( unsigned, Aig_BitWordNum( (pCex->iFrame + 1) * Aig_ManObjNum(pAig) ) );
+    pAig->pData2 = ABC_CALLOC( unsigned, Abc_BitWordNum( (pCex->iFrame + 1) * Aig_ManObjNum(pAig) ) );
     // the register values in the counter-example should be zero
     Saig_ManForEachLo( pAig, pObj, k )
-        assert( Aig_InfoHasBit(pCex->pData, iBit++) == 0 );
+        assert( Abc_InfoHasBit(pCex->pData, iBit++) == 0 );
     // iterate through the timeframes
     nObjs = Aig_ManObjNum(pAig);
     for ( i = 0; i <= pCex->iFrame; i++ )
     {
         // set constant 1 node
-        Aig_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + 0 );
+        Abc_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + 0 );
         // set primary inputs according to the counter-example
         Saig_ManForEachPi( pAig, pObj, k )
-            if ( Aig_InfoHasBit(pCex->pData, iBit++) )
-                Aig_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObj) );
+            if ( Abc_InfoHasBit(pCex->pData, iBit++) )
+                Abc_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObj) );
         // compute values for each node
         Aig_ManForEachNode( pAig, pObj, k )
         {
-            Val0 = Aig_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjFaninId0(pObj) );
-            Val1 = Aig_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjFaninId1(pObj) );
+            Val0 = Abc_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjFaninId0(pObj) );
+            Val1 = Abc_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjFaninId1(pObj) );
             if ( (Val0 ^ Aig_ObjFaninC0(pObj)) & (Val1 ^ Aig_ObjFaninC1(pObj)) )
-                Aig_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObj) );
+                Abc_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObj) );
         }
         // derive values for combinational outputs
         Aig_ManForEachPo( pAig, pObj, k )
         {
-            Val0 = Aig_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjFaninId0(pObj) );
+            Val0 = Abc_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjFaninId0(pObj) );
             if ( Val0 ^ Aig_ObjFaninC0(pObj) )
-                Aig_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObj) );
+                Abc_InfoSetBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObj) );
         }
         if ( i == pCex->iFrame )
             continue;
         // transfer values to the register output of the next frame
         Saig_ManForEachLiLo( pAig, pObjRi, pObjRo, k )
-            if ( Aig_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObjRi) ) )
-                Aig_InfoSetBit( (unsigned *)pAig->pData2, nObjs * (i+1) + Aig_ObjId(pObjRo) );
+            if ( Abc_InfoHasBit( (unsigned *)pAig->pData2, nObjs * i + Aig_ObjId(pObjRi) ) )
+                Abc_InfoSetBit( (unsigned *)pAig->pData2, nObjs * (i+1) + Aig_ObjId(pObjRo) );
     }
     assert( iBit == pCex->nBits );
     // check that the counter-example is correct, that is, the corresponding output is asserted
-    assert( Aig_InfoHasBit( (unsigned *)pAig->pData2, nObjs * pCex->iFrame + Aig_ObjId(Aig_ManPo(pAig, pCex->iPo)) ) );
+    assert( Abc_InfoHasBit( (unsigned *)pAig->pData2, nObjs * pCex->iFrame + Aig_ObjId(Aig_ManPo(pAig, pCex->iPo)) ) );
 }
 
 /**Function*************************************************************
@@ -1428,7 +1392,7 @@ void Aig_ManCounterExampleValueStop( Aig_Man_t * pAig )
 int Aig_ManCounterExampleValueLookup(  Aig_Man_t * pAig, int Id, int iFrame )
 {
     assert( Id >= 0 && Id < Aig_ManObjNum(pAig) );
-    return Aig_InfoHasBit( (unsigned *)pAig->pData2, Aig_ManObjNum(pAig) * iFrame + Id );
+    return Abc_InfoHasBit( (unsigned *)pAig->pData2, Aig_ManObjNum(pAig) * iFrame + Id );
 }
 
 /**Function*************************************************************
@@ -1445,7 +1409,7 @@ int Aig_ManCounterExampleValueLookup(  Aig_Man_t * pAig, int Id, int iFrame )
 void Aig_ManCounterExampleValueTest( Aig_Man_t * pAig, Abc_Cex_t * pCex )
 {
     Aig_Obj_t * pObj = Aig_ManObj( pAig, Aig_ManObjNum(pAig)/2 );
-    int iFrame = ABC_MAX( 0, pCex->iFrame - 1 );
+    int iFrame = Abc_MaxInt( 0, pCex->iFrame - 1 );
     printf( "\nUsing counter-example, which asserts output %d in frame %d.\n", pCex->iPo, pCex->iFrame );
     Aig_ManCounterExampleValueStart( pAig, pCex );
     printf( "Value of object %d in frame %d is %d.\n", Aig_ObjId(pObj), iFrame,
diff --git a/src/aig/bar/bar.c b/src/aig/bar/bar.c
deleted file mode 100644
index b5c31779..00000000
--- a/src/aig/bar/bar.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bar.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [extra]
-
-  Synopsis    [Progress bar.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: bar.c,v 1.0 2003/02/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-#include "abc_global.h"
-#include "main.h"
-#include "bar.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-struct Bar_Progress_t_
-{
-    int              nItemsNext;   // the number of items for the next update of the progress bar
-    int              nItemsTotal;  // the total number of items
-    int              posTotal;     // the total number of positions
-    int              posCur;       // the current position
-    FILE *           pFile;        // the output stream 
-};
-
-static void Bar_ProgressShow( Bar_Progress_t * p, char * pString );
-static void Bar_ProgressClean( Bar_Progress_t * p );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the progress bar.]
-
-  Description [The first parameter is the output stream (pFile), where
-  the progress is printed. The current printing position should be the
-  first one on the given line. The second parameters is the total
-  number of items that correspond to 100% position of the progress bar.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bar_Progress_t * Bar_ProgressStart( FILE * pFile, int nItemsTotal )
-{
-    Bar_Progress_t * p;
-    Abc_Frame_t * pFrame;
-    pFrame = Abc_FrameReadGlobalFrame();
-    if ( pFrame == NULL )
-        return NULL;
-    if ( !Abc_FrameShowProgress(pFrame) ) return NULL;
-    p = ABC_ALLOC( Bar_Progress_t, 1 );
-    memset( p, 0, sizeof(Bar_Progress_t) );
-    p->pFile       = pFile;
-    p->nItemsTotal = nItemsTotal;
-    p->posTotal    = 78;
-    p->posCur      = 1;
-    p->nItemsNext  = (int)((7.0+p->posCur)*p->nItemsTotal/p->posTotal);
-    Bar_ProgressShow( p, NULL );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the progress bar.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bar_ProgressUpdate_int( Bar_Progress_t * p, int nItemsCur, char * pString )
-{
-    if ( p == NULL ) return;
-    if ( nItemsCur < p->nItemsNext )
-        return;
-    if ( nItemsCur >= p->nItemsTotal )
-    {
-        p->posCur = 78;
-        p->nItemsNext = 0x7FFFFFFF;
-    }
-    else
-    {
-        p->posCur += 7;
-        p->nItemsNext = (int)((7.0+p->posCur)*p->nItemsTotal/p->posTotal);
-    }
-    Bar_ProgressShow( p, pString );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the progress bar.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bar_ProgressStop( Bar_Progress_t * p )
-{
-    if ( p == NULL ) return;
-    Bar_ProgressClean( p );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints the progress bar of the given size.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bar_ProgressShow( Bar_Progress_t * p, char * pString )
-{
-    int i;
-    if ( p == NULL ) return;
-    if ( pString )
-        fprintf( p->pFile, "%s ", pString );
-    for ( i = (pString? strlen(pString) + 1 : 0); i < p->posCur; i++ )
-        fprintf( p->pFile, "-" );
-    if ( i == p->posCur )
-        fprintf( p->pFile, ">" );
-    for ( i++  ; i <= p->posTotal; i++ )
-        fprintf( p->pFile, " " );
-    fprintf( p->pFile, "\r" );
-    fflush( stdout );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Cleans the progress bar before quitting.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bar_ProgressClean( Bar_Progress_t * p )
-{
-    int i;
-    if ( p == NULL ) return;
-    for ( i = 0; i <= p->posTotal; i++ )
-        fprintf( p->pFile, " " );
-    fprintf( p->pFile, "\r" );
-    fflush( stdout );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/bar/bar.h b/src/aig/bar/bar.h
deleted file mode 100644
index 65c9ec6a..00000000
--- a/src/aig/bar/bar.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bar.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Progress bar.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: bar.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __BAR_H__
-#define __BAR_H__
-
-
-#ifdef _WIN32
-#define inline __inline // compatible with MS VS 6.0
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-#define BAR_PROGRESS_USE   1
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
- 
-typedef struct Bar_Progress_t_ Bar_Progress_t;
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== bar.c ==========================================================*/
-extern Bar_Progress_t *  Bar_ProgressStart( FILE * pFile, int nItemsTotal );
-extern void              Bar_ProgressStop( Bar_Progress_t * p );
-extern void              Bar_ProgressUpdate_int( Bar_Progress_t * p, int nItemsCur, char * pString );
-
-static inline void       Bar_ProgressUpdate( Bar_Progress_t * p, int nItemsCur, char * pString ) {  
-    if ( BAR_PROGRESS_USE && p && (nItemsCur < *((int*)p)) ) return; Bar_ProgressUpdate_int(p, nItemsCur, pString); }
-
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/bar/module.make b/src/aig/bar/module.make
deleted file mode 100644
index 26161ba1..00000000
--- a/src/aig/bar/module.make
+++ /dev/null
@@ -1 +0,0 @@
-SRC +=    src/aig/bar/bar.c 
diff --git a/src/aig/bbl/bblif.c b/src/aig/bbl/bblif.c
deleted file mode 100644
index e68258d9..00000000
--- a/src/aig/bbl/bblif.c
+++ /dev/null
@@ -1,1518 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bblif.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Binary BLIF representation for logic networks.]
-
-  Synopsis    [Main implementation module.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - February 28, 2009.]
-
-  Revision    [$Id: bblif.c,v 1.00 2009/02/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-#include <time.h>
-
-#include "abc_global.h"
-#include "bblif.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// vector of integers
-typedef struct Vec_Int_t_ Vec_Int_t;
-struct Vec_Int_t_ 
-{
-    int         nCap;
-    int         nSize;
-    int *       pArray;
-};
-
-// vector of characters
-typedef struct Vec_Str_t_ Vec_Str_t;
-struct Vec_Str_t_ 
-{
-    int         nCap;
-    int         nSize;
-    char *      pArray;
-};
-
-// network object
-struct Bbl_Obj_t_
-{
-    int         Id;              // user ID
-    int         Fnc;             // functionality
-    unsigned    fCi     :  1;    // combinational input
-    unsigned    fCo     :  1;    // combinational output
-    unsigned    fBox    :  1;    // subcircuit
-    unsigned    fMark   :  1;    // temporary mark
-    unsigned    nFanins : 28;    // fanin number
-    int         pFanins[0];      // fanin array
-};
-
-// object function
-typedef struct Bbl_Fnc_t_ Bbl_Fnc_t;
-struct Bbl_Fnc_t_
-{
-    int         nWords;          // word number
-    int         pWords[0];       // word array
-};
-
-// object function
-typedef struct Bbl_Ent_t_ Bbl_Ent_t;
-struct Bbl_Ent_t_
-{
-    int         iFunc;           // function handle
-    int         iNext;           // next entry handle
-};
-
-// data manager
-struct Bbl_Man_t_
-{
-    // data pool
-    Vec_Str_t * pName;           // design name
-    Vec_Str_t * pObjs;           // vector of objects
-    Vec_Str_t * pFncs;           // vector of functions
-    // construction
-    Vec_Int_t * vId2Obj;         // mapping user IDs into objects
-    Vec_Int_t * vObj2Id;         // mapping objects into user IDs
-    Vec_Int_t * vFaninNums;      // mapping user IDs into fanin number
-    // file contents
-    int         nFileSize;       // file size
-    char *      pFileData;       // file contents
-    // other data
-    Vec_Str_t * pEnts;           // vector of entries
-    int         SopMap[17][17];  // mapping vars x cubes into entry handles
-};
-
-static inline int         Bbl_ObjIsCi( Bbl_Obj_t * pObj )          { return pObj->fCi;                                        } 
-static inline int         Bbl_ObjIsCo( Bbl_Obj_t * pObj )          { return pObj->fCo;                                        } 
-static inline int         Bbl_ObjIsNode( Bbl_Obj_t * pObj )        { return!pObj->fCi && !pObj->fCo;                          } 
-
-static inline int         Bbl_ObjFaninNum( Bbl_Obj_t * pObj )      { return pObj->nFanins;                                    } 
-static inline Bbl_Obj_t * Bbl_ObjFanin( Bbl_Obj_t * pObj, int i )  { return (Bbl_Obj_t *)(((char *)pObj) - pObj->pFanins[i]); } 
-
-static inline int         Bbl_ObjSize( Bbl_Obj_t * pObj )          { return sizeof(Bbl_Obj_t) + sizeof(int) * pObj->nFanins;  } 
-static inline int         Bbl_FncSize( Bbl_Fnc_t * pFnc )          { return sizeof(Bbl_Fnc_t) + sizeof(int) * pFnc->nWords;   } 
-
-static inline Bbl_Obj_t * Bbl_VecObj( Vec_Str_t * p, int h )       { return (Bbl_Obj_t *)(p->pArray + h);                     } 
-static inline Bbl_Fnc_t * Bbl_VecFnc( Vec_Str_t * p, int h )       { return (Bbl_Fnc_t *)(p->pArray + h);                     } 
-static inline Bbl_Ent_t * Bbl_VecEnt( Vec_Str_t * p, int h )       { return (Bbl_Ent_t *)(p->pArray + h);                     } 
-
-static inline char *      Bbl_ManSop( Bbl_Man_t * p, int h )       { return (char *)Bbl_VecFnc(p->pFncs, h)->pWords;          } 
-static inline Bbl_Obj_t * Bbl_ManObj( Bbl_Man_t * p, int Id )      { return Bbl_VecObj(p->pObjs, p->vId2Obj->pArray[Id]);     } 
-
-#define Bbl_ManForEachObj_int( p, pObj, h )                \
-    for ( h = 0; (h < p->nSize) && (pObj = Bbl_VecObj(p,h)); h += Bbl_ObjSize(pObj) )
-#define Bbl_ManForEachFnc_int( p, pObj, h )                \
-    for ( h = 0; (h < p->nSize) && (pObj = Bbl_VecFnc(p,h)); h += Bbl_FncSize(pObj) )
-#define Bbl_ObjForEachFanin_int( pObj, pFanin, i )         \
-    for ( i = 0; (i < (int)pObj->nFanins) && (pFanin = Bbl_ObjFanin(pObj,i)); i++ )
-
-#define BBLIF_ALLOC(type, num)     ((type *) malloc(sizeof(type) * (num)))
-#define BBLIF_CALLOC(type, num)     ((type *) calloc((num), sizeof(type)))
-#define BBLIF_FALLOC(type, num)     ((type *) memset(malloc(sizeof(type) * (num)), 0xff, sizeof(type) * (num)))
-#define BBLIF_FREE(obj)             ((obj) ? (free((char *) (obj)), (obj) = 0) : 0)
-#define BBLIF_REALLOC(type, obj, num)    \
-        ((obj) ? ((type *) realloc((char *)(obj), sizeof(type) * (num))) : \
-         ((type *) malloc(sizeof(type) * (num))))
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates a vector with the given capacity.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Vec_Int_t * Vec_IntAlloc( int nCap )
-{
-    Vec_Int_t * p;
-    p = BBLIF_ALLOC( Vec_Int_t, 1 );
-    if ( nCap > 0 && nCap < 16 )
-        nCap = 16;
-    p->nSize  = 0;
-    p->nCap   = nCap;
-    p->pArray = p->nCap? BBLIF_ALLOC( int, p->nCap ) : NULL;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates a vector with the given size and cleans it.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Vec_Int_t * Vec_IntStart( int nSize )
-{
-    Vec_Int_t * p;
-    p = Vec_IntAlloc( nSize );
-    p->nSize = nSize;
-    memset( p->pArray, 0, sizeof(int) * nSize );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates a vector with the given size and cleans it.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Vec_Int_t * Vec_IntStartNatural( int nSize )
-{
-    Vec_Int_t * p;
-    int i;
-    p = Vec_IntAlloc( nSize );
-    p->nSize = nSize;
-    for ( i = 0; i < nSize; i++ )
-        p->pArray[i] = i;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the vector from an integer array of the given size.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Vec_Int_t * Vec_IntAllocArray( int * pArray, int nSize )
-{
-    Vec_Int_t * p;
-    p = BBLIF_ALLOC( Vec_Int_t, 1 );
-    p->nSize  = nSize;
-    p->nCap   = nSize;
-    p->pArray = pArray;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Vec_IntFree( Vec_Int_t * p )
-{
-    BBLIF_FREE( p->pArray );
-    BBLIF_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Vec_IntSize( Vec_Int_t * p )
-{
-    return p->nSize;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Vec_IntEntry( Vec_Int_t * p, int i )
-{
-    assert( i >= 0 && i < p->nSize );
-    return p->pArray[i];
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Vec_IntWriteEntry( Vec_Int_t * p, int i, int Entry )
-{
-    assert( i >= 0 && i < p->nSize );
-    p->pArray[i] = Entry;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Vec_IntAddToEntry( Vec_Int_t * p, int i, int Addition )
-{
-    assert( i >= 0 && i < p->nSize );
-    p->pArray[i] += Addition;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Vec_IntEntryLast( Vec_Int_t * p )
-{
-    assert( p->nSize > 0 );
-    return p->pArray[p->nSize-1];
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resizes the vector to the given capacity.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Vec_IntGrow( Vec_Int_t * p, int nCapMin )
-{
-    if ( p->nCap >= nCapMin )
-        return;
-    p->pArray = BBLIF_REALLOC( int, p->pArray, nCapMin ); 
-    assert( p->pArray );
-    p->nCap   = nCapMin;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Fills the vector with given number of entries.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Vec_IntFill( Vec_Int_t * p, int nSize, int Fill )
-{
-    int i;
-    Vec_IntGrow( p, nSize );
-    for ( i = 0; i < nSize; i++ )
-        p->pArray[i] = Fill;
-    p->nSize = nSize;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Fills the vector with given number of entries.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Vec_IntFillExtra( Vec_Int_t * p, int nSize, int Fill )
-{
-    int i;
-    if ( p->nSize >= nSize )
-        return;
-    if ( nSize > 2 * p->nCap )
-        Vec_IntGrow( p, nSize );
-    else if ( nSize > p->nCap )
-        Vec_IntGrow( p, 2 * p->nCap );
-    for ( i = p->nSize; i < nSize; i++ )
-        p->pArray[i] = Fill;
-    p->nSize = nSize;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the entry even if the place not exist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Vec_IntGetEntry( Vec_Int_t * p, int i )
-{
-    Vec_IntFillExtra( p, i + 1, 0 );
-    return Vec_IntEntry( p, i );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts the entry even if the place does not exist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Vec_IntSetEntry( Vec_Int_t * p, int i, int Entry )
-{
-    Vec_IntFillExtra( p, i + 1, 0 );
-    Vec_IntWriteEntry( p, i, Entry );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Vec_IntShrink( Vec_Int_t * p, int nSizeNew )
-{
-    assert( p->nSize >= nSizeNew );
-    p->nSize = nSizeNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Vec_IntClear( Vec_Int_t * p )
-{
-    p->nSize = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Vec_IntPush( Vec_Int_t * p, int Entry )
-{
-    if ( p->nSize == p->nCap )
-    {
-        if ( p->nCap < 16 )
-            Vec_IntGrow( p, 16 );
-        else
-            Vec_IntGrow( p, 2 * p->nCap );
-    }
-    p->pArray[p->nSize++] = Entry;
-}
-
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates a vector with the given capacity.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Vec_Str_t * Vec_StrAlloc( int nCap )
-{
-    Vec_Str_t * p;
-    p = BBLIF_ALLOC( Vec_Str_t, 1 );
-    if ( nCap > 0 && nCap < 16 )
-        nCap = 16;
-    p->nSize  = 0;
-    p->nCap   = nCap;
-    p->pArray = p->nCap? BBLIF_ALLOC( char, p->nCap ) : NULL;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the vector from an array of the given size.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Vec_Str_t * Vec_StrAllocArray( char * pArray, int nSize )
-{
-    Vec_Str_t * p;
-    p = BBLIF_ALLOC( Vec_Str_t, 1 );
-    p->nSize  = nSize;
-    p->nCap   = nSize;
-    p->pArray = pArray;
-    return p;
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Returns a piece of memory.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Vec_StrFetch( Vec_Str_t * p, int nBytes )
-{
-    while ( p->nSize + nBytes > p->nCap )
-    {
-        p->pArray = BBLIF_REALLOC( char, p->pArray, 3 * p->nCap );
-        p->nCap *= 3;
-    }
-    p->nSize += nBytes;
-    return p->pArray + p->nSize - nBytes;
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Write vector into file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Vec_StrWrite( FILE * pFile, Vec_Str_t * p )
-{
-    fwrite( &p->nSize, sizeof(int), 1, pFile );
-    fwrite( p->pArray, sizeof(char), p->nSize, pFile );
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Write vector into file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Str_t * Vec_StrRead( char ** ppStr )
-{
-    Vec_Str_t * p;
-    char * pStr = *ppStr;
-    p = Vec_StrAlloc( 0 );
-    p->nSize = *(int *)pStr;
-    p->pArray = pStr + sizeof(int);
-    *ppStr = pStr + sizeof(int) + p->nSize * sizeof(char);
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Vec_StrSize( Vec_Str_t * p )
-{
-    return p->nSize;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Vec_StrFree( Vec_Str_t * p )
-{
-    BBLIF_FREE( p->pArray );
-    BBLIF_FREE( p );
-}
-
-
-
-
-
-/**Fnction*************************************************************
-
-  Synopsis    [Returns the file size.]
-
-  Description [The file should be closed.]
-
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bbl_ManFileSize( char * pFileName )
-{
-    FILE * pFile;
-    int nFileSize;
-    pFile = fopen( pFileName, "r" );
-    if ( pFile == NULL )
-    {
-        printf( "Bbl_ManFileSize(): The file is unavailable (absent or open).\n" );
-        return 0;
-    }
-    fseek( pFile, 0, SEEK_END );  
-    nFileSize = ftell( pFile ); 
-    fclose( pFile );
-    return nFileSize;
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Read data from file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Bbl_ManFileRead( char * pFileName )
-{
-    FILE * pFile;
-    char * pContents;
-    int nFileSize;
-    nFileSize = Bbl_ManFileSize( pFileName );
-    pFile = fopen( pFileName, "rb" );
-    pContents = BBLIF_ALLOC( char, nFileSize );
-    fread( pContents, nFileSize, 1, pFile );
-    fclose( pFile );
-    return pContents;
-}
-
-
-
-/**Fnction*************************************************************
-
-  Synopsis    [Writes data into file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbl_ManDumpBinaryBlif( Bbl_Man_t * p, char * pFileName )
-{
-    FILE * pFile;
-    pFile = fopen( pFileName, "wb" );
-    Vec_StrWrite( pFile, p->pName );
-    Vec_StrWrite( pFile, p->pObjs );
-    Vec_StrWrite( pFile, p->pFncs );
-    fclose( pFile );
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Creates manager after reading.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bbl_Man_t * Bbl_ManReadBinaryBlif( char * pFileName )
-{
-    Bbl_Man_t * p;
-    Bbl_Obj_t * pObj;
-    char * pBuffer;
-    int h;
-    p = BBLIF_ALLOC( Bbl_Man_t, 1 );
-    memset( p, 0, sizeof(Bbl_Man_t) );
-    p->nFileSize = Bbl_ManFileSize( pFileName );
-    p->pFileData = Bbl_ManFileRead( pFileName );
-    // extract three managers
-    pBuffer = p->pFileData;
-    p->pName = Vec_StrRead( &pBuffer );
-    p->pObjs = Vec_StrRead( &pBuffer );
-    p->pFncs = Vec_StrRead( &pBuffer );
-    assert( pBuffer - p->pFileData == p->nFileSize );
-    // remember original IDs in the objects
-    p->vObj2Id = Vec_IntAlloc( 1000 );
-    Bbl_ManForEachObj_int( p->pObjs, pObj, h )
-    {
-        Vec_IntPush( p->vObj2Id, pObj->Id );
-        pObj->Id = Vec_IntSize(p->vObj2Id) - 1; 
-    }
-    return p;
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Prints stats of the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbl_ManPrintStats( Bbl_Man_t * p )
-{
-    Bbl_Obj_t * pObj;
-    Bbl_Fnc_t * pFnc;
-    int h, nFuncs = 0, nNodes = 0, nObjs = 0;
-    Bbl_ManForEachObj_int( p->pObjs, pObj, h )
-        nObjs++, nNodes += Bbl_ObjIsNode(pObj);
-    Bbl_ManForEachFnc_int( p->pFncs, pFnc, h )
-        nFuncs++;
-    printf( "Total objects = %7d.  Total nodes = %7d. Unique functions = %7d.\n", nObjs, nNodes, nFuncs );
-    printf( "Name manager = %5.2f Mb\n", 1.0*Vec_StrSize(p->pName)/(1 << 20) );
-    printf( "Objs manager = %5.2f Mb\n", 1.0*Vec_StrSize(p->pObjs)/(1 << 20) );
-    printf( "Fncs manager = %5.2f Mb\n", 1.0*Vec_StrSize(p->pFncs)/(1 << 20) );
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Deletes the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbl_ManStop( Bbl_Man_t * p )
-{
-    if ( p->vId2Obj )    Vec_IntFree( p->vId2Obj );
-    if ( p->vObj2Id )    Vec_IntFree( p->vObj2Id );
-    if ( p->vFaninNums ) Vec_IntFree( p->vFaninNums );
-    if ( p->pFileData )
-    {
-        BBLIF_FREE( p->pFileData );
-        p->pName->pArray = NULL;
-        p->pObjs->pArray = NULL;
-        p->pFncs->pArray = NULL;
-    }
-    if ( p->pEnts )
-    Vec_StrFree( p->pEnts );
-    Vec_StrFree( p->pName );
-    Vec_StrFree( p->pObjs );
-    Vec_StrFree( p->pFncs );
-    BBLIF_FREE( p );
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Creates manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bbl_Man_t * Bbl_ManStart( char * pName )
-{
-    Bbl_Man_t * p;
-    int nLength;
-    p = BBLIF_ALLOC( Bbl_Man_t, 1 );
-    memset( p, 0, sizeof(Bbl_Man_t) );
-    nLength = pName? 4 * ((strlen(pName) + 1) / 4 + 1) : 0;
-    p->pName  = Vec_StrAlloc( nLength );
-    p->pName->nSize = p->pName->nCap;
-    if ( pName )
-        strcpy( p->pName->pArray, pName );
-    p->pObjs = Vec_StrAlloc( 1 << 16 );
-    p->pFncs = Vec_StrAlloc( 1 << 16 );
-    p->pEnts = Vec_StrAlloc( 1 << 16 ); p->pEnts->nSize = 1;
-    p->vId2Obj = Vec_IntStart( 1 << 10 );
-    p->vFaninNums = Vec_IntStart( 1 << 10 );
-    return p;
-}
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs selection sort on the array of cubes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbl_ManSortCubes( char ** pCubes, int nCubes, int nVars )
-{
-    char * pTemp;
-    int i, j, best_i;
-    for ( i = 0; i < nCubes-1; i++ )
-    {
-        best_i = i;
-        for (j = i+1; j < nCubes; j++)
-            if ( memcmp( pCubes[j], pCubes[best_i], nVars ) < 0 )
-                best_i = j;
-        pTemp = pCubes[i]; pCubes[i] = pCubes[best_i]; pCubes[best_i] = pTemp;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sorts the cubes in the SOP to uniqify them to some extent.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Bbl_ManSortSop( char * pSop, int nVars )
-{
-    char ** pCubes, * pSopNew;
-    int c, Length, nCubes;
-    Length = strlen(pSop);
-    assert( Length % (nVars + 3) == 0 );
-    nCubes = Length / (nVars + 3);
-    if ( nCubes < 2 )
-    {
-        pSopNew = BBLIF_ALLOC( char, Length + 1 );
-        memcpy( pSopNew, pSop, Length + 1 );
-        return pSopNew;
-    }
-    pCubes = BBLIF_ALLOC( char *, nCubes );
-    for ( c = 0; c < nCubes; c++ )
-        pCubes[c] = pSop + c * (nVars + 3);
-    if ( nCubes < 300 )
-        Bbl_ManSortCubes( pCubes, nCubes, nVars );
-    pSopNew = BBLIF_ALLOC( char, Length + 1 );
-    for ( c = 0; c < nCubes; c++ )
-        memcpy( pSopNew + c * (nVars + 3), pCubes[c], nVars + 3 );
-    BBLIF_FREE( pCubes );
-    pSopNew[nCubes * (nVars + 3)] = 0;
-    return pSopNew;
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Saves one entry.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bbl_ManCreateEntry( Bbl_Man_t * p, int iFunc, int iNext )
-{
-    Bbl_Ent_t * pEnt;
-    pEnt = (Bbl_Ent_t *)Vec_StrFetch( p->pEnts, 2 * sizeof(int) );
-    pEnt->iFunc = iFunc;
-    pEnt->iNext = iNext;
-    return (char *)pEnt - p->pEnts->pArray;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sorts the cubes in the SOP to uniqify them to some extent.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bbl_ManSopCheckUnique( Bbl_Man_t * p, char * pSop, int nVars, int nCubes, int iFunc )
-{
-    Bbl_Fnc_t * pFnc;
-    Bbl_Ent_t * pEnt;
-    int h, Length = strlen(pSop) + 1;
-    int nWords = (Length / 4 + (Length % 4 > 0));
-    if ( nVars > 16 )   nVars = 16;
-    if ( nCubes > 16 )  nCubes = 16;
-//    if ( nVars == 16 && nCubes == 16 )
-//        return iFunc;
-    for ( h = p->SopMap[nVars][nCubes]; h; h = pEnt->iNext )
-    {
-        pEnt = Bbl_VecEnt( p->pEnts, h );
-        pFnc = Bbl_VecFnc( p->pFncs, pEnt->iFunc );
-        assert( nVars == 16 || nCubes == 16 || pFnc->nWords == nWords );
-        if ( pFnc->nWords == nWords && memcmp( pFnc->pWords, pSop, Length ) == 0 )
-            return pEnt->iFunc;
-    }
-    p->SopMap[nVars][nCubes] = Bbl_ManCreateEntry( p, iFunc, p->SopMap[nVars][nCubes] );
-    return iFunc;
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Saves one SOP.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bbl_ManSaveSop( Bbl_Man_t * p, char * pSop, int nVars )
-{
-    Bbl_Fnc_t * pFnc;
-    char * pSopNew;
-    int iFunc, Length = strlen(pSop) + 1;
-    int nWords = Length / 4 + (Length % 4 > 0);
-    // reorder cubes to semi-canicize SOPs
-    pSopNew = Bbl_ManSortSop( pSop, nVars );
-    // get the candidate location
-    iFunc = Bbl_ManSopCheckUnique( p, pSopNew, nVars, Length / (nVars + 3), Vec_StrSize(p->pFncs) );
-//    iFunc = Vec_StrSize(p->pFncs);
-    if ( iFunc == Vec_StrSize(p->pFncs) )
-    { // store this SOP
-        pFnc = (Bbl_Fnc_t *)Vec_StrFetch( p->pFncs, sizeof(Bbl_Fnc_t) + nWords * sizeof(int) );
-        pFnc->pWords[nWords-1] = 0;
-        pFnc->nWords = nWords;
-        strcpy( (char *)pFnc->pWords, pSopNew );
-        assert( iFunc == (char *)pFnc - p->pFncs->pArray );
-    }
-    BBLIF_FREE( pSopNew );
-    return iFunc;
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Adds one object.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbl_ManCreateObject( Bbl_Man_t * p, Bbl_Type_t Type, int ObjId, int nFanins, char * pSop )
-{
-    Bbl_Obj_t * pObj;
-    if ( Type == BBL_OBJ_CI && nFanins != 0 )
-    {
-        printf( "Attempting to create a combinational input with %d fanins (should be 0).\n", nFanins );
-        return;
-    }
-    if ( Type == BBL_OBJ_CO && nFanins != 1 )
-    {
-        printf( "Attempting to create a combinational output with %d fanins (should be 1).\n", nFanins );
-        return;
-    }
-    pObj = (Bbl_Obj_t *)Vec_StrFetch( p->pObjs, sizeof(Bbl_Obj_t) + nFanins * sizeof(int) );
-    memset( pObj, 0, sizeof(Bbl_Obj_t) );
-    Vec_IntSetEntry( p->vId2Obj, ObjId, (char *)pObj - p->pObjs->pArray );
-    Vec_IntSetEntry( p->vFaninNums, ObjId, 0 );
-    pObj->fCi = (Type == BBL_OBJ_CI);
-    pObj->fCo = (Type == BBL_OBJ_CO);
-    pObj->Id  = ObjId;
-    pObj->Fnc = pSop? Bbl_ManSaveSop(p, pSop, nFanins) : -1;
-    pObj->nFanins = nFanins;
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Creates fanin/fanout relationship between two objects.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbl_ManAddFanin( Bbl_Man_t * p, int ObjId, int FaninId )
-{
-    Bbl_Obj_t * pObj, * pFanin;
-    int iFanin;
-    pObj   = Bbl_ManObj( p, ObjId );
-    if ( Bbl_ObjIsCi(pObj) )
-    {
-        printf( "Bbl_ManAddFanin(): Cannot add fanin of the combinational input (Id = %d).\n", ObjId );
-        return;
-    }
-    pFanin = Bbl_ManObj( p, FaninId );
-    if ( Bbl_ObjIsCo(pFanin) )
-    {
-        printf( "Bbl_ManAddFanin(): Cannot add fanout of the combinational output (Id = %d).\n", FaninId );
-        return;
-    }
-    iFanin = Vec_IntEntry( p->vFaninNums, ObjId );
-    if ( iFanin >= (int)pObj->nFanins )
-    {
-        printf( "Bbl_ManAddFanin(): Trying to add more fanins to object (Id = %d) than declared (%d).\n", ObjId, pObj->nFanins );
-        return;
-    }
-    assert( iFanin < (int)pObj->nFanins );
-    Vec_IntWriteEntry( p->vFaninNums, ObjId, iFanin+1 );
-    pObj->pFanins[iFanin] = (char *)pObj - (char *)pFanin;
-}
-
-
-/**Fnction*************************************************************
-
-  Synopsis    [Returns 1 if the manager was created correctly.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bbl_ManCheck( Bbl_Man_t * p )
-{
-    Bbl_Obj_t * pObj;
-    int h, RetValue = 1;
-    Bbl_ManForEachObj_int( p->pObjs, pObj, h )
-    {
-        if ( Bbl_ObjIsNode(pObj) && pObj->Fnc == -1 )
-            RetValue = 0, printf( "Bbl_ManCheck(): Node %d does not have function specified.\n", pObj->Id );
-        if ( Bbl_ObjIsCi(pObj) && pObj->Fnc != -1 )
-            RetValue = 0, printf( "Bbl_ManCheck(): CI with %d has function specified.\n", pObj->Id );
-        if ( Bbl_ObjIsCo(pObj) && pObj->Fnc != -1 )
-            RetValue = 0, printf( "Bbl_ManCheck(): CO with %d has function specified.\n", pObj->Id );
-        if ( Vec_IntEntry(p->vFaninNums, pObj->Id) != (int)pObj->nFanins )
-            RetValue = 0, printf( "Bbl_ManCheck(): Object %d has less fanins (%d) than declared (%d).\n", 
-                pObj->Id, Vec_IntEntry(p->vFaninNums, pObj->Id), pObj->nFanins );
-    }
-    return RetValue;
-}
-
-
-/**Fnction*************************************************************
-
-  Synopsis    [Misc APIs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int         Bbl_ObjIsInput( Bbl_Obj_t * p )                      { return Bbl_ObjIsCi(p);                      }
-int         Bbl_ObjIsOutput( Bbl_Obj_t * p )                     { return Bbl_ObjIsCo(p);                      }
-int         Bbl_ObjIsLut( Bbl_Obj_t * p )                        { return Bbl_ObjIsNode(p);                    }
-int         Bbl_ObjId( Bbl_Obj_t * p )                           { return p->Id;                               }
-int         Bbl_ObjIdOriginal( Bbl_Man_t * pMan, Bbl_Obj_t * p ) { assert(0); return Vec_IntEntry(pMan->vObj2Id, p->Id);  }
-int         Bbl_ObjFaninNumber( Bbl_Obj_t * p )                  { return Bbl_ObjFaninNum(p);                  }
-char *      Bbl_ObjSop( Bbl_Man_t * pMan, Bbl_Obj_t * p )        { return Bbl_ManSop(pMan, p->Fnc);            }
-int         Bbl_ObjIsMarked( Bbl_Obj_t * p )                     { return p->fMark;                            }
-void        Bbl_ObjMark( Bbl_Obj_t * p )                         { p->fMark = 1;                               }
-int         Bbl_ObjFncHandle( Bbl_Obj_t * p )                    { return p->Fnc;                              }
-
-/**Fnction*************************************************************
-
-  Synopsis    [Returns the name of the design.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Bbl_ManName( Bbl_Man_t * p )
-{
-    return p->pName->pArray;
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Returns the maximum handle of the SOP.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bbl_ManFncSize( Bbl_Man_t * p )
-{
-    return p->pFncs->nSize;
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Returns the first object.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bbl_Obj_t * Bbl_ManObjFirst( Bbl_Man_t * p )
-{
-    return Bbl_VecObj( p->pObjs, 0 );
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Returns the next object.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bbl_Obj_t * Bbl_ManObjNext( Bbl_Man_t * p, Bbl_Obj_t * pObj )
-{
-    char * pNext = (char *)pObj + Bbl_ObjSize(pObj);
-    char * pEdge = p->pObjs->pArray + p->pObjs->nSize;
-    return (Bbl_Obj_t *)(pNext < pEdge ? pNext : NULL);
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Returns the first fanin.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bbl_Obj_t * Bbl_ObjFaninFirst( Bbl_Obj_t * p )
-{
-    return Bbl_ObjFaninNum(p) ? Bbl_ObjFanin( p, 0 ) : NULL;
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Returns the next fanin.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bbl_Obj_t * Bbl_ObjFaninNext( Bbl_Obj_t * p, Bbl_Obj_t * pPrev )
-{
-    Bbl_Obj_t * pFanin;
-    int i;
-    Bbl_ObjForEachFanin_int( p, pFanin, i )
-        if ( pFanin == pPrev )
-            break;
-    return i < Bbl_ObjFaninNum(p) - 1 ? Bbl_ObjFanin( p, i+1 ) : NULL;
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Drives text BLIF file for debugging.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbl_ManDumpBlif( Bbl_Man_t * p, char * pFileName )
-{
-    FILE * pFile;
-    Bbl_Obj_t * pObj, * pFanin;
-    pFile = fopen( pFileName, "w" );
-    fprintf( pFile, "# Test file written by Bbl_ManDumpBlif() in ABC.\n" );
-    fprintf( pFile, ".model %s\n", Bbl_ManName(p) );
-    // write objects
-    Bbl_ManForEachObj( p, pObj )
-    {
-        if ( Bbl_ObjIsInput(pObj) )
-            fprintf( pFile, ".inputs %d\n", Bbl_ObjId(pObj) );
-        else if ( Bbl_ObjIsOutput(pObj) )
-            fprintf( pFile, ".outputs %d\n", Bbl_ObjId(pObj) );
-        else if ( Bbl_ObjIsLut(pObj) )
-        {
-            fprintf( pFile, ".names" );
-            Bbl_ObjForEachFanin( pObj, pFanin )
-                fprintf( pFile, " %d", Bbl_ObjId(pFanin) );
-            fprintf( pFile, " %d\n", Bbl_ObjId(pObj) );
-            fprintf( pFile, "%s", Bbl_ObjSop(p, pObj) );
-        }
-        else assert( 0 );
-    }
-    // write output drivers
-    Bbl_ManForEachObj( p, pObj )
-    {
-        if ( !Bbl_ObjIsOutput(pObj) )
-            continue;
-        fprintf( pFile, ".names" );
-        Bbl_ObjForEachFanin( pObj, pFanin )
-            fprintf( pFile, " %d", Bbl_ObjId(pFanin) );
-        fprintf( pFile, " %d\n", Bbl_ObjId(pObj) );
-        fprintf( pFile, "1 1\n" );
-    }
-    fprintf( pFile, ".end\n" );
-    fclose( pFile );
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Converting truth table into an SOP.]
-
-  Description [The truth table is given as a bit-string pTruth
-  composed of 2^nVars bits. The result is an SOP derived by
-  collecting minterms appearing in the truth table. The SOP is 
-  represented as a C-string, as documented in file "bblif.h".
-  It is recommended to limit the use of this procedure to Boolean 
-  functions up to 6 inputs.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Bbl_ManTruthToSop( unsigned * pTruth, int nVars )
-{
-    char * pResult, * pTemp;
-    int nMints, nOnes, b, v;
-    assert( nVars >= 0 && nVars <= 16 );
-    nMints = (1 << nVars);
-    // count the number of ones
-    nOnes = 0;
-    for ( b = 0; b < nMints; b++ )
-        nOnes += ((pTruth[b>>5] >> (b&31)) & 1);
-    // handle constants
-    if ( nOnes == 0 || nOnes == nMints )
-    {
-        pResult = pTemp = BBLIF_ALLOC( char, nVars + 4 );        
-        for ( v = 0; v < nVars; v++ )
-            *pTemp++ = '-';
-        *pTemp++ = ' ';
-        *pTemp++ = nOnes? '1' : '0';
-        *pTemp++ = '\n';
-        *pTemp++ = 0;
-        assert( pTemp - pResult == nVars + 4 );
-        return pResult;
-    }
-    pResult = pTemp = BBLIF_ALLOC( char, nOnes * (nVars + 3) + 1 );        
-    for ( b = 0; b < nMints; b++ )
-    {
-        if ( ((pTruth[b>>5] >> (b&31)) & 1) == 0 )
-            continue;
-        for ( v = 0; v < nVars; v++ )
-            *pTemp++ = ((b >> v) & 1)? '1' : '0';
-        *pTemp++ = ' ';
-        *pTemp++ = '1';
-        *pTemp++ = '\n';
-    }
-    *pTemp++ = 0;
-    assert( pTemp - pResult == nOnes * (nVars + 3) + 1 );
-    return pResult;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates the array of truth tables for the given number of vars.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Bbl_ManSopToTruthElem( int nVars, unsigned ** pVars )
-{
-    unsigned Masks[5] = { 0xAAAAAAAA, 0xCCCCCCCC, 0xF0F0F0F0, 0xFF00FF00, 0xFFFF0000 };
-    int i, k, nWords;
-    nWords = (nVars <= 5 ? 1 : (1 << (nVars - 5)));
-    for ( i = 0; i < nVars; i++ )
-    {
-        if ( i < 5 )
-        {
-            for ( k = 0; k < nWords; k++ )
-                pVars[i][k] = Masks[i];
-        }
-        else
-        {
-            for ( k = 0; k < nWords; k++ )
-                if ( k & (1 << (i-5)) )
-                    pVars[i][k] = ~(unsigned)0;
-                else
-                    pVars[i][k] = 0;
-        }
-    }
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Converting SOP into a truth table.]
-
-  Description [The SOP is represented as a C-string, as documented in 
-  file "bblif.h". The truth table is returned as a bit-string composed 
-  of 2^nVars bits. For functions of less than 6 variables, the full
-  machine word is returned. (The truth table looks as if the function
-  had 5 variables.) The use of this procedure should be limited to 
-  Boolean functions with no more than 16 inputs.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Bbl_ManSopToTruth( char * pSop, int nVars )
-{
-    unsigned * pTruth, * pCube, * pVars[16];
-    int nWords = nVars <= 5 ? 1 : (1 << (nVars - 5));
-    int v, c, w, nCubes, fCompl = 0;
-    if ( pSop == NULL )
-        return NULL;
-    if ( strlen(pSop) % (nVars + 3) != 0 )
-    {
-        printf( "Bbl_ManSopToTruth(): SOP is represented incorrectly.\n" );
-        return NULL;
-    }
-    // create storage for TTs of the result, elementary variables and the temp cube
-    pTruth   = BBLIF_ALLOC( unsigned, nWords );   
-    pVars[0] = BBLIF_ALLOC( unsigned, nWords * (nVars+1) );   
-    for ( v = 1; v < nVars; v++ )
-        pVars[v] = pVars[v-1] + nWords;
-    pCube = pVars[v-1] + nWords;
-    Bbl_ManSopToTruthElem( nVars, pVars );
-    // iterate through the cubes
-    memset( pTruth, 0, sizeof(unsigned) * nWords );
-    nCubes =  strlen(pSop) / (nVars + 3);
-    for ( c = 0; c < nCubes; c++ )
-    {
-        fCompl = (pSop[nVars+1] == '0');
-        memset( pCube, 0xff, sizeof(unsigned) * nWords );
-        // iterate through the literals of the cube
-        for ( v = 0; v < nVars; v++ )
-            if ( pSop[v] == '1' )
-                for ( w = 0; w < nWords; w++ )
-                    pCube[w] &= pVars[v][w];
-            else if ( pSop[v] == '0' )
-                for ( w = 0; w < nWords; w++ )
-                    pCube[w] &= ~pVars[v][w];
-        // add cube to storage
-        for ( w = 0; w < nWords; w++ )
-            pTruth[w] |= pCube[w];
-        // go to the next cube
-        pSop += (nVars + 3);
-    }
-    BBLIF_FREE( pVars[0] );
-    if ( fCompl )
-        for ( w = 0; w < nWords; w++ )
-            pTruth[w] = ~pTruth[w];
-    return pTruth;
-}
-
-
-/**Fnction*************************************************************
-
-  Synopsis    [Checks the truth table computation.]
-
-  Description [We construct the logic network for the half-adder represnted
-  using the BLIF file below]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbl_ManTestTruth( char * pSop, int nVars )
-{
-    unsigned * pTruth;
-    char * pSopNew;
-    pTruth = Bbl_ManSopToTruth( pSop, nVars );
-    pSopNew = Bbl_ManTruthToSop( pTruth, nVars );
-    printf( "Old SOP:\n%s\n", pSop );
-    printf( "New SOP:\n%s\n", pSopNew );
-    BBLIF_FREE( pSopNew );
-    BBLIF_FREE( pTruth );
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [This demo shows using the internal to construct a half-adder.]
-
-  Description [We construct the logic network for the half-adder represnted
-  using the BLIF file below]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbl_ManSimpleDemo()
-{
-/*
-    # There are contents of a BLIF file representing a half-adder:
-    .model hadder
-    .inputs a     // ID = 1
-    .inputs b     // ID = 2
-    .inputs cin   // ID = 3
-    .outputs s    // ID = 4
-    .outputs cout // ID = 5
-    .names a b cin s_driver   // ID = 6
-    100 1
-    010 1
-    001 1
-    111 1
-    .names a b cin cout_driver // ID = 7
-    -11 1
-    1-1 1
-    11- 1
-    .names s_driver s
-    1 1
-    .names cout_driver cout
-    1 1
-    .end
-*/
-    Bbl_Man_t * p;
-    // start the data manager
-    p = Bbl_ManStart( "hadder" );
-    // create CIs
-    Bbl_ManCreateObject( p, BBL_OBJ_CI, 1, 0, NULL ); // a
-    Bbl_ManCreateObject( p, BBL_OBJ_CI, 2, 0, NULL ); // b
-    Bbl_ManCreateObject( p, BBL_OBJ_CI, 3, 0, NULL ); // cin
-    // create COs
-    Bbl_ManCreateObject( p, BBL_OBJ_CO, 4, 1, NULL ); // s
-    Bbl_ManCreateObject( p, BBL_OBJ_CO, 5, 1, NULL ); // cout
-    // create internal nodes
-    Bbl_ManCreateObject( p, BBL_OBJ_NODE, 6, 3, "100 1\n010 1\n001 1\n111 1\n" ); // s_driver
-    Bbl_ManCreateObject( p, BBL_OBJ_NODE, 7, 3, "-11 1\n1-1 1\n11- 1\n" );        // cout_driver
-    // add fanins of node 6
-    Bbl_ManAddFanin( p, 6, 1 ); // s_driver <- a
-    Bbl_ManAddFanin( p, 6, 2 ); // s_driver <- b
-    Bbl_ManAddFanin( p, 6, 3 ); // s_driver <- cin
-    // add fanins of node 7
-    Bbl_ManAddFanin( p, 7, 1 ); // cout_driver <- a
-    Bbl_ManAddFanin( p, 7, 2 ); // cout_driver <- b
-    Bbl_ManAddFanin( p, 7, 3 ); // cout_driver <- cin
-    // add fanins of COs
-    Bbl_ManAddFanin( p, 4, 6 ); // s <- s_driver
-    Bbl_ManAddFanin( p, 5, 7 ); // cout <- cout_driver
-    // sanity check
-    Bbl_ManCheck( p );
-    // write BLIF file as a sanity check
-    Bbl_ManDumpBlif( p, "hadder.blif" );
-    // write binary BLIF file
-    Bbl_ManDumpBinaryBlif( p, "hadder.bblif" );
-    // remove the manager
-    Bbl_ManStop( p );
-
-
-//    Bbl_ManTestTruth( "100 1\n010 1\n001 1\n111 1\n", 3 );
-//    Bbl_ManTestTruth( "-11 0\n1-1 0\n11- 0\n", 3 );
-//    Bbl_ManTestTruth( "--- 1\n", 3 );
-}
-
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/bbl/bblif.h b/src/aig/bbl/bblif.h
deleted file mode 100644
index 787d649f..00000000
--- a/src/aig/bbl/bblif.h
+++ /dev/null
@@ -1,285 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bblif.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Binary BLIF representation for logic networks.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - February 28, 2009.]
-
-  Revision    [$Id: bblif.h,v 1.00 2009/02/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __BBLIF_H__
-#define __BBLIF_H__
-
-
-/*
-    This file (taken together with "bblif.c") implements a stand-alone 
-    interface between ABC and an application that uses ABC. 
-    
-    The interface is designed to pass a combinational logic network 
-    from the calling application to ABC using a binary BLIF format (BBLIF) 
-    and return the network after synthesis/mapping/verification in ABC 
-    back to the caller.
-
-    The interface can do the following:
-    (1) accept a combinational logic network via a set of APIs
-    (2) write the logic network into a binary BLIF file readable by ABC
-    (3) read a binary BLIF file with a mapped network produced by ABC
-    (4) return the mapped network to the caller through a set of APIs
-
-    It should be noted that the BBLIF interface can be used to pass
-    the network from the calling application into ABC without writing it
-    into a file. In this case, ABC should be compiled as a library and
-    linked to the calling application. The BBLIF manager can be given
-    directly to the procedure Bbl_ManToAbc() to convert it into an AIG.
-    Similarly, the resulting mapped network can be converted into
-    BBLIF manager and passed back after the call to Bbl_ManFromAbc().
-
-    Here these steps are described in more detail:
-
-    (1) The BBLIF manager is allocated by calling Bbl_ManStart() and 
-        deallocated by calling Bbl_ManStop(). 
-    
-        The combinational network is composed of three types of objects:
-        (a) combinational inputs (CIs), (b) combinational outputs (COs), 
-        (c) internal logic nodes represented using Sum-of-Products (SOPs)
-        similar to the way logic nodes are represented in SIS. Sequential 
-        elements (flops) are currently not supported.   A CI has no fanins. 
-        A CO has exactly one fanin and no fanouts. Internal nodes can 
-        have any number of fanins and fanouts. Only an internal node can 
-        have a logic function.
-
-        Before constructing the BBLIF manager, each object should be 
-        assigned a unique non-negative (0-based) integer ID. The sequence
-        of ID numbers may have gaps in it (for example, 0, 1, 2, 5, 6, etc)
-        but care should be taken that the ID numbers do not grow too large
-        because internally they are used to index the objects. So if 
-        the largest given ID has value N, an array of 4*N bytes will be 
-        allocated internally by the BBLIF manager. Obviously if N = 1M, 
-        the array will use 4Mb, but if N = 100M, it will use 0.4Gb.
-
-        This object ID (called also "the original ID of the object") is 
-        given to Bbl_ManCreateObject(), which construct the BBLIF objects 
-        and to the procedure Bbl_ManAddFanin(), which creates fanin/fanout
-        relations between two objects.  The exact number of fanins of an
-        object should be declared when calling Bbl_ManCreateObject(). 
-        Later on, each node should be assigned as many fanins using 
-        Bbl_ManAddFanin(). The order/number of fanins corresponds to the 
-        order/number of variables in the SOP of the logic function of the 
-        node. The declared and actual number of fanins should be the same.
-        otherwise the interface will not function correctly. This is checked
-        by the procedure Bbl_ManCheck(), which should be called when 
-        constructing all objects and their fanins is finished.
-
-        The SOP representation of the logic function should be given to
-        every internal node. It is given as a C-string, showing the SOP
-        as it would appear in a BLIF or PLA file. Each cube is composed
-        of characters '0', '1', and '-', and ended by a seqence of three
-        characters: space ' ', followed by '0' or '1' (depending on whether 
-        on- or off-set is used), followed by the new line character '\n'. 
-        For example, a two-input OR has the following SOP representation: 
-        "1- 1\n-1 1\n", or equivalently, "00 0\n". The SOP for a constant 
-        function with no fanins is represented as " 0\n" (constant 0) and
-        " 1\n" (constant 1). SOP for a constant node with some fanins
-        may also be represented. For example, constant 0 node with three 
-        fanins will have SOP representation as follows: "--- 0\n".
-
-        The objects can be added to the BBLIF manager in any order, but 
-        by the time the fanin/fanout connections are created, corresponding 
-        objects should be already created.
-
-        The number of objects is limited by 2^31. The number of fanins
-        of one object is restricted to 2^28. The SOP representation can 
-        have arbitrary many products (cubes), as long as memory is enough
-        to represent them in the C-string form, as described above.
-
-    (2) To write the manager into a file, call procedure Bbl_ManDumpBinaryBlif().
-        It is recommended to use files with extension ".bblif" because it
-        will allow ABC to call the approapriate reader in command "read".
-
-    (3) To read the network from file, call procedure Bbl_ManReadBinaryBlif().
-
-    (4) It is assumed that ABC will return the network after mapping.
-        This network will arrive in a BBLIF file, from which the BBLIF 
-        manager is created by the call to Bbl_ManReadBinaryBlif(). The 
-        following APIs are useful to extract the mapped network from the manager:
-        
-        Iterator Bbl_ManForEachObj() iterates through the pointers to the
-        BBLIF objects, which are guaranteed to be in a topological order. 
-
-        For each object, the following APIs can be used:
-        Bbl_ObjIsInput() returns 1 if the object is a CI
-        Bbl_ObjIsOutput() returns 1 if the object is a CO
-        Bbl_ObjIsLut() returns 1 if the object is a logic node (lookup table)
-        Bbl_ObjFaninNumber() returns the number of fanins of the node
-        Bbl_ObjSop() returns the SOP representation of the node, as described above.
-
-        A special attention should be given to the representation of object IDs
-        after mapping. Recall that when the outgoing BBLIF network is constructed, 
-        the IDs of objects are assigned by the calling application and given to 
-        the BBLIF manager when procedure Bbl_ManCreateObject() is called.  
-        We refer to these object IDs as "original IDs of the objects". 
-        
-        When the network has been given to ABC, mapped, and returned to the 
-        calling application in the incoming BBLIF file, only CIs and COs are 
-        guaranteed to preserve their "original IDs". Other objects may be created 
-        during synthesis/mapping. The original IDs of these objects are set to -1. 
-
-        The following two APIs are used to return the IDs of objects after mapping:
-        Bbl_ObjId() returns the new ID (useful to construct network after mapping)
-        Bbl_ObjIdOriginal() returns the original ID (or -1 if this is a new object).
-
-        !!!***!!!
-        Note: The original ID currently cannot be returned by Bbl_ObjIdOriginal().
-        It is recommended to use the work-around described below.
-        !!!***!!!
-
-        The original ID is useful to map CIs/COs after mapping into CIs/COs before
-        mapping. However, the order of CIs/COs after mapping in the incoming network 
-        is the same as the order of their creation by the calling application 
-        in the outgoing network. This allows for a workaround that does not have 
-        the need for the original IDs.  We can simply iterate through the objects 
-        after mapping, and create CIs and COs in the order of their appearance, 
-        and this order is guaranteed to be the same as the order of their 
-        construction by the calling application.
-
-        It is also worth noting that currently the internal node names are not 
-        preserved by ABC during synthesis. This may change in the future. and then 
-        some of the internal nodes will preserve their IDs, which may allow the 
-        calling application to reconstruct the names of some of the nodes after 
-        synthesis/mapping in ABC using their original IDs whenever available.
-
-        Finally, iterator Bbl_ObjForEachFanin() can be used to iterate through 
-        the fanins of each mapped object. For CIs, there will be no fanins. 
-        For COs, there will be exactly one fanin. For the internal nodes (LUTs)
-        the number of fanins is the number of inputs of these nodes.
-
-    A demo of using this interface is included at the bottom of file "bblif.c" in 
-    procedure Bbl_ManSimpleDemo(). Additional examples can be found in the files
-    "abc\src\base\io\ioReadBblif.c" and "abc\src\base\io\ioWriteBblif.c". These
-    files illustrate how an ABC network is created from the BBLIF data manager 
-    and how the data manager is created from the ABC network. 
-    
-    Note that only the files "bblif.h" and "bblif.c" are needed for interfacing
-    the user's application with ABC, while other files should not be compiled 
-    as part of the application code.
-
-    Finally, a warning regarding endianness. The interface may not work 
-    if the BBLIF file is produced on a machine whose engianness is different 
-    from the machine, which is reading this file.
-*/
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-#ifdef _WIN32
-#define inline __inline
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-// object types
-typedef enum { 
-    BBL_OBJ_NONE,                // 0: non-existent object
-    BBL_OBJ_CI,                  // 1: primary input
-    BBL_OBJ_CO,                  // 2: primary output
-    BBL_OBJ_NODE,                // 3: buffer node
-    BBL_OBJ_VOID                 // 4: unused object
-} Bbl_Type_t;
-
-// data manager
-typedef struct Bbl_Man_t_ Bbl_Man_t;
-
-// data object
-typedef struct Bbl_Obj_t_ Bbl_Obj_t;
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-// (1) creating the data manager in the application code
-extern Bbl_Man_t * Bbl_ManStart( char * pName );
-extern void        Bbl_ManCreateObject( Bbl_Man_t * p, Bbl_Type_t Type, int ObjId, int nFanins, char * pSop );
-extern void        Bbl_ManAddFanin( Bbl_Man_t * p, int ObjId, int FaninId );
-extern int         Bbl_ManCheck( Bbl_Man_t * p );
-extern void        Bbl_ManPrintStats( Bbl_Man_t * p );
-extern void        Bbl_ManStop( Bbl_Man_t * p );
-
-// (2) writing the data manager into file
-extern void        Bbl_ManDumpBinaryBlif( Bbl_Man_t * p, char * pFileName );
-
-// (3) reading the data manager from file
-extern Bbl_Man_t * Bbl_ManReadBinaryBlif( char * pFileName );
-
-// (4) returning the mapped network after reading the data manaager from file
-extern char *      Bbl_ManName( Bbl_Man_t * p );
-extern int         Bbl_ObjIsInput( Bbl_Obj_t * p );
-extern int         Bbl_ObjIsOutput( Bbl_Obj_t * p );
-extern int         Bbl_ObjIsLut( Bbl_Obj_t * p );
-extern int         Bbl_ObjId( Bbl_Obj_t * p );
-extern int         Bbl_ObjIdOriginal( Bbl_Man_t * pMan, Bbl_Obj_t * p );
-extern int         Bbl_ObjFaninNumber( Bbl_Obj_t * p );
-extern char *      Bbl_ObjSop( Bbl_Man_t * pMan, Bbl_Obj_t * p );
-
-// for the use in iterators only
-extern Bbl_Obj_t * Bbl_ManObjFirst( Bbl_Man_t * p );
-extern Bbl_Obj_t * Bbl_ManObjNext( Bbl_Man_t * p, Bbl_Obj_t * pObj );
-extern Bbl_Obj_t * Bbl_ObjFaninFirst( Bbl_Obj_t * p );
-extern Bbl_Obj_t * Bbl_ObjFaninNext( Bbl_Obj_t * p, Bbl_Obj_t * pPrev );
-
-// iterator through the objects
-#define Bbl_ManForEachObj( p, pObj )                \
-    for ( pObj = Bbl_ManObjFirst(p); pObj; pObj = Bbl_ManObjNext(p, pObj) )
-// iterator through the fanins fo the an object
-#define Bbl_ObjForEachFanin( pObj, pFanin )         \
-    for ( pFanin = Bbl_ObjFaninFirst(pObj); pFanin; pFanin = Bbl_ObjFaninNext(pObj, pFanin) )
-
-// these additional procedures are provided to transform truth tables into SOPs, and vice versa
-extern char *      Bbl_ManTruthToSop( unsigned * pTruth, int nVars );
-extern unsigned *  Bbl_ManSopToTruth( char * pSop, int nVars );
-
-// write text BLIF file for debugging
-extern void        Bbl_ManDumpBlif( Bbl_Man_t * p, char * pFileName );
-
-// a simple demo procedure
-extern void        Bbl_ManSimpleDemo();
-
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/bbl/module.make b/src/aig/bbl/module.make
deleted file mode 100644
index 89ed2fa3..00000000
--- a/src/aig/bbl/module.make
+++ /dev/null
@@ -1 +0,0 @@
-SRC +=    src/aig/bbl/bblif.c 
diff --git a/src/aig/bbr/bbr.h b/src/aig/bbr/bbr.h
deleted file mode 100644
index bb83ac95..00000000
--- a/src/aig/bbr/bbr.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bbr.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD-based reachability analysis.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: bbr.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __BBR_H__
-#define __BBR_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include <stdio.h>
-#include "aig.h"
-#include "saig.h"
-#include "cuddInt.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-static inline DdNode * Aig_ObjGlobalBdd( Aig_Obj_t * pObj )  { return (DdNode *)pObj->pData; }
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== bbrImage.c ==========================================================*/
-typedef struct Bbr_ImageTree_t_  Bbr_ImageTree_t;
-extern Bbr_ImageTree_t * Bbr_bddImageStart( 
-    DdManager * dd, DdNode * bCare,
-    int nParts, DdNode ** pbParts,
-    int nVars, DdNode ** pbVars, int nBddMax, int fVerbose );
-extern DdNode *    Bbr_bddImageCompute( Bbr_ImageTree_t * pTree, DdNode * bCare );
-extern void        Bbr_bddImageTreeDelete( Bbr_ImageTree_t * pTree );
-extern DdNode *    Bbr_bddImageRead( Bbr_ImageTree_t * pTree );
-typedef struct Bbr_ImageTree2_t_  Bbr_ImageTree2_t;
-extern Bbr_ImageTree2_t * Bbr_bddImageStart2( 
-    DdManager * dd, DdNode * bCare,
-    int nParts, DdNode ** pbParts,
-    int nVars, DdNode ** pbVars, int fVerbose );
-extern DdNode *    Bbr_bddImageCompute2( Bbr_ImageTree2_t * pTree, DdNode * bCare );
-extern void        Bbr_bddImageTreeDelete2( Bbr_ImageTree2_t * pTree );
-extern DdNode *    Bbr_bddImageRead2( Bbr_ImageTree2_t * pTree );
-/*=== bbrNtbdd.c ==========================================================*/
-extern void        Aig_ManFreeGlobalBdds( Aig_Man_t * p, DdManager * dd );
-extern int         Aig_ManSizeOfGlobalBdds( Aig_Man_t * p );
-extern DdManager * Aig_ManComputeGlobalBdds( Aig_Man_t * p, int nBddSizeMax, int fDropInternal, int fReorder, int fVerbose );
-/*=== bbrReach.c ==========================================================*/
-extern int         Aig_ManVerifyUsingBdds( Aig_Man_t * p, Saig_ParBbr_t * pPars );
-extern void        Bbr_ManSetDefaultParams( Saig_ParBbr_t * p );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/bbr/bbrCex.c b/src/aig/bbr/bbrCex.c
deleted file mode 100644
index 4a1a1d67..00000000
--- a/src/aig/bbr/bbrCex.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bbrCex.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD-based reachability analysis.]
-
-  Synopsis    [Procedures to derive a satisfiable counter-example.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: bbrCex.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "bbr.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-extern DdNode * Bbr_bddComputeRangeCube( DdManager * dd, int iStart, int iStop );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the counter-example using the set of reached states.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Abc_Cex_t * Aig_ManVerifyUsingBddsCountExample( Aig_Man_t * p, DdManager * dd, 
-    DdNode ** pbParts, Vec_Ptr_t * vOnionRings, DdNode * bCubeFirst,
-    int iOutput, int fVerbose, int fSilent )
-{
-    Abc_Cex_t * pCex;
-    Aig_Obj_t * pObj;
-    Bbr_ImageTree_t * pTree;
-    DdNode * bCubeNs, * bState, * bImage;
-    DdNode * bTemp, * bVar, * bRing;
-    int i, v, RetValue, nPiOffset;
-    char * pValues;
-    int clk = clock();
-//printf( "\nDeriving counter-example.\n" );
-
-    // allocate room for the counter-example
-    pCex = Abc_CexAlloc( Saig_ManRegNum(p), Saig_ManPiNum(p), Vec_PtrSize(vOnionRings)+1 );
-    pCex->iFrame = Vec_PtrSize(vOnionRings);
-    pCex->iPo = iOutput;
-    nPiOffset = Saig_ManRegNum(p) + Saig_ManPiNum(p) * Vec_PtrSize(vOnionRings);
-
-    // create the cube of NS variables
-    bCubeNs  = Bbr_bddComputeRangeCube( dd, Saig_ManCiNum(p), Saig_ManCiNum(p)+Saig_ManRegNum(p) );    Cudd_Ref( bCubeNs );
-    pTree = Bbr_bddImageStart( dd, bCubeNs, Saig_ManRegNum(p), pbParts, Saig_ManCiNum(p), dd->vars, 100000000, fVerbose );
-    Cudd_RecursiveDeref( dd, bCubeNs );
-    if ( pTree == NULL )
-    {
-        if ( !fSilent )
-            printf( "BDDs blew up during qualitification scheduling.  " );
-        return NULL;
-    }
-
-    // allocate room for the cube
-    pValues = ABC_ALLOC( char, dd->size );
-
-    // get the last cube
-    RetValue = Cudd_bddPickOneCube( dd, bCubeFirst, pValues );
-    assert( RetValue );
-
-    // write PIs of counter-example
-    Saig_ManForEachPi( p, pObj, i )
-        if ( pValues[i] == 1 )
-            Aig_InfoSetBit( pCex->pData, nPiOffset + i );
-    nPiOffset -= Saig_ManPiNum(p);
-
-    // write state in terms of NS variables
-    bState = (dd)->one; Cudd_Ref( bState );
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        bVar = Cudd_NotCond( dd->vars[Saig_ManCiNum(p)+i], pValues[Saig_ManPiNum(p)+i] != 1 );
-        bState = Cudd_bddAnd( dd, bTemp = bState, bVar );  Cudd_Ref( bState );
-        Cudd_RecursiveDeref( dd, bTemp ); 
-    }
-
-    // perform backward analysis
-    Vec_PtrForEachEntryReverse( DdNode *, vOnionRings, bRing, v )
-    { 
-        // compute the next states
-        bImage = Bbr_bddImageCompute( pTree, bState );           
-        if ( bImage == NULL )
-        {
-            Cudd_RecursiveDeref( dd, bState );
-            if ( !fSilent )
-                printf( "BDDs blew up during image computation.  " );
-            Bbr_bddImageTreeDelete( pTree );
-            ABC_FREE( pValues );
-            return NULL;
-        }
-        Cudd_Ref( bImage );
-        Cudd_RecursiveDeref( dd, bState );
-
-        // intersect with the previous set
-        bImage = Cudd_bddAnd( dd, bTemp = bImage, bRing );  Cudd_Ref( bImage );
-        Cudd_RecursiveDeref( dd, bTemp );
-
-        // find any assignment of the BDD
-        RetValue = Cudd_bddPickOneCube( dd, bImage, pValues );
-        assert( RetValue );
-        Cudd_RecursiveDeref( dd, bImage );
-
-        // write PIs of counter-example
-        Saig_ManForEachPi( p, pObj, i )
-            if ( pValues[i] == 1 )
-                Aig_InfoSetBit( pCex->pData, nPiOffset + i );
-        nPiOffset -= Saig_ManPiNum(p);
-
-        // check that we get the init state
-        if ( v == 0 )
-        {
-            Saig_ManForEachLo( p, pObj, i )
-                assert( pValues[Saig_ManPiNum(p)+i] == 0 );
-            break;
-        }
-
-        // write state in terms of NS variables
-        bState = (dd)->one; Cudd_Ref( bState );
-        Saig_ManForEachLo( p, pObj, i )
-        {
-            bVar = Cudd_NotCond( dd->vars[Saig_ManCiNum(p)+i], pValues[Saig_ManPiNum(p)+i] != 1 );
-            bState = Cudd_bddAnd( dd, bTemp = bState, bVar );  Cudd_Ref( bState );
-            Cudd_RecursiveDeref( dd, bTemp ); 
-        }
-    }
-    // cleanup
-    Bbr_bddImageTreeDelete( pTree );
-    ABC_FREE( pValues );
-    // verify the counter example
-    if ( Vec_PtrSize(vOnionRings) < 1000 )
-    {
-    RetValue = Saig_ManVerifyCex( p, pCex );
-    if ( RetValue == 0 && !fSilent )
-        printf( "Aig_ManVerifyUsingBdds(): Counter-example verification has FAILED.\n" );
-    }
-    if ( fVerbose && !fSilent )
-    {
-    ABC_PRT( "Counter-example generation time", clock() - clk );
-    }
-    return pCex;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/bbr/bbrImage.c b/src/aig/bbr/bbrImage.c
deleted file mode 100644
index 8b18d84d..00000000
--- a/src/aig/bbr/bbrImage.c
+++ /dev/null
@@ -1,1327 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bbrImage.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD-based reachability analysis.]
-
-  Synopsis    [Performs image computation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: bbrImage.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "bbr.h"
-#include "mtr.h"
-
-ABC_NAMESPACE_IMPL_START
- 
-
-/* 
-    The ideas implemented in this file are inspired by the paper:
-    Pankaj Chauhan, Edmund Clarke, Somesh Jha, Jim Kukula, Tom Shiple, 
-    Helmut Veith, Dong Wang. Non-linear Quantification Scheduling in 
-    Image Computation. ICCAD, 2001.
-*/
- 
-/*---------------------------------------------------------------------------*/
-/* Constant declarations                                                     */
-/*---------------------------------------------------------------------------*/
-
-/*---------------------------------------------------------------------------*/
-/* Stucture declarations                                                     */
-/*---------------------------------------------------------------------------*/
-
-typedef struct Bbr_ImageNode_t_  Bbr_ImageNode_t;
-typedef struct Bbr_ImagePart_t_  Bbr_ImagePart_t;
-typedef struct Bbr_ImageVar_t_   Bbr_ImageVar_t;
-
-struct Bbr_ImageTree_t_
-{
-    Bbr_ImageNode_t *   pRoot;      // the root of quantification tree
-    Bbr_ImageNode_t *   pCare;      // the leaf node with the care set
-    DdNode *            bCareSupp;  // the cube to quantify from the care
-    int                 fVerbose;   // the verbosity flag
-    int                 nNodesMax;  // the max number of nodes in one iter
-    int                 nNodesMaxT; // the overall max number of nodes
-    int                 nIter;      // the number of iterations with this tree
-    int                 nBddMax;    // the number of node to stop
-};
-
-struct Bbr_ImageNode_t_
-{
-    DdManager *         dd;         // the manager 
-    DdNode *            bCube;      // the cube to quantify
-    DdNode *            bImage;     // the partial image
-    Bbr_ImageNode_t *   pNode1;     // the first branch
-    Bbr_ImageNode_t *   pNode2;     // the second branch
-    Bbr_ImagePart_t *   pPart;      // the partition (temporary)
-};
-
-struct Bbr_ImagePart_t_
-{
-    DdNode *            bFunc;      // the partition
-    DdNode *            bSupp;      // the support of this partition
-    int                 nNodes;     // the number of BDD nodes
-    short               nSupp;      // the number of support variables
-    short               iPart;      // the number of this partition
-};
-
-struct Bbr_ImageVar_t_
-{
-    int                 iNum;       // the BDD index of this variable
-    DdNode *            bParts;     // the partition numbers
-    int                 nParts;     // the number of partitions
-};
-
-/*---------------------------------------------------------------------------*/
-/* Type declarations                                                         */
-/*---------------------------------------------------------------------------*/
-
-/*---------------------------------------------------------------------------*/
-/* Variable declarations                                                     */
-/*---------------------------------------------------------------------------*/
-
-/*---------------------------------------------------------------------------*/
-/* Macro declarations                                                        */
-/*---------------------------------------------------------------------------*/
-
-#define     b0     Cudd_Not((dd)->one)
-#define     b1              (dd)->one
-
-#ifndef ABC_PRB
-#define ABC_PRB(dd,f)       printf("%s = ", #f); Bbr_bddPrint(dd,f); printf("\n")
-#endif
-
-/**AutomaticStart*************************************************************/
-
-
-/*---------------------------------------------------------------------------*/
-/* Static function prototypes                                                */
-/*---------------------------------------------------------------------------*/
-
-static Bbr_ImagePart_t ** Bbr_CreateParts( DdManager * dd,
-    int nParts, DdNode ** pbParts, DdNode * bCare );
-static Bbr_ImageVar_t ** Bbr_CreateVars( DdManager * dd,
-    int nParts, Bbr_ImagePart_t ** pParts,
-    int nVars, DdNode ** pbVarsNs );
-static Bbr_ImageNode_t ** Bbr_CreateNodes( DdManager * dd, 
-    int nParts, Bbr_ImagePart_t ** pParts, 
-    int nVars,  Bbr_ImageVar_t ** pVars );
-static void Bbr_DeleteParts_rec( Bbr_ImageNode_t * pNode );
-static int Bbr_BuildTreeNode( DdManager * dd, 
-    int nNodes, Bbr_ImageNode_t ** pNodes, 
-    int nVars,  Bbr_ImageVar_t ** pVars, int * pfStop, int nBddMax );
-static Bbr_ImageNode_t * Bbr_MergeTopNodes( DdManager * dd, 
-    int nNodes, Bbr_ImageNode_t ** pNodes );
-static void Bbr_bddImageTreeDelete_rec( Bbr_ImageNode_t * pNode );
-static int Bbr_bddImageCompute_rec( Bbr_ImageTree_t * pTree, Bbr_ImageNode_t * pNode );
-static int Bbr_FindBestVariable( DdManager * dd,
-    int nNodes, Bbr_ImageNode_t ** pNodes, 
-    int nVars,  Bbr_ImageVar_t ** pVars );
-static void Bbr_FindBestPartitions( DdManager * dd, DdNode * bParts, 
-    int nNodes, Bbr_ImageNode_t ** pNodes, 
-    int * piNode1, int * piNode2 );
-static Bbr_ImageNode_t * Bbr_CombineTwoNodes( DdManager * dd, DdNode * bCube,
-    Bbr_ImageNode_t * pNode1, Bbr_ImageNode_t * pNode2 );
-
-static void Bbr_bddImagePrintLatchDependency( DdManager * dd, DdNode * bCare,
-    int nParts, DdNode ** pbParts,
-    int nVars, DdNode ** pbVars );
-static void Bbr_bddImagePrintLatchDependencyOne( DdManager * dd, DdNode * bFunc, 
-    DdNode * bVarsCs, DdNode * bVarsNs, int iPart );
-
-static void Bbr_bddImagePrintTree( Bbr_ImageTree_t * pTree );
-static void Bbr_bddImagePrintTree_rec( Bbr_ImageNode_t * pNode, int nOffset );
-
-static void Bbr_bddPrint( DdManager * dd, DdNode * F );
-
-/**AutomaticEnd***************************************************************/
-
-
-/*---------------------------------------------------------------------------*/
-/* Definition of exported functions                                          */
-/*---------------------------------------------------------------------------*/
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the image computation using tree-based scheduling.]
-
-  Description [This procedure starts the image computation. It uses
-  the given care set to test-run the image computation and creates the 
-  quantification tree by scheduling variable quantifications. The tree can 
-  be used to compute images for other care sets without rescheduling.
-  In this case, Bbr_bddImageCompute() should be called.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bbr_ImageTree_t * Bbr_bddImageStart( 
-    DdManager * dd, DdNode * bCare, // the care set
-    int nParts, DdNode ** pbParts,  // the partitions for image computation
-    int nVars, DdNode ** pbVars, int nBddMax, int fVerbose )   // the NS and parameter variables (not quantified!)
-{
-    Bbr_ImageTree_t * pTree;
-    Bbr_ImagePart_t ** pParts;
-    Bbr_ImageVar_t ** pVars;
-    Bbr_ImageNode_t ** pNodes, * pCare;
-    int fStop, v;
-
-    if ( fVerbose && dd->size <= 80 )
-        Bbr_bddImagePrintLatchDependency( dd, bCare, nParts, pbParts, nVars, pbVars );
-
-    // create variables, partitions and leaf nodes
-    pParts = Bbr_CreateParts( dd, nParts, pbParts, bCare );
-    pVars  = Bbr_CreateVars( dd, nParts + 1, pParts, nVars, pbVars );
-    pNodes = Bbr_CreateNodes( dd, nParts + 1, pParts, dd->size, pVars );
-    pCare  = pNodes[nParts];
-
-    // process the nodes
-    while ( Bbr_BuildTreeNode( dd, nParts + 1, pNodes, dd->size, pVars, &fStop, nBddMax ) );
-
-    // consider the case of BDD node blowup
-    if ( fStop )
-    {
-        for ( v = 0; v < dd->size; v++ )
-            if ( pVars[v] )
-                ABC_FREE( pVars[v] );
-        ABC_FREE( pVars );
-        for ( v = 0; v <= nParts; v++ )
-            if ( pNodes[v] )
-            {
-                Bbr_DeleteParts_rec( pNodes[v] );
-                Bbr_bddImageTreeDelete_rec( pNodes[v] );
-            }
-        ABC_FREE( pNodes );
-        ABC_FREE( pParts );
-        return NULL;
-    }
-
-    // make sure the variables are gone
-    for ( v = 0; v < dd->size; v++ )
-        assert( pVars[v] == NULL );
-    ABC_FREE( pVars );
-    
-    // create the tree
-    pTree = ABC_ALLOC( Bbr_ImageTree_t, 1 );
-    memset( pTree, 0, sizeof(Bbr_ImageTree_t) );
-    pTree->pCare = pCare;
-    pTree->nBddMax = nBddMax;
-    pTree->fVerbose = fVerbose;
-
-    // merge the topmost nodes
-    while ( (pTree->pRoot = Bbr_MergeTopNodes( dd, nParts + 1, pNodes )) == NULL );
-
-    // make sure the nodes are gone
-    for ( v = 0; v < nParts + 1; v++ )
-        assert( pNodes[v] == NULL );
-    ABC_FREE( pNodes );
-
-//    if ( fVerbose )
-//        Bbr_bddImagePrintTree( pTree );
-
-    // set the support of the care set
-    pTree->bCareSupp = Cudd_Support( dd, bCare );  Cudd_Ref( pTree->bCareSupp );
-
-    // clean the partitions
-    Bbr_DeleteParts_rec( pTree->pRoot );
-    ABC_FREE( pParts );
-
-    return pTree;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compute the image.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Bbr_bddImageCompute( Bbr_ImageTree_t * pTree, DdNode * bCare )
-{
-    DdManager * dd = pTree->pCare->dd;
-    DdNode * bSupp, * bRem;
-
-    pTree->nIter++;
-
-    // make sure the supports are okay
-    bSupp = Cudd_Support( dd, bCare );        Cudd_Ref( bSupp );
-    if ( bSupp != pTree->bCareSupp )
-    {
-        bRem = Cudd_bddExistAbstract( dd, bSupp, pTree->bCareSupp );  Cudd_Ref( bRem );
-        if ( bRem != b1 )
-        {
-printf( "Original care set support: " );
-ABC_PRB( dd, pTree->bCareSupp );
-printf( "Current care set support: " );
-ABC_PRB( dd, bSupp );
-            Cudd_RecursiveDeref( dd, bSupp );
-            Cudd_RecursiveDeref( dd, bRem );
-            printf( "The care set depends on some vars that were not in the care set during scheduling.\n" );
-            return NULL;
-        }
-        Cudd_RecursiveDeref( dd, bRem );
-    }
-    Cudd_RecursiveDeref( dd, bSupp );
-
-    // remove the previous image
-    Cudd_RecursiveDeref( dd, pTree->pCare->bImage );
-    pTree->pCare->bImage = bCare;   Cudd_Ref( bCare );
-
-    // compute the image
-    pTree->nNodesMax = 0;
-    if ( !Bbr_bddImageCompute_rec( pTree, pTree->pRoot ) )
-        return NULL;
-    if ( pTree->nNodesMaxT < pTree->nNodesMax )
-        pTree->nNodesMaxT = pTree->nNodesMax;
-
-//    if ( pTree->fVerbose )
-//        printf( "Iter %2d : Max nodes = %5d.\n", pTree->nIter, pTree->nNodesMax );
-    return pTree->pRoot->bImage;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Delete the tree.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbr_bddImageTreeDelete( Bbr_ImageTree_t * pTree )
-{
-    if ( pTree->bCareSupp )
-        Cudd_RecursiveDeref( pTree->pRoot->dd, pTree->bCareSupp );
-    Bbr_bddImageTreeDelete_rec( pTree->pRoot );
-    ABC_FREE( pTree );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads the image from the tree.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Bbr_bddImageRead( Bbr_ImageTree_t * pTree )
-{
-    return pTree->pRoot->bImage;
-}
-
-/*---------------------------------------------------------------------------*/
-/* Definition of internal functions                                          */
-/*---------------------------------------------------------------------------*/
-
-/**Function********************************************************************
-
-  Synopsis    [Outputs the BDD in a readable format.]
-
-  Description []
-
-  SideEffects [None]
-
-  SeeAlso     []
-
-******************************************************************************/
-void Bbr_bddPrint( DdManager * dd, DdNode * F )
-{
-    DdGen * Gen;
-    int * Cube;
-    CUDD_VALUE_TYPE Value;
-    int nVars = dd->size;
-    int fFirstCube = 1;
-    int i;
-
-    if ( F == NULL )
-    {
-        printf("NULL");
-        return;
-    }
-    if ( F == b0 )
-    {
-        printf("Constant 0");
-        return;
-    }
-    if ( F == b1 )
-    {
-        printf("Constant 1");
-        return;
-    }
-
-    Cudd_ForeachCube( dd, F, Gen, Cube, Value )
-    {
-        if ( fFirstCube )
-            fFirstCube = 0;
-        else
-//          Output << " + ";
-            printf( " + " );
-
-        for ( i = 0; i < nVars; i++ )
-            if ( Cube[i] == 0 )
-                printf( "[%d]'", i );
-//              printf( "%c'", (char)('a'+i) );
-            else if ( Cube[i] == 1 )
-                printf( "[%d]", i );
-//              printf( "%c", (char)('a'+i) );
-    }
-
-//  printf("\n");
-}
-
-/*---------------------------------------------------------------------------*/
-/* Definition of static Functions                                            */
-/*---------------------------------------------------------------------------*/
-
-/**Function*************************************************************
-
-  Synopsis    [Creates partitions.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bbr_ImagePart_t ** Bbr_CreateParts( DdManager * dd,
-    int nParts, DdNode ** pbParts, DdNode * bCare )
-{
-    Bbr_ImagePart_t ** pParts;
-    int i;
-
-    // start the partitions
-    pParts = ABC_ALLOC( Bbr_ImagePart_t *, nParts + 1 );
-    // create structures for each variable
-    for ( i = 0; i < nParts; i++ )
-    {
-        pParts[i] = ABC_ALLOC( Bbr_ImagePart_t, 1 );
-        pParts[i]->bFunc  = pbParts[i];                           Cudd_Ref( pParts[i]->bFunc );
-        pParts[i]->bSupp  = Cudd_Support( dd, pParts[i]->bFunc ); Cudd_Ref( pParts[i]->bSupp );
-        pParts[i]->nSupp  = Cudd_SupportSize( dd, pParts[i]->bSupp );
-        pParts[i]->nNodes = Cudd_DagSize( pParts[i]->bFunc );
-        pParts[i]->iPart  = i;
-    }
-    // add the care set as the last partition
-    pParts[nParts] = ABC_ALLOC( Bbr_ImagePart_t, 1 );
-    pParts[nParts]->bFunc = bCare;                                     Cudd_Ref( pParts[nParts]->bFunc );
-    pParts[nParts]->bSupp = Cudd_Support( dd, pParts[nParts]->bFunc ); Cudd_Ref( pParts[nParts]->bSupp );
-    pParts[nParts]->nSupp = Cudd_SupportSize( dd, pParts[nParts]->bSupp );
-    pParts[nParts]->nNodes = Cudd_DagSize( pParts[nParts]->bFunc );
-    pParts[nParts]->iPart  = nParts;
-    return pParts;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bbr_ImageVar_t ** Bbr_CreateVars( DdManager * dd,
-    int nParts, Bbr_ImagePart_t ** pParts,
-    int nVars, DdNode ** pbVars )
-{
-    Bbr_ImageVar_t ** pVars;
-    DdNode ** pbFuncs;
-    DdNode * bCubeNs, * bSupp, * bParts, * bTemp, * bSuppTemp;
-    int nVarsTotal, iVar, p, Counter;
-
-    // put all the functions into one array
-    pbFuncs = ABC_ALLOC( DdNode *, nParts );
-    for ( p = 0; p < nParts; p++ )
-        pbFuncs[p] = pParts[p]->bSupp;
-    bSupp = Cudd_VectorSupport( dd, pbFuncs, nParts );  Cudd_Ref( bSupp );
-    ABC_FREE( pbFuncs );
-
-    // remove the NS vars
-    bCubeNs = Cudd_bddComputeCube( dd, pbVars, NULL, nVars );        Cudd_Ref( bCubeNs );
-    bSupp = Cudd_bddExistAbstract( dd, bTemp = bSupp, bCubeNs );     Cudd_Ref( bSupp );
-    Cudd_RecursiveDeref( dd, bTemp );
-    Cudd_RecursiveDeref( dd, bCubeNs );
-
-    // get the number of I and CS variables to be quantified
-    nVarsTotal = Cudd_SupportSize( dd, bSupp );
-
-    // start the variables
-    pVars = ABC_ALLOC( Bbr_ImageVar_t *, dd->size );
-    memset( pVars, 0, sizeof(Bbr_ImageVar_t *) * dd->size );
-    // create structures for each variable
-    for ( bSuppTemp = bSupp; bSuppTemp != b1; bSuppTemp = cuddT(bSuppTemp) )
-    {
-        iVar = bSuppTemp->index;
-        pVars[iVar] = ABC_ALLOC( Bbr_ImageVar_t, 1 );
-        pVars[iVar]->iNum = iVar;
-        // collect all the parts this var belongs to
-        Counter = 0;
-        bParts = b1; Cudd_Ref( bParts );
-        for ( p = 0; p < nParts; p++ )
-            if ( Cudd_bddLeq( dd, pParts[p]->bSupp, dd->vars[bSuppTemp->index] ) )
-            {
-                bParts = Cudd_bddAnd( dd, bTemp = bParts, dd->vars[p] );  Cudd_Ref( bParts );
-                Cudd_RecursiveDeref( dd, bTemp );
-                Counter++;
-            }
-        pVars[iVar]->bParts = bParts; // takes ref
-        pVars[iVar]->nParts = Counter;
-    }
-    Cudd_RecursiveDeref( dd, bSupp );
-    return pVars;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bbr_ImageNode_t ** Bbr_CreateNodes( DdManager * dd, 
-    int nParts, Bbr_ImagePart_t ** pParts, 
-    int nVars,  Bbr_ImageVar_t ** pVars )
-{
-    Bbr_ImageNode_t ** pNodes;
-    Bbr_ImageNode_t * pNode;
-    DdNode * bTemp;
-    int i, v, iPart;
-/*
-    DdManager *         dd;       // the manager 
-    DdNode *            bCube;    // the cube to quantify
-    DdNode *            bImage;   // the partial image
-    Bbr_ImageNode_t * pNode1;   // the first branch
-    Bbr_ImageNode_t * pNode2;   // the second branch
-    Bbr_ImagePart_t * pPart;    // the partition (temporary)
-*/
-    // start the partitions
-    pNodes = ABC_ALLOC( Bbr_ImageNode_t *, nParts );
-    // create structures for each leaf nodes
-    for ( i = 0; i < nParts; i++ )
-    {
-        pNodes[i] = ABC_ALLOC( Bbr_ImageNode_t, 1 );
-        memset( pNodes[i], 0, sizeof(Bbr_ImageNode_t) );
-        pNodes[i]->dd    = dd;
-        pNodes[i]->pPart = pParts[i];
-    }
-    // find the quantification cubes for each leaf node
-    for ( v = 0; v < nVars; v++ )
-    {
-        if ( pVars[v] == NULL )
-            continue;
-        assert( pVars[v]->nParts > 0 );
-        if ( pVars[v]->nParts > 1 )
-            continue;
-        iPart = pVars[v]->bParts->index;
-        if ( pNodes[iPart]->bCube == NULL )
-        {
-            pNodes[iPart]->bCube = dd->vars[v];   
-            Cudd_Ref( dd->vars[v] );
-        }
-        else
-        {
-            pNodes[iPart]->bCube = Cudd_bddAnd( dd, bTemp = pNodes[iPart]->bCube, dd->vars[v] );  
-            Cudd_Ref( pNodes[iPart]->bCube );
-            Cudd_RecursiveDeref( dd, bTemp );
-        }
-        // remove these  variables
-        Cudd_RecursiveDeref( dd, pVars[v]->bParts );
-        ABC_FREE( pVars[v] );
-    }
-
-    // assign the leaf node images
-    for ( i = 0; i < nParts; i++ )
-    {
-        pNode = pNodes[i];
-        if ( pNode->bCube )
-        {
-            // update the partition
-            pParts[i]->bFunc = Cudd_bddExistAbstract( dd, bTemp = pParts[i]->bFunc, pNode->bCube );
-            Cudd_Ref( pParts[i]->bFunc );
-            Cudd_RecursiveDeref( dd, bTemp );
-            // update the support the partition
-            pParts[i]->bSupp = Cudd_bddExistAbstract( dd, bTemp = pParts[i]->bSupp, pNode->bCube ); 
-            Cudd_Ref( pParts[i]->bSupp );
-            Cudd_RecursiveDeref( dd, bTemp );
-            // update the numbers
-            pParts[i]->nSupp  = Cudd_SupportSize( dd, pParts[i]->bSupp );
-            pParts[i]->nNodes = Cudd_DagSize( pParts[i]->bFunc );
-            // get rid of the cube
-            // save the last (care set) quantification cube
-            if ( i < nParts - 1 )
-            {
-                Cudd_RecursiveDeref( dd, pNode->bCube );
-                pNode->bCube = NULL;
-            }
-        }
-        // copy the function
-        pNode->bImage = pParts[i]->bFunc;   Cudd_Ref( pNode->bImage );
-    }
-/*
-    for ( i = 0; i < nParts; i++ )
-    {
-        pNode = pNodes[i];
-ABC_PRB( dd, pNode->bCube );
-ABC_PRB( dd, pNode->pPart->bFunc );
-ABC_PRB( dd, pNode->pPart->bSupp );
-printf( "\n" );
-    }
-*/
-    return pNodes;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Delete the partitions from the nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbr_DeleteParts_rec( Bbr_ImageNode_t * pNode )
-{
-    Bbr_ImagePart_t * pPart;
-    if ( pNode->pNode1 )
-        Bbr_DeleteParts_rec( pNode->pNode1 );
-    if ( pNode->pNode2 )
-        Bbr_DeleteParts_rec( pNode->pNode2 );
-    pPart = pNode->pPart;
-    Cudd_RecursiveDeref( pNode->dd, pPart->bFunc );
-    Cudd_RecursiveDeref( pNode->dd, pPart->bSupp );
-    ABC_FREE( pNode->pPart );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Delete the partitions from the nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbr_bddImageTreeDelete_rec( Bbr_ImageNode_t * pNode )
-{
-    if ( pNode->pNode1 )
-        Bbr_bddImageTreeDelete_rec( pNode->pNode1 );
-    if ( pNode->pNode2 )
-        Bbr_bddImageTreeDelete_rec( pNode->pNode2 );
-    if ( pNode->bCube )
-        Cudd_RecursiveDeref( pNode->dd, pNode->bCube );
-    if ( pNode->bImage )
-        Cudd_RecursiveDeref( pNode->dd, pNode->bImage );
-    assert( pNode->pPart == NULL );
-    ABC_FREE( pNode );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recompute the image.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bbr_bddImageCompute_rec( Bbr_ImageTree_t * pTree, Bbr_ImageNode_t * pNode )
-{
-    DdManager * dd = pNode->dd;
-    DdNode * bTemp;
-    int nNodes;
-
-    // trivial case
-    if ( pNode->pNode1 == NULL )
-    {
-        if ( pNode->bCube )
-        {
-            pNode->bImage = Cudd_bddExistAbstract( dd, bTemp = pNode->bImage, pNode->bCube ); 
-            Cudd_Ref( pNode->bImage );
-            Cudd_RecursiveDeref( dd, bTemp );
-        }
-        return 1;
-    }
-
-    // compute the children
-    if ( pNode->pNode1 )
-        if ( !Bbr_bddImageCompute_rec( pTree, pNode->pNode1 ) )
-            return 0;
-    if ( pNode->pNode2 )
-        if ( !Bbr_bddImageCompute_rec( pTree, pNode->pNode2 ) )
-            return 0;
-
-    // clean the old image
-    if ( pNode->bImage )
-        Cudd_RecursiveDeref( dd, pNode->bImage );
-    pNode->bImage = NULL;
-
-    // compute the new image
-    if ( pNode->bCube )
-        pNode->bImage = Cudd_bddAndAbstract( dd, 
-            pNode->pNode1->bImage, pNode->pNode2->bImage, pNode->bCube );
-    else
-        pNode->bImage = Cudd_bddAnd( dd, pNode->pNode1->bImage, pNode->pNode2->bImage );
-    Cudd_Ref( pNode->bImage );
-
-    if ( pTree->fVerbose )
-    {
-        nNodes = Cudd_DagSize( pNode->bImage );
-        if ( pTree->nNodesMax < nNodes )
-            pTree->nNodesMax = nNodes;
-    }
-    if ( dd->keys-dd->dead > (unsigned)pTree->nBddMax )
-        return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Builds the tree.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bbr_BuildTreeNode( DdManager * dd, 
-    int nNodes, Bbr_ImageNode_t ** pNodes, 
-    int nVars,  Bbr_ImageVar_t ** pVars, int * pfStop, int nBddMax )
-{
-    Bbr_ImageNode_t * pNode1, * pNode2;
-    Bbr_ImageVar_t * pVar;
-    Bbr_ImageNode_t * pNode;
-    DdNode * bCube, * bTemp, * bSuppTemp;//, * bParts;
-    int iNode1, iNode2;
-    int iVarBest, nSupp, v;
-
-    // find the best variable
-    iVarBest = Bbr_FindBestVariable( dd, nNodes, pNodes, nVars, pVars );
-    if ( iVarBest == -1 )
-        return 0;
-/*
-for ( v = 0; v < nVars; v++ )
-{
-    DdNode * bSupp;
-    if ( pVars[v] == NULL )
-        continue;
-    printf( "%3d :", v );
-    printf( "%3d ", pVars[v]->nParts );
-    bSupp = Cudd_Support( dd, pVars[v]->bParts );  Cudd_Ref( bSupp );
-    Bbr_bddPrint( dd, bSupp ); printf( "\n" );
-    Cudd_RecursiveDeref( dd, bSupp );
-}
-*/
-    pVar = pVars[iVarBest];
-
-    // this var cannot appear in one partition only
-    nSupp = Cudd_SupportSize( dd, pVar->bParts );
-    assert( nSupp == pVar->nParts );
-    assert( nSupp != 1 );
-//printf( "var = %d  supp = %d\n\n", iVarBest, nSupp );
-
-    // if it appears in only two partitions, quantify it
-    if ( pVar->nParts == 2 )
-    {
-        // get the nodes
-        iNode1 = pVar->bParts->index;
-        iNode2 = cuddT(pVar->bParts)->index;
-        pNode1 = pNodes[iNode1];
-        pNode2 = pNodes[iNode2];
-
-        // get the quantification cube
-        bCube = dd->vars[pVar->iNum];    Cudd_Ref( bCube );
-        // add the variables that appear only in these partitions
-        for ( v = 0; v < nVars; v++ )
-            if ( pVars[v] && v != iVarBest && pVars[v]->bParts == pVars[iVarBest]->bParts )
-            {
-                // add this var
-                bCube = Cudd_bddAnd( dd, bTemp = bCube, dd->vars[pVars[v]->iNum] );   Cudd_Ref( bCube );
-                Cudd_RecursiveDeref( dd, bTemp );
-                // clean this var
-                Cudd_RecursiveDeref( dd, pVars[v]->bParts );
-                ABC_FREE( pVars[v] );
-            }
-        // clean the best var
-        Cudd_RecursiveDeref( dd, pVars[iVarBest]->bParts );
-        ABC_FREE( pVars[iVarBest] );
-
-        // combines two nodes
-        pNode = Bbr_CombineTwoNodes( dd, bCube, pNode1, pNode2 );
-        Cudd_RecursiveDeref( dd, bCube );
-    }
-    else // if ( pVar->nParts > 2 )
-    {
-        // find two smallest BDDs that have this var
-        Bbr_FindBestPartitions( dd, pVar->bParts, nNodes, pNodes, &iNode1, &iNode2 );
-        pNode1 = pNodes[iNode1];
-        pNode2 = pNodes[iNode2];
-//printf( "smallest bdds with this var: %d %d\n", iNode1, iNode2 );
-/*
-        // it is not possible that a var appears only in these two
-        // otherwise, it would have a different cost
-        bParts = Cudd_bddAnd( dd, dd->vars[iNode1], dd->vars[iNode2] ); Cudd_Ref( bParts );
-        for ( v = 0; v < nVars; v++ )
-            if ( pVars[v] && pVars[v]->bParts == bParts )
-                assert( 0 );
-        Cudd_RecursiveDeref( dd, bParts );
-*/
-        // combines two nodes
-        pNode = Bbr_CombineTwoNodes( dd, b1, pNode1, pNode2 );
-    }
-
-    // clean the old nodes
-    pNodes[iNode1] = pNode;
-    pNodes[iNode2] = NULL;
-//printf( "Removing node %d (leaving node %d)\n", iNode2, iNode1 );
-    
-    // update the variables that appear in pNode[iNode2]
-    for ( bSuppTemp = pNode2->pPart->bSupp; bSuppTemp != b1; bSuppTemp = cuddT(bSuppTemp) )
-    {
-        pVar = pVars[bSuppTemp->index];
-        if ( pVar == NULL ) // this variable is not be quantified
-            continue;
-        // quantify this var
-        assert( Cudd_bddLeq( dd, pVar->bParts, dd->vars[iNode2] ) );
-        pVar->bParts = Cudd_bddExistAbstract( dd, bTemp = pVar->bParts, dd->vars[iNode2] ); Cudd_Ref( pVar->bParts );
-        Cudd_RecursiveDeref( dd, bTemp );
-        // add the new var
-        pVar->bParts = Cudd_bddAnd( dd, bTemp = pVar->bParts, dd->vars[iNode1] ); Cudd_Ref( pVar->bParts );
-        Cudd_RecursiveDeref( dd, bTemp );
-        // update the score
-        pVar->nParts = Cudd_SupportSize( dd, pVar->bParts );
-    }
-
-    *pfStop = 0;
-    if ( dd->keys-dd->dead > (unsigned)nBddMax )
-    {
-        *pfStop = 1;
-        return 0;
-    }
-    return 1;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Merges the nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bbr_ImageNode_t * Bbr_MergeTopNodes(
-    DdManager * dd, int nNodes, Bbr_ImageNode_t ** pNodes )
-{
-    Bbr_ImageNode_t * pNode;
-    int n1 = -1, n2 = -1, n;
-
-    // find the first and the second non-empty spots
-    for ( n = 0; n < nNodes; n++ )
-        if ( pNodes[n] )
-        {
-            if ( n1 == -1 )
-                n1 = n;
-            else if ( n2 == -1 )
-            {
-                n2 = n;
-                break;
-            }
-        }
-    assert( n1 != -1 );
-    // check the situation when only one such node is detected
-    if ( n2 == -1 )
-    {
-        // save the node
-        pNode = pNodes[n1];
-        // clean the node
-        pNodes[n1] = NULL;
-        return pNode;
-    }
-  
-    // combines two nodes
-    pNode = Bbr_CombineTwoNodes( dd, b1, pNodes[n1], pNodes[n2] );
-
-    // clean the old nodes
-    pNodes[n1] = pNode;
-    pNodes[n2] = NULL;
-    return NULL;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Merges two nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bbr_ImageNode_t * Bbr_CombineTwoNodes( DdManager * dd, DdNode * bCube,
-    Bbr_ImageNode_t * pNode1, Bbr_ImageNode_t * pNode2 )
-{
-    Bbr_ImageNode_t * pNode;
-    Bbr_ImagePart_t * pPart;
-
-    // create a new partition
-    pPart = ABC_ALLOC( Bbr_ImagePart_t, 1 );
-    memset( pPart, 0, sizeof(Bbr_ImagePart_t) );
-    // create the function
-    pPart->bFunc = Cudd_bddAndAbstract( dd, pNode1->pPart->bFunc, pNode2->pPart->bFunc, bCube );
-    Cudd_Ref( pPart->bFunc );
-    // update the support the partition
-    pPart->bSupp = Cudd_bddAndAbstract( dd, pNode1->pPart->bSupp, pNode2->pPart->bSupp, bCube );
-    Cudd_Ref( pPart->bSupp );
-    // update the numbers
-    pPart->nSupp  = Cudd_SupportSize( dd, pPart->bSupp );
-    pPart->nNodes = Cudd_DagSize( pPart->bFunc );
-    pPart->iPart = -1;
-/*
-ABC_PRB( dd, pNode1->pPart->bSupp );
-ABC_PRB( dd, pNode2->pPart->bSupp );
-ABC_PRB( dd, pPart->bSupp );
-*/
-    // create a new node
-    pNode = ABC_ALLOC( Bbr_ImageNode_t, 1 );
-    memset( pNode, 0, sizeof(Bbr_ImageNode_t) );
-    pNode->dd     = dd;
-    pNode->pPart  = pPart;
-    pNode->pNode1 = pNode1;
-    pNode->pNode2 = pNode2;
-    // compute the image
-    pNode->bImage = Cudd_bddAndAbstract( dd, pNode1->bImage, pNode2->bImage, bCube ); 
-    Cudd_Ref( pNode->bImage );
-    // save the cube
-    if ( bCube != b1 )
-    {
-        pNode->bCube = bCube;   Cudd_Ref( bCube );
-    }
-    return pNode;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the best variable.]
-
-  Description [The variables is the best if the sum of squares of the
-  BDD sizes of the partitions, in which it participates, is the minimum.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bbr_FindBestVariable( DdManager * dd,
-    int nNodes, Bbr_ImageNode_t ** pNodes, 
-    int nVars,  Bbr_ImageVar_t ** pVars )
-{
-    DdNode * bTemp;
-    int iVarBest, v;
-    double CostBest, CostCur;
-
-    CostBest = 100000000000000.0;
-    iVarBest = -1;
-
-    // check if there are two-variable partitions
-    for ( v = 0; v < nVars; v++ )
-        if ( pVars[v] && pVars[v]->nParts == 2 )
-        {
-            CostCur = 0;
-            for ( bTemp = pVars[v]->bParts; bTemp != b1; bTemp = cuddT(bTemp) )
-                CostCur += pNodes[bTemp->index]->pPart->nNodes * 
-                           pNodes[bTemp->index]->pPart->nNodes;
-            if ( CostBest > CostCur )
-            {
-                CostBest = CostCur;
-                iVarBest = v;
-            }
-        }
-    if ( iVarBest >= 0 )
-        return iVarBest;
-
-    // find other partition
-    for ( v = 0; v < nVars; v++ )
-        if ( pVars[v] )
-        {
-            assert( pVars[v]->nParts > 1 );
-            CostCur = 0;
-            for ( bTemp = pVars[v]->bParts; bTemp != b1; bTemp = cuddT(bTemp) )
-                CostCur += pNodes[bTemp->index]->pPart->nNodes * 
-                           pNodes[bTemp->index]->pPart->nNodes;
-            if ( CostBest > CostCur )
-            {
-                CostBest = CostCur;
-                iVarBest = v;
-            }
-        }
-    return iVarBest;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes two smallest partions that have this var.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbr_FindBestPartitions( DdManager * dd, DdNode * bParts, 
-    int nNodes, Bbr_ImageNode_t ** pNodes, 
-    int * piNode1, int * piNode2 )
-{
-    DdNode * bTemp;
-    int iPart1, iPart2;
-    int CostMin1, CostMin2, Cost;
-
-    // go through the partitions
-    iPart1 = iPart2 = -1;
-    CostMin1 = CostMin2 = 1000000;
-    for ( bTemp = bParts; bTemp != b1; bTemp = cuddT(bTemp) )
-    {
-        Cost = pNodes[bTemp->index]->pPart->nNodes;
-        if ( CostMin1 > Cost )
-        {
-            CostMin2 = CostMin1;    iPart2 = iPart1;
-            CostMin1 = Cost;        iPart1 = bTemp->index;
-        }
-        else if ( CostMin2 > Cost )
-        {
-            CostMin2 = Cost;        iPart2 = bTemp->index;
-        }
-    }
-
-    *piNode1 = iPart1;
-    *piNode2 = iPart2;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints the latch dependency matrix.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbr_bddImagePrintLatchDependency( 
-    DdManager * dd, DdNode * bCare, // the care set
-    int nParts, DdNode ** pbParts,  // the partitions for image computation
-    int nVars, DdNode ** pbVars )   // the NS and parameter variables (not quantified!)
-{
-    int i;
-    DdNode * bVarsCs, * bVarsNs;
-
-    bVarsCs = Cudd_Support( dd, bCare );                       Cudd_Ref( bVarsCs );
-    bVarsNs = Cudd_bddComputeCube( dd, pbVars, NULL, nVars );  Cudd_Ref( bVarsNs );
-
-    printf( "The latch dependency matrix:\n" );
-    printf( "Partitions = %d   Variables: total = %d  non-quantifiable = %d\n",
-        nParts, dd->size, nVars );
-    printf( "     : " );
-    for ( i = 0; i < dd->size; i++ )
-        printf( "%d", i % 10 );
-    printf( "\n" );
-
-    for ( i = 0; i < nParts; i++ )
-        Bbr_bddImagePrintLatchDependencyOne( dd, pbParts[i], bVarsCs, bVarsNs, i );
-    Bbr_bddImagePrintLatchDependencyOne( dd, bCare, bVarsCs, bVarsNs, nParts );
-
-    Cudd_RecursiveDeref( dd, bVarsCs );
-    Cudd_RecursiveDeref( dd, bVarsNs );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints one row of the latch dependency matrix.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbr_bddImagePrintLatchDependencyOne(
-    DdManager * dd, DdNode * bFunc,      // the function
-    DdNode * bVarsCs, DdNode * bVarsNs,  // the current/next state vars
-    int iPart )
-{
-    DdNode * bSupport;
-    int v;
-    bSupport = Cudd_Support( dd, bFunc );  Cudd_Ref( bSupport );
-    printf( " %3d : ", iPart );
-    for ( v = 0; v < dd->size; v++ )
-    {
-        if ( Cudd_bddLeq( dd, bSupport, dd->vars[v] ) )
-        {
-            if ( Cudd_bddLeq( dd, bVarsCs, dd->vars[v] ) )
-                printf( "c" );
-            else if ( Cudd_bddLeq( dd, bVarsNs, dd->vars[v] ) ) 
-                printf( "n" );
-            else
-                printf( "i" );
-        }
-        else
-            printf( "." );
-    }
-    printf( "\n" );
-    Cudd_RecursiveDeref( dd, bSupport );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Prints the tree for quenstification scheduling.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbr_bddImagePrintTree( Bbr_ImageTree_t * pTree )
-{
-    printf( "The quantification scheduling tree:\n" );
-    Bbr_bddImagePrintTree_rec( pTree->pRoot, 1 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints the tree for quenstification scheduling.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbr_bddImagePrintTree_rec( Bbr_ImageNode_t * pNode, int Offset )
-{
-    DdNode * Cube;
-    int i;
-
-    Cube = pNode->bCube;
-
-    if ( pNode->pNode1 == NULL )
-    {
-        printf( "<%d> ", pNode->pPart->iPart );
-        if ( Cube != NULL )
-        {
-            ABC_PRB( pNode->dd, Cube );
-        }
-        else
-            printf( "\n" );
-        return;
-    }
-
-    printf( "<*> " );
-    if ( Cube != NULL )
-    {
-        ABC_PRB( pNode->dd, Cube );
-    }
-    else
-        printf( "\n" );
-
-    for ( i = 0; i < Offset; i++ )
-        printf( "    " );
-    Bbr_bddImagePrintTree_rec( pNode->pNode1, Offset + 1 );
-
-    for ( i = 0; i < Offset; i++ )
-        printf( "    " );
-    Bbr_bddImagePrintTree_rec( pNode->pNode2, Offset + 1 );
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Computes the positive polarty cube composed of the first vars in the array.]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-DdNode * Bbr_bddComputeCube( DdManager * dd, DdNode ** bXVars, int nVars )
-{
-    DdNode * bRes;
-    DdNode * bTemp;
-    int i;
-
-    bRes = b1; Cudd_Ref( bRes );
-    for ( i = 0; i < nVars; i++ )
-    {
-        bRes = Cudd_bddAnd( dd, bTemp = bRes, bXVars[i] );  Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( dd, bTemp );
-    }
-
-    Cudd_Deref( bRes );
-    return bRes;
-}
-
-
-
-
-
-struct Bbr_ImageTree2_t_
-{
-    DdManager * dd;
-    DdNode *    bRel;
-    DdNode *    bCube;
-    DdNode *    bImage;
-};
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the monolithic image computation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bbr_ImageTree2_t * Bbr_bddImageStart2( 
-    DdManager * dd, DdNode * bCare,
-    int nParts, DdNode ** pbParts,
-    int nVars, DdNode ** pbVars, int fVerbose )
-{
-    Bbr_ImageTree2_t * pTree;
-    DdNode * bCubeAll, * bCubeNot, * bTemp;
-    int i;
-
-    pTree = ABC_ALLOC( Bbr_ImageTree2_t, 1 );
-    pTree->dd = dd;
-    pTree->bImage = NULL;
-
-    bCubeAll = Bbr_bddComputeCube( dd, dd->vars, dd->size );      Cudd_Ref( bCubeAll );
-    bCubeNot = Bbr_bddComputeCube( dd, pbVars,   nVars );         Cudd_Ref( bCubeNot );
-    pTree->bCube = Cudd_bddExistAbstract( dd, bCubeAll, bCubeNot ); Cudd_Ref( pTree->bCube );
-    Cudd_RecursiveDeref( dd, bCubeAll );
-    Cudd_RecursiveDeref( dd, bCubeNot );
-
-    // derive the monolithic relation
-    pTree->bRel = b1;   Cudd_Ref( pTree->bRel );
-    for ( i = 0; i < nParts; i++ )
-    {
-        pTree->bRel = Cudd_bddAnd( dd, bTemp = pTree->bRel, pbParts[i] ); Cudd_Ref( pTree->bRel );
-        Cudd_RecursiveDeref( dd, bTemp );
-    }
-    Bbr_bddImageCompute2( pTree, bCare );
-    return pTree;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Bbr_bddImageCompute2( Bbr_ImageTree2_t * pTree, DdNode * bCare )
-{
-    if ( pTree->bImage )
-        Cudd_RecursiveDeref( pTree->dd, pTree->bImage );
-    pTree->bImage = Cudd_bddAndAbstract( pTree->dd, pTree->bRel, bCare, pTree->bCube ); 
-    Cudd_Ref( pTree->bImage );
-    return pTree->bImage;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbr_bddImageTreeDelete2( Bbr_ImageTree2_t * pTree )
-{
-    if ( pTree->bRel )
-        Cudd_RecursiveDeref( pTree->dd, pTree->bRel );
-    if ( pTree->bCube )
-        Cudd_RecursiveDeref( pTree->dd, pTree->bCube );
-    if ( pTree->bImage )
-        Cudd_RecursiveDeref( pTree->dd, pTree->bImage );
-    ABC_FREE( pTree );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the previously computed image.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Bbr_bddImageRead2( Bbr_ImageTree2_t * pTree )
-{
-    return pTree->bImage;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/bbr/bbrNtbdd.c b/src/aig/bbr/bbrNtbdd.c
deleted file mode 100644
index 09456df0..00000000
--- a/src/aig/bbr/bbrNtbdd.c
+++ /dev/null
@@ -1,218 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bbrNtbdd.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD-based reachability analysis.]
-
-  Synopsis    [Procedures to construct global BDDs for the network.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: bbrNtbdd.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "bbr.h"
-//#include "bar.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-typedef char ProgressBar;
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static inline void     Aig_ObjSetGlobalBdd( Aig_Obj_t * pObj, DdNode * bFunc )   { pObj->pData = bFunc; }
-static inline void     Aig_ObjCleanGlobalBdd( DdManager * dd, Aig_Obj_t * pObj ) { Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData ); pObj->pData = NULL; }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the global BDD for one AIG node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Bbr_NodeGlobalBdds_rec( DdManager * dd, Aig_Obj_t * pNode, int nBddSizeMax, int fDropInternal, ProgressBar * pProgress, int * pCounter, int fVerbose )
-{
-    DdNode * bFunc, * bFunc0, * bFunc1;
-    assert( !Aig_IsComplement(pNode) );
-    if ( Cudd_ReadKeys(dd)-Cudd_ReadDead(dd) > (unsigned)nBddSizeMax )
-    {
-//        Extra_ProgressBarStop( pProgress );
-        if ( fVerbose )
-        printf( "The number of live nodes reached %d.\n", nBddSizeMax );
-        fflush( stdout );
-        return NULL;
-    }
-    // if the result is available return
-    if ( Aig_ObjGlobalBdd(pNode) == NULL )
-    {
-        // compute the result for both branches
-        bFunc0 = Bbr_NodeGlobalBdds_rec( dd, Aig_ObjFanin0(pNode), nBddSizeMax, fDropInternal, pProgress, pCounter, fVerbose ); 
-        if ( bFunc0 == NULL )
-            return NULL;
-        Cudd_Ref( bFunc0 );
-        bFunc1 = Bbr_NodeGlobalBdds_rec( dd, Aig_ObjFanin1(pNode), nBddSizeMax, fDropInternal, pProgress, pCounter, fVerbose ); 
-        if ( bFunc1 == NULL )
-            return NULL;
-        Cudd_Ref( bFunc1 );
-        bFunc0 = Cudd_NotCond( bFunc0, Aig_ObjFaninC0(pNode) );
-        bFunc1 = Cudd_NotCond( bFunc1, Aig_ObjFaninC1(pNode) );
-        // get the final result
-        bFunc = Cudd_bddAnd( dd, bFunc0, bFunc1 );   Cudd_Ref( bFunc );
-        Cudd_RecursiveDeref( dd, bFunc0 );
-        Cudd_RecursiveDeref( dd, bFunc1 );
-        // add the number of used nodes
-        (*pCounter)++;
-        // set the result
-        assert( Aig_ObjGlobalBdd(pNode) == NULL );
-        Aig_ObjSetGlobalBdd( pNode, bFunc );
-        // increment the progress bar
-//        if ( pProgress )
-//            Extra_ProgressBarUpdate( pProgress, *pCounter, NULL );
-    }
-    // prepare the return value
-    bFunc = Aig_ObjGlobalBdd(pNode);
-    // dereference BDD at the node
-    if ( --pNode->nRefs == 0 && fDropInternal )
-    {
-        Cudd_Deref( bFunc );
-        Aig_ObjSetGlobalBdd( pNode, NULL );
-    }
-    return bFunc;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Frees the global BDDs of the network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Aig_ManFreeGlobalBdds( Aig_Man_t * p, DdManager * dd ) 
-{ 
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManForEachObj( p, pObj, i )
-        if ( Aig_ObjGlobalBdd(pObj) )
-            Aig_ObjCleanGlobalBdd( dd, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the shared size of global BDDs of the COs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Aig_ManSizeOfGlobalBdds( Aig_Man_t * p ) 
-{
-    Vec_Ptr_t * vFuncsGlob;
-    Aig_Obj_t * pObj;
-    int RetValue, i;
-    // complement the global functions
-    vFuncsGlob = Vec_PtrAlloc( Aig_ManPoNum(p) );
-    Aig_ManForEachPo( p, pObj, i )
-        Vec_PtrPush( vFuncsGlob, Aig_ObjGlobalBdd(pObj) );
-    RetValue = Cudd_SharingSize( (DdNode **)Vec_PtrArray(vFuncsGlob), Vec_PtrSize(vFuncsGlob) );
-    Vec_PtrFree( vFuncsGlob );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recursively computes global BDDs for the AIG in the manager.]
-
-  Description [On exit, BDDs are stored in the pNode->pData fields.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdManager * Aig_ManComputeGlobalBdds( Aig_Man_t * p, int nBddSizeMax, int fDropInternal, int fReorder, int fVerbose )
-{
-    ProgressBar * pProgress = NULL;
-    Aig_Obj_t * pObj;
-    DdManager * dd;
-    DdNode * bFunc;
-    int i, Counter;
-    // start the manager
-    dd = Cudd_Init( Aig_ManPiNum(p), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    // set reordering
-    if ( fReorder )
-        Cudd_AutodynEnable( dd, CUDD_REORDER_SYMM_SIFT );
-    // prepare to construct global BDDs
-    Aig_ManCleanData( p );
-    // assign the constant node BDD
-    Aig_ObjSetGlobalBdd( Aig_ManConst1(p), dd->one );   Cudd_Ref( dd->one );
-    // set the elementary variables
-    Aig_ManForEachPi( p, pObj, i )
-    {
-        Aig_ObjSetGlobalBdd( pObj, dd->vars[i] );  Cudd_Ref( dd->vars[i] );
-    }
-
-    // collect the global functions of the COs
-    Counter = 0;
-    // construct the BDDs
-//    pProgress = Extra_ProgressBarStart( stdout, Aig_ManNodeNum(p) );
-    Aig_ManForEachPo( p, pObj, i )
-    {
-        bFunc = Bbr_NodeGlobalBdds_rec( dd, Aig_ObjFanin0(pObj), nBddSizeMax, fDropInternal, pProgress, &Counter, fVerbose );
-        if ( bFunc == NULL )
-        {
-            if ( fVerbose )
-            printf( "Constructing global BDDs is aborted.\n" );
-            Aig_ManFreeGlobalBdds( p, dd );
-            Cudd_Quit( dd ); 
-            // reset references
-            Aig_ManResetRefs( p );
-            return NULL;
-        }
-        bFunc = Cudd_NotCond( bFunc, Aig_ObjFaninC0(pObj) );  Cudd_Ref( bFunc ); 
-        Aig_ObjSetGlobalBdd( pObj, bFunc );
-    }
-//    Extra_ProgressBarStop( pProgress );
-    // reset references
-    Aig_ManResetRefs( p );
-    // reorder one more time
-    if ( fReorder )
-    {
-        Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 1 );
-        Cudd_AutodynDisable( dd );
-    }
-//    Cudd_PrintInfo( dd, stdout );
-    return dd;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/bbr/bbrReach.c b/src/aig/bbr/bbrReach.c
deleted file mode 100644
index 9c6dced3..00000000
--- a/src/aig/bbr/bbrReach.c
+++ /dev/null
@@ -1,606 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bbrReach.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD-based reachability analysis.]
-
-  Synopsis    [Procedures to perform reachability analysis.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: bbrReach.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "bbr.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-extern Abc_Cex_t * Aig_ManVerifyUsingBddsCountExample( Aig_Man_t * p, DdManager * dd, 
-    DdNode ** pbParts, Vec_Ptr_t * vOnionRings, DdNode * bCubeFirst, 
-    int iOutput, int fVerbose, int fSilent );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default resynthesis parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbr_ManSetDefaultParams( Saig_ParBbr_t * p )
-{
-    memset( p, 0, sizeof(Saig_ParBbr_t) );
-    p->TimeLimit     =     0;
-    p->nBddMax       = 50000;
-    p->nIterMax      =  1000;
-    p->fPartition    =     1;
-    p->fReorder      =     1;
-    p->fReorderImage =     1;
-    p->fVerbose      =     0;
-    p->fSilent       =     0;
-    p->iFrame        =    -1;
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Performs the reordering-sensitive step of Extra_bddMove().]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-DdNode * Bbr_bddComputeRangeCube( DdManager * dd, int iStart, int iStop )
-{
-    DdNode * bTemp, * bProd;
-    int i;
-    assert( iStart <= iStop );
-    assert( iStart >= 0 && iStart <= dd->size );
-    assert( iStop >= 0  && iStop  <= dd->size );
-    bProd = (dd)->one;         Cudd_Ref( bProd );
-    for ( i = iStart; i < iStop; i++ )
-    {
-        bProd = Cudd_bddAnd( dd, bTemp = bProd, dd->vars[i] );      Cudd_Ref( bProd );
-        Cudd_RecursiveDeref( dd, bTemp ); 
-    }
-    Cudd_Deref( bProd );
-    return bProd;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bbr_StopManager( DdManager * dd )
-{
-    int RetValue;
-    // check for remaining references in the package
-    RetValue = Cudd_CheckZeroRef( dd );
-    if ( RetValue > 0 )
-        printf( "\nThe number of referenced nodes = %d\n\n", RetValue );
-//  Cudd_PrintInfo( dd, stdout );
-    Cudd_Quit( dd );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the initial state and sets up the variable map.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Aig_ManInitStateVarMap( DdManager * dd, Aig_Man_t * p, int fVerbose )
-{
-    DdNode ** pbVarsX, ** pbVarsY;
-    DdNode * bTemp, * bProd;
-    Aig_Obj_t * pLatch;
-    int i;
-
-    // set the variable mapping for Cudd_bddVarMap()
-    pbVarsX = ABC_ALLOC( DdNode *, dd->size );
-    pbVarsY = ABC_ALLOC( DdNode *, dd->size );
-    bProd = (dd)->one;         Cudd_Ref( bProd );
-    Saig_ManForEachLo( p, pLatch, i )
-    {
-        pbVarsX[i] = dd->vars[ Saig_ManPiNum(p) + i ];
-        pbVarsY[i] = dd->vars[ Saig_ManCiNum(p) + i ];
-        // get the initial value of the latch
-        bProd = Cudd_bddAnd( dd, bTemp = bProd, Cudd_Not(pbVarsX[i]) );      Cudd_Ref( bProd );
-        Cudd_RecursiveDeref( dd, bTemp ); 
-    }
-    Cudd_SetVarMap( dd, pbVarsX, pbVarsY, Saig_ManRegNum(p) );
-    ABC_FREE( pbVarsX );
-    ABC_FREE( pbVarsY );
-
-    Cudd_Deref( bProd );
-    return bProd;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the array of output BDDs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode ** Aig_ManCreateOutputs( DdManager * dd, Aig_Man_t * p )
-{
-    DdNode ** pbOutputs;
-    Aig_Obj_t * pNode;
-    int i;
-    // compute the transition relation
-    pbOutputs = ABC_ALLOC( DdNode *, Saig_ManPoNum(p) );
-    Saig_ManForEachPo( p, pNode, i )
-    {
-        pbOutputs[i] = Aig_ObjGlobalBdd(pNode);  Cudd_Ref( pbOutputs[i] );
-    }
-    return pbOutputs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the array of partition BDDs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode ** Aig_ManCreatePartitions( DdManager * dd, Aig_Man_t * p, int fReorder, int fVerbose )
-{
-    DdNode ** pbParts;
-    DdNode * bVar;
-    Aig_Obj_t * pNode;
-    int i;
-
-    // extand the BDD manager to represent NS variables
-    assert( dd->size == Saig_ManCiNum(p) );
-    Cudd_bddIthVar( dd, Saig_ManCiNum(p) + Saig_ManRegNum(p) - 1 );
-
-    // enable reordering
-    if ( fReorder )
-        Cudd_AutodynEnable( dd, CUDD_REORDER_SYMM_SIFT );
-    else
-        Cudd_AutodynDisable( dd );
-
-    // compute the transition relation
-    pbParts = ABC_ALLOC( DdNode *, Saig_ManRegNum(p) );
-    Saig_ManForEachLi( p, pNode, i )
-    {
-        bVar  = Cudd_bddIthVar( dd, Saig_ManCiNum(p) + i );
-        pbParts[i] = Cudd_bddXnor( dd, bVar, Aig_ObjGlobalBdd(pNode) );  Cudd_Ref( pbParts[i] );
-    }
-    // free global BDDs
-    Aig_ManFreeGlobalBdds( p, dd );
-
-    // reorder and disable reordering
-    if ( fReorder )
-    {
-        if ( fVerbose )
-            fprintf( stdout, "BDD nodes in the partitions before reordering %d.\n", Cudd_SharingSize(pbParts,Saig_ManRegNum(p)) );
-        Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 100 );
-        Cudd_AutodynDisable( dd );
-        if ( fVerbose )
-            fprintf( stdout, "BDD nodes in the partitions after reordering %d.\n", Cudd_SharingSize(pbParts,Saig_ManRegNum(p)) );
-    }
-    return pbParts;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the set of unreachable states.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Aig_ManComputeReachable( DdManager * dd, Aig_Man_t * p, DdNode ** pbParts, DdNode * bInitial, DdNode ** pbOutputs, Saig_ParBbr_t * pPars, int fCheckOutputs )
-{
-    int fInternalReorder = 0;
-    Bbr_ImageTree_t * pTree = NULL; // Suppress "might be used uninitialized"
-    Bbr_ImageTree2_t * pTree2 = NULL; // Supprses "might be used uninitialized"
-    DdNode * bReached, * bCubeCs;
-    DdNode * bCurrent;
-    DdNode * bNext = NULL; // Suppress "might be used uninitialized"
-    DdNode * bTemp;
-    Cudd_ReorderingType method;
-    int i, nIters, nBddSize = 0, status;
-    int nThreshold = 10000, clk = clock();
-    Vec_Ptr_t * vOnionRings;
-
-    status = Cudd_ReorderingStatus( dd, &method );
-    if ( status )
-        Cudd_AutodynDisable( dd );
-
-    // start the image computation
-    bCubeCs  = Bbr_bddComputeRangeCube( dd, Saig_ManPiNum(p), Saig_ManCiNum(p) );    Cudd_Ref( bCubeCs );
-    if ( pPars->fPartition )
-        pTree = Bbr_bddImageStart( dd, bCubeCs, Saig_ManRegNum(p), pbParts, Saig_ManRegNum(p), dd->vars+Saig_ManCiNum(p), pPars->nBddMax, pPars->fVerbose );
-    else
-        pTree2 = Bbr_bddImageStart2( dd, bCubeCs, Saig_ManRegNum(p), pbParts, Saig_ManRegNum(p), dd->vars+Saig_ManCiNum(p), pPars->fVerbose );
-    Cudd_RecursiveDeref( dd, bCubeCs );
-    if ( pTree == NULL )
-    {
-        if ( !pPars->fSilent )
-            printf( "BDDs blew up during qualitification scheduling.  " );
-        return -1;
-    }
-
-    if ( status )
-        Cudd_AutodynEnable( dd, method );
-
-    // start the onion rings
-    vOnionRings = Vec_PtrAlloc( 1000 );
-
-    // perform reachability analysis
-    bCurrent = bInitial;   Cudd_Ref( bCurrent );
-    bReached = bInitial;   Cudd_Ref( bReached );
-    Vec_PtrPush( vOnionRings, bCurrent );  Cudd_Ref( bCurrent );
-    for ( nIters = 0; nIters < pPars->nIterMax; nIters++ )
-    { 
-        // check the runtime limit
-        if ( pPars->TimeLimit && ((float)pPars->TimeLimit <= (float)(clock()-clk)/(float)(CLOCKS_PER_SEC)) )
-        {
-            printf( "Reached timeout after image computation (%d seconds).\n",  pPars->TimeLimit );
-            Vec_PtrFree( vOnionRings );
-            // undo the image tree
-            if ( pPars->fPartition )
-                Bbr_bddImageTreeDelete( pTree );
-            else
-                Bbr_bddImageTreeDelete2( pTree2 );
-            pPars->iFrame = nIters - 1;
-            return -1;
-        }
-
-        // compute the next states
-        if ( pPars->fPartition )
-            bNext = Bbr_bddImageCompute( pTree, bCurrent );           
-        else
-            bNext = Bbr_bddImageCompute2( pTree2, bCurrent );  
-        if ( bNext == NULL )
-        {
-            if ( !pPars->fSilent )
-                printf( "BDDs blew up during image computation.  " );
-            if ( pPars->fPartition )
-                Bbr_bddImageTreeDelete( pTree );
-            else
-                Bbr_bddImageTreeDelete2( pTree2 );
-            Vec_PtrFree( vOnionRings );
-            pPars->iFrame = nIters - 1;
-            return -1;
-        }
-        Cudd_Ref( bNext );
-        Cudd_RecursiveDeref( dd, bCurrent );
-
-        // remap these states into the current state vars
-        bNext = Cudd_bddVarMap( dd, bTemp = bNext );                    Cudd_Ref( bNext );
-        Cudd_RecursiveDeref( dd, bTemp );
-        // check if there are any new states
-        if ( Cudd_bddLeq( dd, bNext, bReached ) )
-            break;
-        // check the BDD size
-        nBddSize = Cudd_DagSize(bNext);
-        if ( nBddSize > pPars->nBddMax )
-            break;
-        // check the result
-        for ( i = 0; i < Saig_ManPoNum(p); i++ )
-        {
-            if ( fCheckOutputs && !Cudd_bddLeq( dd, bNext, Cudd_Not(pbOutputs[i]) ) )
-            {
-                DdNode * bIntersect;
-                bIntersect = Cudd_bddIntersect( dd, bNext, pbOutputs[i] );  Cudd_Ref( bIntersect );
-                assert( p->pSeqModel == NULL );
-                p->pSeqModel = Aig_ManVerifyUsingBddsCountExample( p, dd, pbParts, 
-                    vOnionRings, bIntersect, i, pPars->fVerbose, pPars->fSilent ); 
-                Cudd_RecursiveDeref( dd, bIntersect );
-                if ( !pPars->fSilent )
-                    printf( "Output %d was asserted in frame %d (use \"write_counter\" to dump a witness). ", i, Vec_PtrSize(vOnionRings) );
-                Cudd_RecursiveDeref( dd, bReached );
-                bReached = NULL;
-                pPars->iFrame = nIters;
-                break;
-            }
-        }
-        if ( i < Saig_ManPoNum(p) )
-            break;
-        // get the new states
-        bCurrent = Cudd_bddAnd( dd, bNext, Cudd_Not(bReached) );        Cudd_Ref( bCurrent );
-        Vec_PtrPush( vOnionRings, bCurrent );  Cudd_Ref( bCurrent );
-        // minimize the new states with the reached states
-//        bCurrent = Cudd_bddConstrain( dd, bTemp = bCurrent, Cudd_Not(bReached) ); Cudd_Ref( bCurrent );
-//        Cudd_RecursiveDeref( dd, bTemp );
-        // add to the reached states
-        bReached = Cudd_bddOr( dd, bTemp = bReached, bNext );           Cudd_Ref( bReached );
-        Cudd_RecursiveDeref( dd, bTemp );
-        Cudd_RecursiveDeref( dd, bNext );
-        if ( pPars->fVerbose )
-            fprintf( stdout, "Frame = %3d. BDD = %5d. ", nIters, nBddSize );
-        if ( fInternalReorder && pPars->fReorder && nBddSize > nThreshold )
-        {
-            if ( pPars->fVerbose )
-                fprintf( stdout, "Reordering... Before = %5d. ", Cudd_DagSize(bReached) );
-            Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 100 );
-            Cudd_AutodynDisable( dd );
-            if ( pPars->fVerbose )
-                fprintf( stdout, "After = %5d.\r", Cudd_DagSize(bReached) );
-            nThreshold *= 2;
-        }
-        if ( pPars->fVerbose )
-//            fprintf( stdout, "\r" );
-            fprintf( stdout, "\n" );
-
-        if ( pPars->fVerbose )
-        {
-            double nMints = Cudd_CountMinterm(dd, bReached, Saig_ManRegNum(p) );
-//            Extra_bddPrint( dd, bReached );printf( "\n" );
-            fprintf( stdout, "Reachable states = %.0f. (Ratio = %.4f %%)\n", nMints, 100.0*nMints/pow(2.0, Saig_ManRegNum(p)) );
-            fflush( stdout ); 
-        }
-
-    }
-    Cudd_RecursiveDeref( dd, bNext );
-    // free the onion rings
-    Vec_PtrForEachEntry( DdNode *, vOnionRings, bTemp, i )
-        Cudd_RecursiveDeref( dd, bTemp );
-    Vec_PtrFree( vOnionRings );
-    // undo the image tree
-    if ( pPars->fPartition )
-        Bbr_bddImageTreeDelete( pTree );
-    else
-        Bbr_bddImageTreeDelete2( pTree2 );
-    if ( bReached == NULL )
-        return 0; // proved reachable
-    // report the stats
-    if ( pPars->fVerbose )
-    {
-        double nMints = Cudd_CountMinterm(dd, bReached, Saig_ManRegNum(p) );
-        if ( nIters > pPars->nIterMax || nBddSize > pPars->nBddMax )
-            fprintf( stdout, "Reachability analysis is stopped after %d frames.\n", nIters );
-        else
-            fprintf( stdout, "Reachability analysis completed after %d frames.\n", nIters );
-        fprintf( stdout, "Reachable states = %.0f. (Ratio = %.4f %%)\n", nMints, 100.0*nMints/pow(2.0, Saig_ManRegNum(p)) );
-        fflush( stdout );
-    }
-//ABC_PRB( dd, bReached );
-    Cudd_RecursiveDeref( dd, bReached );
-    if ( nIters > pPars->nIterMax || nBddSize > pPars->nBddMax )
-    {
-        if ( !pPars->fSilent )
-            printf( "Verified only for states reachable in %d frames.  ", nIters );
-        return -1; // undecided
-    }
-    if ( !pPars->fSilent )
-        printf( "The miter is proved unreachable after %d iterations.  ", nIters );
-    pPars->iFrame = nIters - 1;
-    return 1; // unreachable
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs reachability to see if any PO can be asserted.]
-
-  Description []
-               
-  SideEffects []
- 
-  SeeAlso     []
-
-***********************************************************************/
-int Aig_ManVerifyUsingBdds_int( Aig_Man_t * p, Saig_ParBbr_t * pPars )
-{
-    int fCheckOutputs = !pPars->fSkipOutCheck;
-    DdManager * dd;
-    DdNode ** pbParts, ** pbOutputs;
-    DdNode * bInitial, * bTemp;
-    int RetValue, i, clk = clock();
-    Vec_Ptr_t * vOnionRings;
-
-    assert( Saig_ManRegNum(p) > 0 );
-
-    // compute the global BDDs of the latches
-    dd = Aig_ManComputeGlobalBdds( p, pPars->nBddMax, 1, pPars->fReorder, pPars->fVerbose );    
-    if ( dd == NULL )
-    {
-        if ( !pPars->fSilent )
-            printf( "The number of intermediate BDD nodes exceeded the limit (%d).\n", pPars->nBddMax );
-        return -1;
-    }
-    if ( pPars->fVerbose )
-        printf( "Shared BDD size is %6d nodes.\n", Cudd_ReadKeys(dd) - Cudd_ReadDead(dd) );
-
-    // check the runtime limit
-    if ( pPars->TimeLimit && ((float)pPars->TimeLimit <= (float)(clock()-clk)/(float)(CLOCKS_PER_SEC)) )
-    {
-        printf( "Reached timeout after constructing global BDDs (%d seconds).\n",  pPars->TimeLimit );
-        Cudd_Quit( dd );
-        return -1;
-    }
-
-    // start the onion rings
-    vOnionRings = Vec_PtrAlloc( 1000 );
-
-    // save outputs
-    pbOutputs = Aig_ManCreateOutputs( dd, p );
-
-    // create partitions
-    pbParts = Aig_ManCreatePartitions( dd, p, pPars->fReorder, pPars->fVerbose );
-
-    // create the initial state and the variable map
-    bInitial  = Aig_ManInitStateVarMap( dd, p, pPars->fVerbose );  Cudd_Ref( bInitial );
-
-    // set reordering
-    if ( pPars->fReorderImage )
-        Cudd_AutodynEnable( dd, CUDD_REORDER_SYMM_SIFT );
-
-    // check the result
-    RetValue = -1;
-    for ( i = 0; i < Saig_ManPoNum(p); i++ )
-    {
-        if ( fCheckOutputs && !Cudd_bddLeq( dd, bInitial, Cudd_Not(pbOutputs[i]) ) )
-        {
-            DdNode * bIntersect;
-            bIntersect = Cudd_bddIntersect( dd, bInitial, pbOutputs[i] );  Cudd_Ref( bIntersect );
-            assert( p->pSeqModel == NULL );
-            p->pSeqModel = Aig_ManVerifyUsingBddsCountExample( p, dd, pbParts, 
-                vOnionRings, bIntersect, i, pPars->fVerbose, pPars->fSilent ); 
-            Cudd_RecursiveDeref( dd, bIntersect );
-            if ( !pPars->fSilent )
-                printf( "The miter output %d is proved REACHABLE in the initial state (use \"write_counter\" to dump a witness). ", i );
-            RetValue = 0;
-            break;
-        }
-    }
-    // free the onion rings
-    Vec_PtrForEachEntry( DdNode *, vOnionRings, bTemp, i )
-        Cudd_RecursiveDeref( dd, bTemp );
-    Vec_PtrFree( vOnionRings );
-    // explore reachable states
-    if ( RetValue == -1 )
-        RetValue = Aig_ManComputeReachable( dd, p, pbParts, bInitial, pbOutputs, pPars, fCheckOutputs ); 
-
-    // cleanup
-    Cudd_RecursiveDeref( dd, bInitial );
-    for ( i = 0; i < Saig_ManRegNum(p); i++ )
-        Cudd_RecursiveDeref( dd, pbParts[i] );
-    ABC_FREE( pbParts );
-    for ( i = 0; i < Saig_ManPoNum(p); i++ )
-        Cudd_RecursiveDeref( dd, pbOutputs[i] );
-    ABC_FREE( pbOutputs );
-//    if ( RetValue == -1 )
-        Cudd_Quit( dd );
-//    else
-//        Bbr_StopManager( dd );
-
-    // report the runtime
-    if ( !pPars->fSilent )
-    {
-    ABC_PRT( "Time", clock() - clk );
-    fflush( stdout );
-    }
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs reachability to see if any PO can be asserted.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Aig_ManVerifyUsingBdds( Aig_Man_t * pInit, Saig_ParBbr_t * pPars )
-{
-    Abc_Cex_t * pCexOld, * pCexNew;
-    Aig_Man_t * p;
-    Aig_Obj_t * pObj;
-    Vec_Int_t * vInputMap;
-    int i, k, Entry, iBitOld, iBitNew, RetValue;
-//    pPars->fVerbose = 1;
-    // check if there are PIs without fanout
-    Saig_ManForEachPi( pInit, pObj, i )
-        if ( Aig_ObjRefs(pObj) == 0 )
-            break;
-    if ( i == Saig_ManPiNum(pInit) )
-        return Aig_ManVerifyUsingBdds_int( pInit, pPars );
-    // create new AIG
-    p = Aig_ManDupTrim( pInit );
-    assert( Aig_ManPiNum(p) < Aig_ManPiNum(pInit) );
-    assert( Aig_ManRegNum(p) == Aig_ManRegNum(pInit) );
-    RetValue = Aig_ManVerifyUsingBdds_int( p, pPars );
-    if ( RetValue != 0 )
-    {
-        Aig_ManStop( p );
-        return RetValue;
-    }
-    // the problem is satisfiable - remap the pattern
-    pCexOld = p->pSeqModel;
-    assert( pCexOld != NULL );
-    // create input map
-    vInputMap = Vec_IntAlloc( Saig_ManPiNum(pInit) );
-    Saig_ManForEachPi( pInit, pObj, i )
-        if ( pObj->pData != NULL )
-            Vec_IntPush( vInputMap, Aig_ObjPioNum((Aig_Obj_t *)pObj->pData) );
-        else
-            Vec_IntPush( vInputMap, -1 );
-    // create new pattern
-    pCexNew = Abc_CexAlloc( Saig_ManRegNum(pInit), Saig_ManPiNum(pInit), pCexOld->iFrame+1 );
-    pCexNew->iFrame = pCexOld->iFrame;
-    pCexNew->iPo    = pCexOld->iPo;
-    // copy the bit-data
-    for ( iBitOld = 0; iBitOld < pCexOld->nRegs; iBitOld++ )
-        if ( Aig_InfoHasBit( pCexOld->pData, iBitOld ) )
-            Aig_InfoSetBit( pCexNew->pData, iBitOld );
-    // copy the primary input data
-    iBitNew = iBitOld;
-    for ( i = 0; i <= pCexNew->iFrame; i++ )
-    {
-        Vec_IntForEachEntry( vInputMap, Entry, k )
-        {
-            if ( Entry == -1 )
-                continue;
-            if ( Aig_InfoHasBit( pCexOld->pData, iBitOld + Entry ) )
-                Aig_InfoSetBit( pCexNew->pData, iBitNew + k );
-        }
-        iBitOld += Saig_ManPiNum(p);
-        iBitNew += Saig_ManPiNum(pInit);
-    }
-    assert( iBitOld < iBitNew );
-    assert( iBitOld == pCexOld->nBits );
-    assert( iBitNew == pCexNew->nBits );
-    Vec_IntFree( vInputMap );
-    pInit->pSeqModel = pCexNew;
-    Aig_ManStop( p );
-    return 0;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/bbr/bbr_.c b/src/aig/bbr/bbr_.c
deleted file mode 100644
index df934f7d..00000000
--- a/src/aig/bbr/bbr_.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName []
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: .c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "__Int.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/bbr/module.make b/src/aig/bbr/module.make
deleted file mode 100644
index dce30a21..00000000
--- a/src/aig/bbr/module.make
+++ /dev/null
@@ -1,4 +0,0 @@
-SRC +=    src/aig/bbr/bbrCex.c \
-    src/aig/bbr/bbrImage.c \
-    src/aig/bbr/bbrNtbdd.c \
-    src/aig/bbr/bbrReach.c
diff --git a/src/aig/bdc/bdc.h b/src/aig/bdc/bdc.h
deleted file mode 100644
index 8a240b0c..00000000
--- a/src/aig/bdc/bdc.h
+++ /dev/null
@@ -1,92 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bdc.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Truth-table-based bi-decomposition engine.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - January 30, 2007.]
-
-  Revision    [$Id: bdc.h,v 1.00 2007/01/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __BDC_H__
-#define __BDC_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
- 
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Bdc_Fun_t_ Bdc_Fun_t;
-typedef struct Bdc_Man_t_ Bdc_Man_t;
-typedef struct Bdc_Par_t_ Bdc_Par_t;
-struct Bdc_Par_t_
-{
-    // general parameters
-    int           nVarsMax;      // the maximum support
-    int           fVerbose;      // enable basic stats
-    int           fVeryVerbose;  // enable detailed stats
-};
-
-// working with complemented attributes of objects
-static inline int         Bdc_IsComplement( Bdc_Fun_t * p )      { return (int)((ABC_PTRUINT_T)p & (ABC_PTRUINT_T)01);              }
-static inline Bdc_Fun_t * Bdc_Regular( Bdc_Fun_t * p )           { return (Bdc_Fun_t *)((ABC_PTRUINT_T)p & ~(ABC_PTRUINT_T)01);     }
-static inline Bdc_Fun_t * Bdc_Not( Bdc_Fun_t * p )               { return (Bdc_Fun_t *)((ABC_PTRUINT_T)p ^  (ABC_PTRUINT_T)01);     }
-static inline Bdc_Fun_t * Bdc_NotCond( Bdc_Fun_t * p, int c )    { return (Bdc_Fun_t *)((ABC_PTRUINT_T)p ^  (ABC_PTRUINT_T)(c!=0)); }
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== bdcCore.c ==========================================================*/
-extern Bdc_Man_t * Bdc_ManAlloc( Bdc_Par_t * pPars );
-extern void        Bdc_ManFree( Bdc_Man_t * p );
-extern int         Bdc_ManDecompose( Bdc_Man_t * p, unsigned * puFunc, unsigned * puCare, int nVars, Vec_Ptr_t * vDivs, int nNodesMax );
-extern Bdc_Fun_t * Bdc_ManFunc( Bdc_Man_t * p, int i );
-extern Bdc_Fun_t * Bdc_ManRoot( Bdc_Man_t * p );
-extern int         Bdc_ManNodeNum( Bdc_Man_t * p );
-extern Bdc_Fun_t * Bdc_FuncFanin0( Bdc_Fun_t * p );
-extern Bdc_Fun_t * Bdc_FuncFanin1( Bdc_Fun_t * p );
-extern void *      Bdc_FuncCopy( Bdc_Fun_t * p );
-extern int         Bdc_FuncCopyInt( Bdc_Fun_t * p );
-extern void        Bdc_FuncSetCopy( Bdc_Fun_t * p, void * pCopy );
-extern void        Bdc_FuncSetCopyInt( Bdc_Fun_t * p, int iCopy );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/bdc/bdcCore.c b/src/aig/bdc/bdcCore.c
deleted file mode 100644
index 58324f81..00000000
--- a/src/aig/bdc/bdcCore.c
+++ /dev/null
@@ -1,314 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bdcCore.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Truth-table-based bi-decomposition engine.]
-
-  Synopsis    [The gateway to bi-decomposition.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - January 30, 2007.]
-
-  Revision    [$Id: bdcCore.c,v 1.00 2007/01/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "bdcInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Accessing contents of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bdc_Fun_t *  Bdc_ManFunc( Bdc_Man_t * p, int i )               { return Bdc_FunWithId(p, i); }
-Bdc_Fun_t *  Bdc_ManRoot( Bdc_Man_t * p )                      { return p->pRoot;            }
-int          Bdc_ManNodeNum( Bdc_Man_t * p )                   { return p->nNodes;           }
-Bdc_Fun_t *  Bdc_FuncFanin0( Bdc_Fun_t * p )                   { return p->pFan0;            }
-Bdc_Fun_t *  Bdc_FuncFanin1( Bdc_Fun_t * p )                   { return p->pFan1;            }
-void *       Bdc_FuncCopy( Bdc_Fun_t * p )                     { return p->pCopy;            }
-int          Bdc_FuncCopyInt( Bdc_Fun_t * p )                  { return p->iCopy;            }
-void         Bdc_FuncSetCopy( Bdc_Fun_t * p, void * pCopy )    { p->pCopy = pCopy;           }
-void         Bdc_FuncSetCopyInt( Bdc_Fun_t * p, int iCopy )    { p->iCopy = iCopy;           }
-
-/**Function*************************************************************
-
-  Synopsis    [Allocate resynthesis manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bdc_Man_t * Bdc_ManAlloc( Bdc_Par_t * pPars )
-{
-    Bdc_Man_t * p;
-    p = ABC_ALLOC( Bdc_Man_t, 1 );
-    memset( p, 0, sizeof(Bdc_Man_t) );
-    assert( pPars->nVarsMax > 1 && pPars->nVarsMax < 16 );
-    p->pPars = pPars;
-    p->nWords = Kit_TruthWordNum( pPars->nVarsMax );
-    p->nDivsLimit = 200;
-    // internal nodes
-    p->nNodesAlloc = 512;
-    p->pNodes = ABC_ALLOC( Bdc_Fun_t, p->nNodesAlloc );
-    // memory
-    p->vMemory = Vec_IntStart( 8 * p->nWords * p->nNodesAlloc );
-    Vec_IntClear(p->vMemory);
-    // set up hash table
-    p->nTableSize = (1 << p->pPars->nVarsMax);
-    p->pTable = ABC_ALLOC( Bdc_Fun_t *, p->nTableSize );
-    memset( p->pTable, 0, sizeof(Bdc_Fun_t *) * p->nTableSize );
-    p->vSpots = Vec_IntAlloc( 256 );
-    // truth tables
-    p->vTruths = Vec_PtrAllocTruthTables( p->pPars->nVarsMax );
-    p->puTemp1 = ABC_ALLOC( unsigned, 4 * p->nWords );
-    p->puTemp2 = p->puTemp1 + p->nWords;
-    p->puTemp3 = p->puTemp2 + p->nWords;
-    p->puTemp4 = p->puTemp3 + p->nWords;
-    // start the internal ISFs
-    p->pIsfOL = &p->IsfOL;  Bdc_IsfStart( p, p->pIsfOL );
-    p->pIsfOR = &p->IsfOR;  Bdc_IsfStart( p, p->pIsfOR );
-    p->pIsfAL = &p->IsfAL;  Bdc_IsfStart( p, p->pIsfAL );
-    p->pIsfAR = &p->IsfAR;  Bdc_IsfStart( p, p->pIsfAR );   
-    return p; 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocate resynthesis manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_ManFree( Bdc_Man_t * p )
-{
-    if ( p->pPars->fVerbose )
-    {
-        printf( "Bi-decomposition stats: Calls = %d.  Nodes = %d. Reuse = %d.\n", 
-            p->numCalls, p->numNodes, p->numReuse );
-        printf( "ANDs = %d.  ORs = %d.  Weak = %d.  Muxes = %d.  Memory = %.2f K\n", 
-            p->numAnds, p->numOrs, p->numWeaks, p->numMuxes, 4.0 * Vec_IntSize(p->vMemory) / (1<<10) );
-        ABC_PRT( "Cache", p->timeCache );
-        ABC_PRT( "Check", p->timeCheck );
-        ABC_PRT( "Muxes", p->timeMuxes );
-        ABC_PRT( "Supps", p->timeSupps );
-        ABC_PRT( "TOTAL", p->timeTotal );
-    }
-    Vec_IntFree( p->vMemory );
-    Vec_IntFree( p->vSpots );
-    Vec_PtrFree( p->vTruths );
-    ABC_FREE( p->puTemp1 );
-    ABC_FREE( p->pNodes );
-    ABC_FREE( p->pTable );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Clears the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_ManPrepare( Bdc_Man_t * p, Vec_Ptr_t * vDivs )
-{
-    unsigned * puTruth;
-    Bdc_Fun_t * pNode;
-    int i;
-    Bdc_TableClear( p );
-    Vec_IntClear( p->vMemory );
-    // add constant 1 and elementary vars
-    p->nNodes = 0;
-    p->nNodesNew = - 1 - p->nVars - (vDivs? Vec_PtrSize(vDivs) : 0);
-    // add constant 1
-    pNode = Bdc_FunNew( p );
-    pNode->Type = BDC_TYPE_CONST1;
-    pNode->puFunc = (unsigned *)Vec_IntFetch(p->vMemory, p->nWords); 
-    Kit_TruthFill( pNode->puFunc, p->nVars );
-    pNode->uSupp = 0;
-    Bdc_TableAdd( p, pNode );
-    // add variables
-    for ( i = 0; i < p->nVars; i++ )
-    {
-        pNode = Bdc_FunNew( p );
-        pNode->Type = BDC_TYPE_PI;
-        pNode->puFunc = (unsigned *)Vec_PtrEntry( p->vTruths, i );
-        pNode->uSupp = (1 << i);
-        Bdc_TableAdd( p, pNode );
-    }
-    // add the divisors
-    if ( vDivs )
-    Vec_PtrForEachEntry( unsigned *, vDivs, puTruth, i )
-    {
-        pNode = Bdc_FunNew( p );
-        pNode->Type = BDC_TYPE_PI;
-        pNode->puFunc = puTruth;
-        pNode->uSupp = Kit_TruthSupport( puTruth, p->nVars );
-        Bdc_TableAdd( p, pNode );
-        if ( i == p->nDivsLimit )
-            break;
-    }
-    assert( p->nNodesNew == 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Clears the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_ManDecPrint( Bdc_Man_t * p )
-{
-    Bdc_Fun_t * pNode;
-    int i;
-    printf( " 0 : Const 1\n" );
-    for ( i = 1; i < p->nNodes; i++ )
-    {
-        printf( " %d : ", i );
-        pNode = p->pNodes + i;
-        if ( pNode->Type == BDC_TYPE_PI )
-            printf( "PI   " );
-        else
-        {
-            printf( "%s%d &", Bdc_IsComplement(pNode->pFan0)? "-":"", Bdc_FunId(p,Bdc_Regular(pNode->pFan0)) );
-            printf( " %s%d   ", Bdc_IsComplement(pNode->pFan1)? "-":"", Bdc_FunId(p,Bdc_Regular(pNode->pFan1)) );
-        }
-        Extra_PrintBinary( stdout, pNode->puFunc, (1<<p->nVars) );
-        printf( "\n" );
-    }
-    printf( "Root = %s%d.\n", Bdc_IsComplement(p->pRoot)? "-":"", Bdc_FunId(p,Bdc_Regular(p->pRoot)) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs decomposition of one function.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bdc_ManDecompose( Bdc_Man_t * p, unsigned * puFunc, unsigned * puCare, int nVars, Vec_Ptr_t * vDivs, int nNodesMax )
-{
-    Bdc_Isf_t Isf, * pIsf = &Isf;
-    int clk = clock();
-    assert( nVars <= p->pPars->nVarsMax );
-    // set current manager parameters
-    p->nVars = nVars;
-    p->nWords = Kit_TruthWordNum( nVars );
-    p->nNodesMax = nNodesMax;
-    Bdc_ManPrepare( p, vDivs );
-    if ( puCare && Kit_TruthIsConst0( puCare, nVars ) )
-    {
-        p->pRoot = Bdc_Not(p->pNodes);
-        return 0;
-    }
-    // copy the function
-    Bdc_IsfStart( p, pIsf );
-    if ( puCare )
-    {
-        Kit_TruthAnd( pIsf->puOn, puCare, puFunc, p->nVars );
-        Kit_TruthSharp( pIsf->puOff, puCare, puFunc, p->nVars );
-    }
-    else
-    {
-        Kit_TruthCopy( pIsf->puOn, puFunc, p->nVars );
-        Kit_TruthNot( pIsf->puOff, puFunc, p->nVars );
-    }
-    Bdc_SuppMinimize( p, pIsf );
-    // call decomposition
-    p->pRoot = Bdc_ManDecompose_rec( p, pIsf );
-    p->timeTotal += clock() - clk;
-    p->numCalls++;
-    p->numNodes += p->nNodesNew;
-    if ( p->pRoot == NULL )
-        return -1;
-    if ( !Bdc_ManNodeVerify( p, pIsf, p->pRoot ) )
-        printf( "Bdc_ManDecompose(): Internal verification failed.\n" );
-//    assert( Bdc_ManNodeVerify( p, pIsf, p->pRoot ) );
-    return p->nNodesNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs decomposition of one function.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_ManDecomposeTest( unsigned uTruth, int nVars )
-{
-    static int Counter = 0;
-    static int Total = 0;
-    Bdc_Par_t Pars = {0}, * pPars = &Pars;
-    Bdc_Man_t * p;
-    int RetValue;
-//    unsigned uCare = ~0x888f888f;
-    unsigned uCare = ~0;
-//    unsigned uFunc =  0x88888888;
-//    unsigned uFunc =  0xf888f888;
-//    unsigned uFunc =  0x117e117e;
-//    unsigned uFunc =  0x018b018b;
-    unsigned uFunc = uTruth; 
-
-    pPars->nVarsMax = 8;
-    p = Bdc_ManAlloc( pPars );
-    RetValue = Bdc_ManDecompose( p, &uFunc, &uCare, nVars, NULL, 1000 );
-    Total += RetValue;
-    printf( "%5d : Nodes = %5d. Total = %8d.\n", ++Counter, RetValue, Total );
-//    Bdc_ManDecPrint( p );
-    Bdc_ManFree( p );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/bdc/bdcDec.c b/src/aig/bdc/bdcDec.c
deleted file mode 100644
index 61f46f17..00000000
--- a/src/aig/bdc/bdcDec.c
+++ /dev/null
@@ -1,751 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bdcDec.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Truth-table-based bi-decomposition engine.]
-
-  Synopsis    [Decomposition procedures.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - January 30, 2007.]
-
-  Revision    [$Id: bdcDec.c,v 1.00 2007/01/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "bdcInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Minimizes the support of the ISF.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_SuppMinimize2( Bdc_Man_t * p, Bdc_Isf_t * pIsf )
-{
-    int v;
-    int clk = 0; // Suppress "might be used uninitialized"
-    if ( p->pPars->fVerbose )
-        clk = clock();
-    // compute support
-    pIsf->uSupp = Kit_TruthSupport( pIsf->puOn, p->nVars ) | 
-        Kit_TruthSupport( pIsf->puOff, p->nVars );
-    // go through the support variables
-    for ( v = 0; v < p->nVars; v++ )
-    {
-        if ( (pIsf->uSupp & (1 << v)) == 0 )
-            continue;
-        Kit_TruthExistNew( p->puTemp1, pIsf->puOn, p->nVars, v );
-        Kit_TruthExistNew( p->puTemp2, pIsf->puOff, p->nVars, v );
-        if ( !Kit_TruthIsDisjoint( p->puTemp1, p->puTemp2, p->nVars ) )
-            continue;
-//        if ( !Kit_TruthVarIsVacuous( pIsf->puOn, pIsf->puOff, p->nVars, v ) )
-//            continue;
-        // remove the variable
-        Kit_TruthCopy( pIsf->puOn, p->puTemp1, p->nVars );
-        Kit_TruthCopy( pIsf->puOff, p->puTemp2, p->nVars );
-//        Kit_TruthExist( pIsf->puOn, p->nVars, v );
-//        Kit_TruthExist( pIsf->puOff, p->nVars, v );
-        pIsf->uSupp &= ~(1 << v);
-    }
-    if ( p->pPars->fVerbose )
-        p->timeSupps += clock() - clk;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Minimizes the support of the ISF.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_SuppMinimize( Bdc_Man_t * p, Bdc_Isf_t * pIsf )
-{
-    int v;
-    int clk = 0; // Suppress "might be used uninitialized"
-    if ( p->pPars->fVerbose )
-        clk = clock();
-    // go through the support variables
-    pIsf->uSupp = 0;
-    for ( v = 0; v < p->nVars; v++ )
-    {
-        if ( !Kit_TruthVarInSupport( pIsf->puOn, p->nVars, v ) && 
-             !Kit_TruthVarInSupport( pIsf->puOff, p->nVars, v ) )
-              continue;
-        if ( Kit_TruthVarIsVacuous( pIsf->puOn, pIsf->puOff, p->nVars, v ) )
-        {
-            Kit_TruthExist( pIsf->puOn, p->nVars, v );
-            Kit_TruthExist( pIsf->puOff, p->nVars, v );
-            continue;
-        }
-        pIsf->uSupp |= (1 << v);
-    }
-    if ( p->pPars->fVerbose )
-        p->timeSupps += clock() - clk;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the ISF of the right after the left was decompoosed.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bdc_DecomposeUpdateRight( Bdc_Man_t * p, Bdc_Isf_t * pIsf, Bdc_Isf_t * pIsfL, Bdc_Isf_t * pIsfR, Bdc_Fun_t * pFunc0, Bdc_Type_t Type )
-{
-    unsigned * puTruth = p->puTemp1;
-    // get the truth table of the left branch
-    if ( Bdc_IsComplement(pFunc0) )
-        Kit_TruthNot( puTruth, Bdc_Regular(pFunc0)->puFunc, p->nVars );
-    else
-        Kit_TruthCopy( puTruth, pFunc0->puFunc, p->nVars );
-    // split into parts
-    if ( Type == BDC_TYPE_OR ) 
-    {
-//        Right.Q = bdd_appex( Q, CompSpecLeftF, bddop_diff, setRightRes );
-//        Right.R = bdd_exist( R, setRightRes );
-
-//        if ( pR->Q )  Cudd_RecursiveDeref( dd, pR->Q );
-//        if ( pR->R )  Cudd_RecursiveDeref( dd, pR->R );
-//        pR->Q = Cudd_bddAndAbstract( dd, pF->Q, Cudd_Not(CompSpecF), pL->V );    Cudd_Ref( pR->Q );
-//        pR->R = Cudd_bddExistAbstract( dd, pF->R, pL->V );                      Cudd_Ref( pR->R );
-
-//        assert( pR->R != b0 );
-//        return (int)( pR->Q == b0 );
-
-        Kit_TruthSharp( pIsfR->puOn, pIsf->puOn, puTruth, p->nVars );
-        Kit_TruthExistSet( pIsfR->puOn, pIsfR->puOn, p->nVars, pIsfL->uUniq ); 
-        Kit_TruthExistSet( pIsfR->puOff, pIsf->puOff, p->nVars, pIsfL->uUniq ); 
-//        assert( Kit_TruthIsDisjoint(pIsfR->puOn, pIsfR->puOff, p->nVars) );
-        assert( !Kit_TruthIsConst0(pIsfR->puOff, p->nVars) );
-        return Kit_TruthIsConst0(pIsfR->puOn, p->nVars);
-    }
-    else if ( Type == BDC_TYPE_AND )
-    {
-//        Right.R = bdd_appex( R, CompSpecLeftF, bddop_and, setRightRes );
-//        Right.Q = bdd_exist( Q, setRightRes );
-
-//        if ( pR->Q )  Cudd_RecursiveDeref( dd, pR->Q );
-//        if ( pR->R )  Cudd_RecursiveDeref( dd, pR->R );
-//        pR->R = Cudd_bddAndAbstract( dd, pF->R, CompSpecF, pL->V );                Cudd_Ref( pR->R );
-//        pR->Q = Cudd_bddExistAbstract( dd, pF->Q, pL->V );                      Cudd_Ref( pR->Q );
-
-//        assert( pR->Q != b0 );
-//        return (int)( pR->R == b0 );
-
-        Kit_TruthAnd( pIsfR->puOff, pIsf->puOff, puTruth, p->nVars );
-        Kit_TruthExistSet( pIsfR->puOff, pIsfR->puOff, p->nVars, pIsfL->uUniq ); 
-        Kit_TruthExistSet( pIsfR->puOn, pIsf->puOn, p->nVars, pIsfL->uUniq ); 
-//        assert( Kit_TruthIsDisjoint(pIsfR->puOn, pIsfR->puOff, p->nVars) );
-        assert( !Kit_TruthIsConst0(pIsfR->puOn, p->nVars) );
-        return Kit_TruthIsConst0(pIsfR->puOff, p->nVars);
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks existence of OR-bidecomposition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Bdc_DecomposeGetCost( Bdc_Man_t * p, int nLeftVars, int nRightVars )
-{
-    assert( nLeftVars > 0 );
-    assert( nRightVars > 0 );
-    // compute the decomposition coefficient
-    if ( nLeftVars >= nRightVars )
-        return BDC_SCALE * (p->nVars * nRightVars + nLeftVars);
-    else // if ( nLeftVars < nRightVars )
-        return BDC_SCALE * (p->nVars * nLeftVars + nRightVars);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks existence of weak OR-bidecomposition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bdc_DecomposeFindInitialVarSet( Bdc_Man_t * p, Bdc_Isf_t * pIsf, Bdc_Isf_t * pIsfL, Bdc_Isf_t * pIsfR )
-{
-    char pVars[16];
-    int v, nVars, Beg, End;
-
-    assert( pIsfL->uSupp == 0 );
-    assert( pIsfR->uSupp == 0 );
-
-    // fill in the variables
-    nVars = 0;
-    for ( v = 0; v < p->nVars; v++ )
-        if ( pIsf->uSupp & (1 << v) )
-            pVars[nVars++] = v;
-
-    // try variable pairs
-    for ( Beg = 0; Beg < nVars; Beg++ )
-    {
-        Kit_TruthExistNew( p->puTemp1, pIsf->puOff, p->nVars, pVars[Beg] ); 
-        for ( End = nVars - 1; End > Beg; End-- )
-        {
-            Kit_TruthExistNew( p->puTemp2, pIsf->puOff, p->nVars, pVars[End] ); 
-            if ( Kit_TruthIsDisjoint3(pIsf->puOn, p->puTemp1, p->puTemp2, p->nVars) )
-            {
-                pIsfL->uUniq = (1 << pVars[Beg]);
-                pIsfR->uUniq = (1 << pVars[End]);
-                return 1;
-            }
-        }
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks existence of weak OR-bidecomposition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bdc_DecomposeWeakOr( Bdc_Man_t * p, Bdc_Isf_t * pIsf, Bdc_Isf_t * pIsfL, Bdc_Isf_t * pIsfR )
-{
-    int v, VarCost;
-  int VarBest = -1; // Suppress "might be used uninitialized"
-  int Cost, VarCostBest = 0;
-
-    for ( v = 0; v < p->nVars; v++ )
-    {
-        if ( (pIsf->uSupp & (1 << v)) == 0 )
-            continue;
-//        if ( (Q & !bdd_exist( R, VarSetXa )) != bddfalse )
-//        Exist = Cudd_bddExistAbstract( dd, pF->R, Var );   Cudd_Ref( Exist );
-//        if ( Cudd_bddIteConstant( dd, pF->Q, Cudd_Not(Exist), b0 ) != b0 )
-
-        Kit_TruthExistNew( p->puTemp1, pIsf->puOff, p->nVars, v );
-        if ( !Kit_TruthIsImply( pIsf->puOn, p->puTemp1, p->nVars ) )
-        {
-            // measure the cost of this variable
-//            VarCost = bdd_satcountset( bdd_forall( Q, VarSetXa ), VarCube );
-//            Univ = Cudd_bddUnivAbstract( dd, pF->Q, Var );   Cudd_Ref( Univ );
-//            VarCost = Kit_TruthCountOnes( Univ, p->nVars );
-//            Cudd_RecursiveDeref( dd, Univ );
-
-            Kit_TruthForallNew( p->puTemp2, pIsf->puOn, p->nVars, v );
-            VarCost = Kit_TruthCountOnes( p->puTemp2, p->nVars );
-            if ( VarCost == 0 )
-                VarCost = 1;
-            if ( VarCostBest < VarCost )
-            {
-                VarCostBest = VarCost;
-                VarBest = v;
-            }
-        }
-    }
-
-    // derive the components for weak-bi-decomposition if the variable is found
-    if ( VarCostBest )
-    {
-//        funQLeftRes = Q & bdd_exist( R, setRightORweak );
-//        Temp = Cudd_bddExistAbstract( dd, pF->R, VarBest );     Cudd_Ref( Temp );
-//        pL->Q = Cudd_bddAnd( dd, pF->Q, Temp );                    Cudd_Ref( pL->Q );
-//        Cudd_RecursiveDeref( dd, Temp );
-
-        Kit_TruthExistNew( p->puTemp1, pIsf->puOff, p->nVars, VarBest );
-        Kit_TruthAnd( pIsfL->puOn, pIsf->puOn, p->puTemp1, p->nVars );
-
-//        pL->R = pF->R;                                            Cudd_Ref( pL->R );
-//        pL->V = VarBest;                                        Cudd_Ref( pL->V );
-        Kit_TruthCopy( pIsfL->puOff, pIsf->puOff, p->nVars );
-        pIsfL->uUniq = (1 << VarBest);
-        pIsfR->uUniq = 0;
-
-//        assert( pL->Q != b0 );
-//        assert( pL->R != b0 );
-//        assert( Cudd_bddIteConstant( dd, pL->Q, pL->R, b0 ) == b0 );
-//        assert( Kit_TruthIsDisjoint(pIsfL->puOn, pIsfL->puOff, p->nVars) );
-
-        // express cost in percents of the covered boolean space
-        Cost = VarCostBest * BDC_SCALE / (1<<p->nVars);
-        if ( Cost == 0 )
-            Cost = 1;
-        return Cost;
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks existence of OR-bidecomposition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bdc_DecomposeOr( Bdc_Man_t * p, Bdc_Isf_t * pIsf, Bdc_Isf_t * pIsfL, Bdc_Isf_t * pIsfR )
-{
-    unsigned uSupportRem;
-    int v, nLeftVars = 1, nRightVars = 1; 
-    // clean the var sets
-    Bdc_IsfStart( p, pIsfL );
-    Bdc_IsfStart( p, pIsfR );
-    // check that the support is correct
-    assert( Kit_TruthSupport(pIsf->puOn, p->nVars) == Kit_TruthSupport(pIsf->puOff, p->nVars) );
-    assert( pIsf->uSupp == Kit_TruthSupport(pIsf->puOn, p->nVars) );
-    // find initial variable sets
-    if ( !Bdc_DecomposeFindInitialVarSet( p, pIsf, pIsfL, pIsfR ) )
-        return Bdc_DecomposeWeakOr( p, pIsf, pIsfL, pIsfR );
-    // prequantify the variables in the offset
-    Kit_TruthExistSet( p->puTemp1, pIsf->puOff, p->nVars, pIsfL->uUniq ); 
-    Kit_TruthExistSet( p->puTemp2, pIsf->puOff, p->nVars, pIsfR->uUniq );
-    // go through the remaining variables
-    uSupportRem = pIsf->uSupp & ~pIsfL->uUniq & ~pIsfR->uUniq;
-    for ( v = 0; v < p->nVars; v++ )
-    {
-        if ( (uSupportRem & (1 << v)) == 0 )
-            continue;
-        // prequantify this variable
-        Kit_TruthExistNew( p->puTemp3, p->puTemp1, p->nVars, v );
-        Kit_TruthExistNew( p->puTemp4, p->puTemp2, p->nVars, v );
-        if ( nLeftVars < nRightVars )
-        {
-//            if ( (Q & bdd_exist( pF->R, pL->V & VarNew ) & bdd_exist( pF->R, pR->V )) == bddfalse )
-//            if ( VerifyORCondition( dd, pF->Q, pF->R, pL->V, pR->V, VarNew ) )
-            if ( Kit_TruthIsDisjoint3(pIsf->puOn, p->puTemp3, p->puTemp2, p->nVars) )
-            {
-//                pL->V &= VarNew;
-                pIsfL->uUniq |= (1 << v);
-                nLeftVars++;
-                Kit_TruthCopy( p->puTemp1, p->puTemp3, p->nVars );
-            }
-//            else if ( (Q & bdd_exist( pF->R, pR->V & VarNew ) & bdd_exist( pF->R, pL->V )) == bddfalse )
-            else if ( Kit_TruthIsDisjoint3(pIsf->puOn, p->puTemp4, p->puTemp1, p->nVars) )
-            {
-//                pR->V &= VarNew;
-                pIsfR->uUniq |= (1 << v);
-                nRightVars++;
-                Kit_TruthCopy( p->puTemp2, p->puTemp4, p->nVars );
-            }
-        }
-        else
-        {
-//            if ( (Q & bdd_exist( pF->R, pR->V & VarNew ) & bdd_exist( pF->R, pL->V )) == bddfalse )
-            if ( Kit_TruthIsDisjoint3(pIsf->puOn, p->puTemp4, p->puTemp1, p->nVars) )
-            {
-//                pR->V &= VarNew;
-                pIsfR->uUniq |= (1 << v);
-                nRightVars++;
-                Kit_TruthCopy( p->puTemp2, p->puTemp4, p->nVars );
-            }
-//            else if ( (Q & bdd_exist( pF->R, pL->V & VarNew ) & bdd_exist( pF->R, pR->V )) == bddfalse )
-            else if ( Kit_TruthIsDisjoint3(pIsf->puOn, p->puTemp3, p->puTemp2, p->nVars) )
-            {
-//                pL->V &= VarNew;
-                pIsfL->uUniq |= (1 << v);
-                nLeftVars++;
-                Kit_TruthCopy( p->puTemp1, p->puTemp3, p->nVars );
-            }
-        }
-    }
-
-    // derive the functions Q and R for the left branch
-//    pL->Q = bdd_appex( pF->Q, bdd_exist( pF->R, pL->V ), bddop_and, pR->V );
-//    pL->R = bdd_exist( pF->R, pR->V );
-
-//    Temp = Cudd_bddExistAbstract( dd, pF->R, pL->V );      Cudd_Ref( Temp );
-//    pL->Q = Cudd_bddAndAbstract( dd, pF->Q, Temp, pR->V ); Cudd_Ref( pL->Q );
-//    Cudd_RecursiveDeref( dd, Temp );
-//    pL->R = Cudd_bddExistAbstract( dd, pF->R, pR->V );     Cudd_Ref( pL->R );
-
-    Kit_TruthAnd( pIsfL->puOn, pIsf->puOn, p->puTemp1, p->nVars );
-    Kit_TruthExistSet( pIsfL->puOn, pIsfL->puOn, p->nVars, pIsfR->uUniq );
-    Kit_TruthCopy( pIsfL->puOff, p->puTemp2, p->nVars );
-
-//    assert( pL->Q != b0 );
-//    assert( pL->R != b0 );
-//    assert( Cudd_bddIteConstant( dd, pL->Q, pL->R, b0 ) == b0 );
-    assert( !Kit_TruthIsConst0(pIsfL->puOn, p->nVars) );
-    assert( !Kit_TruthIsConst0(pIsfL->puOff, p->nVars) );
-//    assert( Kit_TruthIsDisjoint(pIsfL->puOn, pIsfL->puOff, p->nVars) );
-
-    // derive the functions Q and R for the right branch
-//    Temp = Cudd_bddExistAbstract( dd, pF->R, pR->V );      Cudd_Ref( Temp );
-//    pR->Q = Cudd_bddAndAbstract( dd, pF->Q, Temp, pL->V ); Cudd_Ref( pR->Q );
-//    Cudd_RecursiveDeref( dd, Temp );
-//    pR->R = Cudd_bddExistAbstract( dd, pF->R, pL->V );     Cudd_Ref( pR->R );
-
-    Kit_TruthAnd( pIsfR->puOn, pIsf->puOn, p->puTemp2, p->nVars );
-    Kit_TruthExistSet( pIsfR->puOn, pIsfR->puOn, p->nVars, pIsfL->uUniq );
-    Kit_TruthCopy( pIsfR->puOff, p->puTemp1, p->nVars );
-
-    assert( !Kit_TruthIsConst0(pIsfR->puOn, p->nVars) );
-    assert( !Kit_TruthIsConst0(pIsfR->puOff, p->nVars) );
-//    assert( Kit_TruthIsDisjoint(pIsfR->puOn, pIsfR->puOff, p->nVars) );
-
-    assert( pIsfL->uUniq );
-    assert( pIsfR->uUniq );
-    return Bdc_DecomposeGetCost( p, nLeftVars, nRightVars );        
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one step of bi-decomposition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bdc_Type_t Bdc_DecomposeStep( Bdc_Man_t * p, Bdc_Isf_t * pIsf, Bdc_Isf_t * pIsfL, Bdc_Isf_t * pIsfR )
-{
-    int WeightOr, WeightAnd, WeightOrL, WeightOrR, WeightAndL, WeightAndR;
-
-    Bdc_IsfClean( p->pIsfOL );
-    Bdc_IsfClean( p->pIsfOR );
-    Bdc_IsfClean( p->pIsfAL );
-    Bdc_IsfClean( p->pIsfAR );
-
-    // perform OR decomposition
-    WeightOr = Bdc_DecomposeOr( p, pIsf, p->pIsfOL, p->pIsfOR );
-
-    // perform AND decomposition
-    Bdc_IsfNot( pIsf );
-    WeightAnd = Bdc_DecomposeOr( p, pIsf, p->pIsfAL, p->pIsfAR );
-    Bdc_IsfNot( pIsf );
-    Bdc_IsfNot( p->pIsfAL );
-    Bdc_IsfNot( p->pIsfAR );
-
-    // check the case when decomposition does not exist
-    if ( WeightOr == 0 && WeightAnd == 0 )
-    {
-        Bdc_IsfCopy( pIsfL, p->pIsfOL );
-        Bdc_IsfCopy( pIsfR, p->pIsfOR );
-        return BDC_TYPE_MUX;
-    }
-    // check the hash table
-    assert( WeightOr || WeightAnd );
-    WeightOrL = WeightOrR = 0;
-    if ( WeightOr )
-    {
-        if ( p->pIsfOL->uUniq )
-        {
-            Bdc_SuppMinimize( p, p->pIsfOL );
-            WeightOrL = (Bdc_TableLookup(p, p->pIsfOL) != NULL);
-        }
-        if ( p->pIsfOR->uUniq )
-        {
-            Bdc_SuppMinimize( p, p->pIsfOR );
-            WeightOrR = (Bdc_TableLookup(p, p->pIsfOR) != NULL);
-        }
-    }
-    WeightAndL = WeightAndR = 0;
-    if ( WeightAnd )
-    {
-        if ( p->pIsfAL->uUniq )
-        {
-            Bdc_SuppMinimize( p, p->pIsfAL );
-            WeightAndL = (Bdc_TableLookup(p, p->pIsfAL) != NULL);
-        }
-        if ( p->pIsfAR->uUniq )
-        {
-            Bdc_SuppMinimize( p, p->pIsfAR );
-            WeightAndR = (Bdc_TableLookup(p, p->pIsfAR) != NULL);
-        }
-    }
-
-    // check if there is any reuse for the components
-    if ( WeightOrL + WeightOrR > WeightAndL + WeightAndR )
-    {
-        p->numReuse++;
-        p->numOrs++;
-        Bdc_IsfCopy( pIsfL, p->pIsfOL );
-        Bdc_IsfCopy( pIsfR, p->pIsfOR );
-        return BDC_TYPE_OR;
-    }
-    if ( WeightOrL + WeightOrR < WeightAndL + WeightAndR )
-    {
-        p->numReuse++;
-        p->numAnds++;
-        Bdc_IsfCopy( pIsfL, p->pIsfAL );
-        Bdc_IsfCopy( pIsfR, p->pIsfAR );
-        return BDC_TYPE_AND; 
-    }
-
-    // compare the two-component costs
-    if ( WeightOr > WeightAnd )
-    {
-        if ( WeightOr < BDC_SCALE )
-            p->numWeaks++;
-        p->numOrs++;
-        Bdc_IsfCopy( pIsfL, p->pIsfOL );
-        Bdc_IsfCopy( pIsfR, p->pIsfOR );
-        return BDC_TYPE_OR;
-    }
-    if ( WeightAnd < BDC_SCALE )
-        p->numWeaks++;
-    p->numAnds++;
-    Bdc_IsfCopy( pIsfL, p->pIsfAL );
-    Bdc_IsfCopy( pIsfR, p->pIsfAR );
-    return BDC_TYPE_AND;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find variable that leads to minimum sum of support sizes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bdc_DecomposeStepMux( Bdc_Man_t * p, Bdc_Isf_t * pIsf, Bdc_Isf_t * pIsfL, Bdc_Isf_t * pIsfR )
-{
-    int Var, VarMin, nSuppMin, nSuppCur;
-    unsigned uSupp0, uSupp1;
-    int clk = 0; // Suppress "might be used uninitialized"
-    if ( p->pPars->fVerbose )
-        clk = clock();
-    VarMin = -1;
-    nSuppMin = 1000;
-    for ( Var = 0; Var < p->nVars; Var++ )
-    {
-        if ( (pIsf->uSupp & (1 << Var)) == 0 )
-            continue;
-        Kit_TruthCofactor0New( pIsfL->puOn,  pIsf->puOn,  p->nVars, Var );
-        Kit_TruthCofactor0New( pIsfL->puOff, pIsf->puOff, p->nVars, Var );
-        Kit_TruthCofactor1New( pIsfR->puOn,  pIsf->puOn,  p->nVars, Var );
-        Kit_TruthCofactor1New( pIsfR->puOff, pIsf->puOff, p->nVars, Var );
-        uSupp0 = Kit_TruthSupport( pIsfL->puOn, p->nVars ) & Kit_TruthSupport( pIsfL->puOff, p->nVars );
-        uSupp1 = Kit_TruthSupport( pIsfR->puOn, p->nVars ) & Kit_TruthSupport( pIsfR->puOff, p->nVars );
-        nSuppCur = Kit_WordCountOnes(uSupp0) + Kit_WordCountOnes(uSupp1);  
-        if ( nSuppMin > nSuppCur )
-        {
-            nSuppMin = nSuppCur;
-            VarMin = Var;
-            break;
-        }
-    }
-    if ( VarMin >= 0 )
-    {
-        Kit_TruthCofactor0New( pIsfL->puOn,  pIsf->puOn,  p->nVars, VarMin );
-        Kit_TruthCofactor0New( pIsfL->puOff, pIsf->puOff, p->nVars, VarMin );
-        Kit_TruthCofactor1New( pIsfR->puOn,  pIsf->puOn,  p->nVars, VarMin );
-        Kit_TruthCofactor1New( pIsfR->puOff, pIsf->puOff, p->nVars, VarMin );
-        Bdc_SuppMinimize( p, pIsfL );
-        Bdc_SuppMinimize( p, pIsfR );
-    }
-    if ( p->pPars->fVerbose )
-        p->timeMuxes += clock() - clk;
-    return VarMin;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates gates.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bdc_ManNodeVerify( Bdc_Man_t * p, Bdc_Isf_t * pIsf, Bdc_Fun_t * pFunc )
-{
-    unsigned * puTruth = p->puTemp1;
-    if ( Bdc_IsComplement(pFunc) )
-        Kit_TruthNot( puTruth, Bdc_Regular(pFunc)->puFunc, p->nVars );
-    else
-        Kit_TruthCopy( puTruth, pFunc->puFunc, p->nVars );
-    return Bdc_TableCheckContainment( p, pIsf, puTruth );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates gates.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bdc_Fun_t * Bdc_ManCreateGate( Bdc_Man_t * p, Bdc_Fun_t * pFunc0, Bdc_Fun_t * pFunc1, Bdc_Type_t Type )
-{
-    Bdc_Fun_t * pFunc;
-    pFunc = Bdc_FunNew( p );
-    if ( pFunc == NULL )
-        return NULL;
-    pFunc->Type = Type;
-    pFunc->pFan0 = pFunc0;
-    pFunc->pFan1 = pFunc1;
-    pFunc->puFunc = (unsigned *)Vec_IntFetch(p->vMemory, p->nWords); 
-    // get the truth table of the left branch
-    if ( Bdc_IsComplement(pFunc0) )
-        Kit_TruthNot( p->puTemp1, Bdc_Regular(pFunc0)->puFunc, p->nVars );
-    else
-        Kit_TruthCopy( p->puTemp1, pFunc0->puFunc, p->nVars );
-    // get the truth table of the right branch
-    if ( Bdc_IsComplement(pFunc1) )
-        Kit_TruthNot( p->puTemp2, Bdc_Regular(pFunc1)->puFunc, p->nVars );
-    else
-        Kit_TruthCopy( p->puTemp2, pFunc1->puFunc, p->nVars );
-    // compute the function of node
-    if ( pFunc->Type == BDC_TYPE_AND )
-    {
-        Kit_TruthAnd( pFunc->puFunc, p->puTemp1, p->puTemp2, p->nVars );
-    }
-    else if ( pFunc->Type == BDC_TYPE_OR )
-    {
-        Kit_TruthOr( pFunc->puFunc, p->puTemp1, p->puTemp2, p->nVars );
-        // transform to AND gate
-        pFunc->Type = BDC_TYPE_AND;
-        pFunc->pFan0 = Bdc_Not(pFunc->pFan0);
-        pFunc->pFan1 = Bdc_Not(pFunc->pFan1);
-        Kit_TruthNot( pFunc->puFunc, pFunc->puFunc, p->nVars );
-        pFunc = Bdc_Not(pFunc);
-    }
-    else 
-        assert( 0 );
-    // add to table
-    Bdc_Regular(pFunc)->uSupp = Kit_TruthSupport( Bdc_Regular(pFunc)->puFunc, p->nVars );
-    Bdc_TableAdd( p, Bdc_Regular(pFunc) );
-    return pFunc;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one step of bi-decomposition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bdc_Fun_t * Bdc_ManDecompose_rec( Bdc_Man_t * p, Bdc_Isf_t * pIsf )
-{
-//    int static Counter = 0;
-//    int LocalCounter = Counter++;
-    Bdc_Type_t Type;
-    Bdc_Fun_t * pFunc, * pFunc0, * pFunc1;
-    Bdc_Isf_t IsfL, * pIsfL = &IsfL;
-    Bdc_Isf_t IsfB, * pIsfR = &IsfB;
-    int iVar;
-    int clk = 0; // Suppress "might be used uninitialized"
-/*
-printf( "Init function (%d):\n", LocalCounter );
-Extra_PrintBinary( stdout, pIsf->puOn, 1<<4 );printf("\n");
-Extra_PrintBinary( stdout, pIsf->puOff, 1<<4 );printf("\n");
-*/
-    // check computed results
-    assert( Kit_TruthIsDisjoint(pIsf->puOn, pIsf->puOff, p->nVars) );
-    if ( p->pPars->fVerbose )
-        clk = clock();
-    pFunc = Bdc_TableLookup( p, pIsf );
-    if ( p->pPars->fVerbose )
-        p->timeCache += clock() - clk;
-    if ( pFunc )
-        return pFunc;
-    // decide on the decomposition type
-    if ( p->pPars->fVerbose )
-        clk = clock();
-    Type = Bdc_DecomposeStep( p, pIsf, pIsfL, pIsfR );
-    if ( p->pPars->fVerbose )
-        p->timeCheck += clock() - clk;
-    if ( Type == BDC_TYPE_MUX )
-    {
-        if ( p->pPars->fVerbose )
-            clk = clock();
-        iVar = Bdc_DecomposeStepMux( p, pIsf, pIsfL, pIsfR );
-        if ( p->pPars->fVerbose )
-            p->timeMuxes += clock() - clk;
-        p->numMuxes++;
-        pFunc0 = Bdc_ManDecompose_rec( p, pIsfL );
-        pFunc1 = Bdc_ManDecompose_rec( p, pIsfR );
-        if ( pFunc0 == NULL || pFunc1 == NULL )
-            return NULL;
-        pFunc  = Bdc_FunWithId( p, iVar + 1 );
-        pFunc0 = Bdc_ManCreateGate( p, Bdc_Not(pFunc), pFunc0, BDC_TYPE_AND );
-        pFunc1 = Bdc_ManCreateGate( p, pFunc,  pFunc1, BDC_TYPE_AND );
-        if ( pFunc0 == NULL || pFunc1 == NULL )
-            return NULL;
-        pFunc = Bdc_ManCreateGate( p, pFunc0, pFunc1, BDC_TYPE_OR );
-    }
-    else
-    {
-        pFunc0 = Bdc_ManDecompose_rec( p, pIsfL );
-        if ( pFunc0 == NULL )
-            return NULL;
-        // decompose the right branch
-        if ( Bdc_DecomposeUpdateRight( p, pIsf, pIsfL, pIsfR, pFunc0, Type ) )
-        {
-            p->nNodesNew--;
-            return pFunc0;
-        }
-        Bdc_SuppMinimize( p, pIsfR );
-        pFunc1 = Bdc_ManDecompose_rec( p, pIsfR );
-        if ( pFunc1 == NULL )
-            return NULL;
-        // create new gate
-        pFunc = Bdc_ManCreateGate( p, pFunc0, pFunc1, Type );
-    }
-    return pFunc;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/bdc/bdcInt.h b/src/aig/bdc/bdcInt.h
deleted file mode 100644
index 74630664..00000000
--- a/src/aig/bdc/bdcInt.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bdcInt.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Truth-table-based bi-decomposition engine.]
-
-  Synopsis    [Internal declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - January 15, 2007.]
-
-  Revision    [$Id: resInt.h,v 1.00 2007/01/15 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __BDC_INT_H__
-#define __BDC_INT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include "kit.h"
-#include "bdc.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-#define BDC_SCALE 1000  // value used to compute the cost
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-// network types
-typedef enum { 
-    BDC_TYPE_NONE = 0,  // 0:  unknown
-    BDC_TYPE_CONST1,    // 1:  constant 1
-    BDC_TYPE_PI,        // 2:  primary input
-    BDC_TYPE_AND,       // 3:  AND-gate
-    BDC_TYPE_OR,        // 4:  OR-gate (temporary)
-    BDC_TYPE_XOR,       // 5:  XOR-gate
-    BDC_TYPE_MUX,       // 6:  MUX-gate
-    BDC_TYPE_OTHER      // 7:  unused
-} Bdc_Type_t;
-
-struct Bdc_Fun_t_
-{
-    int              Type;         // Const1, PI, AND, XOR, MUX
-    Bdc_Fun_t *      pFan0;        // fanin of the given node
-    Bdc_Fun_t *      pFan1;        // fanin of the given node
-    unsigned         uSupp;        // bit mask of current support
-    unsigned *       puFunc;       // the function of the node
-    Bdc_Fun_t *      pNext;        // next function with same support
-    union { int      iCopy;        // the literal of the node (AIG)
-    void *           pCopy; };     // the function of the node (BDD or AIG)
-
-};
-
-typedef struct Bdc_Isf_t_ Bdc_Isf_t;
-struct Bdc_Isf_t_
-{
-    unsigned         uSupp;        // the complete support of this component
-    unsigned         uUniq;        // the unique variables of this component
-    unsigned *       puOn;         // on-set
-    unsigned *       puOff;        // off-set
-};
-
-struct Bdc_Man_t_
-{
-    // external parameters
-    Bdc_Par_t *      pPars;        // parameter set
-    int              nVars;        // the number of variables
-    int              nWords;       // the number of words 
-    int              nNodesMax;    // the limit on the number of new nodes
-    int              nDivsLimit;   // the limit on the number of divisors
-    // internal nodes
-    Bdc_Fun_t *      pNodes;       // storage for decomposition nodes
-    int              nNodesAlloc;  // the number of nodes allocated  
-    int              nNodes;       // the number of all nodes created so far
-    int              nNodesNew;    // the number of new AND nodes created so far
-    Bdc_Fun_t *      pRoot;        // the root node
-    // resub candidates
-    Bdc_Fun_t **     pTable;       // hash table of candidates
-    int              nTableSize;   // hash table size (1 << nVarsMax)
-    Vec_Int_t *      vSpots;       // the occupied spots in the table
-    // elementary truth tables 
-    Vec_Ptr_t *      vTruths;      // for const 1 and elementary variables
-    unsigned *       puTemp1;      // temporary truth table
-    unsigned *       puTemp2;      // temporary truth table
-    unsigned *       puTemp3;      // temporary truth table
-    unsigned *       puTemp4;      // temporary truth table
-    // temporary ISFs
-    Bdc_Isf_t * pIsfOL, IsfOL;
-    Bdc_Isf_t * pIsfOR, IsfOR;
-    Bdc_Isf_t * pIsfAL, IsfAL;
-    Bdc_Isf_t * pIsfAR, IsfAR;
-    // internal memory manager
-    Vec_Int_t *      vMemory;      // memory for internal truth tables
-    // statistics
-    int              numCalls;
-    int              numNodes;
-    int              numMuxes;
-    int              numAnds;
-    int              numOrs;
-    int              numWeaks;
-    int              numReuse;
-    // runtime
-    int              timeCache;
-    int              timeCheck;
-    int              timeMuxes;
-    int              timeSupps;
-    int              timeTotal;
-};
-
-static inline Bdc_Fun_t * Bdc_FunNew( Bdc_Man_t * p )                   { Bdc_Fun_t * pRes; if ( p->nNodes >= p->nNodesAlloc || p->nNodesNew >= p->nNodesMax ) return NULL; pRes = p->pNodes + p->nNodes++; p->nNodesNew++; memset( pRes, 0, sizeof(Bdc_Fun_t) ); return pRes; }
-static inline Bdc_Fun_t * Bdc_FunWithId( Bdc_Man_t * p, int Id )        { assert( Id < p->nNodes ); return p->pNodes + Id; }
-static inline int         Bdc_FunId( Bdc_Man_t * p, Bdc_Fun_t * pFun )  { return pFun - p->pNodes; }
-static inline void        Bdc_IsfStart( Bdc_Man_t * p, Bdc_Isf_t * pF ) { pF->uSupp = 0; pF->uUniq = 0; pF->puOn = Vec_IntFetch( p->vMemory, p->nWords ); pF->puOff = Vec_IntFetch( p->vMemory, p->nWords ); assert( pF->puOff && pF->puOn ); }
-static inline void        Bdc_IsfClean( Bdc_Isf_t * p )                 { p->uSupp = 0; p->uUniq = 0;                                      }
-static inline void        Bdc_IsfCopy( Bdc_Isf_t * p, Bdc_Isf_t * q )   { Bdc_Isf_t T = *p; *p = *q; *q = T;                               }
-static inline void        Bdc_IsfNot( Bdc_Isf_t * p )                   { unsigned * puT = p->puOn; p->puOn = p->puOff; p->puOff = puT;    }
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== bdcDec.c ==========================================================*/
-extern Bdc_Fun_t *      Bdc_ManDecompose_rec( Bdc_Man_t * p, Bdc_Isf_t * pIsf );
-extern void             Bdc_SuppMinimize( Bdc_Man_t * p, Bdc_Isf_t * pIsf );
-extern int              Bdc_ManNodeVerify( Bdc_Man_t * p, Bdc_Isf_t * pIsf, Bdc_Fun_t * pFunc );
-/*=== bdcTable.c ==========================================================*/
-extern Bdc_Fun_t *      Bdc_TableLookup( Bdc_Man_t * p, Bdc_Isf_t * pIsf );
-extern void             Bdc_TableAdd( Bdc_Man_t * p, Bdc_Fun_t * pFunc );
-extern void             Bdc_TableClear( Bdc_Man_t * p );
-extern int              Bdc_TableCheckContainment( Bdc_Man_t * p, Bdc_Isf_t * pIsf, unsigned * puTruth );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/bdc/bdcSpfd.c b/src/aig/bdc/bdcSpfd.c
deleted file mode 100644
index 2f05419d..00000000
--- a/src/aig/bdc/bdcSpfd.c
+++ /dev/null
@@ -1,1176 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bdcSpfd.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Truth-table-based bi-decomposition engine.]
-
-  Synopsis    [The gateway to bi-decomposition.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - January 30, 2007.]
-
-  Revision    [$Id: bdcSpfd.c,v 1.00 2007/01/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "bdcInt.h"
-#include "aig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Bdc_Nod_t_ Bdc_Nod_t;
-struct Bdc_Nod_t_
-{
-    unsigned         iFan0g :  8;
-    unsigned         iFan0n : 12;
-    unsigned         Type   : 12;  // 0-3 = AND; 4 = XOR
-
-    unsigned         iFan1g :  8;
-    unsigned         iFan1n : 12;
-    unsigned         Weight : 12;
-
-    word             Truth;
-};
-
-static word Truths[6] = {
-    0xAAAAAAAAAAAAAAAA,
-    0xCCCCCCCCCCCCCCCC,
-    0xF0F0F0F0F0F0F0F0,
-    0xFF00FF00FF00FF00,
-    0xFFFF0000FFFF0000,
-    0xFFFFFFFF00000000
-};
-
-static inline int Bdc_CountOnes( word t )
-{
-    t =    (t & 0x5555555555555555) + ((t>> 1) & 0x5555555555555555);
-    t =    (t & 0x3333333333333333) + ((t>> 2) & 0x3333333333333333);
-    t =    (t & 0x0F0F0F0F0F0F0F0F) + ((t>> 4) & 0x0F0F0F0F0F0F0F0F);
-    t =    (t & 0x00FF00FF00FF00FF) + ((t>> 8) & 0x00FF00FF00FF00FF);
-    t =    (t & 0x0000FFFF0000FFFF) + ((t>>16) & 0x0000FFFF0000FFFF);
-    return (t & 0x00000000FFFFFFFF) +  (t>>32);
-}
-
-static inline int Bdc_CountSpfd( word t, word f )
-{
-    int n00 = Bdc_CountOnes( ~t & ~f );
-    int n01 = Bdc_CountOnes(  t & ~f );
-    int n10 = Bdc_CountOnes( ~t &  f );
-    int n11 = Bdc_CountOnes(  t &  f );
-    return n00 * n11 + n10 * n01;
-}
-
-static inline word Bdc_Cof6( word t, int iVar, int fCof1 )
-{
-    assert( iVar >= 0 && iVar < 6 );
-    if ( fCof1 )
-        return (t & Truths[iVar]) | ((t & Truths[iVar]) >> (1<<iVar));
-    else
-        return (t &~Truths[iVar]) | ((t &~Truths[iVar]) << (1<<iVar));
-}
-
-int Bdc_SpfdAdjCost( word t )
-{
-    word c0, c1;
-    int v, Cost = 0;
-    for ( v = 0; v < 6; v++ )
-    {
-        c0 = Bdc_Cof6( t, v, 0 );
-        c1 = Bdc_Cof6( t, v, 1 );
-        Cost += Bdc_CountOnes( c0 ^ c1 );
-    }
-    return Cost;
-}
-
-
-extern void  Abc_Show6VarFunc( word F0, word F1 );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_SpfdPrint_rec( Bdc_Nod_t * pNode, int Level, Vec_Ptr_t * vLevels )
-{
-    assert( Level > 0 );
-    printf( "(" );
-
-    if ( pNode->Type & 1 )
-        printf( "!" );
-    if ( pNode->iFan0g == 0 )
-        printf( "%c", 'a' + pNode->iFan0n );
-    else
-    {
-        Bdc_Nod_t * pNode0 = (Bdc_Nod_t *)Vec_PtrEntry(vLevels, pNode->iFan0g);
-        Bdc_SpfdPrint_rec( pNode0 + pNode->iFan0n, pNode->iFan0g, vLevels );
-    }
-
-    if ( pNode->Type & 4 )
-        printf( "+" );
-    else
-        printf( "*" );
-
-    if ( pNode->Type & 2 )
-        printf( "!" );
-    if ( pNode->iFan1g == 0 )
-        printf( "%c", 'a' + pNode->iFan1n );
-    else
-    {
-        Bdc_Nod_t * pNode1 = (Bdc_Nod_t *)Vec_PtrEntry(vLevels, pNode->iFan1g);
-        Bdc_SpfdPrint_rec( pNode1 + pNode->iFan1n, pNode->iFan1g, vLevels );
-    }
-
-    printf( ")" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_SpfdPrint( Bdc_Nod_t * pNode, int Level, Vec_Ptr_t * vLevels, word Truth )
-{
-    word Diff = Truth ^ pNode->Truth;
-    Extra_PrintHex( stdout, (unsigned *)&pNode->Truth, 6 ); printf( "   " );
-    Extra_PrintHex( stdout, (unsigned *)&Diff, 6 );         printf( "   " );
-    Bdc_SpfdPrint_rec( pNode, Level, vLevels );
-    printf( "    %d\n", pNode->Weight );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_SpfdDecompose( word Truth, int nVars, int nCands, int nGatesMax )
-{
-    int nSize = nCands * nCands * (nGatesMax + 1) * 5;
-    Vec_Ptr_t * vLevels;
-    Vec_Int_t * vBegs, * vWeight;
-    Bdc_Nod_t * pNode, * pNode0, * pNode1, * pNode2;
-    int Count0, Count1, * pPerm;
-    int i, j, k, c, n, clk;
-    assert( nGatesMax < (1<<8) );
-    assert( nCands < (1<<12) );
-    assert( (1<<(nVars-1))*(1<<(nVars-1)) < (1<<12) ); // max SPFD
-
-    printf( "Storage size = %d (%d * %d * %d * %d).\n", nSize, nCands, nCands, nGatesMax + 1, 5 );
-
-    printf( "SPFD = %d.\n", Bdc_CountOnes(Truth) * Bdc_CountOnes(~Truth) );
-
-    // consider elementary functions
-    if ( Truth == 0 || Truth == ~0 )
-    {
-        printf( "Function is a constant.\n" );
-        return;
-    }
-    for ( i = 0; i < nVars; i++ )
-        if ( Truth == Truths[i] || Truth == ~Truths[i] )
-        {
-            printf( "Function is an elementary variable.\n" );
-            return;
-        }
-
-    // allocate
-    vLevels = Vec_PtrAlloc( 100 );
-    vBegs = Vec_IntAlloc( 100 );
-    vWeight = Vec_IntAlloc( 100 );
-
-    // initialize elementary variables
-    pNode = ABC_CALLOC( Bdc_Nod_t, nVars );
-    for ( i = 0; i < nVars; i++ )
-        pNode[i].Truth  = Truths[i];
-    for ( i = 0; i < nVars; i++ )
-        pNode[i].Weight = Bdc_CountSpfd( pNode[i].Truth, Truth );
-    Vec_PtrPush( vLevels, pNode );
-    Vec_IntPush( vBegs, nVars );
-
-    // the next level
-clk = clock();
-    pNode0 = pNode;
-    pNode  = ABC_CALLOC( Bdc_Nod_t, 5 * nVars * (nVars - 1) / 2 );
-    for ( c = i = 0; i < nVars; i++ )
-    for ( j = i+1; j < nVars; j++ )
-    {
-        pNode[c].Truth =  pNode0[i].Truth &  pNode0[j].Truth;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 0;
-        pNode[c].Truth = ~pNode0[i].Truth &  pNode0[j].Truth;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 1;
-        pNode[c].Truth =  pNode0[i].Truth & ~pNode0[j].Truth;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 2;
-        pNode[c].Truth = ~pNode0[i].Truth & ~pNode0[j].Truth;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 3;
-        pNode[c].Truth =  pNode0[i].Truth ^  pNode0[j].Truth;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 4;
-    }
-    assert( c == 5 * nVars * (nVars - 1) / 2 );
-    Vec_PtrPush( vLevels, pNode );
-    Vec_IntPush( vBegs, c );
-    for ( i = 0; i < c; i++ )
-    {
-        pNode[i].Weight = Bdc_CountSpfd( pNode[i].Truth, Truth );
-//Bdc_SpfdPrint( pNode + i, 1, vLevels );
-        if ( Truth == pNode[i].Truth || Truth == ~pNode[i].Truth )
-        {
-            printf( "Function can be implemented using 1 gate.\n" );
-            pNode = NULL;
-            goto cleanup;
-        }
-    }
-printf( "Selected %6d gates on level %2d.   ", c, 1 );
-Abc_PrintTime( 1, "Time", clock() - clk );
-
-
-    // iterate through levels
-    pNode = ABC_CALLOC( Bdc_Nod_t, nSize );
-    for ( n = 2; n <= nGatesMax; n++ )
-    {
-clk = clock();
-        c = 0;
-        pNode1 = (Bdc_Nod_t *)Vec_PtrEntry( vLevels, n-1 );
-        Count1 = Vec_IntEntry( vBegs, n-1 );
-        // go through previous levels
-        for ( k = 0; k < n-1; k++ )
-        {
-            pNode0 = (Bdc_Nod_t *)Vec_PtrEntry( vLevels, k );
-            Count0 = Vec_IntEntry( vBegs, k );
-            for ( i = 0; i < Count0; i++ )
-            for ( j = 0; j < Count1; j++ )
-            {
-                pNode[c].Truth =  pNode0[i].Truth &  pNode1[j].Truth;  pNode[c].iFan0g = k; pNode[c].iFan1g = n-1;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 0;
-                pNode[c].Truth = ~pNode0[i].Truth &  pNode1[j].Truth;  pNode[c].iFan0g = k; pNode[c].iFan1g = n-1;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 1;
-                pNode[c].Truth =  pNode0[i].Truth & ~pNode1[j].Truth;  pNode[c].iFan0g = k; pNode[c].iFan1g = n-1;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 2;
-                pNode[c].Truth = ~pNode0[i].Truth & ~pNode1[j].Truth;  pNode[c].iFan0g = k; pNode[c].iFan1g = n-1;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 3;
-                pNode[c].Truth =  pNode0[i].Truth ^  pNode1[j].Truth;  pNode[c].iFan0g = k; pNode[c].iFan1g = n-1;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 4;
-            }
-            assert( c < nSize );
-        }
-        // go through current level
-        for ( i = 0; i < Count1; i++ )
-        for ( j = i+1; j < Count1; j++ )
-        {
-            pNode[c].Truth =  pNode1[i].Truth &  pNode1[j].Truth;  pNode[c].iFan0g = n-1; pNode[c].iFan1g = n-1;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 0;
-            pNode[c].Truth = ~pNode1[i].Truth &  pNode1[j].Truth;  pNode[c].iFan0g = n-1; pNode[c].iFan1g = n-1;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 1;
-            pNode[c].Truth =  pNode1[i].Truth & ~pNode1[j].Truth;  pNode[c].iFan0g = n-1; pNode[c].iFan1g = n-1;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 2;
-            pNode[c].Truth = ~pNode1[i].Truth & ~pNode1[j].Truth;  pNode[c].iFan0g = n-1; pNode[c].iFan1g = n-1;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 3;
-            pNode[c].Truth =  pNode1[i].Truth ^  pNode1[j].Truth;  pNode[c].iFan0g = n-1; pNode[c].iFan1g = n-1;  pNode[c].iFan0n = i; pNode[c].iFan1n = j;  pNode[c++].Type = 4;
-        }
-        assert( c < nSize );
-        // sort
-        Vec_IntClear( vWeight );
-        for ( i = 0; i < c; i++ )
-        {
-            pNode[i].Weight = Bdc_CountSpfd( pNode[i].Truth, Truth );
-if ( pNode[i].Weight > 300 )
-Bdc_SpfdPrint( pNode + i, 1, vLevels, Truth );
-            Vec_IntPush( vWeight, pNode[i].Weight );
-
-            if ( Truth == pNode[i].Truth || Truth == ~pNode[i].Truth )
-            {
-                printf( "Function can be implemented using %d gates.\n", n );
-                Bdc_SpfdPrint( pNode + i, n, vLevels, Truth );
-                goto cleanup;
-            }
-        }
-        pPerm = Abc_SortCost( Vec_IntArray(vWeight), c );
-        assert( Vec_IntEntry(vWeight, pPerm[0]) <= Vec_IntEntry(vWeight, pPerm[c-1]) );
-
-        printf( "Best SPFD = %d.\n", Vec_IntEntry(vWeight, pPerm[c-1]) );
-//        for ( i = 0; i < c; i++ )
-//printf( "%d ", Vec_IntEntry(vWeight, pPerm[i]) );
-
-        // choose the best ones
-        pNode2 = ABC_CALLOC( Bdc_Nod_t, nCands );
-        for ( j = 0, i = c-1; i >= 0; i-- )
-        {
-            pNode2[j++] = pNode[pPerm[i]];
-            if ( j == nCands )
-                break;
-        }
-        ABC_FREE( pPerm );
-        Vec_PtrPush( vLevels, pNode2 );
-        Vec_IntPush( vBegs, j );
-
-printf( "Selected %6d gates (out of %6d) on level %2d.   ", j, c, n );
-Abc_PrintTime( 1, "Time", clock() - clk );
-
-        for ( i = 0; i < 10; i++ )
-            Bdc_SpfdPrint( pNode2 + i, n, vLevels, Truth );
-    }
-
-cleanup:
-    ABC_FREE( pNode );
-    Vec_PtrForEachEntry( Bdc_Nod_t *, vLevels, pNode, i )
-        ABC_FREE( pNode );
-    Vec_PtrFree( vLevels );
-    Vec_IntFree( vBegs );
-    Vec_IntFree( vWeight );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_SpfdDecomposeTest_()
-{
-    int fTry = 0;
-//    word T[17];
-//    int i;
-
-//    word Truth    = Truths[0] & ~Truths[3];
-//    word Truth    = (Truths[0] & Truths[1]) | (Truths[2] & Truths[3]) | (Truths[4] & Truths[5]);
-//    word Truth    = (Truths[0] & Truths[1]) | ((Truths[2] & ~Truths[3]) ^ (Truths[4] & ~Truths[5]));
-//    word Truth    = (Truths[0] & Truths[1]) | (Truths[2] & Truths[3]);
-//    word Truth = 0x9ef7a8d9c7193a0f;  // AAFFAAFF0A0F0A0F
-//    word Truth = 0x34080226CD163000;
-    word Truth = 0x5052585a0002080a;
-    int nVars     =    6;
-    int nCands    =  200;// 75;
-    int nGatesMax =   20;
-
-    if ( fTry )
-    Bdc_SpfdDecompose( Truth, nVars, nCands, nGatesMax );
-/*
-    for ( i = 0; i < 6; i++ )
-        T[i] = Truths[i];
-    T[7]  = 0;
-    T[8]  = ~T[1]  &  T[3];
-    T[9]  = ~T[8]  &  T[0];
-    T[10] =  T[1]  &  T[4];
-    T[11] =  T[10] &  T[2];
-    T[12] =  T[11] &  T[9];
-    T[13] = ~T[0]  &  T[5];
-    T[14] =  T[2]  &  T[13];
-    T[15] = ~T[12] & ~T[14];
-    T[16] = ~T[15];
-//    if ( T[16] != Truth )
-//        printf( "Failed\n" );
-
-    for ( i = 0; i < 17; i++ )
-    {
-//        printf( "%2d = %3d  ", i, Bdc_CountSpfd(T[i], Truth) );
-        printf( "%2d = %3d  ", i, Bdc_CountSpfd(T[i], T[16]) );
-        Extra_PrintBinary( stdout, (unsigned *)&T[i], 64 ); printf( "\n" );
-    }
-//    Extra_PrintBinary( stdout, (unsigned *)&Truth, 64 ); printf( "\n" );
-*/
-}
-
-
-
-
-typedef struct Bdc_Ent_t_ Bdc_Ent_t; // 24 bytes
-struct Bdc_Ent_t_
-{
-    unsigned         iFan0   : 29;
-    unsigned         fCompl0 :  1;
-    unsigned         fCompl  :  1;
-    unsigned         fMark0  :  1;
-    unsigned         iFan1   : 29;
-    unsigned         fCompl1 :  1;
-    unsigned         fExor   :  1;
-    unsigned         fMark1  :  1;
-    int              iNext;
-    int              iList;
-    word             Truth;
-};
-
-#define BDC_TERM 0x1FFFFFFF
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bdc_SpfdMark0( Bdc_Ent_t * p, Bdc_Ent_t * pEnt )
-{
-    if ( pEnt->iFan0 == BDC_TERM )
-        return 0;
-    if ( pEnt->fMark0 )
-        return 0;
-    pEnt->fMark0 = 1;
-    return pEnt->fMark1 + 
-        Bdc_SpfdMark0(p, p + pEnt->iFan0) + 
-        Bdc_SpfdMark0(p, p + pEnt->iFan1);
-}
-int Bdc_SpfdMark1( Bdc_Ent_t * p, Bdc_Ent_t * pEnt )
-{
-    if ( pEnt->iFan0 == BDC_TERM )
-        return 0;
-    if ( pEnt->fMark1 )
-        return 0;
-    pEnt->fMark1 = 1;
-    return pEnt->fMark0 + 
-        Bdc_SpfdMark1(p, p + pEnt->iFan0) + 
-        Bdc_SpfdMark1(p, p + pEnt->iFan1);
-}
-void Bdc_SpfdUnmark0( Bdc_Ent_t * p, Bdc_Ent_t * pEnt )
-{
-    if ( pEnt->iFan0 == BDC_TERM )
-        return;
-    pEnt->fMark0 = 0;
-    Bdc_SpfdUnmark0( p, p + pEnt->iFan0 );
-    Bdc_SpfdUnmark0( p, p + pEnt->iFan1 );
-}
-void Bdc_SpfdUnmark1( Bdc_Ent_t * p, Bdc_Ent_t * pEnt )
-{
-    if ( pEnt->iFan0 == BDC_TERM )
-        return;
-    pEnt->fMark1 = 0;
-    Bdc_SpfdUnmark1( p, p + pEnt->iFan0 );
-    Bdc_SpfdUnmark1( p, p + pEnt->iFan1 );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bdc_SpfdCheckOverlap( Bdc_Ent_t * p, Bdc_Ent_t * pEnt0, Bdc_Ent_t * pEnt1 )
-{
-    int RetValue;
-    RetValue = Bdc_SpfdMark0( p, pEnt0 );
-    assert( RetValue == 0 );
-    RetValue = Bdc_SpfdMark1( p, pEnt1 );
-    Bdc_SpfdUnmark0( p, pEnt0 );
-    Bdc_SpfdUnmark1( p, pEnt1 );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bdc_SpfdHashValue( word t, int Size )
-{
-    // http://planetmath.org/encyclopedia/GoodHashTablePrimes.html
-    // 53,
-    // 97,
-    // 193,
-    // 389,
-    // 769,
-    // 1543,
-    // 3079,
-    // 6151,
-    // 12289,
-    // 24593,
-    // 49157,
-    // 98317,
-    // 196613,
-    // 393241,
-    // 786433,
-    // 1572869,
-    // 3145739,
-    // 6291469,
-    // 12582917,
-    // 25165843,
-    // 50331653,
-    // 100663319,
-    // 201326611,
-    // 402653189,
-    // 805306457,
-    // 1610612741,
-    static unsigned BigPrimes[8] = {12582917, 25165843, 50331653, 100663319, 201326611, 402653189, 805306457, 1610612741};
-    unsigned char * s = (unsigned char *)&t;
-    unsigned i, Value = 0;
-    for ( i = 0; i < 8; i++ )
-        Value ^= BigPrimes[i] * s[i];
-    return Value % Size;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int * Bdc_SpfdHashLookup( Bdc_Ent_t * p, int Size, word t )
-{
-    Bdc_Ent_t * pBin = p + Bdc_SpfdHashValue( t, Size );
-    if ( pBin->iList == 0 )
-        return &pBin->iList;
-    for ( pBin = p + pBin->iList; ; pBin = p + pBin->iNext )
-    {
-        if ( pBin->Truth == t )
-            return NULL;
-        if ( pBin->iNext == 0 )
-            return &pBin->iNext;
-    }
-    assert( 0 );
-    return NULL;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Wrd_t * Bdc_SpfdDecomposeTest__( Vec_Int_t ** pvWeights )
-{
-//    int nFuncs = 8000000; // the number of functions to compute
-//    int nSize  = 2777111; // the hash table size to use
-//    int Limit  = 6;
-    
-//    int nFuncs = 51000000; // the number of functions to compute
-//    int nSize  = 50331653; // the hash table size to use
-//    int Limit  = 6;
-    
-    int nFuncs = 250000000; // the number of functions to compute
-    int nSize  = 201326611; // the hash table size to use
-    int Limit  = 6;
-
-    int * pPlace, i, n, m, k, s, fCompl, clk = clock(), clk2;
-    Vec_Int_t * vStops;
-    Vec_Wrd_t * vTruths;
-    Vec_Int_t * vWeights;
-    Bdc_Ent_t * p, * q, * pBeg0, * pEnd0, * pBeg1, * pEnd1, * pThis0, * pThis1;
-    word t0, t1, t;
-    assert( nSize <= nFuncs );
-
-    printf( "Allocating %.2f Mb of internal memory.\n", 1.0*sizeof(Bdc_Ent_t)*nFuncs/(1<<20) );
-
-    p = (Bdc_Ent_t *)calloc( nFuncs, sizeof(Bdc_Ent_t) );
-    memset( p, 255, sizeof(Bdc_Ent_t) );
-    p->iList = 0;
-    for ( q = p; q < p+nFuncs; q++ )
-       q->iList = 0;
-    q = p + 1;
-    printf( "Added %d + %d + 0 = %d. Total = %8d.\n", 0, 0, 0, q-p );
-
-    vTruths  = Vec_WrdStart( nFuncs );
-    vWeights = Vec_IntStart( nFuncs );
-    Vec_WrdClear( vTruths );
-    Vec_IntClear( vWeights );
-
-    // create elementary vars
-    vStops = Vec_IntAlloc( 10 );
-    Vec_IntPush( vStops, 1 );
-    for ( i = 0; i < 6; i++ )
-    {
-        q->iFan0 = BDC_TERM;
-        q->iFan1 = i;
-        q->Truth = Truths[i];
-        pPlace   = Bdc_SpfdHashLookup( p, nSize, q->Truth );
-        *pPlace  = q-p;
-        q++;
-        Vec_WrdPush( vTruths, Truths[i] );
-        Vec_IntPush( vWeights, 0 );
-    }
-    Vec_IntPush( vStops, 7 );
-    printf( "Added %d + %d + 0 = %d. Total = %8d.\n", 0, 0, 0, q-p );
-
-    // create gates
-    for ( n = 0; n < Limit; n++ )
-    {
-        // try previous
-        for ( k = 0; k < Limit; k++ )
-        for ( m = 0; m < Limit; m++ )
-        {
-            if ( k + m != n || k > m )
-                continue;
-            // set the start and stop
-            pBeg0 = p + Vec_IntEntry( vStops, k );
-            pEnd0 = p + Vec_IntEntry( vStops, k+1 );
-            // set the start and stop
-            pBeg1 = p + Vec_IntEntry( vStops, m );
-            pEnd1 = p + Vec_IntEntry( vStops, m+1 );
-
-            clk2 = clock();
-            printf( "Trying %7d  x %7d.  ", pEnd0-pBeg0, pEnd1-pBeg1 );
-            for ( pThis0 = pBeg0; pThis0 < pEnd0; pThis0++ )
-            for ( pThis1 = pBeg1; pThis1 < pEnd1; pThis1++ )
-            if ( k < m || pThis1 > pThis0 )
-//            if ( n < 5 || Bdc_SpfdCheckOverlap(p, pThis0, pThis1) )
-            for ( s = 0; s < 5; s++ )
-            {
-                t0 = (s&1)      ? ~pThis0->Truth : pThis0->Truth;
-                t1 = ((s>>1)&1) ? ~pThis1->Truth : pThis1->Truth;
-                t  = ((s>>2)&1) ? t0 ^ t1 : t0 & t1;
-                fCompl = t & 1;
-                if ( fCompl )
-                    t = ~t;
-                if ( t == 0 )
-                    continue;
-                pPlace = Bdc_SpfdHashLookup( p, nSize, t );
-                if ( pPlace == NULL )
-                    continue;
-                q->iFan0   = pThis0-p;
-                q->fCompl0 = s&1;
-                q->iFan1   = pThis1-p;
-                q->fCompl1 = (s>>1)&1;
-                q->fExor   = (s>>2)&1;
-                q->Truth   = t;
-                q->fCompl  = fCompl;
-                *pPlace = q-p;
-                q++;
-                Vec_WrdPush( vTruths, t );
-//                Vec_IntPush( vWeights, n == 5 ? n : n+1 );
-                Vec_IntPush( vWeights, n+1 );
-                if ( q-p == nFuncs )
-                {
-                    printf( "Reached limit of %d functions.\n", nFuncs );
-                    goto finish;
-                }
-            }
-            printf( "Added %d + %d + 1 = %d. Total = %8d.   ", k, m, n+1, q-p );
-            Abc_PrintTime( 1, "Time", clock() - clk2 );
-        }
-        Vec_IntPush( vStops, q-p );
-    }
-    Abc_PrintTime( 1, "Time", clock() - clk );
-
-
-    {
-        FILE * pFile = fopen( "func6v6n_bin.txt", "wb" );
-        fwrite( Vec_WrdArray(vTruths), sizeof(word), Vec_WrdSize(vTruths), pFile );
-        fclose( pFile );
-    }
-    {
-        FILE * pFile = fopen( "func6v6nW_bin.txt", "wb" );
-        fwrite( Vec_IntArray(vWeights), sizeof(int), Vec_IntSize(vWeights), pFile );
-        fclose( pFile );
-    }
-
-
-finish:
-    Vec_IntFree( vStops );
-    free( p );
-
-    *pvWeights = vWeights;
-//    Vec_WrdFree( vTruths );
-    return vTruths;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Wrd_t * Bdc_SpfdReadFiles5( Vec_Int_t ** pvWeights )
-{
-    Vec_Int_t * vWeights;
-    Vec_Wrd_t * vDivs;
-    FILE * pFile;
-    
-    vDivs = Vec_WrdStart( 3863759 );
-    pFile = fopen( "func6v5n_bin.txt", "rb" );
-    fread( Vec_WrdArray(vDivs), sizeof(word), Vec_WrdSize(vDivs), pFile );
-    fclose( pFile );
-
-    vWeights = Vec_IntStart( 3863759 );
-    pFile = fopen( "func6v5nW_bin.txt", "rb" );
-    fread( Vec_IntArray(vWeights), sizeof(int), Vec_IntSize(vWeights), pFile );
-    fclose( pFile );
-
-    *pvWeights = vWeights;
-    return vDivs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Wrd_t * Bdc_SpfdReadFiles6( Vec_Int_t ** pvWeights )
-{
-    Vec_Int_t * vWeights;
-    Vec_Wrd_t * vDivs = Vec_WrdStart( 12776759 );
-    FILE * pFile = fopen( "func6v6n_bin.txt", "rb" );
-    fread( Vec_WrdArray(vDivs), sizeof(word), Vec_WrdSize(vDivs), pFile );
-    fclose( pFile );
-
-    vWeights = Vec_IntStart( 12776759 );
-    pFile = fopen( "func6v6nW_bin.txt", "rb" );
-    fread( Vec_IntArray(vWeights), sizeof(int), Vec_IntSize(vWeights), pFile );
-    fclose( pFile );
-
-    *pvWeights = vWeights;
-    return vDivs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bdc_SpfdComputeCost( word f, int i, Vec_Int_t * vWeights )
-{
-    int Ones = Bdc_CountOnes(f);
-    if ( Ones == 0 )
-        return -1;
-    return 7*Ones + 10*(8 - Vec_IntEntry(vWeights, i));
-//    return Bdc_CountOnes(f);
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-word Bdc_SpfdFindBest( Vec_Wrd_t * vDivs, Vec_Int_t * vWeights, word F0, word F1, int * pCost )
-{
-    word Func, FuncBest;
-    int i, Cost, CostBest = -1, NumBest;
-    Vec_WrdForEachEntry( vDivs, Func, i )
-    {
-        if ( (Func & F0) == 0 )
-        {
-            Cost = Bdc_SpfdComputeCost(Func & F1, i, vWeights);
-            if ( CostBest < Cost )
-            {
-                CostBest = Cost;
-                FuncBest = Func;
-                NumBest  = i;
-            }
-        }
-        if ( (Func & F1) == 0 )
-        {
-            Cost = Bdc_SpfdComputeCost(Func & F0, i, vWeights);
-            if ( CostBest < Cost )
-            {
-                CostBest = Cost;
-                FuncBest = Func;
-                NumBest  = i;
-            }
-        }
-        if ( (~Func & F0) == 0 )
-        {
-            Cost = Bdc_SpfdComputeCost(~Func & F1, i, vWeights);
-            if ( CostBest < Cost )
-            {
-                CostBest = Cost;
-                FuncBest = ~Func;
-                NumBest  = i;
-            }
-        }
-        if ( (~Func & F1) == 0 )
-        {
-            Cost = Bdc_SpfdComputeCost(~Func & F0, i, vWeights);
-            if ( CostBest < Cost )
-            {
-                CostBest = Cost;
-                FuncBest = ~Func;
-                NumBest  = i;
-            }
-        }
-    }
-    (*pCost) += Vec_IntEntry(vWeights, NumBest);
-    assert( CostBest > 0 );
-    printf( "Selected %8d with cost %2d and weight %d: ", NumBest, 0, Vec_IntEntry(vWeights, NumBest) );
-    Extra_PrintHex( stdout, (unsigned *)&FuncBest, 6 ); printf( "\n" );
-    return FuncBest;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bdc_SpfdDecomposeTestOne( word t, Vec_Wrd_t * vDivs, Vec_Int_t * vWeights )
-{
-    word F1 = t;
-    word F0 = ~F1;
-    word Func;
-    int i, Cost = 0;
-    printf( "Trying: " );
-    Extra_PrintHex( stdout, (unsigned *)&t, 6 ); printf( "\n" );
-//    Abc_Show6VarFunc( F0, F1 );   
-    for ( i = 0; F0 && F1; i++ )
-    {
-        printf( "*** ITER %2d   ", i );
-        Func = Bdc_SpfdFindBest( vDivs, vWeights, F0, F1, &Cost );
-        F0 &= ~Func;
-        F1 &= ~Func;
-//        Abc_Show6VarFunc( F0, F1 );    
-    }
-    Cost += (i-1);
-    printf( "Produce solution with cost %2d (with adj cost %4d).\n", Cost, Bdc_SpfdAdjCost(t) );
-    return Cost;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_SpfdDecomposeTest44()
-{
-//    word t = 0x5052585a0002080a;
-
-    word t = 0x9ef7a8d9c7193a0f;
-//    word t = 0x6BFDA276C7193A0F;
-//    word t = 0xA3756AFE0B1DF60B;
-
-//    word t = 0xFEF7AEBFCE80AA0F;
-//    word t = 0x9EF7FDBFC77F6F0F;
-//    word t = 0xDEF7FDFF377F6FFF;
-
-//    word t = 0x345D02736DB390A5; // xor with var 0
-
-//    word t = 0x3EFDA2736D139A0F; // best solution after changes
-
-    Vec_Int_t * vWeights;
-    Vec_Wrd_t * vDivs;
-    word c0, c1, s, tt, tbest;
-    int i, j, Cost, CostBest = 100000;
-    int clk = clock();
-
-    return;
-
-//    printf( "%d\n", RAND_MAX );
-
-    vDivs = Bdc_SpfdDecomposeTest__( &vWeights );
-//    vDivs = Bdc_SpfdReadFiles5( &vWeights );
-
-//    Abc_Show6VarFunc( ~t, t );  
-
-    // try function
-    tt = t;
-    Cost = Bdc_SpfdDecomposeTestOne( tt, vDivs, vWeights );
-    if ( CostBest > Cost )
-    {
-        CostBest = Cost;
-        tbest = tt;
-    }
-    printf( "\n" );
-
-    // try complemented output
-    for ( i = 0; i < 6; i++ )
-    {
-        tt = t ^ Truths[i];
-        Cost = Bdc_SpfdDecomposeTestOne( tt, vDivs, vWeights );
-        if ( CostBest > Cost )
-        {
-            CostBest = Cost;
-            tbest = tt;
-        }
-    }
-    printf( "\n" );
-
-    // try complemented input
-    for ( i = 0; i < 6; i++ )
-    for ( j = 0; j < 6; j++ )
-    {
-        if ( i == j )
-            continue;
-        c0 = Bdc_Cof6( t, i, 0 );
-        c1 = Bdc_Cof6( t, i, 1 );
-        s  = Truths[i] ^ Truths[j];
-        tt = (~s & c0) | (s & c1);
-
-        Cost = Bdc_SpfdDecomposeTestOne( tt, vDivs, vWeights );
-        if ( CostBest > Cost )
-        {
-            CostBest = Cost;
-            tbest = tt;
-        }
-    }
-
-/*
-    for ( i = 0; i < 6; i++ )
-    for ( j = 0; j < 6; j++ )
-    {
-        if ( i == j )
-            continue;
-        c0 = Bdc_Cof6( t, i, 0 );
-        c1 = Bdc_Cof6( t, i, 1 );
-        s  = Truths[i] ^ Truths[j];
-        tt = (~s & c0) | (s & c1);
-
-        for ( k = 0; k < 6; k++ )
-        for ( n = 0; n < 6; n++ )
-        {
-            if ( k == n )
-                continue;
-            c0 = Bdc_Cof6( tt, k, 0 );
-            c1 = Bdc_Cof6( tt, k, 1 );
-            s  = Truths[k] ^ Truths[n];
-            ttt= (~s & c0) | (s & c1);
-
-            Cost = Bdc_SpfdDecomposeTestOne( ttt, vDivs, vWeights );
-            if ( CostBest > Cost )
-            {
-                CostBest = Cost;
-                tbest = ttt;
-            }
-        }
-    }
-*/
-
-    printf( "Best solution found with cost %d.  ", CostBest );
-    Extra_PrintHex( stdout, (unsigned *)&tbest, 6 ); //printf( "\n" );
-    Abc_PrintTime( 1, "  Time", clock() - clk );
-
-    Vec_WrdFree( vDivs );
-    Vec_IntFree( vWeights );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_SpfdDecomposeTest3()
-{
-    int nSizeM = (1 << 26);
-    int nSizeK = (1 << 3);
-    Vec_Wrd_t * v1M;
-    Vec_Wrd_t * v1K;
-    int i, k, Counter, clk;
-//    int EntryM, EntryK;
-    Aig_ManRandom64( 1 );
-
-    v1M = Vec_WrdAlloc( nSizeM );
-    for ( i = 0; i < nSizeM; i++ )
-        Vec_WrdPush( v1M, Aig_ManRandom64(0) );
-
-    v1K = Vec_WrdAlloc( nSizeK );
-    for ( i = 0; i < nSizeK; i++ )
-        Vec_WrdPush( v1K, Aig_ManRandom64(0) );
-
-    clk = clock();
-    Counter = 0;
-    for ( i = 0; i < nSizeM; i++ )
-    for ( k = 0; k < nSizeK; k++ )
-        Counter += ((v1M->pArray[i] & v1K->pArray[k]) == v1K->pArray[k]);
-//    Vec_WrdForEachEntry( v1M, EntryM, i )
-//    Vec_WrdForEachEntry( v1K, EntryK, k )
-//        Counter += ((EntryM & EntryK) == EntryK);
-
-    printf( "Total = %8d.  ", Counter );
-    Abc_PrintTime( 1, "Time", clock() - clk );
-
-    clk = clock();
-    Counter = 0;
-    for ( k = 0; k < nSizeK; k++ )
-    for ( i = 0; i < nSizeM; i++ )
-        Counter += ((v1M->pArray[i] & v1K->pArray[k]) == v1K->pArray[k]);
-    printf( "Total = %8d.  ", Counter );
-    Abc_PrintTime( 1, "Time", clock() - clk );
-
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_SpfdDecomposeTest8()
-{
-//    word t = 0x9ef7a8d9c7193a0f;
-//    word t = 0x9EF7FDBFC77F6F0F;
-    word t = 0x513B57150819050F;
-
-    Vec_Int_t * vWeights;
-    Vec_Wrd_t * vDivs;
-    word Func, FuncBest;
-    int Cost, CostBest = ABC_INFINITY;
-    int i, clk = clock();
-
-//    return;
-
-    vDivs = Bdc_SpfdReadFiles5( &vWeights );
-
-    printf( "Best init = %4d.  ", Bdc_SpfdAdjCost(t) );
-    Extra_PrintHex( stdout, (unsigned *)&t, 6 ); //printf( "\n" );
-    Abc_PrintTime( 1, "  Time", clock() - clk );
-
-    Vec_WrdForEachEntry( vDivs, Func, i )
-    {
-        Cost = Bdc_SpfdAdjCost( t ^ Func );
-        if ( CostBest > Cost )
-        {
-            CostBest = Cost;
-            FuncBest = Func;
-        }
-    }
-
-    printf( "Best cost = %4d.  ", CostBest );
-    Extra_PrintHex( stdout, (unsigned *)&FuncBest, 6 ); //printf( "\n" );
-    Abc_PrintTime( 1, "  Time", clock() - clk );
-
-Abc_Show6VarFunc( 0, t );
-Abc_Show6VarFunc( 0, FuncBest );
-Abc_Show6VarFunc( 0, (FuncBest ^ t) );
-
-    FuncBest ^= t;
-    Extra_PrintHex( stdout, (unsigned *)&FuncBest, 6 ); printf( "\n" );
-
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_SpfdDecomposeTest()
-{
-  int nSizeM = (1 << 26);  // big array size
-  int nSizeK = (1 << 3);   // small array size
-  Vec_Wrd_t * v1M, * v1K;
-  int EntryM, EntryK;
-  int i, k, Counter, clk;
-
-  Aig_ManRandom64( 1 );
-
-  v1M = Vec_WrdAlloc( nSizeM );
-  for ( i = 0; i < nSizeM; i++ )
-      Vec_WrdPush( v1M, Aig_ManRandom64(0) );
-
-  v1K = Vec_WrdAlloc( nSizeK );
-  for ( i = 0; i < nSizeK; i++ )
-      Vec_WrdPush( v1K, Aig_ManRandom64(0) );
-
-  clk = clock();
-  Counter = 0;
-//  for ( i = 0; i < nSizeM; i++ )
-//  for ( k = 0; k < nSizeK; k++ )
-//      Counter += ((v1M->pArray[i] & v1K->pArray[k]) == v1K->pArray[k]);
-  Vec_WrdForEachEntry( v1M, EntryM, i )
-  Vec_WrdForEachEntry( v1K, EntryK, k )
-      Counter += ((EntryM & EntryK) == EntryK);
-  printf( "Total = %8d.  ", Counter );
-  Abc_PrintTime( 1, "Time", clock() - clk );
-
-  clk = clock();
-  Counter = 0;
-//  for ( k = 0; k < nSizeK; k++ )
-//  for ( i = 0; i < nSizeM; i++ )
-//      Counter += ((v1M->pArray[i] & v1K->pArray[k]) == v1K->pArray[k]);
-  Vec_WrdForEachEntry( v1K, EntryK, k )
-  Vec_WrdForEachEntry( v1M, EntryM, i )
-      Counter += ((EntryM & EntryK) == EntryK);
-  printf( "Total = %8d.  ", Counter );
-  Abc_PrintTime( 1, "Time", clock() - clk );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/bdc/bdcTable.c b/src/aig/bdc/bdcTable.c
deleted file mode 100644
index 69f35d88..00000000
--- a/src/aig/bdc/bdcTable.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bdcTable.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Truth-table-based bi-decomposition engine.]
-
-  Synopsis    [Hash table for intermediate nodes.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - January 30, 2007.]
-
-  Revision    [$Id: bdcTable.c,v 1.00 2007/01/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "bdcInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Checks containment of the function in the ISF.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Bdc_TableCheckContainment( Bdc_Man_t * p, Bdc_Isf_t * pIsf, unsigned * puTruth )
-{
-    return Kit_TruthIsImply( pIsf->puOn, puTruth, p->nVars ) &&
-         Kit_TruthIsDisjoint( puTruth, pIsf->puOff, p->nVars );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds the new entry to the hash table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Bdc_Fun_t * Bdc_TableLookup( Bdc_Man_t * p, Bdc_Isf_t * pIsf )
-{
-    int fDisableCache = 0;
-    Bdc_Fun_t * pFunc;
-    if ( fDisableCache && Kit_WordCountOnes(pIsf->uSupp) > 1 )
-        return NULL;
-    if ( pIsf->uSupp == 0 )
-    {
-        assert( p->pTable[pIsf->uSupp] == p->pNodes );
-        if ( Kit_TruthIsConst1( pIsf->puOn, p->nVars ) )
-            return p->pNodes;
-        assert( Kit_TruthIsConst1( pIsf->puOff, p->nVars ) );
-        return Bdc_Not(p->pNodes);
-    }
-    for ( pFunc = p->pTable[pIsf->uSupp]; pFunc; pFunc = pFunc->pNext )
-        if ( Bdc_TableCheckContainment( p, pIsf, pFunc->puFunc ) )
-             return pFunc;
-    Bdc_IsfNot( pIsf );
-    for ( pFunc = p->pTable[pIsf->uSupp]; pFunc; pFunc = pFunc->pNext )
-        if ( Bdc_TableCheckContainment( p, pIsf, pFunc->puFunc ) )
-        {
-            Bdc_IsfNot( pIsf );
-            return Bdc_Not(pFunc);
-        }
-    Bdc_IsfNot( pIsf );
-    return NULL;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds the new entry to the hash table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_TableAdd( Bdc_Man_t * p, Bdc_Fun_t * pFunc )
-{
-    if ( p->pTable[pFunc->uSupp] == NULL )
-        Vec_IntPush( p->vSpots, pFunc->uSupp );
-    pFunc->pNext = p->pTable[pFunc->uSupp];
-    p->pTable[pFunc->uSupp] = pFunc;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds the new entry to the hash table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Bdc_TableClear( Bdc_Man_t * p )
-{
-    int Spot, i;
-    Vec_IntForEachEntry( p->vSpots, Spot, i )
-        p->pTable[Spot] = NULL;
-    Vec_IntClear( p->vSpots );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/bdc/bdc_.c b/src/aig/bdc/bdc_.c
deleted file mode 100644
index b29d4f5e..00000000
--- a/src/aig/bdc/bdc_.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [bdc_.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Truth-table-based bi-decomposition engine.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - January 30, 2007.]
-
-  Revision    [$Id: bdc_.c,v 1.00 2007/01/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "bdcInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/bdc/module.make b/src/aig/bdc/module.make
deleted file mode 100644
index 97f5b33b..00000000
--- a/src/aig/bdc/module.make
+++ /dev/null
@@ -1,5 +0,0 @@
-SRC +=  src/aig/bdc/bdcCore.c \
-    src/aig/bdc/bdcDec.c \
-    src/aig/bdc/bdcSpfd.c \
-    src/aig/bdc/bdcTable.c
-
diff --git a/src/aig/cec/cec.c b/src/aig/cec/cec.c
deleted file mode 100644
index 6968a599..00000000
--- a/src/aig/cec/cec.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cec.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cec.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cec.h b/src/aig/cec/cec.h
deleted file mode 100644
index 9e2237d7..00000000
--- a/src/aig/cec/cec.h
+++ /dev/null
@@ -1,233 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cec.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cec.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __CEC_H__
-#define __CEC_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-// dynamic SAT parameters
-typedef struct Cec_ParSat_t_ Cec_ParSat_t;
-struct Cec_ParSat_t_
-{
-    int              nBTLimit;      // conflict limit at a node
-    int              nSatVarMax;    // the max number of SAT variables
-    int              nCallsRecycle; // calls to perform before recycling SAT solver
-    int              fNonChrono;    // use non-chronological backtracling (for circuit SAT only)
-    int              fPolarFlip;    // flops polarity of variables
-    int              fCheckMiter;   // the circuit is the miter
-//    int              fFirstStop;    // stop on the first sat output
-    int              fLearnCls;     // perform clause learning
-    int              fVerbose;      // verbose stats
-};
-
-// simulation parameters
-typedef struct Cec_ParSim_t_ Cec_ParSim_t;
-struct Cec_ParSim_t_ 
-{
-    int              nWords;        // the number of simulation words
-    int              nFrames;       // the number of simulation frames
-    int              nRounds;       // the number of simulation rounds
-    int              nNonRefines;   // the max number of rounds without refinement
-    int              TimeLimit;     // the runtime limit in seconds
-    int              fDualOut;      // miter with separate outputs
-    int              fCheckMiter;   // the circuit is the miter
-//    int              fFirstStop;    // stop on the first sat output
-    int              fSeqSimulate;  // performs sequential simulation
-    int              fLatchCorr;    // consider only latch outputs
-    int              fConstCorr;    // consider only constants
-    int              fVeryVerbose;  // verbose stats
-    int              fVerbose;      // verbose stats
-};
-
-// semiformal parameters
-typedef struct Cec_ParSmf_t_ Cec_ParSmf_t;
-struct Cec_ParSmf_t_
-{
-    int              nWords;        // the number of simulation words
-    int              nRounds;       // the number of simulation rounds
-    int              nFrames;       // the max number of time frames
-    int              nNonRefines;   // the max number of rounds without refinement
-    int              nMinOutputs;   // the min outputs to accumulate
-    int              nBTLimit;      // conflict limit at a node
-    int              TimeLimit;     // the runtime limit in seconds
-    int              fDualOut;      // miter with separate outputs
-    int              fCheckMiter;   // the circuit is the miter
-//    int              fFirstStop;    // stop on the first sat output
-    int              fVerbose;      // verbose stats
-};
-
-// combinational SAT sweeping parameters
-typedef struct Cec_ParFra_t_ Cec_ParFra_t;
-struct Cec_ParFra_t_
-{
-    int              nWords;        // the number of simulation words
-    int              nRounds;       // the number of simulation rounds
-    int              nItersMax;     // the maximum number of iterations of SAT sweeping
-    int              nBTLimit;      // conflict limit at a node
-    int              TimeLimit;     // the runtime limit in seconds
-    int              nLevelMax;     // restriction on the level nodes to be swept
-    int              nDepthMax;     // the depth in terms of steps of speculative reduction
-    int              fRewriting;    // enables AIG rewriting
-    int              fCheckMiter;   // the circuit is the miter
-//    int              fFirstStop;    // stop on the first sat output
-    int              fDualOut;      // miter with separate outputs
-    int              fColorDiff;    // miter with separate outputs
-    int              fSatSweeping;  // enable SAT sweeping
-    int              fVeryVerbose;  // verbose stats
-    int              fVerbose;      // verbose stats
-    int              iOutFail;      // the failed output
-};
-
-// combinational equivalence checking parameters
-typedef struct Cec_ParCec_t_ Cec_ParCec_t;
-struct Cec_ParCec_t_
-{
-    int              nBTLimit;      // conflict limit at a node
-    int              TimeLimit;     // the runtime limit in seconds
-//    int              fFirstStop;    // stop on the first sat output
-    int              fUseSmartCnf;  // use smart CNF computation
-    int              fRewriting;    // enables AIG rewriting
-    int              fVeryVerbose;  // verbose stats
-    int              fVerbose;      // verbose stats
-    int              iOutFail;      // the number of failed output
-};
-
-// sequential register correspodence parameters
-typedef struct Cec_ParCor_t_ Cec_ParCor_t;
-struct Cec_ParCor_t_
-{
-    int              nWords;        // the number of simulation words
-    int              nRounds;       // the number of simulation rounds
-    int              nFrames;       // the number of time frames
-    int              nPrefix;       // the number of time frames in the prefix
-    int              nBTLimit;      // conflict limit at a node
-    int              nLevelMax;     // (scorr only) the max number of levels
-    int              nStepsMax;     // (scorr only) the max number of induction steps
-    int              fLatchCorr;    // consider only latch outputs
-    int              fConstCorr;    // consider only constants
-    int              fUseRings;     // use rings
-    int              fMakeChoices;  // use equilvaences as choices
-    int              fUseCSat;      // use circuit-based solver
-//    int              fFirstStop;    // stop on the first sat output
-    int              fUseSmartCnf;  // use smart CNF computation
-    int              fVerboseFlops; // verbose stats
-    int              fVeryVerbose;  // verbose stats
-    int              fVerbose;      // verbose stats
-    // callback
-    void *           pData;
-    void *           pFunc;
-};
-
-// sequential register correspodence parameters
-typedef struct Cec_ParChc_t_ Cec_ParChc_t;
-struct Cec_ParChc_t_
-{
-    int              nWords;        // the number of simulation words
-    int              nRounds;       // the number of simulation rounds
-    int              nBTLimit;      // conflict limit at a node
-    int              fUseRings;     // use rings
-    int              fUseCSat;      // use circuit-based solver
-    int              fVeryVerbose;  // verbose stats
-    int              fVerbose;      // verbose stats
-};
-
-// sequential synthesis parameters
-typedef struct Cec_ParSeq_t_ Cec_ParSeq_t;
-struct Cec_ParSeq_t_
-{
-    int              fUseLcorr;     // enables latch correspondence
-    int              fUseScorr;     // enables signal correspondence
-    int              nBTLimit;      // (scorr/lcorr) conflict limit at a node
-    int              nFrames;       // (scorr/lcorr) the number of timeframes
-    int              nLevelMax;     // (scorr only) the max number of levels
-    int              fConsts;       // (scl only) merging constants
-    int              fEquivs;       // (scl only) merging equivalences
-    int              fUseMiniSat;   // enables MiniSat in lcorr/scorr
-    int              nMinDomSize;   // the size of minimum clock domain
-    int              fVeryVerbose;  // verbose stats
-    int              fVerbose;      // verbose stats
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== cecCec.c ==========================================================*/
-extern int           Cec_ManVerify( Gia_Man_t * p, Cec_ParCec_t * pPars );
-extern int           Cec_ManVerifyTwo( Gia_Man_t * p0, Gia_Man_t * p1, int fVerbose );
-/*=== cecChoice.c ==========================================================*/
-extern Gia_Man_t *   Cec_ManChoiceComputation( Gia_Man_t * pAig, Cec_ParChc_t * pPars );
-/*=== cecCorr.c ==========================================================*/
-extern int           Cec_ManLSCorrespondenceClasses( Gia_Man_t * pAig, Cec_ParCor_t * pPars );
-extern Gia_Man_t *   Cec_ManLSCorrespondence( Gia_Man_t * pAig, Cec_ParCor_t * pPars );
-/*=== cecCore.c ==========================================================*/
-extern void          Cec_ManSatSetDefaultParams( Cec_ParSat_t * p );
-extern void          Cec_ManSimSetDefaultParams( Cec_ParSim_t * p );
-extern void          Cec_ManSmfSetDefaultParams( Cec_ParSmf_t * p );
-extern void          Cec_ManFraSetDefaultParams( Cec_ParFra_t * p );
-extern void          Cec_ManCecSetDefaultParams( Cec_ParCec_t * p );
-extern void          Cec_ManCorSetDefaultParams( Cec_ParCor_t * p );
-extern void          Cec_ManChcSetDefaultParams( Cec_ParChc_t * p );
-extern Gia_Man_t *   Cec_ManSatSweeping( Gia_Man_t * pAig, Cec_ParFra_t * pPars );
-extern Gia_Man_t *   Cec_ManSatSolving( Gia_Man_t * pAig, Cec_ParSat_t * pPars );
-extern void          Cec_ManSimulation( Gia_Man_t * pAig, Cec_ParSim_t * pPars );
-/*=== cecSeq.c ==========================================================*/
-extern int           Cec_ManSeqResimulateCounter( Gia_Man_t * pAig, Cec_ParSim_t * pPars, Abc_Cex_t * pCex );
-extern int           Cec_ManSeqSemiformal( Gia_Man_t * pAig, Cec_ParSmf_t * pPars );
-extern int           Cec_ManCheckNonTrivialCands( Gia_Man_t * pAig );
-/*=== cecSynth.c ==========================================================*/
-extern int           Cec_SeqReadMinDomSize( Cec_ParSeq_t * p );
-extern int           Cec_SeqReadVerbose( Cec_ParSeq_t * p );
-extern void          Cec_SeqSynthesisSetDefaultParams( Cec_ParSeq_t * pPars );
-extern int           Cec_SequentialSynthesisPart( Gia_Man_t * p, Cec_ParSeq_t * pPars );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/cec/cecCec.c b/src/aig/cec/cecCec.c
deleted file mode 100644
index 9fd8a03f..00000000
--- a/src/aig/cec/cecCec.c
+++ /dev/null
@@ -1,373 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecCec.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [Integrated combinatinal equivalence checker.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecCec.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-#include "fra.h"
-#include "giaAig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Saves the input pattern with the given number.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManTransformPattern( Gia_Man_t * p, int iOut, int * pValues )
-{
-    int i;
-    assert( p->pCexComb == NULL );
-    p->pCexComb = (Abc_Cex_t *)ABC_CALLOC( char, 
-        sizeof(Abc_Cex_t) + sizeof(unsigned) * Gia_BitWordNum(Gia_ManCiNum(p)) );
-    p->pCexComb->iPo = iOut;
-    p->pCexComb->nPis = Gia_ManCiNum(p);
-    p->pCexComb->nBits = Gia_ManCiNum(p);
-    for ( i = 0; i < Gia_ManCiNum(p); i++ )
-        if ( pValues[i] )
-            Aig_InfoSetBit( p->pCexComb->pData, i );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Interface to the old CEC engine]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManVerifyOld( Gia_Man_t * pMiter, int fVerbose, int * piOutFail )
-{
-//    extern int Fra_FraigCec( Aig_Man_t ** ppAig, int nConfLimit, int fVerbose );
-    extern int Ssw_SecCexResimulate( Aig_Man_t * p, int * pModel, int * pnOutputs );
-    Gia_Man_t * pTemp = Gia_ManTransformMiter( pMiter );
-    Aig_Man_t * pMiterCec = Gia_ManToAig( pTemp, 0 );
-    int RetValue, iOut, nOuts, clkTotal = clock();
-    if ( piOutFail )
-        *piOutFail = -1;
-    Gia_ManStop( pTemp );
-    // run CEC on this miter
-    RetValue = Fra_FraigCec( &pMiterCec, 10000000, fVerbose );
-    // report the miter
-    if ( RetValue == 1 )
-    {
-        Abc_Print( 1, "Networks are equivalent.   " );
-Abc_PrintTime( 1, "Time", clock() - clkTotal );
-    }
-    else if ( RetValue == 0 )
-    {
-        Abc_Print( 1, "Networks are NOT EQUIVALENT.   " );
-Abc_PrintTime( 1, "Time", clock() - clkTotal );
-        if ( pMiterCec->pData == NULL )
-            Abc_Print( 1, "Counter-example is not available.\n" );
-        else
-        {
-            iOut = Ssw_SecCexResimulate( pMiterCec, (int *)pMiterCec->pData, &nOuts );
-            if ( iOut == -1 )
-                Abc_Print( 1, "Counter-example verification has failed.\n" );
-            else 
-            {
-//                Aig_Obj_t * pObj = Aig_ManPo(pMiterCec, iOut);
-//                Aig_Obj_t * pFan = Aig_ObjFanin0(pObj);
-                Abc_Print( 1, "Primary output %d has failed", iOut );
-                if ( nOuts-1 >= 0 )
-                    Abc_Print( 1, ", along with other %d incorrect outputs", nOuts-1 );
-                Abc_Print( 1, ".\n" );
-                if ( piOutFail )
-                    *piOutFail = iOut;
-            }
-            Cec_ManTransformPattern( pMiter, iOut, (int *)pMiterCec->pData );
-        }
-    }
-    else
-    {
-        Abc_Print( 1, "Networks are UNDECIDED.   " );
-Abc_PrintTime( 1, "Time", clock() - clkTotal );
-    }
-    fflush( stdout );
-    Aig_ManStop( pMiterCec );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [New CEC engine.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManVerify( Gia_Man_t * pInit, Cec_ParCec_t * pPars )
-{
-    int fDumpUndecided = 0;
-    Cec_ParFra_t ParsFra, * pParsFra = &ParsFra;
-    Gia_Man_t * p, * pNew;
-    int RetValue, clk = clock();
-    double clkTotal = clock();
-    // preprocess 
-    p = Gia_ManDup( pInit );
-    Gia_ManEquivFixOutputPairs( p );
-    p = Gia_ManCleanup( pNew = p );
-    Gia_ManStop( pNew );
-    // sweep for equivalences
-    Cec_ManFraSetDefaultParams( pParsFra );
-    pParsFra->nItersMax    = 1000;
-    pParsFra->nBTLimit     = pPars->nBTLimit;
-    pParsFra->TimeLimit    = pPars->TimeLimit;
-    pParsFra->fVerbose     = pPars->fVerbose;
-    pParsFra->fCheckMiter  = 1;
-    pParsFra->fDualOut     = 1;
-    pNew = Cec_ManSatSweeping( p, pParsFra );
-    pPars->iOutFail = pParsFra->iOutFail;
-    // update
-    pInit->pCexComb = p->pCexComb; p->pCexComb = NULL;
-    Gia_ManStop( p );
-    p = pInit;
-    // continue
-    if ( pNew == NULL )
-    {
-        if ( p->pCexComb != NULL )
-        {
-            if ( p->pCexComb && !Gia_ManVerifyCex( p, p->pCexComb, 1 ) )
-                Abc_Print( 1, "Counter-example simulation has failed.\n" );
-            Abc_Print( 1, "Networks are NOT EQUIVALENT.  " );
-            Abc_PrintTime( 1, "Time", clock() - clk );
-            return 0;
-        }
-        p = Gia_ManDup( pInit );
-        Gia_ManEquivFixOutputPairs( p );
-        p = Gia_ManCleanup( pNew = p );
-        Gia_ManStop( pNew );
-        pNew = p;
-    }
-    if ( Gia_ManAndNum(pNew) == 0 )
-    {
-        Gia_Obj_t * pObj1, * pObj2;
-        int i;
-        Gia_ManForEachPo( pNew, pObj1, i )
-        {
-            pObj2 = Gia_ManPo( pNew, ++i );
-            if ( Gia_ObjChild0(pObj1) != Gia_ObjChild0(pObj2) )
-            {
-                Abc_Print( 1, "Networks are NOT EQUIVALENT. Outputs %d trivially differ.  ", i/2 );
-                Abc_PrintTime( 1, "Time", clock() - clk );
-                Gia_ManStop( pNew );
-                pPars->iOutFail = i/2;
-                return 0;
-            }
-        }
-        Abc_Print( 1, "Networks are equivalent.  " );
-        Abc_PrintTime( 1, "Time", clock() - clk );
-        Gia_ManStop( pNew );
-        return 1;
-    }
-    if ( pPars->fVerbose )
-    {
-    Abc_Print( 1, "Networks are UNDECIDED after the new CEC engine.  " );
-    Abc_PrintTime( 1, "Time", clock() - clk );
-    }
-    if ( fDumpUndecided )
-    {
-        ABC_FREE( pNew->pReprs );
-        ABC_FREE( pNew->pNexts );
-        Gia_WriteAiger( pNew, "gia_cec_undecided.aig", 0, 0 );
-        Abc_Print( 1, "The result is written into file \"%s\".\n", "gia_cec_undecided.aig" );
-    }
-    if ( pPars->TimeLimit && ((double)clock() - clkTotal)/CLOCKS_PER_SEC >= pPars->TimeLimit )
-    {
-        Gia_ManStop( pNew );
-        return -1;
-    }
-    // call other solver
-    if ( pPars->fVerbose )
-    Abc_Print( 1, "Calling the old CEC engine.\n" );
-    fflush( stdout );
-    RetValue = Cec_ManVerifyOld( pNew, pPars->fVerbose, &pPars->iOutFail );
-    p->pCexComb = pNew->pCexComb; pNew->pCexComb = NULL;
-    if ( p->pCexComb && !Gia_ManVerifyCex( p, p->pCexComb, 1 ) )
-        Abc_Print( 1, "Counter-example simulation has failed.\n" );
-    Gia_ManStop( pNew );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [New CEC engine applied to two circuits.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManVerifyTwo( Gia_Man_t * p0, Gia_Man_t * p1, int fVerbose )
-{
-    Cec_ParCec_t ParsCec, * pPars = &ParsCec;
-    Gia_Man_t * pMiter;
-    int RetValue;
-    Cec_ManCecSetDefaultParams( pPars );
-    pPars->fVerbose = fVerbose;
-    pMiter = Gia_ManMiter( p0, p1, 1, 0, pPars->fVerbose );
-    if ( pMiter == NULL )
-        return -1;
-    RetValue = Cec_ManVerify( pMiter, pPars );
-    p0->pCexComb = pMiter->pCexComb; pMiter->pCexComb = NULL;
-    Gia_ManStop( pMiter );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [New CEC engine applied to two circuits.]
-
-  Description [Returns 1 if equivalent, 0 if counter-example, -1 if undecided.
-  Counter-example is returned in the first manager as pAig0->pSeqModel.
-  The format is given in Abc_Cex_t (file "abc\src\aig\gia\gia.h").]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManVerifyTwoAigs( Aig_Man_t * pAig0, Aig_Man_t * pAig1, int fVerbose )
-{
-    Gia_Man_t * p0, * p1, * pTemp;
-    int RetValue;
-
-    p0 = Gia_ManFromAig( pAig0 );
-    p0 = Gia_ManCleanup( pTemp = p0 );
-    Gia_ManStop( pTemp );
-
-    p1 = Gia_ManFromAig( pAig1 );
-    p1 = Gia_ManCleanup( pTemp = p1 );
-    Gia_ManStop( pTemp );
-
-    RetValue = Cec_ManVerifyTwo( p0, p1, fVerbose );
-    pAig0->pSeqModel = p0->pCexComb; p0->pCexComb = NULL;
-    Gia_ManStop( p0 );
-    Gia_ManStop( p1 );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Implementation of new signal correspodence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Cec_LatchCorrespondence( Aig_Man_t * pAig, int nConfs, int fUseCSat )
-{
-    Gia_Man_t * pGia;
-    Cec_ParCor_t CorPars, * pCorPars = &CorPars;
-    Cec_ManCorSetDefaultParams( pCorPars );
-    pCorPars->fLatchCorr = 1;
-    pCorPars->fUseCSat   = fUseCSat;
-    pCorPars->nBTLimit   = nConfs;
-    pGia = Gia_ManFromAigSimple( pAig );
-    Cec_ManLSCorrespondenceClasses( pGia, pCorPars );
-    Gia_ManReprToAigRepr( pAig, pGia );
-    Gia_ManStop( pGia );
-    return Aig_ManDupSimple( pAig );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Implementation of new signal correspodence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Cec_SignalCorrespondence( Aig_Man_t * pAig, int nConfs, int fUseCSat )
-{
-    Gia_Man_t * pGia;
-    Cec_ParCor_t CorPars, * pCorPars = &CorPars;
-    Cec_ManCorSetDefaultParams( pCorPars );
-    pCorPars->fUseCSat  = fUseCSat;
-    pCorPars->nBTLimit  = nConfs;
-    pGia = Gia_ManFromAigSimple( pAig );
-    Cec_ManLSCorrespondenceClasses( pGia, pCorPars );
-    Gia_ManReprToAigRepr( pAig, pGia );
-    Gia_ManStop( pGia );
-    return Aig_ManDupSimple( pAig );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Implementation of fraiging.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Cec_FraigCombinational( Aig_Man_t * pAig, int nConfs, int fVerbose )
-{
-    Gia_Man_t * pGia;
-    Cec_ParFra_t FraPars, * pFraPars = &FraPars;
-    Cec_ManFraSetDefaultParams( pFraPars );
-    pFraPars->fSatSweeping = 1;
-    pFraPars->nBTLimit  = nConfs;
-    pFraPars->nItersMax = 20;
-    pFraPars->fVerbose  = fVerbose;
-    pGia = Gia_ManFromAigSimple( pAig );
-    Cec_ManSatSweeping( pGia, pFraPars );
-    Gia_ManReprToAigRepr( pAig, pGia );
-    Gia_ManStop( pGia );
-    return Aig_ManDupSimple( pAig );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cecChoice.c b/src/aig/cec/cecChoice.c
deleted file mode 100644
index 076b34a2..00000000
--- a/src/aig/cec/cecChoice.c
+++ /dev/null
@@ -1,409 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecChoice.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [Computation of structural choices.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecChoice.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-#include "giaAig.h"
-#include "dch.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static void Cec_ManCombSpecReduce_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj );
-
-extern int Cec_ManResimulateCounterExamplesComb( Cec_ManSim_t * pSim, Vec_Int_t * vCexStore );
-extern int Gia_ManCheckRefinements( Gia_Man_t * p, Vec_Str_t * vStatus, Vec_Int_t * vOutputs, Cec_ManSim_t * pSim, int fRings );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the real value of the literal w/o spec reduction.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Cec_ManCombSpecReal( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj )
-{
-    assert( Gia_ObjIsAnd(pObj) );
-    Cec_ManCombSpecReduce_rec( pNew, p, Gia_ObjFanin0(pObj) );
-    Cec_ManCombSpecReduce_rec( pNew, p, Gia_ObjFanin1(pObj) );
-    return Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recursively performs speculative reduction for the object.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManCombSpecReduce_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj )
-{
-    Gia_Obj_t * pRepr;
-    if ( ~pObj->Value )
-        return;
-    if ( (pRepr = Gia_ObjReprObj(p, Gia_ObjId(p, pObj))) )
-    {
-        Cec_ManCombSpecReduce_rec( pNew, p, pRepr );
-        pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
-        return;
-    }
-    pObj->Value = Cec_ManCombSpecReal( pNew, p, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives SRM for signal correspondence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Cec_ManCombSpecReduce( Gia_Man_t * p, Vec_Int_t ** pvOutputs, int fRings )
-{
-    Gia_Man_t * pNew, * pTemp;
-    Gia_Obj_t * pObj, * pRepr;
-    Vec_Int_t * vXorLits;
-    int i, iPrev, iObj, iPrevNew, iObjNew;
-    assert( p->pReprs != NULL );
-    Gia_ManSetPhase( p );
-    Gia_ManFillValue( p );
-    pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
-    Gia_ManHashAlloc( pNew );
-    Gia_ManConst0(p)->Value = 0;
-    Gia_ManForEachCi( p, pObj, i )
-        pObj->Value = Gia_ManAppendCi(pNew);
-    *pvOutputs = Vec_IntAlloc( 1000 );
-    vXorLits = Vec_IntAlloc( 1000 );
-    if ( fRings )
-    {
-        Gia_ManForEachObj1( p, pObj, i )
-        {
-            if ( Gia_ObjIsConst( p, i ) )
-            {
-                iObjNew = Cec_ManCombSpecReal( pNew, p, pObj );
-                iObjNew = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pObj) );
-                if ( iObjNew != 0 )
-                {
-                    Vec_IntPush( *pvOutputs, 0 );
-                    Vec_IntPush( *pvOutputs, i );
-                    Vec_IntPush( vXorLits, iObjNew );
-                }
-            }
-            else if ( Gia_ObjIsHead( p, i ) )
-            {
-                iPrev = i;
-                Gia_ClassForEachObj1( p, i, iObj )
-                {
-                    iPrevNew = Cec_ManCombSpecReal( pNew, p, Gia_ManObj(p, iPrev) );
-                    iObjNew  = Cec_ManCombSpecReal( pNew, p, Gia_ManObj(p, iObj) );
-                    iPrevNew = Gia_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
-                    iObjNew  = Gia_LitNotCond( iObjNew,  Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
-                    if ( iPrevNew != iObjNew && iPrevNew != 0 && iObjNew != 1 )
-                    {
-                        Vec_IntPush( *pvOutputs, iPrev );
-                        Vec_IntPush( *pvOutputs, iObj );
-                        Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Gia_LitNot(iObjNew)) );
-                    }
-                    iPrev = iObj;
-                }
-                iObj = i;
-                iPrevNew = Cec_ManCombSpecReal( pNew, p, Gia_ManObj(p, iPrev) );
-                iObjNew  = Cec_ManCombSpecReal( pNew, p, Gia_ManObj(p, iObj) );
-                iPrevNew = Gia_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
-                iObjNew  = Gia_LitNotCond( iObjNew,  Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
-                if ( iPrevNew != iObjNew && iPrevNew != 0 && iObjNew != 1 )
-                {
-                    Vec_IntPush( *pvOutputs, iPrev );
-                    Vec_IntPush( *pvOutputs, iObj );
-                    Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Gia_LitNot(iObjNew)) );
-                }
-            }
-        }
-    }
-    else
-    {
-        Gia_ManForEachObj1( p, pObj, i )
-        {
-            pRepr = Gia_ObjReprObj( p, Gia_ObjId(p,pObj) );
-            if ( pRepr == NULL )
-                continue;
-            iPrevNew = Gia_ObjIsConst(p, i)? 0 : Cec_ManCombSpecReal( pNew, p, pRepr );
-            iObjNew  = Cec_ManCombSpecReal( pNew, p, pObj );
-            iObjNew  = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
-            if ( iPrevNew != iObjNew )
-            {
-                Vec_IntPush( *pvOutputs, Gia_ObjId(p, pRepr) );
-                Vec_IntPush( *pvOutputs, Gia_ObjId(p, pObj) );
-                Vec_IntPush( vXorLits, Gia_ManHashXor(pNew, iPrevNew, iObjNew) );
-            }
-        }
-    }
-    Vec_IntForEachEntry( vXorLits, iObjNew, i )
-        Gia_ManAppendCo( pNew, iObjNew );
-    Vec_IntFree( vXorLits );
-    Gia_ManHashStop( pNew );
-//Abc_Print( 1, "Before sweeping = %d\n", Gia_ManAndNum(pNew) );
-    pNew = Gia_ManCleanup( pTemp = pNew );
-//Abc_Print( 1, "After sweeping = %d\n", Gia_ManAndNum(pNew) );
-    Gia_ManStop( pTemp );
-    return pNew;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManChoiceComputation_int( Gia_Man_t * pAig, Cec_ParChc_t * pPars )
-{
-    int nItersMax = 1000;
-    Vec_Str_t * vStatus;
-    Vec_Int_t * vOutputs;
-    Vec_Int_t * vCexStore;
-    Cec_ParSim_t ParsSim, * pParsSim = &ParsSim;
-    Cec_ParSat_t ParsSat, * pParsSat = &ParsSat;
-    Cec_ManSim_t * pSim;
-    Gia_Man_t * pSrm;
-    int r, RetValue;
-    int clkSat = 0, clkSim = 0, clkSrm = 0, clkTotal = clock();
-    int clk2, clk = clock();
-    ABC_FREE( pAig->pReprs );
-    ABC_FREE( pAig->pNexts );
-    Gia_ManRandom( 1 );
-    // prepare simulation manager
-    Cec_ManSimSetDefaultParams( pParsSim );
-    pParsSim->nWords     = pPars->nWords;
-    pParsSim->nFrames    = pPars->nRounds;
-    pParsSim->fVerbose   = pPars->fVerbose;
-    pParsSim->fLatchCorr   = 0;
-    pParsSim->fSeqSimulate = 0;
-    // create equivalence classes of registers
-    pSim = Cec_ManSimStart( pAig, pParsSim );
-    Cec_ManSimClassesPrepare( pSim, -1 );
-    Cec_ManSimClassesRefine( pSim );
-    // prepare SAT solving
-    Cec_ManSatSetDefaultParams( pParsSat );
-    pParsSat->nBTLimit = pPars->nBTLimit;
-    pParsSat->fVerbose = pPars->fVerbose;
-    if ( pPars->fVerbose )
-    {
-        Abc_Print( 1, "Obj = %7d. And = %7d. Conf = %5d. Ring = %d. CSat = %d.\n",
-            Gia_ManObjNum(pAig), Gia_ManAndNum(pAig), pPars->nBTLimit, pPars->fUseRings, pPars->fUseCSat );
-        Cec_ManRefinedClassPrintStats( pAig, NULL, 0, clock() - clk );
-    }
-    // perform refinement of equivalence classes
-    for ( r = 0; r < nItersMax; r++ )
-    { 
-        clk = clock();
-        // perform speculative reduction
-        clk2 = clock();
-        pSrm = Cec_ManCombSpecReduce( pAig, &vOutputs, pPars->fUseRings );
-        assert( Gia_ManRegNum(pSrm) == 0 && Gia_ManCiNum(pSrm) == Gia_ManCiNum(pAig) );
-        clkSrm += clock() - clk2;
-        if ( Gia_ManCoNum(pSrm) == 0 )
-        {
-            if ( pPars->fVerbose )
-                Cec_ManRefinedClassPrintStats( pAig, NULL, r+1, clock() - clk );
-            Vec_IntFree( vOutputs );
-            Gia_ManStop( pSrm );            
-            break;
-        }
-//Gia_DumpAiger( pSrm, "choicesrm", r, 2 );
-        // found counter-examples to speculation
-        clk2 = clock();
-        if ( pPars->fUseCSat )
-            vCexStore = Cbs_ManSolveMiterNc( pSrm, pPars->nBTLimit, &vStatus, 0 );
-        else
-            vCexStore = Cec_ManSatSolveMiter( pSrm, pParsSat, &vStatus );
-        Gia_ManStop( pSrm );
-        clkSat += clock() - clk2;
-        if ( Vec_IntSize(vCexStore) == 0 )
-        {
-            if ( pPars->fVerbose )
-                Cec_ManRefinedClassPrintStats( pAig, vStatus, r+1, clock() - clk );
-            Vec_IntFree( vCexStore );
-            Vec_StrFree( vStatus );
-            Vec_IntFree( vOutputs );
-            break;
-        }
-        // refine classes with these counter-examples
-        clk2 = clock();
-        RetValue = Cec_ManResimulateCounterExamplesComb( pSim, vCexStore );
-        Vec_IntFree( vCexStore );
-        clkSim += clock() - clk2;
-        Gia_ManCheckRefinements( pAig, vStatus, vOutputs, pSim, pPars->fUseRings );
-        if ( pPars->fVerbose )
-            Cec_ManRefinedClassPrintStats( pAig, vStatus, r+1, clock() - clk );
-        Vec_StrFree( vStatus );
-        Vec_IntFree( vOutputs );
-//Gia_ManEquivPrintClasses( pAig, 1, 0 );
-    }
-    // check the overflow
-    if ( r == nItersMax )
-        Abc_Print( 1, "The refinement was not finished. The result may be incorrect.\n" );
-    Cec_ManSimStop( pSim );
-    clkTotal = clock() - clkTotal;
-    // report the results
-    if ( pPars->fVerbose )
-    {
-        Abc_PrintTimeP( 1, "Srm  ", clkSrm,                        clkTotal );
-        Abc_PrintTimeP( 1, "Sat  ", clkSat,                        clkTotal );
-        Abc_PrintTimeP( 1, "Sim  ", clkSim,                        clkTotal );
-        Abc_PrintTimeP( 1, "Other", clkTotal-clkSat-clkSrm-clkSim, clkTotal );
-        Abc_PrintTime( 1, "TOTAL",  clkTotal );
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes choices for the vector of AIGs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Cec_ManChoiceComputationVec( Gia_Man_t * pGia, int nGias, Cec_ParChc_t * pPars )
-{
-    Gia_Man_t * pNew;
-    int RetValue;
-    // compute equivalences of the miter
-//    pMiter = Gia_ManChoiceMiter( vGias );
-//    Gia_ManSetRegNum( pMiter, 0 );
-    RetValue = Cec_ManChoiceComputation_int( pGia, pPars );
-    // derive AIG with choices
-    pNew = Gia_ManEquivToChoices( pGia, nGias );
-    Gia_ManHasChoices( pNew );
-//    Gia_ManStop( pMiter );
-    // report the results
-    if ( pPars->fVerbose )
-    {
-//        Abc_Print( 1, "NBeg = %d. NEnd = %d. (Gain = %6.2f %%).  RBeg = %d. REnd = %d. (Gain = %6.2f %%).\n", 
-//            Gia_ManAndNum(pAig), Gia_ManAndNum(pNew), 
-//            100.0*(Gia_ManAndNum(pAig)-Gia_ManAndNum(pNew))/(Gia_ManAndNum(pAig)?Gia_ManAndNum(pAig):1), 
-//            Gia_ManRegNum(pAig), Gia_ManRegNum(pNew), 
-//            100.0*(Gia_ManRegNum(pAig)-Gia_ManRegNum(pNew))/(Gia_ManRegNum(pAig)?Gia_ManRegNum(pAig):1) );
-    }
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes choices for one AIGs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Cec_ManChoiceComputation( Gia_Man_t * pAig, Cec_ParChc_t * pParsChc )
-{
-//    extern Aig_Man_t * Dar_ManChoiceNew( Aig_Man_t * pAig, Dch_Pars_t * pPars );
-    Dch_Pars_t Pars, * pPars = &Pars;
-    Aig_Man_t * pMan, * pManNew;
-    Gia_Man_t * pGia;
-    if ( 0 ) 
-    {
-        pGia = Cec_ManChoiceComputationVec( pAig, 3, pParsChc );
-    }
-    else
-    {
-        pMan = Gia_ManToAig( pAig, 0 );
-        Dch_ManSetDefaultParams( pPars );
-        pPars->fUseGia  = 1;
-        pPars->nBTLimit = pParsChc->nBTLimit;
-        pPars->fUseCSat = pParsChc->fUseCSat;
-        pPars->fVerbose = pParsChc->fVerbose;
-        pManNew = Dar_ManChoiceNew( pMan, pPars );
-        pGia = Gia_ManFromAig( pManNew );
-        Aig_ManStop( pManNew );
-//        Aig_ManStop( pMan );
-    }
-    return pGia;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs computation of AIGs with choices.]
-
-  Description [Takes several AIGs and performs choicing.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Cec_ComputeChoices( Gia_Man_t * pGia, Dch_Pars_t * pPars )
-{
-    Cec_ParChc_t ParsChc, * pParsChc = &ParsChc;
-    Aig_Man_t * pAig;
-    if ( pPars->fVerbose )
-        Abc_PrintTime( 1, "Synthesis time", pPars->timeSynth );
-    Cec_ManChcSetDefaultParams( pParsChc );
-    pParsChc->nBTLimit = pPars->nBTLimit;
-    pParsChc->fUseCSat = pPars->fUseCSat;
-    if ( pParsChc->fUseCSat && pParsChc->nBTLimit > 100 )
-        pParsChc->nBTLimit = 100;
-    pParsChc->fVerbose = pPars->fVerbose;
-    pGia = Cec_ManChoiceComputationVec( pGia, 3, pParsChc );
-    Gia_ManSetRegNum( pGia, Gia_ManRegNum(pGia) );
-    pAig = Gia_ManToAig( pGia, 1 );
-    Gia_ManStop( pGia );
-    return pAig;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cecClass.c b/src/aig/cec/cecClass.c
deleted file mode 100644
index b6118038..00000000
--- a/src/aig/cec/cecClass.c
+++ /dev/null
@@ -1,931 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecClass.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [Equivalence class refinement.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecClass.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static inline unsigned * Cec_ObjSim( Cec_ManSim_t * p, int Id )            { return p->pMems + p->pSimInfo[Id] + 1;   }
-static inline void       Cec_ObjSetSim( Cec_ManSim_t * p, int Id, int n )  { p->pSimInfo[Id] = n;                     }
-
-static inline float      Cec_MemUsage( Cec_ManSim_t * p )                  { return 1.0*p->nMemsMax*(p->pPars->nWords+1)/(1<<20);   }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Compares simulation info of one node with constant 0.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSimCompareConst( unsigned * p, int nWords )
-{
-    int w;
-    if ( p[0] & 1 )
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( p[w] != ~0 )
-                return 0;
-        return 1;
-    }
-    else
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( p[w] != 0 )
-                return 0;
-        return 1;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compares simulation info of two nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSimCompareEqual( unsigned * p0, unsigned * p1, int nWords )
-{
-    int w;
-    if ( (p0[0] & 1) == (p1[0] & 1) )
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( p0[w] != p1[w] )
-                return 0;
-        return 1;
-    }
-    else
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( p0[w] != ~p1[w] )
-                return 0;
-        return 1;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of the first non-equal bit.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSimCompareConstFirstBit( unsigned * p, int nWords )
-{
-    int w;
-    if ( p[0] & 1 )
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( p[w] != ~0 )
-                return 32*w + Gia_WordFindFirstBit( ~p[w] );
-        return -1;
-    }
-    else
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( p[w] != 0 )
-                return 32*w + Gia_WordFindFirstBit( p[w] );
-        return -1;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compares simulation info of two nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSimCompareEqualFirstBit( unsigned * p0, unsigned * p1, int nWords )
-{
-    int w;
-    if ( (p0[0] & 1) == (p1[0] & 1) )
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( p0[w] != p1[w] )
-                return 32*w + Gia_WordFindFirstBit( p0[w] ^ p1[w] );
-        return -1;
-    }
-    else
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( p0[w] != ~p1[w] )
-                return 32*w + Gia_WordFindFirstBit( p0[w] ^ ~p1[w] );
-        return -1;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of the first non-equal bit.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSimCompareConstScore( unsigned * p, int nWords, int * pScores )
-{
-    int w, b;
-    if ( p[0] & 1 )
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( p[w] != ~0 )
-                for ( b = 0; b < 32; b++ )
-                    if ( ((~p[w]) >> b ) & 1 )
-                        pScores[32*w + b]++;
-    }
-    else
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( p[w] != 0 )
-                for ( b = 0; b < 32; b++ )
-                    if ( ((p[w]) >> b ) & 1 )
-                        pScores[32*w + b]++;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compares simulation info of two nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSimCompareEqualScore( unsigned * p0, unsigned * p1, int nWords, int * pScores )
-{
-    int w, b;
-    if ( (p0[0] & 1) == (p1[0] & 1) )
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( p0[w] != p1[w] )
-                for ( b = 0; b < 32; b++ )
-                    if ( ((p0[w] ^ p1[w]) >> b ) & 1 )
-                        pScores[32*w + b]++;
-    }
-    else
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( p0[w] != ~p1[w] )
-                for ( b = 0; b < 32; b++ )
-                    if ( ((p0[w] ^ ~p1[w]) >> b ) & 1 )
-                        pScores[32*w + b]++;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates equivalence class.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSimClassCreate( Gia_Man_t * p, Vec_Int_t * vClass )
-{
-    int Repr = GIA_VOID, EntPrev = -1, Ent, i;
-    assert( Vec_IntSize(vClass) > 0 );
-    Vec_IntForEachEntry( vClass, Ent, i )
-    {
-        if ( i == 0 )
-        {
-            Repr = Ent;
-            Gia_ObjSetRepr( p, Ent, GIA_VOID );
-            EntPrev = Ent;
-        }
-        else
-        {
-            assert( Repr < Ent );
-            Gia_ObjSetRepr( p, Ent, Repr );
-            Gia_ObjSetNext( p, EntPrev, Ent );
-            EntPrev = Ent;
-        }
-    }
-    Gia_ObjSetNext( p, EntPrev, 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Refines one equivalence class.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSimClassRefineOne( Cec_ManSim_t * p, int i )
-{
-    unsigned * pSim0, * pSim1;
-    int Ent;
-    Vec_IntClear( p->vClassOld );
-    Vec_IntClear( p->vClassNew );
-    Vec_IntPush( p->vClassOld, i );
-    pSim0 = Cec_ObjSim(p, i);
-    Gia_ClassForEachObj1( p->pAig, i, Ent )
-    {
-        pSim1 = Cec_ObjSim(p, Ent);
-        if ( Cec_ManSimCompareEqual( pSim0, pSim1, p->nWords ) )
-            Vec_IntPush( p->vClassOld, Ent );
-        else
-        {
-            Vec_IntPush( p->vClassNew, Ent );
-            if ( p->pBestState )
-                Cec_ManSimCompareEqualScore( pSim0, pSim1, p->nWords, p->pScores );
-        }
-    }
-    if ( Vec_IntSize( p->vClassNew ) == 0 )
-        return 0;
-    Cec_ManSimClassCreate( p->pAig, p->vClassOld );
-    Cec_ManSimClassCreate( p->pAig, p->vClassNew );
-    if ( Vec_IntSize(p->vClassNew) > 1 )
-        return 1 + Cec_ManSimClassRefineOne( p, Vec_IntEntry(p->vClassNew,0) );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Refines one equivalence class.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSimClassRemoveOne( Cec_ManSim_t * p, int i )
-{
-    int iRepr, Ent;
-    if ( Gia_ObjIsConst(p->pAig, i) )
-    {
-        Gia_ObjSetRepr( p->pAig, i, GIA_VOID );
-        return 1;
-    }
-    if ( !Gia_ObjIsClass(p->pAig, i) )
-        return 0;
-    assert( Gia_ObjIsClass(p->pAig, i) );
-    iRepr = Gia_ObjRepr( p->pAig, i );
-    if ( iRepr == GIA_VOID )
-        iRepr = i;
-    // collect nodes
-    Vec_IntClear( p->vClassOld );
-    Vec_IntClear( p->vClassNew );
-    Gia_ClassForEachObj( p->pAig, iRepr, Ent )
-    {
-        if ( Ent == i )
-            Vec_IntPush( p->vClassNew, Ent );
-        else
-            Vec_IntPush( p->vClassOld, Ent );
-    }
-    assert( Vec_IntSize( p->vClassNew ) == 1 );
-    Cec_ManSimClassCreate( p->pAig, p->vClassOld );
-    Cec_ManSimClassCreate( p->pAig, p->vClassNew );
-    assert( !Gia_ObjIsClass(p->pAig, i) );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes hash key of the simuation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSimHashKey( unsigned * pSim, int nWords, int nTableSize )
-{
-    static int s_Primes[16] = { 
-        1291, 1699, 1999, 2357, 2953, 3313, 3907, 4177, 
-        4831, 5147, 5647, 6343, 6899, 7103, 7873, 8147 };
-    unsigned uHash = 0;
-    int i;
-    if ( pSim[0] & 1 )
-        for ( i = 0; i < nWords; i++ )
-            uHash ^= ~pSim[i] * s_Primes[i & 0xf];
-    else
-        for ( i = 0; i < nWords; i++ )
-            uHash ^= pSim[i] * s_Primes[i & 0xf];
-    return (int)(uHash % nTableSize);
-
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resets pointers to the simulation memory.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSimMemRelink( Cec_ManSim_t * p )
-{
-    unsigned * pPlace, Ent;
-    pPlace = (unsigned *)&p->MemFree;
-    for ( Ent = p->nMems * (p->nWords + 1); 
-          Ent + p->nWords + 1 < (unsigned)p->nWordsAlloc; 
-          Ent += p->nWords + 1 )
-    {
-        *pPlace = Ent;
-        pPlace = p->pMems + Ent;
-    }
-    *pPlace = 0;
-    p->nWordsOld = p->nWords;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [References simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Cec_ManSimSimRef( Cec_ManSim_t * p, int i )
-{
-    unsigned * pSim;
-    assert( p->pSimInfo[i] == 0 );
-    if ( p->MemFree == 0 )
-    {
-        if ( p->nWordsAlloc == 0 )
-        {
-            assert( p->pMems == NULL );
-            p->nWordsAlloc = (1<<17); // -> 1Mb
-            p->nMems = 1;
-        }
-        p->nWordsAlloc *= 2;
-        p->pMems = ABC_REALLOC( unsigned, p->pMems, p->nWordsAlloc );
-        Cec_ManSimMemRelink( p );
-    }
-    p->pSimInfo[i] = p->MemFree;
-    pSim = p->pMems + p->MemFree;
-    p->MemFree = pSim[0];
-    pSim[0] = Gia_ObjValue( Gia_ManObj(p->pAig, i) );
-    p->nMems++;
-    if ( p->nMemsMax < p->nMems )
-        p->nMemsMax = p->nMems;
-    return pSim;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Dereferences simulaton info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Cec_ManSimSimDeref( Cec_ManSim_t * p, int i )
-{
-    unsigned * pSim;
-    assert( p->pSimInfo[i] > 0 );
-    pSim = p->pMems + p->pSimInfo[i];
-    if ( --pSim[0] == 0 )
-    {
-        pSim[0] = p->MemFree;
-        p->MemFree = p->pSimInfo[i];
-        p->pSimInfo[i] = 0;
-        p->nMems--;
-    }
-    return pSim;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Refines nodes belonging to candidate constant class.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSimProcessRefined( Cec_ManSim_t * p, Vec_Int_t * vRefined )
-{
-    unsigned * pSim;
-    int * pTable, nTableSize, i, k, Key;
-    if ( Vec_IntSize(vRefined) == 0 )
-        return;
-    nTableSize = Gia_PrimeCudd( 100 + Vec_IntSize(vRefined) / 3 );
-    pTable = ABC_CALLOC( int, nTableSize );
-    Vec_IntForEachEntry( vRefined, i, k )
-    {
-        pSim = Cec_ObjSim( p, i );
-        assert( !Cec_ManSimCompareConst( pSim, p->nWords ) );
-        Key = Cec_ManSimHashKey( pSim, p->nWords, nTableSize );
-        if ( pTable[Key] == 0 )
-        {
-            assert( Gia_ObjRepr(p->pAig, i) == 0 );
-            assert( Gia_ObjNext(p->pAig, i) == 0 );
-            Gia_ObjSetRepr( p->pAig, i, GIA_VOID );
-        }
-        else
-        {
-            Gia_ObjSetNext( p->pAig, pTable[Key], i );
-            Gia_ObjSetRepr( p->pAig, i, Gia_ObjRepr(p->pAig, pTable[Key]) );
-            if ( Gia_ObjRepr(p->pAig, i) == GIA_VOID )
-                Gia_ObjSetRepr( p->pAig, i, pTable[Key] );
-            assert( Gia_ObjRepr(p->pAig, i) > 0 );
-        }
-        pTable[Key] = i;
-    }
-    Vec_IntForEachEntry( vRefined, i, k )
-    {
-        if ( Gia_ObjIsHead( p->pAig, i ) )
-            Cec_ManSimClassRefineOne( p, i );
-    }
-    Vec_IntForEachEntry( vRefined, i, k )
-        Cec_ManSimSimDeref( p, i );
-    ABC_FREE( pTable );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Saves the input pattern with the given number.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSimSavePattern( Cec_ManSim_t * p, int iPat )
-{
-    unsigned * pInfo;
-    int i;
-    assert( p->pCexComb == NULL );
-    assert( iPat >= 0 && iPat < 32 * p->nWords );
-    p->pCexComb = (Abc_Cex_t *)ABC_CALLOC( char, 
-        sizeof(Abc_Cex_t) + sizeof(unsigned) * Gia_BitWordNum(Gia_ManCiNum(p->pAig)) );
-    p->pCexComb->iPo = p->iOut;
-    p->pCexComb->nPis = Gia_ManCiNum(p->pAig);
-    p->pCexComb->nBits = Gia_ManCiNum(p->pAig);
-    for ( i = 0; i < Gia_ManCiNum(p->pAig); i++ )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry( p->vCiSimInfo, i );
-        if ( Gia_InfoHasBit( pInfo, iPat ) )
-            Gia_InfoSetBit( p->pCexComb->pData, i );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find the best pattern using the scores.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSimFindBestPattern( Cec_ManSim_t * p )
-{ 
-    unsigned * pInfo;
-    int i, ScoreBest = 0, iPatBest = 1; // set the first pattern
-    // find the best pattern
-    for ( i = 0; i < 32 * p->nWords; i++ )
-        if ( ScoreBest < p->pScores[i] )
-        {
-            ScoreBest = p->pScores[i];
-            iPatBest = i;
-        }
-    // compare this with the available patterns - and save
-    if ( p->pBestState->iPo <= ScoreBest )
-    {
-        assert( p->pBestState->nRegs == Gia_ManRegNum(p->pAig) );
-        for ( i = 0; i < Gia_ManRegNum(p->pAig); i++ )
-        {
-            pInfo = (unsigned *)Vec_PtrEntry( p->vCiSimInfo, Gia_ManPiNum(p->pAig) + i );
-            if ( Gia_InfoHasBit(p->pBestState->pData, i) != Gia_InfoHasBit(pInfo, iPatBest) )
-                Gia_InfoXorBit( p->pBestState->pData, i );
-        }
-        p->pBestState->iPo = ScoreBest;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if computation should stop.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSimAnalyzeOutputs( Cec_ManSim_t * p )
-{
-    unsigned * pInfo, * pInfo2;
-    int i;
-    if ( !p->pPars->fCheckMiter )
-        return 0;
-    assert( p->vCoSimInfo != NULL );
-    // compare outputs with 0
-    if ( p->pPars->fDualOut )
-    {
-        assert( (Gia_ManPoNum(p->pAig) & 1) == 0 );
-        for ( i = 0; i < Gia_ManPoNum(p->pAig); i++ )
-        {
-            pInfo  = (unsigned *)Vec_PtrEntry( p->vCoSimInfo, i );
-            pInfo2 = (unsigned *)Vec_PtrEntry( p->vCoSimInfo, ++i );
-            if ( !Cec_ManSimCompareEqual( pInfo, pInfo2, p->nWords ) )
-            {
-                if ( p->iOut == -1 )
-                {
-                    p->iOut = i/2;
-                    Cec_ManSimSavePattern( p, Cec_ManSimCompareEqualFirstBit(pInfo, pInfo2, p->nWords) );
-                }
-                if ( p->pCexes == NULL )
-                    p->pCexes = ABC_CALLOC( void *, Gia_ManPoNum(p->pAig)/2 );
-                if ( p->pCexes[i/2] == NULL )
-                {
-                    p->nOuts++;
-                    p->pCexes[i/2] = (void *)1;
-                }
-            }
-        }
-    }
-    else
-    {
-        for ( i = 0; i < Gia_ManPoNum(p->pAig); i++ )
-        {
-            pInfo = (unsigned *)Vec_PtrEntry( p->vCoSimInfo, i );
-            if ( !Cec_ManSimCompareConst( pInfo, p->nWords ) )
-            {
-                if ( p->iOut == -1 )
-                {
-                    p->iOut = i;
-                    Cec_ManSimSavePattern( p, Cec_ManSimCompareConstFirstBit(pInfo, p->nWords) );
-                }
-                if ( p->pCexes == NULL )
-                    p->pCexes = ABC_CALLOC( void *, Gia_ManPoNum(p->pAig) );
-                if ( p->pCexes[i] == NULL )
-                {
-                    p->nOuts++;
-                    p->pCexes[i] = (void *)1;
-                }
-            }
-        }
-    }
-    return p->pCexes != NULL;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates one round.]
-
-  Description [Returns the number of PO entry if failed; 0 otherwise.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSimSimulateRound( Cec_ManSim_t * p, Vec_Ptr_t * vInfoCis, Vec_Ptr_t * vInfoCos )
-{
-    Gia_Obj_t * pObj;
-    unsigned * pRes0, * pRes1, * pRes;
-    int i, k, w, Ent, iCiId = 0, iCoId = 0;
-    // prepare internal storage
-    if ( p->nWordsOld != p->nWords )
-        Cec_ManSimMemRelink( p );
-    p->nMemsMax = 0;
-    // allocate score counters
-    ABC_FREE( p->pScores );
-    if ( p->pBestState )
-        p->pScores = ABC_CALLOC( int, 32 * p->nWords );
-    // simulate nodes
-    Vec_IntClear( p->vRefinedC );
-    if ( Gia_ObjValue(Gia_ManConst0(p->pAig)) )
-    {
-        pRes = Cec_ManSimSimRef( p, 0 );
-        for ( w = 1; w <= p->nWords; w++ )
-            pRes[w] = 0;
-    }
-    Gia_ManForEachObj1( p->pAig, pObj, i )
-    {
-        if ( Gia_ObjIsCi(pObj) ) 
-        {
-            if ( Gia_ObjValue(pObj) == 0 )
-            {
-                iCiId++;
-                continue;
-            }
-            pRes = Cec_ManSimSimRef( p, i );
-            if ( vInfoCis ) 
-            {
-                pRes0 = (unsigned *)Vec_PtrEntry( vInfoCis, iCiId++ );
-                for ( w = 1; w <= p->nWords; w++ )
-                    pRes[w] = pRes0[w-1];
-            }
-            else
-            {
-                for ( w = 1; w <= p->nWords; w++ )
-                    pRes[w] = Gia_ManRandom( 0 );
-            }
-            // make sure the first pattern is always zero
-            pRes[1] ^= (pRes[1] & 1);
-            goto references;
-        }
-        if ( Gia_ObjIsCo(pObj) ) // co always has non-zero 1st fanin and zero 2nd fanin
-        {
-            pRes0 = Cec_ManSimSimDeref( p, Gia_ObjFaninId0(pObj,i) );
-            if ( vInfoCos )
-            {
-                pRes = (unsigned *)Vec_PtrEntry( vInfoCos, iCoId++ );
-                if ( Gia_ObjFaninC0(pObj) )
-                    for ( w = 1; w <= p->nWords; w++ )
-                        pRes[w-1] = ~pRes0[w];
-                else 
-                    for ( w = 1; w <= p->nWords; w++ )
-                        pRes[w-1] = pRes0[w];
-            }
-            continue;
-        }
-        assert( Gia_ObjValue(pObj) );
-        pRes  = Cec_ManSimSimRef( p, i );
-        pRes0 = Cec_ManSimSimDeref( p, Gia_ObjFaninId0(pObj,i) );
-        pRes1 = Cec_ManSimSimDeref( p, Gia_ObjFaninId1(pObj,i) );
-
-//        Abc_Print( 1, "%d,%d  ", Gia_ObjValue( Gia_ObjFanin0(pObj) ), Gia_ObjValue( Gia_ObjFanin1(pObj) ) );
-
-        if ( Gia_ObjFaninC0(pObj) )
-        {
-            if ( Gia_ObjFaninC1(pObj) )
-                for ( w = 1; w <= p->nWords; w++ )
-                    pRes[w] = ~(pRes0[w] | pRes1[w]);
-            else
-                for ( w = 1; w <= p->nWords; w++ )
-                    pRes[w] = ~pRes0[w] & pRes1[w];
-        }
-        else
-        {
-            if ( Gia_ObjFaninC1(pObj) )
-                for ( w = 1; w <= p->nWords; w++ )
-                    pRes[w] = pRes0[w] & ~pRes1[w];
-            else
-                for ( w = 1; w <= p->nWords; w++ )
-                    pRes[w] = pRes0[w] & pRes1[w];
-        }
-
-references:
-        // if this node is candidate constant, collect it
-        if ( Gia_ObjIsConst(p->pAig, i) && !Cec_ManSimCompareConst(pRes + 1, p->nWords) )
-        {
-            pRes[0]++;
-            Vec_IntPush( p->vRefinedC, i );
-            if ( p->pBestState )
-                Cec_ManSimCompareConstScore( pRes + 1, p->nWords, p->pScores );
-        }
-        // if the node belongs to a class, save it
-        if ( Gia_ObjIsClass(p->pAig, i) )
-            pRes[0]++;
-        // if this is the last node of the class, process it
-        if ( Gia_ObjIsTail(p->pAig, i) )
-        {
-            Vec_IntClear( p->vClassTemp );
-            Gia_ClassForEachObj( p->pAig, Gia_ObjRepr(p->pAig, i), Ent )
-                Vec_IntPush( p->vClassTemp, Ent );
-            Cec_ManSimClassRefineOne( p, Gia_ObjRepr(p->pAig, i) );
-            Vec_IntForEachEntry( p->vClassTemp, Ent, k )
-                Cec_ManSimSimDeref( p, Ent );
-        }
-    }
-
-    if ( p->pPars->fConstCorr )
-    {
-        Vec_IntForEachEntry( p->vRefinedC, i, k )
-        {
-            Gia_ObjSetRepr( p->pAig, i, GIA_VOID );
-            Cec_ManSimSimDeref( p, i );
-        }
-        Vec_IntClear( p->vRefinedC );
-    }
-
-    if ( Vec_IntSize(p->vRefinedC) > 0 )
-        Cec_ManSimProcessRefined( p, p->vRefinedC );
-    assert( vInfoCis == NULL || iCiId == Gia_ManCiNum(p->pAig) );
-    assert( vInfoCos == NULL || iCoId == Gia_ManCoNum(p->pAig) );
-    assert( p->nMems == 1 );
-    if ( p->nMems != 1 )
-        Abc_Print( 1, "Cec_ManSimSimulateRound(): Memory management error!\n" );
-    if ( p->pPars->fVeryVerbose )
-        Gia_ManEquivPrintClasses( p->pAig, 0, Cec_MemUsage(p) );
-    if ( p->pBestState )
-        Cec_ManSimFindBestPattern( p );
-/*
-    if ( p->nMems > 1 ) {
-        for ( i = 1; i < p->nObjs; i++ )
-        if ( p->pSims[i] ) {
-            int x = 0;
-        }
-    }
-*/
-    return Cec_ManSimAnalyzeOutputs( p );
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Creates simulation info for this round.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSimCreateInfo( Cec_ManSim_t * p, Vec_Ptr_t * vInfoCis, Vec_Ptr_t * vInfoCos )
-{
-    unsigned * pRes0, * pRes1;
-    int i, w;
-    if ( p->pPars->fSeqSimulate && Gia_ManRegNum(p->pAig) > 0 )
-    {
-        assert( vInfoCis && vInfoCos );
-        for ( i = 0; i < Gia_ManPiNum(p->pAig); i++ )
-        {
-            pRes0 = (unsigned *)Vec_PtrEntry( vInfoCis, i );
-            for ( w = 0; w < p->nWords; w++ )
-                pRes0[w] = Gia_ManRandom( 0 );
-        }
-        for ( i = 0; i < Gia_ManRegNum(p->pAig); i++ )
-        {
-            pRes0 = (unsigned *)Vec_PtrEntry( vInfoCis, Gia_ManPiNum(p->pAig) + i );
-            pRes1 = (unsigned *)Vec_PtrEntry( vInfoCos, Gia_ManPoNum(p->pAig) + i );
-            for ( w = 0; w < p->nWords; w++ )
-                pRes0[w] = pRes1[w];
-        }
-    }
-    else 
-    {
-        for ( i = 0; i < Gia_ManCiNum(p->pAig); i++ )
-        {
-            pRes0 = (unsigned *)Vec_PtrEntry( vInfoCis, i );
-            for ( w = 0; w < p->nWords; w++ )
-                pRes0[w] = Gia_ManRandom( 0 );
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the bug is found.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSimClassesPrepare( Cec_ManSim_t * p, int LevelMax )
-{
-    Gia_Obj_t * pObj;
-    int i;
-    assert( p->pAig->pReprs == NULL );
-    // allocate representation
-    p->pAig->pReprs = ABC_CALLOC( Gia_Rpr_t, Gia_ManObjNum(p->pAig) );
-    p->pAig->pNexts = ABC_CALLOC( int, Gia_ManObjNum(p->pAig) );
-    // create references
-    Gia_ManSetRefs( p->pAig );
-    // set starting representative of internal nodes to be constant 0
-    if ( p->pPars->fLatchCorr )
-        Gia_ManForEachObj( p->pAig, pObj, i )
-            Gia_ObjSetRepr( p->pAig, i, GIA_VOID );
-    else if ( LevelMax == -1 )
-        Gia_ManForEachObj( p->pAig, pObj, i )
-            Gia_ObjSetRepr( p->pAig, i, Gia_ObjIsAnd(pObj) ? 0 : GIA_VOID );
-    else
-    {
-        Gia_ManLevelNum( p->pAig );
-        Gia_ManForEachObj( p->pAig, pObj, i )
-            Gia_ObjSetRepr( p->pAig, i, (Gia_ObjIsAnd(pObj) && Gia_ObjLevel(p->pAig,pObj) <= LevelMax) ? 0 : GIA_VOID );
-        Vec_IntFreeP( &p->pAig->vLevels );
-    }
-    // if sequential simulation, set starting representative of ROs to be constant 0
-    if ( p->pPars->fSeqSimulate )
-        Gia_ManForEachRo( p->pAig, pObj, i )
-            if ( pObj->Value )
-                Gia_ObjSetRepr( p->pAig, Gia_ObjId(p->pAig, pObj), 0 );
-    // perform simulation
-    p->nWords = 1;
-    do {
-        if ( p->pPars->fVerbose )
-            Gia_ManEquivPrintClasses( p->pAig, 0, Cec_MemUsage(p) );
-        for ( i = 0; i < 4; i++ )
-        {
-            Cec_ManSimCreateInfo( p, p->vCiSimInfo, p->vCoSimInfo );
-            if ( Cec_ManSimSimulateRound( p, p->vCiSimInfo, p->vCoSimInfo ) )
-                return 1;
-        }
-        p->nWords = 2 * p->nWords + 1;
-    }
-    while ( p->nWords <= p->pPars->nWords );
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the bug is found.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSimClassesRefine( Cec_ManSim_t * p )
-{
-    int i;
-    Gia_ManSetRefs( p->pAig );
-    p->nWords = p->pPars->nWords;
-    for ( i = 0; i < p->pPars->nRounds; i++ )
-    {
-        if ( (i % (p->pPars->nRounds / 5)) == 0 && p->pPars->fVerbose )
-            Gia_ManEquivPrintClasses( p->pAig, 0, Cec_MemUsage(p) );
-        Cec_ManSimCreateInfo( p, p->vCiSimInfo, p->vCoSimInfo );
-        if ( Cec_ManSimSimulateRound( p, p->vCiSimInfo, p->vCoSimInfo ) )
-            return 1;
-    }
-    if ( p->pPars->fVerbose )
-        Gia_ManEquivPrintClasses( p->pAig, 0, Cec_MemUsage(p) );
-    return 0;
-}
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cecCore.c b/src/aig/cec/cecCore.c
deleted file mode 100644
index bf41304b..00000000
--- a/src/aig/cec/cecCore.c
+++ /dev/null
@@ -1,542 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecCore.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [Core procedures.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
- 
-***********************************************************************/
-void Cec_ManSatSetDefaultParams( Cec_ParSat_t * p )
-{
-    memset( p, 0, sizeof(Cec_ParSat_t) );
-    p->nBTLimit       =     100;  // conflict limit at a node
-    p->nSatVarMax     =    2000;  // the max number of SAT variables
-    p->nCallsRecycle  =     200;  // calls to perform before recycling SAT solver
-    p->fNonChrono     =       0;  // use non-chronological backtracling (for circuit SAT only)
-    p->fPolarFlip     =       1;  // flops polarity of variables
-    p->fCheckMiter    =       0;  // the circuit is the miter
-//    p->fFirstStop     =       0;  // stop on the first sat output
-    p->fLearnCls      =       0;  // perform clause learning
-    p->fVerbose       =       0;  // verbose stats
-}  
-
-/**Function************  *************************************************
-
-  Synopsis    [This procedure sets default parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSimSetDefaultParams( Cec_ParSim_t * p )
-{
-    memset( p, 0, sizeof(Cec_ParSim_t) );
-    p->nWords         =      31;  // the number of simulation words
-    p->nFrames        =     100;  // the number of simulation frames
-    p->nRounds        =      20;  // the max number of simulation rounds
-    p->nNonRefines    =       3;  // the max number of rounds without refinement
-    p->TimeLimit      =       0;  // the runtime limit in seconds
-    p->fCheckMiter    =       0;  // the circuit is the miter
-//    p->fFirstStop     =       0;  // stop on the first sat output
-    p->fDualOut       =       0;  // miter with separate outputs
-    p->fConstCorr     =       0;  // consider only constants
-    p->fSeqSimulate   =       0;  // performs sequential simulation
-    p->fVeryVerbose   =       0;  // verbose stats
-    p->fVerbose       =       0;  // verbose stats
-} 
-
-/**Function************  *************************************************
-
-  Synopsis    [This procedure sets default parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSmfSetDefaultParams( Cec_ParSmf_t * p )
-{
-    memset( p, 0, sizeof(Cec_ParSmf_t) );
-    p->nWords         =      31;  // the number of simulation words
-    p->nRounds        =     200;  // the number of simulation rounds
-    p->nFrames        =     200;  // the max number of time frames
-    p->nNonRefines    =       3;  // the max number of rounds without refinement
-    p->nMinOutputs    =       0;  // the min outputs to accumulate
-    p->nBTLimit       =     100;  // conflict limit at a node
-    p->TimeLimit      =       0;  // the runtime limit in seconds
-    p->fDualOut       =       0;  // miter with separate outputs
-    p->fCheckMiter    =       0;  // the circuit is the miter
-//    p->fFirstStop     =       0;  // stop on the first sat output
-    p->fVerbose       =       0;  // verbose stats
-} 
-
-/**Function************  *************************************************
-
-  Synopsis    [This procedure sets default parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManFraSetDefaultParams( Cec_ParFra_t * p )
-{
-    memset( p, 0, sizeof(Cec_ParFra_t) );
-    p->nWords         =      15;  // the number of simulation words
-    p->nRounds        =      15;  // the number of simulation rounds
-    p->TimeLimit      =       0;  // the runtime limit in seconds
-    p->nItersMax      =      10;  // the maximum number of iterations of SAT sweeping
-    p->nBTLimit       =     100;  // conflict limit at a node
-    p->nLevelMax      =       0;  // restriction on the level of nodes to be swept
-    p->nDepthMax      =       1;  // the depth in terms of steps of speculative reduction
-    p->fRewriting     =       0;  // enables AIG rewriting
-    p->fCheckMiter    =       0;  // the circuit is the miter
-//    p->fFirstStop     =       0;  // stop on the first sat output
-    p->fDualOut       =       0;  // miter with separate outputs
-    p->fColorDiff     =       0;  // miter with separate outputs
-    p->fSatSweeping   =       0;  // enable SAT sweeping
-    p->fVeryVerbose   =       0;  // verbose stats
-    p->fVerbose       =       0;  // verbose stats
-    p->iOutFail       =      -1;  // the failed output
-} 
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManCecSetDefaultParams( Cec_ParCec_t * p )
-{
-    memset( p, 0, sizeof(Cec_ParCec_t) );
-    p->nBTLimit       =    1000;  // conflict limit at a node
-    p->TimeLimit      =       0;  // the runtime limit in seconds
-//    p->fFirstStop     =       0;  // stop on the first sat output
-    p->fUseSmartCnf   =       0;  // use smart CNF computation
-    p->fRewriting     =       0;  // enables AIG rewriting
-    p->fVeryVerbose   =       0;  // verbose stats
-    p->fVerbose       =       0;  // verbose stats
-    p->iOutFail       =      -1;  // the number of failed output
-}  
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManCorSetDefaultParams( Cec_ParCor_t * p )
-{
-    memset( p, 0, sizeof(Cec_ParCor_t) );
-    p->nWords         =      15;  // the number of simulation words
-    p->nRounds        =      15;  // the number of simulation rounds
-    p->nFrames        =       1;  // the number of time frames
-    p->nBTLimit       =     100;  // conflict limit at a node
-    p->nLevelMax      =      -1;  // (scorr only) the max number of levels
-    p->nStepsMax      =      -1;  // (scorr only) the max number of induction steps
-    p->fLatchCorr     =       0;  // consider only latch outputs
-    p->fConstCorr     =       0;  // consider only constants
-    p->fUseRings      =       1;  // combine classes into rings
-    p->fUseCSat       =       1;  // use circuit-based solver
-//    p->fFirstStop     =       0;  // stop on the first sat output
-    p->fUseSmartCnf   =       0;  // use smart CNF computation
-    p->fVeryVerbose   =       0;  // verbose stats
-    p->fVerbose       =       0;  // verbose stats
-}  
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManChcSetDefaultParams( Cec_ParChc_t * p )
-{
-    memset( p, 0, sizeof(Cec_ParChc_t) );
-    p->nWords         =      15;  // the number of simulation words
-    p->nRounds        =      15;  // the number of simulation rounds
-    p->nBTLimit       =    1000;  // conflict limit at a node
-    p->fUseRings      =       1;  // use rings
-    p->fUseCSat       =       0;  // use circuit-based solver
-    p->fVeryVerbose   =       0;  // verbose stats
-    p->fVerbose       =       0;  // verbose stats
-}  
-
-/**Function*************************************************************
-
-  Synopsis    [Core procedure for SAT sweeping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Cec_ManSatSolving( Gia_Man_t * pAig, Cec_ParSat_t * pPars )
-{
-    Gia_Man_t * pNew;
-    Cec_ManPat_t * pPat;
-    pPat = Cec_ManPatStart();
-    Cec_ManSatSolve( pPat, pAig, pPars );
-//    pNew = Gia_ManDupDfsSkip( pAig );
-    pNew = Gia_ManDup( pAig );
-    Cec_ManPatStop( pPat );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Core procedure for simulation.]
-
-  Description [Returns 1 if refinement has happened.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSimulationOne( Gia_Man_t * pAig, Cec_ParSim_t * pPars )
-{
-    Cec_ManSim_t * pSim;
-    int RetValue = 0, clkTotal = clock();
-    pSim = Cec_ManSimStart( pAig, pPars );
-    if ( (pAig->pReprs == NULL && (RetValue = Cec_ManSimClassesPrepare( pSim, -1 ))) ||
-         (RetValue == 0 &&        (RetValue = Cec_ManSimClassesRefine( pSim ))) )
-        Abc_Print( 1, "The number of failed outputs of the miter = %6d. (Words = %4d. Frames = %4d.)\n", 
-            pSim->nOuts, pPars->nWords, pPars->nFrames );
-    if ( pPars->fVerbose )
-        Abc_PrintTime( 1, "Time", clock() - clkTotal );
-    Cec_ManSimStop( pSim );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Core procedure for simulation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSimulation( Gia_Man_t * pAig, Cec_ParSim_t * pPars )
-{
-    int r, nLitsOld, nLitsNew, nCountNoRef = 0, fStop = 0;
-    Gia_ManRandom( 1 );
-    if ( pPars->fSeqSimulate )
-        Abc_Print( 1, "Performing rounds of random simulation of %d frames with %d words.\n", 
-            pPars->nRounds, pPars->nFrames, pPars->nWords );
-    nLitsOld = Gia_ManEquivCountLits( pAig );
-    for ( r = 0; r < pPars->nRounds; r++ )
-    {
-        if ( Cec_ManSimulationOne( pAig, pPars ) )
-        {
-            fStop = 1;
-            break;
-        }
-        // decide when to stop
-        nLitsNew = Gia_ManEquivCountLits( pAig );
-        if ( nLitsOld == 0 || nLitsOld > nLitsNew )
-        {
-            nLitsOld = nLitsNew;
-            nCountNoRef = 0;
-        }
-        else if ( ++nCountNoRef == pPars->nNonRefines )
-        {
-            r++;
-            break;
-        }
-        assert( nLitsOld == nLitsNew );
-    }
-//    if ( pPars->fVerbose )
-    if ( r == pPars->nRounds || fStop )
-        Abc_Print( 1, "Random simulation is stopped after %d rounds.\n", r );
-    else
-        Abc_Print( 1, "Random simulation saturated after %d rounds.\n", r );
-    if ( pPars->fCheckMiter )
-    {
-        int nNonConsts = Cec_ManCountNonConstOutputs( pAig );
-        if ( nNonConsts )
-            Abc_Print( 1, "The number of POs that are not const-0 candidates = %d.\n", nNonConsts );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Core procedure for SAT sweeping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Cec_ManSatSweeping( Gia_Man_t * pAig, Cec_ParFra_t * pPars )
-{
-    int fOutputResult = 0;
-    Cec_ParSat_t ParsSat, * pParsSat = &ParsSat;
-    Cec_ParSim_t ParsSim, * pParsSim = &ParsSim;
-    Gia_Man_t * pIni, * pSrm, * pTemp;
-    Cec_ManFra_t * p;
-    Cec_ManSim_t * pSim;
-    Cec_ManPat_t * pPat;
-    int i, fTimeOut = 0, nMatches = 0, clk, clk2;
-    double clkTotal = clock();
-
-    // duplicate AIG and transfer equivalence classes
-    Gia_ManRandom( 1 );
-    pIni = Gia_ManDup(pAig);
-    pIni->pReprs = pAig->pReprs; pAig->pReprs = NULL;
-    pIni->pNexts = pAig->pNexts; pAig->pNexts = NULL;
-
-    // prepare the managers
-    // SAT sweeping
-    p = Cec_ManFraStart( pIni, pPars );
-    if ( pPars->fDualOut )
-        pPars->fColorDiff = 1;
-    // simulation
-    Cec_ManSimSetDefaultParams( pParsSim );
-    pParsSim->nWords      = pPars->nWords;
-    pParsSim->nFrames     = pPars->nRounds;
-    pParsSim->fCheckMiter = pPars->fCheckMiter;
-    pParsSim->fDualOut    = pPars->fDualOut;
-    pParsSim->fVerbose    = pPars->fVerbose;
-    pSim = Cec_ManSimStart( p->pAig, pParsSim );
-    // SAT solving
-    Cec_ManSatSetDefaultParams( pParsSat );
-    pParsSat->nBTLimit = pPars->nBTLimit;
-    pParsSat->fVerbose = pPars->fVeryVerbose;
-    // simulation patterns
-    pPat = Cec_ManPatStart();
-    pPat->fVerbose = pPars->fVeryVerbose;
-
-    // start equivalence classes
-clk = clock();
-    if ( p->pAig->pReprs == NULL )
-    {
-        if ( Cec_ManSimClassesPrepare(pSim, -1) || Cec_ManSimClassesRefine(pSim) )
-        {
-            Gia_ManStop( p->pAig );
-            p->pAig = NULL;
-            goto finalize;
-        }
-    }
-p->timeSim += clock() - clk;
-    // perform solving
-    for ( i = 1; i <= pPars->nItersMax; i++ )
-    {
-        clk2 = clock();
-        nMatches = 0;
-        if ( pPars->fDualOut )
-        {
-            nMatches = Gia_ManEquivSetColors( p->pAig, pPars->fVeryVerbose );
-//            p->pAig->pIso = Cec_ManDetectIsomorphism( p->pAig );
-//            Gia_ManEquivTransform( p->pAig, 1 );
-        }
-        pSrm = Cec_ManFraSpecReduction( p ); 
-
-//        Gia_WriteAiger( pSrm, "gia_srm.aig", 0, 0 );
-
-        if ( pPars->fVeryVerbose )
-            Gia_ManPrintStats( pSrm, 0 );
-        if ( Gia_ManCoNum(pSrm) == 0 )
-        {
-            Gia_ManStop( pSrm );
-            if ( p->pPars->fVerbose )
-                Abc_Print( 1, "Considered all available candidate equivalences.\n" );
-            if ( pPars->fDualOut && Gia_ManAndNum(p->pAig) > 0 )
-            {
-                if ( pPars->fColorDiff )
-                {
-                    if ( p->pPars->fVerbose )
-                        Abc_Print( 1, "Switching into reduced mode.\n" );
-                    pPars->fColorDiff = 0;
-                }
-                else
-                {
-                    if ( p->pPars->fVerbose )
-                        Abc_Print( 1, "Switching into normal mode.\n" );
-                    pPars->fDualOut = 0;
-                }
-                continue;
-            }
-            break;
-        }
-clk = clock();
-        Cec_ManSatSolve( pPat, pSrm, pParsSat ); 
-p->timeSat += clock() - clk;
-        if ( Cec_ManFraClassesUpdate( p, pSim, pPat, pSrm ) )
-        {
-            Gia_ManStop( pSrm );
-            Gia_ManStop( p->pAig );
-            p->pAig = NULL;
-            goto finalize;
-        }
-        Gia_ManStop( pSrm );
-
-        // update the manager
-        pSim->pAig = p->pAig = Gia_ManEquivReduceAndRemap( pTemp = p->pAig, 0, pParsSim->fDualOut );
-        if ( p->pAig == NULL )
-        {
-            p->pAig = pTemp;
-            break;
-        }
-        Gia_ManStop( pTemp );
-        if ( p->pPars->fVerbose )
-        {
-            Abc_Print( 1, "%3d : P =%7d. D =%7d. F =%6d. M = %7d. And =%8d. ", 
-                i, p->nAllProved, p->nAllDisproved, p->nAllFailed, nMatches, Gia_ManAndNum(p->pAig) );
-            Abc_PrintTime( 1, "Time", clock() - clk2 );
-        }
-        if ( Gia_ManAndNum(p->pAig) == 0 )
-        {
-            if ( p->pPars->fVerbose )
-                Abc_Print( 1, "Network after reduction is empty.\n" );
-            break;
-        }
-        // check resource limits
-        if ( p->pPars->TimeLimit && ((double)clock() - clkTotal)/CLOCKS_PER_SEC >= p->pPars->TimeLimit )
-        {
-            fTimeOut = 1;
-            break;
-        }
-//        if ( p->nAllFailed && !p->nAllProved && !p->nAllDisproved )
-        if ( p->nAllFailed > p->nAllProved + p->nAllDisproved )
-        {
-            if ( pParsSat->nBTLimit >= 10001 )
-                break;
-            if ( pPars->fSatSweeping )
-            {
-                if ( p->pPars->fVerbose )
-                    Abc_Print( 1, "Exceeded the limit on the number of conflicts (%d).\n", pParsSat->nBTLimit );
-                break;
-            }
-            pParsSat->nBTLimit *= 10;
-            if ( p->pPars->fVerbose )
-            {
-                if ( p->pPars->fVerbose )
-                    Abc_Print( 1, "Increasing conflict limit to %d.\n", pParsSat->nBTLimit );
-                if ( fOutputResult )
-                {
-                    Gia_WriteAiger( p->pAig, "gia_cec_temp.aig", 0, 0 );
-                    Abc_Print( 1,"The result is written into file \"%s\".\n", "gia_cec_temp.aig" );
-                }
-            }
-        }
-        if ( pPars->fDualOut && pPars->fColorDiff && (Gia_ManAndNum(p->pAig) < 100000 || p->nAllProved + p->nAllDisproved < 10) )
-        {
-            if ( p->pPars->fVerbose )
-                Abc_Print( 1, "Switching into reduced mode.\n" );
-            pPars->fColorDiff = 0;
-        }
-//        if ( pPars->fDualOut && Gia_ManAndNum(p->pAig) < 20000 )
-        else if ( pPars->fDualOut && (Gia_ManAndNum(p->pAig) < 20000 || p->nAllProved + p->nAllDisproved < 10) )
-        {
-            if ( p->pPars->fVerbose )
-                Abc_Print( 1, "Switching into normal mode.\n" );
-            pPars->fColorDiff = 0;
-            pPars->fDualOut = 0;
-        }
-    }
-finalize:
-    if ( p->pPars->fVerbose && p->pAig )
-    {
-        Abc_Print( 1, "NBeg = %d. NEnd = %d. (Gain = %6.2f %%).  RBeg = %d. REnd = %d. (Gain = %6.2f %%).\n", 
-            Gia_ManAndNum(pAig), Gia_ManAndNum(p->pAig), 
-            100.0*(Gia_ManAndNum(pAig)-Gia_ManAndNum(p->pAig))/(Gia_ManAndNum(pAig)?Gia_ManAndNum(pAig):1), 
-            Gia_ManRegNum(pAig), Gia_ManRegNum(p->pAig), 
-            100.0*(Gia_ManRegNum(pAig)-Gia_ManRegNum(p->pAig))/(Gia_ManRegNum(pAig)?Gia_ManRegNum(pAig):1) );
-        Abc_PrintTimeP( 1, "Sim ", p->timeSim, clock() - (int)clkTotal );
-        Abc_PrintTimeP( 1, "Sat ", p->timeSat-pPat->timeTotalSave, clock() - (int)clkTotal );
-        Abc_PrintTimeP( 1, "Pat ", p->timePat+pPat->timeTotalSave, clock() - (int)clkTotal );
-        Abc_PrintTime( 1, "Time", (int)(clock() - clkTotal) );
-    }
-
-    pTemp = p->pAig; p->pAig = NULL;
-    if ( pTemp == NULL && pSim->iOut >= 0 )
-    {
-        Abc_Print( 1, "Disproved at least one output of the miter (zero-based number %d).\n", pSim->iOut );
-        pPars->iOutFail = pSim->iOut;
-    }
-    else if ( pSim->pCexes )
-        Abc_Print( 1, "Disproved %d outputs of the miter.\n", pSim->nOuts );
-    if ( fTimeOut )
-        Abc_Print( 1, "Timed out after %d seconds.\n", (int)((double)clock() - clkTotal)/CLOCKS_PER_SEC );
-
-    pAig->pCexComb = pSim->pCexComb; pSim->pCexComb = NULL;
-    Cec_ManSimStop( pSim );
-    Cec_ManPatStop( pPat );
-    Cec_ManFraStop( p );
-    return pTemp;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cecCorr.c b/src/aig/cec/cecCorr.c
deleted file mode 100644
index 59d091d8..00000000
--- a/src/aig/cec/cecCorr.c
+++ /dev/null
@@ -1,1137 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecCorr.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [Latch/signal correspondence computation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecCorr.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static void Gia_ManCorrSpecReduce_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj, int f, int nPrefix );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the real value of the literal w/o spec reduction.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Gia_ManCorrSpecReal( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj, int f, int nPrefix )
-{
-    if ( Gia_ObjIsAnd(pObj) )
-    {
-        Gia_ManCorrSpecReduce_rec( pNew, p, Gia_ObjFanin0(pObj), f, nPrefix );
-        Gia_ManCorrSpecReduce_rec( pNew, p, Gia_ObjFanin1(pObj), f, nPrefix );
-        return Gia_ManHashAnd( pNew, Gia_ObjFanin0CopyF(p, f, pObj), Gia_ObjFanin1CopyF(p, f, pObj) );
-    }
-    if ( f == 0 )
-    {
-        assert( Gia_ObjIsRo(p, pObj) );
-        return Gia_ObjCopyF(p, f, pObj);
-    }
-    assert( f && Gia_ObjIsRo(p, pObj) );
-    pObj = Gia_ObjRoToRi( p, pObj );
-    Gia_ManCorrSpecReduce_rec( pNew, p, Gia_ObjFanin0(pObj), f-1, nPrefix );
-    return Gia_ObjFanin0CopyF( p, f-1, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recursively performs speculative reduction for the object.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Gia_ManCorrSpecReduce_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj, int f, int nPrefix )
-{
-    Gia_Obj_t * pRepr;
-    int iLitNew;
-    if ( ~Gia_ObjCopyF(p, f, pObj) )
-        return;
-    if ( f >= nPrefix && (pRepr = Gia_ObjReprObj(p, Gia_ObjId(p, pObj))) )
-    {
-        Gia_ManCorrSpecReduce_rec( pNew, p, pRepr, f, nPrefix );
-        iLitNew = Gia_LitNotCond( Gia_ObjCopyF(p, f, pRepr), Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
-        Gia_ObjSetCopyF( p, f, pObj, iLitNew );
-        return;
-    }
-    assert( Gia_ObjIsCand(pObj) );
-    iLitNew = Gia_ManCorrSpecReal( pNew, p, pObj, f, nPrefix );
-    Gia_ObjSetCopyF( p, f, pObj, iLitNew );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives SRM for signal correspondence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Gia_ManCorrSpecReduce( Gia_Man_t * p, int nFrames, int fScorr, Vec_Int_t ** pvOutputs, int fRings )
-{
-    Gia_Man_t * pNew, * pTemp;
-    Gia_Obj_t * pObj, * pRepr;
-    Vec_Int_t * vXorLits;
-    int f, i, iPrev, iObj, iPrevNew, iObjNew;
-    assert( nFrames > 0 );
-    assert( Gia_ManRegNum(p) > 0 );
-    assert( p->pReprs != NULL );
-    p->pCopies = ABC_FALLOC( int, (nFrames+fScorr)*Gia_ManObjNum(p) );
-    Gia_ManSetPhase( p );
-    pNew = Gia_ManStart( nFrames * Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
-    Gia_ManHashAlloc( pNew );
-    Gia_ObjSetCopyF( p, 0, Gia_ManConst0(p), 0 );
-    Gia_ManForEachRo( p, pObj, i )
-        Gia_ObjSetCopyF( p, 0, pObj, Gia_ManAppendCi(pNew) );
-    Gia_ManForEachRo( p, pObj, i )
-        if ( (pRepr = Gia_ObjReprObj(p, Gia_ObjId(p, pObj))) )
-            Gia_ObjSetCopyF( p, 0, pObj, Gia_ObjCopyF(p, 0, pRepr) );
-    for ( f = 0; f < nFrames+fScorr; f++ )
-    { 
-        Gia_ObjSetCopyF( p, f, Gia_ManConst0(p), 0 );
-        Gia_ManForEachPi( p, pObj, i )
-            Gia_ObjSetCopyF( p, f, pObj, Gia_ManAppendCi(pNew) );
-    }
-    *pvOutputs = Vec_IntAlloc( 1000 );
-    vXorLits = Vec_IntAlloc( 1000 );
-    if ( fRings )
-    {
-        Gia_ManForEachObj1( p, pObj, i )
-        {
-            if ( Gia_ObjIsConst( p, i ) )
-            {
-                iObjNew = Gia_ManCorrSpecReal( pNew, p, pObj, nFrames, 0 );
-                iObjNew = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pObj) );
-                if ( iObjNew != 0 )
-                {
-                    Vec_IntPush( *pvOutputs, 0 );
-                    Vec_IntPush( *pvOutputs, i );
-                    Vec_IntPush( vXorLits, iObjNew );
-                }
-            }
-            else if ( Gia_ObjIsHead( p, i ) )
-            {
-                iPrev = i;
-                Gia_ClassForEachObj1( p, i, iObj )
-                {
-                    iPrevNew = Gia_ManCorrSpecReal( pNew, p, Gia_ManObj(p, iPrev), nFrames, 0 );
-                    iObjNew  = Gia_ManCorrSpecReal( pNew, p, Gia_ManObj(p, iObj), nFrames, 0 );
-                    iPrevNew = Gia_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
-                    iObjNew  = Gia_LitNotCond( iObjNew,  Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
-                    if ( iPrevNew != iObjNew && iPrevNew != 0 && iObjNew != 1 )
-                    {
-                        Vec_IntPush( *pvOutputs, iPrev );
-                        Vec_IntPush( *pvOutputs, iObj );
-                        Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Gia_LitNot(iObjNew)) );
-                    }
-                    iPrev = iObj;
-                }
-                iObj = i;
-                iPrevNew = Gia_ManCorrSpecReal( pNew, p, Gia_ManObj(p, iPrev), nFrames, 0 );
-                iObjNew  = Gia_ManCorrSpecReal( pNew, p, Gia_ManObj(p, iObj), nFrames, 0 );
-                iPrevNew = Gia_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
-                iObjNew  = Gia_LitNotCond( iObjNew,  Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
-                if ( iPrevNew != iObjNew && iPrevNew != 0 && iObjNew != 1 )
-                {
-                    Vec_IntPush( *pvOutputs, iPrev );
-                    Vec_IntPush( *pvOutputs, iObj );
-                    Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Gia_LitNot(iObjNew)) );
-                }
-            }
-        }
-    }
-    else
-    {
-        Gia_ManForEachObj1( p, pObj, i )
-        {
-            pRepr = Gia_ObjReprObj( p, Gia_ObjId(p,pObj) );
-            if ( pRepr == NULL )
-                continue;
-            iPrevNew = Gia_ObjIsConst(p, i)? 0 : Gia_ManCorrSpecReal( pNew, p, pRepr, nFrames, 0 );
-            iObjNew  = Gia_ManCorrSpecReal( pNew, p, pObj, nFrames, 0 );
-            iObjNew  = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
-            if ( iPrevNew != iObjNew )
-            {
-                Vec_IntPush( *pvOutputs, Gia_ObjId(p, pRepr) );
-                Vec_IntPush( *pvOutputs, Gia_ObjId(p, pObj) );
-                Vec_IntPush( vXorLits, Gia_ManHashXor(pNew, iPrevNew, iObjNew) );
-            }
-        }
-    }
-    Vec_IntForEachEntry( vXorLits, iObjNew, i )
-        Gia_ManAppendCo( pNew, iObjNew );
-    Vec_IntFree( vXorLits );
-    Gia_ManHashStop( pNew );
-    ABC_FREE( p->pCopies );
-//Abc_Print( 1, "Before sweeping = %d\n", Gia_ManAndNum(pNew) );
-    pNew = Gia_ManCleanup( pTemp = pNew );
-//Abc_Print( 1, "After sweeping = %d\n", Gia_ManAndNum(pNew) );
-    Gia_ManStop( pTemp );
-    return pNew;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Derives SRM for signal correspondence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Gia_ManCorrSpecReduceInit( Gia_Man_t * p, int nFrames, int nPrefix, int fScorr, Vec_Int_t ** pvOutputs, int fRings )
-{
-    Gia_Man_t * pNew, * pTemp;
-    Gia_Obj_t * pObj, * pRepr;
-    Vec_Int_t * vXorLits;
-    int f, i, iPrevNew, iObjNew;
-    assert( (!fScorr && nFrames > 1) || (fScorr && nFrames > 0) || nPrefix );
-    assert( Gia_ManRegNum(p) > 0 );
-    assert( p->pReprs != NULL );
-    p->pCopies = ABC_FALLOC( int, (nFrames+nPrefix+fScorr)*Gia_ManObjNum(p) );
-    Gia_ManSetPhase( p );
-    pNew = Gia_ManStart( (nFrames+nPrefix) * Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
-    Gia_ManHashAlloc( pNew );
-    Gia_ManForEachRo( p, pObj, i )
-    {
-        Gia_ManAppendCi(pNew);
-        Gia_ObjSetCopyF( p, 0, pObj, 0 );
-    }
-    for ( f = 0; f < nFrames+nPrefix+fScorr; f++ )
-    { 
-        Gia_ObjSetCopyF( p, f, Gia_ManConst0(p), 0 );
-        Gia_ManForEachPi( p, pObj, i )
-            Gia_ObjSetCopyF( p, f, pObj, Gia_ManAppendCi(pNew) );
-    }
-    *pvOutputs = Vec_IntAlloc( 1000 );
-    vXorLits = Vec_IntAlloc( 1000 );
-    for ( f = nPrefix; f < nFrames+nPrefix; f++ )
-    {
-        Gia_ManForEachObj1( p, pObj, i )
-        {
-            pRepr = Gia_ObjReprObj( p, Gia_ObjId(p,pObj) );
-            if ( pRepr == NULL )
-                continue;
-            iPrevNew = Gia_ObjIsConst(p, i)? 0 : Gia_ManCorrSpecReal( pNew, p, pRepr, f, nPrefix );
-            iObjNew  = Gia_ManCorrSpecReal( pNew, p, pObj, f, nPrefix );
-            iObjNew  = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
-            if ( iPrevNew != iObjNew )
-            {
-                Vec_IntPush( *pvOutputs, Gia_ObjId(p, pRepr) );
-                Vec_IntPush( *pvOutputs, Gia_ObjId(p, pObj) );
-                Vec_IntPush( vXorLits, Gia_ManHashXor(pNew, iPrevNew, iObjNew) );
-            }
-        }
-    }
-    Vec_IntForEachEntry( vXorLits, iObjNew, i )
-        Gia_ManAppendCo( pNew, iObjNew );
-    Vec_IntFree( vXorLits );
-    Gia_ManHashStop( pNew );
-    ABC_FREE( p->pCopies );
-//Abc_Print( 1, "Before sweeping = %d\n", Gia_ManAndNum(pNew) );
-    pNew = Gia_ManCleanup( pTemp = pNew );
-//Abc_Print( 1, "After sweeping = %d\n", Gia_ManAndNum(pNew) );
-    Gia_ManStop( pTemp );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Initializes simulation info for lcorr/scorr counter-examples.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManStartSimInfo( Vec_Ptr_t * vInfo, int nFlops )
-{
-    unsigned * pInfo;
-    int k, w, nWords;
-    nWords = Vec_PtrReadWordsSimInfo( vInfo );
-    assert( nFlops <= Vec_PtrSize(vInfo) );
-    for ( k = 0; k < nFlops; k++ )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry( vInfo, k );
-        for ( w = 0; w < nWords; w++ )
-            pInfo[w] = 0;
-    }
-    for ( k = nFlops; k < Vec_PtrSize(vInfo); k++ )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry( vInfo, k );
-        for ( w = 0; w < nWords; w++ )
-            pInfo[w] = Gia_ManRandom( 0 );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Remaps simulation info from SRM to the original AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Gia_ManCorrRemapSimInfo( Gia_Man_t * p, Vec_Ptr_t * vInfo )
-{
-    Gia_Obj_t * pObj, * pRepr;
-    unsigned * pInfoObj, * pInfoRepr;
-    int i, w, nWords;
-    nWords = Vec_PtrReadWordsSimInfo( vInfo );
-    Gia_ManForEachRo( p, pObj, i )
-    {
-        // skip ROs without representatives
-        pRepr = Gia_ObjReprObj( p, Gia_ObjId(p,pObj) );
-        if ( pRepr == NULL || Gia_ObjFailed(p, Gia_ObjId(p,pObj)) )
-            continue;
-        pInfoObj = (unsigned *)Vec_PtrEntry( vInfo, i );
-        for ( w = 0; w < nWords; w++ )
-            assert( pInfoObj[w] == 0 );
-        // skip ROs with constant representatives
-        if ( Gia_ObjIsConst0(pRepr) )
-            continue;
-        assert( Gia_ObjIsRo(p, pRepr) );
-//        Abc_Print( 1, "%d -> %d    ", i, Gia_ObjId(p, pRepr) );
-        // transfer info from the representative
-        pInfoRepr = (unsigned *)Vec_PtrEntry( vInfo, Gia_ObjCioId(pRepr) - Gia_ManPiNum(p) );
-        for ( w = 0; w < nWords; w++ )
-            pInfoObj[w] = pInfoRepr[w];
-    }
-//    Abc_Print( 1, "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects information about remapping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Gia_ManCorrCreateRemapping( Gia_Man_t * p )
-{
-    Vec_Int_t * vPairs;
-    Gia_Obj_t * pObj, * pRepr;
-    int i;
-    vPairs = Vec_IntAlloc( 100 );
-    Gia_ManForEachRo( p, pObj, i )
-    {
-        // skip ROs without representatives
-        pRepr = Gia_ObjReprObj( p, Gia_ObjId(p,pObj) );
-        if ( pRepr == NULL || Gia_ObjIsConst0(pRepr) || Gia_ObjFailed(p, Gia_ObjId(p,pObj)) )
-//        if ( pRepr == NULL || Gia_ObjIsConst0(pRepr) || Gia_ObjIsFailedPair(p, Gia_ObjId(p, pRepr), Gia_ObjId(p, pObj)) )
-            continue;
-        assert( Gia_ObjIsRo(p, pRepr) );
-//        Abc_Print( 1, "%d -> %d    ", Gia_ObjId(p,pObj), Gia_ObjId(p, pRepr) );
-        // remember the pair
-        Vec_IntPush( vPairs, Gia_ObjCioId(pRepr) - Gia_ManPiNum(p) );
-        Vec_IntPush( vPairs, i );
-    }
-    return vPairs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Remaps simulation info from SRM to the original AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Gia_ManCorrPerformRemapping( Vec_Int_t * vPairs, Vec_Ptr_t * vInfo )
-{
-    unsigned * pInfoObj, * pInfoRepr;
-    int w, i, iObj, iRepr, nWords;
-    nWords = Vec_PtrReadWordsSimInfo( vInfo );
-    Vec_IntForEachEntry( vPairs, iRepr, i )
-    {
-        iObj = Vec_IntEntry( vPairs, ++i );
-        pInfoObj = (unsigned *)Vec_PtrEntry( vInfo, iObj );
-        pInfoRepr = (unsigned *)Vec_PtrEntry( vInfo, iRepr );
-        for ( w = 0; w < nWords; w++ )
-        {
-            assert( pInfoObj[w] == 0 );
-            pInfoObj[w] = pInfoRepr[w];
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Packs one counter-examples into the array of simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-*************************************`**********************************/
-int Cec_ManLoadCounterExamplesTry( Vec_Ptr_t * vInfo, Vec_Ptr_t * vPres, int iBit, int * pLits, int nLits )
-{
-    unsigned * pInfo, * pPres;
-    int i;
-    for ( i = 0; i < nLits; i++ )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
-        pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
-        if ( Gia_InfoHasBit( pPres, iBit ) && 
-             Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
-             return 0;
-    }
-    for ( i = 0; i < nLits; i++ )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
-        pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
-        Gia_InfoSetBit( pPres, iBit );
-        if ( Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
-            Gia_InfoXorBit( pInfo, iBit );
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs bitpacking of counter-examples.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManLoadCounterExamples( Vec_Ptr_t * vInfo, Vec_Int_t * vCexStore, int iStart )
-{ 
-    Vec_Int_t * vPat;
-    Vec_Ptr_t * vPres;
-    int nWords = Vec_PtrReadWordsSimInfo(vInfo);
-    int nBits = 32 * nWords; 
-    int k, nSize, iBit = 1, kMax = 0;
-    vPat  = Vec_IntAlloc( 100 );
-    vPres = Vec_PtrAllocSimInfo( Vec_PtrSize(vInfo), nWords );
-    Vec_PtrCleanSimInfo( vPres, 0, nWords );
-    while ( iStart < Vec_IntSize(vCexStore) )
-    {
-        // skip the output number
-        iStart++;
-        // get the number of items
-        nSize = Vec_IntEntry( vCexStore, iStart++ );
-        if ( nSize <= 0 )
-            continue;
-        // extract pattern
-        Vec_IntClear( vPat );
-        for ( k = 0; k < nSize; k++ )
-            Vec_IntPush( vPat, Vec_IntEntry( vCexStore, iStart++ ) );
-        // add pattern to storage
-        for ( k = 1; k < nBits; k++ )
-            if ( Cec_ManLoadCounterExamplesTry( vInfo, vPres, k, (int *)Vec_IntArray(vPat), Vec_IntSize(vPat) ) )
-                break;
-        kMax = ABC_MAX( kMax, k );
-        if ( k == nBits-1 )
-            break;
-    }
-    Vec_PtrFree( vPres );
-    Vec_IntFree( vPat );
-    return iStart;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs bitpacking of counter-examples.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManLoadCounterExamples2( Vec_Ptr_t * vInfo, Vec_Int_t * vCexStore, int iStart )
-{ 
-    unsigned * pInfo;
-    int nBits = 32 * Vec_PtrReadWordsSimInfo(vInfo); 
-    int k, iLit, nLits, Out, iBit = 1;
-    while ( iStart < Vec_IntSize(vCexStore) )
-    {
-        // skip the output number
-//        iStart++;
-        Out = Vec_IntEntry( vCexStore, iStart++ );
-//        Abc_Print( 1, "iBit = %d. Out = %d.\n", iBit, Out );
-        // get the number of items
-        nLits = Vec_IntEntry( vCexStore, iStart++ );
-        if ( nLits <= 0 )
-            continue;
-        // add pattern to storage
-        for ( k = 0; k < nLits; k++ )
-        {
-            iLit = Vec_IntEntry( vCexStore, iStart++ );
-            pInfo = (unsigned *)Vec_PtrEntry( vInfo, Gia_Lit2Var(iLit) );
-            if ( Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(iLit) )
-                Gia_InfoXorBit( pInfo, iBit );
-        }
-        if ( ++iBit == nBits )
-            break;
-    }
-//    Abc_Print( 1, "added %d bits\n", iBit-1 );
-    return iStart;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resimulates counter-examples derived by the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManResimulateCounterExamples( Cec_ManSim_t * pSim, Vec_Int_t * vCexStore, int nFrames )
-{ 
-    Vec_Int_t * vPairs;
-    Vec_Ptr_t * vSimInfo; 
-    int RetValue = 0, iStart = 0;
-    vPairs = Gia_ManCorrCreateRemapping( pSim->pAig );
-    Gia_ManSetRefs( pSim->pAig );
-//    pSim->pPars->nWords  = 63;
-    pSim->pPars->nFrames = nFrames;
-    vSimInfo = Vec_PtrAllocSimInfo( Gia_ManRegNum(pSim->pAig) + Gia_ManPiNum(pSim->pAig) * nFrames, pSim->pPars->nWords );
-    while ( iStart < Vec_IntSize(vCexStore) )
-    {
-        Cec_ManStartSimInfo( vSimInfo, Gia_ManRegNum(pSim->pAig) );
-        iStart = Cec_ManLoadCounterExamples( vSimInfo, vCexStore, iStart );
-//        iStart = Cec_ManLoadCounterExamples2( vSimInfo, vCexStore, iStart );
-//        Gia_ManCorrRemapSimInfo( pSim->pAig, vSimInfo );
-        Gia_ManCorrPerformRemapping( vPairs, vSimInfo );
-        RetValue |= Cec_ManSeqResimulate( pSim, vSimInfo );
-//        Cec_ManSeqResimulateInfo( pSim->pAig, vSimInfo, NULL );
-    }
-//Gia_ManEquivPrintOne( pSim->pAig, 85, 0 );
-    assert( iStart == Vec_IntSize(vCexStore) );
-    Vec_PtrFree( vSimInfo );
-    Vec_IntFree( vPairs );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resimulates counter-examples derived by the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManResimulateCounterExamplesComb( Cec_ManSim_t * pSim, Vec_Int_t * vCexStore )
-{ 
-    Vec_Ptr_t * vSimInfo; 
-    int RetValue = 0, iStart = 0;
-    Gia_ManSetRefs( pSim->pAig );
-    pSim->pPars->nFrames = 1;
-    vSimInfo = Vec_PtrAllocSimInfo( Gia_ManCiNum(pSim->pAig), pSim->pPars->nWords );
-    while ( iStart < Vec_IntSize(vCexStore) )
-    {
-        Cec_ManStartSimInfo( vSimInfo, 0 );
-        iStart = Cec_ManLoadCounterExamples( vSimInfo, vCexStore, iStart );
-        RetValue |= Cec_ManSeqResimulate( pSim, vSimInfo );
-    }
-    assert( iStart == Vec_IntSize(vCexStore) );
-    Vec_PtrFree( vSimInfo );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates equivalence classes by marking those that timed out.]
-
-  Description [Returns 1 if all ndoes are proved.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Gia_ManCheckRefinements( Gia_Man_t * p, Vec_Str_t * vStatus, Vec_Int_t * vOutputs, Cec_ManSim_t * pSim, int fRings )
-{
-    int i, status, iRepr, iObj;
-    int Counter = 0;
-    assert( 2 * Vec_StrSize(vStatus) == Vec_IntSize(vOutputs) );
-    Vec_StrForEachEntry( vStatus, status, i )
-    {
-        iRepr = Vec_IntEntry( vOutputs, 2*i );
-        iObj  = Vec_IntEntry( vOutputs, 2*i+1 );
-        if ( status == 1 )
-            continue;
-        if ( status == 0 )
-        {
-            if ( Gia_ObjHasSameRepr(p, iRepr, iObj) )
-                Counter++;
-//            if ( Gia_ObjHasSameRepr(p, iRepr, iObj) )
-//                Abc_Print( 1, "Gia_ManCheckRefinements(): Disproved equivalence (%d,%d) is not refined!\n", iRepr, iObj );
-//            if ( Gia_ObjHasSameRepr(p, iRepr, iObj) )
-//                Cec_ManSimClassRemoveOne( pSim, iObj );
-            continue;
-        }
-        if ( status == -1 )
-        {
-//            if ( !Gia_ObjFailed( p, iObj ) )
-//                Abc_Print( 1, "Gia_ManCheckRefinements(): Failed equivalence is not marked as failed!\n" );
-//            Gia_ObjSetFailed( p, iRepr );
-//            Gia_ObjSetFailed( p, iObj );        
-//            if ( fRings )
-//            Cec_ManSimClassRemoveOne( pSim, iRepr );
-            Cec_ManSimClassRemoveOne( pSim, iObj );
-            continue;
-        }
-    }
-//    if ( Counter )
-//    Abc_Print( 1, "Gia_ManCheckRefinements(): Could not refine %d nodes.\n", Counter );
-    return 1;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates the AIG in the DFS order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Gia_ManCorrReduce_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj )
-{
-    Gia_Obj_t * pRepr;
-    if ( (pRepr = Gia_ObjReprObj(p, Gia_ObjId(p, pObj))) )
-    {
-        Gia_ManCorrReduce_rec( pNew, p, pRepr );
-        pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
-        return;
-    }
-    if ( ~pObj->Value )
-        return;
-    assert( Gia_ObjIsAnd(pObj) );
-    Gia_ManCorrReduce_rec( pNew, p, Gia_ObjFanin0(pObj) );
-    Gia_ManCorrReduce_rec( pNew, p, Gia_ObjFanin1(pObj) );
-    pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reduces AIG using equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Gia_ManCorrReduce( Gia_Man_t * p )
-{
-    Gia_Man_t * pNew;
-    Gia_Obj_t * pObj;
-    int i;
-    Gia_ManSetPhase( p );
-    pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
-    Gia_ManFillValue( p );
-    Gia_ManConst0(p)->Value = 0;
-    Gia_ManForEachCi( p, pObj, i )
-        pObj->Value = Gia_ManAppendCi(pNew);
-    Gia_ManHashAlloc( pNew );
-    Gia_ManForEachCo( p, pObj, i )
-        Gia_ManCorrReduce_rec( pNew, p, Gia_ObjFanin0(pObj) );
-    Gia_ManForEachCo( p, pObj, i )
-        Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
-    Gia_ManHashStop( pNew );
-    Gia_ManSetRegNum( pNew, Gia_ManRegNum(p) );
-    return pNew;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Prints statistics during solving.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManRefinedClassPrintStats( Gia_Man_t * p, Vec_Str_t * vStatus, int iIter, int Time )
-{ 
-    int nLits, CounterX = 0, Counter0 = 0, Counter = 0;
-    int i, Entry, nProve = 0, nDispr = 0, nFail = 0;
-    for ( i = 1; i < Gia_ManObjNum(p); i++ )
-    {
-        if ( Gia_ObjIsNone(p, i) )
-            CounterX++;
-        else if ( Gia_ObjIsConst(p, i) )
-            Counter0++;
-        else if ( Gia_ObjIsHead(p, i) )
-            Counter++;
-    }
-    CounterX -= Gia_ManCoNum(p);
-    nLits = Gia_ManCiNum(p) + Gia_ManAndNum(p) - Counter - CounterX;
-    if ( iIter == -1 )
-        Abc_Print( 1, "BMC : " );
-    else
-        Abc_Print( 1, "%3d : ", iIter );
-    Abc_Print( 1, "c =%8d  cl =%7d  lit =%8d  ", Counter0, Counter, nLits );
-    if ( vStatus )
-    Vec_StrForEachEntry( vStatus, Entry, i )
-    {
-        if ( Entry == 1 )
-            nProve++;
-        else if ( Entry == 0 )
-            nDispr++;
-        else if ( Entry == -1 )
-            nFail++;
-    }
-    Abc_Print( 1, "p =%6d  d =%6d  f =%6d  ", nProve, nDispr, nFail );
-    Abc_PrintTime( 1, "T", Time );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Runs BMC for the equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManLSCorrespondenceBmc( Gia_Man_t * pAig, Cec_ParCor_t * pPars, int nPrefs )
-{  
-    Cec_ParSim_t ParsSim, * pParsSim = &ParsSim;
-    Cec_ParSat_t ParsSat, * pParsSat = &ParsSat;
-    Vec_Str_t * vStatus;
-    Vec_Int_t * vOutputs;
-    Vec_Int_t * vCexStore;
-    Cec_ManSim_t * pSim;
-    Gia_Man_t * pSrm;
-    int fChanges, RetValue;
-    // prepare simulation manager
-    Cec_ManSimSetDefaultParams( pParsSim );
-    pParsSim->nWords     = pPars->nWords;
-    pParsSim->nFrames    = pPars->nRounds;
-    pParsSim->fVerbose   = pPars->fVerbose;
-    pParsSim->fLatchCorr = pPars->fLatchCorr;
-    pParsSim->fSeqSimulate = 1;
-    pSim = Cec_ManSimStart( pAig, pParsSim );
-    // prepare SAT solving
-    Cec_ManSatSetDefaultParams( pParsSat );
-    pParsSat->nBTLimit = pPars->nBTLimit;
-    pParsSat->fVerbose = pPars->fVerbose;
-    fChanges = 1;
-    while ( fChanges )
-    {
-        int clkBmc = clock();
-        fChanges = 0;
-        pSrm = Gia_ManCorrSpecReduceInit( pAig, pPars->nFrames, nPrefs, !pPars->fLatchCorr, &vOutputs, pPars->fUseRings );
-        if ( Gia_ManPoNum(pSrm) == 0 )
-        {
-            Gia_ManStop( pSrm );
-            Vec_IntFree( vOutputs );
-            break;
-        } 
-        pParsSat->nBTLimit *= 10;
-        if ( pPars->fUseCSat )
-            vCexStore = Tas_ManSolveMiterNc( pSrm, pPars->nBTLimit, &vStatus, 0 );
-        else
-            vCexStore = Cec_ManSatSolveMiter( pSrm, pParsSat, &vStatus );
-        // refine classes with these counter-examples
-        if ( Vec_IntSize(vCexStore) )
-        {
-            RetValue = Cec_ManResimulateCounterExamples( pSim, vCexStore, pPars->nFrames + 1 + nPrefs );
-            Gia_ManCheckRefinements( pAig, vStatus, vOutputs, pSim, pPars->fUseRings );
-            fChanges = 1;
-        }
-        if ( pPars->fVerbose )
-            Cec_ManRefinedClassPrintStats( pAig, vStatus, -1, clock() - clkBmc );
-        // recycle
-        Vec_IntFree( vCexStore );
-        Vec_StrFree( vStatus );
-        Gia_ManStop( pSrm );
-        Vec_IntFree( vOutputs );
-    }
-    Cec_ManSimStop( pSim );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Internal procedure for register correspondence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManLSCorrespondenceClasses( Gia_Man_t * pAig, Cec_ParCor_t * pPars )
-{  
-    int nIterMax     = 100000;
-    int nAddFrames   = 1; // additional timeframes to simulate
-    int fRunBmcFirst = 1;
-    Vec_Str_t * vStatus;
-    Vec_Int_t * vOutputs;
-    Vec_Int_t * vCexStore;
-    Cec_ParSim_t ParsSim, * pParsSim = &ParsSim;
-    Cec_ParSat_t ParsSat, * pParsSat = &ParsSat;
-    Cec_ManSim_t * pSim;
-    Gia_Man_t * pSrm;
-    int r, RetValue, clkTotal = clock();
-    int clkSat = 0, clkSim = 0, clkSrm = 0;
-    int clk2, clk = clock();
-    if ( Gia_ManRegNum(pAig) == 0 )
-    {
-        Abc_Print( 1, "Cec_ManLatchCorrespondence(): Not a sequential AIG.\n" );
-        return 0;
-    }
-    Gia_ManRandom( 1 );
-    // prepare simulation manager
-    Cec_ManSimSetDefaultParams( pParsSim );
-    pParsSim->nWords     = pPars->nWords;
-    pParsSim->nFrames    = pPars->nFrames;
-    pParsSim->fVerbose   = pPars->fVerbose;
-    pParsSim->fLatchCorr = pPars->fLatchCorr;
-    pParsSim->fConstCorr = pPars->fConstCorr;
-    pParsSim->fSeqSimulate = 1;
-    // create equivalence classes of registers
-    pSim = Cec_ManSimStart( pAig, pParsSim );
-    if ( pAig->pReprs == NULL )
-    {
-        Cec_ManSimClassesPrepare( pSim, pPars->nLevelMax );
-        Cec_ManSimClassesRefine( pSim );
-    }
-    // prepare SAT solving
-    Cec_ManSatSetDefaultParams( pParsSat );
-    pParsSat->nBTLimit = pPars->nBTLimit;
-    pParsSat->fVerbose = pPars->fVerbose;
-    if ( pPars->fVerbose )
-    {
-        Abc_Print( 1, "Obj = %7d. And = %7d. Conf = %5d. Fr = %d. Lcorr = %d. Ring = %d. CSat = %d.\n",
-            Gia_ManObjNum(pAig), Gia_ManAndNum(pAig), 
-            pPars->nBTLimit, pPars->nFrames, pPars->fLatchCorr, pPars->fUseRings, pPars->fUseCSat );
-        Cec_ManRefinedClassPrintStats( pAig, NULL, 0, clock() - clk );
-    }
-    // check the base case
-    if ( fRunBmcFirst && (!pPars->fLatchCorr || pPars->nFrames > 1) )
-        Cec_ManLSCorrespondenceBmc( pAig, pPars, 0 );
-    if ( pPars->pFunc )
-    {
-        ((int (*)(void *))pPars->pFunc)( pPars->pData );
-        ((int (*)(void *))pPars->pFunc)( pPars->pData );
-    }
-    if ( pPars->nStepsMax == 0 )
-    {
-        Abc_Print( 1, "Stopped signal correspondence after BMC.\n" );
-        Cec_ManSimStop( pSim );
-        return 1;
-    }
-    // perform refinement of equivalence classes
-    for ( r = 0; r < nIterMax; r++ )
-    { 
-        if ( pPars->nStepsMax == r )
-        {
-            Cec_ManSimStop( pSim );
-            Abc_Print( 1, "Stopped signal correspondence after %d refiment iterations.\n", r );
-            return 1;
-        }
-        clk = clock();
-        // perform speculative reduction
-        clk2 = clock();
-        pSrm = Gia_ManCorrSpecReduce( pAig, pPars->nFrames, !pPars->fLatchCorr, &vOutputs, pPars->fUseRings );
-        assert( Gia_ManRegNum(pSrm) == 0 && Gia_ManPiNum(pSrm) == Gia_ManRegNum(pAig)+(pPars->nFrames+!pPars->fLatchCorr)*Gia_ManPiNum(pAig) );
-        clkSrm += clock() - clk2;
-        if ( Gia_ManCoNum(pSrm) == 0 )
-        {
-            Vec_IntFree( vOutputs );
-            Gia_ManStop( pSrm );            
-            break;
-        }
-//Gia_DumpAiger( pSrm, "corrsrm", r, 2 );
-        // found counter-examples to speculation
-        clk2 = clock();
-        if ( pPars->fUseCSat )
-            vCexStore = Cbs_ManSolveMiterNc( pSrm, pPars->nBTLimit, &vStatus, 0 );
-        else
-            vCexStore = Cec_ManSatSolveMiter( pSrm, pParsSat, &vStatus );
-        Gia_ManStop( pSrm );
-        clkSat += clock() - clk2;
-        if ( Vec_IntSize(vCexStore) == 0 )
-        {
-            Vec_IntFree( vCexStore );
-            Vec_StrFree( vStatus );
-            Vec_IntFree( vOutputs );
-            break;
-        }
-        // refine classes with these counter-examples
-        clk2 = clock();
-        RetValue = Cec_ManResimulateCounterExamples( pSim, vCexStore, pPars->nFrames + 1 + nAddFrames );
-        Vec_IntFree( vCexStore );
-        clkSim += clock() - clk2;
-        Gia_ManCheckRefinements( pAig, vStatus, vOutputs, pSim, pPars->fUseRings );
-        if ( pPars->fVerbose )
-            Cec_ManRefinedClassPrintStats( pAig, vStatus, r+1, clock() - clk );
-        Vec_StrFree( vStatus );
-        Vec_IntFree( vOutputs );
-//Gia_ManEquivPrintClasses( pAig, 1, 0 );
-        if ( pPars->pFunc )
-            ((int (*)(void *))pPars->pFunc)( pPars->pData );
-    }
-    if ( pPars->fVerbose )
-        Cec_ManRefinedClassPrintStats( pAig, NULL, r+1, clock() - clk );
-    // check the overflow
-    if ( r == nIterMax )
-        Abc_Print( 1, "The refinement was not finished. The result may be incorrect.\n" );
-    Cec_ManSimStop( pSim );
-    // check the base case
-    if ( !fRunBmcFirst && (!pPars->fLatchCorr || pPars->nFrames > 1) )
-        Cec_ManLSCorrespondenceBmc( pAig, pPars, 0 );
-    clkTotal = clock() - clkTotal;
-    // report the results
-    if ( pPars->fVerbose )
-    {
-        ABC_PRTP( "Srm  ", clkSrm,                        clkTotal );
-        ABC_PRTP( "Sat  ", clkSat,                        clkTotal );
-        ABC_PRTP( "Sim  ", clkSim,                        clkTotal );
-        ABC_PRTP( "Other", clkTotal-clkSat-clkSrm-clkSim, clkTotal );
-        Abc_PrintTime( 1, "TOTAL",  clkTotal );
-    }
-    return 1;
-}    
-
-/**Function*************************************************************
-
-  Synopsis    [Computes new initial state.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Cec_ManComputeInitState( Gia_Man_t * pAig, int nFrames )
-{  
-    Gia_Obj_t * pObj, * pObjRo, * pObjRi;
-    unsigned * pInitState;
-    int i, f; 
-    Gia_ManRandom( 1 );
-//    Abc_Print( 1, "Simulating %d timeframes.\n", nFrames );
-    Gia_ManForEachRo( pAig, pObj, i )
-        pObj->fMark1 = 0;
-    for ( f = 0; f < nFrames; f++ )
-    {
-        Gia_ManConst0(pAig)->fMark1 = 0;
-        Gia_ManForEachPi( pAig, pObj, i )
-            pObj->fMark1 = Gia_ManRandom(0) & 1;
-        Gia_ManForEachAnd( pAig, pObj, i )
-            pObj->fMark1 = (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj)) & 
-                (Gia_ObjFanin1(pObj)->fMark1 ^ Gia_ObjFaninC1(pObj));
-        Gia_ManForEachRi( pAig, pObj, i )
-            pObj->fMark1 = (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj));
-        Gia_ManForEachRiRo( pAig, pObjRi, pObjRo, i )
-            pObjRo->fMark1 = pObjRi->fMark1;
-    }
-    pInitState = ABC_CALLOC( unsigned, Gia_BitWordNum(Gia_ManRegNum(pAig)) );
-    Gia_ManForEachRo( pAig, pObj, i )
-    {
-        if ( pObj->fMark1 )
-            Gia_InfoSetBit( pInitState, i );
-//        Abc_Print( 1, "%d", pObj->fMark1 );
-    }
-//    Abc_Print( 1, "\n" );
-    Gia_ManCleanMark1( pAig );
-    return pInitState;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints flop equivalences.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManPrintFlopEquivs( Gia_Man_t * p )
-{
-    Gia_Obj_t * pObj, * pRepr;
-    int i;
-    assert( p->vNamesIn != NULL );
-    Gia_ManForEachRo( p, pObj, i )
-    {
-        if ( Gia_ObjIsConst(p, Gia_ObjId(p, pObj)) )
-            Abc_Print( 1, "Original flop %s is proved equivalent to constant.\n", Vec_PtrEntry(p->vNamesIn, Gia_ObjCioId(pObj)) );
-        else if ( (pRepr = Gia_ObjReprObj(p, Gia_ObjId(p, pObj))) )
-        {
-            if ( Gia_ObjIsCi(pRepr) )
-                Abc_Print( 1, "Original flop %s is proved equivalent to flop %s.\n",
-                    Vec_PtrEntry( p->vNamesIn, Gia_ObjCioId(pObj)  ),
-                    Vec_PtrEntry( p->vNamesIn, Gia_ObjCioId(pRepr) ) );
-            else
-                Abc_Print( 1, "Original flop %s is proved equivalent to internal node %d.\n",
-                    Vec_PtrEntry( p->vNamesIn, Gia_ObjCioId(pObj) ), Gia_ObjId(p, pRepr) );
-        }
-    }
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Top-level procedure for register correspondence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Cec_ManLSCorrespondence( Gia_Man_t * pAig, Cec_ParCor_t * pPars )
-{  
-    Gia_Man_t * pNew, * pTemp;
-    unsigned * pInitState;
-    int RetValue;
-    ABC_FREE( pAig->pReprs );
-    ABC_FREE( pAig->pNexts );
-    if ( pPars->nPrefix == 0 )
-        RetValue = Cec_ManLSCorrespondenceClasses( pAig, pPars );
-    else
-    {
-        // compute the cycles AIG
-        pInitState = Cec_ManComputeInitState( pAig, pPars->nPrefix );
-        pTemp = Gia_ManDupFlip( pAig, (int *)pInitState );
-        ABC_FREE( pInitState );
-        // compute classes of this AIG
-        RetValue = Cec_ManLSCorrespondenceClasses( pTemp, pPars );
-        // transfer the class info
-        pAig->pReprs = pTemp->pReprs; pTemp->pReprs = NULL;
-        pAig->pNexts = pTemp->pNexts; pTemp->pNexts = NULL;
-        // perform additional BMC
-        pPars->fUseCSat = 0;
-        pPars->nBTLimit = ABC_MAX( pPars->nBTLimit, 1000 );
-        Cec_ManLSCorrespondenceBmc( pAig, pPars, pPars->nPrefix );
-/*
-        // transfer the class info back
-        pTemp->pReprs = pAig->pReprs; pAig->pReprs = NULL;
-        pTemp->pNexts = pAig->pNexts; pAig->pNexts = NULL;
-        // continue refining
-        RetValue = Cec_ManLSCorrespondenceClasses( pTemp, pPars );
-        // transfer the class info
-        pAig->pReprs = pTemp->pReprs; pTemp->pReprs = NULL;
-        pAig->pNexts = pTemp->pNexts; pTemp->pNexts = NULL;
-*/
-        Gia_ManStop( pTemp );
-    }
-    // derive reduced AIG
-    if ( pPars->fMakeChoices )
-    {
-        pNew = Gia_ManEquivToChoices( pAig, 1 );
-        Gia_ManHasChoices( pNew );
-    }
-    else
-    {
-//        Gia_ManEquivImprove( pAig );
-        pNew = Gia_ManCorrReduce( pAig );
-        pNew = Gia_ManSeqCleanup( pTemp = pNew );
-        Gia_ManStop( pTemp );
-        //Gia_WriteAiger( pNew, "reduced.aig", 0, 0 );
-    }
-    // report the results
-    if ( pPars->fVerbose )
-    {
-        Abc_Print( 1, "NBeg = %d. NEnd = %d. (Gain = %6.2f %%).  RBeg = %d. REnd = %d. (Gain = %6.2f %%).\n", 
-            Gia_ManAndNum(pAig), Gia_ManAndNum(pNew), 
-            100.0*(Gia_ManAndNum(pAig)-Gia_ManAndNum(pNew))/(Gia_ManAndNum(pAig)?Gia_ManAndNum(pAig):1), 
-            Gia_ManRegNum(pAig), Gia_ManRegNum(pNew), 
-            100.0*(Gia_ManRegNum(pAig)-Gia_ManRegNum(pNew))/(Gia_ManRegNum(pAig)?Gia_ManRegNum(pAig):1) );
-    }
-    if ( pPars->nPrefix && (Gia_ManAndNum(pNew) < Gia_ManAndNum(pAig) || Gia_ManRegNum(pNew) < Gia_ManRegNum(pAig)) )
-        Abc_Print( 1, "The reduced AIG was produced using %d-th invariants and will not verify.\n", pPars->nPrefix );
-    // print verbose info about equivalences
-    if ( pPars->fVerboseFlops )
-    {
-        if ( pAig->vNamesIn == NULL )
-            Abc_Print( 1, "Flop output names are not available. Use command \"&get -n\".\n" );
-        else
-            Cec_ManPrintFlopEquivs( pAig );
-    }
-    return pNew;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cecCorr_updated.c b/src/aig/cec/cecCorr_updated.c
deleted file mode 100644
index 8ce1bd74..00000000
--- a/src/aig/cec/cecCorr_updated.c
+++ /dev/null
@@ -1,1027 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecCorr.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [Latch/signal correspondence computation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecCorr.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static void Gia_ManCorrSpecReduce_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj, int f, int nPrefix );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the real value of the literal w/o spec reduction.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Gia_ManCorrSpecReal( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj, int f, int nPrefix )
-{
-    if ( Gia_ObjIsAnd(pObj) )
-    {
-        Gia_ManCorrSpecReduce_rec( pNew, p, Gia_ObjFanin0(pObj), f, nPrefix );
-        Gia_ManCorrSpecReduce_rec( pNew, p, Gia_ObjFanin1(pObj), f, nPrefix );
-        return Gia_ManHashAnd( pNew, Gia_ObjFanin0CopyF(p, f, pObj), Gia_ObjFanin1CopyF(p, f, pObj) );
-    }
-    if ( f == 0 )
-    {
-        assert( Gia_ObjIsRo(p, pObj) );
-        return Gia_ObjCopyF(p, f, pObj);
-    }
-    assert( f && Gia_ObjIsRo(p, pObj) );
-    pObj = Gia_ObjRoToRi( p, pObj );
-    Gia_ManCorrSpecReduce_rec( pNew, p, Gia_ObjFanin0(pObj), f-1, nPrefix );
-    return Gia_ObjFanin0CopyF( p, f-1, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recursively performs speculative reduction for the object.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Gia_ManCorrSpecReduce_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj, int f, int nPrefix )
-{
-    Gia_Obj_t * pRepr;
-    int iLitNew;
-    if ( ~Gia_ObjCopyF(p, f, pObj) )
-        return;
-    if ( f >= nPrefix && (pRepr = Gia_ObjReprObj(p, Gia_ObjId(p, pObj))) )
-    {
-        Gia_ManCorrSpecReduce_rec( pNew, p, pRepr, f, nPrefix );
-        iLitNew = Gia_LitNotCond( Gia_ObjCopyF(p, f, pRepr), Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
-        Gia_ObjSetCopyF( p, f, pObj, iLitNew );
-        return;
-    }
-    assert( Gia_ObjIsCand(pObj) );
-    iLitNew = Gia_ManCorrSpecReal( pNew, p, pObj, f, nPrefix );
-    Gia_ObjSetCopyF( p, f, pObj, iLitNew );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives SRM for signal correspondence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Gia_ManCorrSpecReduce( Gia_Man_t * p, int nFrames, int fScorr, Vec_Int_t ** pvOutputs, int fRings )
-{
-    Gia_Man_t * pNew, * pTemp;
-    Gia_Obj_t * pObj, * pRepr;
-    Vec_Int_t * vXorLits;
-    int f, i, iPrev, iObj, iPrevNew, iObjNew;
-    assert( nFrames > 0 );
-    assert( Gia_ManRegNum(p) > 0 );
-    assert( p->pReprs != NULL );
-    p->pCopies = ABC_FALLOC( int, (nFrames+fScorr)*Gia_ManObjNum(p) );
-    Gia_ManSetPhase( p );
-    pNew = Gia_ManStart( nFrames * Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
-    Gia_ManHashAlloc( pNew );
-    Gia_ObjSetCopyF( p, 0, Gia_ManConst0(p), 0 );
-    Gia_ManForEachRo( p, pObj, i )
-        Gia_ObjSetCopyF( p, 0, pObj, Gia_ManAppendCi(pNew) );
-    Gia_ManForEachRo( p, pObj, i )
-        if ( (pRepr = Gia_ObjReprObj(p, Gia_ObjId(p, pObj))) )
-            Gia_ObjSetCopyF( p, 0, pObj, Gia_ObjCopyF(p, 0, pRepr) );
-    for ( f = 0; f < nFrames+fScorr; f++ )
-    { 
-        Gia_ObjSetCopyF( p, f, Gia_ManConst0(p), 0 );
-        Gia_ManForEachPi( p, pObj, i )
-            Gia_ObjSetCopyF( p, f, pObj, Gia_ManAppendCi(pNew) );
-    }
-    *pvOutputs = Vec_IntAlloc( 1000 );
-    vXorLits = Vec_IntAlloc( 1000 );
-    if ( fRings )
-    {
-        Gia_ManForEachObj1( p, pObj, i )
-        {
-            if ( Gia_ObjIsConst( p, i ) )
-            {
-                iObjNew = Gia_ManCorrSpecReal( pNew, p, pObj, nFrames, 0 );
-                iObjNew = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pObj) );
-                if ( iObjNew != 0 )
-                {
-                    Vec_IntPush( *pvOutputs, 0 );
-                    Vec_IntPush( *pvOutputs, i );
-                    Vec_IntPush( vXorLits, iObjNew );
-                }
-            }
-            else if ( Gia_ObjIsHead( p, i ) )
-            {
-                iPrev = i;
-                Gia_ClassForEachObj1( p, i, iObj )
-                {
-                    iPrevNew = Gia_ManCorrSpecReal( pNew, p, Gia_ManObj(p, iPrev), nFrames, 0 );
-                    iObjNew  = Gia_ManCorrSpecReal( pNew, p, Gia_ManObj(p, iObj), nFrames, 0 );
-                    iPrevNew = Gia_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
-                    iObjNew  = Gia_LitNotCond( iObjNew,  Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
-                    if ( iPrevNew != iObjNew && iPrevNew != 0 && iObjNew != 1 )
-                    {
-                        Vec_IntPush( *pvOutputs, iPrev );
-                        Vec_IntPush( *pvOutputs, iObj );
-                        Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Gia_LitNot(iObjNew)) );
-                    }
-                    iPrev = iObj;
-                }
-                iObj = i;
-                iPrevNew = Gia_ManCorrSpecReal( pNew, p, Gia_ManObj(p, iPrev), nFrames, 0 );
-                iObjNew  = Gia_ManCorrSpecReal( pNew, p, Gia_ManObj(p, iObj), nFrames, 0 );
-                iPrevNew = Gia_LitNotCond( iPrevNew, Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iPrev)) );
-                iObjNew  = Gia_LitNotCond( iObjNew,  Gia_ObjPhase(pObj) ^ Gia_ObjPhase(Gia_ManObj(p, iObj)) );
-                if ( iPrevNew != iObjNew && iPrevNew != 0 && iObjNew != 1 )
-                {
-                    Vec_IntPush( *pvOutputs, iPrev );
-                    Vec_IntPush( *pvOutputs, iObj );
-                    Vec_IntPush( vXorLits, Gia_ManHashAnd(pNew, iPrevNew, Gia_LitNot(iObjNew)) );
-                }
-            }
-        }
-    }
-    else
-    {
-        Gia_ManForEachObj1( p, pObj, i )
-        {
-            pRepr = Gia_ObjReprObj( p, Gia_ObjId(p,pObj) );
-            if ( pRepr == NULL )
-                continue;
-            iPrevNew = Gia_ObjIsConst(p, i)? 0 : Gia_ManCorrSpecReal( pNew, p, pRepr, nFrames, 0 );
-            iObjNew  = Gia_ManCorrSpecReal( pNew, p, pObj, nFrames, 0 );
-            iObjNew  = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
-            if ( iPrevNew != iObjNew )
-            {
-                Vec_IntPush( *pvOutputs, Gia_ObjId(p, pRepr) );
-                Vec_IntPush( *pvOutputs, Gia_ObjId(p, pObj) );
-                Vec_IntPush( vXorLits, Gia_ManHashXor(pNew, iPrevNew, iObjNew) );
-            }
-        }
-    }
-    Vec_IntForEachEntry( vXorLits, iObjNew, i )
-        Gia_ManAppendCo( pNew, iObjNew );
-    Vec_IntFree( vXorLits );
-    Gia_ManHashStop( pNew );
-    ABC_FREE( p->pCopies );
-//printf( "Before sweeping = %d\n", Gia_ManAndNum(pNew) );
-    pNew = Gia_ManCleanup( pTemp = pNew );
-//printf( "After sweeping = %d\n", Gia_ManAndNum(pNew) );
-    Gia_ManStop( pTemp );
-    return pNew;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Derives SRM for signal correspondence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Gia_ManCorrSpecReduceInit( Gia_Man_t * p, int nFrames, int nPrefix, int fScorr, Vec_Int_t ** pvOutputs, int fRings )
-{
-    Gia_Man_t * pNew, * pTemp;
-    Gia_Obj_t * pObj, * pRepr;
-    Vec_Int_t * vXorLits;
-    int f, i, iPrevNew, iObjNew;
-    assert( (!fScorr && nFrames > 1) || (fScorr && nFrames > 0) || nPrefix );
-    assert( Gia_ManRegNum(p) > 0 );
-    assert( p->pReprs != NULL );
-    p->pCopies = ABC_FALLOC( int, (nFrames+nPrefix+fScorr)*Gia_ManObjNum(p) );
-    Gia_ManSetPhase( p );
-    pNew = Gia_ManStart( (nFrames+nPrefix) * Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
-    Gia_ManHashAlloc( pNew );
-    Gia_ManForEachRo( p, pObj, i )
-    {
-        Gia_ManAppendCi(pNew);
-        Gia_ObjSetCopyF( p, 0, pObj, 0 );
-    }
-    for ( f = 0; f < nFrames+nPrefix+fScorr; f++ )
-    { 
-        Gia_ObjSetCopyF( p, f, Gia_ManConst0(p), 0 );
-        Gia_ManForEachPi( p, pObj, i )
-            Gia_ObjSetCopyF( p, f, pObj, Gia_ManAppendCi(pNew) );
-    }
-    *pvOutputs = Vec_IntAlloc( 1000 );
-    vXorLits = Vec_IntAlloc( 1000 );
-    for ( f = nPrefix; f < nFrames+nPrefix; f++ )
-    {
-        Gia_ManForEachObj1( p, pObj, i )
-        {
-            pRepr = Gia_ObjReprObj( p, Gia_ObjId(p,pObj) );
-            if ( pRepr == NULL )
-                continue;
-            iPrevNew = Gia_ObjIsConst(p, i)? 0 : Gia_ManCorrSpecReal( pNew, p, pRepr, f, nPrefix );
-            iObjNew  = Gia_ManCorrSpecReal( pNew, p, pObj, f, nPrefix );
-            iObjNew  = Gia_LitNotCond( iObjNew, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
-            if ( iPrevNew != iObjNew )
-            {
-                Vec_IntPush( *pvOutputs, Gia_ObjId(p, pRepr) );
-                Vec_IntPush( *pvOutputs, Gia_ObjId(p, pObj) );
-                Vec_IntPush( vXorLits, Gia_ManHashXor(pNew, iPrevNew, iObjNew) );
-            }
-        }
-    }
-    Vec_IntForEachEntry( vXorLits, iObjNew, i )
-        Gia_ManAppendCo( pNew, iObjNew );
-    Vec_IntFree( vXorLits );
-    Gia_ManHashStop( pNew );
-    ABC_FREE( p->pCopies );
-//printf( "Before sweeping = %d\n", Gia_ManAndNum(pNew) );
-    pNew = Gia_ManCleanup( pTemp = pNew );
-//printf( "After sweeping = %d\n", Gia_ManAndNum(pNew) );
-    Gia_ManStop( pTemp );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Initializes simulation info for lcorr/scorr counter-examples.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManStartSimInfo( Vec_Ptr_t * vInfo, int nFlops, int * pInitState )
-{
-    unsigned * pInfo;
-    int k, w, nWords;
-    nWords = Vec_PtrReadWordsSimInfo( vInfo );
-    assert( nFlops <= Vec_PtrSize(vInfo) );
-    for ( k = 0; k < nFlops; k++ )
-    {
-        pInfo = Vec_PtrEntry( vInfo, k );
-        if ( pInitState && Gia_InfoHasBit(pInitState, k) )
-        {
-            for ( w = 0; w < nWords; w++ )
-                pInfo[w] = ~0;
-//            pInfo[0] <<= 1;
-        }
-        else
-        {
-            for ( w = 0; w < nWords; w++ )
-                pInfo[w] = 0;
-        }
-    }
-    for ( k = nFlops; k < Vec_PtrSize(vInfo); k++ )
-    {
-        pInfo = Vec_PtrEntry( vInfo, k );
-        for ( w = 0; w < nWords; w++ )
-            pInfo[w] = Gia_ManRandom( 0 );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Remaps simulation info from SRM to the original AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Gia_ManCorrRemapSimInfo( Gia_Man_t * p, Vec_Ptr_t * vInfo )
-{
-    Gia_Obj_t * pObj, * pRepr;
-    unsigned * pInfoObj, * pInfoRepr;
-    int i, w, nWords;
-    nWords = Vec_PtrReadWordsSimInfo( vInfo );
-    Gia_ManForEachRo( p, pObj, i )
-    {
-        // skip ROs without representatives
-        pRepr = Gia_ObjReprObj( p, Gia_ObjId(p,pObj) );
-        if ( pRepr == NULL || Gia_ObjFailed(p, Gia_ObjId(p,pObj)) )
-            continue;
-        pInfoObj = Vec_PtrEntry( vInfo, i );
-        for ( w = 0; w < nWords; w++ )
-            assert( pInfoObj[w] == 0 );
-        // skip ROs with constant representatives
-        if ( Gia_ObjIsConst0(pRepr) )
-            continue;
-        assert( Gia_ObjIsRo(p, pRepr) );
-//        printf( "%d -> %d    ", i, Gia_ObjId(p, pRepr) );
-        // transfer info from the representative
-        pInfoRepr = Vec_PtrEntry( vInfo, Gia_ObjCioId(pRepr) - Gia_ManPiNum(p) );
-        for ( w = 0; w < nWords; w++ )
-            pInfoObj[w] = pInfoRepr[w];
-    }
-//    printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects information about remapping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Gia_ManCorrCreateRemapping( Gia_Man_t * p )
-{
-    Vec_Int_t * vPairs;
-    Gia_Obj_t * pObj, * pRepr;
-    int i;
-    vPairs = Vec_IntAlloc( 100 );
-    Gia_ManForEachRo( p, pObj, i )
-    {
-        // skip ROs without representatives
-        pRepr = Gia_ObjReprObj( p, Gia_ObjId(p,pObj) );
-        if ( pRepr == NULL || Gia_ObjIsConst0(pRepr) || Gia_ObjFailed(p, Gia_ObjId(p,pObj)) )
-//        if ( pRepr == NULL || Gia_ObjIsConst0(pRepr) || Gia_ObjIsFailedPair(p, Gia_ObjId(p, pRepr), Gia_ObjId(p, pObj)) )
-            continue;
-        assert( Gia_ObjIsRo(p, pRepr) );
-//        printf( "%d -> %d    ", Gia_ObjId(p,pObj), Gia_ObjId(p, pRepr) );
-        // remember the pair
-        Vec_IntPush( vPairs, Gia_ObjCioId(pRepr) - Gia_ManPiNum(p) );
-        Vec_IntPush( vPairs, i );
-    }
-    return vPairs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Remaps simulation info from SRM to the original AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Gia_ManCorrPerformRemapping( Vec_Int_t * vPairs, Vec_Ptr_t * vInfo, int * pInitState )
-{
-    unsigned * pInfoObj, * pInfoRepr;
-    int w, i, iObj, iRepr, nWords;
-    nWords = Vec_PtrReadWordsSimInfo( vInfo );
-    Vec_IntForEachEntry( vPairs, iRepr, i )
-    {
-        iObj = Vec_IntEntry( vPairs, ++i );
-        pInfoObj = Vec_PtrEntry( vInfo, iObj );
-        pInfoRepr = Vec_PtrEntry( vInfo, iRepr );
-        for ( w = 0; w < nWords; w++ )
-        {
-            assert( pInitState || pInfoObj[w] == 0 );
-            pInfoObj[w] = pInfoRepr[w];
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Packs one counter-examples into the array of simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-*************************************`**********************************/
-int Cec_ManLoadCounterExamplesTry( Vec_Ptr_t * vInfo, Vec_Ptr_t * vPres, int iBit, int * pLits, int nLits )
-{
-    unsigned * pInfo, * pPres;
-    int i;
-    for ( i = 0; i < nLits; i++ )
-    {
-        pInfo = Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
-        pPres = Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
-        if ( Gia_InfoHasBit( pPres, iBit ) && 
-             Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
-             return 0;
-    }
-    for ( i = 0; i < nLits; i++ )
-    {
-        pInfo = Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
-        pPres = Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
-        Gia_InfoSetBit( pPres, iBit );
-        if ( Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
-            Gia_InfoXorBit( pInfo, iBit );
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs bitpacking of counter-examples.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManLoadCounterExamples( Vec_Ptr_t * vInfo, Vec_Int_t * vCexStore, int iStart )
-{ 
-    Vec_Int_t * vPat;
-    Vec_Ptr_t * vPres;
-    int nWords = Vec_PtrReadWordsSimInfo(vInfo);
-    int nBits = 32 * nWords; 
-    int k, nSize, iBit = 1, kMax = 0;
-    vPat  = Vec_IntAlloc( 100 );
-    vPres = Vec_PtrAllocSimInfo( Vec_PtrSize(vInfo), nWords );
-    Vec_PtrCleanSimInfo( vPres, 0, nWords );
-    while ( iStart < Vec_IntSize(vCexStore) )
-    {
-        // skip the output number
-        iStart++;
-        // get the number of items
-        nSize = Vec_IntEntry( vCexStore, iStart++ );
-        if ( nSize <= 0 )
-            continue;
-        // extract pattern
-        Vec_IntClear( vPat );
-        for ( k = 0; k < nSize; k++ )
-            Vec_IntPush( vPat, Vec_IntEntry( vCexStore, iStart++ ) );
-        // add pattern to storage
-        for ( k = 1; k < nBits; k++ )
-            if ( Cec_ManLoadCounterExamplesTry( vInfo, vPres, k, (int *)Vec_IntArray(vPat), Vec_IntSize(vPat) ) )
-                break;
-        kMax = ABC_MAX( kMax, k );
-        if ( k == nBits-1 )
-            break;
-    }
-    Vec_PtrFree( vPres );
-    Vec_IntFree( vPat );
-    return iStart;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs bitpacking of counter-examples.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManLoadCounterExamples2( Vec_Ptr_t * vInfo, Vec_Int_t * vCexStore, int iStart )
-{ 
-    unsigned * pInfo;
-    int nBits = 32 * Vec_PtrReadWordsSimInfo(vInfo); 
-    int k, iLit, nLits, Out, iBit = 1;
-    while ( iStart < Vec_IntSize(vCexStore) )
-    {
-        // skip the output number
-//        iStart++;
-        Out = Vec_IntEntry( vCexStore, iStart++ );
-//        printf( "iBit = %d. Out = %d.\n", iBit, Out );
-        // get the number of items
-        nLits = Vec_IntEntry( vCexStore, iStart++ );
-        if ( nLits <= 0 )
-            continue;
-        // add pattern to storage
-        for ( k = 0; k < nLits; k++ )
-        {
-            iLit = Vec_IntEntry( vCexStore, iStart++ );
-            pInfo = Vec_PtrEntry( vInfo, Gia_Lit2Var(iLit) );
-            if ( Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(iLit) )
-                Gia_InfoXorBit( pInfo, iBit );
-        }
-        if ( ++iBit == nBits )
-            break;
-    }
-//    printf( "added %d bits\n", iBit-1 );
-    return iStart;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resimulates counter-examples derived by the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManResimulateCounterExamples( Cec_ManSim_t * pSim, Vec_Int_t * vCexStore, int nFrames, int * pInitState )
-{ 
-    Vec_Int_t * vPairs;
-    Vec_Ptr_t * vSimInfo; 
-    int RetValue = 0, iStart = 0;
-    vPairs = Gia_ManCorrCreateRemapping( pSim->pAig );
-    Gia_ManSetRefs( pSim->pAig );
-//    pSim->pPars->nWords  = 63;
-    pSim->pPars->nRounds = nFrames;
-    vSimInfo = Vec_PtrAllocSimInfo( Gia_ManRegNum(pSim->pAig) + Gia_ManPiNum(pSim->pAig) * nFrames, pSim->pPars->nWords );
-    while ( iStart < Vec_IntSize(vCexStore) )
-    {
-        Cec_ManStartSimInfo( vSimInfo, Gia_ManRegNum(pSim->pAig), pInitState );
-        iStart = Cec_ManLoadCounterExamples( vSimInfo, vCexStore, iStart );
-//        iStart = Cec_ManLoadCounterExamples2( vSimInfo, vCexStore, iStart );
-//        Gia_ManCorrRemapSimInfo( pSim->pAig, vSimInfo );
-        Gia_ManCorrPerformRemapping( vPairs, vSimInfo, pInitState );
-        RetValue |= Cec_ManSeqResimulate( pSim, vSimInfo );
-//        Cec_ManSeqResimulateInfo( pSim->pAig, vSimInfo, NULL );
-    }
-//Gia_ManEquivPrintOne( pSim->pAig, 85, 0 );
-    assert( iStart == Vec_IntSize(vCexStore) );
-    Vec_PtrFree( vSimInfo );
-    Vec_IntFree( vPairs );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resimulates counter-examples derived by the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManResimulateCounterExamplesComb( Cec_ManSim_t * pSim, Vec_Int_t * vCexStore )
-{ 
-    Vec_Ptr_t * vSimInfo; 
-    int RetValue = 0, iStart = 0;
-    Gia_ManSetRefs( pSim->pAig );
-    pSim->pPars->nRounds = 1;
-    vSimInfo = Vec_PtrAllocSimInfo( Gia_ManCiNum(pSim->pAig), pSim->pPars->nWords );
-    while ( iStart < Vec_IntSize(vCexStore) )
-    {
-        Cec_ManStartSimInfo( vSimInfo, 0, NULL );
-        iStart = Cec_ManLoadCounterExamples( vSimInfo, vCexStore, iStart );
-        RetValue |= Cec_ManSeqResimulate( pSim, vSimInfo );
-    }
-    assert( iStart == Vec_IntSize(vCexStore) );
-    Vec_PtrFree( vSimInfo );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates equivalence classes by marking those that timed out.]
-
-  Description [Returns 1 if all ndoes are proved.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Gia_ManCheckRefinements( Gia_Man_t * p, Vec_Str_t * vStatus, Vec_Int_t * vOutputs, Cec_ManSim_t * pSim, int fRings )
-{
-    int i, status, iRepr, iObj;
-    int Counter = 0;
-    assert( 2 * Vec_StrSize(vStatus) == Vec_IntSize(vOutputs) );
-    Vec_StrForEachEntry( vStatus, status, i )
-    {
-        iRepr = Vec_IntEntry( vOutputs, 2*i );
-        iObj  = Vec_IntEntry( vOutputs, 2*i+1 );
-        if ( status == 1 )
-            continue;
-        if ( status == 0 )
-        {
-            if ( Gia_ObjHasSameRepr(p, iRepr, iObj) )
-                Counter++;
-//            if ( Gia_ObjHasSameRepr(p, iRepr, iObj) )
-//                printf( "Gia_ManCheckRefinements(): Disproved equivalence (%d,%d) is not refined!\n", iRepr, iObj );
-//            if ( Gia_ObjHasSameRepr(p, iRepr, iObj) )
-//                Cec_ManSimClassRemoveOne( pSim, iObj );
-            continue;
-        }
-        if ( status == -1 )
-        {
-//            if ( !Gia_ObjFailed( p, iObj ) )
-//                printf( "Gia_ManCheckRefinements(): Failed equivalence is not marked as failed!\n" );
-//            Gia_ObjSetFailed( p, iRepr );
-//            Gia_ObjSetFailed( p, iObj );        
-//            if ( fRings )
-//            Cec_ManSimClassRemoveOne( pSim, iRepr );
-            Cec_ManSimClassRemoveOne( pSim, iObj );
-            continue;
-        }
-    }
-//    if ( Counter )
-//    printf( "Gia_ManCheckRefinements(): Could not refine %d nodes.\n", Counter );
-    return 1;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates the AIG in the DFS order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Gia_ManCorrReduce_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj )
-{
-    Gia_Obj_t * pRepr;
-    if ( (pRepr = Gia_ObjReprObj(p, Gia_ObjId(p, pObj))) )
-    {
-        Gia_ManCorrReduce_rec( pNew, p, pRepr );
-        pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
-        return;
-    }
-    if ( ~pObj->Value )
-        return;
-    assert( Gia_ObjIsAnd(pObj) );
-    Gia_ManCorrReduce_rec( pNew, p, Gia_ObjFanin0(pObj) );
-    Gia_ManCorrReduce_rec( pNew, p, Gia_ObjFanin1(pObj) );
-    pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reduces AIG using equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Gia_ManCorrReduce( Gia_Man_t * p )
-{
-    Gia_Man_t * pNew;
-    Gia_Obj_t * pObj;
-    int i;
-    Gia_ManSetPhase( p );
-    pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
-    Gia_ManFillValue( p );
-    Gia_ManConst0(p)->Value = 0;
-    Gia_ManForEachCi( p, pObj, i )
-        pObj->Value = Gia_ManAppendCi(pNew);
-    Gia_ManHashAlloc( pNew );
-    Gia_ManForEachCo( p, pObj, i )
-        Gia_ManCorrReduce_rec( pNew, p, Gia_ObjFanin0(pObj) );
-    Gia_ManForEachCo( p, pObj, i )
-        Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
-    Gia_ManHashStop( pNew );
-    Gia_ManSetRegNum( pNew, Gia_ManRegNum(p) );
-    return pNew;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Prints statistics during solving.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManRefinedClassPrintStats( Gia_Man_t * p, Vec_Str_t * vStatus, int iIter, int Time )
-{ 
-    int nLits, CounterX = 0, Counter0 = 0, Counter = 0;
-    int i, Entry, nProve = 0, nDispr = 0, nFail = 0;
-    for ( i = 1; i < Gia_ManObjNum(p); i++ )
-    {
-        if ( Gia_ObjIsNone(p, i) )
-            CounterX++;
-        else if ( Gia_ObjIsConst(p, i) )
-            Counter0++;
-        else if ( Gia_ObjIsHead(p, i) )
-            Counter++;
-    }
-    CounterX -= Gia_ManCoNum(p);
-    nLits = Gia_ManCiNum(p) + Gia_ManAndNum(p) - Counter - CounterX;
-    if ( iIter == -1 )
-        printf( "BMC : " );
-    else
-        printf( "%3d : ", iIter );
-    printf( "c =%8d  cl =%7d  lit =%8d  ", Counter0, Counter, nLits );
-    if ( vStatus )
-    Vec_StrForEachEntry( vStatus, Entry, i )
-    {
-        if ( Entry == 1 )
-            nProve++;
-        else if ( Entry == 0 )
-            nDispr++;
-        else if ( Entry == -1 )
-            nFail++;
-    }
-    printf( "p =%6d  d =%6d  f =%6d  ", nProve, nDispr, nFail );
-    ABC_PRT( "T", Time );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes new initial state.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Cec_ManComputeInitState( Gia_Man_t * pAig, int nFrames )
-{  
-    Gia_Obj_t * pObj, * pObjRo, * pObjRi;
-    unsigned * pInitState;
-    int i, f; 
-    printf( "Simulating %d timeframes.\n", nFrames );
-    Gia_ManForEachRo( pAig, pObj, i )
-        pObj->fMark1 = 0;
-    for ( f = 0; f < nFrames; f++ )
-    {
-        Gia_ManConst0(pAig)->fMark1 = 0;
-        Gia_ManForEachPi( pAig, pObj, i )
-            pObj->fMark1 = Gia_ManRandom(0) & 1;
-//            pObj->fMark1 = 1;
-        Gia_ManForEachAnd( pAig, pObj, i )
-            pObj->fMark1 = (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj)) & 
-                (Gia_ObjFanin1(pObj)->fMark1 ^ Gia_ObjFaninC1(pObj));
-        Gia_ManForEachRi( pAig, pObj, i )
-            pObj->fMark1 = (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj));
-        Gia_ManForEachRiRo( pAig, pObjRi, pObjRo, i )
-            pObjRo->fMark1 = pObjRi->fMark1;
-    }
-    pInitState = ABC_CALLOC( unsigned, Gia_BitWordNum(Gia_ManRegNum(pAig)) );
-    Gia_ManForEachRo( pAig, pObj, i )
-    {
-        if ( pObj->fMark1 )
-            Gia_InfoSetBit( pInitState, i );
-//        printf( "%d", pObj->fMark1 );
-    }
-//    printf( "\n" );
-    Gia_ManCleanMark1( pAig );
-    return pInitState;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Internal procedure for register correspondence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManLSCorrespondenceClasses( Gia_Man_t * pAig, Cec_ParCor_t * pPars )
-{  
-    int nIterMax = 100000;
-    int nAddFrames = 1; // additional timeframes to simulate
-    Vec_Str_t * vStatus;
-    Vec_Int_t * vOutputs;
-    Vec_Int_t * vCexStore;
-    Cec_ParSim_t ParsSim, * pParsSim = &ParsSim;
-    Cec_ParSat_t ParsSat, * pParsSat = &ParsSat;
-    Cec_ManSim_t * pSim;
-    Gia_Man_t * pSrm;
-    unsigned * pInitState = NULL;
-    int r, RetValue, clkTotal = clock();
-    int clkSat = 0, clkSim = 0, clkSrm = 0;
-    int clk2, clk = clock();
-    ABC_FREE( pAig->pReprs );
-    ABC_FREE( pAig->pNexts );
-    if ( Gia_ManRegNum(pAig) == 0 )
-    {
-        printf( "Cec_ManLatchCorrespondence(): Not a sequential AIG.\n" );
-        return 0;
-    }
-    Gia_ManRandom( 1 );
-    // derive initial state for resimulation
-    if ( pPars->nPrefix )
-//        pInitState = Cec_ManComputeInitState( pAig, 5+(1<<20)/Gia_ManAndNum(pAig) );
-        pInitState = Cec_ManComputeInitState( pAig, 100 );
-    // prepare simulation manager
-    Cec_ManSimSetDefaultParams( pParsSim );
-    pParsSim->nWords     = pPars->nWords;
-    pParsSim->nRounds    = pPars->nRounds;
-    pParsSim->fVerbose   = pPars->fVerbose;
-    pParsSim->fLatchCorr = pPars->fLatchCorr;
-    pParsSim->fSeqSimulate = 1;
-    // create equivalence classes of registers
-    pSim = Cec_ManSimStart( pAig, pParsSim, pInitState );
-    Cec_ManSimClassesPrepare( pSim );
-    Cec_ManSimClassesRefine( pSim );
-    // prepare SAT solving
-    Cec_ManSatSetDefaultParams( pParsSat );
-    pParsSat->nBTLimit = pPars->nBTLimit;
-    pParsSat->fVerbose = pPars->fVerbose;
-    if ( pPars->fVerbose )
-    {
-        printf( "Obj = %7d. And = %7d. Conf = %5d. Fr = %d. Lcorr = %d. Ring = %d. CSat = %d.\n",
-            Gia_ManObjNum(pAig), Gia_ManAndNum(pAig), 
-            pPars->nBTLimit, pPars->nFrames, pPars->fLatchCorr, pPars->fUseRings, pPars->fUseCSat );
-        Cec_ManRefinedClassPrintStats( pAig, NULL, 0, clock() - clk );
-    }
-    // perform refinement of equivalence classes
-    for ( r = 0; r < nIterMax; r++ )
-    { 
-        clk = clock();
-        // perform speculative reduction
-        clk2 = clock();
-        pSrm = Gia_ManCorrSpecReduce( pAig, pPars->nFrames, !pPars->fLatchCorr, &vOutputs, pPars->fUseRings );
-        assert( Gia_ManRegNum(pSrm) == 0 && Gia_ManPiNum(pSrm) == Gia_ManRegNum(pAig)+(pPars->nFrames+!pPars->fLatchCorr)*Gia_ManPiNum(pAig) );
-        clkSrm += clock() - clk2;
-        if ( Gia_ManCoNum(pSrm) == 0 )
-        {
-            Vec_IntFree( vOutputs );
-            Gia_ManStop( pSrm );            
-            break;
-        }
-//Gia_DumpAiger( pSrm, "corrsrm", r, 2 );
-        // found counter-examples to speculation
-        clk2 = clock();
-        if ( pPars->fUseCSat )
-            vCexStore = Cbs_ManSolveMiterNc( pSrm, pPars->nBTLimit, &vStatus, 0 );
-        else
-            vCexStore = Cec_ManSatSolveMiter( pSrm, pParsSat, &vStatus );
-        Gia_ManStop( pSrm );
-        clkSat += clock() - clk2;
-        if ( Vec_IntSize(vCexStore) == 0 )
-        {
-            Vec_IntFree( vCexStore );
-            Vec_StrFree( vStatus );
-            Vec_IntFree( vOutputs );
-            break;
-        }
-        // refine classes with these counter-examples
-        clk2 = clock();
-        RetValue = Cec_ManResimulateCounterExamples( pSim, vCexStore, pPars->nFrames + 1 + nAddFrames, pInitState );
-        Vec_IntFree( vCexStore );
-        clkSim += clock() - clk2;
-        Gia_ManCheckRefinements( pAig, vStatus, vOutputs, pSim, pPars->fUseRings );
-        if ( pPars->fVerbose )
-            Cec_ManRefinedClassPrintStats( pAig, vStatus, r+1, clock() - clk );
-        Vec_StrFree( vStatus );
-        Vec_IntFree( vOutputs );
-//Gia_ManEquivPrintClasses( pAig, 1, 0 );
-    }
-    ABC_FREE( pInitState );
-    // check the base case
-    if ( (!pPars->fLatchCorr || pPars->nFrames > 1) || pPars->nPrefix )
-    {
-        int fChanges = 1;
-        while ( fChanges )
-        {
-            int clkBmc = clock();
-            fChanges = 0;
-            pSrm = Gia_ManCorrSpecReduceInit( pAig, pPars->nFrames, pPars->nPrefix, !pPars->fLatchCorr, &vOutputs, pPars->fUseRings );
-            if ( Gia_ManPoNum(pSrm) == 0 )
-            {
-                Gia_ManStop( pSrm );
-                Vec_IntFree( vOutputs );
-                break;
-            }
-            pParsSat->nBTLimit *= 10;
-            if ( pPars->nPrefix )
-            {
-                pParsSat->nBTLimit = 10000;
-                vCexStore = Cec_ManSatSolveMiter( pSrm, pParsSat, &vStatus );
-            }
-            else if ( pPars->fUseCSat )
-                vCexStore = Cbs_ManSolveMiterNc( pSrm, pPars->nBTLimit, &vStatus, 0 );
-            else
-                vCexStore = Cec_ManSatSolveMiter( pSrm, pParsSat, &vStatus );
-            // refine classes with these counter-examples
-            if ( Vec_IntSize(vCexStore) )
-            {
-                clk2 = clock();
-                RetValue = Cec_ManResimulateCounterExamples( pSim, vCexStore, pPars->nFrames + 1 + nAddFrames + pPars->nPrefix, NULL );
-                clkSim += clock() - clk2;
-                Gia_ManCheckRefinements( pAig, vStatus, vOutputs, pSim, pPars->fUseRings );
-                fChanges = 1;
-            }
-            if ( pPars->fVerbose )
-                Cec_ManRefinedClassPrintStats( pAig, vStatus, -1, clock() - clkBmc );
-            // recycle
-            Vec_IntFree( vCexStore );
-            Vec_StrFree( vStatus );
-            Gia_ManStop( pSrm );
-            Vec_IntFree( vOutputs );
-        }
-    }
-    else
-    {
-        if ( pPars->fVerbose )
-            Cec_ManRefinedClassPrintStats( pAig, NULL, r+1, clock() - clk );
-    }
-    // check the overflow
-    if ( r == nIterMax )
-        printf( "The refinement was not finished. The result may be incorrect.\n" );
-    Cec_ManSimStop( pSim );
-    clkTotal = clock() - clkTotal;
-    // report the results
-    if ( pPars->fVerbose )
-    {
-        ABC_PRTP( "Srm  ", clkSrm,                        clkTotal );
-        ABC_PRTP( "Sat  ", clkSat,                        clkTotal );
-        ABC_PRTP( "Sim  ", clkSim,                        clkTotal );
-        ABC_PRTP( "Other", clkTotal-clkSat-clkSrm-clkSim, clkTotal );
-        ABC_PRT( "TOTAL",  clkTotal );
-    }
-    return 1;
-}    
-
-/**Function*************************************************************
-
-  Synopsis    [Top-level procedure for register correspondence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Cec_ManLSCorrespondence( Gia_Man_t * pAig, Cec_ParCor_t * pPars )
-{  
-    Gia_Man_t * pNew, * pTemp;
-    int RetValue;
-    RetValue = Cec_ManLSCorrespondenceClasses( pAig, pPars );
-    // derive reduced AIG
-    if ( pPars->fMakeChoices )
-    {
-        pNew = Gia_ManEquivToChoices( pAig, 1 );
-        Gia_ManHasChoices( pNew );
-    }
-    else
-    {
-        Gia_ManEquivImprove( pAig );
-        pNew = Gia_ManCorrReduce( pAig );
-        pNew = Gia_ManSeqCleanup( pTemp = pNew );
-        Gia_ManStop( pTemp );
-        //Gia_WriteAiger( pNew, "reduced.aig", 0, 0 );
-    }
-    // report the results
-    if ( pPars->fVerbose )
-    {
-        printf( "NBeg = %d. NEnd = %d. (Gain = %6.2f %%).  RBeg = %d. REnd = %d. (Gain = %6.2f %%).\n", 
-            Gia_ManAndNum(pAig), Gia_ManAndNum(pNew), 
-            100.0*(Gia_ManAndNum(pAig)-Gia_ManAndNum(pNew))/(Gia_ManAndNum(pAig)?Gia_ManAndNum(pAig):1), 
-            Gia_ManRegNum(pAig), Gia_ManRegNum(pNew), 
-            100.0*(Gia_ManRegNum(pAig)-Gia_ManRegNum(pNew))/(Gia_ManRegNum(pAig)?Gia_ManRegNum(pAig):1) );
-    }
-    return pNew;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cecInt.h b/src/aig/cec/cecInt.h
deleted file mode 100644
index 6216eae2..00000000
--- a/src/aig/cec/cecInt.h
+++ /dev/null
@@ -1,225 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecInt.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecInt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __CEC_INT_H__
-#define __CEC_INT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include "satSolver.h"
-#include "bar.h"
-#include "gia.h"
-#include "cec.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-// simulation pattern manager
-typedef struct Cec_ManPat_t_ Cec_ManPat_t;
-struct Cec_ManPat_t_
-{
-    Vec_Int_t *      vPattern1;      // pattern in terms of primary inputs
-    Vec_Int_t *      vPattern2;      // pattern in terms of primary inputs
-    Vec_Str_t *      vStorage;       // storage for compressed patterns
-    int              iStart;         // position in the array where recent patterns begin
-    int              nPats;          // total number of recent patterns
-    int              nPatsAll;       // total number of all patterns
-    int              nPatLits;       // total number of literals in recent patterns
-    int              nPatLitsAll;    // total number of literals in all patterns
-    int              nPatLitsMin;    // total number of literals in minimized recent patterns
-    int              nPatLitsMinAll; // total number of literals in minimized all patterns
-    int              nSeries;        // simulation series
-    int              fVerbose;       // verbose stats
-    // runtime statistics
-    int              timeFind;       // detecting the pattern  
-    int              timeShrink;     // minimizing the pattern
-    int              timeVerify;     // verifying the result of minimisation
-    int              timeSort;       // sorting literals 
-    int              timePack;       // packing into sim info structures 
-    int              timeTotal;      // total runtime  
-    int              timeTotalSave;  // total runtime for saving  
-};
-
-// SAT solving manager
-typedef struct Cec_ManSat_t_ Cec_ManSat_t;
-struct Cec_ManSat_t_
-{
-    // parameters
-    Cec_ParSat_t *   pPars;          
-    // AIGs used in the package
-    Gia_Man_t *      pAig;           // the AIG whose outputs are considered
-    Vec_Int_t *      vStatus;        // status for each output
-    // SAT solving
-    sat_solver *     pSat;           // recyclable SAT solver
-    int              nSatVars;       // the counter of SAT variables
-    int *            pSatVars;       // mapping of each node into its SAT var
-    Vec_Ptr_t *      vUsedNodes;     // nodes whose SAT vars are assigned
-    int              nRecycles;      // the number of times SAT solver was recycled
-    int              nCallsSince;    // the number of calls since the last recycle
-    Vec_Ptr_t *      vFanins;        // fanins of the CNF node
-    // counter-examples
-    Vec_Int_t *      vCex;           // the latest counter-example
-    Vec_Int_t *      vVisits;        // temporary array for visited nodes  
-    // SAT calls statistics
-    int              nSatUnsat;      // the number of proofs
-    int              nSatSat;        // the number of failure
-    int              nSatUndec;      // the number of timeouts
-    int              nSatTotal;      // the number of calls
-    int              nCexLits;
-    // conflicts
-    int              nConfUnsat;     // conflicts in unsat problems
-    int              nConfSat;       // conflicts in sat problems
-    int              nConfUndec;     // conflicts in undec problems
-    // runtime stats
-    int              timeSatUnsat;   // unsat
-    int              timeSatSat;     // sat
-    int              timeSatUndec;   // undecided
-    int              timeTotal;      // total runtime
-};
-
-// combinational simulation manager
-typedef struct Cec_ManSim_t_ Cec_ManSim_t;
-struct Cec_ManSim_t_
-{
-    // parameters
-    Gia_Man_t *      pAig;           // the AIG to be used for simulation
-    Cec_ParSim_t *   pPars;          // simulation parameters 
-    int              nWords;         // the number of simulation words
-    // recycable memory
-    int *            pSimInfo;       // simulation information offsets
-    unsigned *       pMems;          // allocated simulaton memory
-    int              nWordsAlloc;    // the number of allocated entries
-    int              nMems;          // the number of used entries  
-    int              nMemsMax;       // the max number of used entries 
-    int              MemFree;        // next free entry
-    int              nWordsOld;      // the number of simulation words after previous relink
-    // internal simulation info
-    Vec_Ptr_t *      vCiSimInfo;     // CI simulation info  
-    Vec_Ptr_t *      vCoSimInfo;     // CO simulation info  
-    // counter examples
-    void **          pCexes;         // counter-examples for each output
-    int              iOut;           // first failed output
-    int              nOuts;          // the number of failed outputs
-    Abc_Cex_t *      pCexComb;       // counter-example for the first failed output
-    Abc_Cex_t *      pBestState;     // the state that led to most of the refinements
-    // scoring simulation patterns
-    int *            pScores;        // counters of refinement for each pattern
-    // temporaries
-    Vec_Int_t *      vClassOld;      // old class numbers
-    Vec_Int_t *      vClassNew;      // new class numbers
-    Vec_Int_t *      vClassTemp;     // temporary storage
-    Vec_Int_t *      vRefinedC;      // refined const reprs
-};
-
-// combinational simulation manager
-typedef struct Cec_ManFra_t_ Cec_ManFra_t;
-struct Cec_ManFra_t_
-{
-    // parameters
-    Gia_Man_t *      pAig;           // the AIG to be used for simulation
-    Cec_ParFra_t *   pPars;          // SAT sweeping parameters 
-    // simulation patterns
-    Vec_Int_t *      vXorNodes;      // nodes used in speculative reduction
-    int              nAllProved;     // total number of proved nodes
-    int              nAllDisproved;  // total number of disproved nodes
-    int              nAllFailed;     // total number of failed nodes
-    // runtime stats
-    int              timeSim;        // unsat
-    int              timePat;        // unsat
-    int              timeSat;        // sat
-    int              timeTotal;      // total runtime
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== cecCorr.c ============================================================*/
-extern void                 Cec_ManRefinedClassPrintStats( Gia_Man_t * p, Vec_Str_t * vStatus, int iIter, int Time );
-/*=== cecClass.c ============================================================*/
-extern int                  Cec_ManSimClassRemoveOne( Cec_ManSim_t * p, int i );
-extern int                  Cec_ManSimClassesPrepare( Cec_ManSim_t * p, int LevelMax );
-extern int                  Cec_ManSimClassesRefine( Cec_ManSim_t * p );
-extern int                  Cec_ManSimSimulateRound( Cec_ManSim_t * p, Vec_Ptr_t * vInfoCis, Vec_Ptr_t * vInfoCos );
-/*=== cecIso.c ============================================================*/
-extern int *                Cec_ManDetectIsomorphism( Gia_Man_t * p );
-/*=== cecMan.c ============================================================*/
-extern Cec_ManSat_t *       Cec_ManSatCreate( Gia_Man_t * pAig, Cec_ParSat_t * pPars );
-extern void                 Cec_ManSatPrintStats( Cec_ManSat_t * p );
-extern void                 Cec_ManSatStop( Cec_ManSat_t * p );
-extern Cec_ManPat_t *       Cec_ManPatStart();
-extern void                 Cec_ManPatPrintStats( Cec_ManPat_t * p );
-extern void                 Cec_ManPatStop( Cec_ManPat_t * p );
-extern Cec_ManSim_t *       Cec_ManSimStart( Gia_Man_t * pAig, Cec_ParSim_t *  pPars ); 
-extern void                 Cec_ManSimStop( Cec_ManSim_t * p );  
-extern Cec_ManFra_t *       Cec_ManFraStart( Gia_Man_t * pAig, Cec_ParFra_t *  pPars );  
-extern void                 Cec_ManFraStop( Cec_ManFra_t * p );
-/*=== cecPat.c ============================================================*/
-extern void                 Cec_ManPatSavePattern( Cec_ManPat_t *  pPat, Cec_ManSat_t *  p, Gia_Obj_t * pObj );
-extern Vec_Ptr_t *          Cec_ManPatCollectPatterns( Cec_ManPat_t *  pMan, int nInputs, int nWords );
-extern Vec_Ptr_t *          Cec_ManPatPackPatterns( Vec_Int_t * vCexStore, int nInputs, int nRegs, int nWordsInit );
-/*=== cecSeq.c ============================================================*/
-extern int                  Cec_ManSeqResimulate( Cec_ManSim_t * p, Vec_Ptr_t * vInfo );
-extern int                  Cec_ManSeqResimulateInfo( Gia_Man_t * pAig, Vec_Ptr_t * vSimInfo, Abc_Cex_t * pBestState, int fCheckMiter );
-extern void                 Cec_ManSeqDeriveInfoInitRandom( Vec_Ptr_t * vInfo, Gia_Man_t * pAig, Abc_Cex_t * pCex );
-extern int                  Cec_ManCountNonConstOutputs( Gia_Man_t * pAig );
-extern int                  Cec_ManCheckNonTrivialCands( Gia_Man_t * pAig );
-/*=== cecSolve.c ============================================================*/
-extern int                  Cec_ObjSatVarValue( Cec_ManSat_t * p, Gia_Obj_t * pObj );
-extern void                 Cec_ManSatSolve( Cec_ManPat_t * pPat, Gia_Man_t * pAig, Cec_ParSat_t * pPars );
-extern Vec_Str_t *          Cec_ManSatSolveSeq( Vec_Ptr_t * vPatts, Gia_Man_t * pAig, Cec_ParSat_t * pPars, int nRegs, int * pnPats );
-extern Vec_Int_t *          Cec_ManSatSolveMiter( Gia_Man_t * pAig, Cec_ParSat_t * pPars, Vec_Str_t ** pvStatus );
-extern int                  Cec_ManSatCheckNode( Cec_ManSat_t * p, Gia_Obj_t * pObj );
-extern int                  Cec_ManSatCheckNodeTwo( Cec_ManSat_t * p, Gia_Obj_t * pObj1, Gia_Obj_t * pObj2 );
-extern void                 Cec_ManSavePattern( Cec_ManSat_t * p, Gia_Obj_t * pObj1, Gia_Obj_t * pObj2 );
-extern Vec_Int_t *          Cec_ManSatReadCex( Cec_ManSat_t * p );
-/*=== ceFraeep.c ============================================================*/
-extern Gia_Man_t *          Cec_ManFraSpecReduction( Cec_ManFra_t * p );
-extern int                  Cec_ManFraClassesUpdate( Cec_ManFra_t * p, Cec_ManSim_t * pSim, Cec_ManPat_t * pPat, Gia_Man_t * pNew );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/cec/cecIso.c b/src/aig/cec/cecIso.c
deleted file mode 100644
index ec237fe5..00000000
--- a/src/aig/cec/cecIso.c
+++ /dev/null
@@ -1,375 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecIso.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [Detection of structural isomorphism.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecIso.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static inline unsigned * Cec_ManIsoInfo( unsigned * pStore, int nWords, int Id ) { return pStore + nWords * Id; }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Computes simulation info for one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Gia_ManIsoSimulate( Gia_Obj_t * pObj, int Id, unsigned * pStore, int nWords )
-{
-    unsigned * pInfo  = Cec_ManIsoInfo( pStore, nWords, Id );
-    unsigned * pInfo0 = Cec_ManIsoInfo( pStore, nWords, Gia_ObjFaninId0(pObj, Id) );
-    unsigned * pInfo1 = Cec_ManIsoInfo( pStore, nWords, Gia_ObjFaninId1(pObj, Id) );
-    int w;
-    if ( Gia_ObjFaninC0(pObj) )
-    {
-        if (  Gia_ObjFaninC1(pObj) )
-            for ( w = 0; w < nWords; w++ )
-                pInfo[w] = ~(pInfo0[w] | pInfo1[w]);
-        else 
-            for ( w = 0; w < nWords; w++ )
-                pInfo[w] = ~pInfo0[w] & pInfo1[w];
-    }
-    else 
-    {
-        if (  Gia_ObjFaninC1(pObj) )
-            for ( w = 0; w < nWords; w++ )
-                pInfo[w] = pInfo0[w] & ~pInfo1[w];
-        else 
-            for ( w = 0; w < nWords; w++ )
-                pInfo[w] = pInfo0[w] & pInfo1[w];
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Copies simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Gia_ManIsoCopy( int IdDest, int IdSour, unsigned * pStore, int nWords )
-{
-    unsigned * pInfo0 = Cec_ManIsoInfo( pStore, nWords, IdDest );
-    unsigned * pInfo1 = Cec_ManIsoInfo( pStore, nWords, IdSour );
-    int w;
-    for ( w = 0; w < nWords; w++ )
-        pInfo0[w] = pInfo1[w];
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compares simulation info of two nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Gia_ManIsoEqual( int Id0, int Id1, unsigned * pStore, int nWords )
-{
-    unsigned * pInfo0 = Cec_ManIsoInfo( pStore, nWords, Id0 );
-    unsigned * pInfo1 = Cec_ManIsoInfo( pStore, nWords, Id1 );
-    int w;
-    for ( w = 0; w < nWords; w++ )
-        if ( pInfo0[w] != pInfo1[w] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Generates random simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Gia_ManIsoRandom( int Id, unsigned * pStore, int nWords )
-{
-    unsigned * pInfo0 = Cec_ManIsoInfo( pStore, nWords, Id );
-    int w;
-    for ( w = 0; w < nWords; w++ )
-        pInfo0[w] = Gia_ManRandom( 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes hash key of the simuation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Gia_ManIsoHashKey( int Id, unsigned * pStore, int nWords, int nTableSize )
-{
-    static int s_Primes[16] = { 
-        1291, 1699, 1999, 2357, 2953, 3313, 3907, 4177, 
-        4831, 5147, 5647, 6343, 6899, 7103, 7873, 8147 };
-    unsigned * pInfo0 = Cec_ManIsoInfo( pStore, nWords, Id );
-    unsigned uHash = 0;
-    int i;
-    for ( i = 0; i < nWords; i++ )
-        uHash ^= pInfo0[i] * s_Primes[i & 0xf];
-    return (int)(uHash % nTableSize);
-
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds node to the hash table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Gia_ManIsoTableAdd( Gia_Man_t * p, int Id, unsigned * pStore, int nWords, int * pTable, int nTableSize )
-{
-    Gia_Obj_t * pTemp;
-    int Key, Ent, Counter = 0, Color = Gia_ObjColors( p, Id );
-    assert( Color == 1 || Color == 2 );
-    Key = Gia_ManIsoHashKey( Id, pStore, nWords, nTableSize );
-    for ( Ent = pTable[Key],  pTemp = (Ent ?  Gia_ManObj(p, Ent) : NULL);  pTemp;
-          Ent = pTemp->Value, pTemp = (Ent ?  Gia_ManObj(p, Ent) : NULL) )
-    {
-        if ( Gia_ObjColors( p, Ent ) != Color )
-            continue;
-        if ( !Gia_ManIsoEqual( Id, Ent, pStore, nWords ) )
-            continue;
-        // found node with the same color and signature - mark it and do not add new node
-        pTemp->fMark0 = 1;
-        return;
-    }
-    // did not find the node with the same color and signature - add new node
-    pTemp = Gia_ManObj( p, Id );
-    assert( pTemp->Value == 0 );
-    assert( pTemp->fMark0 == 0 );
-    pTemp->Value = pTable[Key];
-    pTable[Key] = Id;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Extracts equivalence class candidates from one bin.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Gia_ManIsoExtractClasses( Gia_Man_t * p, int Bin, unsigned * pStore, int nWords, Vec_Int_t * vNodesA, Vec_Int_t * vNodesB )
-{
-    Gia_Obj_t * pTemp;
-    int Ent;
-    Vec_IntClear( vNodesA );
-    Vec_IntClear( vNodesB );
-    for ( Ent = Bin,          pTemp = (Ent ?  Gia_ManObj(p, Ent) : NULL);  pTemp;
-          Ent = pTemp->Value, pTemp = (Ent ?  Gia_ManObj(p, Ent) : NULL) )
-    {
-        if ( pTemp->fMark0 )
-        {
-            pTemp->fMark0 = 0;
-            continue;
-        }
-        if ( Gia_ObjColors( p, Ent ) == 1 )
-            Vec_IntPush( vNodesA, Ent );
-        else
-            Vec_IntPush( vNodesB, Ent );
-    }
-    return Vec_IntSize(vNodesA) > 0 && Vec_IntSize(vNodesB) > 0;    
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Matches nodes in the extacted classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Gia_ManIsoMatchNodes( int * pIso, unsigned * pStore, int nWords, Vec_Int_t * vNodesA, Vec_Int_t * vNodesB )
-{
-    int k0, k1, IdA, IdB;
-    Vec_IntForEachEntry( vNodesA, IdA, k0 )
-    Vec_IntForEachEntry( vNodesB, IdB, k1 )
-    {
-        if ( Gia_ManIsoEqual( IdA, IdB, pStore, nWords ) )
-        {
-            assert( pIso[IdA] == 0 );
-            assert( pIso[IdB] == 0 );
-            assert( IdA != IdB );
-            pIso[IdA] = IdB;
-            pIso[IdB] = IdA;
-            continue;
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transforms iso into equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManTransformClasses( Gia_Man_t * p )
-{
-    Gia_Obj_t * pObj;
-    int i;
-    assert( p->pReprs && p->pNexts && p->pIso );
-    memset( p->pReprs, 0, sizeof(int) * Gia_ManObjNum(p) );
-    memset( p->pNexts, 0, sizeof(int) * Gia_ManObjNum(p) );
-    Gia_ManForEachObj( p, pObj, i )
-    {
-        p->pReprs[i].iRepr = GIA_VOID;
-        if ( p->pIso[i] && p->pIso[i] < i )
-        {
-            p->pReprs[i].iRepr = p->pIso[i];
-            p->pNexts[p->pIso[i]] = i;
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds node correspondences in the miter.]
-
-  Description [Assumes that the colors are assigned.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int * Cec_ManDetectIsomorphism( Gia_Man_t * p )
-{
-    int nWords = 2;
-    Gia_Obj_t * pObj;
-    Vec_Int_t * vNodesA, * vNodesB;
-    unsigned * pStore, Counter;
-    int i, * pIso, * pTable, nTableSize;
-    // start equivalence classes
-    pIso = ABC_CALLOC( int, Gia_ManObjNum(p) );
-    Gia_ManForEachObj( p, pObj, i )
-    {
-        if ( Gia_ObjIsCo(pObj) )
-        {
-            assert( Gia_ObjColors(p, i) == 0 );
-            continue;
-        }
-        assert( Gia_ObjColors(p, i) );
-        if ( Gia_ObjColors(p, i) == 3 )
-            pIso[i] = i;
-    }
-    // start simulation info
-    pStore = ABC_ALLOC( unsigned, Gia_ManObjNum(p) * nWords );
-    // simulate and create table
-    nTableSize = Gia_PrimeCudd( 100 + Gia_ManObjNum(p)/2 );
-    pTable = ABC_CALLOC( int, nTableSize );
-    Gia_ManCleanValue( p );
-    Gia_ManForEachObj1( p, pObj, i )
-    {
-        if ( Gia_ObjIsCo(pObj) )
-            continue;
-        if ( pIso[i] == 0 ) // simulate
-            Gia_ManIsoSimulate( pObj, i, pStore, nWords );
-        else if ( pIso[i] < i ) // copy
-            Gia_ManIsoCopy( i, pIso[i], pStore, nWords );
-        else // generate
-            Gia_ManIsoRandom( i, pStore, nWords );
-        if ( pIso[i] == 0 )
-            Gia_ManIsoTableAdd( p, i, pStore, nWords, pTable, nTableSize );
-    }
-    // create equivalence classes
-    vNodesA = Vec_IntAlloc( 100 );
-    vNodesB = Vec_IntAlloc( 100 );
-    for ( i = 0; i < nTableSize; i++ )
-        if ( Gia_ManIsoExtractClasses( p, pTable[i], pStore, nWords, vNodesA, vNodesB ) )
-            Gia_ManIsoMatchNodes( pIso, pStore, nWords, vNodesA, vNodesB );
-    Vec_IntFree( vNodesA );
-    Vec_IntFree( vNodesB );
-    // collect info
-    Counter = 0;
-    Gia_ManForEachObj1( p, pObj, i )
-    {
-        Counter += (pIso[i] && pIso[i] < i);
-/*
-        if ( pIso[i] && pIso[i] < i )
-        {
-            if ( (Gia_ObjIsHead(p,pIso[i]) && Gia_ObjRepr(p,i)==pIso[i]) || 
-                 (Gia_ObjIsClass(p,pIso[i]) && Gia_ObjRepr(p,i)==Gia_ObjRepr(p,pIso[i])) )
-                 Abc_Print( 1, "1" );
-            else
-                Abc_Print( 1, "0" );
-        }
-*/
-    }
-    Abc_Print( 1, "Computed %d pairs of structurally equivalent nodes.\n", Counter );
-//    p->pIso = pIso;
-//    Cec_ManTransformClasses( p );
-
-    ABC_FREE( pTable );
-    ABC_FREE( pStore );
-    return pIso;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cecMan.c b/src/aig/cec/cecMan.c
deleted file mode 100644
index f03ec701..00000000
--- a/src/aig/cec/cecMan.c
+++ /dev/null
@@ -1,297 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [Manager procedures.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cec_ManSat_t * Cec_ManSatCreate( Gia_Man_t * pAig, Cec_ParSat_t * pPars )
-{
-    Cec_ManSat_t * p;
-    // create interpolation manager
-    p = ABC_ALLOC( Cec_ManSat_t, 1 );
-    memset( p, 0, sizeof(Cec_ManSat_t) );
-    p->pPars        = pPars;
-    p->pAig         = pAig;
-    // SAT solving
-    p->nSatVars     = 1;
-    p->pSatVars     = ABC_CALLOC( int, Gia_ManObjNum(pAig) );
-    p->vUsedNodes   = Vec_PtrAlloc( 1000 );
-    p->vFanins      = Vec_PtrAlloc( 100 );
-    p->vCex         = Vec_IntAlloc( 100 );
-    p->vVisits      = Vec_IntAlloc( 100 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints statistics of the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSatPrintStats( Cec_ManSat_t * p )
-{
-    Abc_Print( 1, "CO = %8d  ", Gia_ManCoNum(p->pAig) );
-    Abc_Print( 1, "AND = %8d  ", Gia_ManAndNum(p->pAig) );
-    Abc_Print( 1, "Conf = %5d  ", p->pPars->nBTLimit );
-    Abc_Print( 1, "MinVar = %5d  ", p->pPars->nSatVarMax );
-    Abc_Print( 1, "MinCalls = %5d\n", p->pPars->nCallsRecycle );
-    Abc_Print( 1, "Unsat calls %6d  (%6.2f %%)   Ave conf = %8.1f   ", 
-        p->nSatUnsat, p->nSatTotal? 100.0*p->nSatUnsat/p->nSatTotal : 0.0, p->nSatUnsat? 1.0*p->nConfUnsat/p->nSatUnsat :0.0 );
-    Abc_PrintTimeP( 1, "Time", p->timeSatUnsat, p->timeTotal );
-    Abc_Print( 1, "Sat   calls %6d  (%6.2f %%)   Ave conf = %8.1f   ", 
-        p->nSatSat,   p->nSatTotal? 100.0*p->nSatSat/p->nSatTotal : 0.0,   p->nSatSat? 1.0*p->nConfSat/p->nSatSat : 0.0 );
-    Abc_PrintTimeP( 1, "Time", p->timeSatSat,   p->timeTotal );
-    Abc_Print( 1, "Undef calls %6d  (%6.2f %%)   Ave conf = %8.1f   ", 
-        p->nSatUndec, p->nSatTotal? 100.0*p->nSatUndec/p->nSatTotal : 0.0, p->nSatUndec? 1.0*p->nConfUndec/p->nSatUndec : 0.0 );
-    Abc_PrintTimeP( 1, "Time", p->timeSatUndec, p->timeTotal );
-    Abc_PrintTime( 1, "Total time", p->timeTotal );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Frees the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSatStop( Cec_ManSat_t * p )
-{
-    if ( p->pSat )
-        sat_solver_delete( p->pSat );
-    Vec_IntFree( p->vCex );
-    Vec_IntFree( p->vVisits );
-    Vec_PtrFree( p->vUsedNodes );
-    Vec_PtrFree( p->vFanins );
-    ABC_FREE( p->pSatVars );
-    ABC_FREE( p );
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Creates AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cec_ManPat_t * Cec_ManPatStart()  
-{ 
-    Cec_ManPat_t * p;
-    p = ABC_CALLOC( Cec_ManPat_t, 1 );
-    p->vStorage  = Vec_StrAlloc( 1<<20 );
-    p->vPattern1 = Vec_IntAlloc( 1000 );
-    p->vPattern2 = Vec_IntAlloc( 1000 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManPatPrintStats( Cec_ManPat_t * p )  
-{ 
-    Abc_Print( 1, "Latest: P = %8d.  L = %10d.  Lm = %10d. Ave = %6.1f. MEM =%6.2f Mb\n", 
-        p->nPats, p->nPatLits, p->nPatLitsMin, 1.0 * p->nPatLitsMin/p->nPats, 
-        1.0*(Vec_StrSize(p->vStorage)-p->iStart)/(1<<20) );
-    Abc_Print( 1, "Total:  P = %8d.  L = %10d.  Lm = %10d. Ave = %6.1f. MEM =%6.2f Mb\n", 
-        p->nPatsAll, p->nPatLitsAll, p->nPatLitsMinAll, 1.0 * p->nPatLitsMinAll/p->nPatsAll, 
-        1.0*Vec_StrSize(p->vStorage)/(1<<20) );
-    Abc_PrintTimeP( 1, "Finding  ", p->timeFind,   p->timeTotal );
-    Abc_PrintTimeP( 1, "Shrinking", p->timeShrink, p->timeTotal );
-    Abc_PrintTimeP( 1, "Verifying", p->timeVerify, p->timeTotal );
-    Abc_PrintTimeP( 1, "Sorting  ", p->timeSort,   p->timeTotal );
-    Abc_PrintTimeP( 1, "Packing  ", p->timePack,   p->timeTotal );
-    Abc_PrintTime( 1, "TOTAL    ",  p->timeTotal );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deletes AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManPatStop( Cec_ManPat_t * p )  
-{
-    Vec_StrFree( p->vStorage );
-    Vec_IntFree( p->vPattern1 );
-    Vec_IntFree( p->vPattern2 );
-    ABC_FREE( p );
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Creates AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cec_ManSim_t * Cec_ManSimStart( Gia_Man_t * pAig, Cec_ParSim_t *  pPars )  
-{ 
-    Cec_ManSim_t * p;
-    p = ABC_ALLOC( Cec_ManSim_t, 1 );
-    memset( p, 0, sizeof(Cec_ManSim_t) );
-    p->pAig  = pAig;
-    p->pPars = pPars;
-    p->nWords = pPars->nWords;
-    p->pSimInfo = ABC_CALLOC( int, Gia_ManObjNum(pAig) );
-    p->vClassOld  = Vec_IntAlloc( 1000 );
-    p->vClassNew  = Vec_IntAlloc( 1000 );
-    p->vClassTemp = Vec_IntAlloc( 1000 );
-    p->vRefinedC  = Vec_IntAlloc( 10000 );
-    p->vCiSimInfo = Vec_PtrAllocSimInfo( Gia_ManCiNum(p->pAig), pPars->nWords );
-    if ( pPars->fCheckMiter || Gia_ManRegNum(p->pAig) )
-    {
-        p->vCoSimInfo = Vec_PtrAllocSimInfo( Gia_ManCoNum(p->pAig), pPars->nWords );
-        Vec_PtrCleanSimInfo( p->vCoSimInfo, 0, pPars->nWords );
-    }
-    p->iOut = -1;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deletes AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSimStop( Cec_ManSim_t * p )  
-{
-    Vec_IntFree( p->vClassOld );
-    Vec_IntFree( p->vClassNew );
-    Vec_IntFree( p->vClassTemp );
-    Vec_IntFree( p->vRefinedC );
-    if ( p->vCiSimInfo ) 
-        Vec_PtrFree( p->vCiSimInfo );
-    if ( p->vCoSimInfo ) 
-        Vec_PtrFree( p->vCoSimInfo );
-    ABC_FREE( p->pScores );
-    ABC_FREE( p->pCexComb );
-    ABC_FREE( p->pCexes );
-    ABC_FREE( p->pMems );
-    ABC_FREE( p->pSimInfo );
-    ABC_FREE( p );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Creates AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cec_ManFra_t * Cec_ManFraStart( Gia_Man_t * pAig, Cec_ParFra_t *  pPars )  
-{ 
-    Cec_ManFra_t * p;
-    p = ABC_ALLOC( Cec_ManFra_t, 1 );
-    memset( p, 0, sizeof(Cec_ManFra_t) );
-    p->pAig  = pAig;
-    p->pPars = pPars;
-    p->vXorNodes  = Vec_IntAlloc( 1000 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deletes AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManFraStop( Cec_ManFra_t * p )  
-{
-    Vec_IntFree( p->vXorNodes );
-    ABC_FREE( p );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cecPat.c b/src/aig/cec/cecPat.c
deleted file mode 100644
index 82c12ea9..00000000
--- a/src/aig/cec/cecPat.c
+++ /dev/null
@@ -1,569 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecPat.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [Simulation pattern manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecPat.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Cec_ManPatStoreNum( Cec_ManPat_t * p, int Num )
-{
-    unsigned x = (unsigned)Num;
-    assert( Num >= 0 );
-    while ( x & ~0x7f )
-    {
-        Vec_StrPush( p->vStorage, (char)((x & 0x7f) | 0x80) );
-        x >>= 7;
-    }
-    Vec_StrPush( p->vStorage, (char)x );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Cec_ManPatRestoreNum( Cec_ManPat_t * p )
-{
-    int ch, i, x = 0;
-    for ( i = 0; (ch = Vec_StrEntry(p->vStorage, p->iStart++)) & 0x80; i++ )
-        x |= (ch & 0x7f) << (7 * i);
-    return x | (ch << (7 * i));
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Cec_ManPatStore( Cec_ManPat_t * p, Vec_Int_t * vPat )
-{
-    int i, Number, NumberPrev;
-    assert( Vec_IntSize(vPat) > 0 );
-    Cec_ManPatStoreNum( p, Vec_IntSize(vPat) );
-    NumberPrev = Vec_IntEntry( vPat, 0 );
-    Cec_ManPatStoreNum( p, NumberPrev );
-    Vec_IntForEachEntryStart( vPat, Number, i, 1 )
-    {
-        assert( NumberPrev < Number );
-        Cec_ManPatStoreNum( p, Number - NumberPrev );
-        NumberPrev = Number;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Cec_ManPatRestore( Cec_ManPat_t * p, Vec_Int_t * vPat )
-{
-    int i, Size, Number;
-    Vec_IntClear( vPat );
-    Size = Cec_ManPatRestoreNum( p );
-    Number = Cec_ManPatRestoreNum( p );
-    Vec_IntPush( vPat, Number );
-    for ( i = 1; i < Size; i++ )
-    {
-        Number += Cec_ManPatRestoreNum( p );
-        Vec_IntPush( vPat, Number );
-    }
-    assert( Vec_IntSize(vPat) == Size );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Derives satisfying assignment.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManPatComputePattern_rec( Cec_ManSat_t * pSat, Gia_Man_t * p, Gia_Obj_t * pObj )
-{
-    int Counter = 0;
-    if ( Gia_ObjIsTravIdCurrent(p, pObj) )
-        return 0;
-    Gia_ObjSetTravIdCurrent(p, pObj);
-    if ( Gia_ObjIsCi(pObj) )
-    {
-        pObj->fMark1 = Cec_ObjSatVarValue( pSat, pObj );
-        return 1;
-    }
-    assert( Gia_ObjIsAnd(pObj) );
-    Counter += Cec_ManPatComputePattern_rec( pSat, p, Gia_ObjFanin0(pObj) );
-    Counter += Cec_ManPatComputePattern_rec( pSat, p, Gia_ObjFanin1(pObj) );
-    pObj->fMark1 = (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj)) & 
-                   (Gia_ObjFanin1(pObj)->fMark1 ^ Gia_ObjFaninC1(pObj));
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives satisfying assignment.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManPatComputePattern1_rec( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t * vPat )
-{
-    if ( Gia_ObjIsTravIdCurrent(p, pObj) )
-        return;
-    Gia_ObjSetTravIdCurrent(p, pObj);
-    if ( Gia_ObjIsCi(pObj) )
-    {
-        Vec_IntPush( vPat, Gia_Var2Lit( Gia_ObjCioId(pObj), pObj->fMark1==0 ) );
-        return;
-    }
-    assert( Gia_ObjIsAnd(pObj) );
-    if ( pObj->fMark1 == 1 )
-    {
-        Cec_ManPatComputePattern1_rec( p, Gia_ObjFanin0(pObj), vPat );
-        Cec_ManPatComputePattern1_rec( p, Gia_ObjFanin1(pObj), vPat );
-    }
-    else
-    {
-        assert( (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj)) == 0 ||
-                (Gia_ObjFanin1(pObj)->fMark1 ^ Gia_ObjFaninC1(pObj)) == 0 );
-        if ( (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj)) == 0 )
-            Cec_ManPatComputePattern1_rec( p, Gia_ObjFanin0(pObj), vPat );
-        else
-            Cec_ManPatComputePattern1_rec( p, Gia_ObjFanin1(pObj), vPat );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives satisfying assignment.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManPatComputePattern2_rec( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t * vPat )
-{
-    if ( Gia_ObjIsTravIdCurrent(p, pObj) )
-        return;
-    Gia_ObjSetTravIdCurrent(p, pObj);
-    if ( Gia_ObjIsCi(pObj) )
-    {
-        Vec_IntPush( vPat, Gia_Var2Lit( Gia_ObjCioId(pObj), pObj->fMark1==0 ) );
-        return;
-    }
-    assert( Gia_ObjIsAnd(pObj) );
-    if ( pObj->fMark1 == 1 )
-    {
-        Cec_ManPatComputePattern2_rec( p, Gia_ObjFanin0(pObj), vPat );
-        Cec_ManPatComputePattern2_rec( p, Gia_ObjFanin1(pObj), vPat );
-    }
-    else
-    {
-        assert( (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj)) == 0 ||
-                (Gia_ObjFanin1(pObj)->fMark1 ^ Gia_ObjFaninC1(pObj)) == 0 );
-        if ( (Gia_ObjFanin1(pObj)->fMark1 ^ Gia_ObjFaninC1(pObj)) == 0 )
-            Cec_ManPatComputePattern2_rec( p, Gia_ObjFanin1(pObj), vPat );
-        else
-            Cec_ManPatComputePattern2_rec( p, Gia_ObjFanin0(pObj), vPat );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives satisfying assignment.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManPatComputePattern3_rec( Gia_Man_t * p, Gia_Obj_t * pObj )
-{
-    int Value0, Value1, Value;
-    if ( Gia_ObjIsTravIdCurrent(p, pObj) )
-        return (pObj->fMark1 << 1) | pObj->fMark0;
-    Gia_ObjSetTravIdCurrent(p, pObj);
-    if ( Gia_ObjIsCi(pObj) )
-    {
-        pObj->fMark0 = 1;
-        pObj->fMark1 = 1;
-        return GIA_UND;
-    }
-    assert( Gia_ObjIsAnd(pObj) );
-    Value0 = Cec_ManPatComputePattern3_rec( p, Gia_ObjFanin0(pObj) );
-    Value1 = Cec_ManPatComputePattern3_rec( p, Gia_ObjFanin1(pObj) );
-    Value = Gia_XsimAndCond( Value0, Gia_ObjFaninC0(pObj), Value1, Gia_ObjFaninC1(pObj) );
-    pObj->fMark0 =  (Value & 1);
-    pObj->fMark1 = ((Value >> 1) & 1);
-    return Value;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives satisfying assignment.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManPatVerifyPattern( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t * vPat )
-{
-    Gia_Obj_t * pTemp;
-    int i, Value;
-    Gia_ManIncrementTravId( p );
-    Vec_IntForEachEntry( vPat, Value, i )
-    {
-        pTemp = Gia_ManCi( p, Gia_Lit2Var(Value) );
-//        assert( Gia_LitIsCompl(Value) != (int)pTemp->fMark1 );
-        if ( pTemp->fMark1 )
-        {
-            pTemp->fMark0 = 0;
-            pTemp->fMark1 = 1;
-        }
-        else
-        {
-            pTemp->fMark0 = 1;
-            pTemp->fMark1 = 0;
-        }
-        Gia_ObjSetTravIdCurrent( p, pTemp );
-    }
-    Value = Cec_ManPatComputePattern3_rec( p, Gia_ObjFanin0(pObj) );
-    Value = Gia_XsimNotCond( Value, Gia_ObjFaninC0(pObj) );
-    if ( Value != GIA_ONE )
-        Abc_Print( 1, "Cec_ManPatVerifyPattern(): Verification failed.\n" );
-    assert( Value == GIA_ONE );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManPatComputePattern4_rec( Gia_Man_t * p, Gia_Obj_t * pObj )
-{
-    if ( Gia_ObjIsTravIdCurrent(p, pObj) )
-        return;
-    Gia_ObjSetTravIdCurrent(p, pObj);
-    pObj->fMark0 = 0;
-    if ( Gia_ObjIsCi(pObj) )
-        return;
-    assert( Gia_ObjIsAnd(pObj) );
-    Cec_ManPatComputePattern4_rec( p, Gia_ObjFanin0(pObj) );
-    Cec_ManPatComputePattern4_rec( p, Gia_ObjFanin1(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManPatCleanMark0( Gia_Man_t * p, Gia_Obj_t * pObj )
-{
-    assert( Gia_ObjIsCo(pObj) );
-    Gia_ManIncrementTravId( p );
-    Cec_ManPatComputePattern4_rec( p, Gia_ObjFanin0(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManPatSavePattern( Cec_ManPat_t * pMan, Cec_ManSat_t *  p, Gia_Obj_t * pObj )
-{
-    Vec_Int_t * vPat;
-    int nPatLits, clk, clkTotal = clock();
-    assert( Gia_ObjIsCo(pObj) );
-    pMan->nPats++;
-    pMan->nPatsAll++;
-    // compute values in the cone of influence
-clk = clock();
-    Gia_ManIncrementTravId( p->pAig );
-    nPatLits = Cec_ManPatComputePattern_rec( p, p->pAig, Gia_ObjFanin0(pObj) );
-    assert( (Gia_ObjFanin0(pObj)->fMark1 ^ Gia_ObjFaninC0(pObj)) == 1 );
-    pMan->nPatLits += nPatLits;
-    pMan->nPatLitsAll += nPatLits;
-pMan->timeFind += clock() - clk;
-    // compute sensitizing path
-clk = clock();
-    Vec_IntClear( pMan->vPattern1 );
-    Gia_ManIncrementTravId( p->pAig );
-    Cec_ManPatComputePattern1_rec( p->pAig, Gia_ObjFanin0(pObj), pMan->vPattern1 );
-    // compute sensitizing path
-    Vec_IntClear( pMan->vPattern2 );
-    Gia_ManIncrementTravId( p->pAig );
-    Cec_ManPatComputePattern2_rec( p->pAig, Gia_ObjFanin0(pObj), pMan->vPattern2 );
-    // compare patterns
-    vPat = Vec_IntSize(pMan->vPattern1) < Vec_IntSize(pMan->vPattern2) ? pMan->vPattern1 : pMan->vPattern2;
-    pMan->nPatLitsMin += Vec_IntSize(vPat);
-    pMan->nPatLitsMinAll += Vec_IntSize(vPat);
-pMan->timeShrink += clock() - clk;
-    // verify pattern using ternary simulation
-clk = clock();
-    Cec_ManPatVerifyPattern( p->pAig, pObj, vPat );
-pMan->timeVerify += clock() - clk;
-    // sort pattern
-clk = clock();
-    Vec_IntSort( vPat, 0 );
-pMan->timeSort += clock() - clk;
-    // save pattern
-    Cec_ManPatStore( pMan, vPat );
-    pMan->timeTotal += clock() - clkTotal;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Packs patterns into array of simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-*************************************`**********************************/
-int Cec_ManPatCollectTry( Vec_Ptr_t * vInfo, Vec_Ptr_t * vPres, int iBit, int * pLits, int nLits )
-{
-    unsigned * pInfo, * pPres;
-    int i;
-    for ( i = 0; i < nLits; i++ )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
-        pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
-        if ( Gia_InfoHasBit( pPres, iBit ) && 
-             Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
-             return 0;
-    }
-    for ( i = 0; i < nLits; i++ )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
-        pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
-        Gia_InfoSetBit( pPres, iBit );
-        if ( Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
-            Gia_InfoXorBit( pInfo, iBit );
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Packs patterns into array of simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Cec_ManPatCollectPatterns( Cec_ManPat_t *  pMan, int nInputs, int nWordsInit )
-{
-    Vec_Int_t * vPat = pMan->vPattern1;
-    Vec_Ptr_t * vInfo, * vPres;
-    int k, kMax = -1, nPatterns = 0;
-    int iStartOld = pMan->iStart;
-    int nWords = nWordsInit;
-    int nBits = 32 * nWords;
-    int clk = clock();
-    vInfo = Vec_PtrAllocSimInfo( nInputs, nWords );
-    Gia_ManRandomInfo( vInfo, 0, 0, nWords );
-    vPres = Vec_PtrAllocSimInfo( nInputs, nWords );
-    Vec_PtrCleanSimInfo( vPres, 0, nWords );
-    while ( pMan->iStart < Vec_StrSize(pMan->vStorage) )
-    {
-        nPatterns++;
-        Cec_ManPatRestore( pMan, vPat );
-        for ( k = 1; k < nBits; k++, k += ((k % (32 * nWordsInit)) == 0) )
-            if ( Cec_ManPatCollectTry( vInfo, vPres, k, (int *)Vec_IntArray(vPat), Vec_IntSize(vPat) ) )
-                break;
-        kMax = ABC_MAX( kMax, k );
-        if ( k == nBits-1 )
-        {
-            Vec_PtrReallocSimInfo( vInfo );
-            Gia_ManRandomInfo( vInfo, 0, nWords, 2*nWords );
-            Vec_PtrReallocSimInfo( vPres );
-            Vec_PtrCleanSimInfo( vPres, nWords, 2*nWords );
-            nWords *= 2;
-            nBits *= 2;
-        }
-    }
-    Vec_PtrFree( vPres );
-    pMan->nSeries = Vec_PtrReadWordsSimInfo(vInfo) / nWordsInit;
-    pMan->timePack += clock() - clk;
-    pMan->timeTotal += clock() - clk;
-    pMan->iStart = iStartOld;
-    if ( pMan->fVerbose )
-    {
-        Abc_Print( 1, "Total = %5d. Max used = %5d. Full = %5d. Series = %d. ", 
-            nPatterns, kMax, nWordsInit*32, pMan->nSeries );
-        ABC_PRT( "Time", clock() - clk );
-        Cec_ManPatPrintStats( pMan );
-    }
-    return vInfo;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Packs patterns into array of simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Cec_ManPatPackPatterns( Vec_Int_t * vCexStore, int nInputs, int nRegs, int nWordsInit )
-{
-    Vec_Int_t * vPat;
-    Vec_Ptr_t * vInfo, * vPres;
-    int k, nSize, iStart, kMax = 0, nPatterns = 0;
-    int nWords = nWordsInit;
-    int nBits = 32 * nWords;
-//    int RetValue;
-    assert( nRegs <= nInputs );
-    vPat  = Vec_IntAlloc( 100 );
-
-    vInfo = Vec_PtrAllocSimInfo( nInputs, nWords );
-    Vec_PtrCleanSimInfo( vInfo, 0, nWords );
-    Gia_ManRandomInfo( vInfo, nRegs, 0, nWords );
-
-    vPres = Vec_PtrAllocSimInfo( nInputs, nWords );
-    Vec_PtrCleanSimInfo( vPres, 0, nWords );
-    iStart = 0;
-    while ( iStart < Vec_IntSize(vCexStore) )
-    {
-        nPatterns++;
-        // skip the output number
-        iStart++;
-        // get the number of items
-        nSize = Vec_IntEntry( vCexStore, iStart++ );
-        if ( nSize <= 0 )
-            continue;
-        // extract pattern
-        Vec_IntClear( vPat );
-        for ( k = 0; k < nSize; k++ )
-            Vec_IntPush( vPat, Vec_IntEntry( vCexStore, iStart++ ) );
-        // add pattern to storage
-        for ( k = 1; k < nBits; k++, k += ((k % (32 * nWordsInit)) == 0) )
-            if ( Cec_ManPatCollectTry( vInfo, vPres, k, (int *)Vec_IntArray(vPat), Vec_IntSize(vPat) ) )
-                break;
-
-//        k = kMax + 1;
-//        RetValue = Cec_ManPatCollectTry( vInfo, vPres, k, (int *)Vec_IntArray(vPat), Vec_IntSize(vPat) );
-//        assert( RetValue == 1 );
-
-        kMax = ABC_MAX( kMax, k );
-        if ( k == nBits-1 )
-        {
-            Vec_PtrReallocSimInfo( vInfo );
-            Vec_PtrCleanSimInfo( vInfo, nWords, 2*nWords );
-            Gia_ManRandomInfo( vInfo, nRegs, nWords, 2*nWords );
-
-            Vec_PtrReallocSimInfo( vPres );
-            Vec_PtrCleanSimInfo( vPres, nWords, 2*nWords );
-            nWords *= 2;
-            nBits *= 2;
-        }
-    }
-//    Abc_Print( 1, "packed %d patterns into %d vectors (out of %d)\n", nPatterns, kMax, nBits );
-    Vec_PtrFree( vPres );
-    Vec_IntFree( vPat );
-    return vInfo;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cecSeq.c b/src/aig/cec/cecSeq.c
deleted file mode 100644
index dd561971..00000000
--- a/src/aig/cec/cecSeq.c
+++ /dev/null
@@ -1,448 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecSeq.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [Refinement of sequential equivalence classes.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecSeq.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Sets register values from the counter-example.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSeqDeriveInfoFromCex( Vec_Ptr_t * vInfo, Gia_Man_t * pAig, Abc_Cex_t * pCex )
-{
-    unsigned * pInfo;
-    int k, i, w, nWords;
-    assert( pCex->nBits == pCex->nRegs + pCex->nPis * (pCex->iFrame + 1) );
-    assert( pCex->nBits - pCex->nRegs + Gia_ManRegNum(pAig) <= Vec_PtrSize(vInfo) );
-    nWords = Vec_PtrReadWordsSimInfo( vInfo );
-/*
-    // user register values
-    assert( pCex->nRegs == Gia_ManRegNum(pAig) );
-    for ( k = 0; k < pCex->nRegs; k++ )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry( vInfo, k );
-        for ( w = 0; w < nWords; w++ )
-            pInfo[w] = Gia_InfoHasBit( pCex->pData, k )? ~0 : 0;
-    }
-*/
-    // print warning about register values
-    for ( k = 0; k < pCex->nRegs; k++ )
-        if ( Gia_InfoHasBit( pCex->pData, k ) )
-            break;
-    if ( k < pCex->nRegs )
-        Abc_Print( 0, "The CEX has flop values different from 0, but they are currently not used by \"resim\".\n" );
-
-    // assign zero register values
-    for ( k = 0; k < Gia_ManRegNum(pAig); k++ )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry( vInfo, k );
-        for ( w = 0; w < nWords; w++ )
-            pInfo[w] = 0;
-    }
-    for ( i = pCex->nRegs; i < pCex->nBits; i++ )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry( vInfo, k++ );
-        for ( w = 0; w < nWords; w++ )
-            pInfo[w] = Gia_ManRandom(0);
-        // set simulation pattern and make sure it is second (first will be erased during simulation)
-        pInfo[0] = (pInfo[0] << 1) | Gia_InfoHasBit( pCex->pData, i ); 
-        pInfo[0] <<= 1;
-    }
-    for ( ; k < Vec_PtrSize(vInfo); k++ )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry( vInfo, k );
-        for ( w = 0; w < nWords; w++ )
-            pInfo[w] = Gia_ManRandom(0);
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sets register values from the counter-example.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSeqDeriveInfoInitRandom( Vec_Ptr_t * vInfo, Gia_Man_t * pAig, Abc_Cex_t * pCex )
-{
-    unsigned * pInfo;
-    int k, w, nWords;
-    nWords = Vec_PtrReadWordsSimInfo( vInfo );
-    assert( pCex == NULL || Gia_ManRegNum(pAig) == pCex->nRegs );
-    assert( Gia_ManRegNum(pAig) <= Vec_PtrSize(vInfo) );
-    for ( k = 0; k < Gia_ManRegNum(pAig); k++ )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry( vInfo, k );
-        for ( w = 0; w < nWords; w++ )
-            pInfo[w] = (pCex && Gia_InfoHasBit(pCex->pData, k))? ~0 : 0;
-    }
-
-    for ( ; k < Vec_PtrSize(vInfo); k++ )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry( vInfo, k );
-        for ( w = 0; w < nWords; w++ )
-            pInfo[w] = Gia_ManRandom( 0 );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resimulates the classes using sequential simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSeqResimulate( Cec_ManSim_t * p, Vec_Ptr_t * vInfo )
-{
-    unsigned * pInfo0, * pInfo1;
-    int f, i, k, w;
-//    assert( Gia_ManRegNum(p->pAig) > 0 );
-    assert( Vec_PtrSize(vInfo) == Gia_ManRegNum(p->pAig) + Gia_ManPiNum(p->pAig) * p->pPars->nFrames );
-    for ( k = 0; k < Gia_ManRegNum(p->pAig); k++ )
-    {
-        pInfo0 = (unsigned *)Vec_PtrEntry( vInfo, k );
-        pInfo1 = (unsigned *)Vec_PtrEntry( p->vCoSimInfo, Gia_ManPoNum(p->pAig) + k );
-        for ( w = 0; w < p->nWords; w++ )
-            pInfo1[w] = pInfo0[w];
-    }
-    for ( f = 0; f < p->pPars->nFrames; f++ )
-    {
-        for ( i = 0; i < Gia_ManPiNum(p->pAig); i++ )
-        {
-            pInfo0 = (unsigned *)Vec_PtrEntry( vInfo, k++ );
-            pInfo1 = (unsigned *)Vec_PtrEntry( p->vCiSimInfo, i );
-            for ( w = 0; w < p->nWords; w++ )
-                pInfo1[w] = pInfo0[w];
-        }
-        for ( i = 0; i < Gia_ManRegNum(p->pAig); i++ )
-        {
-            pInfo0 = (unsigned *)Vec_PtrEntry( p->vCoSimInfo, Gia_ManPoNum(p->pAig) + i );
-            pInfo1 = (unsigned *)Vec_PtrEntry( p->vCiSimInfo, Gia_ManPiNum(p->pAig) + i );
-            for ( w = 0; w < p->nWords; w++ )
-                pInfo1[w] = pInfo0[w];
-        }
-        if ( Cec_ManSimSimulateRound( p, p->vCiSimInfo, p->vCoSimInfo ) )
-            return 1;
-    }
-    assert( k == Vec_PtrSize(vInfo) );
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resimulates information to refine equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSeqResimulateInfo( Gia_Man_t * pAig, Vec_Ptr_t * vSimInfo, Abc_Cex_t * pBestState, int fCheckMiter )
-{
-    Cec_ParSim_t ParsSim, * pParsSim = &ParsSim;
-    Cec_ManSim_t * pSim;
-    int RetValue, clkTotal = clock();
-    assert( (Vec_PtrSize(vSimInfo) - Gia_ManRegNum(pAig)) % Gia_ManPiNum(pAig) == 0 );
-    Cec_ManSimSetDefaultParams( pParsSim );
-    pParsSim->nFrames = (Vec_PtrSize(vSimInfo) - Gia_ManRegNum(pAig)) / Gia_ManPiNum(pAig);
-    pParsSim->nWords  = Vec_PtrReadWordsSimInfo( vSimInfo );
-    pParsSim->fCheckMiter = fCheckMiter;
-    Gia_ManSetRefs( pAig );
-    pSim = Cec_ManSimStart( pAig, pParsSim );
-    if ( pBestState )
-        pSim->pBestState = pBestState;
-    RetValue = Cec_ManSeqResimulate( pSim, vSimInfo );
-    pSim->pBestState = NULL;
-    Cec_ManSimStop( pSim );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resimuates one counter-example to refine equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSeqResimulateCounter( Gia_Man_t * pAig, Cec_ParSim_t * pPars, Abc_Cex_t * pCex )
-{
-    Vec_Ptr_t * vSimInfo;
-    int RetValue, clkTotal = clock();
-    if ( pCex == NULL )
-    {
-        Abc_Print( 1, "Cec_ManSeqResimulateCounter(): Counter-example is not available.\n" );
-        return -1;
-    }
-    if ( pAig->pReprs == NULL )
-    {
-        Abc_Print( 1, "Cec_ManSeqResimulateCounter(): Equivalence classes are not available.\n" );
-        return -1;
-    }
-    if ( Gia_ManRegNum(pAig) == 0 )
-    {
-        Abc_Print( 1, "Cec_ManSeqResimulateCounter(): Not a sequential AIG.\n" );
-        return -1;
-    }
-//    if ( Gia_ManRegNum(pAig) != pCex->nRegs || Gia_ManPiNum(pAig) != pCex->nPis )
-    if ( Gia_ManPiNum(pAig) != pCex->nPis )
-    {
-        Abc_Print( 1, "Cec_ManSeqResimulateCounter(): The number of PIs in the AIG and the counter-example differ.\n" );
-        return -1;
-    }
-    if ( pPars->fVerbose )
-        Abc_Print( 1, "Resimulating %d timeframes.\n", pPars->nFrames + pCex->iFrame + 1 );
-    Gia_ManRandom( 1 );
-    vSimInfo = Vec_PtrAllocSimInfo( Gia_ManRegNum(pAig) + 
-        Gia_ManPiNum(pAig) * (pPars->nFrames + pCex->iFrame + 1), 1 );
-    Cec_ManSeqDeriveInfoFromCex( vSimInfo, pAig, pCex );
-    if ( pPars->fVerbose )
-        Gia_ManEquivPrintClasses( pAig, 0, 0 );
-    RetValue = Cec_ManSeqResimulateInfo( pAig, vSimInfo, NULL, pPars->fCheckMiter );
-    if ( pPars->fVerbose )
-        Gia_ManEquivPrintClasses( pAig, 0, 0 );
-    Vec_PtrFree( vSimInfo );
-    if ( pPars->fVerbose )
-        ABC_PRT( "Time", clock() - clkTotal );
-//    if ( RetValue && pPars->fCheckMiter )
-//        Abc_Print( 1, "Cec_ManSeqResimulateCounter(): An output of the miter is asserted!\n" );
-    return RetValue;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of POs that are not const0 cands.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManCountNonConstOutputs( Gia_Man_t * pAig )
-{
-    Gia_Obj_t * pObj;
-    int i, Counter = 0;
-    if ( pAig->pReprs == NULL )
-        return -1;
-    Gia_ManForEachPo( pAig, pObj, i )
-        if ( !Gia_ObjIsConst( pAig, Gia_ObjFaninId0p(pAig, pObj) ) )
-            Counter++;
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of POs that are not const0 cands.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManCheckNonTrivialCands( Gia_Man_t * pAig )
-{
-    Gia_Obj_t * pObj;
-    int i, RetValue = 0;
-    if ( pAig->pReprs == NULL )
-        return 0;
-    // label internal nodes driving POs
-    Gia_ManForEachPo( pAig, pObj, i )
-        Gia_ObjFanin0(pObj)->fMark0 = 1;
-    // check if there are non-labled equivs
-    Gia_ManForEachObj( pAig, pObj, i )
-        if ( Gia_ObjIsCand(pObj) && !pObj->fMark0 && Gia_ObjRepr(pAig, i) != GIA_VOID )
-        {
-            RetValue = 1;
-            break;
-        }
-    // clean internal nodes driving POs
-    Gia_ManForEachPo( pAig, pObj, i )
-        Gia_ObjFanin0(pObj)->fMark0 = 0;
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs semiformal refinement of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSeqSemiformal( Gia_Man_t * pAig, Cec_ParSmf_t * pPars )
-{ 
-    int nAddFrames = 16; // additional timeframes to simulate
-    int nCountNoRef = 0;
-    int nFramesReal;
-    Cec_ParSat_t ParsSat, * pParsSat = &ParsSat;
-    Vec_Ptr_t * vSimInfo; 
-    Vec_Str_t * vStatus;
-    Abc_Cex_t * pState;
-    Gia_Man_t * pSrm, * pReduce, * pAux;
-    int r, nPats, RetValue = 0;
-    if ( pAig->pReprs == NULL )
-    { 
-        Abc_Print( 1, "Cec_ManSeqSemiformal(): Equivalence classes are not available.\n" );
-        return -1;
-    }
-    if ( Gia_ManRegNum(pAig) == 0 )
-    {
-        Abc_Print( 1, "Cec_ManSeqSemiformal(): Not a sequential AIG.\n" );
-        return -1;
-    }
-    Gia_ManRandom( 1 );
-    // prepare starting pattern
-    pState = Abc_CexAlloc( Gia_ManRegNum(pAig), 0, 0 );
-    pState->iFrame = -1;
-    pState->iPo = -1;
-    // prepare SAT solving
-    Cec_ManSatSetDefaultParams( pParsSat );
-    pParsSat->nBTLimit = pPars->nBTLimit;
-    pParsSat->fVerbose = pPars->fVerbose;
-    if ( pParsSat->fVerbose )
-    {
-        Abc_Print( 1, "Starting: " );
-        Gia_ManEquivPrintClasses( pAig, 0, 0 );
-    }
-    // perform the given number of BMC rounds
-    Gia_ManCleanMark0( pAig );
-    for ( r = 0; r < pPars->nRounds; r++ )
-    {
-        if ( !Cec_ManCheckNonTrivialCands(pAig) )
-        {
-            Abc_Print( 1, "Cec_ManSeqSemiformal: There are only trivial equiv candidates left (PO drivers). Quitting.\n" );
-            break;
-        }
-//        Abc_CexPrint( pState );
-        // derive speculatively reduced model
-//        pSrm = Gia_ManSpecReduceInit( pAig, pState, pPars->nFrames, pPars->fDualOut );
-        pSrm = Gia_ManSpecReduceInitFrames( pAig, pState, pPars->nFrames, &nFramesReal, pPars->fDualOut, pPars->nMinOutputs );
-        if ( pSrm == NULL )
-        {
-            Abc_Print( 1, "Quitting refinement because miter could not be unrolled.\n" );
-            break;
-        }
-        assert( Gia_ManRegNum(pSrm) == 0 && Gia_ManPiNum(pSrm) == (Gia_ManPiNum(pAig) * nFramesReal) );
-        if ( pPars->fVerbose )
-            Abc_Print( 1, "Unrolled for %d frames.\n", nFramesReal );
-        // allocate room for simulation info
-        vSimInfo = Vec_PtrAllocSimInfo( Gia_ManRegNum(pAig) + 
-            Gia_ManPiNum(pAig) * (nFramesReal + nAddFrames), pPars->nWords );
-        Cec_ManSeqDeriveInfoInitRandom( vSimInfo, pAig, pState );
-        // fill in simulation info with counter-examples
-        vStatus = Cec_ManSatSolveSeq( vSimInfo, pSrm, pParsSat, Gia_ManRegNum(pAig), &nPats );
-        Vec_StrFree( vStatus );
-        Gia_ManStop( pSrm );
-        // resimulate and refine the classes
-        RetValue = Cec_ManSeqResimulateInfo( pAig, vSimInfo, pState, pPars->fCheckMiter );
-        Vec_PtrFree( vSimInfo );
-        assert( pState->iPo >= 0 ); // hit counter
-        pState->iPo = -1;
-        if ( pPars->fVerbose )
-        {
-            Abc_Print( 1, "BMC = %3d ", nPats );
-            Gia_ManEquivPrintClasses( pAig, 0, 0 );
-        }
-
-        // write equivalence classes
-        Gia_WriteAiger( pAig, "gore.aig", 0, 0 );
-        // reduce the model
-        pReduce = Gia_ManSpecReduce( pAig, 0, 0, 1, 0, 0 );
-        if ( pReduce )
-        {
-            pReduce = Gia_ManSeqStructSweep( pAux = pReduce, 1, 1, 0 );
-            Gia_ManStop( pAux );
-            Gia_WriteAiger( pReduce, "gsrm.aig", 0, 0 );
-//            Abc_Print( 1, "Speculatively reduced model was written into file \"%s\".\n", "gsrm.aig" );
-//          Gia_ManPrintStatsShort( pReduce );
-            Gia_ManStop( pReduce );
-        }
-
-        if ( RetValue )
-        {
-            Abc_Print( 1, "Cec_ManSeqSemiformal(): An output of the miter is asserted. Refinement stopped.\n" );
-            break;
-        }
-        // decide when to stop
-        if ( nPats > 0 )
-            nCountNoRef = 0;
-        else if ( ++nCountNoRef == pPars->nNonRefines )
-            break;
-    }
-    ABC_FREE( pState );
-    if ( pPars->fCheckMiter )
-    {
-        int nNonConsts = Cec_ManCountNonConstOutputs( pAig );
-        if ( nNonConsts )
-            Abc_Print( 1, "The number of POs that are not const-0 candidates = %d.\n", nNonConsts );
-    }
-    return RetValue;
-}
-
-//&r s13207.aig; &ps; &equiv; &ps; &semi -R 2 -vm
-//&r bug/50/temp.aig; &ps; &equiv -smv; &semi -v
-//r mentor/1_05c.blif; st; &get; &ps; &equiv -smv; &semi -mv
-//&r bug/50/hdl1.aig; &ps; &equiv -smv; &semi -mv; &srm; &r gsrm.aig; &ps
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cecSim.c b/src/aig/cec/cecSim.c
deleted file mode 100644
index 92f8fc2e..00000000
--- a/src/aig/cec/cecSim.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecSim.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [Simulation manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecSim.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cecSolve.c b/src/aig/cec/cecSolve.c
deleted file mode 100644
index e86c2f35..00000000
--- a/src/aig/cec/cecSolve.c
+++ /dev/null
@@ -1,1023 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecSolve.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [Performs one round of SAT solving.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecSolve.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static inline int  Cec_ObjSatNum( Cec_ManSat_t * p, Gia_Obj_t * pObj )             { return p->pSatVars[Gia_ObjId(p->pAig,pObj)]; }
-static inline void Cec_ObjSetSatNum( Cec_ManSat_t * p, Gia_Obj_t * pObj, int Num ) { p->pSatVars[Gia_ObjId(p->pAig,pObj)] = Num;  }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns value of the SAT variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ObjSatVarValue( Cec_ManSat_t * p, Gia_Obj_t * pObj )             
-{ 
-    return sat_solver_var_value( p->pSat, Cec_ObjSatNum(p, pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Addes clauses to the solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_AddClausesMux( Cec_ManSat_t * p, Gia_Obj_t * pNode )
-{
-    Gia_Obj_t * pNodeI, * pNodeT, * pNodeE;
-    int pLits[4], RetValue, VarF, VarI, VarT, VarE, fCompT, fCompE;
-
-    assert( !Gia_IsComplement( pNode ) );
-    assert( Gia_ObjIsMuxType( pNode ) );
-    // get nodes (I = if, T = then, E = else)
-    pNodeI = Gia_ObjRecognizeMux( pNode, &pNodeT, &pNodeE );
-    // get the variable numbers
-    VarF = Cec_ObjSatNum(p,pNode);
-    VarI = Cec_ObjSatNum(p,pNodeI);
-    VarT = Cec_ObjSatNum(p,Gia_Regular(pNodeT));
-    VarE = Cec_ObjSatNum(p,Gia_Regular(pNodeE));
-    // get the complementation flags
-    fCompT = Gia_IsComplement(pNodeT);
-    fCompE = Gia_IsComplement(pNodeE);
-
-    // f = ITE(i, t, e)
-
-    // i' + t' + f
-    // i' + t  + f'
-    // i  + e' + f
-    // i  + e  + f'
-
-    // create four clauses
-    pLits[0] = toLitCond(VarI, 1);
-    pLits[1] = toLitCond(VarT, 1^fCompT);
-    pLits[2] = toLitCond(VarF, 0);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pNodeI->fPhase )               pLits[0] = lit_neg( pLits[0] );
-        if ( Gia_Regular(pNodeT)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarI, 1);
-    pLits[1] = toLitCond(VarT, 0^fCompT);
-    pLits[2] = toLitCond(VarF, 1);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pNodeI->fPhase )               pLits[0] = lit_neg( pLits[0] );
-        if ( Gia_Regular(pNodeT)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarI, 0);
-    pLits[1] = toLitCond(VarE, 1^fCompE);
-    pLits[2] = toLitCond(VarF, 0);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pNodeI->fPhase )               pLits[0] = lit_neg( pLits[0] );
-        if ( Gia_Regular(pNodeE)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarI, 0);
-    pLits[1] = toLitCond(VarE, 0^fCompE);
-    pLits[2] = toLitCond(VarF, 1);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pNodeI->fPhase )               pLits[0] = lit_neg( pLits[0] );
-        if ( Gia_Regular(pNodeE)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-
-    // two additional clauses
-    // t' & e' -> f'
-    // t  & e  -> f 
-
-    // t  + e   + f'
-    // t' + e'  + f 
-
-    if ( VarT == VarE )
-    {
-//        assert( fCompT == !fCompE );
-        return;
-    }
-
-    pLits[0] = toLitCond(VarT, 0^fCompT);
-    pLits[1] = toLitCond(VarE, 0^fCompE);
-    pLits[2] = toLitCond(VarF, 1);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( Gia_Regular(pNodeT)->fPhase )  pLits[0] = lit_neg( pLits[0] );
-        if ( Gia_Regular(pNodeE)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarT, 1^fCompT);
-    pLits[1] = toLitCond(VarE, 1^fCompE);
-    pLits[2] = toLitCond(VarF, 0);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( Gia_Regular(pNodeT)->fPhase )  pLits[0] = lit_neg( pLits[0] );
-        if ( Gia_Regular(pNodeE)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Addes clauses to the solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_AddClausesSuper( Cec_ManSat_t * p, Gia_Obj_t * pNode, Vec_Ptr_t * vSuper )
-{
-    Gia_Obj_t * pFanin;
-    int * pLits, nLits, RetValue, i;
-    assert( !Gia_IsComplement(pNode) );
-    assert( Gia_ObjIsAnd( pNode ) );
-    // create storage for literals
-    nLits = Vec_PtrSize(vSuper) + 1;
-    pLits = ABC_ALLOC( int, nLits );
-    // suppose AND-gate is A & B = C
-    // add !A => !C   or   A + !C
-    Vec_PtrForEachEntry( Gia_Obj_t *, vSuper, pFanin, i )
-    {
-        pLits[0] = toLitCond(Cec_ObjSatNum(p,Gia_Regular(pFanin)), Gia_IsComplement(pFanin));
-        pLits[1] = toLitCond(Cec_ObjSatNum(p,pNode), 1);
-        if ( p->pPars->fPolarFlip )
-        {
-            if ( Gia_Regular(pFanin)->fPhase )  pLits[0] = lit_neg( pLits[0] );
-            if ( pNode->fPhase )                pLits[1] = lit_neg( pLits[1] );
-        }
-        RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-        assert( RetValue );
-    }
-    // add A & B => C   or   !A + !B + C
-    Vec_PtrForEachEntry( Gia_Obj_t *, vSuper, pFanin, i )
-    {
-        pLits[i] = toLitCond(Cec_ObjSatNum(p,Gia_Regular(pFanin)), !Gia_IsComplement(pFanin));
-        if ( p->pPars->fPolarFlip )
-        {
-            if ( Gia_Regular(pFanin)->fPhase )  pLits[i] = lit_neg( pLits[i] );
-        }
-    }
-    pLits[nLits-1] = toLitCond(Cec_ObjSatNum(p,pNode), 0);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pNode->fPhase )  pLits[nLits-1] = lit_neg( pLits[nLits-1] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + nLits );
-    assert( RetValue );
-    ABC_FREE( pLits );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the supergate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_CollectSuper_rec( Gia_Obj_t * pObj, Vec_Ptr_t * vSuper, int fFirst, int fUseMuxes )
-{
-    // if the new node is complemented or a PI, another gate begins
-    if ( Gia_IsComplement(pObj) || Gia_ObjIsCi(pObj) || 
-         (!fFirst && Gia_ObjValue(pObj) > 1) || 
-         (fUseMuxes && Gia_ObjIsMuxType(pObj)) )
-    {
-        Vec_PtrPushUnique( vSuper, pObj );
-        return;
-    }
-    // go through the branches
-    Cec_CollectSuper_rec( Gia_ObjChild0(pObj), vSuper, 0, fUseMuxes );
-    Cec_CollectSuper_rec( Gia_ObjChild1(pObj), vSuper, 0, fUseMuxes );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the supergate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_CollectSuper( Gia_Obj_t * pObj, int fUseMuxes, Vec_Ptr_t * vSuper )
-{
-    assert( !Gia_IsComplement(pObj) );
-    assert( !Gia_ObjIsCi(pObj) );
-    Vec_PtrClear( vSuper );
-    Cec_CollectSuper_rec( pObj, vSuper, 1, fUseMuxes );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the solver clause database.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ObjAddToFrontier( Cec_ManSat_t * p, Gia_Obj_t * pObj, Vec_Ptr_t * vFrontier )
-{
-    assert( !Gia_IsComplement(pObj) );
-    if ( Cec_ObjSatNum(p,pObj) )
-        return;
-    assert( Cec_ObjSatNum(p,pObj) == 0 );
-    if ( Gia_ObjIsConst0(pObj) )
-        return;
-    Vec_PtrPush( p->vUsedNodes, pObj );
-    Cec_ObjSetSatNum( p, pObj, p->nSatVars++ );
-    if ( Gia_ObjIsAnd(pObj) )
-        Vec_PtrPush( vFrontier, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the solver clause database.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_CnfNodeAddToSolver( Cec_ManSat_t * p, Gia_Obj_t * pObj )
-{ 
-    Vec_Ptr_t * vFrontier;
-    Gia_Obj_t * pNode, * pFanin;
-    int i, k, fUseMuxes = 1;
-    // quit if CNF is ready
-    if ( Cec_ObjSatNum(p,pObj) )
-        return;
-    if ( Gia_ObjIsCi(pObj) )
-    {
-        Vec_PtrPush( p->vUsedNodes, pObj );
-        Cec_ObjSetSatNum( p, pObj, p->nSatVars++ );
-        sat_solver_setnvars( p->pSat, p->nSatVars );
-        return;
-    }
-    assert( Gia_ObjIsAnd(pObj) );
-    // start the frontier
-    vFrontier = Vec_PtrAlloc( 100 );
-    Cec_ObjAddToFrontier( p, pObj, vFrontier );
-    // explore nodes in the frontier
-    Vec_PtrForEachEntry( Gia_Obj_t *, vFrontier, pNode, i )
-    {
-        // create the supergate
-        assert( Cec_ObjSatNum(p,pNode) );
-        if ( fUseMuxes && Gia_ObjIsMuxType(pNode) )
-        {
-            Vec_PtrClear( p->vFanins );
-            Vec_PtrPushUnique( p->vFanins, Gia_ObjFanin0( Gia_ObjFanin0(pNode) ) );
-            Vec_PtrPushUnique( p->vFanins, Gia_ObjFanin0( Gia_ObjFanin1(pNode) ) );
-            Vec_PtrPushUnique( p->vFanins, Gia_ObjFanin1( Gia_ObjFanin0(pNode) ) );
-            Vec_PtrPushUnique( p->vFanins, Gia_ObjFanin1( Gia_ObjFanin1(pNode) ) );
-            Vec_PtrForEachEntry( Gia_Obj_t *, p->vFanins, pFanin, k )
-                Cec_ObjAddToFrontier( p, Gia_Regular(pFanin), vFrontier );
-            Cec_AddClausesMux( p, pNode );
-        }
-        else
-        {
-            Cec_CollectSuper( pNode, fUseMuxes, p->vFanins );
-            Vec_PtrForEachEntry( Gia_Obj_t *, p->vFanins, pFanin, k )
-                Cec_ObjAddToFrontier( p, Gia_Regular(pFanin), vFrontier );
-            Cec_AddClausesSuper( p, pNode, p->vFanins );
-        }
-        assert( Vec_PtrSize(p->vFanins) > 1 );
-    }
-    Vec_PtrFree( vFrontier );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Recycles the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSatSolverRecycle( Cec_ManSat_t * p )
-{
-    int Lit;
-    if ( p->pSat )
-    {
-        Gia_Obj_t * pObj;
-        int i;
-        Vec_PtrForEachEntry( Gia_Obj_t *, p->vUsedNodes, pObj, i )
-            Cec_ObjSetSatNum( p, pObj, 0 );
-        Vec_PtrClear( p->vUsedNodes );
-//        memset( p->pSatVars, 0, sizeof(int) * Gia_ManObjNumMax(p->pAigTotal) );
-        sat_solver_delete( p->pSat );
-    }
-    p->pSat = sat_solver_new();
-    p->pSat->factors = ABC_CALLOC( double, 1 );
-    sat_solver_setnvars( p->pSat, 1000 );
-    // var 0 is not used
-    // var 1 is reserved for const0 node - add the clause
-    p->nSatVars = 1;
-//    p->nSatVars = 0;
-    Lit = toLitCond( p->nSatVars, 1 );
-    if ( p->pPars->fPolarFlip )
-        Lit = lit_neg( Lit );
-    sat_solver_addclause( p->pSat, &Lit, &Lit + 1 );
-    Cec_ObjSetSatNum( p, Gia_ManConst0(p->pAig), p->nSatVars++ );
-
-    p->nRecycles++;
-    p->nCallsSince = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sets variable activities in the cone.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_SetActivityFactors_rec( Cec_ManSat_t * p, Gia_Obj_t * pObj, int LevelMin, int LevelMax )
-{
-    float dActConeBumpMax = 20.0;
-    int iVar;
-    // skip visited variables
-    if ( Gia_ObjIsTravIdCurrent(p->pAig, pObj) )
-        return;
-    Gia_ObjSetTravIdCurrent(p->pAig, pObj);
-    // add the PI to the list
-    if ( Gia_ObjLevel(p->pAig, pObj) <= LevelMin || Gia_ObjIsCi(pObj) )
-        return;
-    // set the factor of this variable
-    // (LevelMax-LevelMin) / (pObj->Level-LevelMin) = p->pPars->dActConeBumpMax / ThisBump
-    if ( (iVar = Cec_ObjSatNum(p,pObj)) )
-    {
-        p->pSat->factors[iVar] = dActConeBumpMax * (Gia_ObjLevel(p->pAig, pObj) - LevelMin)/(LevelMax - LevelMin);
-        veci_push(&p->pSat->act_vars, iVar);
-    }
-    // explore the fanins
-    Cec_SetActivityFactors_rec( p, Gia_ObjFanin0(pObj), LevelMin, LevelMax );
-    Cec_SetActivityFactors_rec( p, Gia_ObjFanin1(pObj), LevelMin, LevelMax );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sets variable activities in the cone.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_SetActivityFactors( Cec_ManSat_t * p, Gia_Obj_t * pObj )
-{
-    float dActConeRatio = 0.5;
-    int LevelMin, LevelMax;
-    // reset the active variables
-    veci_resize(&p->pSat->act_vars, 0);
-    // prepare for traversal
-    Gia_ManIncrementTravId( p->pAig );
-    // determine the min and max level to visit
-    assert( dActConeRatio > 0 && dActConeRatio < 1 );
-    LevelMax = Gia_ObjLevel(p->pAig,pObj);
-    LevelMin = (int)(LevelMax * (1.0 - dActConeRatio));
-    // traverse
-    Cec_SetActivityFactors_rec( p, pObj, LevelMin, LevelMax );
-//Cec_PrintActivity( p );
-    return 1;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Runs equivalence test for the two nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSatCheckNode( Cec_ManSat_t * p, Gia_Obj_t * pObj )
-{
-    Gia_Obj_t * pObjR = Gia_Regular(pObj);
-    int nBTLimit = p->pPars->nBTLimit;
-    int Lit, RetValue, status, clk, clk2, nConflicts;
-
-    if ( pObj == Gia_ManConst0(p->pAig) )
-        return 1;
-    if ( pObj == Gia_ManConst1(p->pAig) )
-    {
-        assert( 0 );
-        return 0;
-    }
-
-    p->nCallsSince++;  // experiment with this!!!
-    p->nSatTotal++;
-    
-    // check if SAT solver needs recycling
-    if ( p->pSat == NULL || 
-        (p->pPars->nSatVarMax && 
-         p->nSatVars > p->pPars->nSatVarMax && 
-         p->nCallsSince > p->pPars->nCallsRecycle) )
-        Cec_ManSatSolverRecycle( p );
-
-    // if the nodes do not have SAT variables, allocate them
-clk2 = clock();
-    Cec_CnfNodeAddToSolver( p, pObjR );
-//ABC_PRT( "cnf", clock() - clk2 );
-//Abc_Print( 1, "%d \n", p->pSat->size );
-
-clk2 = clock();
-//    Cec_SetActivityFactors( p, pObjR ); 
-//ABC_PRT( "act", clock() - clk2 );
-
-    // propage unit clauses
-    if ( p->pSat->qtail != p->pSat->qhead )
-    {
-        status = sat_solver_simplify(p->pSat);
-        assert( status != 0 );
-        assert( p->pSat->qtail == p->pSat->qhead );
-    }
-
-    // solve under assumptions
-    // A = 1; B = 0     OR     A = 1; B = 1 
-    Lit = toLitCond( Cec_ObjSatNum(p,pObjR), Gia_IsComplement(pObj) );
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pObjR->fPhase )  Lit = lit_neg( Lit );
-    }
-//Sat_SolverWriteDimacs( p->pSat, "temp.cnf", pLits, pLits + 2, 1 );
-clk = clock();
-    nConflicts = p->pSat->stats.conflicts;
-
-clk2 = clock();
-    RetValue = sat_solver_solve( p->pSat, &Lit, &Lit + 1, 
-        (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-//ABC_PRT( "sat", clock() - clk2 );
-
-    if ( RetValue == l_False )
-    {
-p->timeSatUnsat += clock() - clk;
-        Lit = lit_neg( Lit );
-        RetValue = sat_solver_addclause( p->pSat, &Lit, &Lit + 1 );
-        assert( RetValue );
-        p->nSatUnsat++;
-        p->nConfUnsat += p->pSat->stats.conflicts - nConflicts;       
-//Abc_Print( 1, "UNSAT after %d conflicts\n", p->pSat->stats.conflicts - nConflicts );
-        return 1;
-    }
-    else if ( RetValue == l_True )
-    {
-p->timeSatSat += clock() - clk;
-        p->nSatSat++;
-        p->nConfSat += p->pSat->stats.conflicts - nConflicts;
-//Abc_Print( 1, "SAT after %d conflicts\n", p->pSat->stats.conflicts - nConflicts );
-        return 0;
-    }
-    else // if ( RetValue == l_Undef )
-    {
-p->timeSatUndec += clock() - clk;
-        p->nSatUndec++;
-        p->nConfUndec += p->pSat->stats.conflicts - nConflicts;
-//Abc_Print( 1, "UNDEC after %d conflicts\n", p->pSat->stats.conflicts - nConflicts );
-        return -1;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Runs equivalence test for the two nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManSatCheckNodeTwo( Cec_ManSat_t * p, Gia_Obj_t * pObj1, Gia_Obj_t * pObj2 )
-{
-    Gia_Obj_t * pObjR1 = Gia_Regular(pObj1);
-    Gia_Obj_t * pObjR2 = Gia_Regular(pObj2);
-    int nBTLimit = p->pPars->nBTLimit;
-    int Lits[2], RetValue, status, clk, clk2, nConflicts;
-
-    if ( pObj1 == Gia_ManConst0(p->pAig) || pObj2 == Gia_ManConst0(p->pAig) || pObj1 == Gia_Not(pObj2) )
-        return 1;
-    if ( pObj1 == Gia_ManConst1(p->pAig) && (pObj2 == NULL || pObj2 == Gia_ManConst1(p->pAig)) )
-    {
-        assert( 0 );
-        return 0;
-    }
-
-    p->nCallsSince++;  // experiment with this!!!
-    p->nSatTotal++;
-    
-    // check if SAT solver needs recycling
-    if ( p->pSat == NULL || 
-        (p->pPars->nSatVarMax && 
-         p->nSatVars > p->pPars->nSatVarMax && 
-         p->nCallsSince > p->pPars->nCallsRecycle) )
-        Cec_ManSatSolverRecycle( p );
-
-    // if the nodes do not have SAT variables, allocate them
-clk2 = clock();
-    Cec_CnfNodeAddToSolver( p, pObjR1 );
-    Cec_CnfNodeAddToSolver( p, pObjR2 );
-//ABC_PRT( "cnf", clock() - clk2 );
-//Abc_Print( 1, "%d \n", p->pSat->size );
-
-clk2 = clock();
-//    Cec_SetActivityFactors( p, pObjR1 ); 
-//    Cec_SetActivityFactors( p, pObjR2 ); 
-//ABC_PRT( "act", clock() - clk2 );
-
-    // propage unit clauses
-    if ( p->pSat->qtail != p->pSat->qhead )
-    {
-        status = sat_solver_simplify(p->pSat);
-        assert( status != 0 );
-        assert( p->pSat->qtail == p->pSat->qhead );
-    }
-
-    // solve under assumptions
-    // A = 1; B = 0     OR     A = 1; B = 1 
-    Lits[0] = toLitCond( Cec_ObjSatNum(p,pObjR1), Gia_IsComplement(pObj1) );
-    Lits[1] = toLitCond( Cec_ObjSatNum(p,pObjR2), Gia_IsComplement(pObj2) );
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pObjR1->fPhase )  Lits[0] = lit_neg( Lits[0] );
-        if ( pObjR2->fPhase )  Lits[1] = lit_neg( Lits[1] );
-    }
-//Sat_SolverWriteDimacs( p->pSat, "temp.cnf", pLits, pLits + 2, 1 );
-clk = clock();
-    nConflicts = p->pSat->stats.conflicts;
-
-clk2 = clock();
-    RetValue = sat_solver_solve( p->pSat, Lits, Lits + 2, 
-        (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-//ABC_PRT( "sat", clock() - clk2 );
-
-    if ( RetValue == l_False )
-    {
-p->timeSatUnsat += clock() - clk;
-        Lits[0] = lit_neg( Lits[0] );
-        Lits[1] = lit_neg( Lits[1] );
-        RetValue = sat_solver_addclause( p->pSat, Lits, Lits + 2 );
-        assert( RetValue );
-        p->nSatUnsat++;
-        p->nConfUnsat += p->pSat->stats.conflicts - nConflicts;       
-//Abc_Print( 1, "UNSAT after %d conflicts\n", p->pSat->stats.conflicts - nConflicts );
-        return 1;
-    }
-    else if ( RetValue == l_True )
-    {
-p->timeSatSat += clock() - clk;
-        p->nSatSat++;
-        p->nConfSat += p->pSat->stats.conflicts - nConflicts;
-//Abc_Print( 1, "SAT after %d conflicts\n", p->pSat->stats.conflicts - nConflicts );
-        return 0;
-    }
-    else // if ( RetValue == l_Undef )
-    {
-p->timeSatUndec += clock() - clk;
-        p->nSatUndec++;
-        p->nConfUndec += p->pSat->stats.conflicts - nConflicts;
-//Abc_Print( 1, "UNDEC after %d conflicts\n", p->pSat->stats.conflicts - nConflicts );
-        return -1;
-    }
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one round of solving for the POs of the AIG.]
-
-  Description [Labels the nodes that have been proved (pObj->fMark1) 
-  and returns the set of satisfying assignments.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSatSolve( Cec_ManPat_t * pPat, Gia_Man_t * pAig, Cec_ParSat_t * pPars )
-{
-    Bar_Progress_t * pProgress = NULL;
-    Cec_ManSat_t * p;
-    Gia_Obj_t * pObj;
-    int i, status, clk = clock(), clk2;
-    // reset the manager
-    if ( pPat )
-    {
-        pPat->iStart = Vec_StrSize(pPat->vStorage);
-        pPat->nPats = 0;
-        pPat->nPatLits = 0;
-        pPat->nPatLitsMin = 0;
-    } 
-    Gia_ManSetPhase( pAig );
-    Gia_ManLevelNum( pAig );
-    Gia_ManIncrementTravId( pAig );
-    p = Cec_ManSatCreate( pAig, pPars );
-    pProgress = Bar_ProgressStart( stdout, Gia_ManPoNum(pAig) );
-    Gia_ManForEachCo( pAig, pObj, i )
-    {
-        if ( Gia_ObjIsConst0(Gia_ObjFanin0(pObj)) )
-        {
-            pObj->fMark0 = 0;
-            pObj->fMark1 = 1;
-            continue;
-        }
-        Bar_ProgressUpdate( pProgress, i, "SAT..." );
-clk2 = clock();
-        status = Cec_ManSatCheckNode( p, Gia_ObjChild0(pObj) );
-        pObj->fMark0 = (status == 0);
-        pObj->fMark1 = (status == 1);
-/*
-        if ( status == -1 )
-        {
-            Gia_Man_t * pTemp = Gia_ManDupDfsCone( pAig, pObj );
-            Gia_WriteAiger( pTemp, "gia_hard.aig", 0, 0 );
-            Gia_ManStop( pTemp );
-            Abc_Print( 1, "Dumping hard cone into file \"%s\".\n", "gia_hard.aig" );
-        }
-*/
-        if ( status != 0 )
-            continue;
-        // save the pattern
-        if ( pPat )
-        {
-            int clk3 = clock();
-            Cec_ManPatSavePattern( pPat, p, pObj );
-            pPat->timeTotalSave += clock() - clk3;
-        }
-        // quit if one of them is solved
-        if ( pPars->fCheckMiter )
-            break;
-    }
-    p->timeTotal = clock() - clk;
-    Bar_ProgressStop( pProgress );
-    if ( pPars->fVerbose )
-        Cec_ManSatPrintStats( p );
-    Cec_ManSatStop( p );
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the pattern stored.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Cec_ManSatReadCex( Cec_ManSat_t * pSat )
-{
-    return pSat->vCex;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Save values in the cone of influence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSatSolveSeq_rec( Cec_ManSat_t * pSat, Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Ptr_t * vInfo, int iPat, int nRegs )
-{
-    if ( Gia_ObjIsTravIdCurrent(p, pObj) )
-        return;
-    Gia_ObjSetTravIdCurrent(p, pObj);
-    if ( Gia_ObjIsCi(pObj) )
-    {
-        unsigned * pInfo = (unsigned *)Vec_PtrEntry( vInfo, nRegs + Gia_ObjCioId(pObj) );
-        if ( Cec_ObjSatVarValue( pSat, pObj ) != Gia_InfoHasBit( pInfo, iPat ) )
-            Gia_InfoXorBit( pInfo, iPat );
-        pSat->nCexLits++;
-//        Vec_IntPush( pSat->vCex, Gia_Var2Lit( Gia_ObjCioId(pObj), !Cec_ObjSatVarValue(pSat, pObj) ) );
-        return;
-    }
-    assert( Gia_ObjIsAnd(pObj) );
-    Cec_ManSatSolveSeq_rec( pSat, p, Gia_ObjFanin0(pObj), vInfo, iPat, nRegs );
-    Cec_ManSatSolveSeq_rec( pSat, p, Gia_ObjFanin1(pObj), vInfo, iPat, nRegs );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one round of solving for the POs of the AIG.]
-
-  Description [Labels the nodes that have been proved (pObj->fMark1) 
-  and returns the set of satisfying assignments.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Str_t * Cec_ManSatSolveSeq( Vec_Ptr_t * vPatts, Gia_Man_t * pAig, Cec_ParSat_t * pPars, int nRegs, int * pnPats )
-{
-    Bar_Progress_t * pProgress = NULL;
-    Vec_Str_t * vStatus;
-    Cec_ManSat_t * p;
-    Gia_Obj_t * pObj;
-    int iPat = 0, nPatsInit, nPats;
-    int i, status, clk = clock();
-    nPatsInit = nPats = 32 * Vec_PtrReadWordsSimInfo(vPatts);
-    Gia_ManSetPhase( pAig );
-    Gia_ManLevelNum( pAig );
-    Gia_ManIncrementTravId( pAig );
-    p = Cec_ManSatCreate( pAig, pPars );
-    vStatus = Vec_StrAlloc( Gia_ManPoNum(pAig) );
-    pProgress = Bar_ProgressStart( stdout, Gia_ManPoNum(pAig) );
-    Gia_ManForEachCo( pAig, pObj, i )
-    {
-        Bar_ProgressUpdate( pProgress, i, "SAT..." );
-        if ( Gia_ObjIsConst0(Gia_ObjFanin0(pObj)) )
-        {
-            if ( Gia_ObjFaninC0(pObj) )
-            {
-//                Abc_Print( 1, "Constant 1 output of SRM!!!\n" );
-                Vec_StrPush( vStatus, 0 );
-            }
-            else
-            {
-//                Abc_Print( 1, "Constant 0 output of SRM!!!\n" );
-                Vec_StrPush( vStatus, 1 );
-            }
-            continue;
-        }
-        status = Cec_ManSatCheckNode( p, Gia_ObjChild0(pObj) );
-//Abc_Print( 1, "output %d   status = %d\n", i, status );
-        Vec_StrPush( vStatus, (char)status );
-        if ( status != 0 )
-            continue;
-        // resize storage
-        if ( iPat == nPats )
-        {
-            int nWords = Vec_PtrReadWordsSimInfo(vPatts);
-            Vec_PtrReallocSimInfo( vPatts );
-            Vec_PtrCleanSimInfo( vPatts, nWords, 2*nWords );
-            nPats = 32 * Vec_PtrReadWordsSimInfo(vPatts);
-        }
-        if ( iPat % nPatsInit == 0 )
-            iPat++;
-        // save the pattern
-        Gia_ManIncrementTravId( pAig );
-//        Vec_IntClear( p->vCex );
-        Cec_ManSatSolveSeq_rec( p, pAig, Gia_ObjFanin0(pObj), vPatts, iPat++, nRegs );
-//        Gia_SatVerifyPattern( pAig, pObj, p->vCex, p->vVisits );
-//        Cec_ManSatAddToStore( p->vCexStore, p->vCex );
-//        if ( iPat == nPats )
-//            break;
-        // quit if one of them is solved
-//        if ( pPars->fFirstStop )
-//            break;
-//        if ( iPat == 32 * 15 * 16 - 1 )
-//            break;
-    }
-    p->timeTotal = clock() - clk;
-    Bar_ProgressStop( pProgress );
-    if ( pPars->fVerbose )
-        Cec_ManSatPrintStats( p );
-//    Abc_Print( 1, "Total number of cex literals = %d. (Ave = %d)\n", p->nCexLits, p->nCexLits/p->nSatSat );
-    Cec_ManSatStop( p );
-    if ( pnPats )
-        *pnPats = iPat-1;
-    return vStatus;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Save values in the cone of influence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSatAddToStore( Vec_Int_t * vCexStore, Vec_Int_t * vCex, int Out )
-{
-    int i, Entry;
-    Vec_IntPush( vCexStore, Out );
-    if ( vCex == NULL ) // timeout
-    {
-        Vec_IntPush( vCexStore, -1 );
-        return;
-    }
-    // write the counter-example
-    Vec_IntPush( vCexStore, Vec_IntSize(vCex) );
-    Vec_IntForEachEntry( vCex, Entry, i )
-        Vec_IntPush( vCexStore, Entry );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Save values in the cone of influence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSatSolveMiter_rec( Cec_ManSat_t * pSat, Gia_Man_t * p, Gia_Obj_t * pObj )
-{
-    if ( Gia_ObjIsTravIdCurrent(p, pObj) )
-        return;
-    Gia_ObjSetTravIdCurrent(p, pObj);
-    if ( Gia_ObjIsCi(pObj) )
-    {
-        pSat->nCexLits++;
-        Vec_IntPush( pSat->vCex, Gia_Var2Lit( Gia_ObjCioId(pObj), !Cec_ObjSatVarValue(pSat, pObj) ) );
-        return;
-    }
-    assert( Gia_ObjIsAnd(pObj) );
-    Cec_ManSatSolveMiter_rec( pSat, p, Gia_ObjFanin0(pObj) );
-    Cec_ManSatSolveMiter_rec( pSat, p, Gia_ObjFanin1(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Save patterns.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManSavePattern( Cec_ManSat_t * p, Gia_Obj_t * pObj1, Gia_Obj_t * pObj2 )
-{
-    Vec_IntClear( p->vCex );
-    Gia_ManIncrementTravId( p->pAig );
-    Cec_ManSatSolveMiter_rec( p, p->pAig, Gia_Regular(pObj1) );
-    if ( pObj2 )
-    Cec_ManSatSolveMiter_rec( p, p->pAig, Gia_Regular(pObj2) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one round of solving for the POs of the AIG.]
-
-  Description [Labels the nodes that have been proved (pObj->fMark1) 
-  and returns the set of satisfying assignments.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Cec_ManSatSolveMiter( Gia_Man_t * pAig, Cec_ParSat_t * pPars, Vec_Str_t ** pvStatus )
-{
-    Bar_Progress_t * pProgress = NULL;
-    Vec_Int_t * vCexStore;
-    Vec_Str_t * vStatus;
-    Cec_ManSat_t * p;
-    Gia_Obj_t * pObj;
-    int i, status, clk = clock();
-    // prepare AIG
-    Gia_ManSetPhase( pAig );
-    Gia_ManLevelNum( pAig );
-    Gia_ManIncrementTravId( pAig );
-    // create resulting data-structures
-    vStatus = Vec_StrAlloc( Gia_ManPoNum(pAig) );
-    vCexStore = Vec_IntAlloc( 10000 );
-    // perform solving
-    p = Cec_ManSatCreate( pAig, pPars );
-    pProgress = Bar_ProgressStart( stdout, Gia_ManPoNum(pAig) );
-    Gia_ManForEachCo( pAig, pObj, i )
-    {
-        Vec_IntClear( p->vCex );
-        Bar_ProgressUpdate( pProgress, i, "SAT..." );
-        if ( Gia_ObjIsConst0(Gia_ObjFanin0(pObj)) )
-        {
-            if ( Gia_ObjFaninC0(pObj) )
-            {
-//                Abc_Print( 1, "Constant 1 output of SRM!!!\n" );
-                Cec_ManSatAddToStore( vCexStore, p->vCex, i ); // trivial counter-example
-                Vec_StrPush( vStatus, 0 );
-            }
-            else
-            {
-//                Abc_Print( 1, "Constant 0 output of SRM!!!\n" );
-                Vec_StrPush( vStatus, 1 );
-            }
-            continue;
-        }
-        status = Cec_ManSatCheckNode( p, Gia_ObjChild0(pObj) );
-        Vec_StrPush( vStatus, (char)status );
-        if ( status == -1 )
-        {
-            Cec_ManSatAddToStore( vCexStore, NULL, i ); // timeout
-            continue;
-        }
-        if ( status == 1 )
-            continue;
-        assert( status == 0 );
-        // save the pattern
-//        Gia_ManIncrementTravId( pAig );
-//        Cec_ManSatSolveMiter_rec( p, pAig, Gia_ObjFanin0(pObj) );
-        Cec_ManSavePattern( p, Gia_ObjFanin0(pObj), NULL );
-//        Gia_SatVerifyPattern( pAig, pObj, p->vCex, p->vVisits );
-        Cec_ManSatAddToStore( vCexStore, p->vCex, i );
-    }
-    p->timeTotal = clock() - clk;
-    Bar_ProgressStop( pProgress );
-//    if ( pPars->fVerbose )
-//        Cec_ManSatPrintStats( p );
-    Cec_ManSatStop( p );
-    *pvStatus = vStatus;
-    return vCexStore;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cecSweep.c b/src/aig/cec/cecSweep.c
deleted file mode 100644
index 7d59515e..00000000
--- a/src/aig/cec/cecSweep.c
+++ /dev/null
@@ -1,299 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecSweep.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [SAT sweeping manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecSweep.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Performs limited speculative reduction.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Cec_ManFraSpecReduction( Cec_ManFra_t * p )
-{
-    Gia_Man_t * pNew, * pTemp;
-    Gia_Obj_t * pObj, * pRepr = NULL;
-    int iRes0, iRes1, iRepr, iNode, iMiter;
-    int i, fCompl, * piCopies, * pDepths;
-    Gia_ManSetPhase( p->pAig );
-    Vec_IntClear( p->vXorNodes );
-    if ( p->pPars->nLevelMax )
-        Gia_ManLevelNum( p->pAig );
-    pNew = Gia_ManStart( Gia_ManObjNum(p->pAig) );
-    pNew->pName = Gia_UtilStrsav( p->pAig->pName );
-    Gia_ManHashAlloc( pNew );
-    piCopies = ABC_FALLOC( int, Gia_ManObjNum(p->pAig) );
-    pDepths  = ABC_CALLOC( int, Gia_ManObjNum(p->pAig) );
-    piCopies[0] = 0;
-    Gia_ManForEachObj1( p->pAig, pObj, i )
-    {
-        if ( Gia_ObjIsCi(pObj) ) 
-        {
-            piCopies[i] = Gia_ManAppendCi( pNew );
-            continue;
-        }
-        if ( Gia_ObjIsCo(pObj) ) 
-            continue;
-        if ( piCopies[Gia_ObjFaninId0(pObj,i)] == -1 ||
-             piCopies[Gia_ObjFaninId1(pObj,i)] == -1 )
-             continue;
-        iRes0 = Gia_LitNotCond( piCopies[Gia_ObjFaninId0(pObj,i)], Gia_ObjFaninC0(pObj) );
-        iRes1 = Gia_LitNotCond( piCopies[Gia_ObjFaninId1(pObj,i)], Gia_ObjFaninC1(pObj) );
-        iNode = piCopies[i] = Gia_ManHashAnd( pNew, iRes0, iRes1 );
-        pDepths[i] = ABC_MAX( pDepths[Gia_ObjFaninId0(pObj,i)], pDepths[Gia_ObjFaninId1(pObj,i)] );
-        if ( Gia_ObjRepr(p->pAig, i) == GIA_VOID || Gia_ObjFailed(p->pAig, i) )
-            continue;
-        assert( Gia_ObjRepr(p->pAig, i) < i );
-        iRepr = piCopies[Gia_ObjRepr(p->pAig, i)];
-        if ( iRepr == -1 )
-            continue;
-        if ( Gia_LitRegular(iNode) == Gia_LitRegular(iRepr) )
-            continue;
-        if ( p->pPars->nLevelMax && 
-            (Gia_ObjLevel(p->pAig, pObj)  > p->pPars->nLevelMax || 
-             Gia_ObjLevel(p->pAig, pRepr) > p->pPars->nLevelMax) )
-            continue;
-        if ( p->pPars->fDualOut )
-        {
-//            if ( i % 1000 == 0 && Gia_ObjRepr(p->pAig, i) )
-//                Gia_ManEquivPrintOne( p->pAig, Gia_ObjRepr(p->pAig, i), 0 );
-            if ( p->pPars->fColorDiff )
-            {
-                if ( !Gia_ObjDiffColors( p->pAig, Gia_ObjRepr(p->pAig, i), i ) )
-                    continue;
-            }
-            else
-            {
-                if ( !Gia_ObjDiffColors2( p->pAig, Gia_ObjRepr(p->pAig, i), i ) )
-                    continue;
-            }
-        }
-        pRepr = Gia_ManObj( p->pAig, Gia_ObjRepr(p->pAig, i) );
-        fCompl = Gia_ObjPhaseReal(pObj) ^ Gia_ObjPhaseReal(pRepr);
-        piCopies[i] = Gia_LitNotCond( iRepr, fCompl );
-        if ( Gia_ObjProved(p->pAig, i) )
-            continue;
-        // produce speculative miter
-        iMiter = Gia_ManHashXor( pNew, iNode, piCopies[i] );
-        Gia_ManAppendCo( pNew, iMiter );
-        Vec_IntPush( p->vXorNodes, Gia_ObjRepr(p->pAig, i) );
-        Vec_IntPush( p->vXorNodes, i );
-        // add to the depth of this node
-        pDepths[i] = 1 + ABC_MAX( pDepths[i], pDepths[Gia_ObjRepr(p->pAig, i)] );
-        if ( p->pPars->nDepthMax && pDepths[i] >= p->pPars->nDepthMax )
-            piCopies[i] = -1;
-    }
-    ABC_FREE( piCopies );
-    ABC_FREE( pDepths );
-    Gia_ManHashStop( pNew );
-    Gia_ManSetRegNum( pNew, 0 );
-    pNew = Gia_ManCleanup( pTemp = pNew );
-    Gia_ManStop( pTemp );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManFraClassesUpdate_rec( Gia_Obj_t * pObj )
-{
-    int Result;
-    if ( pObj->fMark0 )
-        return 1;
-    if ( Gia_ObjIsCi(pObj) || Gia_ObjIsConst0(pObj) )
-        return 0;
-    Result = (Cec_ManFraClassesUpdate_rec( Gia_ObjFanin0(pObj) ) |
-              Cec_ManFraClassesUpdate_rec( Gia_ObjFanin1(pObj) ));
-    return pObj->fMark0 = Result;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates simulation info for this round.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_ManFraCreateInfo( Cec_ManSim_t * p, Vec_Ptr_t * vCiInfo, Vec_Ptr_t * vInfo, int nSeries )
-{
-    unsigned * pRes0, * pRes1;
-    int i, w;
-    for ( i = 0; i < Gia_ManCiNum(p->pAig); i++ )
-    {
-        pRes0 = (unsigned *)Vec_PtrEntry( vCiInfo, i );
-        pRes1 = (unsigned *)Vec_PtrEntry( vInfo, i );
-        pRes1 += p->nWords * nSeries;
-        for ( w = 0; w < p->nWords; w++ )
-            pRes0[w] = pRes1[w];
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates equivalence classes using the patterns.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_ManFraClassesUpdate( Cec_ManFra_t * p, Cec_ManSim_t * pSim, Cec_ManPat_t * pPat, Gia_Man_t * pNew )
-{
-    Vec_Ptr_t * vInfo;
-    Gia_Obj_t * pObj, * pObjOld, * pReprOld;
-    int i, k, iRepr, iNode, clk;
-clk = clock();
-    vInfo = Cec_ManPatCollectPatterns( pPat, Gia_ManCiNum(p->pAig), pSim->nWords );
-p->timePat += clock() - clk;
-clk = clock();
-    if ( vInfo != NULL )
-    {
-        Gia_ManSetRefs( p->pAig );
-        for ( i = 0; i < pPat->nSeries; i++ )
-        {
-            Cec_ManFraCreateInfo( pSim, pSim->vCiSimInfo, vInfo, i );
-            if ( Cec_ManSimSimulateRound( pSim, pSim->vCiSimInfo, pSim->vCoSimInfo ) )
-            {
-                Vec_PtrFree( vInfo );
-                return 1;
-            }
-        }
-        Vec_PtrFree( vInfo );
-    }
-p->timeSim += clock() - clk;
-    assert( Vec_IntSize(p->vXorNodes) == 2*Gia_ManCoNum(pNew) );
-    // mark the transitive fanout of failed nodes
-    if ( p->pPars->nDepthMax != 1 )
-    {
-        Gia_ManCleanMark0( p->pAig );
-        Gia_ManCleanMark1( p->pAig );
-        Gia_ManForEachCo( pNew, pObj, k )
-        {
-            iRepr = Vec_IntEntry( p->vXorNodes, 2*k );
-            iNode = Vec_IntEntry( p->vXorNodes, 2*k+1 );
-            if ( pObj->fMark0 == 0 && pObj->fMark1 == 1 ) // proved
-                continue;
-//            Gia_ManObj(p->pAig, iRepr)->fMark0 = 1;
-            Gia_ManObj(p->pAig, iNode)->fMark0 = 1;
-        }
-        // mark the nodes reachable through the failed nodes
-        Gia_ManForEachAnd( p->pAig, pObjOld, k )
-            pObjOld->fMark0 |= (Gia_ObjFanin0(pObjOld)->fMark0 | Gia_ObjFanin1(pObjOld)->fMark0);
-        // unmark the disproved nodes
-        Gia_ManForEachCo( pNew, pObj, k )
-        {
-            iRepr = Vec_IntEntry( p->vXorNodes, 2*k );
-            iNode = Vec_IntEntry( p->vXorNodes, 2*k+1 );
-            if ( pObj->fMark0 == 0 && pObj->fMark1 == 1 ) // proved
-                continue; 
-            pObjOld = Gia_ManObj(p->pAig, iNode);
-            assert( pObjOld->fMark0 == 1 );
-            if ( Gia_ObjFanin0(pObjOld)->fMark0 == 0 && Gia_ObjFanin1(pObjOld)->fMark0 == 0 )
-                pObjOld->fMark1 = 1;
-        }
-        // clean marks
-        Gia_ManForEachAnd( p->pAig, pObjOld, k )
-            if ( pObjOld->fMark1 )
-            {
-                pObjOld->fMark0 = 0;
-                pObjOld->fMark1 = 0;
-            }
-    }
-    // set the results
-    p->nAllProved = p->nAllDisproved = p->nAllFailed = 0;
-    Gia_ManForEachCo( pNew, pObj, k )
-    {
-        iRepr = Vec_IntEntry( p->vXorNodes, 2*k );
-        iNode = Vec_IntEntry( p->vXorNodes, 2*k+1 );
-        pReprOld = Gia_ManObj(p->pAig, iRepr);
-        pObjOld = Gia_ManObj(p->pAig, iNode);
-        if ( pObj->fMark1 )
-        { // proved
-            assert( pObj->fMark0 == 0 );
-            assert( !Gia_ObjProved(p->pAig, iNode) );
-            if ( pReprOld->fMark0 == 0 && pObjOld->fMark0 == 0 )
-//            if ( pObjOld->fMark0 == 0 )
-            {
-                assert( iRepr == Gia_ObjRepr(p->pAig, iNode) );
-                Gia_ObjSetProved( p->pAig, iNode );
-                p->nAllProved++;
-            }
-        }
-        else if ( pObj->fMark0 )
-        { // disproved
-            assert( pObj->fMark1 == 0 );
-            if ( pReprOld->fMark0 == 0 && pObjOld->fMark0 == 0 )
-//            if ( pObjOld->fMark0 == 0 )
-            {
-                if ( iRepr == Gia_ObjRepr(p->pAig, iNode) )
-                    Abc_Print( 1, "Cec_ManFraClassesUpdate(): Error! Node is not refined!\n" );
-                p->nAllDisproved++;
-            }
-        }
-        else
-        { // failed
-            assert( pObj->fMark0 == 0 );
-            assert( pObj->fMark1 == 0 );
-            assert( !Gia_ObjFailed(p->pAig, iNode) );
-            assert( !Gia_ObjProved(p->pAig, iNode) );
-            Gia_ObjSetFailed( p->pAig, iNode );
-            p->nAllFailed++;
-        }
-    } 
-    return 0;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/cecSynth.c b/src/aig/cec/cecSynth.c
deleted file mode 100644
index 52b50a43..00000000
--- a/src/aig/cec/cecSynth.c
+++ /dev/null
@@ -1,380 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cecSynth.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Combinational equivalence checking.]
-
-  Synopsis    [Partitioned sequential synthesis.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cecSynth.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cecInt.h"
-#include "giaAig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Populate sequential synthesis parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cec_SeqSynthesisSetDefaultParams( Cec_ParSeq_t * p )
-{
-    memset( p, 0, sizeof(Cec_ParSeq_t) );
-    p->fUseLcorr    =    0;  // enables latch correspondence
-    p->fUseScorr    =    0;  // enables signal correspondence
-    p->nBTLimit     = 1000;  // (scorr/lcorr) conflict limit at a node
-    p->nFrames      =    1;  // (scorr only) the number of timeframes
-    p->nLevelMax    =   -1;  // (scorr only) the max number of levels
-    p->fConsts      =    1;  // (scl only) merging constants
-    p->fEquivs      =    1;  // (scl only) merging equivalences
-    p->fUseMiniSat  =    0;  // enables MiniSat in lcorr/scorr
-    p->nMinDomSize  =  100;  // the size of minimum clock domain
-    p->fVeryVerbose =    0;  // verbose stats
-    p->fVerbose     =    0;  // verbose stats
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_SeqReadMinDomSize( Cec_ParSeq_t * p )
-{
-    return p->nMinDomSize;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_SeqReadVerbose( Cec_ParSeq_t * p )
-{
-    return p->fVerbose;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes partitioning of registers.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Gia_ManRegCreatePart( Gia_Man_t * p, Vec_Int_t * vPart, int * pnCountPis, int * pnCountRegs, int ** ppMapBack )
-{
-    Gia_Man_t * pNew;
-    Gia_Obj_t * pObj;
-    Vec_Int_t * vNodes, * vRoots;
-    int i, iOut, nCountPis, nCountRegs;
-    int * pMapBack;
-    // collect/mark nodes/PIs in the DFS order from the roots
-    Gia_ManIncrementTravId( p );
-    vRoots  = Vec_IntAlloc( Vec_IntSize(vPart) );
-    Vec_IntForEachEntry( vPart, iOut, i )
-        Vec_IntPush( vRoots, Gia_ObjId(p, Gia_ManCo(p, Gia_ManPoNum(p)+iOut)) );
-    vNodes = Gia_ManCollectNodesCis( p, Vec_IntArray(vRoots), Vec_IntSize(vRoots) );
-    Vec_IntFree( vRoots );
-    // unmark register outputs
-    Vec_IntForEachEntry( vPart, iOut, i )
-        Gia_ObjSetTravIdPrevious( p, Gia_ManCi(p, Gia_ManPiNum(p)+iOut) );
-    // count pure PIs
-    nCountPis = nCountRegs = 0;
-    Gia_ManForEachPi( p, pObj, i )
-        nCountPis += Gia_ObjIsTravIdCurrent(p, pObj);
-    // count outputs of other registers
-    Gia_ManForEachRo( p, pObj, i )
-        nCountRegs += Gia_ObjIsTravIdCurrent(p, pObj); // should be !Gia_... ???
-    if ( pnCountPis )
-        *pnCountPis = nCountPis;
-    if ( pnCountRegs )
-        *pnCountRegs = nCountRegs;
-    // clean old manager
-    Gia_ManFillValue(p);
-    Gia_ManConst0(p)->Value = 0;
-    // create the new manager
-    pNew = Gia_ManStart( Vec_IntSize(vNodes) );
-    // create the PIs
-    Gia_ManForEachCi( p, pObj, i )
-        if ( Gia_ObjIsTravIdCurrent(p, pObj) )
-            pObj->Value = Gia_ManAppendCi(pNew);
-    // add variables for the register outputs
-    // create fake POs to hold the register outputs
-    Vec_IntForEachEntry( vPart, iOut, i )
-    {
-        pObj = Gia_ManCi(p, Gia_ManPiNum(p)+iOut);
-        pObj->Value = Gia_ManAppendCi(pNew);
-        Gia_ManAppendCo( pNew, pObj->Value );
-        Gia_ObjSetTravIdCurrent( p, pObj ); // added
-    }
-    // create the nodes
-    Gia_ManForEachObjVec( vNodes, p, pObj, i )
-        if ( Gia_ObjIsAnd(pObj) )
-            pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
-    // add real POs for the registers
-    Vec_IntForEachEntry( vPart, iOut, i )
-    {
-        pObj = Gia_ManCo( p, Gia_ManPoNum(p)+iOut );
-        Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
-    }
-    Gia_ManSetRegNum( pNew, Vec_IntSize(vPart) );
-    // create map
-    if ( ppMapBack )
-    {
-        pMapBack = ABC_FALLOC( int, Gia_ManObjNum(pNew) );
-        // map constant nodes
-        pMapBack[0] = 0;
-        // logic cones of register outputs
-        Gia_ManForEachObjVec( vNodes, p, pObj, i )
-        {
-//            pObjNew = Aig_Regular(pObj->pData);
-//            pMapBack[pObjNew->Id] = pObj->Id;
-            assert( Gia_Lit2Var(Gia_ObjValue(pObj)) >= 0 );
-            assert( Gia_Lit2Var(Gia_ObjValue(pObj)) < Gia_ManObjNum(pNew) );
-            pMapBack[ Gia_Lit2Var(Gia_ObjValue(pObj)) ] = Gia_ObjId(p, pObj);
-        }
-        // map register outputs
-        Vec_IntForEachEntry( vPart, iOut, i )
-        {
-            pObj = Gia_ManCi(p, Gia_ManPiNum(p)+iOut);
-//            pObjNew = pObj->pData;
-//            pMapBack[pObjNew->Id] = pObj->Id;
-            assert( Gia_Lit2Var(Gia_ObjValue(pObj)) >= 0 );
-            assert( Gia_Lit2Var(Gia_ObjValue(pObj)) < Gia_ManObjNum(pNew) );
-            pMapBack[ Gia_Lit2Var(Gia_ObjValue(pObj)) ] = Gia_ObjId(p, pObj);
-        }
-        *ppMapBack = pMapBack;
-    }
-    Vec_IntFree( vNodes );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transfers the classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Gia_TransferMappedClasses( Gia_Man_t * pPart, int * pMapBack, int * pReprs )
-{
-    Gia_Obj_t * pObj;
-    int i, Id1, Id2, nClasses;
-    if ( pPart->pReprs == NULL ) 
-        return 0;
-    nClasses = 0;
-    Gia_ManForEachObj( pPart, pObj, i )
-    {
-        if ( Gia_ObjRepr(pPart, i) == GIA_VOID )
-            continue;
-        assert( i                     < Gia_ManObjNum(pPart) );
-        assert( Gia_ObjRepr(pPart, i) < Gia_ManObjNum(pPart) );
-        Id1 = pMapBack[ i ];
-        Id2 = pMapBack[ Gia_ObjRepr(pPart, i) ];
-        if ( Id1 == Id2 )
-            continue;
-        if ( Id1 < Id2 )
-            pReprs[Id2] = Id1;
-        else
-            pReprs[Id1] = Id2;
-        nClasses++;
-    }
-    return nClasses;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Gia_ManFindRepr_rec( int * pReprs, int Id )
-{
-    if ( pReprs[Id] == 0 )
-        return 0;
-    if ( pReprs[Id] == ~0 )
-        return Id;
-    return Gia_ManFindRepr_rec( pReprs, pReprs[Id] );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Normalizes equivalences.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Gia_ManNormalizeEquivalences( Gia_Man_t * p, int * pReprs )
-{
-    int i, iRepr;
-    assert( p->pReprs == NULL );
-    assert( p->pNexts == NULL );
-    p->pReprs = ABC_CALLOC( Gia_Rpr_t, Gia_ManObjNum(p) );
-    for ( i = 0; i < Gia_ManObjNum(p); i++ )
-        Gia_ObjSetRepr( p, i, GIA_VOID );
-    for ( i = 0; i < Gia_ManObjNum(p); i++ )
-    {
-        if ( pReprs[i] == ~0 )
-            continue;
-        iRepr = Gia_ManFindRepr_rec( pReprs, i );
-        Gia_ObjSetRepr( p, i, iRepr );
-    }
-    p->pNexts = Gia_ManDeriveNexts( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Partitioned sequential synthesis.]
-
-  Description [Returns AIG annotated with equivalence classes.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cec_SequentialSynthesisPart( Gia_Man_t * p, Cec_ParSeq_t * pPars )
-{
-    int fPrintParts = 0;
-    char Buffer[100];
-    Gia_Man_t * pTemp;
-    Vec_Ptr_t * vParts = (Vec_Ptr_t *)p->vClockDoms;
-    Vec_Int_t * vPart;
-    int * pMapBack, * pReprs;
-    int i, nCountPis, nCountRegs;
-    int nClasses, clk = clock();
-
-    // save parameters
-    if ( fPrintParts )
-    {
-        // print partitions
-        Abc_Print( 1, "The following clock domains are used:\n" );
-        Vec_PtrForEachEntry( Vec_Int_t *, vParts, vPart, i )
-        {
-            pTemp = Gia_ManRegCreatePart( p, vPart, &nCountPis, &nCountRegs, NULL );
-            sprintf( Buffer, "part%03d.aig", i );
-            Gia_WriteAiger( pTemp, Buffer, 0, 0 );
-            Abc_Print( 1, "part%03d.aig : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d.\n", 
-                i, Vec_IntSize(vPart), Gia_ManCiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Gia_ManAndNum(pTemp) );
-            Gia_ManStop( pTemp );
-        }
-    }
-
-    // perform sequential synthesis for clock domains
-    pReprs = ABC_FALLOC( int, Gia_ManObjNum(p) );
-    Vec_PtrForEachEntry( Vec_Int_t *, vParts, vPart, i )
-    {
-        pTemp = Gia_ManRegCreatePart( p, vPart, &nCountPis, &nCountRegs, &pMapBack );
-        if ( nCountPis > 0 ) 
-        {
-            if ( pPars->fUseScorr )
-            {
-                Cec_ParCor_t CorPars, * pCorPars = &CorPars;
-                Cec_ManCorSetDefaultParams( pCorPars );
-                pCorPars->nBTLimit   = pPars->nBTLimit;
-                pCorPars->nLevelMax  = pPars->nLevelMax;
-                pCorPars->fVerbose   = pPars->fVeryVerbose;
-                pCorPars->fUseCSat   = 1;
-                Cec_ManLSCorrespondenceClasses( pTemp, pCorPars );
-            }
-            else if ( pPars->fUseLcorr )
-            {
-                Cec_ParCor_t CorPars, * pCorPars = &CorPars;
-                Cec_ManCorSetDefaultParams( pCorPars );
-                pCorPars->fLatchCorr = 1;
-                pCorPars->nBTLimit   = pPars->nBTLimit;
-                pCorPars->fVerbose   = pPars->fVeryVerbose;
-                pCorPars->fUseCSat   = 1;
-                Cec_ManLSCorrespondenceClasses( pTemp, pCorPars );
-            }
-            else
-            {
-//                pNew = Gia_ManSeqStructSweep( pTemp, pPars->fConsts, pPars->fEquivs, pPars->fVerbose );
-//                Gia_ManStop( pNew );
-                Gia_ManSeqCleanupClasses( pTemp, pPars->fConsts, pPars->fEquivs, pPars->fVerbose );
-            }
-//Abc_Print( 1, "Part equivalences = %d.\n", Gia_ManEquivCountLitsAll(pTemp) );
-            nClasses = Gia_TransferMappedClasses( pTemp, pMapBack, pReprs );
-            if ( pPars->fVerbose )
-            {
-                Abc_Print( 1, "%3d : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d. Cl = %5d.\n", 
-                    i, Vec_IntSize(vPart), Gia_ManCiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Gia_ManAndNum(pTemp), nClasses );
-            }
-        }
-        Gia_ManStop( pTemp );
-        ABC_FREE( pMapBack );
-    }
-
-    // generate resulting equivalences
-    Gia_ManNormalizeEquivalences( p, pReprs );
-//Abc_Print( 1, "Total equivalences = %d.\n", Gia_ManEquivCountLitsAll(p) );
-    ABC_FREE( pReprs );
-    if ( pPars->fVerbose )
-    {
-        Abc_PrintTime( 1, "Total time", clock() - clk );
-    }
-    return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cec/module.make b/src/aig/cec/module.make
deleted file mode 100644
index 42e0cd1b..00000000
--- a/src/aig/cec/module.make
+++ /dev/null
@@ -1,13 +0,0 @@
-SRC +=    src/aig/cec/cecCec.c \
-    src/aig/cec/cecChoice.c \
-    src/aig/cec/cecClass.c \
-    src/aig/cec/cecCore.c \
-    src/aig/cec/cecCorr.c \
-    src/aig/cec/cecIso.c \
-    src/aig/cec/cecMan.c \
-    src/aig/cec/cecPat.c \
-    src/aig/cec/cecSeq.c \
-    src/aig/cec/cecSim.c \
-    src/aig/cec/cecSolve.c \
-    src/aig/cec/cecSynth.c \
-    src/aig/cec/cecSweep.c
diff --git a/src/aig/cgt/cgt.h b/src/aig/cgt/cgt.h
deleted file mode 100644
index aa8f9338..00000000
--- a/src/aig/cgt/cgt.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cgt.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Clock gating package.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cgt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __CGT_H__
-#define __CGT_H__
-
-
-/* 
-    The algorithm implemented in this package is based on the paper:
-    A. Hurst. "Automatic synthesis of clock gating logic with controlled 
-    netlist perturbation", DAC 2008.
-*/
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Cgt_Par_t_ Cgt_Par_t;
-struct Cgt_Par_t_
-{
-    int          nLevelMax;      // the max number of levels to look for clock-gates
-    int          nCandMax;       // the max number of candidates at each node
-    int          nOdcMax;        // the max number of ODC levels to consider
-    int          nConfMax;       // the max number of conflicts at a node
-    int          nVarsMin;       // the min number of variables to recycle the SAT solver
-    int          nFlopsMin;      // the min number of flops needed to recycle the SAT solver
-    int          fAreaOnly;      // derive clock gating to minimize area
-    int          fVerbose;       // verbosity flag
-    int          fVeryVerbose;   // verbosity flag
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== cgtCore.c ==========================================================*/
-extern void            Cgt_SetDefaultParams( Cgt_Par_t * p );
-extern Vec_Vec_t *     Cgt_ClockGatingCandidates( Aig_Man_t * pAig, Aig_Man_t * pCare, Cgt_Par_t * pPars );
-extern Aig_Man_t *     Cgt_ClockGating( Aig_Man_t * pAig, Aig_Man_t * pCare, Cgt_Par_t * pPars );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/cgt/cgtAig.c b/src/aig/cgt/cgtAig.c
deleted file mode 100644
index 428fcd1a..00000000
--- a/src/aig/cgt/cgtAig.c
+++ /dev/null
@@ -1,601 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cgtAig.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Clock gating package.]
-
-  Synopsis    [Creates AIG to compute clock-gating.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cgtAig.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cgtInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Computes transitive fanout cone of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_ManDetectCandidates_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, int nLevelMax, Vec_Ptr_t * vCands )
-{
-    if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent(pAig, pObj);
-    if ( Aig_ObjIsNode(pObj) )
-    {
-        Cgt_ManDetectCandidates_rec( pAig, Aig_ObjFanin0(pObj), nLevelMax, vCands );
-        Cgt_ManDetectCandidates_rec( pAig, Aig_ObjFanin1(pObj), nLevelMax, vCands );
-    }
-    if ( Aig_ObjLevel(pObj) <= nLevelMax )
-        Vec_PtrPush( vCands, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes transitive fanout cone of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_ManDetectCandidates( Aig_Man_t * pAig, Aig_Obj_t * pObj, int nLevelMax, Vec_Ptr_t * vCands )
-{
-    Vec_PtrClear( vCands );
-    if ( !Aig_ObjIsNode(pObj) )
-        return;
-    Aig_ManIncrementTravId( pAig );
-    Cgt_ManDetectCandidates_rec( pAig, pObj, nLevelMax, vCands );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes transitive fanout cone of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_ManDetectFanout_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, int nOdcMax, Vec_Ptr_t * vFanout )
-{
-    Aig_Obj_t * pFanout;
-    int f, iFanout;
-    if ( Aig_ObjIsPo(pObj) || Aig_ObjLevel(pObj) > nOdcMax )
-        return;
-    if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent(pAig, pObj);
-    Vec_PtrPush( vFanout, pObj );
-    Aig_ObjForEachFanout( pAig, pObj, pFanout, iFanout, f )
-        Cgt_ManDetectFanout_rec( pAig, pFanout, nOdcMax, vFanout );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes transitive fanout cone of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_ManDetectFanout( Aig_Man_t * pAig, Aig_Obj_t * pObj, int nOdcMax, Vec_Ptr_t * vFanout )
-{
-    Aig_Obj_t * pFanout;
-    int i, k, f, iFanout;
-    // collect visited nodes
-    Vec_PtrClear( vFanout );
-    Aig_ManIncrementTravId( pAig );
-    Cgt_ManDetectFanout_rec( pAig, pObj, nOdcMax, vFanout );
-    // remove those nodes whose fanout is included
-    k = 0;
-    Vec_PtrForEachEntry( Aig_Obj_t *, vFanout, pObj, i )
-    {
-        // go through the fanouts of this node
-        Aig_ObjForEachFanout( pAig, pObj, pFanout, iFanout, f )
-            if ( !Aig_ObjIsTravIdCurrent(pAig, pFanout) )
-                break;
-        if ( f == Aig_ObjRefs(pObj) ) // all fanouts are included
-            continue;
-        Vec_PtrWriteEntry( vFanout, k++, pObj );
-    }
-    Vec_PtrShrink( vFanout, k );
-    Vec_PtrSort( vFanout, (int (*)(void))Aig_ObjCompareIdIncrease );
-    assert( Vec_PtrSize(vFanout) > 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes visited nodes in the topological order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_ManCollectVisited_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Ptr_t * vVisited )
-{
-    if ( Aig_ObjIsPi(pObj) )
-        return;
-    if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent(pAig, pObj);
-    assert( Aig_ObjIsNode(pObj) );
-    Cgt_ManCollectVisited_rec( pAig, Aig_ObjFanin0(pObj), vVisited );
-    Cgt_ManCollectVisited_rec( pAig, Aig_ObjFanin1(pObj), vVisited );
-    Vec_PtrPush( vVisited, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes visited nodes in the topological order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_ManCollectVisited( Aig_Man_t * pAig, Vec_Ptr_t * vFanout, Vec_Ptr_t * vVisited )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Vec_PtrClear( vVisited );
-    Aig_ManIncrementTravId( pAig );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vFanout, pObj, i )
-        Cgt_ManCollectVisited_rec( pAig, pObj, vVisited );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Aig_Obj_t *  Aig_ObjChild0CopyVec( Vec_Ptr_t * vCopy, Aig_Obj_t * pObj )  
-{ return Aig_NotCond((Aig_Obj_t *)Vec_PtrEntry(vCopy, Aig_ObjFaninId0(pObj)), Aig_ObjFaninC0(pObj));  }
-static inline Aig_Obj_t *  Aig_ObjChild1CopyVec( Vec_Ptr_t * vCopy, Aig_Obj_t * pObj )  
-{ return Aig_NotCond((Aig_Obj_t *)Vec_PtrEntry(vCopy, Aig_ObjFaninId1(pObj)), Aig_ObjFaninC1(pObj));  }
-
-/**Function*************************************************************
-
-  Synopsis    [Derives miter for clock-gating.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Cgt_ManConstructCareCondition( Cgt_Man_t * p, Aig_Man_t * pNew, Aig_Obj_t * pObjLo, Vec_Ptr_t * vCopy0, Vec_Ptr_t * vCopy1 )
-{
-    Aig_Obj_t * pMiter, * pObj, * pTemp;
-    int i;
-    assert( Aig_ObjIsPi(pObjLo) );
-    // detect nodes and their cone
-    Cgt_ManDetectFanout( p->pAig, pObjLo, p->pPars->nOdcMax, p->vFanout );
-    Cgt_ManCollectVisited( p->pAig, p->vFanout, p->vVisited );
-    // add new variables if the observability condition depends on PI variables
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vVisited, pObj, i )
-    {
-        assert( Aig_ObjIsNode(pObj) );
-        if ( Saig_ObjIsPi(p->pAig, Aig_ObjFanin0(pObj)) && Vec_PtrEntry(vCopy0, Aig_ObjFaninId0(pObj)) == NULL )
-        {
-            pTemp = Aig_ObjCreatePi( pNew );
-            Vec_PtrWriteEntry( vCopy0, Aig_ObjFaninId0(pObj), pTemp );
-            Vec_PtrWriteEntry( vCopy1, Aig_ObjFaninId0(pObj), pTemp );
-        }
-        if ( Saig_ObjIsPi(p->pAig, Aig_ObjFanin1(pObj)) && Vec_PtrEntry(vCopy0, Aig_ObjFaninId1(pObj)) == NULL )
-        {
-            pTemp = Aig_ObjCreatePi( pNew );
-            Vec_PtrWriteEntry( vCopy0, Aig_ObjFaninId1(pObj), pTemp );
-            Vec_PtrWriteEntry( vCopy1, Aig_ObjFaninId1(pObj), pTemp );
-        }
-    }
-    // construct AIGs for the nodes
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vVisited, pObj, i )
-    {
-        pTemp = Aig_And( pNew, Aig_ObjChild0CopyVec(vCopy0, pObj), Aig_ObjChild1CopyVec(vCopy0, pObj) );
-        Vec_PtrWriteEntry( vCopy0, Aig_ObjId(pObj), pTemp );
-        pTemp = Aig_And( pNew, Aig_ObjChild0CopyVec(vCopy1, pObj), Aig_ObjChild1CopyVec(vCopy1, pObj) );
-        Vec_PtrWriteEntry( vCopy1, Aig_ObjId(pObj), pTemp );
-    }
-    // construct the care miter
-    pMiter = Aig_ManConst0( pNew );
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vFanout, pObj, i )
-    {
-        pTemp = Aig_Exor( pNew, (Aig_Obj_t *)Vec_PtrEntry(vCopy0, Aig_ObjId(pObj)), (Aig_Obj_t *)Vec_PtrEntry(vCopy1, Aig_ObjId(pObj)) );
-        pMiter = Aig_Or( pNew, pMiter, pTemp );
-    }
-    return pMiter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives AIG for clock-gating.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Cgt_ManDeriveAigForGating( Cgt_Man_t * p )
-{
-    Aig_Man_t * pNew;
-    Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pCare, * pMiter;
-    Vec_Ptr_t * vCopy0, * vCopy1;
-    int i;
-    assert( Aig_ManRegNum(p->pAig) );
-    pNew = Aig_ManStart( Aig_ManObjNumMax(p->pAig) );
-    pNew->pName = Aig_UtilStrsav( "CG_miter" );
-    // build the first frame
-    Aig_ManConst1(p->pAig)->pData = Aig_ManConst1(pNew);
-    Aig_ManForEachPi( p->pAig, pObj, i )
-        pObj->pData = Aig_ObjCreatePi( pNew );
-    Aig_ManForEachNode( p->pAig, pObj, i )
-        pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-//    Saig_ManForEachPo( p->pAig, pObj, i )
-//        pObj->pData = Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
-    if ( p->pPars->nOdcMax > 0 )
-    {
-        // create storage for observability conditions
-        vCopy0 = Vec_PtrStart( Aig_ManObjNumMax(p->pAig) );
-        vCopy1 = Vec_PtrStart( Aig_ManObjNumMax(p->pAig) );
-        // initialize register outputs
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-        {
-            Vec_PtrWriteEntry( vCopy0, Aig_ObjId(pObjLo), Aig_ObjChild0Copy(pObjLi) );
-            Vec_PtrWriteEntry( vCopy1, Aig_ObjId(pObjLo), Aig_ObjChild0Copy(pObjLi) );
-        }
-        // compute observability condition for each latch output
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-        {
-            // set the constants
-            Vec_PtrWriteEntry( vCopy0, Aig_ObjId(pObjLo), Aig_ManConst0(pNew) );
-            Vec_PtrWriteEntry( vCopy1, Aig_ObjId(pObjLo), Aig_ManConst1(pNew) );
-            // compute condition
-            pCare = Cgt_ManConstructCareCondition( p, pNew, pObjLo, vCopy0, vCopy1 );
-            // restore the values
-            Vec_PtrWriteEntry( vCopy0, Aig_ObjId(pObjLo), Aig_ObjChild0Copy(pObjLi) );
-            Vec_PtrWriteEntry( vCopy1, Aig_ObjId(pObjLo), Aig_ObjChild0Copy(pObjLi) );
-            // compute the miter
-            pMiter = Aig_Exor( pNew, (Aig_Obj_t *)pObjLo->pData, Aig_ObjChild0Copy(pObjLi) );
-            pMiter = Aig_And( pNew, pMiter, pCare );
-            pObjLi->pData = Aig_ObjCreatePo( pNew, pMiter );
-        }
-        Vec_PtrFree( vCopy0 );
-        Vec_PtrFree( vCopy1 );
-    }
-    else
-    {
-        // construct clock-gating miters for each register input
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-        {
-            pMiter = Aig_Exor( pNew, (Aig_Obj_t *)pObjLo->pData, Aig_ObjChild0Copy(pObjLi) );
-            pObjLi->pData = Aig_ObjCreatePo( pNew, pMiter );
-        }
-    }
-    Aig_ManCleanup( pNew );
-    Aig_ManSetPioNumbers( pNew );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds relevant constraints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Cgt_ManConstructCare_rec( Aig_Man_t * pCare, Aig_Obj_t * pObj, Aig_Man_t * pNew )
-{
-    Aig_Obj_t * pObj0, * pObj1;
-    if ( Aig_ObjIsTravIdCurrent( pCare, pObj ) )
-        return (Aig_Obj_t *)pObj->pData;
-    Aig_ObjSetTravIdCurrent( pCare, pObj );
-    if ( Aig_ObjIsPi(pObj) )
-        return (Aig_Obj_t *)(pObj->pData = NULL);
-    pObj0 = Cgt_ManConstructCare_rec( pCare, Aig_ObjFanin0(pObj), pNew );
-    if ( pObj0 == NULL )
-        return (Aig_Obj_t *)(pObj->pData = NULL);
-    pObj1 = Cgt_ManConstructCare_rec( pCare, Aig_ObjFanin1(pObj), pNew );
-    if ( pObj1 == NULL )
-        return (Aig_Obj_t *)(pObj->pData = NULL);
-    pObj0 = Aig_NotCond( pObj0, Aig_ObjFaninC0(pObj) );
-    pObj1 = Aig_NotCond( pObj1, Aig_ObjFaninC1(pObj) );
-    return (Aig_Obj_t *)(pObj->pData = Aig_And( pNew, pObj0, pObj1 ));
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Builds constraints belonging to the given partition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_ManConstructCare( Aig_Man_t * pNew, Aig_Man_t * pCare, Vec_Vec_t * vSuppsInv, Vec_Ptr_t * vLeaves )
-{
-    Vec_Int_t * vOuts;
-    Aig_Obj_t * pLeaf, * pPi, * pPo, * pObjAig;
-    int i, k, iOut;
-    // go through the PIs of the partition
-    // label the corresponding PIs of the care set
-    Aig_ManIncrementTravId( pCare );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pLeaf, i )
-    {
-        pPi = Aig_ManPi( pCare, Aig_ObjPioNum(pLeaf) );
-        Aig_ObjSetTravIdCurrent( pCare, pPi );
-        pPi->pData = pLeaf->pData;
-    }
-    // construct the constraints
-    Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pLeaf, i )
-    {
-        vOuts = Vec_VecEntryInt( vSuppsInv, Aig_ObjPioNum(pLeaf) );
-        Vec_IntForEachEntry( vOuts, iOut, k )
-        {
-            pPo = Aig_ManPo( pCare, iOut );
-            if ( Aig_ObjIsTravIdCurrent( pCare, pPo ) )
-                continue;
-            Aig_ObjSetTravIdCurrent( pCare, pPo );
-            if ( Aig_ObjFanin0(pPo) == Aig_ManConst1(pCare) )
-                continue;
-            pObjAig = Cgt_ManConstructCare_rec( pCare, Aig_ObjFanin0(pPo), pNew );
-            if ( pObjAig == NULL )
-                continue;
-            pObjAig = Aig_NotCond( pObjAig, Aig_ObjFaninC0(pPo) );
-            Aig_ObjCreatePo( pNew, pObjAig );
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates the AIG recursively.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Cgt_ManDupPartition_rec( Aig_Man_t * pNew, Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Ptr_t * vLeaves )
-{
-    if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
-        return (Aig_Obj_t *)pObj->pData;
-    Aig_ObjSetTravIdCurrent(pAig, pObj);
-    if ( Aig_ObjIsPi(pObj) )
-    {
-        pObj->pData = Aig_ObjCreatePi( pNew );
-        Vec_PtrPush( vLeaves, pObj );
-        return (Aig_Obj_t *)pObj->pData;
-    }
-    Cgt_ManDupPartition_rec( pNew, pAig, Aig_ObjFanin0(pObj), vLeaves );
-    Cgt_ManDupPartition_rec( pNew, pAig, Aig_ObjFanin1(pObj), vLeaves );
-    return (Aig_Obj_t *)(pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) ));
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates register outputs starting from the given one.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Cgt_ManDupPartition( Aig_Man_t * pFrame, int nVarsMin, int nFlopsMin, int iStart, Aig_Man_t * pCare, Vec_Vec_t * vSuppsInv, int * pnOutputs )
-{
-    Vec_Ptr_t * vRoots, * vLeaves, * vPos;
-    Aig_Man_t * pNew;
-    Aig_Obj_t * pObj;
-    int i;
-    assert( Aig_ManRegNum(pFrame) == 0 );
-    vRoots = Vec_PtrAlloc( 100 );
-    vLeaves = Vec_PtrAlloc( 100 ); 
-    vPos = Vec_PtrAlloc( 100 );
-    pNew = Aig_ManStart( nVarsMin );
-    pNew->pName = Aig_UtilStrsav( "partition" );
-    Aig_ManIncrementTravId( pFrame );
-    Aig_ManConst1(pFrame)->pData = Aig_ManConst1(pNew);
-    Aig_ObjSetTravIdCurrent( pFrame, Aig_ManConst1(pFrame) );
-    for ( i = iStart; i < iStart + nFlopsMin && i < Aig_ManPoNum(pFrame); i++ )
-    {
-        pObj = Aig_ManPo( pFrame, i );
-        Cgt_ManDupPartition_rec( pNew, pFrame, Aig_ObjFanin0(pObj), vLeaves );
-        Vec_PtrPush( vRoots, Aig_ObjChild0Copy(pObj) );
-        Vec_PtrPush( vPos, pObj );
-    }
-    for ( ; Aig_ManObjNum(pNew) < nVarsMin && i < Aig_ManPoNum(pFrame); i++ )
-    {
-        pObj = Aig_ManPo( pFrame, i );
-        Cgt_ManDupPartition_rec( pNew, pFrame, Aig_ObjFanin0(pObj), vLeaves );
-        Vec_PtrPush( vRoots, Aig_ObjChild0Copy(pObj) );
-        Vec_PtrPush( vPos, pObj );
-    }
-    assert( nFlopsMin >= Vec_PtrSize(vRoots) || Vec_PtrSize(vRoots) >= nFlopsMin );
-    // create constaints
-    if ( pCare )
-        Cgt_ManConstructCare( pNew, pCare, vSuppsInv, vLeaves );
-    // create POs
-    Vec_PtrForEachEntry( Aig_Obj_t *, vPos, pObj, i )
-        pObj->pData = (Aig_Obj_t *)Aig_ObjCreatePo( pNew, (Aig_Obj_t *)Vec_PtrEntry(vRoots, i) );
-    if ( pnOutputs != NULL )
-        *pnOutputs = Vec_PtrSize( vPos );
-    Vec_PtrFree( vRoots );
-    Vec_PtrFree( vLeaves );
-    Vec_PtrFree( vPos );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Implements one clock-gate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Cgt_ManBuildClockGate( Aig_Man_t * pNew, Vec_Ptr_t * vGates )
-{
-    Aig_Obj_t * pGate, * pTotal;
-    int i;
-    assert( Vec_PtrSize(vGates) > 0 );
-    pTotal = Aig_ManConst0(pNew);
-    Vec_PtrForEachEntry( Aig_Obj_t *, vGates, pGate, i )
-    {
-        if ( Aig_Regular(pGate)->pNext )
-            pGate = Aig_NotCond( Aig_Regular(pGate)->pNext, Aig_IsComplement(pGate) );
-        else
-            pGate = Aig_NotCond( (Aig_Obj_t *)Aig_Regular(pGate)->pData, Aig_IsComplement(pGate) );
-        pTotal = Aig_Or( pNew, pTotal, pGate );
-    }
-    return pTotal;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives AIG after clock-gating.]
-
-  Description [The array contains, for each flop, its gate if present.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Cgt_ManDeriveGatedAig( Aig_Man_t * pAig, Vec_Vec_t * vGates, int fReduce, int * pnUsedNodes )
-{
-    Aig_Man_t * pNew;
-    Aig_Obj_t * pObj, * pObjNew, * pObjLi, * pObjLo, * pGateNew;
-    Vec_Ptr_t * vOne;
-    int i, k;
-    Aig_ManCleanNext( pAig );
-    // label nodes
-    Vec_VecForEachEntry( Aig_Obj_t *, vGates, pObj, i, k )
-    {
-        if ( Aig_IsComplement(pObj) )
-            Aig_Regular(pObj)->fMarkB = 1;
-        else
-            Aig_Regular(pObj)->fMarkA = 1;
-    }
-    // construct AIG
-    assert( Aig_ManRegNum(pAig) );
-    pNew = Aig_ManStart( Aig_ManObjNumMax(pAig) );
-    pNew->pName = Aig_UtilStrsav( pAig->pName );
-    pNew->pSpec = Aig_UtilStrsav( pAig->pSpec );
-    Aig_ManConst1(pAig)->pData = Aig_ManConst1(pNew);
-    Aig_ManForEachPi( pAig, pObj, i )
-        pObj->pData = Aig_ObjCreatePi( pNew );
-    if ( fReduce )
-    {
-        Aig_ManForEachNode( pAig, pObj, i )
-        {
-            assert( !(pObj->fMarkA && pObj->fMarkB) );
-            pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-            if ( pObj->fMarkA )
-            {
-                pObj->pNext = (Aig_Obj_t *)pObj->pData;
-                pObj->pData = Aig_ManConst0(pNew);
-            }
-            else if ( pObj->fMarkB )
-            {
-                pObj->pNext = (Aig_Obj_t *)pObj->pData;
-                pObj->pData = Aig_ManConst1(pNew);
-            }
-        }
-    }
-    else
-    {
-        Aig_ManForEachNode( pAig, pObj, i )
-            pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-    }
-    if ( pnUsedNodes != NULL )
-        *pnUsedNodes = Aig_ManNodeNum(pNew);
-    Saig_ManForEachPo( pAig, pObj, i )
-        pObj->pData = Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
-    Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
-    {
-        vOne = Vec_VecEntry( vGates, i );
-        if ( Vec_PtrSize(vOne) == 0 )
-            pObjNew = Aig_ObjChild0Copy(pObjLi);
-        else
-        {
-//            pGateNew = Aig_NotCond( Aig_Regular(pGate)->pData, Aig_IsComplement(pGate) );
-            pGateNew = Cgt_ManBuildClockGate( pNew, vOne );
-            pObjNew = Aig_Mux( pNew, pGateNew, (Aig_Obj_t *)pObjLo->pData, Aig_ObjChild0Copy(pObjLi) );
-        }
-        pObjLi->pData = Aig_ObjCreatePo( pNew, pObjNew );
-    }
-    Aig_ManCleanup( pNew );
-    Aig_ManSetRegNum( pNew, Aig_ManRegNum(pAig) );
-    // unlabel nodes
-    Aig_ManCleanMarkAB( pAig );
-    Aig_ManCleanNext( pAig );
-    return pNew;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cgt/cgtCore.c b/src/aig/cgt/cgtCore.c
deleted file mode 100644
index d4229ce6..00000000
--- a/src/aig/cgt/cgtCore.c
+++ /dev/null
@@ -1,321 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cgtCore.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Clock gating package.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cgtCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cgtInt.h"
-#include "bar.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_SetDefaultParams( Cgt_Par_t * p )
-{
-    memset( p, 0, sizeof(Cgt_Par_t) );
-    p->nLevelMax  =    25;   // the max number of levels to look for clock-gates
-    p->nCandMax   =  1000;   // the max number of candidates at each node
-    p->nOdcMax    =     0;   // the max number of ODC levels to consider
-    p->nConfMax   =    10;   // the max number of conflicts at a node
-    p->nVarsMin   =  1000;   // the min number of vars to recycle the SAT solver
-    p->nFlopsMin  =     5;   // the min number of flops to recycle the SAT solver
-    p->fAreaOnly  =     0;   // derive clock-gating to minimize area
-    p->fVerbose   =     1;   // verbosity flag
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation does not filter out this candidate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cgt_SimulationFilter( Cgt_Man_t * p, Aig_Obj_t * pCandPart, Aig_Obj_t * pMiterPart )
-{
-    unsigned * pInfoCand, * pInfoMiter;
-    int w, nWords = Aig_BitWordNum( p->nPatts );  
-    pInfoCand  = (unsigned *)Vec_PtrEntry( p->vPatts, Aig_ObjId(Aig_Regular(pCandPart)) );
-    pInfoMiter = (unsigned *)Vec_PtrEntry( p->vPatts, Aig_ObjId(pMiterPart) );
-    // C => !M -- true   is the same as    C & M -- false
-    if ( !Aig_IsComplement(pCandPart) )
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( pInfoCand[w] & pInfoMiter[w] )
-                return 0;
-    }
-    else
-    {
-        for ( w = 0; w < nWords; w++ )
-            if ( ~pInfoCand[w] & pInfoMiter[w] )
-                return 0;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Saves one simulation pattern.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_SimulationRecord( Cgt_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManForEachObj( p->pPart, pObj, i )
-        if ( sat_solver_var_value( p->pSat, p->pCnf->pVarNums[i] ) )
-            Aig_InfoSetBit( (unsigned *)Vec_PtrEntry(p->vPatts, i), p->nPatts );
-    p->nPatts++;
-    if ( p->nPatts == 32 * p->nPattWords )
-    {
-        Vec_PtrReallocSimInfo( p->vPatts );
-        Vec_PtrCleanSimInfo( p->vPatts, p->nPattWords, 2 * p->nPattWords );
-        p->nPattWords *= 2;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs clock-gating for the AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_ClockGatingRangeCheck( Cgt_Man_t * p, int iStart, int nOutputs )
-{
-    Vec_Ptr_t * vNodes = p->vFanout;
-    Aig_Obj_t * pMiter, * pCand, * pMiterFrame, * pCandFrame, * pMiterPart, * pCandPart;
-    int i, k, RetValue, nCalls;
-    assert( Vec_VecSize(p->vGatesAll) == Aig_ManPoNum(p->pFrame) );
-    // go through all the registers inputs of this range
-    for ( i = iStart; i < iStart + nOutputs; i++ )
-    {
-        nCalls = p->nCalls;
-        pMiter = Saig_ManLi( p->pAig, i );
-        Cgt_ManDetectCandidates( p->pAig, Aig_ObjFanin0(pMiter), p->pPars->nLevelMax, vNodes );
-        // go through the candidates of this PO
-        Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pCand, k )
-        {
-            // get the corresponding nodes from the frames
-            pCandFrame  = (Aig_Obj_t *)pCand->pData;
-            pMiterFrame = (Aig_Obj_t *)pMiter->pData;
-            // get the corresponding nodes from the part
-            pCandPart   = (Aig_Obj_t *)pCandFrame->pData;
-            pMiterPart  = (Aig_Obj_t *)pMiterFrame->pData;
-            // try direct polarity
-            if ( Cgt_SimulationFilter( p, pCandPart, pMiterPart ) )
-            {
-                RetValue = Cgt_CheckImplication( p, pCandPart, pMiterPart );
-                if ( RetValue == 1 )
-                {
-                    Vec_VecPush( p->vGatesAll, i, pCand );
-                    continue;
-                }
-                if ( RetValue == 0 )
-                    Cgt_SimulationRecord( p );
-            }
-            else
-                p->nCallsFiltered++;
-            // try reverse polarity
-            if ( Cgt_SimulationFilter( p, Aig_Not(pCandPart), pMiterPart ) )
-            {
-                RetValue = Cgt_CheckImplication( p, Aig_Not(pCandPart), pMiterPart );
-                if ( RetValue == 1 )
-                {
-                    Vec_VecPush( p->vGatesAll, i, Aig_Not(pCand) );
-                    continue;
-                }
-                if ( RetValue == 0 )
-                    Cgt_SimulationRecord( p );
-            }
-            else
-                p->nCallsFiltered++;
-        }
-
-        if ( p->pPars->fVerbose )
-        {
-//            printf( "Flop %3d : Cand = %4d. Gate = %4d. SAT calls = %3d.\n", 
-//                i, Vec_PtrSize(vNodes), Vec_PtrSize(Vec_VecEntry(p->vGatesAll, i)), p->nCalls-nCalls );
-        }
-
-    }
-} 
-
-/**Function*************************************************************
-
-  Synopsis    [Performs clock-gating for the AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cgt_ClockGatingRange( Cgt_Man_t * p, int iStart )
-{
-    int nOutputs, iStop, clk, clkTotal = clock();
-    int nCallsUnsat    = p->nCallsUnsat;
-    int nCallsSat      = p->nCallsSat;
-    int nCallsUndec    = p->nCallsUndec;
-    int nCallsFiltered = p->nCallsFiltered;
-clk = clock();
-    p->pPart = Cgt_ManDupPartition( p->pFrame, p->pPars->nVarsMin, p->pPars->nFlopsMin, iStart, p->pCare, p->vSuppsInv, &nOutputs );
-    p->pCnf  = Cnf_DeriveSimple( p->pPart, nOutputs );
-    p->pSat  = (sat_solver *)Cnf_DataWriteIntoSolver( p->pCnf, 1, 0 );
-    sat_solver_compress( p->pSat );
-    p->vPatts = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p->pPart), p->nPattWords );
-    Vec_PtrCleanSimInfo( p->vPatts, 0, p->nPattWords );
-p->timePrepare += clock() - clk;
-    Cgt_ClockGatingRangeCheck( p, iStart, nOutputs );
-    iStop = iStart + nOutputs;
-    if ( p->pPars->fVeryVerbose )
-    {
-        printf( "%5d : D =%4d. C =%5d. Var =%6d. Pr =%5d. Cex =%5d. F =%4d. Saved =%6d. ",
-            iStart, iStop-iStart, Aig_ManPoNum(p->pPart)-nOutputs, p->pSat->size, 
-            p->nCallsUnsat-nCallsUnsat, 
-            p->nCallsSat  -nCallsSat, 
-            p->nCallsUndec-nCallsUndec,
-            p->nCallsFiltered-nCallsFiltered );
-        ABC_PRT( "Time", clock() - clkTotal );
-    }
-    Cgt_ManClean( p );
-    p->nRecycles++;
-    return iStop;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs clock-gating for the AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Vec_t * Cgt_ClockGatingCandidates( Aig_Man_t * pAig, Aig_Man_t * pCare, Cgt_Par_t * pPars )
-{
-    Bar_Progress_t * pProgress = NULL;
-    Cgt_Par_t Pars; 
-    Cgt_Man_t * p;
-    Vec_Vec_t * vGatesAll;
-    int iStart, clk = clock(), clkTotal = clock();
-    // reset random numbers
-    Aig_ManRandom( 1 );
-    if ( pPars == NULL )
-        Cgt_SetDefaultParams( pPars = &Pars );    
-    p = Cgt_ManCreate( pAig, pCare, pPars );
-    p->pFrame = Cgt_ManDeriveAigForGating( p );
-p->timeAig += clock() - clk;
-    assert( Aig_ManPoNum(p->pFrame) == Saig_ManRegNum(p->pAig) );
-    pProgress = Bar_ProgressStart( stdout, Aig_ManPoNum(p->pFrame) );
-    for ( iStart = 0; iStart < Aig_ManPoNum(p->pFrame); )
-    {
-        Bar_ProgressUpdate( pProgress, iStart, NULL );
-        iStart = Cgt_ClockGatingRange( p, iStart );
-    }
-    Bar_ProgressStop( pProgress );
-    vGatesAll = p->vGatesAll;
-    p->vGatesAll = NULL;
-p->timeTotal = clock() - clkTotal;
-    Cgt_ManStop( p );
-    return vGatesAll;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs clock-gating for the AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Cgt_ClockGating( Aig_Man_t * pAig, Aig_Man_t * pCare, Cgt_Par_t * pPars )
-{
-    Aig_Man_t * pGated;
-    Vec_Vec_t * vGatesAll;
-    Vec_Vec_t * vGates;
-    int nNodesUsed, clk = clock();
-    vGatesAll = Cgt_ClockGatingCandidates( pAig, pCare, pPars );
-    if ( pPars->fAreaOnly )
-        vGates = Cgt_ManDecideArea( pAig, vGatesAll, pPars->nOdcMax, pPars->fVerbose );
-    else
-        vGates = Cgt_ManDecideSimple( pAig, vGatesAll, pPars->nOdcMax, pPars->fVerbose );
-    if ( pPars->fVerbose )
-    {
-//        printf( "Before CG: " );
-//        Aig_ManPrintStats( pAig );
-    }
-    pGated = Cgt_ManDeriveGatedAig( pAig, vGates, pPars->fAreaOnly, &nNodesUsed );
-    if ( pPars->fVerbose )
-    {
-//        printf( "After  CG: " );
-//        Aig_ManPrintStats( pGated );
-        printf( "Nodes: Before CG = %6d. After CG = %6d. (%6.2f %%).  Total after CG = %6d.\n", 
-            Aig_ManNodeNum(pAig), nNodesUsed, 
-            100.0*nNodesUsed/Aig_ManNodeNum(pAig), 
-            Aig_ManNodeNum(pGated) );
-    }
-    Vec_VecFree( vGates );
-    Vec_VecFree( vGatesAll );
-    return pGated;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cgt/cgtDecide.c b/src/aig/cgt/cgtDecide.c
deleted file mode 100644
index 383ff970..00000000
--- a/src/aig/cgt/cgtDecide.c
+++ /dev/null
@@ -1,301 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cgtMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Clock gating package.]
-
-  Synopsis    [Decide what gate to use for what flop.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cgtMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cgtInt.h"
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-extern int Ssw_SmlCheckXorImplication( Ssw_Sml_t * p, Aig_Obj_t * pObjLi, Aig_Obj_t * pObjLo, Aig_Obj_t * pCand );
-extern int Ssw_SmlCountXorImplication( Ssw_Sml_t * p, Aig_Obj_t * pObjLi, Aig_Obj_t * pObjLo, Aig_Obj_t * pCand );
-extern int Ssw_SmlCountEqual( Ssw_Sml_t * p, Aig_Obj_t * pObjLi, Aig_Obj_t * pObjLo );
-extern int Ssw_SmlNodeCountOnesReal( Ssw_Sml_t * p, Aig_Obj_t * pObj );
-extern int Ssw_SmlNodeCountOnesRealVec( Ssw_Sml_t * p, Vec_Ptr_t * vObjs );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Collects POs in the transitive fanout.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_ManCollectFanoutPos_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Ptr_t * vFanout )
-{
-    Aig_Obj_t * pFanout;
-    int f, iFanout;
-    if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent(pAig, pObj);
-    if ( Aig_ObjIsPo(pObj) )
-    {
-        Vec_PtrPush( vFanout, pObj );
-        return;
-    }
-    Aig_ObjForEachFanout( pAig, pObj, pFanout, iFanout, f )
-        Cgt_ManCollectFanoutPos_rec( pAig, pFanout, vFanout );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects POs in the transitive fanout.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_ManCollectFanoutPos( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Ptr_t * vFanout )
-{
-    Vec_PtrClear( vFanout );
-    Aig_ManIncrementTravId( pAig );
-    Cgt_ManCollectFanoutPos_rec( pAig, pObj, vFanout );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks if all PO fanouts can be gated by this node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cgt_ManCheckGateComplete( Aig_Man_t * pAig, Vec_Vec_t * vGatesAll, Aig_Obj_t * pGate, Vec_Ptr_t * vFanout )
-{
-    Vec_Ptr_t * vGates;
-    Aig_Obj_t * pObj;
-    int i;
-    Vec_PtrForEachEntry( Aig_Obj_t *, vFanout, pObj, i )
-    {
-        if ( Saig_ObjIsPo(pAig, pObj) )
-            return 0;
-        vGates = Vec_VecEntry( vGatesAll, Aig_ObjPioNum(pObj) - Saig_ManPoNum(pAig) );
-        if ( Vec_PtrFind( vGates, pGate ) == -1 )
-            return 0;            
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the set of complete clock gates.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Cgt_ManCompleteGates( Aig_Man_t * pAig, Vec_Vec_t * vGatesAll, int nOdcMax, int fVerbose )
-{
-    Vec_Ptr_t * vFanout, * vGatesFull;
-    Aig_Obj_t * pGate, * pGateR;
-    int i, k;
-    vFanout    = Vec_PtrAlloc( 100 );
-    vGatesFull = Vec_PtrAlloc( 100 );
-    Vec_VecForEachEntry( Aig_Obj_t *, vGatesAll, pGate, i, k )
-    {
-        pGateR = Aig_Regular(pGate);
-        if ( pGateR->fMarkA )
-            continue;
-        pGateR->fMarkA = 1;
-        Cgt_ManCollectFanoutPos( pAig, pGateR, vFanout );
-        if ( Cgt_ManCheckGateComplete( pAig, vGatesAll, pGate, vFanout ) )
-            Vec_PtrPush( vGatesFull, pGate );
-    }
-    Vec_PtrFree( vFanout );
-    Vec_VecForEachEntry( Aig_Obj_t *, vGatesAll, pGate, i, k )
-        Aig_Regular(pGate)->fMarkA = 0;
-    return vGatesFull;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Calculates coverage.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-float Cgt_ManComputeCoverage( Aig_Man_t * pAig, Vec_Vec_t * vGates )
-{
-    int nFrames = 32;
-    int nWords  =  1;
-    Ssw_Sml_t * pSml;
-    Vec_Ptr_t * vOne;
-    int i, nTransTotal = 0, nTransSaved = 0;
-    pSml = Ssw_SmlSimulateSeq( pAig, 0, nFrames, nWords );
-    Vec_VecForEachLevel( vGates, vOne, i )
-    {
-        nTransSaved += Ssw_SmlNodeCountOnesRealVec( pSml, vOne );
-        nTransTotal += 32 * nFrames * nWords;
-    }
-    Ssw_SmlStop( pSml );
-    return (float)100.0*nTransSaved/nTransTotal;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Chooses what clock-gate to use for this register.]
-
-  Description [Currently uses the naive approach: For each register, 
-  choose the clock gate, which covers most of the transitions.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Vec_t * Cgt_ManDecideSimple( Aig_Man_t * pAig, Vec_Vec_t * vGatesAll, int nOdcMax, int fVerbose )
-{
-    int nFrames = 32;
-    int nWords  =  1;
-    Ssw_Sml_t * pSml;
-    Vec_Vec_t * vGates;
-    Vec_Ptr_t * vCands;
-    Aig_Obj_t * pObjLi, * pObjLo, * pCand, * pCandBest;
-    int i, k, nHitsCur, nHitsMax, Counter = 0, clk = clock();
-    int nTransTotal = 0, nTransSaved = 0;
-    vGates = Vec_VecStart( Saig_ManRegNum(pAig) );
-    pSml = Ssw_SmlSimulateSeq( pAig, 0, nFrames, nWords );
-    Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
-    {
-        nHitsMax = 0;
-        pCandBest = NULL;
-        vCands = Vec_VecEntry( vGatesAll, i );
-        Vec_PtrForEachEntry( Aig_Obj_t *, vCands, pCand, k )
-        {
-            // check if this is indeed a clock-gate
-            if ( nOdcMax == 0 && !Ssw_SmlCheckXorImplication( pSml, pObjLi, pObjLo, pCand ) )
-                printf( "Clock gate candidate is invalid!\n" );
-            // find its characteristic number
-            nHitsCur = Ssw_SmlNodeCountOnesReal( pSml, pCand );
-            if ( nHitsMax < nHitsCur )
-            {
-                nHitsMax = nHitsCur;
-                pCandBest = pCand;
-            }
-        }
-        if ( pCandBest != NULL )
-        {
-            Vec_VecPush( vGates, i, pCandBest );
-            Counter++;
-            nTransSaved += nHitsMax;
-        }
-        nTransTotal += 32 * nFrames * nWords;
-    }
-    Ssw_SmlStop( pSml );
-    if ( fVerbose )
-    {
-        printf( "Gating signals = %6d. Gated flops = %6d. (Total flops = %6d.)\n", 
-            Vec_VecSizeSize(vGatesAll), Counter, Saig_ManRegNum(pAig) );
-//        printf( "Gated transitions = %5.2f %%. (%5.2f %%.) ", 
-//            100.0*nTransSaved/nTransTotal, Cgt_ManComputeCoverage(pAig, vGates) );
-        printf( "Gated transitions = %5.2f %%. ", Cgt_ManComputeCoverage(pAig, vGates) );
-        ABC_PRT( "Time", clock() - clk );
-    }
-/*
-    {
-        Vec_Ptr_t * vCompletes;
-        vCompletes = Cgt_ManCompleteGates( pAig, vGatesAll, nOdcMax, fVerbose );
-        printf( "Complete gates = %d. \n", Vec_PtrSize(vCompletes) );
-        Vec_PtrFree( vCompletes );
-    }
-*/
-    return vGates;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the set of complete clock gates.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Vec_t * Cgt_ManDecideArea( Aig_Man_t * pAig, Vec_Vec_t * vGatesAll, int nOdcMax, int fVerbose )
-{
-    Vec_Vec_t * vGates;
-    Vec_Ptr_t * vCompletes, * vOne;
-    Aig_Obj_t * pGate;
-    int i, k, Counter = 0, clk = clock();
-    // derive and label complete gates
-    vCompletes = Cgt_ManCompleteGates( pAig, vGatesAll, nOdcMax, fVerbose );
-    // label complete gates
-    Vec_PtrForEachEntry( Aig_Obj_t *, vCompletes, pGate, i )
-        Aig_Regular(pGate)->fMarkA = 1;
-    // select only complete gates
-    vGates = Vec_VecStart( Saig_ManRegNum(pAig) );
-    Vec_VecForEachEntry( Aig_Obj_t *, vGatesAll, pGate, i, k )
-        if ( Aig_Regular(pGate)->fMarkA )
-            Vec_VecPush( vGates, i, pGate );
-    // unlabel complete gates
-    Vec_PtrForEachEntry( Aig_Obj_t *, vCompletes, pGate, i )
-        Aig_Regular(pGate)->fMarkA = 0;
-    // count the number of gated flops
-    Vec_VecForEachLevel( vGates, vOne, i )
-    {
-        Counter += (int)(Vec_PtrSize(vOne) > 0);
-//        printf( "%d ", Vec_PtrSize(vOne) );
-    }
-//    printf( "\n" );
-    if ( fVerbose )
-    {
-        printf( "Gating signals = %6d. Gated flops = %6d. (Total flops = %6d.)\n", 
-            Vec_VecSizeSize(vGatesAll), Counter, Saig_ManRegNum(pAig) );
-        printf( "Complete gates = %6d. Gated transitions = %5.2f %%. ", 
-            Vec_PtrSize(vCompletes), Cgt_ManComputeCoverage(pAig, vGates) );
-        ABC_PRT( "Time", clock() - clk );
-    }
-    Vec_PtrFree( vCompletes );
-    return vGates;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cgt/cgtInt.h b/src/aig/cgt/cgtInt.h
deleted file mode 100644
index 8cce2381..00000000
--- a/src/aig/cgt/cgtInt.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cgtInt.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Clock gating package.]
-
-  Synopsis    [Internal declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cgtInt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __CGT_INT_H__
-#define __CGT_INT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include "saig.h"
-#include "satSolver.h"
-#include "cnf.h"
-#include "cgt.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Cgt_Man_t_ Cgt_Man_t;
-struct Cgt_Man_t_
-{
-    // user's data
-    Cgt_Par_t *  pPars;          // user's parameters
-    Aig_Man_t *  pAig;           // user's AIG manager
-    // user's constraints
-    Aig_Man_t *  pCare;          // constraint cones
-    Vec_Vec_t *  vSuppsInv;      // inverse support of the constraints
-    // result of clock-gating
-    Vec_Vec_t *  vGatesAll;      // the computed clock-gates
-    Vec_Ptr_t *  vGates;         // the selected clock-gates
-    // internal data
-    Aig_Man_t *  pFrame;         // clock gate AIG manager
-    Vec_Ptr_t *  vFanout;        // temporary storage for fanouts
-    Vec_Ptr_t *  vVisited;       // temporary storage for visited nodes
-    // SAT solving
-    Aig_Man_t *  pPart;          // partition
-    Cnf_Dat_t *  pCnf;           // CNF of the partition
-    sat_solver * pSat;           // SAT solver 
-    Vec_Ptr_t *  vPatts;         // simulation patterns
-    int          nPatts;         // the number of patterns accumulated
-    int          nPattWords;     // the number of pattern words
-    // statistics
-    int          nRecycles;      // recycles 
-    int          nCalls;         // total calls
-    int          nCallsSat;      // satisfiable calls
-    int          nCallsUnsat;    // unsatisfiable calls  
-    int          nCallsUndec;    // undecided calls
-    int          nCallsFiltered; // filtered out calls
-    int          timeAig;        // constructing AIG
-    int          timePrepare;    // partitioning and SAT solving
-    int          timeSat;        // total runtime
-    int          timeSatSat;     // satisfiable runtime 
-    int          timeSatUnsat;   // unsatisfiable runtime 
-    int          timeSatUndec;   // undecided runtime
-    int          timeDecision;   // making decision about what gates to use
-    int          timeOther;      // other runtime
-    int          timeTotal;      // total runtime
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== cgtAig.c ==========================================================*/
-extern void             Cgt_ManDetectCandidates( Aig_Man_t * pAig, Aig_Obj_t * pObj, int nLevelMax, Vec_Ptr_t * vCands );
-extern Aig_Man_t *      Cgt_ManDeriveAigForGating( Cgt_Man_t * p );
-extern Aig_Man_t *      Cgt_ManDupPartition( Aig_Man_t * pAig, int nVarsMin, int nFlopsMin, int iStart, Aig_Man_t * pCare, Vec_Vec_t * vSuppsInv, int * pnOutputs );
-extern Aig_Man_t *      Cgt_ManDeriveGatedAig( Aig_Man_t * pAig, Vec_Vec_t * vGates, int fReduce, int * pnUsedNodes );
-/*=== cgtDecide.c ==========================================================*/
-extern Vec_Vec_t *      Cgt_ManDecideSimple( Aig_Man_t * pAig, Vec_Vec_t * vGatesAll, int nOdcMax, int fVerbose );
-extern Vec_Vec_t *      Cgt_ManDecideArea( Aig_Man_t * pAig, Vec_Vec_t * vGatesAll, int nOdcMax, int fVerbose );
-/*=== cgtMan.c ==========================================================*/
-extern Cgt_Man_t *      Cgt_ManCreate( Aig_Man_t * pAig, Aig_Man_t * pCare, Cgt_Par_t * pPars );
-extern void             Cgt_ManClean( Cgt_Man_t * p );
-extern void             Cgt_ManStop( Cgt_Man_t * p );
-/*=== cgtSat.c ==========================================================*/
-extern int              Cgt_CheckImplication( Cgt_Man_t * p, Aig_Obj_t * pGate, Aig_Obj_t * pFlop );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/cgt/cgtMan.c b/src/aig/cgt/cgtMan.c
deleted file mode 100644
index 7744226d..00000000
--- a/src/aig/cgt/cgtMan.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cgtMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Clock gating package.]
-
-  Synopsis    [Manipulation of clock gating manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cgtMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cgtInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cgt_Man_t * Cgt_ManCreate( Aig_Man_t * pAig, Aig_Man_t * pCare, Cgt_Par_t * pPars )
-{
-    Cgt_Man_t * p;
-    // prepare the sequential AIG
-    assert( Saig_ManRegNum(pAig) > 0 );
-    Aig_ManFanoutStart( pAig );
-    Aig_ManSetPioNumbers( pAig );
-    // create interpolation manager
-    p = ABC_ALLOC( Cgt_Man_t, 1 ); 
-    memset( p, 0, sizeof(Cgt_Man_t) );
-    p->pPars      = pPars;
-    p->pAig       = pAig;
-    p->vGatesAll  = Vec_VecStart( Saig_ManRegNum(pAig) );
-    p->vFanout    = Vec_PtrAlloc( 1000 );
-    p->vVisited   = Vec_PtrAlloc( 1000 );
-    p->nPattWords = 16;
-    if ( pCare == NULL )
-        return p;
-    // check out the constraints
-    if ( Aig_ManPiNum(pCare) != Aig_ManPiNum(pAig) )
-    {
-        printf( "The PI count of care (%d) and AIG (%d) differ. Careset is not used.\n", 
-            Aig_ManPiNum(pCare), Aig_ManPiNum(pAig) );
-        return p;
-    }
-    p->pCare = pCare;
-    p->vSuppsInv = (Vec_Vec_t *)Aig_ManSupportsInverse( p->pCare );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_ManClean( Cgt_Man_t * p )
-{
-    if ( p->pPart )
-    {
-        Aig_ManStop( p->pPart );
-        p->pPart = NULL;
-    }
-    if ( p->pCnf )
-    {
-        Cnf_DataFree( p->pCnf );
-        p->pCnf = NULL;
-    }
-    if ( p->pSat )
-    {
-        sat_solver_delete( p->pSat );
-        p->pSat = NULL;
-    }
-    if ( p->vPatts )
-    {
-        Vec_PtrFree( p->vPatts );
-        p->vPatts = NULL;
-    }
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Prints stats of the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_ManPrintStats( Cgt_Man_t * p )
-{
-    printf( "Params: LevMax = %d. CandMax = %d. OdcMax = %d. ConfMax = %d. VarMin = %d. FlopMin = %d.\n", 
-        p->pPars->nLevelMax, p->pPars->nCandMax, p->pPars->nOdcMax, 
-        p->pPars->nConfMax, p->pPars->nVarsMin, p->pPars->nFlopsMin );
-    printf( "SAT   : Calls = %d. Unsat = %d. Sat = %d. Fails = %d.  Recycles = %d.  ", 
-        p->nCalls, p->nCallsUnsat, p->nCallsSat, p->nCallsUndec, p->nRecycles );
-    ABC_PRT( "Time", p->timeTotal );
-/*
-    p->timeOther = p->timeTotal-p->timeAig-p->timePrepare-p->timeSat-p->timeDecision;
-    ABC_PRTP( "AIG        ", p->timeAig,       p->timeTotal );
-    ABC_PRTP( "Prepare    ", p->timePrepare,   p->timeTotal );
-    ABC_PRTP( "SAT solving", p->timeSat,       p->timeTotal );
-    ABC_PRTP( "  unsat    ", p->timeSatUnsat,  p->timeTotal );
-    ABC_PRTP( "  sat      ", p->timeSatSat,    p->timeTotal );
-    ABC_PRTP( "  undecided", p->timeSatUndec,  p->timeTotal );
-    ABC_PRTP( "Other      ", p->timeOther,     p->timeTotal );
-    ABC_PRTP( "TOTAL      ", p->timeTotal,     p->timeTotal );
-*/
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Frees the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cgt_ManStop( Cgt_Man_t * p )
-{
-    if ( p->pPars->fVerbose )
-        Cgt_ManPrintStats( p );
-    if ( p->pFrame )
-        Aig_ManStop( p->pFrame );
-    Cgt_ManClean( p );
-    Vec_PtrFree( p->vFanout );
-    Vec_PtrFree( p->vVisited );
-    if ( p->vGates )
-        Vec_PtrFree( p->vGates );
-    if ( p->vGatesAll )
-        Vec_VecFree( p->vGatesAll );
-    if ( p->vSuppsInv )
-        Vec_VecFree( p->vSuppsInv );
-    ABC_FREE( p );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cgt/cgtSat.c b/src/aig/cgt/cgtSat.c
deleted file mode 100644
index 0a2a1daa..00000000
--- a/src/aig/cgt/cgtSat.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cgtSat.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Clock gating package.]
-
-  Synopsis    [Checking implications using SAT.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: cgtSat.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cgtInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-
-/**Function*************************************************************
-
-  Synopsis    [Runs equivalence test for the two nodes.]
-
-  Description [Both nodes should be regular and different from each other.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cgt_CheckImplication( Cgt_Man_t * p, Aig_Obj_t * pGate, Aig_Obj_t * pMiter )
-{
-    int nBTLimit = p->pPars->nConfMax;
-    int pLits[2], RetValue, clk;
-    p->nCalls++;
-
-    // sanity checks
-    assert( p->pSat && p->pCnf );
-    assert( !Aig_IsComplement(pMiter) );
-    assert( Aig_Regular(pGate) != pMiter );
-
-    // solve under assumptions
-    // G => !M -- true     G & M -- false
-    pLits[0] = toLitCond( p->pCnf->pVarNums[Aig_Regular(pGate)->Id], Aig_IsComplement(pGate) );
-    pLits[1] = toLitCond( p->pCnf->pVarNums[pMiter->Id], 0 );
-
-clk = clock();
-    RetValue = sat_solver_solve( p->pSat, pLits, pLits + 2, (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-p->timeSat += clock() - clk;
-    if ( RetValue == l_False )
-    {
-p->timeSatUnsat += clock() - clk;
-        pLits[0] = lit_neg( pLits[0] );
-        pLits[1] = lit_neg( pLits[1] );
-        RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-        assert( RetValue );
-        sat_solver_compress( p->pSat );
-        p->nCallsUnsat++;
-        return 1;
-    }
-    else if ( RetValue == l_True )
-    {
-p->timeSatSat += clock() - clk;
-        p->nCallsSat++;
-        return 0;
-    }
-    else // if ( RetValue1 == l_Undef )
-    {
-p->timeSatUndec += clock() - clk;
-        p->nCallsUndec++;
-        return -1;
-    }
-    return -2;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cgt/module.make b/src/aig/cgt/module.make
deleted file mode 100644
index 911d8d1f..00000000
--- a/src/aig/cgt/module.make
+++ /dev/null
@@ -1,5 +0,0 @@
-SRC +=    src/aig/cgt/cgtAig.c \
-    src/aig/cgt/cgtCore.c \
-    src/aig/cgt/cgtDecide.c \
-    src/aig/cgt/cgtMan.c \
-    src/aig/cgt/cgtSat.c
diff --git a/src/aig/cnf/cnf.h b/src/aig/cnf/cnf.h
deleted file mode 100644
index 129375d2..00000000
--- a/src/aig/cnf/cnf.h
+++ /dev/null
@@ -1,195 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cnf.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: cnf.h,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __CNF_H__
-#define __CNF_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-#include <time.h>
-
-#include "vec.h"
-#include "aig.h"
-#include "darInt.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
- 
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Cnf_Man_t_            Cnf_Man_t;
-typedef struct Cnf_Dat_t_            Cnf_Dat_t;
-typedef struct Cnf_Cut_t_            Cnf_Cut_t;
-
-// the CNF asserting outputs of AIG to be 1
-struct Cnf_Dat_t_
-{
-    Aig_Man_t *     pMan;            // the AIG manager, for which CNF is computed
-    int             nVars;           // the number of variables
-    int             nLiterals;       // the number of CNF literals
-    int             nClauses;        // the number of CNF clauses
-    int **          pClauses;        // the CNF clauses
-    int *           pVarNums;        // the number of CNF variable for each node ID (-1 if unused)
-    int *           pObj2Clause;     // the mapping of objects into clauses
-    int *           pObj2Count;      // the mapping of objects into clause number
-};
-
-// the cut used to represent node in the AIG
-struct Cnf_Cut_t_
-{
-    char            nFanins;         // the number of leaves
-    char            Cost;            // the cost of this cut
-    short           nWords;          // the number of words in truth table
-    Vec_Int_t *     vIsop[2];        // neg/pos ISOPs
-    int             pFanins[0];      // the fanins (followed by the truth table)
-};
-
-// the CNF computation manager
-struct Cnf_Man_t_
-{
-    Aig_Man_t *     pManAig;         // the underlying AIG manager
-    char *          pSopSizes;       // sizes of SOPs for 4-variable functions
-    char **         pSops;           // the SOPs for 4-variable functions
-    int             aArea;           // the area of the mapping
-    Aig_MmFlex_t *  pMemCuts;        // memory manager for cuts
-    int             nMergeLimit;     // the limit on the size of merged cut
-    unsigned *      pTruths[4];      // temporary truth tables
-    Vec_Int_t *     vMemory;         // memory for intermediate ISOP representation
-    int             timeCuts; 
-    int             timeMap;
-    int             timeSave;
-};
-
-
-static inline Dar_Cut_t *  Dar_ObjBestCut( Aig_Obj_t * pObj ) { Dar_Cut_t * pCut; int i; Dar_ObjForEachCut( pObj, pCut, i ) if ( pCut->fBest ) return pCut; return NULL; }
-
-static inline int          Cnf_CutSopCost( Cnf_Man_t * p, Dar_Cut_t * pCut ) { return p->pSopSizes[pCut->uTruth] + p->pSopSizes[0xFFFF & ~pCut->uTruth]; }
-
-static inline int          Cnf_CutLeaveNum( Cnf_Cut_t * pCut )    { return pCut->nFanins;                               }
-static inline int *        Cnf_CutLeaves( Cnf_Cut_t * pCut )      { return pCut->pFanins;                               }
-static inline unsigned *   Cnf_CutTruth( Cnf_Cut_t * pCut )       { return (unsigned *)(pCut->pFanins + pCut->nFanins); }
-
-static inline Cnf_Cut_t *  Cnf_ObjBestCut( Aig_Obj_t * pObj )                       { return (Cnf_Cut_t *)pObj->pData;  }
-static inline void         Cnf_ObjSetBestCut( Aig_Obj_t * pObj, Cnf_Cut_t * pCut )  { pObj->pData = pCut;  }
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                           ITERATORS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// iterator over the clauses
-#define Cnf_CnfForClause( p, pBeg, pEnd, i )                         \
-    for ( i = 0; i < p->nClauses && (pBeg = p->pClauses[i]) && (pEnd = p->pClauses[i+1]); i++ )
-
-// iterator over leaves of the cut
-#define Cnf_CutForEachLeaf( p, pCut, pLeaf, i )                         \
-    for ( i = 0; (i < (int)(pCut)->nFanins) && ((pLeaf) = Aig_ManObj(p, (pCut)->pFanins[i])); i++ )
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== cnfCore.c ========================================================*/
-extern Vec_Int_t *     Cnf_DeriveMappingArray( Aig_Man_t * pAig );
-extern Cnf_Dat_t *     Cnf_Derive( Aig_Man_t * pAig, int nOutputs );
-extern Cnf_Dat_t *     Cnf_DeriveOther( Aig_Man_t * pAig );
-extern Cnf_Man_t *     Cnf_ManRead();
-extern void            Cnf_ClearMemory();
-/*=== cnfCut.c ========================================================*/
-extern Cnf_Cut_t *     Cnf_CutCreate( Cnf_Man_t * p, Aig_Obj_t * pObj );
-extern void            Cnf_CutPrint( Cnf_Cut_t * pCut );
-extern void            Cnf_CutFree( Cnf_Cut_t * pCut );
-extern void            Cnf_CutUpdateRefs( Cnf_Man_t * p, Cnf_Cut_t * pCut, Cnf_Cut_t * pCutFan, Cnf_Cut_t * pCutRes );
-extern Cnf_Cut_t *     Cnf_CutCompose( Cnf_Man_t * p, Cnf_Cut_t * pCut, Cnf_Cut_t * pCutFan, int iFan );
-/*=== cnfData.c ========================================================*/
-extern void            Cnf_ReadMsops( char ** ppSopSizes, char *** ppSops );
-/*=== cnfFast.c ========================================================*/
-extern void            Cnf_CollectLeaves( Aig_Obj_t * pRoot, Vec_Ptr_t * vSuper, int fStopCompl );
-extern void            Cnf_ComputeClauses( Aig_Man_t * p, Aig_Obj_t * pRoot, Vec_Ptr_t * vLeaves, 
-                           Vec_Ptr_t * vNodes, Vec_Int_t * vMap, Vec_Int_t * vCover, Vec_Int_t * vClauses );
-extern void            Cnf_DeriveFastMark( Aig_Man_t * p );
-extern Cnf_Dat_t *     Cnf_DeriveFast( Aig_Man_t * p, int nOutputs );
-/*=== cnfMan.c ========================================================*/
-extern Cnf_Man_t *     Cnf_ManStart();
-extern void            Cnf_ManStop( Cnf_Man_t * p );
-extern Vec_Int_t *     Cnf_DataCollectPiSatNums( Cnf_Dat_t * pCnf, Aig_Man_t * p );
-extern Cnf_Dat_t *     Cnf_DataAlloc( Aig_Man_t * pAig, int nVars, int nClauses, int nLiterals );
-extern Cnf_Dat_t *     Cnf_DataDup( Cnf_Dat_t * p );
-extern void            Cnf_DataFree( Cnf_Dat_t * p );
-extern void            Cnf_DataLift( Cnf_Dat_t * p, int nVarsPlus );
-extern void            Cnf_DataFlipLastLiteral( Cnf_Dat_t * p );
-extern void            Cnf_DataPrint( Cnf_Dat_t * p, int fReadable );
-extern void            Cnf_DataWriteIntoFile( Cnf_Dat_t * p, char * pFileName, int fReadable );
-extern void *          Cnf_DataWriteIntoSolver( Cnf_Dat_t * p, int nFrames, int fInit );
-extern void *          Cnf_DataWriteIntoSolverInt( void * pSat, Cnf_Dat_t * p, int nFrames, int fInit );
-extern int             Cnf_DataWriteOrClause( void * pSat, Cnf_Dat_t * pCnf );
-extern int             Cnf_DataWriteAndClauses( void * p, Cnf_Dat_t * pCnf );
-extern void            Cnf_DataTranformPolarity( Cnf_Dat_t * pCnf, int fTransformPos );
-extern int             Cnf_DataAddXorClause( void * pSat, int iVarA, int iVarB, int iVarC );
-/*=== cnfMap.c ========================================================*/
-extern void            Cnf_DeriveMapping( Cnf_Man_t * p );
-extern int             Cnf_ManMapForCnf( Cnf_Man_t * p );
-/*=== cnfPost.c ========================================================*/
-extern void            Cnf_ManTransferCuts( Cnf_Man_t * p );
-extern void            Cnf_ManFreeCuts( Cnf_Man_t * p );
-extern void            Cnf_ManPostprocess( Cnf_Man_t * p );
-/*=== cnfUtil.c ========================================================*/
-extern Vec_Ptr_t *     Aig_ManScanMapping( Cnf_Man_t * p, int fCollect );
-extern Vec_Ptr_t *     Cnf_ManScanMapping( Cnf_Man_t * p, int fCollect, int fPreorder );
-extern Vec_Int_t *     Cnf_DataCollectCiSatNums( Cnf_Dat_t * pCnf, Aig_Man_t * p );
-extern Vec_Int_t *     Cnf_DataCollectCoSatNums( Cnf_Dat_t * pCnf, Aig_Man_t * p );
-/*=== cnfWrite.c ========================================================*/
-extern Vec_Int_t *     Cnf_ManWriteCnfMapping( Cnf_Man_t * p, Vec_Ptr_t * vMapped );
-extern void            Cnf_SopConvertToVector( char * pSop, int nCubes, Vec_Int_t * vCover );
-extern Cnf_Dat_t *     Cnf_ManWriteCnf( Cnf_Man_t * p, Vec_Ptr_t * vMapped, int nOutputs );
-extern Cnf_Dat_t *     Cnf_ManWriteCnfOther( Cnf_Man_t * p, Vec_Ptr_t * vMapped );
-extern Cnf_Dat_t *     Cnf_DeriveSimple( Aig_Man_t * p, int nOutputs );
-extern Cnf_Dat_t *     Cnf_DeriveSimpleForRetiming( Aig_Man_t * p );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/cnf/cnfCore.c b/src/aig/cnf/cnfCore.c
deleted file mode 100644
index eb46e704..00000000
--- a/src/aig/cnf/cnfCore.c
+++ /dev/null
@@ -1,296 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cnfCore.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [AIG-to-CNF conversion.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: cnfCore.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cnf.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static Cnf_Man_t * s_pManCnf = NULL;
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Converts AIG into the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Cnf_DeriveMappingArray( Aig_Man_t * pAig )
-{
-    Vec_Int_t * vResult;
-    Cnf_Man_t * p;
-    Vec_Ptr_t * vMapped;
-    Aig_MmFixed_t * pMemCuts;
-    int clk;
-    // allocate the CNF manager
-    if ( s_pManCnf == NULL )
-        s_pManCnf = Cnf_ManStart();
-    // connect the managers
-    p = s_pManCnf;
-    p->pManAig = pAig;
-
-    // generate cuts for all nodes, assign cost, and find best cuts
-clk = clock();
-    pMemCuts = Dar_ManComputeCuts( pAig, 10, 0 );
-p->timeCuts = clock() - clk;
-
-    // find the mapping
-clk = clock();
-    Cnf_DeriveMapping( p );
-p->timeMap = clock() - clk;
-//    Aig_ManScanMapping( p, 1 );
-
-    // convert it into CNF
-clk = clock();
-    Cnf_ManTransferCuts( p );
-    vMapped = Cnf_ManScanMapping( p, 1, 0 );
-    vResult = Cnf_ManWriteCnfMapping( p, vMapped );
-    Vec_PtrFree( vMapped );
-    Aig_MmFixedStop( pMemCuts, 0 );
-p->timeSave = clock() - clk;
-
-   // reset reference counters
-    Aig_ManResetRefs( pAig );
-//ABC_PRT( "Cuts   ", p->timeCuts );
-//ABC_PRT( "Map    ", p->timeMap  );
-//ABC_PRT( "Saving ", p->timeSave );
-    return vResult;
-}
- 
-/**Function*************************************************************
-
-  Synopsis    [Converts AIG into the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Dat_t * Cnf_Derive( Aig_Man_t * pAig, int nOutputs )
-{
-    Cnf_Man_t * p;
-    Cnf_Dat_t * pCnf;
-    Vec_Ptr_t * vMapped;
-    Aig_MmFixed_t * pMemCuts;
-    int clk;
-    // allocate the CNF manager
-    if ( s_pManCnf == NULL )
-        s_pManCnf = Cnf_ManStart();
-    // connect the managers
-    p = s_pManCnf;
-    p->pManAig = pAig;
-
-    // generate cuts for all nodes, assign cost, and find best cuts
-clk = clock();
-    pMemCuts = Dar_ManComputeCuts( pAig, 10, 0 );
-p->timeCuts = clock() - clk;
-
-    // find the mapping
-clk = clock();
-    Cnf_DeriveMapping( p );
-p->timeMap = clock() - clk;
-//    Aig_ManScanMapping( p, 1 );
-
-    // convert it into CNF
-clk = clock();
-    Cnf_ManTransferCuts( p );
-    vMapped = Cnf_ManScanMapping( p, 1, 1 );
-    pCnf = Cnf_ManWriteCnf( p, vMapped, nOutputs );
-    Vec_PtrFree( vMapped );
-    Aig_MmFixedStop( pMemCuts, 0 );
-p->timeSave = clock() - clk;
-
-   // reset reference counters
-    Aig_ManResetRefs( pAig );
-//ABC_PRT( "Cuts   ", p->timeCuts );
-//ABC_PRT( "Map    ", p->timeMap  );
-//ABC_PRT( "Saving ", p->timeSave );
-    return pCnf;
-}
- 
-/**Function*************************************************************
-
-  Synopsis    [Converts AIG into the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Dat_t * Cnf_DeriveOther( Aig_Man_t * pAig )
-{
-    Cnf_Man_t * p;
-    Cnf_Dat_t * pCnf;
-    Vec_Ptr_t * vMapped;
-    Aig_MmFixed_t * pMemCuts;
-    int clk;
-    // allocate the CNF manager
-    if ( s_pManCnf == NULL )
-        s_pManCnf = Cnf_ManStart();
-    // connect the managers
-    p = s_pManCnf;
-    p->pManAig = pAig;
-
-    // generate cuts for all nodes, assign cost, and find best cuts
-clk = clock();
-    pMemCuts = Dar_ManComputeCuts( pAig, 10, 0 );
-p->timeCuts = clock() - clk;
-
-    // find the mapping
-clk = clock();
-    Cnf_DeriveMapping( p );
-p->timeMap = clock() - clk;
-//    Aig_ManScanMapping( p, 1 );
-
-    // convert it into CNF
-clk = clock();
-    Cnf_ManTransferCuts( p );
-    vMapped = Cnf_ManScanMapping( p, 1, 1 );
-    pCnf = Cnf_ManWriteCnfOther( p, vMapped );
-    Vec_PtrFree( vMapped );
-    Aig_MmFixedStop( pMemCuts, 0 );
-p->timeSave = clock() - clk;
-
-   // reset reference counters
-    Aig_ManResetRefs( pAig );
-//ABC_PRT( "Cuts   ", p->timeCuts );
-//ABC_PRT( "Map    ", p->timeMap  );
-//ABC_PRT( "Saving ", p->timeSave );
-    return pCnf;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Man_t * Cnf_ManRead()
-{
-    return s_pManCnf;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_ClearMemory()
-{
-    if ( s_pManCnf == NULL )
-        return;
-    Cnf_ManStop( s_pManCnf );
-    s_pManCnf = NULL;
-}
-
-
-#if 0
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Dat_t * Cnf_Derive_old( Aig_Man_t * pAig )
-{
-/*
-    // iteratively improve area flow
-    for ( i = 0; i < nIters; i++ )
-    {
-clk = clock();
-        Cnf_ManScanMapping( p, 0 );
-        Cnf_ManMapForCnf( p );
-ABC_PRT( "iter ", clock() - clk );
-    }
-*/
-    // write the file
-    vMapped = Aig_ManScanMapping( p, 1 );
-    Vec_PtrFree( vMapped );
-
-clk = clock();
-    Cnf_ManTransferCuts( p );
-
-    Cnf_ManPostprocess( p );
-    Cnf_ManScanMapping( p, 0 );
-/*
-    Cnf_ManPostprocess( p );
-    Cnf_ManScanMapping( p, 0 );
-    Cnf_ManPostprocess( p );
-    Cnf_ManScanMapping( p, 0 );
-*/
-ABC_PRT( "Ext ", clock() - clk );
-
-/*
-    vMapped = Cnf_ManScanMapping( p, 1 );
-    pCnf = Cnf_ManWriteCnf( p, vMapped );
-    Vec_PtrFree( vMapped );
-
-    // clean up
-    Cnf_ManFreeCuts( p );
-    Dar_ManCutsFree( pAig );
-    return pCnf;
-*/
-    Aig_MmFixedStop( pMemCuts, 0 );
-    return NULL;
-}
-
-#endif
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cnf/cnfCut.c b/src/aig/cnf/cnfCut.c
deleted file mode 100644
index d41fc1fc..00000000
--- a/src/aig/cnf/cnfCut.c
+++ /dev/null
@@ -1,376 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cnfCut.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [AIG-to-CNF conversion.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: cnfCut.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cnf.h"
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates cut of the given size.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Cut_t * Cnf_CutAlloc( Cnf_Man_t * p, int nLeaves )
-{
-    Cnf_Cut_t * pCut;
-    int nSize = sizeof(Cnf_Cut_t) + sizeof(int) * nLeaves + sizeof(unsigned) * Aig_TruthWordNum(nLeaves);
-    pCut = (Cnf_Cut_t *)Aig_MmFlexEntryFetch( p->pMemCuts, nSize );
-    pCut->nFanins = nLeaves;
-    pCut->nWords = Aig_TruthWordNum(nLeaves);
-    pCut->vIsop[0] = pCut->vIsop[1] = NULL;
-    return pCut;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocates cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_CutFree( Cnf_Cut_t * pCut )
-{
-    if ( pCut->vIsop[0] )
-        Vec_IntFree( pCut->vIsop[0] );
-    if ( pCut->vIsop[1] )
-        Vec_IntFree( pCut->vIsop[1] );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates cut for the given node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Cut_t * Cnf_CutCreate( Cnf_Man_t * p, Aig_Obj_t * pObj )
-{
-    Dar_Cut_t * pCutBest;
-    Cnf_Cut_t * pCut;
-    unsigned * pTruth;
-    assert( Aig_ObjIsNode(pObj) );
-    pCutBest = Dar_ObjBestCut( pObj );
-    assert( pCutBest != NULL );
-    assert( pCutBest->nLeaves <= 4 );
-    pCut = Cnf_CutAlloc( p, pCutBest->nLeaves );
-    memcpy( pCut->pFanins, pCutBest->pLeaves, sizeof(int) * pCutBest->nLeaves );
-    pTruth = Cnf_CutTruth(pCut);
-    *pTruth = (pCutBest->uTruth << 16) | pCutBest->uTruth;
-    pCut->Cost = Cnf_CutSopCost( p, pCutBest );
-    return pCut;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocates cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_CutPrint( Cnf_Cut_t * pCut )
-{
-    int i;
-    printf( "{" );
-    for ( i = 0; i < pCut->nFanins; i++ )
-        printf( "%d ", pCut->pFanins[i] );
-    printf( " } " );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates cut of the given size.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_CutDeref( Cnf_Man_t * p, Cnf_Cut_t * pCut )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Cnf_CutForEachLeaf( p->pManAig, pCut, pObj, i )
-    {
-        assert( pObj->nRefs > 0 );
-        pObj->nRefs--;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates cut of the given size.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_CutRef( Cnf_Man_t * p, Cnf_Cut_t * pCut )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Cnf_CutForEachLeaf( p->pManAig, pCut, pObj, i )
-    {
-        pObj->nRefs++;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates cut of the given size.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_CutUpdateRefs( Cnf_Man_t * p, Cnf_Cut_t * pCut, Cnf_Cut_t * pCutFan, Cnf_Cut_t * pCutRes )
-{
-    Cnf_CutDeref( p, pCut );
-    Cnf_CutDeref( p, pCutFan );
-    Cnf_CutRef( p, pCutRes );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Merges two arrays of integers.]
-
-  Description [Returns the number of items.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Cnf_CutMergeLeaves( Cnf_Cut_t * pCut, Cnf_Cut_t * pCutFan, int * pFanins )
-{
-    int i, k, nFanins = 0;
-    for ( i = k = 0; i < pCut->nFanins && k < pCutFan->nFanins; )
-    {
-        if ( pCut->pFanins[i] == pCutFan->pFanins[k] )
-            pFanins[nFanins++] = pCut->pFanins[i], i++, k++;
-        else if ( pCut->pFanins[i] < pCutFan->pFanins[k] )
-            pFanins[nFanins++] = pCut->pFanins[i], i++;
-        else
-            pFanins[nFanins++] = pCutFan->pFanins[k], k++;
-    }
-    for ( ; i < pCut->nFanins; i++ )
-        pFanins[nFanins++] = pCut->pFanins[i];
-    for ( ; k < pCutFan->nFanins; k++ )
-        pFanins[nFanins++] = pCutFan->pFanins[k];
-    return nFanins;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the stretching phase of the cut w.r.t. the merged cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline unsigned Cnf_TruthPhase( Cnf_Cut_t * pCut, Cnf_Cut_t * pCut1 )
-{
-    unsigned uPhase = 0;
-    int i, k;
-    for ( i = k = 0; i < pCut->nFanins; i++ )
-    {
-        if ( k == pCut1->nFanins )
-            break;
-        if ( pCut->pFanins[i] < pCut1->pFanins[k] )
-            continue;
-        assert( pCut->pFanins[i] == pCut1->pFanins[k] );
-        uPhase |= (1 << i);
-        k++;
-    }
-    return uPhase;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes the fanin variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_CutRemoveIthVar( Cnf_Cut_t * pCut, int iVar, int iFan )
-{
-    int i;
-    assert( pCut->pFanins[iVar] == iFan );
-    pCut->nFanins--;
-    for ( i = iVar; i < pCut->nFanins; i++ )
-        pCut->pFanins[i] = pCut->pFanins[i+1];
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts the fanin variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_CutInsertIthVar( Cnf_Cut_t * pCut, int iVar, int iFan )
-{
-    int i;
-    for ( i = pCut->nFanins; i > iVar; i-- )
-        pCut->pFanins[i] = pCut->pFanins[i-1];
-    pCut->pFanins[iVar] = iFan;
-    pCut->nFanins++;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Merges two cuts.]
-
-  Description [Returns NULL of the cuts cannot be merged.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Cut_t * Cnf_CutCompose( Cnf_Man_t * p, Cnf_Cut_t * pCut, Cnf_Cut_t * pCutFan, int iFan )
-{
-    Cnf_Cut_t * pCutRes;
-    static int pFanins[32];
-    unsigned * pTruth, * pTruthFan, * pTruthRes;
-    unsigned * pTop = p->pTruths[0], * pFan = p->pTruths[2], * pTemp = p->pTruths[3];
-    unsigned uPhase, uPhaseFan;
-    int i, iVar, nFanins, RetValue;
-
-    // make sure the second cut is the fanin of the first
-    for ( iVar = 0; iVar < pCut->nFanins; iVar++ )
-        if ( pCut->pFanins[iVar] == iFan )
-            break;
-    assert( iVar < pCut->nFanins );
-    // remove this variable
-    Cnf_CutRemoveIthVar( pCut, iVar, iFan );
-    // merge leaves of the cuts
-    nFanins = Cnf_CutMergeLeaves( pCut, pCutFan, pFanins );
-    if ( nFanins+1 > p->nMergeLimit )
-    {
-        Cnf_CutInsertIthVar( pCut, iVar, iFan );
-        return NULL;
-    }
-    // create new cut
-    pCutRes = Cnf_CutAlloc( p, nFanins );
-    memcpy( pCutRes->pFanins, pFanins, sizeof(int) * nFanins );
-    assert( pCutRes->nFanins <= pCut->nFanins + pCutFan->nFanins );
-
-    // derive its truth table
-    // get the truth tables in the composition space
-    pTruth    = Cnf_CutTruth(pCut);
-    pTruthFan = Cnf_CutTruth(pCutFan);
-    pTruthRes = Cnf_CutTruth(pCutRes);
-    for ( i = 0; i < 2*pCutRes->nWords; i++ )
-        pTop[i] = pTruth[i % pCut->nWords];
-    for ( i = 0; i < pCutRes->nWords; i++ )
-        pFan[i] = pTruthFan[i % pCutFan->nWords];
-    // move the variable to the end
-    uPhase = Kit_BitMask( pCutRes->nFanins+1 ) & ~(1 << iVar);
-    Kit_TruthShrink( pTemp, pTop, pCutRes->nFanins, pCutRes->nFanins+1, uPhase, 1 );
-    // compute the phases
-    uPhase    = Cnf_TruthPhase( pCutRes, pCut    ) | (1 << pCutRes->nFanins);
-    uPhaseFan = Cnf_TruthPhase( pCutRes, pCutFan );
-    // permute truth-tables to the common support
-    Kit_TruthStretch( pTemp, pTop, pCut->nFanins+1,  pCutRes->nFanins+1, uPhase,    1 );
-    Kit_TruthStretch( pTemp, pFan, pCutFan->nFanins, pCutRes->nFanins,   uPhaseFan, 1 );
-    // perform Boolean operation
-    Kit_TruthMux( pTruthRes, pTop, pTop+pCutRes->nWords, pFan, pCutRes->nFanins );
-    // return the cut to its original condition
-    Cnf_CutInsertIthVar( pCut, iVar, iFan );
-    // consider the simple case
-    if ( pCutRes->nFanins < 5 )
-    {
-        pCutRes->Cost = p->pSopSizes[0xFFFF & *pTruthRes] + p->pSopSizes[0xFFFF & ~*pTruthRes];
-        return pCutRes;
-    }
-
-    // derive ISOP for positive phase
-    RetValue = Kit_TruthIsop( pTruthRes, pCutRes->nFanins, p->vMemory, 0 );
-    pCutRes->vIsop[1] = (RetValue == -1)? NULL : Vec_IntDup( p->vMemory );
-    // derive ISOP for negative phase
-    Kit_TruthNot( pTruthRes, pTruthRes, pCutRes->nFanins );
-    RetValue = Kit_TruthIsop( pTruthRes, pCutRes->nFanins, p->vMemory, 0 );
-    pCutRes->vIsop[0] = (RetValue == -1)? NULL : Vec_IntDup( p->vMemory );
-    Kit_TruthNot( pTruthRes, pTruthRes, pCutRes->nFanins );
-
-    // compute the cut cost
-    if ( pCutRes->vIsop[0] == NULL || pCutRes->vIsop[1] == NULL )
-        pCutRes->Cost = 127;
-    else if ( Vec_IntSize(pCutRes->vIsop[0]) + Vec_IntSize(pCutRes->vIsop[1]) > 127 )
-        pCutRes->Cost = 127;
-    else
-        pCutRes->Cost = Vec_IntSize(pCutRes->vIsop[0]) + Vec_IntSize(pCutRes->vIsop[1]);
-    return pCutRes;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cnf/cnfData.c b/src/aig/cnf/cnfData.c
deleted file mode 100644
index 3d3cdf37..00000000
--- a/src/aig/cnf/cnfData.c
+++ /dev/null
@@ -1,4789 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cnfData.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [AIG-to-CNF conversion.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: cnfData.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cnf.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static const char s_Data3[82] = "!#&()*+,-.0123456789:;<=>?ABCDEFGHIJKLMNOPQRSTUVWXYZ[]abcdefghijklmnopqrstuvwxyz|";
-
-static const char * s_Data4[] = {
-"! B a . 8 .B 8a K !K T Ta j 8j Tj s ( + (B +a (. +8 .B( +8a (K +K T( +T j( ",
-"+j Tj( s+ E !E H Ha E. 8E H. H8 EK EK! HT HTa jE 8jE Hj sH d +d Hd g d. 8d ",
-"Hd. g8 dK +dK Td gT dj +jd Hjd gs 2 !2 2B a2 5 58 5B 5a 2K 2K! T2 Ta2 5j 58",
-"j 5T s5 ; +; ;B a; 5; > 5;B >a ;K +;K T; +T; ;j >j 5T; s> E2 !E2 H2 Ha2 5E ",
-"58E H5 H58 EK2 !E2K HT2 TaH2 5jE 8j5E H5T sH5 d; +d; H; g; 5d >d H5d g> dK;",
-" dK+; H;T gT; 5dj >jd H;j gs> N !N NB aN N. 8N .BN 8aN Q Q! QT Qa Qj Q8 QTj",
-" sQ (N +N (BN +aN N.( +8N (BN. 8a+N Q( +Q QT( +QT Qj( +Q8 TjQ( s+Q W W! HW ",
-"Wa W. W8 HW. H8W WQ Q!W Z Za Wj W8Q Zj sZ Wd +W HWd gW Wd. +W8 WdH. gW8 Qd ",
-"+WQ Zd gZ Wjd +Wj Zdj gZs m m! mB am 5m 8m 5mB 5am Qm Q!m Tm Qam p p8 pT sp",
-" m; +m m;B +ma 5m; >m m;5B >ma Q; +Qm Q;T +Tm p; p> pT; sp> Wm W!m Hm Hma 5",
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-" R5dUj >MRUd R5Vd gRV> UP UP! RDP UaP UP. U8P R.DP D8UP SU S!U SV SVa SUj S",
-"8U SVj SsV UP( U+P R(DP +DUP P(U. +PU8 RDP(. R+D8P SU( S+U SV( SV+ UjS( U+S",
-"8 VjS( VsS+ RWU R!UW RWD UWRa R.UW UWR8 R.WD H8UP SUW UWS! SZV VZSa UWSj UW",
-"S8 SjVZ SVsZ UdP U+RW HPUd gUP U.dP 8dUP RWDd. U8gP SdU U+Sd SVd gSV UdSj U",
-"8Sd SjVd SsgV RmU R!Um RDm UaRm U5P U8Rm 5DRm 5aUP SUm UmS! SVm VmSa SpU pU",
-"S8 VpS VpSs U;P U+Rm DmR; +DRm 5PU; >PU R5D;P RD>P S;U U+S; SV; V+S; pUS; S",
-">U S;Vp S>V UWRm RWUm! UHRm RHmUa U5RW R5WU8 H5UP RH8Um UWSm S!UWm VmSZ SZV",
-"am SWpU SpUW8 SZVp SZpVs vRU R+vU vRD vRgU R5vU vU>P R5vD gU>P SvU vUS+ VvS",
-" VvgS pUSv vUS> VpSv yVS Rb Rb& RbD cR Rb. Rb8 bDR. cR8 RbM bMR& VRb cRV Rb",
-"j b8Rj RbVj scR Rb( Rb+ bDR( cR+ b(R. b+R8 RbD(. R+c8 R(bM bMR+ RbV( V+cR R",
-"(bj b+Rj VRbj( s+cR RbE REU& RbH cRH bER. REb8 R.bH RHc8 REbM M&ERb RbVH VR",
-"cH REbj Rb8ME bHRj sHcR Rbd b+Rd bHRd gcR R.bd b8Rd RbHd. g8cR bMRd dM&Rb R",
-"bVd cRgV bdRj d&jRb VdRbj scgR Rb2 R2U& bDR2 cR2 Rb5 b5R8 b5RD cR5 R2bM M&2",
-"Rb RbV2 V2cR b5Rj Rb58M RbV5 c5sR Rb; b+R; b;RD cR; b5R; >Rb Rb5D; c>R bMR;",
-" M;&Rb RbV; V;cR b;Rj Rb>M V5Rb; sRc> bER2 Rb&E2 R2bH RHc2 REb5 Rb58E bHR5 ",
-"RHc5 RbME2 RbEM&2 V2RbH cRVH2 Rb5ME M&ERb5 V5RbH cR5sH bdR; Rb+d; bHR; c;gR",
-" b5Rd Rb>d RbH5d gRc> RbdM; RbdM;& VdRb; gVcR; Rb5dM >MbRd V5dRb V>gcR RbP ",
-"UP& bPRD cRP R.bP bPR8 RbDP. R8cP Sb Sb& SVb Sc Sbj Sb8 VbSj Scs R(bP bPR+ ",
-"RbDP( R+cP RbP(. Rb+8P bP(RD. cR+8P Sb( Sb+ VbS( Sc+ bjS( b+S8 SVbj( S+sc R",
-"bW bWR& bHRW cRW R.bW bWR8 RbHW. RWc8 SbW bWS& SZb ScZ bWSj bWS8 SjZb ZcSs ",
-"bWRd b+RW RbHdP cRgP RbWd. dP&U8 dP.RbH cRWg8 Sbd b+Sd ZbSd gSc bdSj b8Sd S",
-"Zbdj gsSc Rbm bmR& bmRD cRm b5Rm b8Rm Rb5Dm R5cm Sbm bmS& VmSb Scm Spb pbS8",
-" SbVp Scp bmR; b+Rm RbmD; R+cm Rb5;P Rb>P b5PRD; cR>P Sb; b+S; V;Sb Sc; pbS",
-"; S>b SpbV; Sc> bWRm RbWm& bHRm RHcm b5RW Rb5W8 RbH5W R5cW bWSm SbWm& SmZb ",
-"cmSZ SWpb SpbW8 ZpSb SZcp vRb Rbv& RbvD cvR Rbv5 >Rvb vRbH5 v>cR Svb vbS+ S",
-"bVv Scv pvSb v>Sb VvpSb ycS Rk Rk! RkB Rak R1 R18 R1B R1a RkM kMR! RTk TkRa",
-" lR lR8 lRT lsR Rk( R+k k(RB +kRa R1( R1+ 1(RB 1+Ra kMR( Rk+M R(Tk +kRT lR(",
-" l+R RTl( sRl+ RkE kER! RHk HkRa R1E RE8k R1H 1HR8 kMRE RkM!E HkRT RHTak lR",
-"E R8lE lHR sRlH Rdk +kRd HkRd gRk R1d 1+Rd 1HRd gR1 RkdM dkMR+ TkRd RTgk ld",
-"R R+ld RHld glR Rk2 k2R! k2RB R2ak R15 5kR8 RB5k 1aR5 kMR2 RkM!2 R2Tk ak2RT",
-" lR5 R5l8 R5lT l5sR R;k +kR; RBk; akR; R1; >kR RB1; R1>a RkM; k;MR+ TkR; ak",
-";RT l;R l>R RTl; sRl> kER2 RkE!2 R2Hk ak2RH RE5k R158E 1HR5 R1H5a RkME2 kME",
-"R2! RHTk2 RHTak2 R5lE lR58E RHl5 lsRH5 dkR; dk;R+ HkR; R;gk 1dR5 R1>d 1HR; ",
-"gR>k dkMR; R+dk;M RH;Tk gRTk; R5ld >Rld RHl; gRl> kP kP! kPB akP R1P 8kP RB",
-"1P 1PRa Sk S!k STk Sak Sl Sl8 SlT Ssl kP( +kP P(kB ak+P R(1P 1PR+ kP(1B akP",
-"1+ Sk( S+k TkS( +TSk Sl( l+S STl( l+Ss RWk R!Wk HkP WkRa R1W 1WR8 1HRW 1WRa",
-" SWk WkS! SZk ZkSa lWS S8lW lZS lZSs dkP +kRW dkHP gkP 1WRd 1+RW dkP1H R1gP",
-" Sdk +WSk ZkSd gSk ldS S+lW SZld glS Rmk R!km RBkm akRm R1m 1mR8 RB1m 1aRm ",
-"Skm kmS! TkSm akSm Slp lpS8 lTSp Slsp k;P +kRm kB;P k;aP 1mR; >kP k;P1B ak>",
-"P S;k +kS; TkS; akS; l;S S>l lTS; Ssl> WkRm km!RW HkRm akmRH 1WR5 R1W8m 1HR",
-"m akPH5 WkSm S!Wkm SmZk SZakm SplW SlpW8 SplZ SZpls vRk R+vk RHvk vRgk vR1 ",
-"vR>k R1vH gk>P Svk vkS+ ZkSv gkSv lvS S>lv lZSv ylS R9 R9& R9B R9a R91 :R 9",
-"1RB :Ra R9M 9MR& R9T 9TRa lR9 l:R R9lT s:R R9( R9+ 9(RB 9+Ra 91R( :R+ R91(B",
-" R+:a R(9M 9MR+ R(9T 9+RT R9l( :Rl+ lR9T( s+:R R9E REk& R9H 9HRa 91RE :RE 9",
-"HR1 :RH RE9M k&ERM 9HRT R9HT& R9lE lE:R R9lH :RlH R9d 9+Rd 9HRd gR9 9dR1 :R",
-"d R9H1d g:R 9MRd dk&RM 9TRd R9gM R9ld :Rld lHR9d gRl: R92 R2k& 92RB R29a R9",
-"5 :R5 RB95 R5:a R29M k&2RM R29T R9T&2 R9l5 l5:R 95RT s5:R R9; 9+R; RB9; 9aR",
-"; 95R; :>R R95;B :a>R 9MR; k;&RM 9TR; aM;R9 R9l; :Rl> l;R9T :>sR 9ER2 k&ER2",
-" R29H R9H&2 RE95 R5:E 9HR5 RH:5 R9ME2 R9EM&2 R9HT2 aM2R9H lR95E :R5lE lHR95",
-" :RHl5 9dR; dk&R; 9HR; R9g; 95Rd >R:d R9H1; :>gR R9dM; R9dM;& R9HT; gR9T; l",
-"dR95 l>:Rd lH;R9 g:Rl> R9P kP& RB9P 9PRa 9PR1 :RP kPB91 Ra:P S9 S9& S9T S9a",
-" Sl9 S: lTS9 S:s R(9P 9PR+ kP(9B akP9+ kP(91 R+:P 9P(R1B :R+aP S9( S9+ 9TS(",
-" 9+Sa l(S9 S:+ Sl9T( S+s: R9W 9WR& 9HRW 9WRa 9WR1 :RW R9H1W RH:W S9W 9WS& S",
-"Z9 Z9Sa S9lW S:W S9lZ S:Z 9WRd 9+RW dkP9H R9gP dkP91 R+:W 9HPR1d :RgP S9d 9",
-"+Sd Z9Sd gS9 S9ld S:d SZ9ld gS: R9m 9mR& RB9m 9aRm 95Rm :Rm R95mB Ra:m S9m ",
-"9mS& 9TSm 9aSm Sp9 S:p STp9 :pSs 9mR; 9+Rm k;P9B ak;9P k;P95 :R>P k;B95P :>",
-"Ram S9; 9+S; 9TS; 9aS; S9l; S:> Sp9T; s:S> 9WRm km&RW 9HRm km&RH 95RW R5:W ",
-"R9H1m RH:m 9WSm S9Wm& SmZ9 SZ9am SWp9 :WSp ZpS9 SZ:p vR9 R9v& R9vH vRg9 R9v",
-"1 :vR vR91H gR:v Sv9 v9S+ ZvS9 g9Sv S9lv S:v Sv9lZ y:S RUk U!Rk RDk DkRa R1",
-"U 1UR8 R1D 1URa UkRM RUkM! VRk RaVk lRU R8lU VlR VlsR UkR( RU+k R(Dk +kRD R",
-"(1U 1UR+ R(1D 1+RD RUkM( R+UkM RkV( R+Vk RUl( R+lU VRl( lRV+ UkRE RUk!E HkR",
-"D RHUak RE1U R1U8E 1URH R1HU8 RUkME U!kRME RHVk VRHak RUlE lRU8E VRlH lsVRH",
-" RUdk R+Udk DkRd RDgk 1URd R1+Ud 1DRd R1gU dkMRU R+UdkM RdVk VRgk RdlU l+RU",
-"d lRVd VlgR UkR2 RUk!2 R2Dk ak2RD 1UR5 R1U58 1DR5 R1D5a RUkM2 U!kRM2 RkV2 V",
-"2Rak R5lU lRU58 lRV5 lsVR5 RUk; R+Uk; DkR; ak;RD 1UR; R1>U 1DR; R1>D k;MRU ",
-"R+Uk;M R;Vk V+Rk; R;lU lR>U lRV; >RVl RUkE2 U!kRE2 RHUk2 RHUak2 R1U5E 1U5R8",
-"E R1HU5 1UHR5a UkMRE2 !ER2UkM V2RHk ak2VRH lRU5E R5Ul8E VlRH5 Vs5lHR dk;RU ",
-"R+Udk; RH;Dk gRUk; R1dU5 >kRUd R1HU; >kgRD RdUk;M dkR;U+M VdRk; gVRk; ldRU5",
-" l>RUd lH;VR V>lgR UPk U!kP DkP akUP 1UP U81P 1PRD Ua1P SUk U!Sk SVk VaSk S",
-"lU lUS8 SlV SVls U(kP +kUP D(kP Dk+P 1(UP U+1P R1DP( R1+DP UkS( U+Sk VkS( S",
-"kV+ SUl( lUS+ l(SV SVl+ WkUP kP!UW HkUP akPUH 1URW R1WU8 1WRD R1WUa UWSk S!",
-"UWk ZkSV SZVak SUlW SlUW8 SVlZ SlVsZ dkUP dkPU+ dkDP UPgk Ud1P dkPU8 dkP1D ",
-"1UgP UdSk S+UWk SkVd SVgk lUSd S8dlU SVld SlgV kmUP km!UP DkRm akmRD 1URm R",
-"1mU8 1DRm akPU5 UmSk S!Ukm SkVm SVakm pUSl SlpU8 SlVp SlVsp k;UP k;PU+ k;DP",
-" ak;UP U;1P 1U>P k;P1D Dk>P U;Sk S+Ukm SkV; SV+km lUS; >USl SVl; SlV> RWUkm",
-" RWUkm! RHmDk RWDakm R1WU5 1UWR8m R1HUm 1UHR8m SUWkm km!SUW SZVkm ZkVSam Sl",
-"pUW lWpS8U SlVZp VplSsZ UPvk vRU+k RDvk gvRDk R1vU >kvUP R1vD >kgUP SUvk Sv",
-"U+k vkSV VvgSk vUSl lv>SU SlVv SlyV tR tR& tRD tcR tR1 t:R R1tD :cR tRM R&t",
-"M VtR VtcR ltR :Rlt lRVt uR tR( t+R RDt( cRt+ R1t( :Rt+ tR1D( :+cR RMt( R+t",
-"M VRt( tRV+ tRl( lRt+ ltVR( uR+ tRE R&tE tHR cRtH R1tE tE:R R1tH :RtH RMtE ",
-"tRM&E VRtH tcVRH tRlE t:RlE lRtH uRH tdR R+td RHtd gtR R1td :Rtd tHR1d t:gR",
-" RdtM t+RdM tRVd VtgR lRtd t:dlR tdVlR ugR tR2 R&t2 RDt2 c2tR t5R :Rt5 R5tD",
-" cRt5 RMt2 tRM&2 tRV2 tcVR2 lRt5 t:Rl5 tRV5 uR5 t;R R+t; RDt; cRt; R1t; t>R",
-" t5RD; :Rc> R;tM t+RM; tRV; tc;VR lRt; >Rlt t5VR; u>R REt2 tR&E2 RHt2 tcRH2",
-" R5tE t:R5E RHt5 t:HR5 tRME2 M&EtR2 tHVR2 cRVtH2 t5RlE lt5:RE tH5lR RHu5 Rd",
-"t; t+Rd; RHt; t;gR R5td >Rtd tH5Rd gRt> tdRM; dM&t;R tH;VR gtVR; t5dlR t>lR",
-"d tH;lR g>uR tP tP& tPD tcP tP1 t:P 1DtP :ctP St St& StV Sct Stl S:t SVlt u",
-"S tP( t+P DPt( cPt+ 1Pt( :Pt+ tP1D( t:Pc+ St( St+ S(Vt tcS+ l(St l+St SlVt(",
-" uS+ tWR RWt& tHP cRtW R1tW :RtW 1HtP :HtP StW tWS& tZS tZSc lWSt tWS: lZSt",
-" uZS tdP R+tW HPtd gtP 1dtP :dtP tHP1d t:gP Std t+Sd SdtZ gtS ldSt t:Sd Std",
-"lZ ugS tmR Rmt& RDtm cRtm t5P :Rtm 5DtP cR:m Stm tmS& tmSV tmSc tpS tpS: Vp",
-"St upS t;P R+tm D;tP c;tP 1;tP t>P t5PD; tc>P St; t+S; t;SV S;tc l;St S>t S",
-"t;Vp u>S RWtm tWRm& RHtm tcWRm R5tW t:WR5 H5tP t:HRm SWtm StWm& tmSZ ScZtm ",
-"tWSp S:ptW SZtp SZup tvR vRt+ vRtH gRtv vRt5 >Ptv tvR1H >Pgt tvS S+tv StVv ",
-"tvgS Stlv tvS: lvVSt yuS )O !)O )BO a)O )O. 8)O )O.B a)8O )OK )O!K T)O a)TO",
-" jO) 8)jO T)jO s)O *O +*O *BO a*O *O. 8*O .B*O 8Oa* *OK *O+K T*O +OT* *jO j",
-"O8* jOT* s*O E)O E)!O H)O a)HO )OE. E)8O )OH. 8)HO )OEK !E)OK T)HO HTa)O E)",
-"jO jO8E) H)jO H)sO d*O d*+O H*O g*O *Od. d*8O *OH. 8*gO *OdK +d*OK HOT* T*g",
-"O d*jO dj*+O jOH* gOs* )O2 )O!2 )O2B )Oa2 5)O 8)5O )B5O a)5O )O2K !)2OK )OT",
-"2 Ta)O2 5)jO jO58) T)5O 5)sO ;*O ;*+O ;O*B ;*aO 5*O >*O 5O*B a*>O *O;K +;*O",
-"K ;*TO a;*TO jO5* *j>O 5OT* >Os* )OE2 !)2EO )OH2 Ha)O2 E)5O 58E)O 5)HO H58)",
-"O EK)O2 !)OEK2 HT)O2 Ta)HO2 jO5E) 58EjO) H5T)O sH5)O ;*dO +d;*O ;*HO ;*gO d",
-"*5O d*>O HO5* g*>O dK;*O dK;+*O H;T*O gT;*O dj*5O >*djO H5*jO s*Og> P) P)! ",
-"P)B aP) P). 8P) .BP) 8)aP QP) P)Q! TP) Q)aP Pj) Q)8P T)Pj sP) P* +P* P*B aP",
-"* P*. 8P* P.*B aP8* Q*P Q*+P TP* T*+P P*j 8PQ* PjT* sP* WP) P)W! HP) H)aP P",
-")W. W)8P P)H. H)8P QPW) Q!WP) ZP) aPZ) W)Pj Pj)W8 PjZ) ZPs) W*P W*+P HP* gP",
-"* W.P* 8PW* H.P* 8Pg* dPQ* +WQP* Z*P Z*gP P*Wj dPj8* P*Zj s*gP mP) P!m) P)m",
-"B mPa) 5P) 5)8P P)5B 5)aP mPQ) Q!mP) mPT) amPQ) pP) 8Pp) TPp) pPs) m*P m*+P",
-" *B;P m*aP 5P* >P* *B5P aP>* ;PQ* m*P+Q m*TP am*TP p*P p*>P TPp* s*>P mPW) ",
-"W!mP) mPH) amPH) WP5) 5W8P) H)5P H5P8) WQmP) WmPQ!) mPZ) ZamP) WPp) pW8P) p",
-"PZ) sP)Zp vP* +Pv* HPv* vPg* 5Pv* vP>* 5PH* >*gP Q*vP v+QP* vPZ* ZvPg* vPp*",
-" >Ppv* ZPp* y*P ,O ,&O ,OB ,aO ,O. ,8O .B,O 8a,O ,OK &O,K ,TO ,OT& ,jO ,O&j",
-" jO,T s,O ,*O -O ,O*B -aO *O,. -8O *B,O. 8a-O *O,K -OK ,OT* -TO ,O*j -jO *j",
-"O,T s-O ,EO &E,O ,HO ,OH& EO,. 8E,O HO,. ,OH8 EK,O ,&EOK HT,O ,HTaO jO,E &j",
-"E,O ,OHj ,HsO ,dO -dO ,OH* g-O dO,. 8d-O ,HdO. -8gO dK,O dK-O ,OTd gO-T ,Od",
-"j dj-O ,HjdO gOs- ,O2 &O,2 2B,O aO,2 ,5O ,O5& 5B,O ,O5a 2K,O ,&O2K TO,2 ,Ta",
-"O2 jO,5 &jO,5 ,O5T ,5sO ,;O -;O ;O,B a;-O ,O5* ->O ,5;OB -a>O ;O,K ;O-K ,OT",
-"; T;-O ,O;j >O-j ,5T;O >Os- EO,2 ,&EO2 HO,2 ,HaO2 5E,O ,58EO ,OH5 ,H58O ,EO",
-"2K &EO,2K ,HTO2 H&O,T2 ,5jEO ,5E&jO ,H5jO s,H5O d;,O d;-O ,OH; -;gO ,O5d -d",
-">O ,H5dO >Og- ,d;OK -d;OK ,H;TO -T;gO ,5djO ->djO ,H;jO s-g>O ,P ,P& ,PB ,a",
-"P ,P. ,8P P.,B 8P,a ,QP Q&,P ,TP Qa,P ,Pj Q8,P TP,j sP, ,P* -P *B,P -Pa ,.P",
-"* -P8 P*.,B 8P-a Q*,P -QP T*,P -TP P*,j -Pj P*j,T s-P ,WP W&,P ,HP HP,a WP,",
-". W8,P ,.HP H8,P WQ,P ,WQP& Z,P ,aZP Wj,P P&j,W ,PZj Z,sP ,dP -WP HP,d g-P ",
-",.dP W8-P ,HPd. g8-P Qd,P Qd-P ,dZP Z-P dP,j Wj-P Z*P,j gPs- ,mP m&,P mP,B ",
-"am,P ,5P 5P,8 ,B5P 5a,P Qm,P m&P,Q Tm,P ,QamP p,P ,8pP ,TpP p,sP ,;P -mP ,B",
-";P am-P 5P,; >P- ,5P*B -a>P Q;,P Q;-P T;,P Tm-P ,;pP -pP p*T,P >Ps- Wm,P m&",
-"P,W Hm,P ,HmaP 5W,P ,5W8P H5,P ,H58P ,WQmP ,WQm&P ,mZP Z&m,P ,WpP p&W,P ZPp",
-", sP,Zp v,P -vP ,HvP gP-v ,5vP >P-v v,H5P g->P ,QvP vQ-P ZPv, -PZv pPv, pv-",
-"P Zp*,P y-P C)O C)!O D)O a)DO )OC. C)8O )OD. 8)DO )OCK !CO)K T)DO DTa)O C)j",
-"O jO8C) D)jO D)sO *CO *C+O D*O +OD* CO*. *C8O *OD. DO8* CK*O +*COK DOT* a*O",
-"DT *CjO *jC+O jOD* D*sO E)CO CE)!O D)HO HDa)O C).EO 8CE)O HD)O. H8D)O CE)OK",
-" EK)!CO HDT)O DTaH)O jOCE) 8CEjO) HjD)O sHD)O *CdO +d*CO HOD* D*gO d*CO. 8d",
-"*CO H*DO. gD8*O dK*CO dK*+CO H*DTO gDT*O dj*CO 8dC*jO H*jDO s*DgO )OC2 !)2C",
-"O )OD2 Da)O2 C)5O 58C)O D)5O 5D8)O 2KC)O CKO!)2 DT)O2 Ta)DO2 jO5C) 58CjO) 5",
-"DT)O s5D)O *C;O +;*CO ;*DO a;*DO *C5O *C>O 5OD* D*>O ;*COK ;*C+OK D;T*O D;T",
-"a*O ;jC*O >*jCO 5D*jO >D*sO CE)O2 !O2CE) HD)O2 Da)HO2 5CE)O 8CE5)O H5D)O 5D",
-")H8O C)OEK2 C)!OEK2 DT)HO2 DTH)aO2 5CEjO) 5)jO8CE 5D)HjO H5Ds)O d;*CO d;*+C",
-"O H;D*O gD;*O 5d*CO >*dCO H5*DO >D*gO ;*CdKO dK+*;CO D;TH*O D;Tg*O 5dC*jO d",
-"j*>CO djO5D* gs*>DO PC) !CP) DP) D)aP C)P. PC8) P)D. D)8P PCQ) Q!PC) Q)DP a",
-"P)QD jCP) PjC8) D)Pj DPs) P*C +CP* DP* D*+P *CP. 8CP* D.P* 8PD* QCP* P*C+Q ",
-"DPQ* aP*QD PC*j P*j+C P*Dj DPs* PCW) W!PC) H)DP aP)WD WPC). W8PC) HPD). H8P",
-"D) WQPC) WPCQ!) DPZ) ZDaP) PjCW) W8CPj) ZDPj) sPDZ) WCP* dPC+* DPH* DPg* dP",
-"C*. W8*PC HP*D. gPD8* dPCQ* +WQP*C DPZ* Z*DgP dPj*C dPCQ8* Z*DPj sP*gD PCm)",
-" mPC!) mPD) amPD) PC5) 5P8C) 5)DP 5DP8) QmPC) mPCQ!) QDmP) QDmaP) PCp) p8PC",
-") DPp) sPDp) mCP* m*P+C m*DP am*DP 5CP* P*>C DP5* DP>* m*PQC +QmP*C QD;P* Q",
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-"(B aPnR+ RPn(. R+8Pn Pn(R.B R+8aPn Sn( S+n TnS( +TSn njS( +nS8 STnj( S+sn R",
-"Wn R!Wn HnRW WnRa R.Wn WnR8 RHWn. RH8Wn SWn WnS! SZn ZnSa WnSj W8Sn SjZn sn",
-"SZ WnRd +nRW RHWdn RWgn dP.Rn R+W8n RHWdn. gRW8n Sdn +WSn ZnSd gSn dnSj 8dS",
-"n SZdnj gnSs oR o!R oRB oaR oR5 o8R R5oB R5oa So So! SoT Soa Sop So8 oTSp o",
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-"sS> oRW RWo! oHR RHoa R5oW RWo8 RHo5 RHo8 SoW o!SW oZS SaoZ SWop SWo8 SpoZ ",
-"oZSs ovR vRo+ vRoH goR o5vR vRo> ovRH5 gRo> Svo ovS+ oZSv goS opSv o>Sv SZp",
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-"n#ME ME&n H#Mn M&Hn Mn#jE M&n8E RHjn# snHR& R#dn dnR& dn#RH R&gn dn#R. d&nR",
-"8 RH#dn. gR8&n d#Mn M&dn dMnH# M&gn dMnj# dM&8n dM#Hnj gsR&n R4# R4& 4#RB 4",
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-" UPcn RbPn. Rb8Pn bPnRD. cR8Pn Sbn bnS& VnSb Scn bnSj b8Sn SVbnj snSc RbPn(",
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-" Sb+8n VnjSb( Scs+n bnRW W&Un RbHWn RWcn RbWn. RbW8n Rb.WDn cRW8n bWSn SbW&",
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-"R.bHWnd cW8gUn bdSn Sb+Wn SZbdn gnSc Sbdnj Sb8dn SbjVdn gScsn obR oU& RboD ",
-"ocR Rbo5 Rbo8 obR5D oUc5 Sob obS& oVb Sco opSb obS8 obVp osSc Rbo; Rbo+ obR",
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-"n. ,8n n.,B 8n,a ,nK ,K&n ,Tn T&,n ,nj 8n,j Tn,j sn, ,n* -n *B,n -na ,.n* -",
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-"E8n ,.Hn H8,n nE,K <&EnK Hn,T ,HnT& ,Enj <&jnE Hn,j ,Hsn ,dn -nd Hn,d g-n ,",
-".dn 8d-n ,Hnd. g8-n ,Kdn dn-K Td,n -Tgn dn,j dn-j dnj,H gns- ,4n 4&,n 4B,n ",
-"4a,n ,5n 48,n ,B5n 5a,n 4n,K <&K4n 4T,n ,4Tan 4j,n <&j5n 5T,n ,4sn =n, -=n ",
-",n=B -n=a ,5=n >n- =B5,n -a>n ,n=K =K-n ,T=n -n=T ,n=j -n=j =T5,n >ns- 4n,E",
-" <&E4n 4H,n ,4Han ,E5n ,48nE H5,n ,4H8n ,4nEK ,4E&nK ,4HTn 4H&,Tn ,4jnE <jE",
-"5&n ,4Hnj sn,4H ,d=n =d-n ,H=n -=gn 5d,n -d>n =H5,n g->n =dn,K -=dnK =HT,n ",
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-"- o5v, -vo> ov,H5 g-o> oQv, -Qov ovZ, Z-o pvo, op-v oZ,p= yo- <nC <Cn! D<n ",
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-"<5n 4D8<n 4<nCK n!<4CK 4DT<n D<a4Tn <jn4C 48<njC 4Dj<n s<D5n =nC +n=C =Dn +",
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-"<CnjE <j5n8CE 5D<Hnj H5<snD dn=C =+dnC Hn=D gn=D =5dnC >n=dC =H5Dn g=>Dn =d",
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-" ov=D =Dgo ov=5C o>v=C ovD=5 go>=D ov=QC =Qvo+C =DoZ goZ=D p=ovC p=vo>C p=D",
-"oZ =Dyo ,nb <&bn ,Dn c<n ,.bn b8,n ,.Dn ,8cn ,Kbn <&Kbn bT,n ,Tcn bn,j <&jb",
-"n Dn,j c<sn bn* -nb Dnb* c-n b.n* b8-n ,Dn*. c8-n bKn* bn-K Tnb* -Tcn n*bj ",
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-"HnbT c<HTn ,njbE <&Ebnj ,Hnbj sn,cH bd,n bd-n Hnb* c-gn ,dnb. -nb8d ,Ddn. c",
-"-ng8 ,dnbK -nbdK ,DdTn c-ngT <djbn -njbd dnj,D s-ngc 4b,n ,4b&n 4D,n ,4cn b",
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-"4HcnT <jEb5n &n4jb<E 4bH,nj s<Hc5n bd=n =b-dn bH=n gnc= =b5dn >n-bd =bH5n c",
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-"dK ?Td=n g?=Tn ?d7nj dnAj ?Hj=n gsAn ?P ?P& ?PB ?aP ?P1 ?:P 1P?B :P?a ?QP Q",
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-">D=n =6nCK 6+n=CK =D6Tn 6+D=Tn 7=njC >nj7=C =D7Tn s=7Dn 6<n4CE 4<6!nCE 6H<4",
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-"dnC=6K dn=C6+K 6Dd=Tn g6D=Tn =jn7dC >j7d=nC 7Hn=Dj s=Dg7n 6C<P <PC6! D<6P 6",
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-" R<d +<Rd H<Rd gR< R.<d 8<Rd RH<d. R8g< <MRd <dMR+ T<Rd RTg< <dRj <dMR8 <dj",
-"RH sRg< R4< 4!R< 4<RB 4aR< R5< 48R< RB5< 5aR< 4MR< <M!R4 4TR< aMn4< 4jR< R4",
-"8<M 5TR< R4s< =R =R+ =RB =Ra =R5 =R> R5=B >R=a =RM R+=M =RT R+=T =Rj =R>M R",
-"5=T s=R 4<RE R4<!E 4HR< R4Ha< RE5< R48<E H5R< R4H8< <MER4 R4E<M! R4HT< 4HMR",
-"a< R4j<E <MER48 R4H<j sR4H< =Rd R+=d =RH g=R R5=d =d>R RH=5 g>=R Rd=M =R+dM",
-" RH=T gR=T Rd=j >M=Rd RH=j gs=R R<P R!<P RB<P aPR< R.<P 8PR< <P.RB R8<aP S<",
-" S<! S<T Sa< S<j S8< T<Sj Ss< <PR* +PR< <P*RB aP*R< <P*R. R+<8P R<.P*B R8<a",
-"P* S<* S+< T<S* +TS< <jS* +<S8 S<T*j S+s< RW< R!W< H<RW WaR< R.W< W8R< RH<W",
-". RH8W< S<W W<S! SZ< Z<Sa W<Sj W8S< SjZ< s<SZ W<Rd +WR< RH<W* RWg< RW<d. R+",
-"W8< <P.RH* gR<W8 S<d +WS< Z<Sd gS< <dSj 8<Sd SZ<dj g<Ss oR< R<o! R<oB Rao< ",
-"R5o< R8o< oR5<B o8Ra< So< o!S< oTS< oaS< Sp< o8S< STp< s<So =Ro o+=R oR=B o",
-"a=R oR=5 =Ro> o=5RB o>=Ra S= S=+ S=T S=a S=p S>= Sp=T s=S RWo< o!RW< RHo< o",
-"HRa< 5WR< o8RW< oHR5< oH8R< oWS< S<Wo! S<oZ SZ<oa SWp< Sp<W8 ZpS< osZS< =Rv",
-" =+vR oH=R =Rgo =5vR v>=R =RvH5 g=Ro> S=v v=S+ S=Z gS= p=Sv v>S= SZp= y=S ,",
-"R< R<& RB,n Ra,n ,.R< R8,n ,R<.B ,R8a< ,Mn <MR& RT,n T<R& R<,j 8M,n ,RT<j ,",
-"Rs< R*,n -R< n*B,R Ra-n n*.,R R8-n ,R.n*B -R8a< M*,n -Mn Mn*,T RT-n Mn*,j R",
-"<-j ,RTn*j -Rs< ,ER< RE<& RH,n H<R& ,R<E. ,R8<E ,RH<. ,RH8< ,EMn <M&RE HM,n",
-" aMn,H ,Rj<E <&jRE ,RH<j sn,RH R<,d R<-d ,RH<d -Rg< ,Rd<. -R8<d <d.,RH g-R8",
-"< dM,n dM-n dMn,H -Mgn <dj,R -Rj<d ,RH<dj s-Rg< ,R4 R&,4 RB,4 R4,a R4,5 R4,",
-"8 ,R45B ,R45a R4,M <M&R4 R4,T aMn,4 R4,j <M&R5 ,R45T ,Rs4 =R, =R- ,R=B -R=a",
-" ,R=5 ->=R =R5,B >n-Ra ,R=M -R=M ,R=T -R=T ,R=j -R=j =RT,5 =Rs- ,ER4 ,R4&E ",
-"R4,H ,R4H& ,R45E ,R48E ,R4H5 ,R4H8 ,R4ME <MER4& ,R4HM ,4HaMn ,R4jE <MER5& ,",
-"R4Hj sR4,H ,R=d =d-R ,R=H g-=R =R5,d >n-Rd =RH,5 g=R-> =Rd,M =R-dM =RH,T g=",
-"R-T =Rj,d >M-dn =RH,j s=Rg- R<,P <PR& <PB,R <P&Ra <P.,R <P&R8 ,R.<PB R8<,aP",
-" S<, S<& ,TS< ,aS< ,nSj ,8S< S<T,j S<s, <P*,R R<-P ,R<P*B -Ra<P ,R<P*. -R8<",
-"P <PR*,.B R8<-Pa ,nS* S-< S<T,* -TS< S<*,j -nS8 n*jS,T s<S- RW,n W<R& ,RHW<",
-" <P&RH ,RW<. ,RW8< <P.,RH RH8<P& ,WS< W<S& Z<S, Z<S& S<W,j S8<,W SZ<,j Ss<Z",
-"& ,RW<d RW-n RH<,dP -RWg< <d.,RW -RW8< ,.RHWn* -R8g<P ,dS< -WS< SZ<,d g<S- ",
-"S<d,j S-W8< SdjZn, gS-s< o,R ,Ro& ,RoB ,Roa ,Ro5 ,Ro8 o,R5B o8,Ra So, o&S< ",
-"oTS, oaS, opS, o8S, Sp<,T s,So o,=R o-R o=,RB -Roa o=5,R -Ro> o,5=RB o->Ra ",
-"S=, S-o S,=T =TS- S,p= o-S> S=p,T S-s= ,RoW o&R,W ,RoH oH&,R o,R5W o8,RW oH",
-",R5 oH8,R SWo, S<&oW S,oZ oZ&S< Sp<,W Sp<W& oZ,Sp os,SZ vRo, =R-v ov,RH gRo",
-"- ov,R5 o-v>R =R5oH, go->R ovS, Svo- S,Z= S-go Sv,p= o-pSv S=Zp, S-yo R<U R",
-"!U< RD< UaR< R.U< U8R< R.D< D8R< <MUn <M!Un V<R RaV< U<Rj R8<Uj R<Vj V<sR U",
-"n* U+R< D<R* +DR< U.n* 8nU* RD<*. an*U8 MnU* Mn*U+ Vn* R+V< n*Uj Mn*U8 n*Vj",
-" Vns* REU< R<U!E UHR< RH<Ua R<UE. R8<UE RH<U. RH8U< <MEUn U<EMn! RHV< V<RHa",
-" R<jUE <MEU8n V<RHj s<VRH U<Rd R+<Ud HnU* RDg< R<dU. R8<Ud RD<d. gR<U8 <dMU",
-"n U+<dMn R<Vd V<gR <djUn U+<dnj V<dRj gV<sR 4UR< R4U<! 4DR< R4Da< U5R< R48U",
-"< 5DR< R4D8< R4U<M R4U<M! R4V< V4Ra< R4jU< 4U8R<j R5V< s<VR4 =RU R+=U =RD R",
-"+=D R5=U =U>n R5=D >R=D Un=M =RU+M V=R V+=R Rj=U >M=Un V5=R >nV= R4U<E 4UER",
-"<! R4HU< 4UHRa< R5<UE R4EU8< RH5U< 4UHR8< R4U<ME <MUn4E! V4RH< R4HV<a <MEU5",
-"n RE48U<j V5<RH s<HV5n Rd=U =RU+d RH=U gR=U =RU5d >nU=d =RHU5 g=R>U =RUdM d",
-"Mn=U+ Vd=R =RgV =RjUd >nd=Uj V=RH5 V>ng= U<P U!<P D<UP a<UP U.<P 8<UP RD<P.",
-" RD8<P S<U U<S! SV< V<Sa U<Sj U8S< SjV< SVs< <PU* +<UP RD<P* aP*U< U<P*. U+",
-"<8P <P.RD* U8<aP* U<S* U+S< V<S* V+S< S<U*j S+<U8 SV<*j Ss<V+ UWR< RW<U! H<",
-"UP RWDa< RW<U. RW8U< RWD<. RWD8< UWS< S<UW! Z<SV SZ<Va S<UWj S8<UW SZ<Vj Ss",
-"<VZ WnU* R+WU< RWD<d U<gP UWn*. UW8n* <d.RWD gU<8P U<Sd S+<UW V<Sd SVg< S<d",
-"Uj S8<Ud SV<dj gS<Vs oU< U<o! RDo< Uao< U5o< U8o< oU5D< oU8D< oUS< S<Uo! oV",
-"< V<oa pUS< Sp<U8 S<Vp s<oV =Uo o+=U oU=D oU=a =5oU =Uo> =RDo5 o>U=D S=U S+",
-"=U S=V =aoV Sp=U =US> VpS= oVs= UWo< oUW<! UHo< oUHa< oU5W< oU8W< oUH5< oUH",
-"8< S<UoW oUWS<! Z<oV oVZa< Sp<UW S8WpU< oVZp< oVsZ< ov=U ovU=+ oU=H =Ugo ov",
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-"RD,n cR< ,.Un b8R< ,RD<. R8c< bM,n <M&Rb Vn, V<cR b<Rj <&jRb ,nVj cRs< b<R*",
-" -Un ,RDn* -Rc< ,Un*. U8-n n*.,RD c-R8< Mnb* bM-n ,nV* V-n Mn*bj Un-j Vn*,j",
-" snV- ,EUn ,Un&E bHR< RHc< ,UnE. ,U8nE ,UHn. cR<H8 ,UnME <MEU&n ,HVn cR<VH ",
-",UnjE <MERb8 Vn,Hj snV,H b<Rd Ud-n ,RD<d cRg< ,Udn. -Un8d <d.,RD cR<g8 <dMR",
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-"R45D R5c< ,R4bM ,4UM&n ,RV4 cR4V< ,R4bj ,4U&nj ,5Vn snV,4 =Rb -R=b ,R=D c=R",
-" Rb=5 -U>n =Rb5D =Rc> Rb=M =R-bM Vn=b =RV- Rb=j >M-bn V=R,5 >nV- ,R4bE <&ER",
-"4b ,R4bH cR4,H ,U5nE <&ERb5 ,UH5n cR5H< <MER4b <MR&4bE V4,RH cRHV4, <MERb5 ",
-"R4,jb8E V5n,H s<HcR4 Rb=d =R-bd Rb=H gc=R =Rb5d >n-Ud =RbH5 c=Rg> =RbdM =bd",
-"-Mn V=R,H c=VgR =Rbdj >Md=Rb =RbHj c=Rgs bPR< <PU& ,RD<P R<cP ,UP<. <P&U8 <",
-"P.,RD cR<8P Sb< b<S& V<Sb Sc< b<Sj b8S< SV<,j s<Sc ,UPn* U<-P b<PRD* c-R<P ",
-"<P.Rb* -UP8< <Pb*RD. c<8-UP b<S* -US< SV<b* S<V- Sb<*j S-b8< SbjVn* V-nSs b",
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-"8W< SZb<j Sc<sZ ,UWdn UW-n RWD,dn c-RW< <d.,UP -UW8n RW,D<d. cR8-Wn b<Sd S-",
-"bW< SZb<d g<Sc Sb<dj Sb8<d SbjZn* V-nsZ oU, ,Uo& ,RoD oUc< ,Uo5 ,Uo8 oU,5D ",
-"ocR,5 obS< Sb<o& oV, S<oc pbS< Spb8< o,Vp s,oV ob=R o-U =RboD =Roc =Rbo5 ->",
-"oU ob5=RD oc->R S=b =bS- =boV Sc= Sp=b =bS> oV,p= Scs= ,UoW oU&,W ,UoH ocR,",
-"H oU,5W oU8,W oUH,5 cR5W< Sb<oW S<WoU& Z,oV oV,Zc SpbW< SbWo8, oV,Zp oVsZ, ",
-"vR=b oU-v ovU,H =Rcv ovU,5 o-Uv> ob5=RH cv=>R =bSv o-USv SZ=b Z=Sc S=bpv o-",
-"pvU oVvp, Scy= q< q!< q<B qa< q1< q8< 1<qB 1aq< q<M <Mq! qT< T<qa l<q q8l< ",
-"qTl< sq< q* q+< q*B qa* q*1 q8* 1*qB 1aq* q*M +<qM qT* +Tq* l*q q+l< qTl* s",
-"q* q<E <Eq! qH< H<qa 1<qE 8<qE 1Hq< H8q< <MqE q!<ME H<qT qHTa< q<lE l<q8E q",
-"Hl< qHs< qd< +<qd qH* gq< 1<qd 8<qd 1Hq* q8g< <dqM q+<dM HMq* qTg< qdl< l+q",
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-"l< 7lq8< 7<qT 7qs< q= q=+ q=B q=a q=7 q>= =B7q =aq> q=M q+=M q=T q+=T l=q q",
-">l= 7q=T sq= 4<qE q!4<E 4Hq< qH4a< q<7E 7q8<E 7<qH 7qH8< q4<ME <MEq!4 qH4T<",
-" 4HMqa< 7lq<E l<87qE 7qHl< sq7H< q=d =+qd q=H gq= 7dq= >=qd 7q=H g=q> qd=M ",
-"q=+dM qH=T =Tgq ldq= q>l=d lHq= l=gq q<P <Pq! <PqB a<qP 1<qP 8<qP q1<PB q8a",
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-" q8*aP Sq* q+S< qTS* qaS* Sql* S+l< Sq*lT s*Sq qW< W<q! H<qW Waq< 1Wq< W8q<",
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-"o<qa 7<oq o<q8 7oq<B 7oaq< oqS< Sq<o! o<qT Sqao< r< r8< rT< rs< q=o o+q= =B",
-"oq oq=a 7oq= q=o> 7o=qB q>o=a S=q S+q= Sq=T Sq=a r= r>= r=T rs= o<qW oqW<! ",
-"o<qH oqHa< 7<qW 7qW8< 7oHq< 7qWa< SqWo< oqWS<! oqZ< Zqoa< rW< W8r< rZ< sZr<",
-" vq= q+v= =Hvq g=vq q=7v v>q= vq7=H vq>g= vqS= vq=S+ Zq= S=gq rv= v>r= rZ= ",
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-"?Eq& ?qH qH?a q1?E ?E:q ?1qH ?H:q qM?E ?qM&E qH?T ?qHT& lE?q :ql?E ?qlH ?Hs",
-"q ?qd -qd qH?d g?q ?1qd ?d:q ?qH1d g:-q qd?M qd-M qT?d gM-q ?qld ld-q l?Hqd",
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-"M -q=dM q=H?T -qTg= l=?qd ldAq l=H?q glAq ?qP q&?P qP?B qa?P q1?P ?P:q ?q1P",
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-"q ?qH1W :qH?W S?W S&?W S?Z ?aZq lWS? ?WS: l?Zq ?Zsq qW?d -qW ?qHW* gP-q ?qW",
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-"7<qD 7qD8< q4U<M <M!q4U q4V< Vq4a< 7lqU< l<q7U8 V<7q sq7V< q=U q+=U q=D q+=",
-"D 7q=U =Uq> 7q=D =Dq> qU=M q=U+M V=q =aVq lq=U q>l=U Vql= V=sq q4U<E 4U<q!E",
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-"f 7[gw fq[=M [=+fqM V=Jq Jq=gV 7[lf fq>[l Jql= g[l= wP[q [qwP! wPqD [qawP w",
-"P[1 [q8wP [w1DP [w1aP [qSw Sq[w! VqSw VwqSa [lSw Sw8[l SlVw lwVSs [Pq* [q+w",
-"P [q*DP [qaP* [q*1P [q8P* w1PqD* w1P[a* [qS* Sw+[q VwqS* Vw+Sq lw[S* lw+S[ ",
-"lwVS* Vw+Sl [qYw Yw[q! JwYq JqYwa [wY1 Yq8[w JqYw1 Jq8Yw Sq[Yw Yq[Sw! ]qw w",
-"q]a Yw[l lYw[8 ]lw lw]s [fYq fq[Y+ YJfq JqfgY fq[Y1 fq8[Y JqfY1 JqfY8 Sq[f ",
-"Sfq[+ ]qf gq]f lYf[q fq8S[ lf]q gl]w [qow o[qw! wqoD o[awq o[7w o[87w 7wDo[",
-" 7[aow Sq[ow o[qSw! oqVw oVwqa r[w [wr8 rVw swrV q=o[ [=oq+ [=oqD [=aoq 7o[",
-"= [>o7w 7[=oD w>qoD Sq[= S=[q+ oVwq= oVwq+ r[= [>rw Vwr= s=r[ Yw[oq o[wYq! ",
-"oqJw oJqwa Yw7[ 7[Yw8 oJq7w oJqw8 YqoSw[ Sqo[Yw! oq]w ]oqwa Ywr[ r[Yw8 ]rw ",
-"rs]w xq[ [qx+ xJq gqxJ x7[ 7[x> 7Jxq g7x[ Sqx[ xq[S+ ]xq xq]g xr[ r[x> ]xr ",
-"yx]r z z& zD zc z1 z: z1D z:c zM zM& zV zVc zl zl: zlV uz z* z- z*D zc- z*1",
-" z:- 1Dz* :cz- z*M z-M zV* zV- zl* zl- l*zV uz- zG zG& zJ zJc z1G z:G zJ1 z",
-"J: zGM GMz& zJV cJzV zlG l:zG zlJ uzJ zf zf- zJf iz zf1 z:f Jfz1 iz: zfM f-",
-"zM zVf izV zlf lfz: lfzJ uzi z4 z4& z4D zc4 z7 z7: z7D z7c z4M 4Mz& zV4 c4z",
-"V zl7 l:z7 z7V uz7 z= z-= z=D zc= z7= Az =Dz7 Azc z=M =Mz- zV= c=zV zl= Azl",
-" l=zV Azu z4G 4Gz& zJ4 cJz4 z7G 7:zG zJ7 7Jz: 4GzM z4GM& J4zV zJVc4 lGz7 zl",
-"7:G 7Jzl zJu7 zf= f-z= zJ= iz= z7f Azf 7Jzf Azi =Mzf zf-=M J=zV zVi= lfz7 z",
-"lAf l=zJ uzAi zP zP& zDP zcP z1P z:P 1DzP :czP zS zS& zVS zcS zlS z:S SlzV ",
-"uzS z*P z-P DPz* c-zP 1Pz* :-zP z*1DP z:c-P zS* z-S SVz* Scz- l*zS l-zS zlV",
-"S* z-uS zY zY& zJY zYc zY1 zY: YJz1 Y:zJ zYS SYz& ]z ]zc zlY lYz: ]zl uz] z",
-"Yf zY- YJzf izY Yfz1 Y:zf zJYf1 zYi: zfS Sfz- ]zf ]zi lYzf lYz- zl]f ]zui z",
-"o zo& zoD zoc zo7 zo: 7ozD 7czo zoS Soz& zoV Sczo zr zr: zrV uzr zo= zo- =D",
-"zo ocz- 7oz= Azo zo7=D zoAc z=S S-zo S=zV Scz= zr= Azr rVz= uzAr zoY Y&zo z",
-"oJ Yczo z7Y Y:zo 7Jzo Ycz7 SozY zoYS& ]zo zo]c zrY rYz: ]zr ]zur zx zx- zxJ",
-" izx zx7 Azx xJz7 izAx zxS x-zS ]zx iz]x zxr zxAr zx]r |                   ",
-NULL
-};
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares the data for MSOPs of 4-variable functions.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_ReadMsops( char ** ppSopSizes, char *** ppSops )
-{
-    unsigned uMasks[4][2] = {
-        { 0x5555, 0xAAAA },
-        { 0x3333, 0xCCCC },
-        { 0x0F0F, 0xF0F0 },
-        { 0x00FF, 0xFF00 }
-    };
-    char Map[256], * pPrev, * pMemory;
-    char * pSopSizes, ** pSops;
-    int i, k, b, Size;
-
-    // map chars into their numbers
-    for ( i = 0; i < 256; i++ )
-        Map[i] = (char)(-1);
-    for ( i = 0; i < 81; i++ )
-        Map[(int)s_Data3[i]] = (char)i;
-
-    // count the number of strings
-    for ( Size = 0; s_Data4[Size] && Size < 100000; Size++ );
-    assert( Size < 100000 );
-
-    // allocate memory
-    pMemory = ABC_ALLOC( char, Size * 75 );
-    // copy the array into memory
-    for ( i = 0; i < Size; i++ )
-        for ( k = 0; k < 75; k++ )
-            if ( s_Data4[i][k] == ' ' )
-                pMemory[i*75+k] = (char)(-1);
-            else
-                pMemory[i*75+k] = Map[(int)s_Data4[i][k]];
-
-    // set pointers and compute SOP sizes
-    pSopSizes = ABC_ALLOC( char, 65536 );
-    pSops = ABC_ALLOC( char *, 65536 );
-    pSopSizes[0] = 0;
-    pSops[0] = NULL;
-    pPrev = pMemory;
-    for ( k = 0, i = 1; i < 65536; k++ )
-        if ( pMemory[k] == (char)(-1) )
-        {
-            pSopSizes[i] = pMemory + k - pPrev; 
-            pSops[i++] = pPrev;
-            pPrev = pMemory + k + 1;
-        }
-    *ppSopSizes = pSopSizes;
-    *ppSops = pSops;
-
-    // verify the results - derive truth table from SOP
-    for ( i = 1; i < 65536; i++ )
-    {
-        int uTruth = 0, uCube, Lit;
-        for ( k = 0; k < pSopSizes[i]; k++ )
-        {
-            uCube = 0xFFFF;
-            Lit = pSops[i][k];
-            for ( b = 3; b >= 0; b-- )
-            {
-                if ( Lit % 3 == 0 )
-                    uCube &= uMasks[b][0];
-                else if ( Lit % 3 == 1 )
-                    uCube &= uMasks[b][1];
-                Lit = Lit / 3;
-            }
-            uTruth |= uCube;
-        }
-        assert( uTruth == i );
-    }
-}
-
-#if 0
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Aig_ManDeriveCnfTest()
-{
-    int i, k, Lit;
-    printf( "\n" );
-    for ( i = 80; i >= 0; i-- )
-    {
-        Lit = i;
-        for ( k = 0; k < 4; k++ )
-        {
-            if ( Lit % 3 == 0 )
-                printf( "%c", 'A' + k );
-            else if ( Lit % 3 == 1 )
-                printf( "%c", 'a' + k );
-            Lit = Lit / 3;
-        }
-        printf( "\n" );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Aig_ManDeriveCnfTest2()
-{
-    char s_Data3[81] = "!#&()*+,-.0123456789:;<=>?ABCDEFGHIJKLMNOPQRSTUVWXYZ[]abcdefghijklmnopqrstuvwxyz|";
-
-    unsigned uMasks[4][2] = {
-        { 0x5555, 0xAAAA },
-        { 0x3333, 0xCCCC },
-        { 0x0F0F, 0xF0F0 },
-        { 0x00FF, 0xFF00 }
-    };
-    char Buffer[100], * pCur;
-    FILE * pFile;
-    int CountCur, Counter = 0, nLines = 0;
-    int pLines[1<<16] = {0};
-    int pNums[1<<16] = {0};
-    unsigned uTruth, uTruth2, uCube, cCube;
-    char * pSops[1<<16] = {0};
-    char Sop[10];
-    char Cube[4];
-    int i, k;
-
-    pFile = fopen( "cands2.txt", "r" );
-    while ( fgets( Buffer, 100, pFile ) )
-    {
-        if ( Buffer[0] == '0' )
-            Extra_ReadHexadecimal( &uTruth2, Buffer+2, 4 );
-        else
-            uTruth2 = 0xFFFFFF;
-
-        // skip all chars till a-d or A-D
-        if ( Buffer[0] == '0' )
-        for ( pCur = Buffer; *pCur != '\n'; pCur++ )
-        {
-//            if ( *pCur >= 'a' && *pCur <= 'd' || *pCur >= 'A' && *pCur <= 'D' )
-            if ( *pCur == ':' )
-            {
-                pCur++;
-                break;
-            }
-        }
-        else
-            pCur = Buffer;
-
-
-        uTruth = 0;
-        CountCur = 0;
-        uCube = 0xFFFF;
-        for ( i = 0; i < 4; i++ )
-            Cube[i] = 2;
-
-        for ( ; *pCur; pCur++ )
-        {
-            if ( *pCur == '+' || *pCur == '\n' )
-            {
-                uTruth |= uCube;
-                uCube = 0xFFFF;
-
-                // get the cube
-                cCube = 0;
-                for ( i = 0; i < 4; i++ )
-                    cCube = 3 * cCube + Cube[i];
-                for ( i = 0; i < 4; i++ )
-                    Cube[i] = 2;
-
-                assert( cCube >= 0 && cCube < 81 );
-                Sop[CountCur] = cCube;
-                CountCur++;
-                if ( *pCur == '\n' )
-                {
-                    Sop[CountCur] = 0;
-                    break;
-                }
-            }
-            else if ( *pCur >= 'a' && *pCur <= 'd' )
-            {
-                uCube &= uMasks[*pCur-'a'][1];
-                Cube[*pCur-'a'] = 1;
-            }
-            else if ( *pCur >= 'A' && *pCur <= 'D' )
-            {
-                uCube &= uMasks[*pCur-'A'][0];
-                Cube[*pCur-'A'] = 0;
-            }
-        }
-        assert( *pCur == '\n' );
-        assert( uTruth2 == 0xFFFFFF || uTruth2 == uTruth );
-
-        Counter += CountCur;
-        pNums[uTruth] = CountCur;
-        pSops[uTruth] = ALLOC( char, CountCur );
-        memcpy( pSops[uTruth], Sop, CountCur );
-        pLines[nLines++] = Counter;
-    }
-    fclose( pFile );
-
-    printf( "Lines = %d. Counter = %d.\n", nLines, Counter );
-
-/*
-    // write the number of cubes
-    for ( i = 0; i < 65536; i++ )
-        printf( "%d,%d ", pNums[i], pNums[i] + pNums[0xffff & ~i] );
-    printf( "\n" );
-*/
-
-    // write the number of cubes
-    Counter = 0;
-    for ( i = 1; i < 65536; i++ )
-    {
-        CountCur = pNums[i];
-        assert( CountCur > 0 );
-        for ( k = 0; k <= CountCur; k++ )
-        {
-            if ( k < CountCur )
-            {
-                assert( pSops[i][k] >= 0 && pSops[i][k] < 81 );
-                printf( "%c", s_Data3[pSops[i][k]] );
-            }
-            else 
-                printf( " " );
-            if ( ++Counter == 75 )
-            {
-                printf( "\",\n\"" );
-                Counter = 0;
-            }
-        }
-    }
-    printf( "\n" );
-
-    return 1;
-}
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cnf/cnfFast.c b/src/aig/cnf/cnfFast.c
deleted file mode 100644
index afa05a05..00000000
--- a/src/aig/cnf/cnfFast.c
+++ /dev/null
@@ -1,697 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cnfFast.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [AIG-to-CNF conversion.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: cnfFast.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cnf.h"
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Detects multi-input gate rooted at this node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_CollectLeaves_rec( Aig_Obj_t * pRoot, Aig_Obj_t * pObj, Vec_Ptr_t * vSuper, int fStopCompl )
-{
-    if ( pRoot != pObj && (pObj->fMarkA || (fStopCompl && Aig_IsComplement(pObj))) )
-    {
-        Vec_PtrPushUnique( vSuper, fStopCompl ? pObj : Aig_Regular(pObj) );
-        return;
-    }
-    assert( Aig_ObjIsNode(pObj) );
-    if ( fStopCompl )
-    {
-        Cnf_CollectLeaves_rec( pRoot, Aig_ObjChild0(pObj), vSuper, 1 );
-        Cnf_CollectLeaves_rec( pRoot, Aig_ObjChild1(pObj), vSuper, 1 );
-    }
-    else
-    {
-        Cnf_CollectLeaves_rec( pRoot, Aig_ObjFanin0(pObj), vSuper, 0 );
-        Cnf_CollectLeaves_rec( pRoot, Aig_ObjFanin1(pObj), vSuper, 0 );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Detects multi-input gate rooted at this node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_CollectLeaves( Aig_Obj_t * pRoot, Vec_Ptr_t * vSuper, int fStopCompl )
-{
-    assert( !Aig_IsComplement(pRoot) );
-    Vec_PtrClear( vSuper );
-    Cnf_CollectLeaves_rec( pRoot, pRoot, vSuper, fStopCompl );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects nodes inside the cone.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_CollectVolume_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vNodes )
-{
-    if ( Aig_ObjIsTravIdCurrent( p, pObj ) )
-        return;
-    Aig_ObjSetTravIdCurrent( p, pObj );
-    assert( Aig_ObjIsNode(pObj) );
-    Cnf_CollectVolume_rec( p, Aig_ObjFanin0(pObj), vNodes );
-    Cnf_CollectVolume_rec( p, Aig_ObjFanin1(pObj), vNodes );
-    Vec_PtrPush( vNodes, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects nodes inside the cone.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_CollectVolume( Aig_Man_t * p, Aig_Obj_t * pRoot, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vNodes )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManIncrementTravId( p );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
-        Aig_ObjSetTravIdCurrent( p, pObj );
-    Vec_PtrClear( vNodes );
-    Cnf_CollectVolume_rec( p, pRoot, vNodes );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derive truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-word Cnf_CutDeriveTruth( Aig_Man_t * p, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vNodes )
-{
-    static word Truth6[6] = {
-        0xAAAAAAAAAAAAAAAA,
-        0xCCCCCCCCCCCCCCCC,
-        0xF0F0F0F0F0F0F0F0,
-        0xFF00FF00FF00FF00,
-        0xFFFF0000FFFF0000,
-        0xFFFFFFFF00000000
-    };
-    static word C[2] = { 0, ~0 };
-    static word S[256];
-    Aig_Obj_t * pObj;
-    int i;
-    assert( Vec_PtrSize(vLeaves) <= 6 && Vec_PtrSize(vNodes) > 0 );
-    assert( Vec_PtrSize(vLeaves) + Vec_PtrSize(vNodes) <= 256 );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pObj, i )
-    {
-        pObj->iData    = i;
-        S[pObj->iData] = Truth6[i];
-    }
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-    {
-        pObj->iData    = Vec_PtrSize(vLeaves) + i;
-        S[pObj->iData] = (S[Aig_ObjFanin0(pObj)->iData] ^ C[Aig_ObjFaninC0(pObj)]) & 
-                         (S[Aig_ObjFanin1(pObj)->iData] ^ C[Aig_ObjFaninC1(pObj)]);
-    }
-    return S[pObj->iData];
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Collects nodes inside the cone.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Cnf_ObjGetLit( Vec_Int_t * vMap, Aig_Obj_t * pObj, int fCompl )
-{
-    int iSatVar = vMap ? Vec_IntEntry(vMap, Aig_ObjId(pObj)) : Aig_ObjId(pObj);
-    assert( iSatVar > 0 );
-    return iSatVar + iSatVar + fCompl;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects nodes inside the cone.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_ComputeClauses( Aig_Man_t * p, Aig_Obj_t * pRoot, 
-    Vec_Ptr_t * vLeaves, Vec_Ptr_t * vNodes, Vec_Int_t * vMap, Vec_Int_t * vCover, Vec_Int_t * vClauses )
-{
-    Aig_Obj_t * pLeaf;
-    int c, k, Cube, OutLit, RetValue;
-    word Truth;
-    assert( pRoot->fMarkA );
-
-    Vec_IntClear( vClauses );
-
-    OutLit = Cnf_ObjGetLit( vMap, pRoot, 0 );
-    // detect cone
-    Cnf_CollectLeaves( pRoot, vLeaves, 0 );
-    Cnf_CollectVolume( p, pRoot, vLeaves, vNodes );
-    assert( pRoot == Vec_PtrEntryLast(vNodes) );
-    // check if this is an AND-gate
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pLeaf, k )
-    {
-        if ( Aig_ObjFaninC0(pLeaf) && !Aig_ObjFanin0(pLeaf)->fMarkA )
-            break;
-        if ( Aig_ObjFaninC1(pLeaf) && !Aig_ObjFanin1(pLeaf)->fMarkA )
-            break;
-    }
-    if ( k == Vec_PtrSize(vNodes) )
-    {
-        Cnf_CollectLeaves( pRoot, vLeaves, 1 );
-        // write big clause
-        Vec_IntPush( vClauses, 0 );
-        Vec_IntPush( vClauses, OutLit );
-        Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pLeaf, k )
-            Vec_IntPush( vClauses, Cnf_ObjGetLit(vMap, Aig_Regular(pLeaf), !Aig_IsComplement(pLeaf)) );
-        // write small clauses
-        Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pLeaf, k )
-        {
-            Vec_IntPush( vClauses, 0 );
-            Vec_IntPush( vClauses, OutLit ^ 1 );
-            Vec_IntPush( vClauses, Cnf_ObjGetLit(vMap, Aig_Regular(pLeaf), Aig_IsComplement(pLeaf)) );
-        }
-        return;
-    }
-    if ( Vec_PtrSize(vLeaves) > 6 )
-        printf( "FastCnfGeneration:  Internal error!!!\n" );
-    assert( Vec_PtrSize(vLeaves) <= 6 );
-
-    Truth = Cnf_CutDeriveTruth( p, vLeaves, vNodes );
-    if ( Truth == 0 || Truth == ~0 )
-    {
-        Vec_IntPush( vClauses, 0 );
-        Vec_IntPush( vClauses, (Truth == 0) ? (OutLit ^ 1) : OutLit );
-        return;
-    }
-
-    RetValue = Kit_TruthIsop( (unsigned *)&Truth, Vec_PtrSize(vLeaves), vCover, 0 );
-    assert( RetValue >= 0 );
-
-    Vec_IntForEachEntry( vCover, Cube, c )
-    {
-        Vec_IntPush( vClauses, 0 );
-        Vec_IntPush( vClauses, OutLit );
-        for ( k = 0; k < Vec_PtrSize(vLeaves); k++, Cube >>= 2 )
-        {
-            if ( (Cube & 3) == 0 )
-                continue;
-            assert( (Cube & 3) != 3 );
-            Vec_IntPush( vClauses, Cnf_ObjGetLit(vMap, (Aig_Obj_t *)Vec_PtrEntry(vLeaves,k), (Cube&3)!=1) );
-        }
-    }
-
-    Truth = ~Truth;
-
-    RetValue = Kit_TruthIsop( (unsigned *)&Truth, Vec_PtrSize(vLeaves), vCover, 0 );
-    assert( RetValue >= 0 );
-    Vec_IntForEachEntry( vCover, Cube, c )
-    {
-        Vec_IntPush( vClauses, 0 );
-        Vec_IntPush( vClauses, OutLit ^ 1 );
-        for ( k = 0; k < Vec_PtrSize(vLeaves); k++, Cube >>= 2 )
-        {
-            if ( (Cube & 3) == 0 )
-                continue;
-            assert( (Cube & 3) != 3 );
-            Vec_IntPush( vClauses, Cnf_ObjGetLit(vMap, (Aig_Obj_t *)Vec_PtrEntry(vLeaves,k), (Cube&3)!=1) );
-        }
-    }
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Marks AIG for CNF computation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_DeriveFastMark( Aig_Man_t * p )
-{
-    Vec_Int_t * vSupps;
-    Vec_Ptr_t * vLeaves, * vNodes;
-    Aig_Obj_t * pObj, * pTemp, * pObjC, * pObj0, * pObj1;
-    int i, k, nFans, Counter;
-
-    vLeaves = Vec_PtrAlloc( 100 );
-    vNodes  = Vec_PtrAlloc( 100 );
-    vSupps  = Vec_IntStart( Aig_ManObjNumMax(p) );
-
-    // mark CIs
-    Aig_ManForEachPi( p, pObj, i )
-        pObj->fMarkA = 1;
-
-    // mark CO drivers
-    Aig_ManForEachPo( p, pObj, i )
-        Aig_ObjFanin0(pObj)->fMarkA = 1;
-
-    // mark MUX/XOR nodes
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        assert( !pObj->fMarkB );
-        if ( !Aig_ObjIsMuxType(pObj) )
-            continue;
-        pObj0 = Aig_ObjFanin0(pObj);
-        if ( pObj0->fMarkB || Aig_ObjRefs(pObj0) > 1 )
-            continue;
-        pObj1 = Aig_ObjFanin1(pObj);
-        if ( pObj1->fMarkB || Aig_ObjRefs(pObj1) > 1 )
-            continue;
-        // mark nodes
-        pObj->fMarkB = 1;
-        pObj0->fMarkB = 1;
-        pObj1->fMarkB = 1;
-        // mark inputs and outputs
-        pObj->fMarkA = 1;
-        Aig_ObjFanin0(pObj0)->fMarkA = 1;
-        Aig_ObjFanin1(pObj0)->fMarkA = 1;
-        Aig_ObjFanin0(pObj1)->fMarkA = 1;
-        Aig_ObjFanin1(pObj1)->fMarkA = 1;
-    }
-
-    // mark nodes with multiple fanouts and pointed to by complemented edges
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        // mark nodes with many fanouts
-        if ( Aig_ObjRefs(pObj) > 1 )
-            pObj->fMarkA = 1;
-        // mark nodes pointed to by a complemented edge
-        if ( Aig_ObjFaninC0(pObj) && !Aig_ObjFanin0(pObj)->fMarkB )
-            Aig_ObjFanin0(pObj)->fMarkA = 1;
-        if ( Aig_ObjFaninC1(pObj) && !Aig_ObjFanin1(pObj)->fMarkB )
-            Aig_ObjFanin1(pObj)->fMarkA = 1;
-    }
-
-    // compute supergate size for internal marked nodes
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        if ( !pObj->fMarkA )
-            continue;
-        if ( pObj->fMarkB )
-        {
-            if ( !Aig_ObjIsMuxType(pObj) )
-                continue;
-            pObjC = Aig_ObjRecognizeMux( pObj, &pObj1, &pObj0 );
-            pObj0 = Aig_Regular(pObj0);
-            pObj1 = Aig_Regular(pObj1);
-            assert( pObj0->fMarkA );
-            assert( pObj1->fMarkA );
-//            if ( pObj0 == pObj1 )
-//                continue;
-            nFans = 1 + (pObj0 == pObj1);
-            if ( !pObj0->fMarkB && !Aig_ObjIsPi(pObj0) && Aig_ObjRefs(pObj0) == nFans && Vec_IntEntry(vSupps, Aig_ObjId(pObj0)) < 3 )
-            {
-                pObj0->fMarkA = 0;
-                continue;
-            }
-            if ( !pObj1->fMarkB && !Aig_ObjIsPi(pObj1) && Aig_ObjRefs(pObj1) == nFans && Vec_IntEntry(vSupps, Aig_ObjId(pObj1)) < 3 )
-            {
-                pObj1->fMarkA = 0;
-                continue;
-            }
-            continue;
-        }
-
-        Cnf_CollectLeaves( pObj, vLeaves, 1 );
-        Vec_IntWriteEntry( vSupps, Aig_ObjId(pObj), Vec_PtrSize(vLeaves) );
-        if ( Vec_PtrSize(vLeaves) >= 6 )
-            continue;
-        Vec_PtrForEachEntry( Aig_Obj_t *, vLeaves, pTemp, k )
-        {
-            pTemp = Aig_Regular(pTemp);
-            assert( pTemp->fMarkA );
-            if ( pTemp->fMarkB || Aig_ObjIsPi(pTemp) || Aig_ObjRefs(pTemp) > 1 )
-                continue;
-            assert( Vec_IntEntry(vSupps, Aig_ObjId(pTemp)) > 0 );
-            if ( Vec_PtrSize(vLeaves) - 1 + Vec_IntEntry(vSupps, Aig_ObjId(pTemp)) > 6 )
-                continue;
-            pTemp->fMarkA = 0;
-            Vec_IntWriteEntry( vSupps, Aig_ObjId(pObj), 6 );
-//printf( "%d %d   ", Vec_PtrSize(vLeaves), Vec_IntEntry(vSupps, Aig_ObjId(pTemp)) );
-            break;
-        }
-    }
-    Aig_ManCleanMarkB( p );
-
-    // check CO drivers
-    Counter = 0;
-    Aig_ManForEachPo( p, pObj, i )
-        Counter += !Aig_ObjFanin0(pObj)->fMarkA;
-    if ( Counter )
-    printf( "PO-driver rule is violated %d times.\n", Counter );
-
-    // check that the AND-gates are fine
-    Counter = 0;
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        assert( pObj->fMarkB == 0 );
-        if ( !pObj->fMarkA )
-            continue;
-        Cnf_CollectLeaves( pObj, vLeaves, 0 );
-        if ( Vec_PtrSize(vLeaves) <= 6 )
-            continue;
-        Cnf_CollectVolume( p, pObj, vLeaves, vNodes );
-        Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pTemp, k )
-        {
-            if ( Aig_ObjFaninC0(pTemp) && !Aig_ObjFanin0(pTemp)->fMarkA )
-                Counter++;
-            if ( Aig_ObjFaninC1(pTemp) && !Aig_ObjFanin1(pTemp)->fMarkA )
-                Counter++;
-        }
-    }
-    if ( Counter )
-    printf( "AND-gate rule is violated %d times.\n", Counter );
-
-    Vec_PtrFree( vLeaves );
-    Vec_PtrFree( vNodes );
-    Vec_IntFree( vSupps );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of clauses.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cnf_CutCountClauses( Aig_Man_t * p, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vNodes, Vec_Int_t * vCover )
-{
-    word Truth;
-    Aig_Obj_t * pObj;
-    int i, RetValue, nSize = 0;
-    if ( Vec_PtrSize(vLeaves) > 6 )
-    {
-        // make sure this is an AND gate
-        Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-        {
-            if ( Aig_ObjFaninC0(pObj) && !Aig_ObjFanin0(pObj)->fMarkA )
-                printf( "Unusual 1!\n" );
-            if ( Aig_ObjFaninC1(pObj) && !Aig_ObjFanin1(pObj)->fMarkA )
-                printf( "Unusual 2!\n" );
-            continue;
-
-            assert( !Aig_ObjFaninC0(pObj) || Aig_ObjFanin0(pObj)->fMarkA );
-            assert( !Aig_ObjFaninC1(pObj) || Aig_ObjFanin1(pObj)->fMarkA );
-        }
-        return Vec_PtrSize(vLeaves) + 1;
-    }
-    Truth = Cnf_CutDeriveTruth( p, vLeaves, vNodes );
-
-    RetValue = Kit_TruthIsop( (unsigned *)&Truth, Vec_PtrSize(vLeaves), vCover, 0 );
-    assert( RetValue >= 0 );
-    nSize += Vec_IntSize(vCover);
-
-    Truth = ~Truth;
-
-    RetValue = Kit_TruthIsop( (unsigned *)&Truth, Vec_PtrSize(vLeaves), vCover, 0 );
-    assert( RetValue >= 0 );
-    nSize += Vec_IntSize(vCover);
-    return nSize;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the size of the CNF, assuming marks are set.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cnf_CountCnfSize( Aig_Man_t * p )
-{
-    Vec_Ptr_t * vLeaves, * vNodes;
-    Vec_Int_t * vCover;
-    Aig_Obj_t * pObj;
-    int nVars = 0, nClauses = 0;
-    int i, nSize;
-
-    vLeaves = Vec_PtrAlloc( 100 );
-    vNodes  = Vec_PtrAlloc( 100 );
-    vCover  = Vec_IntAlloc( 1 << 16 );
-
-    Aig_ManForEachObj( p, pObj, i )
-        nVars += pObj->fMarkA;
-
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        if ( !pObj->fMarkA )
-            continue;
-        Cnf_CollectLeaves( pObj, vLeaves, 0 );
-        Cnf_CollectVolume( p, pObj, vLeaves, vNodes );
-        assert( pObj == Vec_PtrEntryLast(vNodes) );
-
-        nSize = Cnf_CutCountClauses( p, vLeaves, vNodes, vCover );
-//        printf( "%d(%d) ", Vec_PtrSize(vLeaves), nSize );
-
-        nClauses += nSize;
-    }
-//    printf( "\n" );
-    printf( "Vars = %d  Clauses = %d\n", nVars, nClauses );
-
-    Vec_PtrFree( vLeaves );
-    Vec_PtrFree( vNodes );
-    Vec_IntFree( vCover );
-    return nClauses;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives CNF from the marked AIG.]
-
-  Description [Assumes that marking is such that when we traverse from each
-  marked node, the logic cone has 6 inputs or less, or it is a multi-input AND.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Dat_t * Cnf_DeriveFastClauses( Aig_Man_t * p, int nOutputs )
-{
-    Cnf_Dat_t * pCnf;
-    Vec_Int_t * vLits, * vClas, * vMap, * vTemp;
-    Vec_Ptr_t * vLeaves, * vNodes;
-    Vec_Int_t * vCover;
-    Aig_Obj_t * pObj;
-    int i, k, nVars, Entry, OutLit, DriLit;
-
-    vLits = Vec_IntAlloc( 1 << 16 );
-    vClas = Vec_IntAlloc( 1 << 12 );
-    vMap  = Vec_IntStartFull( Aig_ManObjNumMax(p) );
-
-    // assign variables for the outputs
-    nVars = 1;
-    if ( nOutputs )
-    {
-        if ( Aig_ManRegNum(p) == 0 )
-        {
-            assert( nOutputs == Aig_ManPoNum(p) );
-            Aig_ManForEachPo( p, pObj, i )
-                Vec_IntWriteEntry( vMap, Aig_ObjId(pObj), nVars++ );
-        }
-        else
-        {
-            assert( nOutputs == Aig_ManRegNum(p) );
-            Aig_ManForEachLiSeq( p, pObj, i )
-                Vec_IntWriteEntry( vMap, Aig_ObjId(pObj), nVars++ );
-        }
-    }
-    // assign variables to the internal nodes
-    Aig_ManForEachNodeReverse( p, pObj, i )
-        if ( pObj->fMarkA )
-            Vec_IntWriteEntry( vMap, Aig_ObjId(pObj), nVars++ );
-    // assign variables to the PIs and constant node
-    Aig_ManForEachPi( p, pObj, i )
-        Vec_IntWriteEntry( vMap, Aig_ObjId(pObj), nVars++ );
-    Vec_IntWriteEntry( vMap, Aig_ObjId(Aig_ManConst1(p)), nVars++ );
-
-    // create clauses
-    vLeaves = Vec_PtrAlloc( 100 );
-    vNodes  = Vec_PtrAlloc( 100 );
-    vCover  = Vec_IntAlloc( 1 << 16 );
-    vTemp   = Vec_IntAlloc( 100 );
-    Aig_ManForEachNodeReverse( p, pObj, i )
-    {
-        if ( !pObj->fMarkA )
-            continue;
-        Cnf_ComputeClauses( p, pObj, vLeaves, vNodes, vMap, vCover, vTemp );
-        Vec_IntForEachEntry( vTemp, Entry, k )
-        {
-            if ( Entry == 0 )
-                Vec_IntPush( vClas, Vec_IntSize(vLits) );
-            else
-                Vec_IntPush( vLits, Entry );
-        }       
-    }
-    Vec_PtrFree( vLeaves );
-    Vec_PtrFree( vNodes );
-    Vec_IntFree( vCover );
-    Vec_IntFree( vTemp );
-
-    // create clauses for the outputs
-    Aig_ManForEachPo( p, pObj, i )
-    {
-        DriLit = Cnf_ObjGetLit( vMap, Aig_ObjFanin0(pObj), Aig_ObjFaninC0(pObj) );
-        if ( i < Aig_ManPoNum(p) - nOutputs )
-        {
-            Vec_IntPush( vClas, Vec_IntSize(vLits) );
-            Vec_IntPush( vLits, DriLit );
-        }
-        else
-        {
-            OutLit = Cnf_ObjGetLit( vMap, pObj, 0 );
-            // first clause
-            Vec_IntPush( vClas, Vec_IntSize(vLits) );
-            Vec_IntPush( vLits, OutLit );
-            Vec_IntPush( vLits, DriLit ^ 1 );
-            // second clause
-            Vec_IntPush( vClas, Vec_IntSize(vLits) );
-            Vec_IntPush( vLits, OutLit ^ 1 );
-            Vec_IntPush( vLits, DriLit );
-        }
-    }
- 
-    // write the constant literal
-    OutLit = Cnf_ObjGetLit( vMap, Aig_ManConst1(p), 0 );
-    Vec_IntPush( vClas, Vec_IntSize(vLits) );
-    Vec_IntPush( vLits, OutLit );
-
-    // create structure
-    pCnf = ABC_CALLOC( Cnf_Dat_t, 1 );
-    pCnf->pMan = p;
-    pCnf->nVars = nVars;
-    pCnf->nLiterals = Vec_IntSize( vLits );
-    pCnf->nClauses  = Vec_IntSize( vClas );
-    pCnf->pClauses  = ABC_ALLOC( int *, pCnf->nClauses + 1 );
-    pCnf->pClauses[0] = Vec_IntReleaseArray( vLits );
-    Vec_IntForEachEntry( vClas, Entry, i )
-        pCnf->pClauses[i] = pCnf->pClauses[0] + Entry;
-    pCnf->pClauses[pCnf->nClauses] = pCnf->pClauses[0] + pCnf->nLiterals;
-    pCnf->pVarNums  = Vec_IntReleaseArray( vMap );
-
-    // cleanup
-    Vec_IntFree( vLits );
-    Vec_IntFree( vClas );
-    Vec_IntFree( vMap );
-    return pCnf;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Fast CNF computation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Dat_t * Cnf_DeriveFast( Aig_Man_t * p, int nOutputs )
-{
-    Cnf_Dat_t * pCnf = NULL;
-    int clk, clkTotal = clock();
-//    printf( "\n" );
-    Aig_ManCleanMarkAB( p );
-    // create initial marking
-    clk = clock();
-    Cnf_DeriveFastMark( p );
-//    Abc_PrintTime( 1, "Marking", clock() - clk );
-    // compute CNF size
-    clk = clock();
-    pCnf = Cnf_DeriveFastClauses( p, nOutputs );
-//    Abc_PrintTime( 1, "Clauses", clock() - clk );
-    // derive the resulting CNF
-    Aig_ManCleanMarkA( p );
-//    Abc_PrintTime( 1, "TOTAL  ", clock() - clkTotal );
-
-//    printf( "Vars = %6d. Clauses = %7d. Literals = %8d.   \n", pCnf->nVars, pCnf->nClauses, pCnf->nLiterals );
-
-//    Cnf_DataFree( pCnf );
-//    pCnf = NULL;
-    return pCnf;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cnf/cnfMan.c b/src/aig/cnf/cnfMan.c
deleted file mode 100644
index 6b107651..00000000
--- a/src/aig/cnf/cnfMan.c
+++ /dev/null
@@ -1,693 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cnfMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [AIG-to-CNF conversion.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: cnfMan.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cnf.h"
-#include "satSolver.h"
-#include "satSolver2.h"
-#include "zlib.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static inline int Cnf_Lit2Var( int Lit )        { return (Lit & 1)? -(Lit >> 1)-1 : (Lit >> 1)+1;  }
-static inline int Cnf_Lit2Var2( int Lit )       { return (Lit & 1)? -(Lit >> 1)   : (Lit >> 1);    }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the fraiging manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Man_t * Cnf_ManStart()
-{
-    Cnf_Man_t * p;
-    int i;
-    // allocate the manager
-    p = ABC_ALLOC( Cnf_Man_t, 1 );
-    memset( p, 0, sizeof(Cnf_Man_t) );
-    // derive internal data structures
-    Cnf_ReadMsops( &p->pSopSizes, &p->pSops );
-    // allocate memory manager for cuts
-    p->pMemCuts = Aig_MmFlexStart();
-    p->nMergeLimit = 10;
-    // allocate temporary truth tables
-    p->pTruths[0] = ABC_ALLOC( unsigned, 4 * Aig_TruthWordNum(p->nMergeLimit) );
-    for ( i = 1; i < 4; i++ )
-        p->pTruths[i] = p->pTruths[i-1] + Aig_TruthWordNum(p->nMergeLimit);
-    p->vMemory = Vec_IntAlloc( 1 << 18 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the fraiging manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_ManStop( Cnf_Man_t * p )
-{
-    Vec_IntFree( p->vMemory );
-    ABC_FREE( p->pTruths[0] );
-    Aig_MmFlexStop( p->pMemCuts, 0 );
-    ABC_FREE( p->pSopSizes );
-    ABC_FREE( p->pSops[1] );
-    ABC_FREE( p->pSops );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the array of CI IDs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Cnf_DataCollectPiSatNums( Cnf_Dat_t * pCnf, Aig_Man_t * p )
-{
-    Vec_Int_t * vCiIds;
-    Aig_Obj_t * pObj;
-    int i;
-    vCiIds = Vec_IntAlloc( Aig_ManPiNum(p) );
-    Aig_ManForEachPi( p, pObj, i )
-        Vec_IntPush( vCiIds, pCnf->pVarNums[pObj->Id] );
-    return vCiIds;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates the new CNF.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Dat_t * Cnf_DataAlloc( Aig_Man_t * pAig, int nVars, int nClauses, int nLiterals )
-{
-    Cnf_Dat_t * pCnf;
-    int i;
-    pCnf = ABC_ALLOC( Cnf_Dat_t, 1 );
-    memset( pCnf, 0, sizeof(Cnf_Dat_t) );
-    pCnf->pMan = pAig;
-    pCnf->nVars = nVars;
-    pCnf->nClauses = nClauses;
-    pCnf->nLiterals = nLiterals;
-    pCnf->pClauses = ABC_ALLOC( int *, nClauses + 1 );
-    pCnf->pClauses[0] = ABC_ALLOC( int, nLiterals );
-    pCnf->pClauses[nClauses] = pCnf->pClauses[0] + nLiterals;
-    pCnf->pVarNums = ABC_ALLOC( int, Aig_ManObjNumMax(pAig) );
-//    memset( pCnf->pVarNums, 0xff, sizeof(int) * Aig_ManObjNumMax(pAig) );
-    for ( i = 0; i < Aig_ManObjNumMax(pAig); i++ )
-        pCnf->pVarNums[i] = -1;
-    return pCnf;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates the new CNF.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Dat_t * Cnf_DataDup( Cnf_Dat_t * p )
-{
-    Cnf_Dat_t * pCnf;
-    int i;
-    pCnf = Cnf_DataAlloc( p->pMan, p->nVars, p->nClauses, p->nLiterals );
-    memcpy( pCnf->pClauses[0], p->pClauses[0], sizeof(int) * p->nLiterals );
-    memcpy( pCnf->pVarNums, p->pVarNums, sizeof(int) * Aig_ManObjNumMax(p->pMan) );
-    for ( i = 1; i < p->nClauses; i++ )
-        pCnf->pClauses[i] = pCnf->pClauses[0] + (p->pClauses[i] - p->pClauses[0]);
-    return pCnf;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_DataFree( Cnf_Dat_t * p )
-{
-    if ( p == NULL )
-        return;
-    ABC_FREE( p->pObj2Clause );
-    ABC_FREE( p->pObj2Count );
-    ABC_FREE( p->pClauses[0] );
-    ABC_FREE( p->pClauses );
-    ABC_FREE( p->pVarNums );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes CNF into a file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_DataLift( Cnf_Dat_t * p, int nVarsPlus )
-{
-    Aig_Obj_t * pObj;
-    int v;
-    Aig_ManForEachObj( p->pMan, pObj, v )
-        if ( p->pVarNums[pObj->Id] >= 0 )
-            p->pVarNums[pObj->Id] += nVarsPlus;
-    for ( v = 0; v < p->nLiterals; v++ )
-        p->pClauses[0][v] += 2*nVarsPlus;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes CNF into a file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_DataFlipLastLiteral( Cnf_Dat_t * p )
-{
-    p->pClauses[0][p->nLiterals-1] = lit_neg( p->pClauses[0][p->nLiterals-1] );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes CNF into a file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_DataPrint( Cnf_Dat_t * p, int fReadable )
-{
-    FILE * pFile = stdout;
-    int * pLit, * pStop, i;
-    fprintf( pFile, "p cnf %d %d\n", p->nVars, p->nClauses );
-    for ( i = 0; i < p->nClauses; i++ )
-    {
-        for ( pLit = p->pClauses[i], pStop = p->pClauses[i+1]; pLit < pStop; pLit++ )
-            fprintf( pFile, "%d ", fReadable? Cnf_Lit2Var2(*pLit) : Cnf_Lit2Var(*pLit) );
-        fprintf( pFile, "\n" );
-    }
-    fprintf( pFile, "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes CNF into a file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_DataWriteIntoFileGz( Cnf_Dat_t * p, char * pFileName, int fReadable )
-{
-    gzFile pFile;
-    int * pLit, * pStop, i;
-    pFile = gzopen( pFileName, "wb" );
-    if ( pFile == NULL )
-    {
-        printf( "Cnf_WriteIntoFile(): Output file cannot be opened.\n" );
-        return;
-    }
-    gzprintf( pFile, "c Result of efficient AIG-to-CNF conversion using package CNF\n" );
-    gzprintf( pFile, "p cnf %d %d\n", p->nVars, p->nClauses );
-    for ( i = 0; i < p->nClauses; i++ )
-    {
-        for ( pLit = p->pClauses[i], pStop = p->pClauses[i+1]; pLit < pStop; pLit++ )
-            gzprintf( pFile, "%d ", fReadable? Cnf_Lit2Var2(*pLit) : Cnf_Lit2Var(*pLit) );
-        gzprintf( pFile, "0\n" );
-    }
-    gzprintf( pFile, "\n" );
-    gzclose( pFile );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes CNF into a file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_DataWriteIntoFile( Cnf_Dat_t * p, char * pFileName, int fReadable )
-{
-    FILE * pFile;
-    int * pLit, * pStop, i;
-    if ( !strncmp(pFileName+strlen(pFileName)-3,".gz",3) ) 
-    {
-        Cnf_DataWriteIntoFileGz( p, pFileName, fReadable );
-        return;
-    }
-    pFile = fopen( pFileName, "w" );
-    if ( pFile == NULL )
-    {
-        printf( "Cnf_WriteIntoFile(): Output file cannot be opened.\n" );
-        return;
-    }
-    fprintf( pFile, "c Result of efficient AIG-to-CNF conversion using package CNF\n" );
-    fprintf( pFile, "p cnf %d %d\n", p->nVars, p->nClauses );
-    for ( i = 0; i < p->nClauses; i++ )
-    {
-        for ( pLit = p->pClauses[i], pStop = p->pClauses[i+1]; pLit < pStop; pLit++ )
-            fprintf( pFile, "%d ", fReadable? Cnf_Lit2Var2(*pLit) : Cnf_Lit2Var(*pLit) );
-        fprintf( pFile, "0\n" );
-    }
-    fprintf( pFile, "\n" );
-    fclose( pFile );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes CNF into a file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void * Cnf_DataWriteIntoSolverInt( void * pSolver, Cnf_Dat_t * p, int nFrames, int fInit )
-{
-    sat_solver * pSat = (sat_solver *)pSolver;
-    int i, f, status;
-    assert( nFrames > 0 );
-    assert( pSat );
-//    pSat = sat_solver_new();
-    sat_solver_setnvars( pSat, p->nVars * nFrames );
-    for ( i = 0; i < p->nClauses; i++ )
-    {
-        if ( !sat_solver_addclause( pSat, p->pClauses[i], p->pClauses[i+1] ) )
-        {
-            sat_solver_delete( pSat );
-            return NULL;
-        }
-    }
-    if ( nFrames > 1 )
-    {
-        Aig_Obj_t * pObjLo, * pObjLi;
-        int nLitsAll, * pLits, Lits[2];
-        nLitsAll = 2 * p->nVars;
-        pLits = p->pClauses[0];
-        for ( f = 1; f < nFrames; f++ )
-        {
-            // add equality of register inputs/outputs for different timeframes
-            Aig_ManForEachLiLoSeq( p->pMan, pObjLi, pObjLo, i )
-            {
-                Lits[0] = (f-1)*nLitsAll + toLitCond( p->pVarNums[pObjLi->Id], 0 );
-                Lits[1] =  f   *nLitsAll + toLitCond( p->pVarNums[pObjLo->Id], 1 );
-                if ( !sat_solver_addclause( pSat, Lits, Lits + 2 ) )
-                {
-                    sat_solver_delete( pSat );
-                    return NULL;
-                }
-                Lits[0]++;
-                Lits[1]--;
-                if ( !sat_solver_addclause( pSat, Lits, Lits + 2 ) )
-                {
-                    sat_solver_delete( pSat );
-                    return NULL;
-                }
-            }
-            // add clauses for the next timeframe
-            for ( i = 0; i < p->nLiterals; i++ )
-                pLits[i] += nLitsAll;
-            for ( i = 0; i < p->nClauses; i++ )
-            {
-                if ( !sat_solver_addclause( pSat, p->pClauses[i], p->pClauses[i+1] ) )
-                {
-                    sat_solver_delete( pSat );
-                    return NULL;
-                }
-            }
-        }
-        // return literals to their original state
-        nLitsAll = (f-1) * nLitsAll;
-        for ( i = 0; i < p->nLiterals; i++ )
-            pLits[i] -= nLitsAll;
-    }
-    if ( fInit )
-    {
-        Aig_Obj_t * pObjLo;
-        int Lits[1];
-        Aig_ManForEachLoSeq( p->pMan, pObjLo, i )
-        {
-            Lits[0] = toLitCond( p->pVarNums[pObjLo->Id], 1 );
-            if ( !sat_solver_addclause( pSat, Lits, Lits + 1 ) )
-            {
-                sat_solver_delete( pSat );
-                return NULL;
-            }
-        }
-    }
-    status = sat_solver_simplify(pSat);
-    if ( status == 0 )
-    {
-        sat_solver_delete( pSat );
-        return NULL;
-    }
-    return pSat;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes CNF into a file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void * Cnf_DataWriteIntoSolver( Cnf_Dat_t * p, int nFrames, int fInit )
-{
-    return Cnf_DataWriteIntoSolverInt( sat_solver_new(), p, nFrames, fInit );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes CNF into a file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void * Cnf_DataWriteIntoSolver2( Cnf_Dat_t * p, int nFrames, int fInit )
-{
-    sat_solver2 * pSat;
-    int i, f, status;
-    assert( nFrames > 0 );
-    pSat = sat_solver2_new();
-    sat_solver2_setnvars( pSat, p->nVars * nFrames );
-    for ( i = 0; i < p->nClauses; i++ )
-    {
-        if ( !sat_solver2_addclause( pSat, p->pClauses[i], p->pClauses[i+1] ) )
-        {
-            sat_solver2_delete( pSat );
-            return NULL;
-        }
-    }
-    if ( nFrames > 1 )
-    {
-        Aig_Obj_t * pObjLo, * pObjLi;
-        int nLitsAll, * pLits, Lits[2];
-        nLitsAll = 2 * p->nVars;
-        pLits = p->pClauses[0];
-        for ( f = 1; f < nFrames; f++ )
-        {
-            // add equality of register inputs/outputs for different timeframes
-            Aig_ManForEachLiLoSeq( p->pMan, pObjLi, pObjLo, i )
-            {
-                Lits[0] = (f-1)*nLitsAll + toLitCond( p->pVarNums[pObjLi->Id], 0 );
-                Lits[1] =  f   *nLitsAll + toLitCond( p->pVarNums[pObjLo->Id], 1 );
-                if ( !sat_solver2_addclause( pSat, Lits, Lits + 2 ) )
-                {
-                    sat_solver2_delete( pSat );
-                    return NULL;
-                }
-                Lits[0]++;
-                Lits[1]--;
-                if ( !sat_solver2_addclause( pSat, Lits, Lits + 2 ) )
-                {
-                    sat_solver2_delete( pSat );
-                    return NULL;
-                }
-            }
-            // add clauses for the next timeframe
-            for ( i = 0; i < p->nLiterals; i++ )
-                pLits[i] += nLitsAll;
-            for ( i = 0; i < p->nClauses; i++ )
-            {
-                if ( !sat_solver2_addclause( pSat, p->pClauses[i], p->pClauses[i+1] ) )
-                {
-                    sat_solver2_delete( pSat );
-                    return NULL;
-                }
-            }
-        }
-        // return literals to their original state
-        nLitsAll = (f-1) * nLitsAll;
-        for ( i = 0; i < p->nLiterals; i++ )
-            pLits[i] -= nLitsAll;
-    }
-    if ( fInit )
-    {
-        Aig_Obj_t * pObjLo;
-        int Lits[1];
-        Aig_ManForEachLoSeq( p->pMan, pObjLo, i )
-        {
-            Lits[0] = toLitCond( p->pVarNums[pObjLo->Id], 1 );
-            if ( !sat_solver2_addclause( pSat, Lits, Lits + 1 ) )
-            {
-                sat_solver2_delete( pSat );
-                return NULL;
-            }
-        }
-    }
-    status = sat_solver2_simplify(pSat);
-    if ( status == 0 )
-    {
-        sat_solver2_delete( pSat );
-        return NULL;
-    }
-    return pSat;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds the OR-clause.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cnf_DataWriteOrClause( void * p, Cnf_Dat_t * pCnf )
-{
-    sat_solver * pSat = (sat_solver *)p;
-    Aig_Obj_t * pObj;
-    int i, * pLits;
-    pLits = ABC_ALLOC( int, Aig_ManPoNum(pCnf->pMan) );
-    Aig_ManForEachPo( pCnf->pMan, pObj, i )
-        pLits[i] = toLitCond( pCnf->pVarNums[pObj->Id], 0 );
-    if ( !sat_solver_addclause( pSat, pLits, pLits + Aig_ManPoNum(pCnf->pMan) ) )
-    {
-        ABC_FREE( pLits );
-        return 0;
-    }
-    ABC_FREE( pLits );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds the OR-clause.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cnf_DataWriteOrClause2( void * p, Cnf_Dat_t * pCnf )
-{
-    sat_solver2 * pSat = (sat_solver2 *)p;
-    Aig_Obj_t * pObj;
-    int i, * pLits;
-    pLits = ABC_ALLOC( int, Aig_ManPoNum(pCnf->pMan) );
-    Aig_ManForEachPo( pCnf->pMan, pObj, i )
-        pLits[i] = toLitCond( pCnf->pVarNums[pObj->Id], 0 );
-    if ( !sat_solver2_addclause( pSat, pLits, pLits + Aig_ManPoNum(pCnf->pMan) ) )
-    {
-        ABC_FREE( pLits );
-        return 0;
-    }
-    ABC_FREE( pLits );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds the OR-clause.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cnf_DataWriteAndClauses( void * p, Cnf_Dat_t * pCnf )
-{
-    sat_solver * pSat = (sat_solver *)p;
-    Aig_Obj_t * pObj;
-    int i, Lit;
-    Aig_ManForEachPo( pCnf->pMan, pObj, i )
-    {
-        Lit = toLitCond( pCnf->pVarNums[pObj->Id], 0 );
-        if ( !sat_solver_addclause( pSat, &Lit, &Lit+1 ) )
-            return 0;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transforms polarity of the internal veriables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_DataTranformPolarity( Cnf_Dat_t * pCnf, int fTransformPos )
-{
-    Aig_Obj_t * pObj;
-    int * pVarToPol;
-    int i, iVar;
-    // create map from the variable number to its polarity
-    pVarToPol = ABC_CALLOC( int, pCnf->nVars );
-    Aig_ManForEachObj( pCnf->pMan, pObj, i )
-    {
-        if ( !fTransformPos && Aig_ObjIsPo(pObj) )
-            continue;
-        if ( pCnf->pVarNums[pObj->Id] >= 0 )
-            pVarToPol[ pCnf->pVarNums[pObj->Id] ] = pObj->fPhase;
-    }
-    // transform literals
-    for ( i = 0; i < pCnf->nLiterals; i++ )
-    {
-        iVar = lit_var(pCnf->pClauses[0][i]);
-        assert( iVar < pCnf->nVars );
-        if ( pVarToPol[iVar] )
-            pCnf->pClauses[0][i] = lit_neg( pCnf->pClauses[0][i] );
-    }
-    ABC_FREE( pVarToPol );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds constraints for the two-input AND-gate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cnf_DataAddXorClause( void * pSat, int iVarA, int iVarB, int iVarC )
-{
-    lit Lits[3];
-    assert( iVarA > 0 && iVarB > 0 && iVarC > 0 );
-
-    Lits[0] = toLitCond( iVarA, 1 );
-    Lits[1] = toLitCond( iVarB, 1 );
-    Lits[2] = toLitCond( iVarC, 1 );
-    if ( !sat_solver_addclause( (sat_solver *)pSat, Lits, Lits + 3 ) )
-        return 0;
-
-    Lits[0] = toLitCond( iVarA, 1 );
-    Lits[1] = toLitCond( iVarB, 0 );
-    Lits[2] = toLitCond( iVarC, 0 );
-    if ( !sat_solver_addclause( (sat_solver *)pSat, Lits, Lits + 3 ) )
-        return 0;
-
-    Lits[0] = toLitCond( iVarA, 0 );
-    Lits[1] = toLitCond( iVarB, 1 );
-    Lits[2] = toLitCond( iVarC, 0 );
-    if ( !sat_solver_addclause( (sat_solver *)pSat, Lits, Lits + 3 ) )
-        return 0;
-
-    Lits[0] = toLitCond( iVarA, 0 );
-    Lits[1] = toLitCond( iVarB, 0 );
-    Lits[2] = toLitCond( iVarC, 1 );
-    if ( !sat_solver_addclause( (sat_solver *)pSat, Lits, Lits + 3 ) )
-        return 0;
-
-    return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cnf/cnfMap.c b/src/aig/cnf/cnfMap.c
deleted file mode 100644
index 8907485e..00000000
--- a/src/aig/cnf/cnfMap.c
+++ /dev/null
@@ -1,362 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cnfMap.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [AIG-to-CNF conversion.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: cnfMap.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cnf.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Computes area flow of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_CutAssignAreaFlow( Cnf_Man_t * p, Dar_Cut_t * pCut, int * pAreaFlows )
-{
-    Aig_Obj_t * pLeaf;
-    int i;
-    pCut->Value = 0;
-//    pCut->uSign = 100 * Cnf_CutSopCost( p, pCut );
-    pCut->uSign = 10 * Cnf_CutSopCost( p, pCut );
-    Dar_CutForEachLeaf( p->pManAig, pCut, pLeaf, i )
-    {
-        pCut->Value += pLeaf->nRefs;
-        if ( !Aig_ObjIsNode(pLeaf) )
-            continue;
-        assert( pLeaf->nRefs > 0 );
-        pCut->uSign += pAreaFlows[pLeaf->Id] / (pLeaf->nRefs? pLeaf->nRefs : 1);
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes area flow of the supergate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cnf_CutSuperAreaFlow( Vec_Ptr_t * vSuper, int * pAreaFlows )
-{
-    Aig_Obj_t * pLeaf;
-    int i, nAreaFlow;
-    nAreaFlow = 100 * (Vec_PtrSize(vSuper) + 1);
-    Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pLeaf, i )
-    {
-        pLeaf = Aig_Regular(pLeaf);
-        if ( !Aig_ObjIsNode(pLeaf) )
-            continue;
-        assert( pLeaf->nRefs > 0 );
-        nAreaFlow += pAreaFlows[pLeaf->Id] / (pLeaf->nRefs? pLeaf->nRefs : 1);
-    }
-    return nAreaFlow;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_DeriveMapping( Cnf_Man_t * p )
-{
-    Vec_Ptr_t * vSuper;
-    Aig_Obj_t * pObj;
-    Dar_Cut_t * pCut, * pCutBest;
-    int i, k, AreaFlow, * pAreaFlows;
-    // allocate area flows
-    pAreaFlows = ABC_ALLOC( int, Aig_ManObjNumMax(p->pManAig) );
-    memset( pAreaFlows, 0, sizeof(int) * Aig_ManObjNumMax(p->pManAig) );
-    // visit the nodes in the topological order and update their best cuts
-    vSuper = Vec_PtrAlloc( 100 );
-    Aig_ManForEachNode( p->pManAig, pObj, i )
-    {
-        // go through the cuts
-        pCutBest = NULL;
-        Dar_ObjForEachCut( pObj, pCut, k )
-        {
-            pCut->fBest = 0;
-            if ( k == 0 )
-                continue;
-            Cnf_CutAssignAreaFlow( p, pCut, pAreaFlows );
-            if ( pCutBest == NULL || pCutBest->uSign > pCut->uSign || 
-                (pCutBest->uSign == pCut->uSign && pCutBest->Value < pCut->Value) )
-                 pCutBest = pCut;
-        }
-        // check the big cut
-//        Aig_ObjCollectSuper( pObj, vSuper );
-        // get the area flow of this cut
-//        AreaFlow = Cnf_CutSuperAreaFlow( vSuper, pAreaFlows );
-        AreaFlow = ABC_INFINITY;
-        if ( AreaFlow >= (int)pCutBest->uSign )
-        {
-            pAreaFlows[pObj->Id] = pCutBest->uSign;
-            pCutBest->fBest = 1;
-        }
-        else
-        {
-            pAreaFlows[pObj->Id] = AreaFlow;
-            pObj->fMarkB = 1; // mark the special node
-        }
-    }
-    Vec_PtrFree( vSuper );
-    ABC_FREE( pAreaFlows );
-
-/*
-    // compute the area of mapping
-    AreaFlow = 0;
-    Aig_ManForEachPo( p->pManAig, pObj, i )
-        AreaFlow += Dar_ObjBestCut(Aig_ObjFanin0(pObj))->uSign / 100 / Aig_ObjFanin0(pObj)->nRefs;
-    printf( "Area of the network = %d.\n", AreaFlow );
-*/
-}
-
-
-
-#if 0
-
-/**Function*************************************************************
-
-  Synopsis    [Computes area of the first level.]
-
-  Description [The cut need to be derefed.]
-               
-  SideEffects []
-
-  SeeAlso     []
- 
-***********************************************************************/
-void Aig_CutDeref( Aig_Man_t * p, Dar_Cut_t * pCut )
-{ 
-    Aig_Obj_t * pLeaf;
-    int i;
-    Dar_CutForEachLeaf( p, pCut, pLeaf, i )
-    {
-        assert( pLeaf->nRefs > 0 );
-        if ( --pLeaf->nRefs > 0 || !Aig_ObjIsAnd(pLeaf) )
-            continue;
-        Aig_CutDeref( p, Aig_ObjBestCut(pLeaf) );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes area of the first level.]
-
-  Description [The cut need to be derefed.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Aig_CutRef( Aig_Man_t * p, Dar_Cut_t * pCut )
-{
-    Aig_Obj_t * pLeaf;
-    int i, Area = pCut->Value;
-    Dar_CutForEachLeaf( p, pCut, pLeaf, i )
-    {
-        assert( pLeaf->nRefs >= 0 );
-        if ( pLeaf->nRefs++ > 0 || !Aig_ObjIsAnd(pLeaf) )
-            continue;
-        Area += Aig_CutRef( p, Aig_ObjBestCut(pLeaf) );
-    }
-    return Area;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes exact area of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cnf_CutArea( Aig_Man_t * p, Dar_Cut_t * pCut )
-{
-    int Area;
-    Area = Aig_CutRef( p, pCut );
-    Aig_CutDeref( p, pCut );
-    return Area;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the second cut is better.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Cnf_CutCompare( Dar_Cut_t * pC0, Dar_Cut_t * pC1 )
-{
-    if ( pC0->Area < pC1->Area - 0.0001 )
-        return -1;
-    if ( pC0->Area > pC1->Area + 0.0001 ) // smaller area flow is better
-        return 1;
-//    if ( pC0->NoRefs < pC1->NoRefs )
-//        return -1;
-//    if ( pC0->NoRefs > pC1->NoRefs ) // fewer non-referenced fanins is better
-//        return 1;
-//    if ( pC0->FanRefs / pC0->nLeaves > pC1->FanRefs / pC1->nLeaves )
-//        return -1;
-//    if ( pC0->FanRefs / pC0->nLeaves < pC1->FanRefs / pC1->nLeaves )
-//        return 1; // larger average fanin ref-counter is better
-//    return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the cut with the smallest area flow.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Dar_Cut_t * Cnf_ObjFindBestCut( Aig_Obj_t * pObj )
-{
-    Dar_Cut_t * pCut, * pCutBest;
-    int i;
-    pCutBest = NULL;
-    Dar_ObjForEachCut( pObj, pCut, i )
-        if ( pCutBest == NULL || Cnf_CutCompare(pCutBest, pCut) == 1 )
-            pCutBest = pCut;
-    return pCutBest;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes area flow of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_CutAssignArea( Cnf_Man_t * p, Dar_Cut_t * pCut )
-{
-    Aig_Obj_t * pLeaf;
-    int i;
-    pCut->Area    = (float)pCut->Cost;
-    pCut->NoRefs  = 0;
-    pCut->FanRefs = 0;
-    Dar_CutForEachLeaf( p->pManAig, pCut, pLeaf, i )
-    {
-        if ( !Aig_ObjIsNode(pLeaf) )
-            continue;
-        if ( pLeaf->nRefs == 0 )
-        {
-            pCut->Area += Aig_ObjBestCut(pLeaf)->Cost;
-            pCut->NoRefs++;
-        }
-        else
-        {
-            if ( pCut->FanRefs + pLeaf->nRefs > 15 )
-                pCut->FanRefs = 15;
-            else
-                pCut->FanRefs += pLeaf->nRefs;
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one round of "area recovery" using exact local area.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cnf_ManMapForCnf( Cnf_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    Dar_Cut_t * pCut, * pCutBest;
-    int i, k;
-    // visit the nodes in the topological order and update their best cuts
-    Aig_ManForEachNode( p->pManAig, pObj, i )
-    {
-        // find the old best cut
-        pCutBest = Aig_ObjBestCut(pObj);
-        Dar_ObjClearBestCut(pCutBest);
-        // if the node is used, dereference its cut
-        if ( pObj->nRefs )
-            Aig_CutDeref( p->pManAig, pCutBest );
-
-        // evaluate the cuts of this node
-        Dar_ObjForEachCut( pObj, pCut, k )
-//            Cnf_CutAssignAreaFlow( p, pCut );
-            pCut->Area = (float)Cnf_CutArea( p->pManAig, pCut );
-
-        // find the new best cut
-        pCutBest = Cnf_ObjFindBestCut(pObj);
-        Dar_ObjSetBestCut( pCutBest );
-        // if the node is used, reference its cut
-        if ( pObj->nRefs )
-            Aig_CutRef( p->pManAig, pCutBest );
-    }
-    return 1;
-}
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cnf/cnfPost.c b/src/aig/cnf/cnfPost.c
deleted file mode 100644
index f7491889..00000000
--- a/src/aig/cnf/cnfPost.c
+++ /dev/null
@@ -1,238 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cnfPost.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [AIG-to-CNF conversion.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: cnfPost.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cnf.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_ManPostprocess_old( Cnf_Man_t * p )
-{
-//    extern int Aig_ManLargeCutEval( Aig_Man_t * p, Aig_Obj_t * pRoot, Dar_Cut_t * pCutR, Dar_Cut_t * pCutL, int Leaf );
-    int nNew, Gain, nGain = 0, nVars = 0;
-
-    Aig_Obj_t * pObj, * pFan;
-    Dar_Cut_t * pCutBest, * pCut;
-    int i, k;//, a, b, Counter;
-    Aig_ManForEachObj( p->pManAig, pObj, i )
-    {
-        if ( !Aig_ObjIsNode(pObj) )
-            continue;
-        if ( pObj->nRefs == 0 )
-            continue;
-//        pCutBest = Aig_ObjBestCut(pObj);
-        pCutBest = NULL;
-
-        Dar_CutForEachLeaf( p->pManAig, pCutBest, pFan, k )
-        {
-            if ( !Aig_ObjIsNode(pFan) )
-                continue;
-            assert( pFan->nRefs != 0 );
-            if ( pFan->nRefs != 1 )
-                continue;
-//            pCut = Aig_ObjBestCut(pFan);
-            pCut = NULL;
-/*
-            // find how many common variable they have
-            Counter = 0;
-            for ( a = 0; a < (int)pCut->nLeaves; a++ )
-            {
-                for ( b = 0; b < (int)pCutBest->nLeaves; b++ )
-                    if ( pCut->pLeaves[a] == pCutBest->pLeaves[b] )
-                        break;
-                if ( b == (int)pCutBest->nLeaves )
-                    continue;
-                Counter++;
-            }
-            printf( "%d ", Counter );
-*/
-            // find the new truth table after collapsing these two cuts
-
-
-//            nNew = Aig_ManLargeCutEval( p->pManAig, pObj, pCutBest, pCut, pFan->Id );
-            nNew = 0;
-
-
-//            printf( "%d+%d=%d:%d(%d) ", pCutBest->Cost, pCut->Cost, 
-//                pCutBest->Cost+pCut->Cost, nNew, pCutBest->Cost+pCut->Cost-nNew );
-
-            Gain = pCutBest->Value + pCut->Value - nNew;
-            if ( Gain > 0 )
-            {
-                nGain += Gain;
-                nVars++;
-            }
-        }
-    }
-    printf( "Total gain = %d.  Vars = %d.\n", nGain, nVars );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transfers cuts of the mapped nodes into internal representation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_ManTransferCuts( Cnf_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_MmFlexRestart( p->pMemCuts );
-    Aig_ManForEachObj( p->pManAig, pObj, i )
-    {
-        if ( Aig_ObjIsNode(pObj) && pObj->nRefs > 0 )
-            pObj->pData = Cnf_CutCreate( p, pObj );
-        else
-            pObj->pData = NULL;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transfers cuts of the mapped nodes into internal representation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_ManFreeCuts( Cnf_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManForEachObj( p->pManAig, pObj, i )
-        if ( pObj->pData )
-        {
-            Cnf_CutFree( (Cnf_Cut_t *)pObj->pData );
-            pObj->pData = NULL;
-        }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_ManPostprocess( Cnf_Man_t * p )
-{
-    Cnf_Cut_t * pCut, * pCutFan, * pCutRes;
-    Aig_Obj_t * pObj, * pFan;
-    int Order[16], Costs[16];
-    int i, k, fChanges;
-    Aig_ManForEachNode( p->pManAig, pObj, i )
-    {
-        if ( pObj->nRefs == 0 )
-            continue;
-        pCut = Cnf_ObjBestCut(pObj);
-
-        // sort fanins according to their size
-        Cnf_CutForEachLeaf( p->pManAig, pCut, pFan, k )
-        {
-            Order[k] = k;
-            Costs[k] = Aig_ObjIsNode(pFan)? Cnf_ObjBestCut(pFan)->Cost : 0;
-        }
-        // sort the cuts by Weight
-        do {
-            int Temp;
-            fChanges = 0;
-            for ( k = 0; k < pCut->nFanins - 1; k++ )
-            {
-                if ( Costs[Order[k]] <= Costs[Order[k+1]] )
-                    continue;
-                Temp = Order[k];
-                Order[k] = Order[k+1];
-                Order[k+1] = Temp;
-                fChanges = 1;
-            }
-        } while ( fChanges );
-
-
-//        Cnf_CutForEachLeaf( p->pManAig, pCut, pFan, k )
-        for ( k = 0; (k < (int)(pCut)->nFanins) && ((pFan) = Aig_ManObj(p->pManAig, (pCut)->pFanins[Order[k]])); k++ )
-        {
-            if ( !Aig_ObjIsNode(pFan) )
-                continue;
-            assert( pFan->nRefs != 0 );
-            if ( pFan->nRefs != 1 )
-                continue;
-            pCutFan = Cnf_ObjBestCut(pFan);
-            // try composing these two cuts
-//            Cnf_CutPrint( pCut );
-            pCutRes = Cnf_CutCompose( p, pCut, pCutFan, pFan->Id );
-//            Cnf_CutPrint( pCut );
-//            printf( "\n" );
-            // check if the cost if reduced
-            if ( pCutRes == NULL || pCutRes->Cost == 127 || pCutRes->Cost > pCut->Cost + pCutFan->Cost )
-            {
-                if ( pCutRes )
-                    Cnf_CutFree( pCutRes );
-                continue;
-            }
-            // update the cut
-            Cnf_ObjSetBestCut( pObj, pCutRes );
-            Cnf_ObjSetBestCut( pFan, NULL );
-            Cnf_CutUpdateRefs( p, pCut, pCutFan, pCutRes );
-            assert( pFan->nRefs == 0 );
-            Cnf_CutFree( pCut );
-            Cnf_CutFree( pCutFan );
-            break;
-        }
-    }
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cnf/cnfUtil.c b/src/aig/cnf/cnfUtil.c
deleted file mode 100644
index 236b6bfa..00000000
--- a/src/aig/cnf/cnfUtil.c
+++ /dev/null
@@ -1,238 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cnfUtil.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [AIG-to-CNF conversion.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: cnfUtil.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cnf.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Computes area, references, and nodes used in the mapping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Aig_ManScanMapping_rec( Cnf_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vMapped )
-{
-    Aig_Obj_t * pLeaf;
-    Dar_Cut_t * pCutBest;
-    int aArea, i;
-    if ( pObj->nRefs++ || Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) )
-        return 0;
-    assert( Aig_ObjIsAnd(pObj) );
-    // collect the node first to derive pre-order
-    if ( vMapped )
-        Vec_PtrPush( vMapped, pObj );
-    // visit the transitive fanin of the selected cut
-    if ( pObj->fMarkB )
-    {
-        Vec_Ptr_t * vSuper = Vec_PtrAlloc( 100 );
-        Aig_ObjCollectSuper( pObj, vSuper );
-        aArea = Vec_PtrSize(vSuper) + 1;
-        Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pLeaf, i )
-            aArea += Aig_ManScanMapping_rec( p, Aig_Regular(pLeaf), vMapped );
-        Vec_PtrFree( vSuper );
-        ////////////////////////////
-        pObj->fMarkB = 1;
-    }
-    else
-    {
-        pCutBest = Dar_ObjBestCut( pObj );
-        aArea = Cnf_CutSopCost( p, pCutBest );
-        Dar_CutForEachLeaf( p->pManAig, pCutBest, pLeaf, i )
-            aArea += Aig_ManScanMapping_rec( p, pLeaf, vMapped );
-    }
-    return aArea;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes area, references, and nodes used in the mapping.]
-
-  Description [Collects the nodes in reverse topological order.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Aig_ManScanMapping( Cnf_Man_t * p, int fCollect )
-{
-    Vec_Ptr_t * vMapped = NULL;
-    Aig_Obj_t * pObj;
-    int i;
-    // clean all references
-    Aig_ManForEachObj( p->pManAig, pObj, i )
-        pObj->nRefs = 0;
-    // allocate the array
-    if ( fCollect )
-        vMapped = Vec_PtrAlloc( 1000 );
-    // collect nodes reachable from POs in the DFS order through the best cuts
-    p->aArea = 0;
-    Aig_ManForEachPo( p->pManAig, pObj, i )
-        p->aArea += Aig_ManScanMapping_rec( p, Aig_ObjFanin0(pObj), vMapped );
-//    printf( "Variables = %6d. Clauses = %8d.\n", vMapped? Vec_PtrSize(vMapped) + Aig_ManPiNum(p->pManAig) + 1 : 0, p->aArea + 2 );
-    return vMapped;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes area, references, and nodes used in the mapping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cnf_ManScanMapping_rec( Cnf_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vMapped, int fPreorder )
-{
-    Aig_Obj_t * pLeaf;
-    Cnf_Cut_t * pCutBest;
-    int aArea, i;
-    if ( pObj->nRefs++ || Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) )
-        return 0;
-    assert( Aig_ObjIsAnd(pObj) );
-    assert( pObj->pData != NULL );
-    // add the node to the mapping
-    if ( vMapped && fPreorder )
-         Vec_PtrPush( vMapped, pObj );
-    // visit the transitive fanin of the selected cut
-    if ( pObj->fMarkB )
-    {
-        Vec_Ptr_t * vSuper = Vec_PtrAlloc( 100 );
-        Aig_ObjCollectSuper( pObj, vSuper );
-        aArea = Vec_PtrSize(vSuper) + 1;
-        Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pLeaf, i )
-            aArea += Cnf_ManScanMapping_rec( p, Aig_Regular(pLeaf), vMapped, fPreorder );
-        Vec_PtrFree( vSuper );
-        ////////////////////////////
-        pObj->fMarkB = 1;
-    }
-    else
-    {
-        pCutBest = (Cnf_Cut_t *)pObj->pData;
-//        assert( pCutBest->nFanins > 0 );
-        assert( pCutBest->Cost < 127 );
-        aArea = pCutBest->Cost;
-        Cnf_CutForEachLeaf( p->pManAig, pCutBest, pLeaf, i )
-            aArea += Cnf_ManScanMapping_rec( p, pLeaf, vMapped, fPreorder );
-    }
-    // add the node to the mapping
-    if ( vMapped && !fPreorder )
-         Vec_PtrPush( vMapped, pObj );
-    return aArea;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes area, references, and nodes used in the mapping.]
-
-  Description [Collects the nodes in reverse topological order.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Cnf_ManScanMapping( Cnf_Man_t * p, int fCollect, int fPreorder )
-{
-    Vec_Ptr_t * vMapped = NULL;
-    Aig_Obj_t * pObj;
-    int i;
-    // clean all references
-    Aig_ManForEachObj( p->pManAig, pObj, i )
-        pObj->nRefs = 0;
-    // allocate the array
-    if ( fCollect )
-        vMapped = Vec_PtrAlloc( 1000 );
-    // collect nodes reachable from POs in the DFS order through the best cuts
-    p->aArea = 0;
-    Aig_ManForEachPo( p->pManAig, pObj, i )
-        p->aArea += Cnf_ManScanMapping_rec( p, Aig_ObjFanin0(pObj), vMapped, fPreorder );
-//    printf( "Variables = %6d. Clauses = %8d.\n", vMapped? Vec_PtrSize(vMapped) + Aig_ManPiNum(p->pManAig) + 1 : 0, p->aArea + 2 );
-    return vMapped;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the array of CI IDs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Cnf_DataCollectCiSatNums( Cnf_Dat_t * pCnf, Aig_Man_t * p )
-{
-    Vec_Int_t * vCiIds;
-    Aig_Obj_t * pObj;
-    int i;
-    vCiIds = Vec_IntAlloc( Aig_ManPiNum(p) );
-    Aig_ManForEachPi( p, pObj, i )
-        Vec_IntPush( vCiIds, pCnf->pVarNums[pObj->Id] );
-    return vCiIds;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the array of CI IDs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Cnf_DataCollectCoSatNums( Cnf_Dat_t * pCnf, Aig_Man_t * p )
-{
-    Vec_Int_t * vCoIds;
-    Aig_Obj_t * pObj;
-    int i;
-    vCoIds = Vec_IntAlloc( Aig_ManPoNum(p) );
-    Aig_ManForEachPo( p, pObj, i )
-        Vec_IntPush( vCoIds, pCnf->pVarNums[pObj->Id] );
-    return vCoIds;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cnf/cnfWrite.c b/src/aig/cnf/cnfWrite.c
deleted file mode 100644
index 54c28967..00000000
--- a/src/aig/cnf/cnfWrite.c
+++ /dev/null
@@ -1,806 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cnfWrite.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [AIG-to-CNF conversion.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: cnfWrite.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cnf.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Derives CNF mapping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Cnf_ManWriteCnfMapping( Cnf_Man_t * p, Vec_Ptr_t * vMapped )
-{
-    Vec_Int_t * vResult;
-    Aig_Obj_t * pObj;
-    Cnf_Cut_t * pCut;
-    int i, k, nOffset;
-    nOffset = Aig_ManObjNumMax(p->pManAig);
-    vResult = Vec_IntStart( nOffset );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vMapped, pObj, i )
-    {
-        assert( Aig_ObjIsNode(pObj) );
-        pCut = Cnf_ObjBestCut( pObj );
-        assert( pCut->nFanins < 5 );
-        Vec_IntWriteEntry( vResult, Aig_ObjId(pObj), nOffset );
-        Vec_IntPush( vResult, *Cnf_CutTruth(pCut) );
-        for ( k = 0; k < pCut->nFanins; k++ )
-            Vec_IntPush( vResult, pCut->pFanins[k] );
-        for (      ; k < 4; k++ )
-            Vec_IntPush( vResult, -1 );
-        nOffset += 5;
-    }
-    return vResult;
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Writes the cover into the array.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Cnf_SopConvertToVector( char * pSop, int nCubes, Vec_Int_t * vCover )
-{
-    int Lits[4], Cube, iCube, i, b;
-    Vec_IntClear( vCover );
-    for ( i = 0; i < nCubes; i++ )
-    {
-        Cube = pSop[i];
-        for ( b = 0; b < 4; b++ )
-        {
-            if ( Cube % 3 == 0 )
-                Lits[b] = 1;
-            else if ( Cube % 3 == 1 )
-                Lits[b] = 2;
-            else
-                Lits[b] = 0;
-            Cube = Cube / 3;
-        }
-        iCube = 0;
-        for ( b = 0; b < 4; b++ )
-            iCube = (iCube << 2) | Lits[b];
-        Vec_IntPush( vCover, iCube );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of literals in the SOP.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cnf_SopCountLiterals( char * pSop, int nCubes )
-{
-    int nLits = 0, Cube, i, b;
-    for ( i = 0; i < nCubes; i++ )
-    {
-        Cube = pSop[i];
-        for ( b = 0; b < 4; b++ )
-        {
-            if ( Cube % 3 != 2 )
-                nLits++;
-            Cube = Cube / 3;
-        }
-    }
-    return nLits;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of literals in the SOP.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cnf_IsopCountLiterals( Vec_Int_t * vIsop, int nVars )
-{
-    int nLits = 0, Cube, i, b;
-    Vec_IntForEachEntry( vIsop, Cube, i )
-    {
-        for ( b = 0; b < nVars; b++ )
-        {
-            if ( (Cube & 3) == 1 || (Cube & 3) == 2 )
-                nLits++;
-            Cube >>= 2;
-        }
-    }
-    return nLits;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes the cube and returns the number of literals in it.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Cnf_IsopWriteCube( int Cube, int nVars, int * pVars, int * pLiterals )
-{
-    int nLits = nVars, b;
-    for ( b = 0; b < nVars; b++ )
-    {
-        if ( (Cube & 3) == 1 ) // value 0 --> write positive literal
-            *pLiterals++ = 2 * pVars[b];
-        else if ( (Cube & 3) == 2 ) // value 1 --> write negative literal
-            *pLiterals++ = 2 * pVars[b] + 1;
-        else
-            nLits--;
-        Cube >>= 2;
-    }
-    return nLits;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives CNF for the mapping.]
-
-  Description [The last argument shows the number of last outputs
-  of the manager, which will not be converted into clauses but the
-  new variables for which will be introduced.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Dat_t * Cnf_ManWriteCnf( Cnf_Man_t * p, Vec_Ptr_t * vMapped, int nOutputs )
-{
-    int fChangeVariableOrder = 0; // should be set to 0 to improve performance
-    Aig_Obj_t * pObj;
-    Cnf_Dat_t * pCnf;
-    Cnf_Cut_t * pCut;
-    Vec_Int_t * vCover, * vSopTemp;
-    int OutVar, PoVar, pVars[32], * pLits, ** pClas;
-    unsigned uTruth;
-    int i, k, nLiterals, nClauses, Cube, Number;
-
-    // count the number of literals and clauses
-    nLiterals = 1 + Aig_ManPoNum( p->pManAig ) + 3 * nOutputs;
-    nClauses = 1 + Aig_ManPoNum( p->pManAig ) + nOutputs;
-    Vec_PtrForEachEntry( Aig_Obj_t *, vMapped, pObj, i )
-    {
-        assert( Aig_ObjIsNode(pObj) );
-        pCut = Cnf_ObjBestCut( pObj );
-
-        // positive polarity of the cut
-        if ( pCut->nFanins < 5 )
-        {
-            uTruth = 0xFFFF & *Cnf_CutTruth(pCut);
-            nLiterals += Cnf_SopCountLiterals( p->pSops[uTruth], p->pSopSizes[uTruth] ) + p->pSopSizes[uTruth];
-            assert( p->pSopSizes[uTruth] >= 0 );
-            nClauses += p->pSopSizes[uTruth];
-        }
-        else
-        {
-            nLiterals += Cnf_IsopCountLiterals( pCut->vIsop[1], pCut->nFanins ) + Vec_IntSize(pCut->vIsop[1]);
-            nClauses += Vec_IntSize(pCut->vIsop[1]);
-        }
-        // negative polarity of the cut
-        if ( pCut->nFanins < 5 )
-        {
-            uTruth = 0xFFFF & ~*Cnf_CutTruth(pCut);
-            nLiterals += Cnf_SopCountLiterals( p->pSops[uTruth], p->pSopSizes[uTruth] ) + p->pSopSizes[uTruth];
-            assert( p->pSopSizes[uTruth] >= 0 );
-            nClauses += p->pSopSizes[uTruth];
-        }
-        else
-        {
-            nLiterals += Cnf_IsopCountLiterals( pCut->vIsop[0], pCut->nFanins ) + Vec_IntSize(pCut->vIsop[0]);
-            nClauses += Vec_IntSize(pCut->vIsop[0]);
-        }
-//printf( "%d ", nClauses-(1 + Aig_ManPoNum( p->pManAig )) );
-    }
-//printf( "\n" );
-
-    // allocate CNF
-    pCnf = ABC_CALLOC( Cnf_Dat_t, 1 );
-    pCnf->pMan = p->pManAig;
-    pCnf->nLiterals = nLiterals;
-    pCnf->nClauses = nClauses;
-    pCnf->pClauses = ABC_ALLOC( int *, nClauses + 1 );
-    pCnf->pClauses[0] = ABC_ALLOC( int, nLiterals );
-    pCnf->pClauses[nClauses] = pCnf->pClauses[0] + nLiterals;
-    // create room for variable numbers
-    pCnf->pVarNums = ABC_ALLOC( int, Aig_ManObjNumMax(p->pManAig) );
-//    memset( pCnf->pVarNums, 0xff, sizeof(int) * Aig_ManObjNumMax(p->pManAig) );
-    for ( i = 0; i < Aig_ManObjNumMax(p->pManAig); i++ )
-        pCnf->pVarNums[i] = -1;
-
-    if ( !fChangeVariableOrder )
-    {
-        // assign variables to the last (nOutputs) POs
-        Number = 1;
-        if ( nOutputs )
-        {
-            if ( Aig_ManRegNum(p->pManAig) == 0 )
-            {
-                assert( nOutputs == Aig_ManPoNum(p->pManAig) );
-                Aig_ManForEachPo( p->pManAig, pObj, i )
-                    pCnf->pVarNums[pObj->Id] = Number++;
-            }
-            else
-            {
-                assert( nOutputs == Aig_ManRegNum(p->pManAig) );
-                Aig_ManForEachLiSeq( p->pManAig, pObj, i )
-                    pCnf->pVarNums[pObj->Id] = Number++;
-            }
-        }
-        // assign variables to the internal nodes
-        Vec_PtrForEachEntry( Aig_Obj_t *, vMapped, pObj, i )
-            pCnf->pVarNums[pObj->Id] = Number++;
-        // assign variables to the PIs and constant node
-        Aig_ManForEachPi( p->pManAig, pObj, i )
-            pCnf->pVarNums[pObj->Id] = Number++;
-        pCnf->pVarNums[Aig_ManConst1(p->pManAig)->Id] = Number++;
-        pCnf->nVars = Number;
-    }
-    else
-    {
-        // assign variables to the last (nOutputs) POs
-        Number = Aig_ManObjNumMax(p->pManAig) + 1;
-        pCnf->nVars = Number + 1;
-        if ( nOutputs )
-        {
-            if ( Aig_ManRegNum(p->pManAig) == 0 )
-            {
-                assert( nOutputs == Aig_ManPoNum(p->pManAig) );
-                Aig_ManForEachPo( p->pManAig, pObj, i )
-                    pCnf->pVarNums[pObj->Id] = Number--;
-            }
-            else
-            {
-                assert( nOutputs == Aig_ManRegNum(p->pManAig) );
-                Aig_ManForEachLiSeq( p->pManAig, pObj, i )
-                    pCnf->pVarNums[pObj->Id] = Number--;
-            }
-        }
-        // assign variables to the internal nodes
-        Vec_PtrForEachEntry( Aig_Obj_t *, vMapped, pObj, i )
-            pCnf->pVarNums[pObj->Id] = Number--;
-        // assign variables to the PIs and constant node
-        Aig_ManForEachPi( p->pManAig, pObj, i )
-            pCnf->pVarNums[pObj->Id] = Number--;
-        pCnf->pVarNums[Aig_ManConst1(p->pManAig)->Id] = Number--;
-        assert( Number >= 0 );
-    }
-
-    // assign the clauses
-    vSopTemp = Vec_IntAlloc( 1 << 16 );
-    pLits = pCnf->pClauses[0];
-    pClas = pCnf->pClauses;
-    Vec_PtrForEachEntry( Aig_Obj_t *, vMapped, pObj, i )
-    {
-        pCut = Cnf_ObjBestCut( pObj );
-
-        // save variables of this cut
-        OutVar = pCnf->pVarNums[ pObj->Id ];
-        for ( k = 0; k < (int)pCut->nFanins; k++ )
-        {
-            pVars[k] = pCnf->pVarNums[ pCut->pFanins[k] ];
-            assert( pVars[k] <= Aig_ManObjNumMax(p->pManAig) );
-        }
-
-        // positive polarity of the cut
-        if ( pCut->nFanins < 5 )
-        {
-            uTruth = 0xFFFF & *Cnf_CutTruth(pCut);
-            Cnf_SopConvertToVector( p->pSops[uTruth], p->pSopSizes[uTruth], vSopTemp );
-            vCover = vSopTemp;
-        }
-        else
-            vCover = pCut->vIsop[1];
-        Vec_IntForEachEntry( vCover, Cube, k )
-        {
-            *pClas++ = pLits;
-            *pLits++ = 2 * OutVar; 
-            pLits += Cnf_IsopWriteCube( Cube, pCut->nFanins, pVars, pLits );
-        }
-
-        // negative polarity of the cut
-        if ( pCut->nFanins < 5 )
-        {
-            uTruth = 0xFFFF & ~*Cnf_CutTruth(pCut);
-            Cnf_SopConvertToVector( p->pSops[uTruth], p->pSopSizes[uTruth], vSopTemp );
-            vCover = vSopTemp;
-        }
-        else
-            vCover = pCut->vIsop[0];
-        Vec_IntForEachEntry( vCover, Cube, k )
-        {
-            *pClas++ = pLits;
-            *pLits++ = 2 * OutVar + 1; 
-            pLits += Cnf_IsopWriteCube( Cube, pCut->nFanins, pVars, pLits );
-        }
-    }
-    Vec_IntFree( vSopTemp );
- 
-    // write the constant literal
-    OutVar = pCnf->pVarNums[ Aig_ManConst1(p->pManAig)->Id ];
-    assert( OutVar <= Aig_ManObjNumMax(p->pManAig) );
-    *pClas++ = pLits;
-    *pLits++ = 2 * OutVar; 
-
-    // write the output literals
-    Aig_ManForEachPo( p->pManAig, pObj, i )
-    {
-        OutVar = pCnf->pVarNums[ Aig_ObjFanin0(pObj)->Id ];
-        if ( i < Aig_ManPoNum(p->pManAig) - nOutputs )
-        {
-            *pClas++ = pLits;
-            *pLits++ = 2 * OutVar + Aig_ObjFaninC0(pObj); 
-        }
-        else
-        {
-            PoVar = pCnf->pVarNums[ pObj->Id ];
-            // first clause
-            *pClas++ = pLits;
-            *pLits++ = 2 * PoVar; 
-            *pLits++ = 2 * OutVar + !Aig_ObjFaninC0(pObj); 
-            // second clause
-            *pClas++ = pLits;
-            *pLits++ = 2 * PoVar + 1; 
-            *pLits++ = 2 * OutVar + Aig_ObjFaninC0(pObj); 
-        }
-    }
-
-    // verify that the correct number of literals and clauses was written
-    assert( pLits - pCnf->pClauses[0] == nLiterals );
-    assert( pClas - pCnf->pClauses == nClauses );
-//Cnf_DataPrint( pCnf, 1 );
-    return pCnf;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Derives CNF for the mapping.]
-
-  Description [Derives CNF with obj IDs as SAT vars and mapping of
-  objects into clauses (pObj2Clause and pObj2Count).]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Dat_t * Cnf_ManWriteCnfOther( Cnf_Man_t * p, Vec_Ptr_t * vMapped )
-{
-    Aig_Obj_t * pObj;
-    Cnf_Dat_t * pCnf;
-    Cnf_Cut_t * pCut;
-    Vec_Int_t * vCover, * vSopTemp;
-    int OutVar, PoVar, pVars[32], * pLits, ** pClas;
-    unsigned uTruth;
-    int i, k, nLiterals, nClauses, Cube;
-
-    // count the number of literals and clauses
-    nLiterals = 1 + 4 * Aig_ManPoNum( p->pManAig );
-    nClauses  = 1 + 2 * Aig_ManPoNum( p->pManAig );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vMapped, pObj, i )
-    {
-        assert( Aig_ObjIsNode(pObj) );
-        pCut = Cnf_ObjBestCut( pObj );
-        // positive polarity of the cut
-        if ( pCut->nFanins < 5 )
-        {
-            uTruth = 0xFFFF & *Cnf_CutTruth(pCut);
-            nLiterals += Cnf_SopCountLiterals( p->pSops[uTruth], p->pSopSizes[uTruth] ) + p->pSopSizes[uTruth];
-            assert( p->pSopSizes[uTruth] >= 0 );
-            nClauses += p->pSopSizes[uTruth];
-        }
-        else
-        {
-            nLiterals += Cnf_IsopCountLiterals( pCut->vIsop[1], pCut->nFanins ) + Vec_IntSize(pCut->vIsop[1]);
-            nClauses += Vec_IntSize(pCut->vIsop[1]);
-        }
-        // negative polarity of the cut
-        if ( pCut->nFanins < 5 )
-        {
-            uTruth = 0xFFFF & ~*Cnf_CutTruth(pCut);
-            nLiterals += Cnf_SopCountLiterals( p->pSops[uTruth], p->pSopSizes[uTruth] ) + p->pSopSizes[uTruth];
-            assert( p->pSopSizes[uTruth] >= 0 );
-            nClauses += p->pSopSizes[uTruth];
-        }
-        else
-        {
-            nLiterals += Cnf_IsopCountLiterals( pCut->vIsop[0], pCut->nFanins ) + Vec_IntSize(pCut->vIsop[0]);
-            nClauses += Vec_IntSize(pCut->vIsop[0]);
-        }
-    }
-
-    // allocate CNF
-    pCnf = ABC_CALLOC( Cnf_Dat_t, 1 );
-    pCnf->pMan = p->pManAig;
-    pCnf->nLiterals = nLiterals;
-    pCnf->nClauses  = nClauses;
-    pCnf->pClauses  = ABC_ALLOC( int *, nClauses + 1 );
-    pCnf->pClauses[0] = ABC_ALLOC( int, nLiterals );
-    pCnf->pClauses[nClauses] = pCnf->pClauses[0] + nLiterals;
-    // create room for variable numbers
-    pCnf->pObj2Clause = ABC_ALLOC( int, Aig_ManObjNumMax(p->pManAig) );
-    pCnf->pObj2Count  = ABC_ALLOC( int, Aig_ManObjNumMax(p->pManAig) );
-    for ( i = 0; i < Aig_ManObjNumMax(p->pManAig); i++ )
-        pCnf->pObj2Clause[i] = pCnf->pObj2Count[i] = -1;
-    pCnf->nVars = Aig_ManObjNumMax(p->pManAig);
-
-    // clear the PI counters
-    Aig_ManForEachPi( p->pManAig, pObj, i )
-        pCnf->pObj2Count[pObj->Id] = 0;
-
-    // assign the clauses
-    vSopTemp = Vec_IntAlloc( 1 << 16 );
-    pLits = pCnf->pClauses[0];
-    pClas = pCnf->pClauses;
-    Vec_PtrForEachEntry( Aig_Obj_t *, vMapped, pObj, i )
-    {
-        // remember the starting clause
-        pCnf->pObj2Clause[pObj->Id] = pClas - pCnf->pClauses;
-        pCnf->pObj2Count[pObj->Id] = 0;
-
-        // get the best cut
-        pCut = Cnf_ObjBestCut( pObj );
-        // save variables of this cut
-        OutVar = pObj->Id;
-        for ( k = 0; k < (int)pCut->nFanins; k++ )
-        {
-            pVars[k] = pCut->pFanins[k];
-            assert( pVars[k] <= Aig_ManObjNumMax(p->pManAig) );
-        }
-
-        // positive polarity of the cut
-        if ( pCut->nFanins < 5 )
-        {
-            uTruth = 0xFFFF & *Cnf_CutTruth(pCut);
-            Cnf_SopConvertToVector( p->pSops[uTruth], p->pSopSizes[uTruth], vSopTemp );
-            vCover = vSopTemp;
-        }
-        else
-            vCover = pCut->vIsop[1];
-        Vec_IntForEachEntry( vCover, Cube, k )
-        {
-            *pClas++ = pLits;
-            *pLits++ = 2 * OutVar; 
-            pLits += Cnf_IsopWriteCube( Cube, pCut->nFanins, pVars, pLits );
-        }
-        pCnf->pObj2Count[pObj->Id] += Vec_IntSize(vCover);
-
-        // negative polarity of the cut
-        if ( pCut->nFanins < 5 )
-        {
-            uTruth = 0xFFFF & ~*Cnf_CutTruth(pCut);
-            Cnf_SopConvertToVector( p->pSops[uTruth], p->pSopSizes[uTruth], vSopTemp );
-            vCover = vSopTemp;
-        }
-        else
-            vCover = pCut->vIsop[0];
-        Vec_IntForEachEntry( vCover, Cube, k )
-        {
-            *pClas++ = pLits;
-            *pLits++ = 2 * OutVar + 1; 
-            pLits += Cnf_IsopWriteCube( Cube, pCut->nFanins, pVars, pLits );
-        }
-        pCnf->pObj2Count[pObj->Id] += Vec_IntSize(vCover);
-    }
-    Vec_IntFree( vSopTemp );
-
-    // write the output literals
-    Aig_ManForEachPo( p->pManAig, pObj, i )
-    {
-        // remember the starting clause
-        pCnf->pObj2Clause[pObj->Id] = pClas - pCnf->pClauses;
-        pCnf->pObj2Count[pObj->Id] = 2;
-        // get variables
-        OutVar = Aig_ObjFanin0(pObj)->Id;
-        PoVar = pObj->Id;
-        // first clause
-        *pClas++ = pLits;
-        *pLits++ = 2 * PoVar; 
-        *pLits++ = 2 * OutVar + !Aig_ObjFaninC0(pObj); 
-        // second clause
-        *pClas++ = pLits;
-        *pLits++ = 2 * PoVar + 1; 
-        *pLits++ = 2 * OutVar + Aig_ObjFaninC0(pObj); 
-    }
- 
-    // remember the starting clause
-    pCnf->pObj2Clause[Aig_ManConst1(p->pManAig)->Id] = pClas - pCnf->pClauses;
-    pCnf->pObj2Count[Aig_ManConst1(p->pManAig)->Id] = 1;
-    // write the constant literal
-    OutVar = Aig_ManConst1(p->pManAig)->Id;
-    *pClas++ = pLits;
-    *pLits++ = 2 * OutVar; 
-
-    // verify that the correct number of literals and clauses was written
-    assert( pLits - pCnf->pClauses[0] == nLiterals );
-    assert( pClas - pCnf->pClauses == nClauses );
-//Cnf_DataPrint( pCnf, 1 );
-    return pCnf;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Derives a simple CNF for the AIG.]
-
-  Description [The last argument lists the number of last outputs
-  of the manager, which will not be converted into clauses. 
-  New variables will be introduced for these outputs.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Dat_t * Cnf_DeriveSimple( Aig_Man_t * p, int nOutputs )
-{
-    Aig_Obj_t * pObj;
-    Cnf_Dat_t * pCnf;
-    int OutVar, PoVar, pVars[32], * pLits, ** pClas;
-    int i, nLiterals, nClauses, Number;
-
-    // count the number of literals and clauses
-    nLiterals = 1 + 7 * Aig_ManNodeNum(p) + Aig_ManPoNum( p ) + 3 * nOutputs;
-    nClauses = 1 + 3 * Aig_ManNodeNum(p) + Aig_ManPoNum( p ) + nOutputs;
-
-    // allocate CNF
-    pCnf = ABC_ALLOC( Cnf_Dat_t, 1 );
-    memset( pCnf, 0, sizeof(Cnf_Dat_t) );
-    pCnf->pMan = p;
-    pCnf->nLiterals = nLiterals;
-    pCnf->nClauses = nClauses;
-    pCnf->pClauses = ABC_ALLOC( int *, nClauses + 1 );
-    pCnf->pClauses[0] = ABC_ALLOC( int, nLiterals );
-    pCnf->pClauses[nClauses] = pCnf->pClauses[0] + nLiterals;
-
-    // create room for variable numbers
-    pCnf->pVarNums = ABC_ALLOC( int, Aig_ManObjNumMax(p) );
-//    memset( pCnf->pVarNums, 0xff, sizeof(int) * Aig_ManObjNumMax(p) );
-    for ( i = 0; i < Aig_ManObjNumMax(p); i++ )
-        pCnf->pVarNums[i] = -1;
-    // assign variables to the last (nOutputs) POs
-    Number = 1;
-    if ( nOutputs )
-    {
-//        assert( nOutputs == Aig_ManRegNum(p) );
-//        Aig_ManForEachLiSeq( p, pObj, i )
-//            pCnf->pVarNums[pObj->Id] = Number++;
-        Aig_ManForEachPo( p, pObj, i )
-            pCnf->pVarNums[pObj->Id] = Number++;
-    }
-    // assign variables to the internal nodes
-    Aig_ManForEachNode( p, pObj, i )
-        pCnf->pVarNums[pObj->Id] = Number++;
-    // assign variables to the PIs and constant node
-    Aig_ManForEachPi( p, pObj, i )
-        pCnf->pVarNums[pObj->Id] = Number++;
-    pCnf->pVarNums[Aig_ManConst1(p)->Id] = Number++;
-    pCnf->nVars = Number;
-/*
-    // print CNF numbers
-    printf( "SAT numbers of each node:\n" );
-    Aig_ManForEachObj( p, pObj, i )
-        printf( "%d=%d ", pObj->Id, pCnf->pVarNums[pObj->Id] );
-    printf( "\n" );
-*/
-    // assign the clauses
-    pLits = pCnf->pClauses[0];
-    pClas = pCnf->pClauses;
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        OutVar   = pCnf->pVarNums[ pObj->Id ];
-        pVars[0] = pCnf->pVarNums[ Aig_ObjFanin0(pObj)->Id ];
-        pVars[1] = pCnf->pVarNums[ Aig_ObjFanin1(pObj)->Id ];
-
-        // positive phase
-        *pClas++ = pLits;
-        *pLits++ = 2 * OutVar; 
-        *pLits++ = 2 * pVars[0] + !Aig_ObjFaninC0(pObj); 
-        *pLits++ = 2 * pVars[1] + !Aig_ObjFaninC1(pObj); 
-        // negative phase
-        *pClas++ = pLits;
-        *pLits++ = 2 * OutVar + 1; 
-        *pLits++ = 2 * pVars[0] + Aig_ObjFaninC0(pObj); 
-        *pClas++ = pLits;
-        *pLits++ = 2 * OutVar + 1; 
-        *pLits++ = 2 * pVars[1] + Aig_ObjFaninC1(pObj); 
-    }
- 
-    // write the constant literal
-    OutVar = pCnf->pVarNums[ Aig_ManConst1(p)->Id ];
-    assert( OutVar <= Aig_ManObjNumMax(p) );
-    *pClas++ = pLits;
-    *pLits++ = 2 * OutVar;  
-
-    // write the output literals
-    Aig_ManForEachPo( p, pObj, i )
-    {
-        OutVar = pCnf->pVarNums[ Aig_ObjFanin0(pObj)->Id ];
-        if ( i < Aig_ManPoNum(p) - nOutputs )
-        {
-            *pClas++ = pLits;
-            *pLits++ = 2 * OutVar + Aig_ObjFaninC0(pObj); 
-        }
-        else
-        {
-            PoVar  = pCnf->pVarNums[ pObj->Id ];
-            // first clause
-            *pClas++ = pLits;
-            *pLits++ = 2 * PoVar; 
-            *pLits++ = 2 * OutVar + !Aig_ObjFaninC0(pObj); 
-            // second clause
-            *pClas++ = pLits;
-            *pLits++ = 2 * PoVar + 1; 
-            *pLits++ = 2 * OutVar + Aig_ObjFaninC0(pObj); 
-        }
-    }
-
-    // verify that the correct number of literals and clauses was written
-    assert( pLits - pCnf->pClauses[0] == nLiterals );
-    assert( pClas - pCnf->pClauses == nClauses );
-    return pCnf;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives a simple CNF for backward retiming computation.]
-
-  Description [The last argument shows the number of last outputs
-  of the manager, which will not be converted into clauses. 
-  New variables will be introduced for these outputs.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cnf_Dat_t * Cnf_DeriveSimpleForRetiming( Aig_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    Cnf_Dat_t * pCnf;
-    int OutVar, PoVar, pVars[32], * pLits, ** pClas;
-    int i, nLiterals, nClauses, Number;
-
-    // count the number of literals and clauses
-    nLiterals = 1 + 7 * Aig_ManNodeNum(p) + 5 * Aig_ManPoNum(p);
-    nClauses = 1 + 3 * Aig_ManNodeNum(p) + 3 * Aig_ManPoNum(p);
-
-    // allocate CNF
-    pCnf = ABC_ALLOC( Cnf_Dat_t, 1 );
-    memset( pCnf, 0, sizeof(Cnf_Dat_t) );
-    pCnf->pMan = p;
-    pCnf->nLiterals = nLiterals;
-    pCnf->nClauses = nClauses;
-    pCnf->pClauses = ABC_ALLOC( int *, nClauses + 1 );
-    pCnf->pClauses[0] = ABC_ALLOC( int, nLiterals );
-    pCnf->pClauses[nClauses] = pCnf->pClauses[0] + nLiterals;
-
-    // create room for variable numbers
-    pCnf->pVarNums = ABC_ALLOC( int, Aig_ManObjNumMax(p) );
-//    memset( pCnf->pVarNums, 0xff, sizeof(int) * Aig_ManObjNumMax(p) );
-    for ( i = 0; i < Aig_ManObjNumMax(p); i++ )
-        pCnf->pVarNums[i] = -1;
-    // assign variables to the last (nOutputs) POs
-    Number = 1;
-    Aig_ManForEachPo( p, pObj, i )
-        pCnf->pVarNums[pObj->Id] = Number++;
-    // assign variables to the internal nodes
-    Aig_ManForEachNode( p, pObj, i )
-        pCnf->pVarNums[pObj->Id] = Number++;
-    // assign variables to the PIs and constant node
-    Aig_ManForEachPi( p, pObj, i )
-        pCnf->pVarNums[pObj->Id] = Number++;
-    pCnf->pVarNums[Aig_ManConst1(p)->Id] = Number++;
-    pCnf->nVars = Number;
-    // assign the clauses
-    pLits = pCnf->pClauses[0];
-    pClas = pCnf->pClauses;
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        OutVar   = pCnf->pVarNums[ pObj->Id ];
-        pVars[0] = pCnf->pVarNums[ Aig_ObjFanin0(pObj)->Id ];
-        pVars[1] = pCnf->pVarNums[ Aig_ObjFanin1(pObj)->Id ];
-
-        // positive phase
-        *pClas++ = pLits;
-        *pLits++ = 2 * OutVar; 
-        *pLits++ = 2 * pVars[0] + !Aig_ObjFaninC0(pObj); 
-        *pLits++ = 2 * pVars[1] + !Aig_ObjFaninC1(pObj); 
-        // negative phase
-        *pClas++ = pLits;
-        *pLits++ = 2 * OutVar + 1; 
-        *pLits++ = 2 * pVars[0] + Aig_ObjFaninC0(pObj); 
-        *pClas++ = pLits;
-        *pLits++ = 2 * OutVar + 1; 
-        *pLits++ = 2 * pVars[1] + Aig_ObjFaninC1(pObj); 
-    }
- 
-    // write the constant literal
-    OutVar = pCnf->pVarNums[ Aig_ManConst1(p)->Id ];
-    assert( OutVar <= Aig_ManObjNumMax(p) );
-    *pClas++ = pLits;
-    *pLits++ = 2 * OutVar; 
-
-    // write the output literals
-    Aig_ManForEachPo( p, pObj, i )
-    {
-        OutVar = pCnf->pVarNums[ Aig_ObjFanin0(pObj)->Id ];
-        PoVar  = pCnf->pVarNums[ pObj->Id ];
-        // first clause
-        *pClas++ = pLits;
-        *pLits++ = 2 * PoVar; 
-        *pLits++ = 2 * OutVar + !Aig_ObjFaninC0(pObj); 
-        // second clause
-        *pClas++ = pLits;
-        *pLits++ = 2 * PoVar + 1; 
-        *pLits++ = 2 * OutVar + Aig_ObjFaninC0(pObj); 
-        // final clause (init-state is always 0 -> set the output to 0)
-        *pClas++ = pLits;
-        *pLits++ = 2 * PoVar + 1; 
-    }
-
-    // verify that the correct number of literals and clauses was written
-    assert( pLits - pCnf->pClauses[0] == nLiterals );
-    assert( pClas - pCnf->pClauses == nClauses );
-    return pCnf;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cnf/cnf_.c b/src/aig/cnf/cnf_.c
deleted file mode 100644
index acf75093..00000000
--- a/src/aig/cnf/cnf_.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cnf_.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [AIG-to-CNF conversion.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: cnf_.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cnf.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/cnf/module.make b/src/aig/cnf/module.make
deleted file mode 100644
index 596fe31b..00000000
--- a/src/aig/cnf/module.make
+++ /dev/null
@@ -1,9 +0,0 @@
-SRC +=    src/aig/cnf/cnfCore.c \
-    src/aig/cnf/cnfCut.c \
-    src/aig/cnf/cnfData.c \
-    src/aig/cnf/cnfFast.c \
-    src/aig/cnf/cnfMan.c \
-    src/aig/cnf/cnfMap.c \
-    src/aig/cnf/cnfPost.c \
-    src/aig/cnf/cnfUtil.c \
-    src/aig/cnf/cnfWrite.c 
diff --git a/src/aig/csw/csw.h b/src/aig/csw/csw.h
deleted file mode 100644
index c1bf7a73..00000000
--- a/src/aig/csw/csw.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [csw.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Cut sweeping.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - July 11, 2007.]
-
-  Revision    [$Id: csw.h,v 1.00 2007/07/11 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __CSW_H__
-#define __CSW_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
- 
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                           ITERATORS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== cnfCore.c ========================================================*/
-extern Aig_Man_t *     Csw_Sweep( Aig_Man_t * pAig, int nCutsMax, int nLeafMax, int fVerbose );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/csw/cswCore.c b/src/aig/csw/cswCore.c
deleted file mode 100644
index e1bdca00..00000000
--- a/src/aig/csw/cswCore.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cswCore.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Cut sweeping.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - July 11, 2007.]
-
-  Revision    [$Id: cswCore.c,v 1.00 2007/07/11 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Csw_Sweep( Aig_Man_t * pAig, int nCutsMax, int nLeafMax, int fVerbose )
-{
-    Csw_Man_t * p;
-    Aig_Man_t * pRes;
-    Aig_Obj_t * pObj, * pObjNew, * pObjRes;
-    int i, clk;
-clk = clock();
-    // start the manager
-    p = Csw_ManStart( pAig, nCutsMax, nLeafMax, fVerbose );
-    // set elementary cuts at the PIs
-    Aig_ManForEachPi( p->pManRes, pObj, i )
-    {
-        Csw_ObjPrepareCuts( p, pObj, 1 );
-        Csw_ObjAddRefs( p, pObj, Aig_ManPi(p->pManAig,i)->nRefs );
-    }
-    // process the nodes
-    Aig_ManForEachNode( pAig, pObj, i )
-    {
-        // create the new node
-        pObjNew = Aig_And( p->pManRes, Csw_ObjChild0Equiv(p, pObj), Csw_ObjChild1Equiv(p, pObj) );
-        // check if this node can be represented using another node
-//        pObjRes = Csw_ObjSweep( p, Aig_Regular(pObjNew), pObj->nRefs > 1 );
-//        pObjRes = Aig_NotCond( pObjRes, Aig_IsComplement(pObjNew) );
-        // try recursively if resubsitution is used
-        do {
-            pObjRes = Csw_ObjSweep( p, Aig_Regular(pObjNew), pObj->nRefs > 1 );
-            pObjRes = Aig_NotCond( pObjRes, Aig_IsComplement(pObjNew) );        
-            pObjNew = pObjRes;
-        } while ( Csw_ObjCuts(p, Aig_Regular(pObjNew)) == NULL && !Aig_ObjIsConst1(Aig_Regular(pObjNew)) );
-        // save the resulting node
-        Csw_ObjSetEquiv( p, pObj, pObjRes );
-        // add to the reference counter
-        Csw_ObjAddRefs( p, Aig_Regular(pObjRes), pObj->nRefs );
-    }
-    // add the POs
-    Aig_ManForEachPo( pAig, pObj, i )
-        Aig_ObjCreatePo( p->pManRes, Csw_ObjChild0Equiv(p, pObj) );
-    // remove dangling nodes 
-    Aig_ManCleanup( p->pManRes );
-    // return the resulting manager
-p->timeTotal = clock() - clk;
-p->timeOther = p->timeTotal - p->timeCuts - p->timeHash;
-    pRes = p->pManRes;
-    Csw_ManStop( p );
-    return pRes;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/csw/cswCut.c b/src/aig/csw/cswCut.c
deleted file mode 100644
index bb6677c2..00000000
--- a/src/aig/csw/cswCut.c
+++ /dev/null
@@ -1,607 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cswCut.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Cut sweeping.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - July 11, 2007.]
-
-  Revision    [$Id: cswCut.c,v 1.00 2007/07/11 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Compute the cost of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Csw_CutFindCost( Csw_Man_t * p, Csw_Cut_t * pCut )
-{
-    Aig_Obj_t * pLeaf;
-    int i, Cost = 0;
-    assert( pCut->nFanins > 0 );
-    Csw_CutForEachLeaf( p->pManRes, pCut, pLeaf, i )
-    {
-//        Cost += pLeaf->nRefs;
-        Cost += Csw_ObjRefs( p, pLeaf );
-//        printf( "%d ", pLeaf->nRefs );
-    }
-//printf( "\n" );
-    return Cost * 100 / pCut->nFanins;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compute the cost of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline float Csw_CutFindCost2( Csw_Man_t * p, Csw_Cut_t * pCut )
-{
-    Aig_Obj_t * pLeaf;
-    float Cost = 0.0;
-    int i;
-    assert( pCut->nFanins > 0 );
-    Csw_CutForEachLeaf( p->pManRes, pCut, pLeaf, i )
-        Cost += (float)1.0/pLeaf->nRefs;
-    return 1/Cost;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the next free cut to use.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Csw_Cut_t * Csw_CutFindFree( Csw_Man_t * p, Aig_Obj_t * pObj )
-{
-    Csw_Cut_t * pCut, * pCutMax;
-    int i;
-    pCutMax = NULL;
-    Csw_ObjForEachCut( p, pObj, pCut, i )
-    {
-        if ( pCut->nFanins == 0 )
-            return pCut;
-        if ( pCutMax == NULL || pCutMax->Cost < pCut->Cost )
-            pCutMax = pCut;
-    }
-    assert( pCutMax != NULL );
-    pCutMax->nFanins = 0;
-    return pCutMax;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the stretching phase of the cut w.r.t. the merged cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline unsigned Cut_TruthPhase( Csw_Cut_t * pCut, Csw_Cut_t * pCut1 )
-{
-    unsigned uPhase = 0;
-    int i, k;
-    for ( i = k = 0; i < pCut->nFanins; i++ )
-    {
-        if ( k == pCut1->nFanins )
-            break;
-        if ( pCut->pFanins[i] < pCut1->pFanins[k] )
-            continue;
-        assert( pCut->pFanins[i] == pCut1->pFanins[k] );
-        uPhase |= (1 << i);
-        k++;
-    }
-    return uPhase;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs truth table computation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Csw_CutComputeTruth( Csw_Man_t * p, Csw_Cut_t * pCut, Csw_Cut_t * pCut0, Csw_Cut_t * pCut1, int fCompl0, int fCompl1 )
-{
-    // permute the first table
-    if ( fCompl0 ) 
-        Kit_TruthNot( p->puTemp[0], Csw_CutTruth(pCut0), p->nLeafMax );
-    else
-        Kit_TruthCopy( p->puTemp[0], Csw_CutTruth(pCut0), p->nLeafMax );
-    Kit_TruthStretch( p->puTemp[2], p->puTemp[0], pCut0->nFanins, p->nLeafMax, Cut_TruthPhase(pCut, pCut0), 0 );
-    // permute the second table
-    if ( fCompl1 ) 
-        Kit_TruthNot( p->puTemp[1], Csw_CutTruth(pCut1), p->nLeafMax );
-    else
-        Kit_TruthCopy( p->puTemp[1], Csw_CutTruth(pCut1), p->nLeafMax );
-    Kit_TruthStretch( p->puTemp[3], p->puTemp[1], pCut1->nFanins, p->nLeafMax, Cut_TruthPhase(pCut, pCut1), 0 );
-    // produce the resulting table
-    Kit_TruthAnd( Csw_CutTruth(pCut), p->puTemp[2], p->puTemp[3], p->nLeafMax );
-//    assert( pCut->nFanins >= Kit_TruthSupportSize( Csw_CutTruth(pCut), p->nLeafMax ) );
-    return Csw_CutTruth(pCut);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs support minimization for the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Csw_CutSupportMinimize( Csw_Man_t * p, Csw_Cut_t * pCut )
-{
-    unsigned * pTruth;
-    int uSupp, nFansNew, i, k;
-    // get truth table
-    pTruth = Csw_CutTruth( pCut );
-    // get support 
-    uSupp = Kit_TruthSupport( pTruth, p->nLeafMax );
-    // get the new support size
-    nFansNew = Kit_WordCountOnes( uSupp );
-    // check if there are redundant variables
-    if ( nFansNew == pCut->nFanins )
-        return nFansNew;
-    assert( nFansNew < pCut->nFanins );
-    // minimize support
-    Kit_TruthShrink( p->puTemp[0], pTruth, nFansNew, p->nLeafMax, uSupp, 1 );
-    for ( i = k = 0; i < pCut->nFanins; i++ )
-        if ( uSupp & (1 << i) )
-            pCut->pFanins[k++] = pCut->pFanins[i];
-    assert( k == nFansNew );
-    pCut->nFanins = nFansNew;
-//    assert( nFansNew == Kit_TruthSupportSize( pTruth, p->nLeafMax ) );
-//Extra_PrintBinary( stdout, pTruth, (1<<p->nLeafMax) ); printf( "\n" );
-    return nFansNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if pDom is contained in pCut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Csw_CutCheckDominance( Csw_Cut_t * pDom, Csw_Cut_t * pCut )
-{
-    int i, k;
-    for ( i = 0; i < (int)pDom->nFanins; i++ )
-    {
-        for ( k = 0; k < (int)pCut->nFanins; k++ )
-            if ( pDom->pFanins[i] == pCut->pFanins[k] )
-                break;
-        if ( k == (int)pCut->nFanins ) // node i in pDom is not contained in pCut
-            return 0;
-    }
-    // every node in pDom is contained in pCut
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the cut is contained.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Csw_CutFilter( Csw_Man_t * p, Aig_Obj_t * pObj, Csw_Cut_t * pCut )
-{ 
-    Csw_Cut_t * pTemp;
-    int i;
-    // go through the cuts of the node
-    Csw_ObjForEachCut( p, pObj, pTemp, i )
-    {
-        if ( pTemp->nFanins < 2 )
-            continue;
-        if ( pTemp == pCut )
-            continue;
-        if ( pTemp->nFanins > pCut->nFanins )
-        {
-            // skip the non-contained cuts
-            if ( (pTemp->uSign & pCut->uSign) != pCut->uSign )
-                continue;
-            // check containment seriously
-            if ( Csw_CutCheckDominance( pCut, pTemp ) )
-            {
-                // remove contained cut
-                pTemp->nFanins = 0;
-            }
-         }
-        else
-        {
-            // skip the non-contained cuts
-            if ( (pTemp->uSign & pCut->uSign) != pTemp->uSign )
-                continue;
-            // check containment seriously
-            if ( Csw_CutCheckDominance( pTemp, pCut ) )
-            {
-                // remove the given
-                pCut->nFanins = 0;
-                return 1;
-            }
-        }
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Merges two cuts.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Csw_CutMergeOrdered( Csw_Man_t * p, Csw_Cut_t * pC0, Csw_Cut_t * pC1, Csw_Cut_t * pC )
-{ 
-    int i, k, c;
-    assert( pC0->nFanins >= pC1->nFanins );
-    // the case of the largest cut sizes
-    if ( pC0->nFanins == p->nLeafMax && pC1->nFanins == p->nLeafMax )
-    {
-        for ( i = 0; i < pC0->nFanins; i++ )
-            if ( pC0->pFanins[i] != pC1->pFanins[i] )
-                return 0;
-        for ( i = 0; i < pC0->nFanins; i++ )
-            pC->pFanins[i] = pC0->pFanins[i];
-        pC->nFanins = pC0->nFanins;
-        return 1;
-    }
-    // the case when one of the cuts is the largest
-    if ( pC0->nFanins == p->nLeafMax )
-    {
-        for ( i = 0; i < pC1->nFanins; i++ )
-        {
-            for ( k = pC0->nFanins - 1; k >= 0; k-- )
-                if ( pC0->pFanins[k] == pC1->pFanins[i] )
-                    break;
-            if ( k == -1 ) // did not find
-                return 0;
-        }
-        for ( i = 0; i < pC0->nFanins; i++ )
-            pC->pFanins[i] = pC0->pFanins[i];
-        pC->nFanins = pC0->nFanins;
-        return 1;
-    }
-
-    // compare two cuts with different numbers
-    i = k = 0;
-    for ( c = 0; c < p->nLeafMax; c++ )
-    {
-        if ( k == pC1->nFanins )
-        {
-            if ( i == pC0->nFanins )
-            {
-                pC->nFanins = c;
-                return 1;
-            }
-            pC->pFanins[c] = pC0->pFanins[i++];
-            continue;
-        }
-        if ( i == pC0->nFanins )
-        {
-            if ( k == pC1->nFanins )
-            {
-                pC->nFanins = c;
-                return 1;
-            }
-            pC->pFanins[c] = pC1->pFanins[k++];
-            continue;
-        }
-        if ( pC0->pFanins[i] < pC1->pFanins[k] )
-        {
-            pC->pFanins[c] = pC0->pFanins[i++];
-            continue;
-        }
-        if ( pC0->pFanins[i] > pC1->pFanins[k] )
-        {
-            pC->pFanins[c] = pC1->pFanins[k++];
-            continue;
-        }
-        pC->pFanins[c] = pC0->pFanins[i++]; 
-        k++;
-    }
-    if ( i < pC0->nFanins || k < pC1->nFanins )
-        return 0;
-    pC->nFanins = c;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares the object for FPGA mapping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Csw_CutMerge( Csw_Man_t * p, Csw_Cut_t * pCut0, Csw_Cut_t * pCut1, Csw_Cut_t * pCut )
-{ 
-    assert( p->nLeafMax > 0 );
-    // merge the nodes
-    if ( pCut0->nFanins < pCut1->nFanins )
-    {
-        if ( !Csw_CutMergeOrdered( p, pCut1, pCut0, pCut ) )
-            return 0;
-    }
-    else
-    {
-        if ( !Csw_CutMergeOrdered( p, pCut0, pCut1, pCut ) )
-            return 0;
-    }
-    pCut->uSign = pCut0->uSign | pCut1->uSign;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Consider cut with more than 2 fanins having 2 true variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Csw_ObjTwoVarCut( Csw_Man_t * p, Csw_Cut_t * pCut )
-{
-    Aig_Obj_t * pRes, * pIn0, * pIn1;
-    int nVars, uTruth, fCompl = 0;
-    assert( pCut->nFanins > 2 );
-    // minimize support of this cut
-    nVars = Csw_CutSupportMinimize( p, pCut );
-    assert( nVars == 2 );
-    // get the fanins
-    pIn0 = Aig_ManObj( p->pManRes, pCut->pFanins[0] );
-    pIn1 = Aig_ManObj( p->pManRes, pCut->pFanins[1] );
-    // derive the truth table
-    uTruth = 0xF & *Csw_CutTruth(pCut);
-    if ( uTruth == 14 || uTruth == 13 || uTruth == 11 || uTruth == 7 )
-    {
-        uTruth = 0xF & ~uTruth;
-        fCompl = 1;
-    }
-    // compute the result
-    pRes = NULL;
-    if ( uTruth == 1  )  // 0001  // 1110  14
-        pRes = Aig_And( p->pManRes, Aig_Not(pIn0), Aig_Not(pIn1) );
-    if ( uTruth == 2  )  // 0010  // 1101  13 
-        pRes = Aig_And( p->pManRes,         pIn0 , Aig_Not(pIn1) );
-    if ( uTruth == 4  )  // 0100  // 1011  11
-        pRes = Aig_And( p->pManRes, Aig_Not(pIn0),         pIn1  );
-    if ( uTruth == 8  )  // 1000  // 0111   7
-        pRes = Aig_And( p->pManRes,         pIn0 ,         pIn1  );
-    if ( pRes )
-        pRes = Aig_NotCond( pRes, fCompl );
-    return pRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Csw_Cut_t * Csw_ObjPrepareCuts( Csw_Man_t * p, Aig_Obj_t * pObj, int fTriv )
-{
-    Csw_Cut_t * pCutSet, * pCut;
-    int i;
-    // create the cutset of the node
-    pCutSet = (Csw_Cut_t *)Aig_MmFixedEntryFetch( p->pMemCuts );
-    Csw_ObjSetCuts( p, pObj, pCutSet );
-    Csw_ObjForEachCut( p, pObj, pCut, i )
-    {
-        pCut->nFanins = 0;
-        pCut->iNode = pObj->Id;
-        pCut->nCutSize = p->nCutSize;
-        pCut->nLeafMax = p->nLeafMax;
-    }
-    // add unit cut if needed
-    if ( fTriv )
-    {
-        pCut = pCutSet;
-        pCut->Cost = 0;
-        pCut->iNode = pObj->Id;
-        pCut->nFanins = 1;
-        pCut->pFanins[0] = pObj->Id;
-        pCut->uSign = Aig_ObjCutSign( pObj->Id );
-        memset( Csw_CutTruth(pCut), 0xAA, sizeof(unsigned) * p->nTruthWords );
-    }
-    return pCutSet;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives cuts for one node and sweeps this node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Csw_ObjSweep( Csw_Man_t * p, Aig_Obj_t * pObj, int fTriv )
-{
-    int fUseResub = 1;
-    Csw_Cut_t * pCut0, * pCut1, * pCut, * pCutSet;
-    Aig_Obj_t * pFanin0 = Aig_ObjFanin0(pObj);
-    Aig_Obj_t * pFanin1 = Aig_ObjFanin1(pObj);
-    Aig_Obj_t * pObjNew;
-    unsigned * pTruth;
-    int i, k, nVars, nFanins, iVar, clk;
-
-    assert( !Aig_IsComplement(pObj) );
-    if ( !Aig_ObjIsNode(pObj) )
-        return pObj;
-    if ( Csw_ObjCuts(p, pObj) )
-        return pObj;
-    // the node is not processed yet
-    assert( Csw_ObjCuts(p, pObj) == NULL );
-    assert( Aig_ObjIsNode(pObj) );
-
-    // set up the first cut
-    pCutSet = Csw_ObjPrepareCuts( p, pObj, fTriv );
-
-    // compute pair-wise cut combinations while checking table
-    Csw_ObjForEachCut( p, pFanin0, pCut0, i )
-    if ( pCut0->nFanins > 0 )
-    Csw_ObjForEachCut( p, pFanin1, pCut1, k )
-    if ( pCut1->nFanins > 0 )
-    {
-        // make sure K-feasible cut exists
-        if ( Kit_WordCountOnes(pCut0->uSign | pCut1->uSign) > p->nLeafMax )
-            continue;
-        // get the next cut of this node
-        pCut = Csw_CutFindFree( p, pObj );
-clk = clock();
-        // assemble the new cut
-        if ( !Csw_CutMerge( p, pCut0, pCut1, pCut ) )
-        {
-            assert( pCut->nFanins == 0 );
-            continue;
-        }
-        // check containment
-        if ( Csw_CutFilter( p, pObj, pCut ) )
-        {
-            assert( pCut->nFanins == 0 );
-            continue;
-        }
-        // create its truth table
-        pTruth = Csw_CutComputeTruth( p, pCut, pCut0, pCut1, Aig_ObjFaninC0(pObj), Aig_ObjFaninC1(pObj) );
-        // support minimize the truth table
-        nFanins = pCut->nFanins;
-//        nVars = Csw_CutSupportMinimize( p, pCut ); // leads to quality degradation
-        nVars = Kit_TruthSupportSize( pTruth, p->nLeafMax );
-p->timeCuts += clock() - clk;
-
-        // check for trivial truth tables
-        if ( nVars == 0 )
-        {
-            p->nNodesTriv0++;
-            return Aig_NotCond( Aig_ManConst1(p->pManRes), !(pTruth[0] & 1) );
-        }
-        if ( nVars == 1 )
-        {
-            p->nNodesTriv1++;
-            iVar = Kit_WordFindFirstBit( Kit_TruthSupport(pTruth, p->nLeafMax) );
-            assert( iVar < pCut->nFanins );
-            return Aig_NotCond( Aig_ManObj(p->pManRes, pCut->pFanins[iVar]), (pTruth[0] & 1) );
-        }
-        if ( nVars == 2 && nFanins > 2 && fUseResub )
-        {
-            if ( (pObjNew = Csw_ObjTwoVarCut( p, pCut )) )
-            {
-                p->nNodesTriv2++;
-                return pObjNew;
-            }
-        }
-
-        // check if an equivalent node with the same cut exists
-clk = clock();
-        pObjNew = pCut->nFanins > 2 ? Csw_TableCutLookup( p, pCut ) : NULL;
-p->timeHash += clock() - clk;
-        if ( pObjNew )
-        {
-            p->nNodesCuts++;
-            return pObjNew;
-        }
-
-        // assign the cost
-        pCut->Cost = Csw_CutFindCost( p, pCut );
-        assert( pCut->nFanins > 0 );
-        assert( pCut->Cost > 0 );
-    }
-    p->nNodesTried++;
-
-    // load the resulting cuts into the table
-clk = clock();
-    Csw_ObjForEachCut( p, pObj, pCut, i )
-    {
-        if ( pCut->nFanins > 2 )
-        {
-            assert( pCut->Cost > 0 );
-            Csw_TableCutInsert( p, pCut );
-        }
-    }
-p->timeHash += clock() - clk;
-
-    // return the node if could not replace it
-    return pObj;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/csw/cswInt.h b/src/aig/csw/cswInt.h
deleted file mode 100644
index 3a06f3f1..00000000
--- a/src/aig/csw/cswInt.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cswInt.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Cut sweeping.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - July 11, 2007.]
-
-  Revision    [$Id: cswInt.h,v 1.00 2007/07/11 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __CSW_INT_H__
-#define __CSW_INT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-#include <time.h>
-
-#include "aig.h"
-#include "dar.h"
-#include "kit.h"
-#include "csw.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
- 
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Csw_Man_t_            Csw_Man_t;
-typedef struct Csw_Cut_t_            Csw_Cut_t;
-
-// the cut used to represent node in the AIG
-struct Csw_Cut_t_
-{
-    Csw_Cut_t *     pNext;           // the next cut in the table 
-    int             Cost;            // the cost of the cut
-//    float           Cost;            // the cost of the cut
-    unsigned        uSign;           // cut signature
-    int             iNode;           // the node, for which it is the cut
-    short           nCutSize;        // the number of bytes in the cut
-    char            nLeafMax;        // the maximum number of fanins
-    char            nFanins;         // the current number of fanins
-    int             pFanins[0];      // the fanins (followed by the truth table)
-};
-
-// the CNF computation manager
-struct Csw_Man_t_
-{
-    // AIG manager
-    Aig_Man_t *     pManAig;         // the input AIG manager
-    Aig_Man_t *     pManRes;         // the output AIG manager
-    Aig_Obj_t **    pEquiv;          // the equivalent nodes in the resulting manager
-    Csw_Cut_t **    pCuts;           // the cuts for each node in the output manager
-    int *           pnRefs;          // the number of references of each new node
-    // hash table for cuts
-    Csw_Cut_t **    pTable;          // the table composed of cuts 
-    int             nTableSize;      // the size of hash table
-    // parameters
-    int             nCutsMax;        // the max number of cuts at the node
-    int             nLeafMax;        // the max number of leaves of a cut
-    int             fVerbose;        // enables verbose output
-    // internal variables
-    int             nCutSize;        // the number of bytes needed to store one cut
-    int             nTruthWords;     // the number of truth table words
-    Aig_MmFixed_t * pMemCuts;        // memory manager for cuts
-    unsigned *      puTemp[4];       // used for the truth table computation
-    // statistics
-    int             nNodesTriv0;     // the number of trivial nodes
-    int             nNodesTriv1;     // the number of trivial nodes
-    int             nNodesTriv2;     // the number of trivial nodes
-    int             nNodesCuts;      // the number of rewritten nodes
-    int             nNodesTried;     // the number of nodes tried
-    int             timeCuts;        // time to compute the cut and its truth table
-    int             timeHash;        // time for hashing cuts
-    int             timeOther;       // other time
-    int             timeTotal;       // total time
-};
-
-static inline int          Csw_CutLeaveNum( Csw_Cut_t * pCut )          { return pCut->nFanins;                                   }
-static inline int *        Csw_CutLeaves( Csw_Cut_t * pCut )            { return pCut->pFanins;                                   }
-static inline unsigned *   Csw_CutTruth( Csw_Cut_t * pCut )             { return (unsigned *)(pCut->pFanins + pCut->nLeafMax);    }
-static inline Csw_Cut_t *  Csw_CutNext( Csw_Cut_t * pCut )              { return (Csw_Cut_t *)(((char *)pCut) + pCut->nCutSize);  }
-
-static inline int          Csw_ObjRefs( Csw_Man_t * p, Aig_Obj_t * pObj )                         { return p->pnRefs[pObj->Id];   }
-static inline void         Csw_ObjAddRefs( Csw_Man_t * p, Aig_Obj_t * pObj, int nRefs )           { p->pnRefs[pObj->Id] += nRefs; }
-
-static inline Csw_Cut_t *  Csw_ObjCuts( Csw_Man_t * p, Aig_Obj_t * pObj )                         { return p->pCuts[pObj->Id];    }
-static inline void         Csw_ObjSetCuts( Csw_Man_t * p, Aig_Obj_t * pObj, Csw_Cut_t * pCuts )   { p->pCuts[pObj->Id] = pCuts;   }
-
-static inline Aig_Obj_t *  Csw_ObjEquiv( Csw_Man_t * p, Aig_Obj_t * pObj )                        { return p->pEquiv[pObj->Id];   }
-static inline void         Csw_ObjSetEquiv( Csw_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pEquiv ) { p->pEquiv[pObj->Id] = pEquiv; }
-
-static inline Aig_Obj_t *  Csw_ObjChild0Equiv( Csw_Man_t * p, Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin0(pObj)? Aig_NotCond(Csw_ObjEquiv(p, Aig_ObjFanin0(pObj)), Aig_ObjFaninC0(pObj)) : NULL;  }
-static inline Aig_Obj_t *  Csw_ObjChild1Equiv( Csw_Man_t * p, Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? Aig_NotCond(Csw_ObjEquiv(p, Aig_ObjFanin1(pObj)), Aig_ObjFaninC1(pObj)) : NULL;  }
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                           ITERATORS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// iterator over cuts of the node
-#define Csw_ObjForEachCut( p, pObj, pCut, i )                           \
-    for ( i = 0, pCut = Csw_ObjCuts(p, pObj); i < p->nCutsMax; i++, pCut = Csw_CutNext(pCut) ) 
-// iterator over leaves of the cut
-#define Csw_CutForEachLeaf( p, pCut, pLeaf, i )                         \
-    for ( i = 0; (i < (int)(pCut)->nFanins) && ((pLeaf) = Aig_ManObj(p, (pCut)->pFanins[i])); i++ )
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== cnfCut.c ========================================================*/
-extern Csw_Cut_t *    Csw_ObjPrepareCuts( Csw_Man_t * p, Aig_Obj_t * pObj, int fTriv );
-extern Aig_Obj_t *    Csw_ObjSweep( Csw_Man_t * p, Aig_Obj_t * pObj, int fTriv );
-/*=== cnfMan.c ========================================================*/
-extern Csw_Man_t *    Csw_ManStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, int fVerbose );
-extern void           Csw_ManStop( Csw_Man_t * p );
-/*=== cnfTable.c ========================================================*/
-extern int            Csw_TableCountCuts( Csw_Man_t * p );
-extern void           Csw_TableCutInsert( Csw_Man_t * p, Csw_Cut_t * pCut );
-extern Aig_Obj_t *    Csw_TableCutLookup( Csw_Man_t * p, Csw_Cut_t * pCut );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/csw/cswMan.c b/src/aig/csw/cswMan.c
deleted file mode 100644
index 8b6e538b..00000000
--- a/src/aig/csw/cswMan.c
+++ /dev/null
@@ -1,130 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cswMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Cut sweeping.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - July 11, 2007.]
-
-  Revision    [$Id: cswMan.c,v 1.00 2007/07/11 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the cut sweeping manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Csw_Man_t * Csw_ManStart( Aig_Man_t * pMan, int nCutsMax, int nLeafMax, int fVerbose )
-{
-    Csw_Man_t * p;
-    Aig_Obj_t * pObj;
-    int i;
-    assert( nCutsMax >= 2  );
-    assert( nLeafMax <= 16 );
-    // allocate the fraiging manager
-    p = ABC_ALLOC( Csw_Man_t, 1 );
-    memset( p, 0, sizeof(Csw_Man_t) );
-    p->nCutsMax = nCutsMax;
-    p->nLeafMax = nLeafMax;
-    p->fVerbose = fVerbose;
-    p->pManAig  = pMan;
-    // create the new manager
-    p->pManRes  = Aig_ManStartFrom( pMan );
-    assert( Aig_ManPiNum(p->pManAig) == Aig_ManPiNum(p->pManRes) );
-    // allocate room for cuts and equivalent nodes
-    p->pnRefs   = ABC_ALLOC( int, Aig_ManObjNumMax(pMan) );
-    p->pEquiv   = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pMan) );
-    p->pCuts    = ABC_ALLOC( Csw_Cut_t *, Aig_ManObjNumMax(pMan) );
-    memset( p->pCuts, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(pMan) );
-    memset( p->pnRefs, 0, sizeof(int) * Aig_ManObjNumMax(pMan) );
-    // allocate memory manager
-    p->nTruthWords = Aig_TruthWordNum(nLeafMax);
-    p->nCutSize = sizeof(Csw_Cut_t) + sizeof(int) * nLeafMax + sizeof(unsigned) * p->nTruthWords;
-    p->pMemCuts = Aig_MmFixedStart( p->nCutSize * p->nCutsMax, 512 );
-    // allocate hash table for cuts
-    p->nTableSize = Aig_PrimeCudd( Aig_ManNodeNum(pMan) * p->nCutsMax / 2 );
-    p->pTable = ABC_ALLOC( Csw_Cut_t *, p->nTableSize );
-    memset( p->pTable, 0, sizeof(Aig_Obj_t *) * p->nTableSize );
-    // set the pointers to the available fraig nodes
-    Csw_ObjSetEquiv( p, Aig_ManConst1(p->pManAig), Aig_ManConst1(p->pManRes) );
-    Aig_ManForEachPi( p->pManAig, pObj, i )
-        Csw_ObjSetEquiv( p, pObj, Aig_ManPi(p->pManRes, i) );
-    // room for temporary truth tables
-    p->puTemp[0] = ABC_ALLOC( unsigned, 4 * p->nTruthWords );
-    p->puTemp[1] = p->puTemp[0] + p->nTruthWords;
-    p->puTemp[2] = p->puTemp[1] + p->nTruthWords;
-    p->puTemp[3] = p->puTemp[2] + p->nTruthWords;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the fraiging manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Csw_ManStop( Csw_Man_t * p )
-{
-    if ( p->fVerbose )
-    {
-        int nNodesBeg = Aig_ManNodeNum(p->pManAig);
-        int nNodesEnd = Aig_ManNodeNum(p->pManRes);
-        printf( "Beg = %7d.  End = %7d.  (%6.2f %%)  Try = %7d.  Cuts = %8d.\n", 
-            nNodesBeg, nNodesEnd, 100.0*(nNodesBeg-nNodesEnd)/nNodesBeg,
-            p->nNodesTried, Csw_TableCountCuts( p ) );
-        printf( "Triv0 = %6d.  Triv1 = %6d.  Triv2 = %6d.  Cut-replace = %6d.\n", 
-            p->nNodesTriv0, p->nNodesTriv1, p->nNodesTriv2, p->nNodesCuts );
-        ABC_PRTP( "Cuts    ", p->timeCuts,     p->timeTotal );
-        ABC_PRTP( "Hashing ", p->timeHash,     p->timeTotal );
-        ABC_PRTP( "Other   ", p->timeOther,    p->timeTotal );
-        ABC_PRTP( "TOTAL   ", p->timeTotal,    p->timeTotal );
-    }
-    ABC_FREE( p->puTemp[0] );
-    Aig_MmFixedStop( p->pMemCuts, 0 );
-    ABC_FREE( p->pnRefs );
-    ABC_FREE( p->pEquiv );
-    ABC_FREE( p->pCuts );
-    ABC_FREE( p->pTable );
-    ABC_FREE( p );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/csw/cswTable.c b/src/aig/csw/cswTable.c
deleted file mode 100644
index 9bab0a01..00000000
--- a/src/aig/csw/cswTable.c
+++ /dev/null
@@ -1,166 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cswTable.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Cut sweeping.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - July 11, 2007.]
-
-  Revision    [$Id: cswTable.c,v 1.00 2007/07/11 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Computes hash value of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Csw_CutHash( Csw_Cut_t * pCut )
-{
-    static int s_FPrimes[128] = { 
-        1009, 1049, 1093, 1151, 1201, 1249, 1297, 1361, 1427, 1459, 
-        1499, 1559, 1607, 1657, 1709, 1759, 1823, 1877, 1933, 1997, 
-        2039, 2089, 2141, 2213, 2269, 2311, 2371, 2411, 2467, 2543, 
-        2609, 2663, 2699, 2741, 2797, 2851, 2909, 2969, 3037, 3089, 
-        3169, 3221, 3299, 3331, 3389, 3461, 3517, 3557, 3613, 3671, 
-        3719, 3779, 3847, 3907, 3943, 4013, 4073, 4129, 4201, 4243, 
-        4289, 4363, 4441, 4493, 4549, 4621, 4663, 4729, 4793, 4871, 
-        4933, 4973, 5021, 5087, 5153, 5227, 5281, 5351, 5417, 5471, 
-        5519, 5573, 5651, 5693, 5749, 5821, 5861, 5923, 6011, 6073, 
-        6131, 6199, 6257, 6301, 6353, 6397, 6481, 6563, 6619, 6689, 
-        6737, 6803, 6863, 6917, 6977, 7027, 7109, 7187, 7237, 7309, 
-        7393, 7477, 7523, 7561, 7607, 7681, 7727, 7817, 7877, 7933, 
-        8011, 8039, 8059, 8081, 8093, 8111, 8123, 8147
-    };
-    unsigned uHash;
-    int i;
-    assert( pCut->nFanins <= 16 );
-    uHash = 0;
-    for ( i = 0; i < pCut->nFanins; i++ )
-        uHash ^= pCut->pFanins[i] * s_FPrimes[i];
-    return uHash;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the total number of cuts in the table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Csw_TableCountCuts( Csw_Man_t * p )
-{
-    Csw_Cut_t * pEnt;
-    int i, Counter = 0;
-    for ( i = 0; i < p->nTableSize; i++ )
-        for ( pEnt = p->pTable[i]; pEnt; pEnt = pEnt->pNext )
-            Counter++;
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds the cut to the hash table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Csw_TableCutInsert( Csw_Man_t * p, Csw_Cut_t * pCut )
-{
-    int iEntry = Csw_CutHash(pCut) % p->nTableSize;
-    pCut->pNext = p->pTable[iEntry];
-    p->pTable[iEntry] = pCut;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns an equivalent node if it exists.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Csw_TableCutLookup( Csw_Man_t * p, Csw_Cut_t * pCut )
-{
-    Aig_Obj_t * pRes = NULL;
-    Csw_Cut_t * pEnt;
-    unsigned * pTruthNew, * pTruthOld;
-    int iEntry = Csw_CutHash(pCut) % p->nTableSize;
-    for ( pEnt = p->pTable[iEntry]; pEnt; pEnt = pEnt->pNext )
-    {
-        if ( pEnt->nFanins != pCut->nFanins )
-            continue;
-        if ( pEnt->uSign != pCut->uSign )
-            continue;
-        if ( memcmp( pEnt->pFanins, pCut->pFanins, sizeof(int) * pCut->nFanins ) )
-            continue;
-        pTruthOld = Csw_CutTruth(pEnt);
-        pTruthNew = Csw_CutTruth(pCut);
-        if ( (pTruthOld[0] & 1) == (pTruthNew[0] & 1) )
-        {
-            if ( Kit_TruthIsEqual( pTruthOld, pTruthNew, pCut->nFanins ) )
-            {
-                pRes = Aig_ManObj( p->pManRes, pEnt->iNode );
-                assert( pRes->fPhase == Aig_ManObj( p->pManRes, pCut->iNode )->fPhase );
-                break;
-            }
-        }
-        else
-        {
-            if ( Kit_TruthIsOpposite( pTruthOld, pTruthNew, pCut->nFanins ) )
-            {
-                pRes = Aig_Not( Aig_ManObj( p->pManRes, pEnt->iNode ) );
-                assert( Aig_Regular(pRes)->fPhase != Aig_ManObj( p->pManRes, pCut->iNode )->fPhase );
-                break;
-            }
-        }
-    }
-    return pRes;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/csw/csw_.c b/src/aig/csw/csw_.c
deleted file mode 100644
index c12607d3..00000000
--- a/src/aig/csw/csw_.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [csw_.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Cut sweeping.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - July 11, 2007.]
-
-  Revision    [$Id: csw_.c,v 1.00 2007/07/11 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/csw/module.make b/src/aig/csw/module.make
deleted file mode 100644
index 8fdb7bef..00000000
--- a/src/aig/csw/module.make
+++ /dev/null
@@ -1,4 +0,0 @@
-SRC +=    src/aig/csw/cswCore.c \
-    src/aig/csw/cswCut.c \
-    src/aig/csw/cswMan.c \
-    src/aig/csw/cswTable.c 
diff --git a/src/aig/dar/dar.h b/src/aig/dar/dar.h
deleted file mode 100644
index 0a3b5eb7..00000000
--- a/src/aig/dar/dar.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dar.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: dar.h,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#ifndef __DAR_H__
-#define __DAR_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
- 
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Dar_RwrPar_t_            Dar_RwrPar_t;
-typedef struct Dar_RefPar_t_            Dar_RefPar_t;
-
-struct Dar_RwrPar_t_  
-{
-    int              nCutsMax;       // the maximum number of cuts to try
-    int              nSubgMax;       // the maximum number of subgraphs to try
-    int              fFanout;        // support fanout representation
-    int              fUpdateLevel;   // update level 
-    int              fUseZeros;      // performs zero-cost replacement
-    int              fPower;         // enables power-aware rewriting
-    int              fRecycle;       // enables cut recycling
-    int              fVerbose;       // enables verbose output
-    int              fVeryVerbose;   // enables very verbose output
-};
-
-struct Dar_RefPar_t_  
-{
-    int              nMffcMin;       // the min MFFC size for which refactoring is used
-    int              nLeafMax;       // the max number of leaves of a cut
-    int              nCutsMax;       // the max number of cuts to consider  
-    int              fExtend;        // extends the cut below MFFC
-    int              fUpdateLevel;   // updates the level after each move
-    int              fUseZeros;      // perform zero-cost replacements
-    int              fVerbose;       // verbosity level
-    int              fVeryVerbose;   // enables very verbose output
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                             ITERATORS                            ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== darLib.c ========================================================*/
-extern void            Dar_LibStart();
-extern void            Dar_LibStop();
-extern void            Dar_LibPrepare( int nSubgraphs );
-extern int             Dar_LibReturnClass( unsigned uTruth );
-/*=== darBalance.c ========================================================*/
-extern Aig_Man_t *     Dar_ManBalance( Aig_Man_t * p, int fUpdateLevel );
-extern Aig_Man_t *     Dar_ManBalanceXor( Aig_Man_t * pAig, int fExor, int fUpdateLevel, int fVerbose );
-extern void            Dar_BalancePrintStats( Aig_Man_t * p );
-/*=== darCore.c ========================================================*/
-extern void            Dar_ManDefaultRwrParams( Dar_RwrPar_t * pPars );
-extern int             Dar_ManRewrite( Aig_Man_t * pAig, Dar_RwrPar_t * pPars );
-extern Aig_MmFixed_t * Dar_ManComputeCuts( Aig_Man_t * pAig, int nCutsMax, int fVerbose );
-/*=== darRefact.c ========================================================*/
-extern void            Dar_ManDefaultRefParams( Dar_RefPar_t * pPars );
-extern int             Dar_ManRefactor( Aig_Man_t * pAig, Dar_RefPar_t * pPars );
-/*=== darScript.c ========================================================*/
-extern Aig_Man_t *     Dar_ManRewriteDefault( Aig_Man_t * pAig );
-extern Aig_Man_t *     Dar_ManRwsat( Aig_Man_t * pAig, int fBalance, int fVerbose );
-extern Aig_Man_t *     Dar_ManCompress( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fPower, int fVerbose );
-extern Aig_Man_t *     Dar_ManCompress2( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fFanout, int fPower, int fVerbose );
-extern Aig_Man_t *     Dar_ManChoice( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fConstruct, int nConfMax, int nLevelMax, int fVerbose );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/dar/darBalance.c b/src/aig/dar/darBalance.c
deleted file mode 100644
index 6e9e7e21..00000000
--- a/src/aig/dar/darBalance.c
+++ /dev/null
@@ -1,645 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [darBalance.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    [Algebraic AIG balancing.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: darBalance.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "darInt.h"
-#include "tim.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-//#define USE_LUTSIZE_BALANCE
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the nodes of the supergate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar_BalanceCone_rec( Aig_Obj_t * pRoot, Aig_Obj_t * pObj, Vec_Ptr_t * vSuper )
-{
-    int RetValue1, RetValue2, i;
-    // check if the node is visited
-    if ( Aig_Regular(pObj)->fMarkB )
-    {
-        if ( Aig_ObjIsExor(pRoot) )
-        {
-            assert( !Aig_IsComplement(pObj) );
-            // check if the node occurs in the same polarity
-            Vec_PtrRemove( vSuper, pObj );
-            Aig_Regular(pObj)->fMarkB = 0;
-//printf( " Duplicated EXOR input!!! " );
-            return 1;
-        }
-        else
-        {
-            // check if the node occurs in the same polarity
-            for ( i = 0; i < vSuper->nSize; i++ )
-                if ( vSuper->pArray[i] == pObj )
-                    return 1;
-            // check if the node is present in the opposite polarity
-            for ( i = 0; i < vSuper->nSize; i++ )
-                if ( vSuper->pArray[i] == Aig_Not(pObj) )
-                    return -1;
-        }
-        assert( 0 );
-        return 0;
-    }
-    // if the new node is complemented or a PI, another gate begins
-    if ( pObj != pRoot && (Aig_IsComplement(pObj) || Aig_ObjType(pObj) != Aig_ObjType(pRoot) || Aig_ObjRefs(pObj) > 1 || Vec_PtrSize(vSuper) > 10000) )
-    {
-        Vec_PtrPush( vSuper, pObj );
-        Aig_Regular(pObj)->fMarkB = 1;
-        return 0;
-    }
-    assert( !Aig_IsComplement(pObj) );
-    assert( Aig_ObjIsNode(pObj) );
-    // go through the branches
-    RetValue1 = Dar_BalanceCone_rec( pRoot, Aig_ObjReal_rec( Aig_ObjChild0(pObj) ), vSuper );
-    RetValue2 = Dar_BalanceCone_rec( pRoot, Aig_ObjReal_rec( Aig_ObjChild1(pObj) ), vSuper );
-    if ( RetValue1 == -1 || RetValue2 == -1 )
-        return -1;
-    // return 1 if at least one branch has a duplicate
-    return RetValue1 || RetValue2;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the nodes of the supergate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Dar_BalanceCone( Aig_Obj_t * pObj, Vec_Vec_t * vStore, int Level )
-{
-    Vec_Ptr_t * vNodes;
-    int RetValue, i;
-    assert( !Aig_IsComplement(pObj) );
-    // extend the storage
-    if ( Vec_VecSize( vStore ) <= Level )
-        Vec_VecPush( vStore, Level, 0 );
-    // get the temporary array of nodes
-    vNodes = Vec_VecEntry( vStore, Level );
-    Vec_PtrClear( vNodes );
-    // collect the nodes in the implication supergate
-    RetValue = Dar_BalanceCone_rec( pObj, pObj, vNodes );
-    assert( RetValue != 0 || vNodes->nSize > 1 );
-    // unmark the visited nodes
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-        Aig_Regular(pObj)->fMarkB = 0;
-    // if we found the node and its complement in the same implication supergate, 
-    // return empty set of nodes (meaning that we should use constant-0 node)
-    if ( RetValue == -1 )
-        vNodes->nSize = 0;
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds the left bound on the next candidate to be paired.]
-
-  Description [The nodes in the array are in the decreasing order of levels. 
-  The last node in the array has the smallest level. By default it would be paired 
-  with the next node on the left. However, it may be possible to pair it with some
-  other node on the left, in such a way that the new node is shared. This procedure
-  finds the index of the left-most node, which can be paired with the last node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar_BalanceFindLeft( Vec_Ptr_t * vSuper )
-{
-    Aig_Obj_t * pObjRight, * pObjLeft;
-    int Current;
-    // if two or less nodes, pair with the first
-    if ( Vec_PtrSize(vSuper) < 3 )
-        return 0;
-    // set the pointer to the one before the last
-    Current = Vec_PtrSize(vSuper) - 2;
-    pObjRight = (Aig_Obj_t *)Vec_PtrEntry( vSuper, Current );
-    // go through the nodes to the left of this one
-    for ( Current--; Current >= 0; Current-- )
-    {
-        // get the next node on the left
-        pObjLeft = (Aig_Obj_t *)Vec_PtrEntry( vSuper, Current );
-        // if the level of this node is different, quit the loop
-        if ( Aig_ObjLevel(Aig_Regular(pObjLeft)) != Aig_ObjLevel(Aig_Regular(pObjRight)) )
-            break;
-    }
-    Current++;    
-    // get the node, for which the equality holds
-    pObjLeft = (Aig_Obj_t *)Vec_PtrEntry( vSuper, Current );
-    assert( Aig_ObjLevel(Aig_Regular(pObjLeft)) == Aig_ObjLevel(Aig_Regular(pObjRight)) );
-    return Current;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Moves closer to the end the node that is best for sharing.]
-
-  Description [If there is no node with sharing, randomly chooses one of 
-  the legal nodes.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_BalancePermute( Aig_Man_t * p, Vec_Ptr_t * vSuper, int LeftBound, int fExor )
-{
-    Aig_Obj_t * pObj1, * pObj2, * pObj3, * pGhost;
-    int RightBound, i;
-    // get the right bound
-    RightBound = Vec_PtrSize(vSuper) - 2;
-    assert( LeftBound <= RightBound );
-    if ( LeftBound == RightBound )
-        return;
-    // get the two last nodes
-    pObj1 = (Aig_Obj_t *)Vec_PtrEntry( vSuper, RightBound + 1 );
-    pObj2 = (Aig_Obj_t *)Vec_PtrEntry( vSuper, RightBound     );
-    if ( Aig_Regular(pObj1) == p->pConst1 || Aig_Regular(pObj2) == p->pConst1 || Aig_Regular(pObj1) == Aig_Regular(pObj2) )
-        return;
-    // find the first node that can be shared
-    for ( i = RightBound; i >= LeftBound; i-- )
-    {
-        pObj3 = (Aig_Obj_t *)Vec_PtrEntry( vSuper, i );
-        if ( Aig_Regular(pObj3) == p->pConst1 )
-        {
-            Vec_PtrWriteEntry( vSuper, i,          pObj2 );
-            Vec_PtrWriteEntry( vSuper, RightBound, pObj3 );
-            return;
-        }
-        if ( Aig_Regular(pObj1) == Aig_Regular(pObj3) )
-        {
-            if ( pObj3 == pObj2 )
-                return;
-            Vec_PtrWriteEntry( vSuper, i,          pObj2 );
-            Vec_PtrWriteEntry( vSuper, RightBound, pObj3 );
-            return;
-        }
-        pGhost = Aig_ObjCreateGhost( p, pObj1, pObj3, fExor? AIG_OBJ_EXOR : AIG_OBJ_AND );
-        if ( Aig_TableLookup( p, pGhost ) )
-        {
-            if ( pObj3 == pObj2 )
-                return;
-            Vec_PtrWriteEntry( vSuper, i,          pObj2 );
-            Vec_PtrWriteEntry( vSuper, RightBound, pObj3 );
-            return;
-        }
-    }
-/*
-    // we did not find the node to share, randomize choice
-    {
-        int Choice = Aig_ManRandom(0) % (RightBound - LeftBound + 1);
-        pObj3 = Vec_PtrEntry( vSuper, LeftBound + Choice );
-        if ( pObj3 == pObj2 )
-            return;
-        Vec_PtrWriteEntry( vSuper, LeftBound + Choice, pObj2 );
-        Vec_PtrWriteEntry( vSuper, RightBound,         pObj3 );
-    }
-*/
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Procedure used for sorting the nodes in decreasing order of levels.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Aig_NodeCompareLevelsDecrease( Aig_Obj_t ** pp1, Aig_Obj_t ** pp2 )
-{
-    int Diff = Aig_ObjLevel(Aig_Regular(*pp1)) - Aig_ObjLevel(Aig_Regular(*pp2));
-    if ( Diff > 0 )
-        return -1;
-    if ( Diff < 0 ) 
-        return 1;
-    Diff = Aig_ObjId(Aig_Regular(*pp1)) - Aig_ObjId(Aig_Regular(*pp2));
-    if ( Diff > 0 )
-        return -1;
-    if ( Diff < 0 ) 
-        return 1;
-    return 0; 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts a new node in the order by levels.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_BalancePushUniqueOrderByLevel( Vec_Ptr_t * vStore, Aig_Obj_t * pObj )
-{
-    Aig_Obj_t * pObj1, * pObj2;
-    int i;
-    if ( Vec_PtrPushUnique(vStore, pObj) )
-        return;
-    // find the p of the node
-    for ( i = vStore->nSize-1; i > 0; i-- )
-    {
-        pObj1 = (Aig_Obj_t *)vStore->pArray[i  ];
-        pObj2 = (Aig_Obj_t *)vStore->pArray[i-1];
-        if ( Aig_ObjLevel(Aig_Regular(pObj1)) <= Aig_ObjLevel(Aig_Regular(pObj2)) )
-            break;
-        vStore->pArray[i  ] = pObj2;
-        vStore->pArray[i-1] = pObj1;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Builds implication supergate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Dar_BalanceBuildSuper( Aig_Man_t * p, Vec_Ptr_t * vSuper, Aig_Type_t Type, int fUpdateLevel )
-{
-    Aig_Obj_t * pObj1, * pObj2;
-    int LeftBound;
-    assert( vSuper->nSize > 1 );
-    // sort the new nodes by level in the decreasing order
-    Vec_PtrSort( vSuper, (int (*)(void))Aig_NodeCompareLevelsDecrease );
-    // balance the nodes
-    while ( vSuper->nSize > 1 )
-    {
-        // find the left bound on the node to be paired
-        LeftBound = (!fUpdateLevel)? 0 : Dar_BalanceFindLeft( vSuper );
-        // find the node that can be shared (if no such node, randomize choice)
-        Dar_BalancePermute( p, vSuper, LeftBound, Type == AIG_OBJ_EXOR );
-        // pull out the last two nodes
-        pObj1 = (Aig_Obj_t *)Vec_PtrPop(vSuper);
-        pObj2 = (Aig_Obj_t *)Vec_PtrPop(vSuper);
-        Dar_BalancePushUniqueOrderByLevel( vSuper, Aig_Oper(p, pObj1, pObj2, Type) );
-    }
-    return (Aig_Obj_t *)Vec_PtrEntry(vSuper, 0);
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns affective support size.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Aig_BaseSize( Aig_Man_t * p, Aig_Obj_t * pObj, int nLutSize )
-{
-    int nBaseSize;
-    pObj = Aig_Regular(pObj);
-    if ( Aig_ObjIsConst1(pObj) )
-        return 0;
-    if ( Aig_ObjLevel(pObj) >= nLutSize )
-        return 1;
-    nBaseSize = Aig_SupportSize( p, pObj );
-    if ( nBaseSize >= nLutSize )
-        return 1;
-    return nBaseSize;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Builds implication supergate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Dar_BalanceBuildSuperTop( Aig_Man_t * p, Vec_Ptr_t * vSuper, Aig_Type_t Type, int fUpdateLevel, int nLutSize )
-{
-    Vec_Ptr_t * vSubset;
-    Aig_Obj_t * pObj;
-    int i, nBaseSizeAll, nBaseSize;
-    assert( vSuper->nSize > 1 );
-    // sort the new nodes by level in the decreasing order
-    Vec_PtrSort( vSuper, (int (*)(void))Aig_NodeCompareLevelsDecrease );
-    // add one LUT at a time
-    while ( Vec_PtrSize(vSuper) > 1 )
-    {
-        // isolate the group of nodes with nLutSize inputs
-        nBaseSizeAll = 0;
-        vSubset = Vec_PtrAlloc( nLutSize );
-        Vec_PtrForEachEntryReverse( Aig_Obj_t *, vSuper, pObj, i )
-        {
-            nBaseSize = Aig_BaseSize( p, pObj, nLutSize );
-            if ( nBaseSizeAll + nBaseSize > nLutSize && Vec_PtrSize(vSubset) > 1 )
-                break;
-            nBaseSizeAll += nBaseSize;
-            Vec_PtrPush( vSubset, pObj );
-        }
-        // remove them from vSuper
-        Vec_PtrShrink( vSuper, Vec_PtrSize(vSuper) - Vec_PtrSize(vSubset) );
-        // create the new supergate
-        pObj = Dar_BalanceBuildSuper( p, vSubset, Type, fUpdateLevel );
-        Vec_PtrFree( vSubset );
-        // add the new output
-        Dar_BalancePushUniqueOrderByLevel( vSuper, pObj );
-    }
-    return (Aig_Obj_t *)Vec_PtrEntry(vSuper, 0);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the new node constructed.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Dar_Balance_rec( Aig_Man_t * pNew, Aig_Obj_t * pObjOld, Vec_Vec_t * vStore, int Level, int fUpdateLevel )
-{
-    Aig_Obj_t * pObjNew;
-    Vec_Ptr_t * vSuper;
-    int i;
-    assert( !Aig_IsComplement(pObjOld) );
-    assert( !Aig_ObjIsBuf(pObjOld) );
-    // return if the result is known
-    if ( pObjOld->pData )
-        return (Aig_Obj_t *)pObjOld->pData;
-    assert( Aig_ObjIsNode(pObjOld) );
-    // get the implication supergate
-    vSuper = Dar_BalanceCone( pObjOld, vStore, Level );
-    // check if supergate contains two nodes in the opposite polarity
-    if ( vSuper->nSize == 0 )
-        return (Aig_Obj_t *)(pObjOld->pData = Aig_ManConst0(pNew));
-    if ( vSuper->nSize == 1 )
-        return (Aig_Obj_t *)Vec_PtrEntry(vSuper, 0);
-    if ( Vec_PtrSize(vSuper) < 2 )
-        printf( "Dar_Balance_rec: Internal error!\n" );
-    // for each old node, derive the new well-balanced node
-    for ( i = 0; i < Vec_PtrSize(vSuper); i++ )
-    {
-        pObjNew = Dar_Balance_rec( pNew, Aig_Regular((Aig_Obj_t *)vSuper->pArray[i]), vStore, Level + 1, fUpdateLevel );
-        vSuper->pArray[i] = Aig_NotCond( pObjNew, Aig_IsComplement((Aig_Obj_t *)vSuper->pArray[i]) );
-    }
-    // build the supergate
-#ifdef USE_LUTSIZE_BALANCE
-    pObjNew = Dar_BalanceBuildSuperTop( pNew, vSuper, Aig_ObjType(pObjOld), fUpdateLevel, 6 );
-#else
-    pObjNew = Dar_BalanceBuildSuper( pNew, vSuper, Aig_ObjType(pObjOld), fUpdateLevel );
-#endif
-    // make sure the balanced node is not assigned
-//    assert( pObjOld->Level >= Aig_Regular(pObjNew)->Level );
-    assert( pObjOld->pData == NULL );
-    if ( pNew->pManHaig != NULL )
-    {
-        Aig_Obj_t * pObjNewR = Aig_Regular(pObjNew);
-//        printf( "Balancing HAIG node %d equivalent to HAIG node %d (over = %d).\n", 
-//            pObjNewR->pHaig->Id, pObjOld->pHaig->Id, pObjNewR->pHaig->pHaig != NULL );
-        assert( pObjNewR->pHaig != NULL );
-        assert( !Aig_IsComplement(pObjNewR->pHaig) );
-        assert( pNew->pManHaig->vEquPairs != NULL );
-        Vec_IntPush( pNew->pManHaig->vEquPairs, pObjNewR->pHaig->Id );
-        Vec_IntPush( pNew->pManHaig->vEquPairs, pObjOld->pHaig->Id );
-    }
-    else
-        Aig_Regular(pObjNew)->pHaig = pObjOld->pHaig;
-    return (Aig_Obj_t *)(pObjOld->pData = pObjNew);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs algebraic balancing of the AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dar_ManBalance( Aig_Man_t * p, int fUpdateLevel )
-{
-    Aig_Man_t * pNew;
-    Aig_Obj_t * pObj, * pDriver, * pObjNew;
-    Vec_Vec_t * vStore;
-    int i;
-    assert( Aig_ManVerifyTopoOrder(p) );
-    // create the new manager 
-    pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
-    pNew->nAsserts = p->nAsserts;
-    pNew->nConstrs = p->nConstrs;
-    if ( p->vFlopNums )
-        pNew->vFlopNums = Vec_IntDup( p->vFlopNums );
-    // pass the HAIG manager
-    if ( p->pManHaig != NULL )
-    {
-        pNew->pManHaig = p->pManHaig;  p->pManHaig = NULL;
-        Aig_ManConst1(pNew)->pHaig = Aig_ManConst1(pNew->pManHaig);
-    }
-    // map the PI nodes
-    Aig_ManCleanData( p );
-    Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
-    vStore = Vec_VecAlloc( 50 );
-    if ( p->pManTime != NULL )
-    {
-        float arrTime;
-        Tim_ManIncrementTravId( (Tim_Man_t *)p->pManTime );
-        Aig_ManSetPioNumbers( p );
-        Aig_ManForEachObj( p, pObj, i )
-        {
-            if ( Aig_ObjIsNode(pObj) || Aig_ObjIsConst1(pObj) )
-                continue;
-            if ( Aig_ObjIsPi(pObj) )
-            {
-                // copy the PI
-                pObjNew = Aig_ObjCreatePi(pNew); 
-                pObj->pData = pObjNew;
-                pObjNew->pHaig = pObj->pHaig;
-                // set the arrival time of the new PI
-                arrTime = Tim_ManGetCiArrival( (Tim_Man_t *)p->pManTime, Aig_ObjPioNum(pObj) );
-                pObjNew->Level = (int)arrTime;
-            }
-            else if ( Aig_ObjIsPo(pObj) )
-            {
-                // perform balancing
-                pDriver = Aig_ObjReal_rec( Aig_ObjChild0(pObj) );
-                pObjNew = Dar_Balance_rec( pNew, Aig_Regular(pDriver), vStore, 0, fUpdateLevel );
-                pObjNew = Aig_NotCond( pObjNew, Aig_IsComplement(pDriver) );
-                // save arrival time of the output
-                arrTime = (float)Aig_Regular(pObjNew)->Level;
-                Tim_ManSetCoArrival( (Tim_Man_t *)p->pManTime, Aig_ObjPioNum(pObj), arrTime );
-                // create PO
-                pObjNew = Aig_ObjCreatePo( pNew, pObjNew );
-                pObjNew->pHaig = pObj->pHaig;
-            }
-            else
-                assert( 0 );
-        }
-        Aig_ManCleanPioNumbers( p );
-        pNew->pManTime = Tim_ManDup( (Tim_Man_t *)p->pManTime, 0 );
-    }
-    else
-    {
-        Aig_ManForEachPi( p, pObj, i )
-        {
-            pObjNew = Aig_ObjCreatePi(pNew); 
-            pObjNew->Level = pObj->Level;
-            pObj->pData = pObjNew;
-            pObjNew->pHaig = pObj->pHaig;
-        }
-        Aig_ManForEachPo( p, pObj, i )
-        {
-            pDriver = Aig_ObjReal_rec( Aig_ObjChild0(pObj) );
-            pObjNew = Dar_Balance_rec( pNew, Aig_Regular(pDriver), vStore, 0, fUpdateLevel );
-            pObjNew = Aig_NotCond( pObjNew, Aig_IsComplement(pDriver) );
-            pObjNew = Aig_ObjCreatePo( pNew, pObjNew );
-            pObjNew->pHaig = pObj->pHaig;
-        }
-    }
-    Vec_VecFree( vStore );
-    // remove dangling nodes
-    Aig_ManCleanup( pNew );
-    Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
-    // check the resulting AIG
-    if ( !Aig_ManCheck(pNew) )
-        printf( "Dar_ManBalance(): The check has failed.\n" );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reproduces script "compress2".]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dar_ManBalanceXor( Aig_Man_t * pAig, int fExor, int fUpdateLevel, int fVerbose )
-{
-    Aig_Man_t * pAigXor, * pRes;
-    if ( fExor )
-    {
-        pAigXor = Aig_ManDupExor( pAig );
-        if ( fVerbose )
-            Dar_BalancePrintStats( pAigXor );
-        pRes = Dar_ManBalance( pAigXor, fUpdateLevel );
-        Aig_ManStop( pAigXor );
-    }
-    else
-    {
-        pRes = Dar_ManBalance( pAig, fUpdateLevel );
-    }
-    return pRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts a new node in the order by levels.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_BalancePrintStats( Aig_Man_t * p )
-{
-    Vec_Ptr_t * vSuper;
-    Aig_Obj_t * pObj, * pTemp;
-    int i, k;
-    if ( Aig_ManExorNum(p) == 0 )
-    {
-        printf( "There is no EXOR gates.\n" );
-        return;
-    }
-    Aig_ManForEachExor( p, pObj, i )
-    {
-        Aig_ObjFanin0(pObj)->fMarkA = 1;
-        Aig_ObjFanin1(pObj)->fMarkA = 1;
-        assert( !Aig_ObjFaninC0(pObj) );
-        assert( !Aig_ObjFaninC1(pObj) );
-    }
-    vSuper = Vec_PtrAlloc( 1000 );
-    Aig_ManForEachExor( p, pObj, i )
-    {
-        if ( pObj->fMarkA && pObj->nRefs == 1 )
-            continue;
-        Vec_PtrClear( vSuper );
-        Dar_BalanceCone_rec( pObj, pObj, vSuper );
-        Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pTemp, k )
-            pTemp->fMarkB = 0;
-        if ( Vec_PtrSize(vSuper) < 3 )
-            continue;
-        printf( "  %d(", Vec_PtrSize(vSuper) );
-        Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pTemp, k )
-            printf( " %d", pTemp->Level );
-        printf( " )" );
-    }
-    Vec_PtrFree( vSuper );
-    Aig_ManForEachObj( p, pObj, i )
-        pObj->fMarkA = 0;
-    printf( "\n" );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dar/darCore.c b/src/aig/dar/darCore.c
deleted file mode 100644
index 6ca3082d..00000000
--- a/src/aig/dar/darCore.c
+++ /dev/null
@@ -1,344 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [darCore.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    [Core of the rewriting package.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: darCore.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "darInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// iterator over the nodes in the topological order
-#define Aig_ManForEachNodeInOrder( p, pObj )                                    \
-    for ( assert(p->pOrderData), p->iPrev = 0, p->iNext = p->pOrderData[1];     \
-          p->iNext && (((pObj) = Aig_ManObj(p, p->iNext)), 1);                  \
-          p->iNext = p->pOrderData[2*p->iPrev+1] )
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the structure with default assignment of parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_ManDefaultRwrParams( Dar_RwrPar_t * pPars )
-{
-    memset( pPars, 0, sizeof(Dar_RwrPar_t) );
-    pPars->nCutsMax     =  8; // 8
-    pPars->nSubgMax     =  5; // 5 is a "magic number"
-    pPars->fFanout      =  1;
-    pPars->fUpdateLevel =  0;
-    pPars->fUseZeros    =  0;
-    pPars->fPower       =  0;
-    pPars->fRecycle     =  1;
-    pPars->fVerbose     =  0;
-    pPars->fVeryVerbose =  0;
-}
-
-#define MAX_VAL 10
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar_ManRewrite( Aig_Man_t * pAig, Dar_RwrPar_t * pPars )
-{
-    extern Vec_Int_t * Saig_ManComputeSwitchProbs( Aig_Man_t * p, int nFrames, int nPref, int fProbOne );
-    Dar_Man_t * p;
-//    Bar_Progress_t * pProgress;
-    Dar_Cut_t * pCut;
-    Aig_Obj_t * pObj, * pObjNew;
-    int i, k, nNodesOld, nNodeBefore, nNodeAfter, Required;
-    int clk = 0, clkStart, Counter = 0;
-    int nMffcSize, nMffcGains[MAX_VAL+1][MAX_VAL+1] = {{0}};
-    // prepare the library
-    Dar_LibPrepare( pPars->nSubgMax ); 
-    // create rewriting manager
-    p = Dar_ManStart( pAig, pPars );
-    if ( pPars->fPower )
-        pAig->vProbs = Saig_ManComputeSwitchProbs( pAig, 48, 16, 1 );
-    // remove dangling nodes
-    Aig_ManCleanup( pAig );
-    // if updating levels is requested, start fanout and timing
-    if ( p->pPars->fFanout )
-        Aig_ManFanoutStart( pAig );
-    if ( p->pPars->fUpdateLevel )
-        Aig_ManStartReverseLevels( pAig, 0 );
-    // set elementary cuts for the PIs
-//    Dar_ManCutsStart( p );
-    // resynthesize each node once
-    clkStart = clock();
-    p->nNodesInit = Aig_ManNodeNum(pAig);
-    nNodesOld = Vec_PtrSize( pAig->vObjs );
-
-//    pProgress = Bar_ProgressStart( stdout, nNodesOld );
-    Aig_ManForEachObj( pAig, pObj, i )
-//    pProgress = Bar_ProgressStart( stdout, 100 );
-//    Aig_ManOrderStart( pAig );
-//    Aig_ManForEachNodeInOrder( pAig, pObj )
-    {
-//        Bar_ProgressUpdate( pProgress, 100*pAig->nAndPrev/pAig->nAndTotal, NULL );
-//        Bar_ProgressUpdate( pProgress, i, NULL );
-        if ( !Aig_ObjIsNode(pObj) )
-            continue;
-        if ( i > nNodesOld )
-//        if ( p->pPars->fUseZeros && i > nNodesOld )
-            break;
-        if ( pPars->fRecycle && ++Counter % 50000 == 0 && Aig_DagSize(pObj) < Vec_PtrSize(p->vCutNodes)/100 )
-        {
-//            printf( "Counter = %7d.  Node = %7d.  Dag = %5d. Vec = %5d.\n", 
-//                Counter, i, Aig_DagSize(pObj), Vec_PtrSize(p->vCutNodes) );
-//            fflush( stdout );
-            Dar_ManCutsRestart( p, pObj );
-        }
-
-        // consider freeing the cuts
-//        if ( (i & 0xFFF) == 0 && Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20) > 100 )
-//            Dar_ManCutsStart( p );
-
-        // compute cuts for the node
-        p->nNodesTried++;
-clk = clock();
-        Dar_ObjSetCuts( pObj, NULL );
-        Dar_ObjComputeCuts_rec( p, pObj );
-p->timeCuts += clock() - clk;
-
-        // check if there is a trivial cut
-        Dar_ObjForEachCut( pObj, pCut, k )
-            if ( pCut->nLeaves == 0 || (pCut->nLeaves == 1 && pCut->pLeaves[0] != pObj->Id && Aig_ManObj(p->pAig, pCut->pLeaves[0])) )
-                break;
-        if ( k < (int)pObj->nCuts )
-        {
-            assert( pCut->nLeaves < 2 );
-            if ( pCut->nLeaves == 0 ) // replace by constant
-            {
-                assert( pCut->uTruth == 0 || pCut->uTruth == 0xFFFF );
-                pObjNew = Aig_NotCond( Aig_ManConst1(p->pAig), pCut->uTruth==0 );
-            }
-            else
-            {
-                assert( pCut->uTruth == 0xAAAA || pCut->uTruth == 0x5555 );
-                pObjNew = Aig_NotCond( Aig_ManObj(p->pAig, pCut->pLeaves[0]), pCut->uTruth==0x5555 );
-            }
-            // remove the old cuts
-            Dar_ObjSetCuts( pObj, NULL );
-            // replace the node
-            Aig_ObjReplace( pAig, pObj, pObjNew, p->pPars->fUpdateLevel );
-            continue;
-        }
-
-        // evaluate the cuts
-        p->GainBest = -1;
-        nMffcSize   = -1;
-        Required    = pAig->vLevelR? Aig_ObjRequiredLevel(pAig, pObj) : ABC_INFINITY;
-        Dar_ObjForEachCut( pObj, pCut, k )
-        {
-            int nLeavesOld = pCut->nLeaves;
-            if ( pCut->nLeaves == 3 )
-                pCut->pLeaves[pCut->nLeaves++] = 0;
-            Dar_LibEval( p, pObj, pCut, Required, &nMffcSize );
-            pCut->nLeaves = nLeavesOld; 
-        }
-        // check the best gain
-        if ( !(p->GainBest > 0 || (p->GainBest == 0 && p->pPars->fUseZeros)) )
-        {
-//            Aig_ObjOrderAdvance( pAig );
-            continue;
-        }
-//        nMffcGains[p->GainBest < MAX_VAL ? p->GainBest : MAX_VAL][nMffcSize < MAX_VAL ? nMffcSize : MAX_VAL]++;
-        // remove the old cuts
-        Dar_ObjSetCuts( pObj, NULL );
-        // if we end up here, a rewriting step is accepted
-        nNodeBefore = Aig_ManNodeNum( pAig );
-        pObjNew = Dar_LibBuildBest( p ); // pObjNew can be complemented!
-        pObjNew = Aig_NotCond( pObjNew, Aig_ObjPhaseReal(pObjNew) ^ pObj->fPhase );
-        assert( (int)Aig_Regular(pObjNew)->Level <= Required );
-        // replace the node
-        Aig_ObjReplace( pAig, pObj, pObjNew, p->pPars->fUpdateLevel );
-        // compare the gains
-        nNodeAfter = Aig_ManNodeNum( pAig );
-        assert( p->GainBest <= nNodeBefore - nNodeAfter );
-        // count gains of this class
-        p->ClassGains[p->ClassBest] += nNodeBefore - nNodeAfter;
-    }
-//    Aig_ManOrderStop( pAig );
-/*
-    printf( "Distribution of gain (row) by MFFC size (column) %s 0-costs:\n", p->pPars->fUseZeros? "with":"without" );
-    for ( k = 0; k <= MAX_VAL; k++ )
-        printf( "<%4d> ", k );
-    printf( "\n" );
-    for ( i = 0; i <= MAX_VAL; i++ )
-    {
-        for ( k = 0; k <= MAX_VAL; k++ )
-            printf( "%6d ", nMffcGains[i][k] );
-        printf( "\n" );
-    }
-*/
-
-p->timeTotal = clock() - clkStart;
-p->timeOther = p->timeTotal - p->timeCuts - p->timeEval;
-
-//    Bar_ProgressStop( pProgress );
-    Dar_ManCutsFree( p );
-    // put the nodes into the DFS order and reassign their IDs
-//    Aig_NtkReassignIds( p );
-    // fix the levels
-//    Aig_ManVerifyLevel( pAig );
-    if ( p->pPars->fFanout )
-        Aig_ManFanoutStop( pAig );
-    if ( p->pPars->fUpdateLevel )
-    {
-//        Aig_ManVerifyReverseLevel( pAig );
-        Aig_ManStopReverseLevels( pAig );
-    }
-    if ( pAig->vProbs )
-    {
-        Vec_IntFree( pAig->vProbs );
-        pAig->vProbs = NULL;
-    }
-    // stop the rewriting manager
-    Dar_ManStop( p );
-    Aig_ManCheckPhase( pAig );
-    // check
-    if ( !Aig_ManCheck( pAig ) )
-    {
-        printf( "Aig_ManRewrite: The network check has failed.\n" );
-        return 0;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the total number of cuts.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar_ManCutCount( Aig_Man_t * pAig, int * pnCutsK )
-{
-    Dar_Cut_t * pCut;
-    Aig_Obj_t * pObj;
-    int i, k, nCuts = 0, nCutsK = 0;
-    Aig_ManForEachNode( pAig, pObj, i )
-        Dar_ObjForEachCut( pObj, pCut, k )
-        {
-            nCuts++;
-            if ( pCut->nLeaves == 4 )
-                nCutsK++;
-        }
-    if ( pnCutsK )
-        *pnCutsK = nCutsK;
-    return nCuts;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_MmFixed_t * Dar_ManComputeCuts( Aig_Man_t * pAig, int nCutsMax, int fVerbose )
-{
-    Dar_Man_t * p;
-    Dar_RwrPar_t Pars, * pPars = &Pars; 
-    Aig_Obj_t * pObj;
-    Aig_MmFixed_t * pMemCuts;
-    int i, nNodes, clk = clock();
-    // remove dangling nodes
-    if ( (nNodes = Aig_ManCleanup( pAig )) )
-    {
-//        printf( "Removing %d nodes.\n", nNodes );
-    }
-    // create default parameters
-    Dar_ManDefaultRwrParams( pPars );
-    pPars->nCutsMax = nCutsMax;
-    // create rewriting manager
-    p = Dar_ManStart( pAig, pPars );
-    // set elementary cuts for the PIs
-//    Dar_ManCutsStart( p );
-    Aig_MmFixedRestart( p->pMemCuts );
-    Dar_ObjPrepareCuts( p, Aig_ManConst1(p->pAig) );
-    Aig_ManForEachPi( pAig, pObj, i )
-        Dar_ObjPrepareCuts( p, pObj );
-    // compute cuts for each nodes in the topological order
-    Aig_ManForEachNode( pAig, pObj, i )
-        Dar_ObjComputeCuts( p, pObj );
-    // print verbose stats
-    if ( fVerbose )
-    {
-//        Aig_Obj_t * pObj;
-        int nCuts, nCutsK;//, i;
-        nCuts = Dar_ManCutCount( pAig, &nCutsK );
-        printf( "Nodes = %6d. Total cuts = %6d. 4-input cuts = %6d.\n",
-            Aig_ManObjNum(pAig), nCuts, nCutsK );
-        printf( "Cut size = %2d. Truth size = %2d. Total mem = %5.2f Mb  ",
-            (int)sizeof(Dar_Cut_t), (int)4, 1.0*Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20) );
-        ABC_PRT( "Runtime", clock() - clk );
-/*
-        Aig_ManForEachNode( pAig, pObj, i )
-            if ( i % 300 == 0 )
-                Dar_ObjCutPrint( pAig, pObj );
-*/
-    }
-    // free the cuts
-    pMemCuts = p->pMemCuts;
-    p->pMemCuts = NULL;
-//    Dar_ManCutsFree( p );
-    // stop the rewriting manager
-    Dar_ManStop( p );
-    return pMemCuts;
-}
-
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dar/darCut.c b/src/aig/dar/darCut.c
deleted file mode 100644
index b272b388..00000000
--- a/src/aig/dar/darCut.c
+++ /dev/null
@@ -1,752 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [darCut.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    [Computation of 4-input cuts.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: darCut.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "darInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Prints one cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_CutPrint( Dar_Cut_t * pCut )
-{
-    unsigned i;
-    printf( "{" );
-    for ( i = 0; i < pCut->nLeaves; i++ )
-        printf( " %d", pCut->pLeaves[i] );
-    printf( " }\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints one cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_ObjCutPrint( Aig_Man_t * p, Aig_Obj_t * pObj )
-{
-    Dar_Cut_t * pCut;
-    int i;
-    printf( "Cuts for node %d:\n", pObj->Id );
-    Dar_ObjForEachCut( pObj, pCut, i )
-        Dar_CutPrint( pCut );
-//    printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of 1s in the machine word.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dar_WordCountOnes( unsigned uWord )
-{
-    uWord = (uWord & 0x55555555) + ((uWord>>1) & 0x55555555);
-    uWord = (uWord & 0x33333333) + ((uWord>>2) & 0x33333333);
-    uWord = (uWord & 0x0F0F0F0F) + ((uWord>>4) & 0x0F0F0F0F);
-    uWord = (uWord & 0x00FF00FF) + ((uWord>>8) & 0x00FF00FF);
-    return  (uWord & 0x0000FFFF) + (uWord>>16);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compute the cost of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dar_CutFindValue( Dar_Man_t * p, Dar_Cut_t * pCut )
-{
-    Aig_Obj_t * pLeaf;
-    int i, Value, nOnes;
-    assert( pCut->fUsed );
-    Value = 0;
-    nOnes = 0;
-    Dar_CutForEachLeaf( p->pAig, pCut, pLeaf, i )
-    {
-        if ( pLeaf == NULL )
-            return 0;
-        assert( pLeaf != NULL );
-        Value += pLeaf->nRefs;
-        nOnes += (pLeaf->nRefs == 1);
-    }
-    if ( pCut->nLeaves < 2 )
-        return 1001;
-//    Value = Value * 100 / pCut->nLeaves;
-    if ( Value > 1000 )
-        Value = 1000;
-    if ( nOnes > 3 )
-        Value = 5 - nOnes;
-    return Value;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the next free cut to use.]
-
-  Description [Uses the cut with the smallest value.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dar_Cut_t * Dar_CutFindFree( Dar_Man_t * p, Aig_Obj_t * pObj )
-{
-    Dar_Cut_t * pCut, * pCutMax;
-    int i;
-    pCutMax = NULL;
-    Dar_ObjForEachCutAll( pObj, pCut, i )
-    {
-        if ( pCut->fUsed == 0 )
-            return pCut;
-        if ( pCut->nLeaves < 3 )
-            continue;
-        if ( pCutMax == NULL || pCutMax->Value > pCut->Value )
-            pCutMax = pCut;
-    }
-    if ( pCutMax == NULL )
-    {
-        Dar_ObjForEachCutAll( pObj, pCut, i )
-        {
-            if ( pCut->nLeaves < 2 )
-                continue;
-            if ( pCutMax == NULL || pCutMax->Value > pCut->Value )
-                pCutMax = pCut;
-        }
-    }
-    if ( pCutMax == NULL )
-    {
-        Dar_ObjForEachCutAll( pObj, pCut, i )
-        {
-            if ( pCutMax == NULL || pCutMax->Value > pCut->Value )
-                pCutMax = pCut;
-        }
-    }
-    assert( pCutMax != NULL );
-    pCutMax->fUsed = 0;
-    return pCutMax;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if pDom is contained in pCut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dar_CutCheckDominance( Dar_Cut_t * pDom, Dar_Cut_t * pCut )
-{
-    int i, k;
-    assert( pDom->fUsed && pCut->fUsed );
-    for ( i = 0; i < (int)pDom->nLeaves; i++ )
-    {
-        for ( k = 0; k < (int)pCut->nLeaves; k++ )
-            if ( pDom->pLeaves[i] == pCut->pLeaves[k] )
-                break;
-        if ( k == (int)pCut->nLeaves ) // node i in pDom is not contained in pCut
-            return 0;
-    }
-    // every node in pDom is contained in pCut
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the cut is contained.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dar_CutFilter( Aig_Obj_t * pObj, Dar_Cut_t * pCut )
-{ 
-    Dar_Cut_t * pTemp;
-    int i;
-    assert( pCut->fUsed );
-    // go through the cuts of the node
-    Dar_ObjForEachCut( pObj, pTemp, i )
-    {
-        if ( pTemp == pCut )
-            continue;
-        if ( pTemp->nLeaves > pCut->nLeaves )
-        {
-            // skip the non-contained cuts
-            if ( (pTemp->uSign & pCut->uSign) != pCut->uSign )
-                continue;
-            // check containment seriously
-            if ( Dar_CutCheckDominance( pCut, pTemp ) )
-            {
-                // remove contained cut
-                pTemp->fUsed = 0;
-            }
-         }
-        else
-        {
-            // skip the non-contained cuts
-            if ( (pTemp->uSign & pCut->uSign) != pTemp->uSign )
-                continue;
-            // check containment seriously
-            if ( Dar_CutCheckDominance( pTemp, pCut ) )
-            {
-                // remove the given cut
-                pCut->fUsed = 0;
-                return 1;
-            }
-        }
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Merges two cuts.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dar_CutMergeOrdered( Dar_Cut_t * pC, Dar_Cut_t * pC0, Dar_Cut_t * pC1 )
-{ 
-    int i, k, c;
-    assert( pC0->nLeaves >= pC1->nLeaves );
-
-    // the case of the largest cut sizes
-    if ( pC0->nLeaves == 4 && pC1->nLeaves == 4 )
-    {
-        if ( pC0->uSign != pC1->uSign )
-            return 0;
-        for ( i = 0; i < (int)pC0->nLeaves; i++ )
-            if ( pC0->pLeaves[i] != pC1->pLeaves[i] )
-                return 0;
-        for ( i = 0; i < (int)pC0->nLeaves; i++ )
-            pC->pLeaves[i] = pC0->pLeaves[i];
-        pC->nLeaves = pC0->nLeaves;
-        return 1;
-    }
-
-    // the case when one of the cuts is the largest
-    if ( pC0->nLeaves == 4 )
-    {
-        if ( (pC0->uSign & pC1->uSign) != pC1->uSign )
-            return 0;
-        for ( i = 0; i < (int)pC1->nLeaves; i++ )
-        {
-            for ( k = (int)pC0->nLeaves - 1; k >= 0; k-- )
-                if ( pC0->pLeaves[k] == pC1->pLeaves[i] )
-                    break;
-            if ( k == -1 ) // did not find
-                return 0;
-        }
-        for ( i = 0; i < (int)pC0->nLeaves; i++ )
-            pC->pLeaves[i] = pC0->pLeaves[i];
-        pC->nLeaves = pC0->nLeaves;
-        return 1;
-    }
-
-    // compare two cuts with different numbers
-    i = k = 0;
-    for ( c = 0; c < 4; c++ )
-    {
-        if ( k == (int)pC1->nLeaves )
-        {
-            if ( i == (int)pC0->nLeaves )
-            {
-                pC->nLeaves = c;
-                return 1;
-            }
-            pC->pLeaves[c] = pC0->pLeaves[i++];
-            continue;
-        }
-        if ( i == (int)pC0->nLeaves )
-        {
-            if ( k == (int)pC1->nLeaves )
-            {
-                pC->nLeaves = c;
-                return 1;
-            }
-            pC->pLeaves[c] = pC1->pLeaves[k++];
-            continue;
-        }
-        if ( pC0->pLeaves[i] < pC1->pLeaves[k] )
-        {
-            pC->pLeaves[c] = pC0->pLeaves[i++];
-            continue;
-        }
-        if ( pC0->pLeaves[i] > pC1->pLeaves[k] )
-        {
-            pC->pLeaves[c] = pC1->pLeaves[k++];
-            continue;
-        }
-        pC->pLeaves[c] = pC0->pLeaves[i++]; 
-        k++;
-    }
-    if ( i < (int)pC0->nLeaves || k < (int)pC1->nLeaves )
-        return 0;
-    pC->nLeaves = c;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares the object for FPGA mapping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dar_CutMerge( Dar_Cut_t * pCut, Dar_Cut_t * pCut0, Dar_Cut_t * pCut1 )
-{ 
-    assert( !pCut->fUsed );
-    // merge the nodes
-    if ( pCut0->nLeaves <= pCut1->nLeaves )
-    {
-        if ( !Dar_CutMergeOrdered( pCut, pCut1, pCut0 ) )
-            return 0;
-    }
-    else
-    {
-        if ( !Dar_CutMergeOrdered( pCut, pCut0, pCut1 ) )
-            return 0;
-    }
-    pCut->uSign = pCut0->uSign | pCut1->uSign;
-    pCut->fUsed = 1;
-    return 1;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the stretching phase of the cut w.r.t. the merged cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline unsigned Dar_CutTruthPhase( Dar_Cut_t * pCut, Dar_Cut_t * pCut1 )
-{
-    unsigned uPhase = 0;
-    int i, k;
-    for ( i = k = 0; i < (int)pCut->nLeaves; i++ )
-    {
-        if ( k == (int)pCut1->nLeaves )
-            break;
-        if ( pCut->pLeaves[i] < pCut1->pLeaves[k] )
-            continue;
-        assert( pCut->pLeaves[i] == pCut1->pLeaves[k] );
-        uPhase |= (1 << i);
-        k++;
-    }
-    return uPhase;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Swaps two advancent variables of the truth table.]
-
-  Description [Swaps variable iVar and iVar+1.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline unsigned Dar_CutTruthSwapAdjacentVars( unsigned uTruth, int iVar )
-{
-    assert( iVar >= 0 && iVar <= 2 );
-    if ( iVar == 0 )
-        return (uTruth & 0x99999999) | ((uTruth & 0x22222222) << 1) | ((uTruth & 0x44444444) >> 1);
-    if ( iVar == 1 )
-        return (uTruth & 0xC3C3C3C3) | ((uTruth & 0x0C0C0C0C) << 2) | ((uTruth & 0x30303030) >> 2);
-    if ( iVar == 2 )
-        return (uTruth & 0xF00FF00F) | ((uTruth & 0x00F000F0) << 4) | ((uTruth & 0x0F000F00) >> 4);
-    assert( 0 );
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Expands the truth table according to the phase.]
-
-  Description [The input and output truth tables are in pIn/pOut. The current number
-  of variables is nVars. The total number of variables in nVarsAll. The last argument
-  (Phase) contains shows where the variables should go.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline unsigned Dar_CutTruthStretch( unsigned uTruth, int nVars, unsigned Phase )
-{
-    int i, k, Var = nVars - 1;
-    for ( i = 3; i >= 0; i-- )
-        if ( Phase & (1 << i) )
-        {
-            for ( k = Var; k < i; k++ )
-                uTruth = Dar_CutTruthSwapAdjacentVars( uTruth, k );
-            Var--;
-        }
-    assert( Var == -1 );
-    return uTruth;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Shrinks the truth table according to the phase.]
-
-  Description [The input and output truth tables are in pIn/pOut. The current number
-  of variables is nVars. The total number of variables in nVarsAll. The last argument
-  (Phase) contains shows what variables should remain.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline unsigned Dar_CutTruthShrink( unsigned uTruth, int nVars, unsigned Phase )
-{
-    int i, k, Var = 0;
-    for ( i = 0; i < 4; i++ )
-        if ( Phase & (1 << i) )
-        {
-            for ( k = i-1; k >= Var; k-- )
-                uTruth = Dar_CutTruthSwapAdjacentVars( uTruth, k );
-            Var++;
-        }
-    return uTruth;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs truth table computation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline unsigned Dar_CutTruth( Dar_Cut_t * pCut, Dar_Cut_t * pCut0, Dar_Cut_t * pCut1, int fCompl0, int fCompl1 )
-{
-    unsigned uTruth0 = fCompl0 ? ~pCut0->uTruth : pCut0->uTruth;
-    unsigned uTruth1 = fCompl1 ? ~pCut1->uTruth : pCut1->uTruth;
-    uTruth0 = Dar_CutTruthStretch( uTruth0, pCut0->nLeaves, Dar_CutTruthPhase(pCut, pCut0) );
-    uTruth1 = Dar_CutTruthStretch( uTruth1, pCut1->nLeaves, Dar_CutTruthPhase(pCut, pCut1) );
-    return uTruth0 & uTruth1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Minimize support of the cut.]
-
-  Description [Returns 1 if the node's support has changed]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dar_CutSuppMinimize( Dar_Cut_t * pCut )
-{
-    unsigned uMasks[4][2] = {
-        { 0x5555, 0xAAAA },
-        { 0x3333, 0xCCCC },
-        { 0x0F0F, 0xF0F0 },
-        { 0x00FF, 0xFF00 }
-    };
-    unsigned uPhase = 0, uTruth = 0xFFFF & pCut->uTruth;
-    int i, k, nLeaves;
-    assert( pCut->fUsed );
-    // compute the support of the cut's function
-    nLeaves = pCut->nLeaves;
-    for ( i = 0; i < (int)pCut->nLeaves; i++ )
-        if ( (uTruth & uMasks[i][0]) == ((uTruth & uMasks[i][1]) >> (1 << i)) )
-            nLeaves--;
-        else
-            uPhase |= (1 << i);
-    if ( nLeaves == (int)pCut->nLeaves )
-        return 0;
-    // shrink the truth table
-    uTruth = Dar_CutTruthShrink( uTruth, pCut->nLeaves, uPhase );
-    pCut->uTruth = 0xFFFF & uTruth;
-    // update leaves and signature
-    pCut->uSign = 0;
-    for ( i = k = 0; i < (int)pCut->nLeaves; i++ )
-    {
-        if ( !(uPhase & (1 << i)) )
-            continue;    
-        pCut->pLeaves[k++] = pCut->pLeaves[i];
-        pCut->uSign |= Aig_ObjCutSign( pCut->pLeaves[i] );
-    }
-    assert( k == nLeaves );
-    pCut->nLeaves = nLeaves;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_ManCutsFree( Dar_Man_t * p )
-{
-    if ( p->pMemCuts == NULL )
-        return;
-    Aig_MmFixedStop( p->pMemCuts, 0 );
-    p->pMemCuts = NULL;
-//    Aig_ManCleanData( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Dar_Cut_t * Dar_ObjPrepareCuts( Dar_Man_t * p, Aig_Obj_t * pObj )
-{
-    Dar_Cut_t * pCutSet, * pCut;
-    int i;
-    assert( Dar_ObjCuts(pObj) == NULL );
-    pObj->nCuts = p->pPars->nCutsMax;
-    // create the cutset of the node
-    pCutSet = (Dar_Cut_t *)Aig_MmFixedEntryFetch( p->pMemCuts );
-    memset( pCutSet, 0, p->pPars->nCutsMax * sizeof(Dar_Cut_t) );
-    Dar_ObjSetCuts( pObj, pCutSet );
-    Dar_ObjForEachCutAll( pObj, pCut, i )
-        pCut->fUsed = 0;
-    Vec_PtrPush( p->vCutNodes, pObj );
-    // add unit cut if needed
-    pCut = pCutSet;
-    pCut->fUsed = 1;
-    if ( Aig_ObjIsConst1(pObj) )
-    {
-        pCut->nLeaves = 0;
-        pCut->uSign = 0;
-        pCut->uTruth = 0xFFFF;
-    }
-    else
-    {
-        pCut->nLeaves = 1;
-        pCut->pLeaves[0] = pObj->Id;
-        pCut->uSign = Aig_ObjCutSign( pObj->Id );
-        pCut->uTruth = 0xAAAA;
-    }
-    pCut->Value = Dar_CutFindValue( p, pCut );
-    if ( p->nCutMemUsed < Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20) )
-        p->nCutMemUsed = Aig_MmFixedReadMemUsage(p->pMemCuts)/(1<<20);
-    return pCutSet;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_ManCutsRestart( Dar_Man_t * p, Aig_Obj_t * pRoot )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Dar_ObjSetCuts( Aig_ManConst1(p->pAig), NULL );
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vCutNodes, pObj, i )
-        if ( !Aig_ObjIsNone(pObj) )
-            Dar_ObjSetCuts( pObj, NULL );
-    Vec_PtrClear( p->vCutNodes );
-    Aig_MmFixedRestart( p->pMemCuts );
-    Dar_ObjPrepareCuts( p, Aig_ManConst1(p->pAig) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Dar_Cut_t * Dar_ObjComputeCuts( Dar_Man_t * p, Aig_Obj_t * pObj )
-{
-    Aig_Obj_t * pFanin0 = Aig_ObjReal_rec( Aig_ObjChild0(pObj) );
-    Aig_Obj_t * pFanin1 = Aig_ObjReal_rec( Aig_ObjChild1(pObj) );
-    Aig_Obj_t * pFaninR0 = Aig_Regular(pFanin0);
-    Aig_Obj_t * pFaninR1 = Aig_Regular(pFanin1);
-    Dar_Cut_t * pCutSet, * pCut0, * pCut1, * pCut;
-    int i, k, RetValue; 
-
-    assert( !Aig_IsComplement(pObj) );
-    assert( Aig_ObjIsNode(pObj) );
-    assert( Dar_ObjCuts(pObj) == NULL );
-    assert( Dar_ObjCuts(pFaninR0) != NULL );
-    assert( Dar_ObjCuts(pFaninR1) != NULL );
-
-    // set up the first cut
-    pCutSet = Dar_ObjPrepareCuts( p, pObj );
-    // make sure fanins cuts are computed
-    Dar_ObjForEachCut( pFaninR0, pCut0, i )
-    Dar_ObjForEachCut( pFaninR1, pCut1, k )
-    {
-        p->nCutsAll++;
-        // make sure K-feasible cut exists
-        if ( Dar_WordCountOnes(pCut0->uSign | pCut1->uSign) > 4 )
-            continue;
-        // get the next cut of this node
-        pCut = Dar_CutFindFree( p, pObj );
-        // create the new cut
-        if ( !Dar_CutMerge( pCut, pCut0, pCut1 ) )
-        {
-            assert( !pCut->fUsed );
-            continue;
-        }
-        p->nCutsTried++;
-        // check dominance
-        if ( Dar_CutFilter( pObj, pCut ) )
-        {
-            assert( !pCut->fUsed );
-            continue;
-        }
-        // compute truth table
-        pCut->uTruth = 0xFFFF & Dar_CutTruth( pCut, pCut0, pCut1, Aig_IsComplement(pFanin0), Aig_IsComplement(pFanin1) );
-
-        // minimize support of the cut
-        if ( Dar_CutSuppMinimize( pCut ) )
-        {
-            RetValue = Dar_CutFilter( pObj, pCut );
-            assert( !RetValue );
-        }
-
-        // assign the value of the cut
-        pCut->Value = Dar_CutFindValue( p, pCut );
-        // if the cut contains removed node, do not use it
-        if ( pCut->Value == 0 )
-        {
-            p->nCutsSkipped++;
-            pCut->fUsed = 0;
-        }
-        else if ( pCut->nLeaves < 2 )
-            return pCutSet;
-    }
-    // count the number of nontrivial cuts cuts
-    Dar_ObjForEachCut( pObj, pCut, i )
-        p->nCutsUsed += pCut->fUsed;
-    // discount trivial cut
-    p->nCutsUsed--;
-    return pCutSet;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Dar_Cut_t * Dar_ObjComputeCuts_rec( Dar_Man_t * p, Aig_Obj_t * pObj )
-{
-    if ( Dar_ObjCuts(pObj) )
-        return Dar_ObjCuts(pObj);
-    if ( Aig_ObjIsPi(pObj) )
-        return Dar_ObjPrepareCuts( p, pObj );
-    if ( Aig_ObjIsBuf(pObj) )
-        return Dar_ObjComputeCuts_rec( p, Aig_ObjFanin0(pObj) );
-    Dar_ObjComputeCuts_rec( p, Aig_ObjFanin0(pObj) );
-    Dar_ObjComputeCuts_rec( p, Aig_ObjFanin1(pObj) );
-    return Dar_ObjComputeCuts( p, pObj );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dar/darData.c b/src/aig/dar/darData.c
deleted file mode 100644
index 17963c4a..00000000
--- a/src/aig/dar/darData.c
+++ /dev/null
@@ -1,11294 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dar_.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    [Storage for AIG subgraph data.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: dar_.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "darInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-const int s_nDataSize1 = 2*43906;
-unsigned int s_Data1[2*43906] = {
-    4,    6,    5,    7,    9,   11,    5,    6,    4,    7,   15,   17,
-    2,    8,    4,   21,    3,   10,    5,   25,    7,   25,    9,   25,
-    2,   10,    7,   33,    9,   33,    2,   14,    5,   39,    6,   39,
-   17,   39,    3,   16,    7,   47,   33,   47,    2,   16,    4,   53,
-    7,   53,    3,   14,    5,   59,   17,   59,   53,   59,    3,   11,
-    7,   67,    4,   68,    5,   66,    6,   73,   33,   67,    7,   76,
-    5,   77,    9,   77,    9,   66,   33,   85,    3,    9,    4,   88,
-    7,   91,   88,   93,    6,   88,   21,   89,   11,   89,   21,  100,
-   25,  101,   11,   88,    7,  107,   33,  107,    2,   11,    5,  113,
-    7,  112,   30,  113,   25,  113,    5,  120,    7,  121,    9,  120,
-    9,  113,   25,  128,   21,  129,    9,  112,    2,    9,    6,  137,
-    5,  138,   11,  136,    3,   17,    7,  144,  113,  145,   15,  144,
-  113,  151,    3,   15,    6,  155,    4,  156,   17,  154,  113,  161,
-    2,   17,    7,  165,    5,  166,  155,  165,   15,  164,    2,   15,
-    6,  174,   17,  174,    3,   13,  113,  181,  135,  181,  143,  181,
-    2,   12,    9,  189,  181,  189,    9,  192,    2,   13,   85,  197,
-  107,  197,    3,   12,    7,  203,   11,  203,   33,  203,  197,  203,
-    9,  211,    3,   19,    7,  215,   33,  215,  173,  215,  179,  215,
-    2,   18,  215,  225,    2,   19,  151,  229,  161,  229,    3,   18,
-  113,  235,  229,  235,    2,    4,   25,  241,    9,  241,   15,  241,
-   11,  241,    6,  240,    7,  240,   59,  253,    7,  241,    9,  257,
-    6,  241,  253,  261,    3,    5,  251,  265,    6,  266,  241,  269,
-  253,  265,    7,  272,    7,  273,  241,  277,   53,  265,    7,  280,
-  248,  265,    9,  285,   11,  265,  241,  288,    9,  291,   17,  265,
-    9,  265,  257,  265,   25,  299,  251,  298,    7,  264,    3,  305,
-    5,  305,  128,  305,  101,  305,  299,  305,  241,  305,    7,  317,
-  265,  319,    9,  305,  113,  322,  113,  305,    9,  326,    6,  264,
-  241,  331,   17,  331,   53,  331,  253,  331,    7,  265,   59,  341,
-  241,  343,  331,  341,  241,  346,  241,  347,   15,  341,  113,  353,
-  241,  340,    7,  357,  265,  357,   59,  357,  331,  357,  256,  265,
-    7,  367,   59,  367,  331,  367,    6,  265,    5,  375,  242,  375,
-  316,  375,   25,  375,  241,  382,  305,  375,  241,  386,  241,  387,
-   11,  375,  241,  375,  265,  394,    7,  397,   25,  394,  305,  394,
-  251,  395,  257,  375,  241,  374,  260,  265,  241,  265,  251,  413,
-  331,  413,  261,  413,  375,  413,  257,  413,   19,  413,   12,  413,
-   11,  413,    9,  428,    9,  413,   11,  433,   11,  432,   15,  413,
-   11,  412,    9,  441,    7,  413,  241,  445,  265,  445,  375,  445,
-  409,  445,  411,  445,    6,  412,  241,  457,  445,  457,  241,  460,
-    6,  413,  357,  465,  367,  465,    7,  412,  265,  471,   59,  471,
-  331,  471,  465,  471,  241,  479,    2,    6,  353,  483,  322,  483,
-   30,  483,   25,  483,    9,  490,  305,  483,    9,  494,   19,  483,
-  413,  483,   12,  483,  244,  483,  241,  483,    9,  506,    9,  483,
-  305,  510,   25,  510,   11,  510,  241,  510,  257,  510,  247,  483,
-   11,  483,    2,  524,    4,  527,    5,  524,    3,  531,    9,  524,
-  258,  483,  151,  483,  257,  483,    9,  540,  155,  483,   17,  545,
-  235,  483,  181,  483,  161,  483,    4,  482,    2,  555,    5,  482,
-    2,  559,    6,  559,   17,  559,    5,  483,    2,  567,    6,  566,
-  241,  567,  483,  573,    9,  573,    9,  567,    4,  483,    6,  581,
-    3,  582,    3,    7,  289,  587,  510,  587,   11,  591,   11,  590,
-  516,  587,  413,  587,  483,  598,  498,  587,  500,  587,   19,  587,
-  483,  606,  502,  587,   12,  587,  483,  612,  534,  587,  524,  587,
-    9,  618,  288,  587,  305,  623,   25,  623,   11,  587,  265,  629,
-  331,  631,  510,  628,    9,  628,  483,  636,  483,  628,    9,  640,
-  265,  628,  305,  645,   25,  645,  375,  628,  265,  587,   11,  653,
-   33,  655,   11,  652,   25,  659,  305,  659,  295,  587,  241,  587,
-    9,  587,    4,  668,    2,  671,    3,  668,    5,  675,  524,  668,
-  483,  668,   11,  681,   11,  680,   11,  668,  483,  686,  392,  587,
-  165,  587,  375,  587,   17,  695,   11,  695,   11,  694,  113,  587,
-  567,  587,  305,  705,   25,  705,  555,  704,    5,  586,    3,  713,
-    7,  713,  623,  713,  645,  713,  659,  713,  128,  713,  394,  713,
-  101,  713,  299,  713,  705,  713,  510,  713,  483,  713,    9,  736,
-    9,  713,  113,  740,  483,  740,  241,  713,  375,  746,  375,  713,
-  241,  750,  113,  713,    9,  754,    4,  586,    7,  759,  589,  759,
-   33,  759,    5,  587,    7,  767,    2,  768,   47,  767,  483,  773,
-  759,  767,  483,  777,   17,  767,  113,  781,  483,  781,  483,  766,
-   47,  787,  759,  787,   17,  787,  566,  587,   47,  795,  759,  795,
-   17,  795,    4,  587,    3,  803,    6,  805,    7,  802,  494,  803,
-  490,  803,  736,  803,   25,  803,  483,  816,  305,  803,  483,  820,
-  713,  803,  483,  824,  483,  803,  305,  828,   25,  828,  713,  828,
-  555,  829,  483,  802,  580,  587,  483,  587,  413,  842,   19,  842,
-   12,  842,   11,  843,    9,  851,    9,  842,   11,  855,   11,  854,
-   11,  842,    9,  860,    5,  843,  803,  865,    9,  865,  839,  865,
-  841,  865,    4,  842,  483,  875,  865,  875,  483,  878,    4,  843,
-  787,  883,  795,  883,    5,  842,  587,  889,   47,  889,  759,  889,
-   17,  889,  883,  889,  483,  899,    3,    4,  559,  903,   19,  903,
-   12,  903,  842,  903,  587,  903,  483,  912,  165,  912,    9,  903,
-   11,  918,  483,  903,  241,  923,  555,  923,  587,  922,   11,  922,
-   15,  903,   11,  903,    9,  934,  483,  934,  524,  903,  692,  903,
-  767,  903,  375,  945,  165,  903,    7,  949,  587,  948,    6,  902,
-    3,  955,    7,  902,  787,  959,  795,  959,  889,  959,  767,  959,
-  483,  967,   33,  959,    7,  903,  956,  973,   88,  973,    4,  973,
-    3,  973,  955,  980,    9,  980,    3,  972,    4,  972,  955,  973,
-    3,  990,  375,  973,    9,  973,    3,  996,    6,  903,    4, 1001,
-    3, 1001,    3, 1000,    4, 1000,    2,    5,  955, 1011,  914, 1011,
-  918, 1011,   11, 1017,   11, 1016,  912, 1011,  483, 1022,  920, 1011,
-  906, 1011,   19, 1011,  903, 1030,  842, 1011,  903, 1034,  908, 1011,
-  910, 1011,   12, 1011,  903, 1042,  922, 1011,  587, 1046,  928, 1011,
-  936, 1011,  934, 1011,    9, 1054,   15, 1011,   11, 1011,  918, 1060,
-    9, 1060,  903, 1064,  903, 1060,    9, 1068,  483, 1011,  912, 1072,
-  903, 1072,  587, 1076,  587, 1072,  903, 1080,  155, 1072,  587, 1011,
-  922, 1086,  483, 1086,  903, 1090,  903, 1086,  483, 1094,   11, 1087,
-    9, 1099,    9, 1086,   11, 1103,   17, 1011,    9, 1011,  934, 1108,
-  903, 1108,   11, 1113,   11, 1112,   11, 1108,  903, 1118,  587, 1108,
-   11, 1123,  668, 1011,   11, 1127,  544, 1011,  155, 1011,  483, 1132,
-   67, 1011,  375, 1137,    7, 1010,    2, 1141,  959, 1141,   85, 1141,
-  107, 1141,  203, 1141,   67, 1141,    9, 1153,  215, 1141,   47, 1141,
-  759, 1141,    6, 1010,    2, 1163,    5, 1163,   17, 1163,    7, 1011,
-    2, 1171,    5, 1171,    2, 1170,    5, 1170, 1163, 1171,    5, 1180,
-    2, 1181,  483, 1171,  903, 1170,  375, 1189,  972, 1011,  375, 1193,
-    6, 1011,    2, 1197,    5, 1197,    2, 1196,    5, 1196, 1141, 1197,
-    2, 1206,    5, 1207,  903, 1196, 1000, 1011,  903, 1011,   19, 1216,
-  842, 1216,   12, 1216,   11, 1217,    9, 1225,  587, 1216,  483, 1228,
-   11, 1216,    9, 1232,    9, 1216,   11, 1237,   11, 1236,   15, 1216,
-  483, 1216,  587, 1244,    7, 1217,   59, 1249,  331, 1249, 1213, 1249,
- 1215, 1249,    6, 1216, 1249, 1259,    6, 1217, 1189, 1263, 1193, 1263,
-    7, 1216,  375, 1269, 1263, 1269,    3,    6,  413, 1275, 1216, 1275,
-  241, 1275,    9, 1281,   11, 1283,   11, 1280,    9, 1287,   17, 1275,
-    3, 1290,    5, 1293,    4, 1290,    2, 1297,  903, 1291, 1011, 1275,
-   11, 1275,  241, 1304,    9, 1307,  248, 1275,    9, 1311,  973, 1275,
-    9, 1315,  341, 1275,  803, 1319,    9, 1319,    5, 1274,    3, 1325,
-   17, 1325,  357, 1325,  367, 1325,  471, 1325,  341, 1325,  241, 1337,
- 1249, 1325,  253, 1325,   53, 1325,    5, 1275,    6, 1347,    2, 1348,
-  918, 1347,  903, 1347,    9, 1354,    9, 1347,  903, 1358,    4, 1275,
-    6, 1362,  265, 1363,    2,    7,  393, 1369,  334, 1369, 1325, 1369,
- 1363, 1374,   17, 1374,   62, 1369,  331, 1369,   17, 1382,   59, 1369,
-   17, 1386, 1328, 1369, 1304, 1369,    9, 1393,   17, 1369,  331, 1396,
-  241, 1397,   59, 1396, 1325, 1396,   11, 1369, 1275, 1406,    9, 1409,
-  265, 1369,  241, 1412,   11, 1413,   15, 1369,    5, 1418,    3, 1421,
-    2, 1418,    4, 1425, 1011, 1419,  107, 1369,   67, 1369,  803, 1433,
-    9, 1433, 1359, 1369,  203, 1369,  215, 1369,   85, 1369,    5, 1368,
-    2, 1447,    7, 1447,   47, 1447,   85, 1447,  107, 1447,  203, 1447,
-   67, 1447,    9, 1461,  215, 1447,  759, 1447,  959, 1447,    4, 1368,
-    2, 1471,    7, 1471,  265, 1471,    7, 1476,  331, 1471,   59, 1471,
- 1325, 1471,    5, 1369,    7, 1486,  803, 1487, 1275, 1486,  803, 1493,
-    9, 1493, 1346, 1369,  803, 1499,    9, 1499,    4, 1369,    7, 1505,
-    3, 1506, 1060, 1505,   11, 1505, 1011, 1512, 1011, 1505,    7, 1517,
-   11, 1517,   11, 1516, 1347, 1505, 1275, 1504, 1362, 1369, 1275, 1369,
-  413, 1531,   19, 1531,   12, 1531, 1216, 1531, 1011, 1531,  903, 1540,
-    9, 1531,   11, 1545,   11, 1544,   11, 1531,    9, 1550,  903, 1531,
- 1011, 1554,   11, 1530,    9, 1559,    5, 1531,  959, 1563,   47, 1563,
-  759, 1563,   17, 1563, 1527, 1563, 1529, 1563,    4, 1530, 1563, 1577,
-    4, 1531, 1493, 1581, 1499, 1581,    5, 1530,  803, 1587,    9, 1587,
- 1581, 1587,    1,  974,    1,  975,    1,  982,    1,  983,    0,  204,
-    0,  195,    0,  881,    0,  463,    0,  212,    0,  900,    0,  480,
-    0,  194,    0,  880,    0,  462,    0,  213,    0,  901,    0,  481,
-    0,  205,    0,  216,    0,  217,    1,  446,    0,  448,    0,  415,
-    0,  421,    1,   92,    0,   92,    1,   94, 1645, 1647,    1,   93,
-   88, 1650, 1645, 1653,    0,   93,    1,   95, 1657, 1659,    0,  108,
-    0,  109,    1,  360,    0,  368,    0,  358,    0,  414,    1,  447,
- 1637, 1675,    0,  449, 1635, 1679,    0,  191,    0,  877,    0,  473,
-    1,  473,    0,  459,    1,  459,    0,  891,    0,  207,    0,  458,
-    0,  876,    0,  190,    1,  458,    0,  472,    0,  890,    0,  206,
-    1,  472,    1,  977,    1,  976,    0,  399,    0,  398,    0,  397,
-    7, 1722,    0,  275,    0,  269,  241, 1728,    0,  270,    1,  279,
-    0,  321,    0,  274,    0,  271,    1,  278,    0,  320,    1,  277,
-  241, 1746,    0,  319,  265, 1750,    1,  276,    0,  318,    1,  926,
-    0, 1518,    0,  950,    0, 1519,    0,  951,    1,  998,    1,  999,
-    0,  575,    0, 1478,    0,  282,    0, 1479,    0,  283,    0,  369,
-    0,  359, 1667, 1785,    0,  420,    1,  422,    1,  927,    1, 1421,
-    5, 1794, 1419, 1797,    3, 1794, 1799, 1801,    0,  527,    2, 1804,
-  525, 1807,    4, 1804, 1809, 1811,    1,  671,    4, 1814,  669, 1817,
-    2, 1814, 1819, 1821,    0, 1293,    3, 1824, 1291, 1827,    5, 1824,
- 1829, 1831,    1, 1425,    2, 1834, 1419, 1837,    4, 1834, 1839, 1841,
-    0,  531,    5, 1844,  525, 1847,    3, 1844, 1849, 1851,    1,  675,
-    3, 1854,  669, 1857,    5, 1854, 1859, 1861,    0, 1297,    4, 1864,
- 1291, 1867,    2, 1864, 1869, 1871,    1, 1422,    0,  528,    1,  672,
-    0, 1294,    1, 1426,    0,  532,    1,  676,    0, 1298,    1,  123,
-    0,   79,    1,  993,    0,  124,    1,   80,    0, 1210,    0, 1184,
-    0,  125, 1891, 1905,    1,   81, 1893, 1909,    1,  122, 1897, 1913,
-    0,   78, 1899, 1917,    0, 1208,    0, 1182,    1,  992,    1,  361,
- 1671, 1927,    0,  574,    1,  984,    1,  985,    1,  114,    9, 1937,
-    0,   68,    1,  980,  955, 1942,    9, 1942,    0,  568,    9, 1949,
-    1,  924,    1,  925,    0,  306,  375, 1957,    0,  308, 1413, 1961,
-    0,   26,    1,  306,    1,  308,    1,  714,    0, 1142,    0, 1448,
-    0, 1450,    1, 1450, 1413, 1979,    0, 1474,    0,   54,    0,   56,
-    1, 1472,    0, 1326,    0,   60,    1,   60,    0, 1166,    0,   40,
-    1,  956,  973, 2001,  973, 2000,    0,  556,    1,   22,    0, 1475,
-    1, 1165, 1168, 2012, 1169, 2013, 2015, 2017, 1168, 2013, 1169, 2012,
- 2021, 2023,    1, 1167,    2, 2027, 1197, 2029, 1997, 2031,    0,   57,
-    1,  957,    0, 1451, 1980, 2039, 1979, 2039, 1413, 2042, 1413, 2039,
- 1979, 2046,    1, 1449,    5, 2051, 1451, 2053, 1975, 2055,    1, 1451,
- 1977, 2059, 1413, 2061,    0,  307, 1967, 2065,  375, 2067,    0,  309,
- 1969, 2071, 1413, 2073,    0,   41,    1,  307, 1958, 2079, 1957, 2079,
-  375, 2082,  375, 2079, 1957, 2086,    1,  309, 1962, 2091, 1961, 2091,
- 1413, 2094, 1413, 2091, 1961, 2098,    1,   41,    2, 2103,   43, 2105,
- 1999, 2107,    1, 1143,    5, 2111, 1171, 2113, 1973, 2115,    1,  561,
-  564, 2118,  565, 2119, 2121, 2123,  564, 2119,  565, 2118, 2127, 2129,
-    0,   91,    7, 2132,    0,  569,    1,  981,    9, 2139,  955, 2139,
-    0,   69,    9, 2145,    1,  115,    0,  432,    0,  500,    0, 1245,
-    0, 1237,    0,  501,    0,  433,    1, 1415,    1,  348,    1,  388,
-    1,  826,    1,  126,    1, 1376,    1,  380,    1,  814,    1,  118,
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-    9, 4625, 3247, 4652,   33, 4652, 3807, 4625,    9, 4659,    0, 1170,
- 2615, 4663,  903, 4665,    0,  112, 3972, 4669, 3270, 4669, 3086, 4669,
- 1938, 4669, 1937, 4669,    9, 4678, 2564, 4669, 3071, 4669,    9, 4684,
- 3267, 4669,    9, 4688, 2563, 4669,    9, 4692,    9, 4669, 3267, 4696,
- 3933, 4696, 1937, 4696, 3071, 4696, 2563, 4696, 3933, 4669,    9, 4708,
-    1, 1170, 1413, 4713,  922, 4713,  483, 4713,  903, 4718,  903, 4713,
-  483, 4722,    1,  112,    2, 4727,    7, 4729, 3261, 4727,    9, 4733,
-   25, 4727,  903, 4727,  587, 4727,    9, 4727,    0,  972, 3059, 4745,
- 1925, 4745, 3563, 4745, 3553, 4745, 3549, 4745, 3547, 4745, 2005, 4745,
- 2001, 4745, 1595, 4745, 1945, 4745, 1599, 4745, 2239, 4745, 1717, 4745,
- 2619, 4745, 1769, 4745, 1947, 4745, 1933, 4745, 1943, 4745,  955, 4781,
-    9, 4781,    0,  802,  807, 4787,  375, 4787,    7, 4787,  805, 4793,
-  265, 4793,  483, 4787,    0,  144,  483, 4801,    1,  972, 3551, 4805,
- 2003, 4805,  375, 4805,  955, 4805,    9, 4805, 1011, 4805,    1,  802,
-  713, 4819,  483, 4819,    1,  144,    0,  256, 2309, 4827, 4437, 4827,
-  264, 4826,  299, 4833,  264, 4827,  367, 4837,  265, 4826, 2309, 4841,
- 4805, 4827, 4613, 4827,  375, 4827,  510, 4827,  483, 4827,    9, 4852,
-    9, 4827,  483, 4856,    0, 1504,    1,  256, 2798, 4863,    7, 4863,
-  265, 4867,  264, 4862,  264, 4863, 2795, 4863,  375, 4874,  265, 4862,
- 4873, 4879,  305, 4863,  713, 4863,   25, 4863,  375, 4863, 2795, 4888,
-  265, 4863, 4871, 4893,    1,  164,    0,  374,  241, 4899,    0, 1346,
-    9, 4903,    0,  154,    0, 1412, 2853, 4909, 2163, 4909,    0, 1418,
-    1, 1346,    1,  154,  483, 4919,    1, 1412,  241, 4922,    1, 1290,
- 4915, 4927,    1, 1280,    1,  246,    0,  566, 2596, 4935,  586, 4934,
-  705, 4939,  586, 4935,  795, 4943, 2595, 4935,  587, 4946,  587, 4935,
- 2595, 4950,    0, 1086,  375, 4955,    0,  922, 1759, 4959, 2265, 4959,
- 3367, 4959, 4421, 4959, 1953, 4959,    1,  566,    5, 4971,    6, 4973,
- 1950, 4971, 1949, 4971,    9, 4978,  586, 4970,  586, 4971,  587, 4970,
- 4985, 4987, 4827, 4971,    9, 4971, 1949, 4992, 4745, 4971, 4569, 4971,
-  587, 4971, 4983, 5001,    1, 1086,    9, 5005,    1,  922, 3369, 5009,
-  555, 5009,  257, 5009,    1,  932,    0,   88, 3171, 5019,   10, 5018,
-  101, 5023,  101, 5019,   10, 5019,  107, 5029,    0,  934,  375, 5033,
-    0, 1108,  587, 5037,    1, 1362,  265, 5041,    1,   88,   93, 5045,
- 1643, 5047,   93, 5044, 1645, 5051, 1645, 5045, 2135, 5045,  973, 5044,
- 4745, 5059, 3163, 5045, 3173, 5045, 3167, 5045,    7, 5044,   10, 5044,
-   10, 5045,   11, 5044, 3807, 5075, 5073, 5075,   33, 5045,   21, 5045,
-  973, 5045, 4805, 5085, 3807, 5045, 4279, 5045, 4283, 5045, 4745, 5045,
-   11, 5045, 5071, 5097,    1, 1304,    1, 1108,  973, 5103,  972, 5102,
- 5105, 5107,  972, 5103,  973, 5102, 5111, 5113,  257, 5103,    0,  260,
-    0,  580,    0,  136,    0,  668,    1,  260, 4139, 5127, 4138, 5127,
-  264, 5126, 5131, 5133,  264, 5127, 4137, 5137,  265, 5126, 4137, 5141,
- 5137, 5142, 5129, 5141, 5138, 5141, 5137, 5141, 4137, 5150,  265, 5127,
- 4137, 5154, 5133, 5157, 5133, 5155, 4137, 5161, 4137, 5127,  265, 5165,
- 5137, 5167,  265, 5164, 5133, 5171,    1,  580,    1,  136, 5019, 5177,
-    1,  524, 5125, 5181,    1,  296, 5019, 5185,    0, 1413, 2559, 5189,
- 2209, 5189, 4925, 5189,    0, 1419, 5181, 5197,    1,  295,  973, 5201,
-  972, 5201,   49, 5201,   48, 5201,  972, 5200, 5203, 5211,  973, 5200,
- 5205, 5215,   48, 5200, 5207, 5219,   49, 5200, 5209, 5223,    1, 1413,
- 1417, 5227,    1, 1291, 5125, 5231, 5197, 5231,    0, 1087,  375, 5237,
-    0,  923, 1793, 5241, 2941, 5241, 5012, 5241, 3543, 5241, 3559, 5241,
- 2891, 5241, 5017, 5241, 1955, 5241,  555, 5241, 5009, 5258, 5009, 5241,
-  555, 5262,    1, 1087, 5037, 5267,    1,  923,  555, 5270, 4959, 5273,
-  241, 5270, 4959, 5277, 4959, 5271,  555, 5281,    1,  933, 4959, 5285,
-    0,  935,  375, 5289,    0, 1109, 5005, 5293,    1,  935,    0,  669,
- 4927, 5299,    1,  525, 4915, 5303, 5299, 5303,    1,  669,    1,  297,
-    0,  341,  483, 5313, 3747, 5313, 3689, 5313, 3345, 5313, 4415, 5313,
-    0,  257, 2255, 5325, 4888, 5325, 4881, 5325, 3467, 5325, 2919, 5325,
- 4871, 5325, 4893, 5336, 4894, 5325,    7, 5324, 4863, 5343, 4872, 5325,
- 4879, 5347, 4869, 5325, 4893, 5325, 4871, 5352, 5343, 5353,    3, 5325,
-    5, 5358, 4862, 5360, 4863, 5361, 5363, 5365, 5343, 5364, 4862, 5361,
- 4863, 5360, 5371, 5373, 5344, 5361, 5343, 5361, 4863, 5378,    5, 5325,
-    3, 5382, 4862, 5384, 4863, 5385, 5387, 5389, 5343, 5388, 4862, 5385,
- 4863, 5384, 5395, 5397, 5344, 5385, 5343, 5385, 4863, 5402,  264, 5325,
- 4863, 5406, 4879, 5409, 5344, 5407, 5343, 5407, 4863, 5414, 4863, 5407,
- 4871, 5419, 5343, 5418,    7, 5325,  265, 5425, 4863, 5427,  266, 5325,
-  375, 5325, 4863, 5432,  510, 5325,  483, 5325,    9, 5438,    9, 5325,
-  483, 5442,  251, 5325,  265, 5446,  265, 5447, 4892, 5325,  265, 5325,
-  257, 5454,    1, 5457,    7, 5455, 5459, 5461,    0, 5461, 5457, 5465,
-  251, 5454, 4863, 5454, 4863, 5325,    3, 5472,    5, 5474,    5, 5472,
-    3, 5478,  375, 5472,    7, 5473, 5361, 5485, 5385, 5485, 5477, 5485,
- 5481, 5485, 5407, 5485,  264, 5472, 4879, 5497, 5485, 5497,  264, 5473,
- 4893, 5503,  265, 5472,  265, 5324, 4417, 5509,  251, 5509,    1,  341,
- 5325, 5515,  331, 5514,    1,  257,  445, 5521,  265, 5522,  449, 5521,
-  448, 5521,  414, 5521,  415, 5521,  421, 5521,  420, 5521,  253, 5521,
-  265, 5538,  340, 5521,  341, 5521,  272, 5520,  241, 5546,  273, 5521,
- 5549, 5551,  272, 5521,  273, 5520,  412, 5521,  251, 5559,  241, 5520,
-  265, 5562, 5551, 5565,  272, 5563, 5557, 5569,  500, 5521,  432, 5521,
-  501, 5521,  413, 5520, 5525, 5579, 5529, 5579, 5533, 5579, 5535, 5579,
- 5555, 5579, 5541, 5579,  251, 5579, 5559, 5592, 5560, 5579, 5559, 5579,
-  251, 5598, 5577, 5579,  433, 5521, 5579, 5605,  264, 5520, 5543, 5609,
-  367, 5609,  264, 5521,  299, 5615,  412, 5520, 5527, 5619, 5531, 5619,
- 5537, 5619, 5551, 5619, 5573, 5619, 5575, 5619,  413, 5521,  375, 5632,
- 5619, 5635,  251, 5632, 5619, 5639, 5619, 5633,  251, 5643,  483, 5632,
- 5619, 5647,    9, 5632, 5619, 5651,    7, 5521,  265, 5654, 5609, 5657,
-  265, 5655, 5615, 5661, 2227, 5521,  375, 5665, 4841, 5521,  375, 5669,
-  375, 5520, 2227, 5673, 4841, 5673, 4827, 5673,  375, 5521,  413, 5680,
- 5619, 5683,  413, 5681, 5559, 5687,  483, 5521,  413, 5690, 5619, 5693,
-  413, 5691, 5559, 5697,    9, 5521,  413, 5700, 5619, 5703,  413, 5701,
- 5559, 5707,  251, 5521,  413, 5710, 5619, 5713,  413, 5711, 5559, 5717,
-  265, 5521,  445, 5720, 5579, 5723,  253, 5720, 5579, 5727,    7, 5720,
- 5609, 5731, 4827, 5521,    3, 5735,    5, 5736,    5, 5735,    3, 5740,
-  375, 5735,    7, 5734, 5739, 5747, 5743, 5747,  264, 5735, 5747, 5753,
-  265, 5735,  265, 5520, 2647, 5759, 5545, 5759, 1783, 5759,  241, 5758,
- 5551, 5767,    0, 1171, 4714, 5771, 4716, 5771, 4720, 5771, 4724, 5771,
- 2850, 5771, 1413, 5771, 4713, 5782,  922, 5771, 4713, 5786, 4718, 5771,
-  903, 5790, 2849, 5771,  903, 5794,  483, 5771, 4722, 5798,  903, 5798,
- 4713, 5802, 4713, 5798,  903, 5806, 4722, 5771,  483, 5810,  903, 5771,
- 4718, 5814, 2849, 5814,  483, 5814, 4713, 5820, 4713, 5814,  483, 5824,
- 4713, 5771, 1413, 5828,  922, 5828,  483, 5828,  903, 5834,  903, 5828,
-  483, 5838,    0,  973, 1895, 5843, 2037, 5843, 1597, 5843, 1601, 5843,
- 2142, 5843, 2313, 5843, 4810, 5843, 1715, 5843, 1771, 5843, 1935, 5843,
- 2140, 5843, 2139, 5843,  955, 5866,    9, 5866,  375, 5843, 4805, 5872,
-  483, 5843,    9, 5843, 2139, 5878,  955, 5843, 2139, 5882, 1011, 5843,
- 4805, 5843,  375, 5888,    1, 1171,    3, 5892, 4663, 5895,  903, 5897,
-  483, 5892, 4663, 5901,  903, 5903, 4663, 5893, 1413, 5907,  922, 5907,
-  483, 5907,  903, 5912,  903, 5907,  483, 5916,    1,  973,  956, 5920,
- 4745, 5923,   88, 5920, 4745, 5927,    5, 5920, 4745, 5931, 1011, 5933,
-    3, 5920,  955, 5936, 4745, 5939,    9, 5936, 4745, 5943, 4745, 5937,
-  955, 5947,    9, 5947,  375, 5920, 4745, 5953,  955, 5920,    3, 5956,
- 4745, 5959, 5325, 5921,    9, 5920,    3, 5964, 4745, 5967, 4745, 5921,
-  375, 5971,    0,  767,  903, 5974, 4617, 5977,  483, 5979, 4617, 5975,
- 1413, 5983,  922, 5983,  903, 5983,  483, 5988,  483, 5983,  903, 5992,
-    0,  567, 4989, 5997, 4983, 5997, 5001, 6000, 5002, 5997, 4984, 5997,
- 4987, 6007, 5001, 5997, 4983, 6010,    3, 5997,    7, 6014, 4970, 6016,
- 4971, 6017, 6019, 6021, 4970, 6017, 4971, 6016, 6025, 6027,    7, 5997,
-    3, 6030, 4970, 6032, 4971, 6033, 6035, 6037, 4970, 6033, 4971, 6032,
- 6041, 6043,    3, 5996,    7, 6047,    2, 5996, 4992, 6051, 6015, 6051,
-    7, 6055, 4971, 6057,    9, 6051, 4971, 6060, 4971, 6051,    9, 6064,
-  586, 5997, 4971, 6068, 4987, 6071, 4971, 6069, 4983, 6075,    2, 5997,
- 6048, 6079, 4971, 6081,    7, 6079, 6047, 6084, 4971, 6087, 4971, 6085,
- 6047, 6091, 6047, 6079,    7, 6094, 4971, 6097, 4992, 5997,  587, 6101,
- 2839, 5997,  587, 6105,    9, 5997, 4971, 6108,  587, 6111, 4971, 5997,
-    2, 6115,    7, 6117, 4975, 6117,  586, 6114, 4987, 6123,    5, 6114,
-    6, 6127, 6117, 6129, 6119, 6127,  586, 6115, 5001, 6135,    9, 6114,
-  587, 6139,  587, 6115,    9, 6143,    0,   67, 4636, 6147,   37, 6147,
- 3008, 6147, 4656, 6147, 4650, 6147,    7, 6146, 4643, 6159, 2233, 6159,
- 4625, 6159,    9, 6165,    5, 6147,    6, 6169,   36, 6147, 4625, 6172,
- 3807, 6173, 4648, 6147,    9, 6178, 3003, 6147,    9, 6182,   33, 6146,
- 6151, 6187, 3856, 6187, 3837, 6187,    9, 6192,    9, 6187, 3837, 6196,
-   33, 6147, 4652, 6200, 3807, 6201,    9, 6205,    9, 6200, 4625, 6208,
- 3807, 6209, 4625, 6200,    9, 6214, 4652, 6147,   33, 6218,    9, 6147,
- 4648, 6222, 3003, 6222,   33, 6222, 4625, 6228, 3807, 6229,   33, 6223,
- 3837, 6235, 4625, 6222,   33, 6238, 4625, 6147,   75, 6243, 4629, 6243,
-    7, 6243, 4627, 6249, 6171, 6243,  375, 6243,   36, 6242,   33, 6242,
-    9, 6258,    9, 6242,   33, 6262,    0,   89, 5079, 6267, 5071, 6267,
- 5097, 6270, 5098, 6267, 5072, 6267, 5075, 6277, 5097, 6267, 5071, 6280,
-  107, 6267,    5, 6267,    7, 6286, 5044, 6288, 5045, 6289, 6291, 6293,
- 5044, 6289, 5045, 6288, 6297, 6299,    7, 6267,    5, 6302, 5044, 6304,
- 5045, 6305, 6307, 6309, 5044, 6305, 5045, 6304, 6313, 6315,    5, 6266,
-    7, 6318, 5045, 6321,    7, 6319,    7, 6266,    5, 6326, 5045, 6329,
- 5075, 6327, 2221, 6327, 5045, 6327,    4, 6266, 6287, 6339,    7, 6341,
- 5045, 6343,   10, 6266, 5075, 6347, 2221, 6347, 5045, 6347,   10, 6267,
- 5097, 6355, 5045, 6354, 5075, 6359, 5045, 6355, 5071, 6363, 1274, 6267,
-    4, 6267, 6324, 6369, 5045, 6371,    7, 6369, 6319, 6374, 5045, 6377,
- 5044, 6374, 5045, 6375, 6319, 6383, 6381, 6383, 5044, 6375, 5045, 6374,
- 6389, 6391, 6319, 6369,    7, 6394, 5045, 6397,    6, 6267,    3, 6400,
-    3, 6267,    6, 6404,   21, 6267,   11, 6409, 5045, 6411, 5045, 6267,
-   10, 6414, 5075, 6417,   10, 6415, 5097, 6421, 5311, 6267,   11, 6266,
- 2969, 6427, 5082, 6427, 5045, 6427,   21, 6432,   21, 6427, 5045, 6436,
-    1,  767, 4580, 6441, 4582, 6441, 4586, 6441, 4590, 6441, 2862, 6441,
- 1413, 6441, 4579, 6452,  922, 6441, 4579, 6456, 4584, 6441,  483, 6460,
- 2861, 6441,  483, 6464,  759, 6440,  903, 6441, 4588, 6470,  483, 6470,
- 4579, 6474, 4579, 6470,  483, 6478, 4588, 6441,  903, 6482,  483, 6441,
- 4584, 6486, 2861, 6486,  903, 6486, 4579, 6492, 4579, 6486,  903, 6496,
- 4579, 6441, 1413, 6500,  922, 6500,  903, 6500,  483, 6506,  483, 6500,
-  903, 6510,    1,  567,    5, 6514,    6, 6517, 4935, 6517, 2137, 6515,
-    9, 6523,   14, 6515,    2, 6515,  563, 6529, 4935, 6531, 6519, 6529,
- 4935, 6535,    7, 6529, 6520, 6539, 4935, 6539, 6517, 6542, 6517, 6539,
- 4935, 6546, 1197, 6529, 4935, 6551,    6, 6515,    5, 6554,    5, 6515,
-    6, 6558, 5325, 6515,  903, 6515,    9, 6514, 4950, 6567,  587, 6567,
- 4935, 6570, 4935, 6567,  587, 6574,  241, 6515, 4950, 6515,    9, 6581,
-  587, 6515,    9, 6585, 4935, 6587, 4935, 6584,    9, 6591, 4935, 6515,
-    2, 6594,    7, 6597,    5, 6595, 6539, 6601, 6599, 6601,    6, 6601,
- 6597, 6607,    9, 6595,  587, 6611,  587, 6594,    9, 6615, 5843, 6515,
- 5313, 6515,  587, 6514,    1,   67, 4594, 6625, 4606, 6625, 3280, 6625,
-   75, 6625, 4593, 6632, 2146, 6625, 2145, 6625,    9, 6638,    7, 6625,
-   73, 6643, 4593, 6645,  375, 6625, 4593, 6648,   33, 6624, 4593, 6653,
-    9, 6655,    9, 6625, 3273, 6658, 2145, 6658, 4593, 6625,   75, 6664,
-  375, 6664,   36, 6665,   33, 6665,    9, 6672,    9, 6665,   33, 6676,
- 3273, 6625,    9, 6680,    1,   89, 1657, 6685,   25, 6685, 3565, 6685,
- 3573, 6685, 3273, 6685,   21, 6684,  483, 6685, 5843, 6685,   11, 6684,
-    0, 1487,   10, 6705,    7, 6705,    5, 6708,    5, 6705,    7, 6712,
-    0, 1347,    0,  113, 2149, 6719,    9, 6721, 4736, 6719,    9, 6725,
- 3023, 6719,    9, 6729, 4740, 6719,    9, 6733, 2879, 6719,    9, 6737,
-  587, 6719, 4727, 6740,    9, 6743,   25, 6719, 4727, 6746,    9, 6749,
- 4727, 6719,    5, 6753,    6, 6755, 4731, 6755,    2, 6752,    7, 6761,
- 6755, 6763, 6757, 6761,   25, 6752,    9, 6769,  587, 6752,    9, 6773,
-    9, 6753,   25, 6777,  587, 6777, 3255, 6719,    9, 6783,    0,  137,
-    1,  113,   31, 6788,    2, 6788,    7, 6793, 4669, 6793, 4697, 6789,
-   14, 6788,    6, 6789,    6, 6788,    5, 6804,   11, 6788,    5, 6808,
-    5, 6788,    6, 6813,    6, 6812, 4696, 6813,    9, 6813, 4669, 6820,
- 4669, 6813,    9, 6824,    7, 6788, 6815, 6829,   15, 6788, 6803, 6833,
-    8, 6788,    8, 6789, 4669, 6839, 1368, 6789,    5, 6789,   35, 6845,
- 4669, 6847, 6795, 6845, 4669, 6851,    6, 6845, 6796, 6855, 4669, 6855,
- 6793, 6858, 6793, 6855, 4669, 6862, 1171, 6845, 4669, 6867,   17, 6845,
- 4669, 6871,    7, 6789, 6811, 6875, 6807, 6875, 6817, 6875, 6801, 6875,
-    2, 6874,    2, 6789,    7, 6886,   30, 6788, 3867, 6891,   25, 6788,
- 4696, 6895, 3867, 6895,    9, 6899,    9, 6894, 3867, 6903, 4669, 6895,
-    9, 6906,    9, 6895, 4669, 6910,  587, 6788, 4696, 6915,    9, 6915,
- 4669, 6918, 4669, 6915,    9, 6922,   25, 6789, 4473, 6927, 6791, 6927,
- 3972, 6927, 3933, 6927,    9, 6934,    9, 6927, 3933, 6938, 4696, 6789,
- 6837, 6943,   25, 6943,  587, 6943,    9, 6789, 6837, 6951, 4669, 6953,
-  587, 6951, 4669, 6957,   25, 6951, 4669, 6961, 4669, 6950,   25, 6965,
- 6837, 6965,  587, 6965, 4669, 6789,    5, 6972,    6, 6975,    2, 6973,
- 6855, 6979, 6977, 6979,    7, 6979, 6975, 6985,   25, 6973,    9, 6989,
-  587, 6973,    9, 6993,    9, 6972, 6837, 6997,   25, 6997,  587, 6997,
-    9, 6973, 6839, 7005,    9, 6788, 6799, 7009, 6840, 7009, 6839, 7009,
- 4669, 7014, 4669, 7009, 6839, 7018,   25, 7008, 3867, 7023,   25, 7009,
- 3933, 7027,    1,  137, 6267, 7031,    0,  375,  413, 7034,  413, 7035,
-  241, 7034, 3307, 7041, 2885, 7041,    0,  261,    0,  803,   16, 7049,
-    7, 7049,    4, 7052,    4, 7049,    7, 7056,    0,  581,    0,  145,
-    1,  375,  317, 7064,  265, 7065,  256, 7068,  256, 7069, 4901, 7065,
-    4, 7065,    2, 7077,  265, 7077,    2, 7076, 4899, 7083,    2, 7065,
-  265, 7087,    4, 7086, 4899, 7091,    2, 7064,  265, 7064,    3, 7064,
- 7084, 7099, 7092, 7099, 7083, 7099, 4899, 7104, 7091, 7099, 4899, 7108,
- 7075, 7099, 4899, 7099, 7083, 7114, 7091, 7114,  240, 7064,  240, 7065,
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-    6, 9786,    7, 9786,    6, 9787, 9791, 9793,    7, 9787, 9789, 9797,
-    0, 1274,    5, 9801,    1, 1368, 4904, 9805, 4903, 9805,    9, 9808,
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-    2,10081,    0,10089,    6,10088,    0,10088,   15,10095,    2,10080,
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-    1,10154,   17,10161, 8241,10155,   15,10154,  483,10167,    3,10106,
- 9673,10171, 8251,10171, 3807,10171, 4279,10171, 4283,10171, 9967,10171,
-   33,10107, 1369,10107,  331,10186, 1325,10186,   59,10186, 1011,10107,
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-   59,10219, 1325,10219,  331,10219,    3,10219,    4,10250,10233,10253,
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- 8982,10291, 8861,10291,   17,10294, 4745,10291, 1011,10299,   53,10291,
-  253,10291, 1471,10291,    2,10291,    3,10291,  483,10311,10257,10311,
-   59,10291,   17,10316,   62,10291, 1325,10291,   17,10322,  331,10291,
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- 3863,10351, 4569,10351,10273,10351,  241,10291, 1369,10291,   17,10291,
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-    6,10618,10627,10629,10407,10603,    6,10633,    7,10632,10635,10637,
-    7,10633,    6,10632,10641,10643, 8326,10603,10453,10603,    9,10648,
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-    9,10746,10603,10737,    9,10750,    9,10737,10603,10754, 8277,10754,
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-10841,10843,    7,10839,    6,10838,10847,10849,    7,10831,10421,10853,
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- 8326,10879, 8165,10878,    9,10883, 8165,10879,    9,10886,    9,10879,
- 8165,10890, 8165,10891, 8241,10831,    9,10896,   89,10384,   88,10385,
- 8225,10903, 8165,10385,  264,10907, 1368,10906,10909,10911,    7,10906,
-    2,10915,    2,10914,10909,10919,  265,10915,    5,10907,    3,10924,
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-10831,10945,    9,10953,    3,10907,    5,10957,    6,10959,10786,10957,
-    5,10956,10919,10965,10911,10965,10697,10957,    9,10970,    9,10957,
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- 8241,11047,    1,    9,   69,11051, 6625,11053,  981,11050,  980,11050,
- 4745,11059, 7966,11050, 7967,11050,    4,11050,    7,11067, 1275,11067,
- 7954,11051, 7967,11051,11063,11075,  120,11050, 3867,11079,  112,11050,
-11073,11083,   66,11050, 8251,11087, 1941,11087, 6159,11087, 3807,11087,
- 9875,11087, 8165,11087,  121,11050, 7966,11051,11065,11103, 7957,11051,
-   11,11106, 1141,11051, 1447,11051,   67,11051,    7,11114,11087,11117,
-  113,11051,11083,11121, 7947,11123, 7947,11120,11083,11127,   89,11051,
- 8495,11131,   25,11050,  113,11134, 3867,11137, 3867,11135,  113,11141,
-  567,11050, 4950,11145,  587,11145, 4935,11148, 4935,11145,  587,11152,
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-  567,11163,11165,11169,  567,11162,11167,11173, 1011,11051, 1369,11051,
- 6625,11179, 7956,11051, 7955,11051,   33,11051, 6625,11187,   25,11051,
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- 3933,11202,  973,11051, 2139,11207,11057,11207,  567,11051, 4971,11213,
-  587,11215,  257,11051,  483,11219,  483,11050,  257,11223, 1011,11050,
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-    3,11050,11068,11276,11069,11277,11279,11281,11068,11277,11069,11276,
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-11249,11277,   10,11276,   10,11277,   11,11276, 8251,11307, 3807,11307,
- 9875,11307,11305,11307, 8165,11307,   33,11277, 7971,11319, 8165,11277,
-   25,11323, 7947,11277,  973,11277, 4805,11329, 3807,11277, 8251,11277,
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-   11,11277,11303,11349, 7971,11349,    2,11051,11315,11355,11303,11355,
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-11405,11467,11465,11467,11276,11459,11277,11458,11473,11475,11405,11453,
-    7,11478,11277,11481,    1,11452,    1,11355,    4,11486,   67,11355,
- 1275,11355,    9,11493,11485,11495,11489,11495, 7947,11355,   11,11501,
-11277,11503,11277,11355,   10,11506,11307,11509,   10,11507,11349,11513,
-   11,11354,11326,11517,11277,11517, 7947,11520, 7947,11517,11277,11524,
-    3,11051, 8213,11529, 8052,11529, 7971,11529,  113,11534,  113,11529,
- 7971,11538, 8241,11529, 7947,11528,  483,11529,  112,11051,11326,11549,
-11277,11549, 7947,11552, 7947,11549,11277,11556,   67,11050,11187,11561,
-11053,11561,11179,11561,   66,11051,  113,11050,11556,11571,11185,11571,
-11549,11571, 7947,11576,   25,11570, 3867,11581, 7947,11571,11549,11584,
-   25,11571, 3933,11589, 7947,11051,  113,11592,11083,11595,11251,11595,
-  113,11593,11549,11601,    3,11593,11549,11605,11517,11605,    3,11592,
-   11,11051, 8116,11613, 8099,11613,11272,11613,11561,11613,11491,11613,
-11251,11613,   25,11624, 8074,11613, 8093,11629,   25,11613,11251,11632,
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- 6625,11613,  113,11613,    2,11613,11183,11653,11545,11653,11611,11653,
-11529,11653, 7947,11661,    3,11613, 7971,11664, 8093,11667, 7971,11665,
- 8109,11671,    2,11612,11605,11675,11326,11675,11277,11675, 7947,11680,
- 7947,11675,11277,11684, 7971,11613,    3,11688, 8093,11691,    3,11689,
- 8063,11695,   11,11050,11355,11699,  113,11701, 1369,11699,11251,11705,
-   33,11699,11251,11709,    3,11698, 8251,11713, 3807,11713,11433,11713,
-11413,11713, 9875,11713, 8165,11713,    3,11699, 8241,11727,    0,   11,
- 8095,11731, 8112,11731, 6688,11731, 6285,11731,  203,11730, 2351,11741,
- 8159,11731, 8162,11731, 8128,11731, 8114,11731, 8097,11731, 8118,11731,
- 8100,11731,    5,11730, 1369,11759, 8116,11731,    9,11762, 8099,11731,
-    9,11766,  181,11731,   98,11731, 5019,11773, 8058,11731, 8093,11777,
- 8156,11731, 8093,11781, 8076,11731, 8093,11785,   30,11731, 8124,11731,
- 8063,11790, 8072,11731, 8109,11794, 8063,11731, 8161,11798, 8124,11798,
- 8109,11798,    9,11804,    9,11798, 8109,11808,   25,11731, 6685,11812,
-    9,11812,   89,11731, 5019,11819,   21,11821,   21,11818, 5019,11825,
- 2759,11731, 2789,11731, 2821,11731, 6658,11731, 6685,11731,   25,11836,
- 4413,11731,  113,11731,    9,11842,  128,11731,  659,11731,  623,11731,
-  645,11731,  705,11731,  299,11731,  828,11731,  394,11731,  241,11731,
-  375,11862,  483,11731,  803,11866, 8074,11731, 8093,11871,    9,11873,
-    9,11870, 8093,11877,  101,11731,   21,11731,   89,11882, 5019,11885,
-   89,11883, 5045,11889, 8061,11731, 8109,11892,  803,11731,  483,11896,
-  375,11731,  241,11900,  587,11901, 6625,11731,    9,11906, 6789,11731,
-    2,11911, 6855,11913, 1369,11730,  587,11730,  375,11919, 8109,11731,
- 8061,11922, 8072,11922, 8063,11922,    9,11928,    9,11922, 8063,11932,
-  145,11731,  903,11730,  375,11939,  265,11731, 8161,11731, 8063,11944,
-    2,11730, 8124,11949, 8804,11949, 3972,11949, 8150,11949, 8495,11949,
-    9,11958, 7971,11949,    9,11962, 3933,11949,    9,11966,    9,11949,
- 8109,11970, 8495,11970, 3933,11970, 7971,11970, 8109,11949,    9,11980,
-    3,11730,  483,11985,    2,11731, 8075,11989,    9,11991,    3,11731,
- 8151,11994,    5,11995,    6,11999,    0,11998,    0,11995,    5,12004,
- 8150,11994, 8093,12009, 7971,11994, 8093,12013,    9,12015,    9,12012,
- 8093,12019, 1369,11995,   11,12023,12003,12025,12007,12025, 7971,11995,
- 8161,12031,11997,12031, 8124,12031, 8109,12031,    9,12038,    9,12031,
- 8109,12042,    9,11994, 7971,12046, 8093,12049, 7971,12047, 8109,12053,
-   89,11730, 5082,12057, 2969,12057, 5045,12057,   21,12062,   21,12057,
- 5045,12066,   88,11731, 7971,12070, 8093,12073, 7971,12071, 8109,12077,
- 8150,11731,    3,12080, 8093,12083,    3,12081, 8063,12087, 7971,11731,
- 1368,12091,  264,12090,12093,12095,    5,12090,    3,12099,    3,12098,
-12093,12103, 1369,12099,    7,12091,    2,12108,12103,12111,12095,12111,
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- 6625,12216,  113,12216,    3,12216, 7971,12240, 8093,12243, 7971,12241,
- 8109,12247, 7971,12216,    3,12250, 8093,12253,    3,12251, 8063,12257,
-    0,    9,  192,12261, 2329,12263,  211,12261, 2419,12267,  211,12260,
- 2433,12271,  192,12260, 2337,12275,  189,12260, 2337,12279,    4,12261,
-    7,12282,  413,12260,  413,12261, 1216,12260, 1216,12261, 1086,12261,
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- 9565,12330,  587,12260, 5231,12335, 5181,12335,10505,12335, 1275,12261,
-    2,12260,10001,12345,    5,12347,    4,12346,12349,12351,    4,12347,
-    5,12346,12355,12357,    3,12260,11243,12361,11251,12361, 5177,12361,
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- 2647,12379,  357,12376, 1785,12383,  586,12377,  375,12387,  586,12376,
-  413,12377,    3,12377,    7,12394,  375,12397,    7,12395,  331,12401,
-  483,12395,   15,12405,    5,12377,   17,12409,  587,12411,    3,12376,
-  669,12415, 1418,12415,12413,12415, 1369,12415,   15,12422,   15,12415,
- 1369,12426,    5,12376,12417,12431, 1419,12431,12415,12435,  668,12431,
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-    9,12463, 7867,12377,  251,12467, 3357,12377, 3681,12377, 3709,12377,
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-   25,12377, 4405,12377, 7041,12377,  251,12493, 1471,12376, 2011,12497,
-   53,12376, 2035,12501,  257,12377,  253,12376, 5325,12507,  251,12376,
- 7867,12511, 7617,12511, 7041,12511, 7617,12377,  251,12519, 1363,12376,
- 5189,12523,  483,12377,    9,12377, 8938,12377,  375,12531, 5313,12377,
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- 5313,12547,  587,12376,12387,12551,11731,12551,    9,12376, 5019,12557,
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-    2,12571,    4,12572,12537,12575,    4,12571,    2,12578,12537,12581,
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-  241,12603,    1,12609,12607,12611,    7,12377,    3,12614,  375,12617,
- 8861,12614,  375,12621,  375,12615, 8861,12625,  241,12614,  375,12629,
-  257,12376, 2647,12633, 1783,12633,  256,12377,  375,12639, 8861,12377,
-  261,12643,  260,12643,  256,12643,    6,12643,  241,12650,    7,12643,
-  241,12654,  331,12655,    6,12642,12645,12661,    7,12642,12647,12665,
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-    6,12673,12679,12681,12655,12681,    7,12673,12675,12687,  241,12377,
-    7,12691,  331,12693,    7,12690,  375,12697, 8997,12691,    7,12701,
-  241,12376, 4457,12705,  374,12705, 5189,12705,  265,12705,    6,12712,
- 8386,12705,    6,12705,  265,12718,    7,12705, 8337,12722, 8337,12705,
-    7,12726, 8861,12705,    6,12731,    7,12731,    6,12730,12735,12737,
-    7,12730,12733,12741,    1,  241,  448,12745, 4349,12747,  445,12744,
- 1679,12751,  457,12744, 4371,12755, 8461,12744, 8475,12759,  277,12744,
- 4457,12763,  923,12744, 4959,12767, 8388,12744, 8389,12744,    4,12745,
-   11,12775, 1369,12777,    2,12745, 1275,12781,    9,12783,    2,12744,
- 1419,12787,  668,12787,12779,12787,  587,12787,    9,12794,    9,12787,
-  587,12798,    4,12744,12789,12803,  669,12803,12787,12807, 1418,12803,
-12787,12811,12791,12803,12785,12803,12801,12803,   15,12803, 1369,12820,
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-  265,12834, 4349,12837,  923,12745, 5009,12841, 8374,12745,  346,12745,
- 2981,12847,  386,12745,  387,12745, 3049,12853,  347,12745, 8389,12745,
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- 4213,13002, 5325,12745,    7,13007, 5361,13009, 5385,13009, 5407,13009,
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-    5,13026,    3,13040,  264,13026,13031,13045,13035,13045,  264,13027,
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-14081,14083,  586,14072,  586,14073,  587,14072,14089,14091, 4827,14073,
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-14157,14191,14157,14179,    7,14194,14073,14197,14073,14107,  586,14200,
-14091,14203,  586,14201,14103,14207,    5,13947,14069,14211, 9165,14213,
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-    7,14263,    5,14250,14265,14267,14069,14267,  587,13947, 9340,14273,
- 9323,14273, 9290,14273, 9317,14279, 9335,14273, 9287,14282, 9287,14273,
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- 9195,14273,    5,14300, 9317,14303,    5,14301, 9287,14307,  587,13946,
-    5,14310,    0,  265,  446,14315, 4371,14317,  445,14314, 1675,14321,
- 8725,14315, 8766,14315,  471,14314, 2367,14329, 8827,14315, 8836,14315,
-  319,14314, 4497,14337, 1302,14315,  667,14315, 8794,14315, 8768,14315,
- 8727,14315, 8774,14315, 8732,14315, 1011,14315, 1275,14354,    3,14315,
- 1369,14359,   11,14361,    5,14315,    9,14365, 1275,14367,    3,14314,
- 1291,14371,  524,14371,14369,14371,  483,14371,   11,14378,   11,14371,
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- 1290,14387,14371,14397,14363,14387,14385,14387,14381,14387,   17,14387,
- 1275,14406,14371,14409, 1275,14387,   17,14412,14371,14415, 8770,14315,
-  241,14418, 8729,14315,  241,14422,  445,14315,  241,14426, 4371,14429,
- 1303,14315,  666,14315, 8784,14315, 4266,14315, 8622,14315, 8717,14441,
- 8824,14315, 8717,14445, 8702,14315, 8717,14449,  256,14314, 7185,14453,
- 2309,14453, 5673,14453, 5521,14453,  375,14461, 4213,14315,  375,14464,
-  316,14315, 4533,14469, 1757,14469, 8697,14315,  629,14315,  407,14315,
- 5325,14479, 3121,14315, 3031,14315, 5519,14315, 3355,14315,  510,14315,
- 8788,14315, 8647,14492, 8676,14315, 8757,14496, 8647,14315, 8831,14500,
- 8788,14500, 8757,14500,  241,14506,  241,14500, 8757,14510,  331,14315,
- 1325,14315,   59,14315, 5521,14315,  375,14521,  375,14315, 4213,14524,
- 8757,14524,   53,14525, 1471,14525,  253,14525,  253,14314, 4425,14537,
- 4497,14537,  483,14315,    9,14542,    9,14315,  483,14546, 8684,14315,
- 8717,14551,  241,14553,  241,14550, 8717,14557,  331,14551,  251,14315,
-  257,14563, 8495,14565, 8635,14315, 8757,14568, 5515,14315,  331,14573,
- 8757,14315, 8635,14576, 8676,14576, 8647,14576,  241,14582,  375,14576,
-  241,14576, 8647,14588, 1369,14314, 2853,14593,   15,14315, 1275,14315,
- 1011,14598,  587,14315,  241,14602, 8831,14315, 8647,14606,    6,14314,
-14341,14611,14343,14611,14601,14611,14357,14611, 8495,14611,  241,14611,
-    7,14314,14433,14625,14435,14625,14605,14625, 8495,14625, 3785,14625,
-10055,14625,10351,14625, 4329,14625, 4311,14625, 4555,14625,14073,14625,
- 4971,14625, 8717,14625,    7,14315, 8813,14652,14623,14653, 8495,14657,
-    4,14653,    2,14660,14620,14663, 8495,14663,14611,14666,14611,14663,
- 8495,14670,    2,14653,    4,14674,14620,14677, 8495,14677,14611,14680,
-14611,14677, 8495,14684,  240,14653,14620,14689, 8495,14689,14611,14692,
-14611,14689, 8495,14696, 8812,14652, 8717,14701, 8495,14652, 8717,14705,
-  241,14707,  241,14704, 8717,14711,  331,14705,   15,14653,  483,14717,
- 1275,14653,    9,14721, 8495,14653, 8831,14725,14655,14725, 8788,14725,
- 8757,14725,  241,14732,  241,14725, 8757,14736,  375,14653, 8647,14653,
-  241,14652, 8647,14745, 8495,14744, 8717,14749, 8495,14745, 8757,14753,
-  257,14314, 8614,14757, 4417,14757, 8495,14757,  251,14762,  251,14757,
- 8495,14766,  256,14315, 8647,14771, 7207,14771, 5432,14771, 5325,14771,
-  375,14778, 8495,14770, 8717,14783,  375,14771, 5325,14786, 8495,14771,
- 8757,14791, 8812,14315,    6,14794,    7,14794, 8717,14799,    6,14795,
-14799,14803,    7,14795,14797,14807, 8647,14807, 8495,14315,  261,14812,
-  260,14812,  256,14812, 8717,14819,  256,14813, 8635,14823,    6,14813,
-14815,14827,    7,14813,14817,14831, 8635,14831, 8676,14831, 8647,14831,
-  241,14838,  375,14831,  241,14831, 8647,14844,    6,14812,  241,14848,
-14831,14851,    7,14812, 8717,14855,  241,14857,  241,14854, 8717,14861,
-  331,14855,  241,14812,    6,14866,14831,14869,    7,14866, 8717,14873,
-    6,14867,14873,14877,14855,14877,    7,14867,14869,14883, 8647,14883,
-  241,14315,  445,14888, 4371,14891,  445,14889, 4349,14895, 8770,14888,
- 8729,14888,  587,14888,14625,14903, 8684,14888, 8717,14907, 8757,14888,
- 8647,14910, 8387,14889, 8495,14915, 8647,14888, 8757,14918,    6,14889,
- 8842,14923, 8495,14923, 8337,14926, 8337,14923, 8495,14930,    7,14889,
- 8717,14935, 3785,14935, 8495,14935,    6,14888,14935,14943,    7,14888,
- 8647,14947, 8495,14946, 8717,14951,14923,14947, 8495,14947, 8757,14957,
- 8495,14888,    6,14960,    7,14960, 8717,14965,    6,14961,14965,14969,
-    7,14961,14963,14973, 8647,14973, 8337,14889, 8647,14979,    7,14979,
- 8495,14983,12745,14315,  375,14987,  241,14314, 9099,14991, 9036,14991,
- 8647,14991, 8997,14996, 5521,14991,  375,15001,  375,14991, 9082,14991,
- 8495,15007,    7,14991, 8495,15011, 8997,15013, 8997,15010, 8495,15017,
- 8997,14991, 8647,15020,    7,15020, 8495,15025,    0,  241,  460,15029,
- 2315,15031,  479,15029, 2393,15035,  479,15028, 2397,15039,  460,15028,
- 2317,15043,  457,15028, 2317,15047,  269,15028, 2885,15051,  464,15029,
-   16,15029,  413,15029,    6,15058,    4,15029,    7,15062,    7,15063,
-   15,15063,  483,15069,    2,15029,  587,15073,   17,15075,    2,15028,
-  525,15079, 1290,15079,15071,15079, 1275,15079,   17,15086,   17,15079,
- 1275,15090,    4,15028, 1291,15095,15079,15097,15081,15095,15083,15095,
-  524,15095,15079,15105,15077,15095,15093,15095,15089,15095,   11,15095,
-  483,15114,15079,15117,  483,15095,   11,15120,15079,15123, 9072,15029,
-  305,15127, 9105,15029,  305,15131, 9083,15029,  413,15135,  412,15134,
-15137,15139,  412,15135,  413,15134,15143,15145, 3445,15029,  375,15149,
-12526,15029,12528,15029,  251,15029,  375,15029,  305,15159, 8997,15161,
- 8997,15158,  305,15165,12614,15029,  375,15169, 7065,15029,  265,15173,
- 7259,15175,  305,15028, 9105,15179, 9072,15179,  375,15179, 8997,15184,
- 8997,15179,  375,15188, 9082,15029,  375,15193,  265,15193, 5521,15029,
-  375,15199,  265,15199,  483,15029,12377,15204,    9,15029,12377,15208,
-   17,15029,13737,15029,  375,15215,    6,15028,    3,15219,    5,15220,
-15193,15223,    5,15219,    3,15226,15193,15229,15197,15219,15057,15219,
-    3,15235,    2,15234,15237,15239,    2,15235,    3,15234,15243,15245,
-15065,15219,    3,15249,    2,15248,15251,15253,    2,15249,    3,15248,
-15257,15259,  264,15219,15193,15263, 8997,15219,    7,15028, 4437,15269,
-15213,15269,    3,15273,    2,15272,15275,15277,    2,15273,    3,15272,
-15281,15283,12571,15269, 4805,15269, 4613,15269,14073,15269,  375,15269,
-  510,15269, 4971,15269,  483,15269,    9,15300,    9,15269,  483,15304,
-    6,15029, 9020,15309, 9021,15309,12393,15309,12392,15309, 8337,15309,
-  265,15318, 8452,15308,  241,15322, 8453,15309,15325,15327, 8452,15309,
- 8453,15308,  412,15309, 8997,15335,  241,15308,  265,15338,15327,15341,
- 8452,15339,15333,15345,15067,15309,    3,15349,    2,15348,15351,15353,
-    2,15349,    3,15348,15357,15359,  413,15308,15313,15363,15315,15363,
-15331,15363,15321,15363, 8997,15363,15335,15372,15336,15363,15335,15363,
- 8997,15378,  412,15308,15311,15383,15317,15383,15327,15383,  413,15309,
-12377,15390,15383,15393, 8997,15390,15383,15397,15383,15391, 8997,15401,
-12377,15309,  413,15404,15383,15407,  413,15405,15335,15411, 8997,15309,
-  413,15414,15383,15417,  413,15415,15335,15421,  265,15309, 8337,15424,
-15363,15427,  265,15308,  241,15430,15327,15433,    7,15029,15223,15437,
- 8997,15439,15229,15437, 8997,15443,15263,15437, 8997,15447,    4,15436,
-15219,15451,    3,15453,    2,15452,15455,15457,    2,15453,    3,15452,
-15461,15463,  264,15436,  264,15437,12377,15436,  375,15471, 8997,15436,
-15223,15475,15229,15475,  375,15475,15263,15475,  265,15475,15219,15485,
-   59,15437, 1325,15437,  331,15437, 1275,15437,    9,15495,   15,15437,
-  483,15499,  265,15437,15266,15503,15219,15503, 8997,15506,15467,15503,
- 8997,15503,15219,15512,  305,15503,  265,15436,15469,15519,  331,15519,
-  375,15028, 3307,15525, 2885,15525,12511,15525,12377,15525,  251,15533,
-  340,15029,  331,15537, 9136,15029,    7,15541, 8997,15029,  375,15544,
-  305,15547,  305,15545,  375,15551,    6,15545,    3,15555,    5,15556,
-    5,15555,    3,15560,  264,15555,    7,15545, 8495,15567,  331,15567,
- 1325,15567,   59,15567,  265,15567,    7,15544,15559,15579,15563,15579,
-15223,15579,15229,15579,  375,15579,15263,15579,15565,15579,  265,15579,
-15219,15595,15555,15595,  265,15544,15555,15601,    7,15601,  265,15545,
- 8647,15607,    7,15607, 8495,15611,  265,15029,    7,15615,  375,15617,
-    7,15614,  331,15621, 8997,15614,    7,15625,12377,15029,13421,15629,
-13313,15629,13621,15629,14923,15629,12721,15629,12715,15629,12709,15629,
-  375,15629,12705,15645,    7,15629,  331,15649,  483,15628,    9,15628,
-    7,15628,  375,15657,  265,15028, 9036,15661, 9099,15661,  241,15661,
-    6,15667,15629,15669, 8647,15661, 8997,15672, 5521,15661,  375,15677,
- 9082,15661, 8495,15681,  375,15661,    7,15661, 8495,15687, 8997,15689,
- 8997,15686, 8495,15693, 8997,15661, 8647,15696,    7,15696, 8495,15701,
-    0,  587, 9319,15705, 9336,15705,  889,15704, 2373,15711, 9371,15705,
- 9374,15705, 9350,15705, 9338,15705, 9321,15705, 9342,15705, 9324,15705,
-  578,15705,    3,15705,    6,15730,    7,15705,  567,15735, 9195,15737,
-    4,15735, 9366,15741,  483,15741, 9195,15744, 9195,15741,  483,15748,
-    7,15704, 9340,15705,  483,15754, 9323,15705,  483,15758,  579,15705,
- 9272,15705, 9317,15765, 9368,15705, 9317,15769, 9294,15705, 9317,15773,
-  566,15704,15729,15777, 9348,15705, 9287,15780, 9288,15705, 9335,15784,
- 9287,15705, 9373,15788, 9348,15788, 9335,15788,  483,15794,  483,15788,
- 9335,15798,  567,15705,    9,15802,15777,15805,15777,15803,    9,15809,
-12377,15705,   11,15813,    9,15705,  567,15816,15777,15819,  567,15817,
- 9290,15705, 9317,15825,  483,15827,  483,15824, 9317,15831, 9275,15705,
- 9335,15834,  375,15705,   11,15839,   11,15704,  375,15843, 9335,15705,
- 9275,15846, 9288,15846, 9287,15846,  483,15852,  483,15846, 9287,15856,
-    9,15704, 5231,15861, 5181,15861,10505,15861,14057,15861, 1011,15704,
-  375,15871, 9373,15705, 9287,15874,    4,15704, 9262,15879,  375,15879,
- 9195,15882,    7,15879,  265,15887, 9195,15889, 9195,15879,  375,15892,
-  483,15879,    5,15704,    5,15705, 9367,15900, 9366,15900, 9317,15905,
- 9195,15900, 9317,15909,  483,15911,  483,15908, 9317,15915, 9195,15901,
- 9373,15919,15903,15919, 9348,15919, 9335,15919,  483,15926,  483,15919,
- 9335,15930,  483,15900, 9195,15934, 9317,15937, 9195,15935, 9335,15941,
-  567,15704,15763,15945,    9,15945,  566,15705,15823,15951,15948,15951,
-15945,15951,    9,15956, 9195,15950, 9317,15961, 9195,15951, 9335,15965,
-    9,15951,15945,15968, 9366,15705,    5,15972, 9317,15975,    5,15973,
- 9287,15979, 9195,15705,  566,15982, 9317,15985,  566,15983, 9275,15989,
-    5,15983, 9275,15993, 9288,15993, 9287,15993,  483,15998,  483,15993,
- 9287,16002,    5,15982, 9317,16007,  483,16009,  483,16006, 9317,16013,
-  483,15982,    5,16016, 9317,16019,    5,16017, 9287,16023,  483,15705,
- 9340,16026, 9323,16026, 9290,16026, 9317,16033, 9335,16026, 9287,16036,
- 9287,16026, 9335,16040,    5,16026, 9195,16044, 9317,16047, 9195,16045,
- 9335,16051, 9195,16026,    5,16054, 9317,16057,    5,16055, 9287,16061,
-    0,  483,  878,16065, 2327,16067,  899,16065, 2415,16071,  899,16064,
- 2423,16075,  878,16064, 2331,16079,  875,16064, 2331,16083,  573,16064,
- 2569,16087,    2,16064,   15,16091,  413,16064,  413,16065,  573,16065,
- 2567,16099, 1216,16064, 1216,16065,  904,16065, 2263,16107, 6515,16065,
-    5,16111, 6539,16113,  903,16064, 4421,16117, 5285,16117, 2265,16117,
-    4,16064,    5,16064,    4,16065,    2,16129,    7,16131,    0,16130,
-    0,16129,    2,16136,   15,16129,  483,16141,16135,16143,16139,16143,
- 9513,16065,    5,16149,16133,16151,    4,16148,    2,16155,    7,16157,
-16151,16159,    1, 1011,  996,16162,   14,16162,    5,16163,    6,16169,
- 9617,16171,    2,16162, 9617,16175,16171,16176,16172,16175,16171,16175,
- 9617,16182,    7,16175,16169,16187, 9617,16189,    5,16162,16186,16193,
-16175,16193,    7,16196,    7,16197,16187,16193,    6,16192,16195,16205,
-16199,16205,    7,16192,16203,16211,16175,16211,    3,16211,16162,16217,
-    3,16193,    7,16221,16162,16222,16162,16221,    7,16226,    7,16227,
-16205,16231,    6,16193,16201,16235,16214,16235,16175,16235,16211,16240,
-16211,16235,16175,16244,16225,16235,16229,16235,16219,16235,    7,16193,
-16175,16254,16205,16257,16205,16255,16175,16261, 9704,16163,  587,16265,
- 5293,16163,  587,16269,  997,16162,  972,16162,16235,16275,    9,16275,
-14652,16163,  973,16163,16273,16283,16278,16283,    9,16283,16275,16288,
-16275,16283,    9,16292,  955,16162, 5241,16297, 1505,16162,    6,16301,
-    7,16300,16303,16305,    7,16301,    6,16300,16309,16311,   67,16162,
-16235,16315,    9,16163, 9617,16318,  587,16321,  587,16319, 9617,16325,
-   15,16162,  257,16163,    9,16331,    9,16162,  973,16335,16275,16337,
-  973,16334,  257,16335,  587,16162, 5293,16345, 9704,16345, 9617,16345,
-    9,16350,    9,16345, 9617,16354,    6,16162,    5,16358,    7,16162,
-16221,16362,16235,16365,16235,16363, 8647,16363,  903,16362,16235,16373,
-    6,16163,16329,16377,    7,16163,16167,16381,16205,16381,16361,16381,
- 8717,16381,14315,16380, 4311,16381, 4329,16381, 3785,16381,10351,16381,
-10055,16381,  973,16162,    9,16402,  972,16163,16341,16407,16165,16407,
-16405,16407,16403,16407,    9,16415, 9617,16163, 1368,16418,   14,16418,
-    2,16418,    7,16425,16423,16427,    7,16424,    5,16418,    6,16433,
-16431,16435,16421,16435,    6,16432,16427,16441,    2,16419,16435,16445,
-16171,16445,    7,16445,16433,16451,    9,16418,  587,16455,  587,16419,
-    9,16459,    6,16418,    5,16462,16427,16465,    7,16418,    2,16468,
-16435,16471,14315,16163,    7,16474,   17,16475,  903,16162,    3,16480,
-    6,16483,    6,16482, 5241,16481, 1274,16480,   15,16480, 1275,16480,
-    6,16480,    3,16496,    5,16496,    7,16480,16485,16503,16235,16503,
-    6,16481,16495,16509,16493,16509,    7,16481,16499,16515,16501,16515,
-16487,16515,16205,16515,16361,16515,16491,16515,16167,16515,    1,  903,
- 9542,16530, 9543,16530, 1274,16530,    3,16530, 9541,16539,    6,16538,
-    7,16538,    5,16545,16530,16547,    5,16539,    7,16551,16530,16552,
-16530,16551,    7,16556,    7,16557,16543,16561,    6,16539, 9533,16565,
-16545,16565,16555,16565,16559,16565,16549,16565,    7,16539,16543,16577,
-    4,16530,16576,16581,16543,16583,16539,16581,    7,16586,16543,16589,
-    7,16587,16565,16593,16545,16581,16565,16596,16565,16581,16545,16600,
-16568,16581,16579,16581,    7,16581,16539,16608,16543,16611,16539,16609,
-16545,16615, 1170,16530,16565,16619, 9541,16531,16535,16623,  559,16530,
- 5241,16627,  767,16530,16565,16631,  165,16530,    6,16635,    7,16634,
-16637,16639,    7,16635,    6,16634,16643,16645, 9540,16531,16543,16649,
-16533,16649,16539,16649,16537,16649, 1275,16530,16623,16659, 9533,16659,
-  257,16531,  483,16665,  483,16530,  257,16669,   15,16530, 5241,16673,
-    6,16530,    3,16676,16649,16679,    7,16530,16541,16683,16566,16683,
-16551,16682,16565,16689,16565,16683, 9533,16692,  375,16683, 1011,16682,
-16565,16699, 9533,16683,16565,16702,15269,16683, 4827,16683,    6,16531,
-16662,16711,16659,16711, 9533,16714, 9533,16711,16659,16718,    7,16531,
-16539,16723, 9533,16725,16537,16723, 9533,16729, 1007,16723,16543,16723,
- 9533,16735,16679,16723, 9533,16739,  331,16723, 1325,16723,   59,16723,
- 9533,16722,16543,16749,16539,16749,16679,16749,16537,16749, 9533,16531,
- 1275,16759,16711,16761,    7,16759,16565,16765,    7,16758,16539,16769,
-16543,16769,16679,16769,16537,16769,15029,16531,    7,16779, 1011,16530,
-    5,16782,    6,16785,    6,16784, 5241,16783,   14,16782, 1275,16782,
-   15,16782,    6,16782,    5,16798,    3,16798,    7,16782,16787,16805,
-16565,16805,    6,16783,16797,16811,16795,16811,    7,16783,16801,16817,
-16803,16817,16789,16817,16543,16817,16679,16817,16793,16817,16537,16817,
-    1, 1369, 1010,16833,   16,16833,    2,16833,    5,16838,    5,16839,
-16837,16843,    7,16833,    4,16846,16843,16849,    4,16847,16841,16853,
-16835,16853,    2,16832,   11,16859,15900,16833,  331,16832,   59,16832,
- 6717,16833,    9,16869, 1325,16832,  265,16832,    4,16833,    7,16876,
-16843,16879,    2,16877,    1,16882,    1,16877,    2,16886,   11,16877,
- 1369,16891,16885,16893,16889,16893,    5,16833,    2,16898,16853,16901,
-15705,16898, 1275,16898,    9,16907, 1346,16833,    9,16911,15705,16833,
-   11,16915,    5,16914, 1275,16833,    5,16921,   17,16923,    5,16920,
-    9,16927, 1275,16832, 6717,16931,    9,16933,    1, 1275, 5814,16937,
-  902,16937,  902,16936,    3,16937,    7,16944,  413,16937, 1216,16937,
- 6787,16937,    5,16953,    4,16952,16955,16957,    4,16953,    5,16952,
-16961,16963, 1505,16937, 5771,16937,  903,16968, 1011,16937,  903,16972,
-  903,16936,16941,16977,  241,16936,   17,16936, 5299,16983, 4915,16983,
-   11,16936,  903,16937, 5771,16990,16943,16991, 1011,16990,15208,16937,
-    9,16937,15029,17000,15029,16937,    9,17004,    4,16936,  265,17009,
-    5,16936,    4,16937, 1011,17015, 1369,16936, 6717,17019,    9,17021,
-    1,   17,    4,17025,    6,17026,  113,17025, 1275,17024, 5299,17033,
- 4915,17033,  241,17025,    2,17024,    3,17024,11731,17025,  265,17045,
-    1,   15, 5886,17049,    5,17048,  483,17053,  413,17049, 1216,17049,
-  165,17049, 5843,17049, 1011,17062,14315,17049,   17,17067,  903,17049,
- 1011,17070, 1011,17048,  241,17048,  903,17048, 5241,17079, 1011,17049,
- 5843,17082,  903,17082,15204,17049,  483,17049,15029,17090,15029,17049,
-  483,17094,    3,17048,  483,17099,    2,17049,    3,17049,    5,17105,
-    1,17106,    1,17105,    5,17110,  483,17105,   15,17115,17109,17117,
-17113,17117, 1369,17105,    0, 1011,    2,17125,    7,17127, 9565,17129,
-    5,17124, 9565,17133,17129,17134,17130,17133,17129,17133, 9565,17140,
-    6,17133,17127,17145, 9565,17147, 9600,17125,    9,17151, 5267,17125,
-    9,17155,16722,17125,10385,17125,    9,17161,  587,17125, 9565,17164,
-    9,17167,    9,17165, 9565,17171, 1275,17125,  903,17175,    9,17125,
-  375,17125,  587,17181,    9,17124, 5267,17185, 9600,17185, 9565,17185,
-  587,17190,  587,17185, 9565,17194,  587,17124,  375,17199,13737,17125,
-    9,17203,    6,17124,17176,17207,17175,17207,  903,17210,  903,17207,
-17175,17214,    7,17124,10001,17219,  903,17221,    6,17125,    3,17224,
-17219,17227,  903,17229,    7,17125,   88,17233,   89,17233,  265,17233,
-  264,17232,17239,17241,  264,17233,    3,17233,    9,17246,    3,17232,
-17237,17251,    9,17251,    2,17232,17235,17257,17249,17257,17247,17257,
-    9,17263,  265,17232,17245,17267,    2,17233,17254,17271,    9,17271,
-17251,17274,17251,17271,    9,17278,16531,17232,    9,17233,    3,17284,
-17257,17287,    3,17285,17271,17291,  903,17233, 9565,17125, 1368,17297,
-   14,17297,    2,17296,    7,17303,    2,17297,    7,17306,    7,17307,
-17301,17311,    5,17297,17305,17315,17129,17315,    6,17314,17311,17321,
-    6,17315,17309,17325,17303,17325,17299,17325,  587,17296,    9,17333,
-    9,17297,  587,17337,    6,17297,    5,17340,17311,17343,    7,17297,
-    2,17346,17325,17349,12377,17125,    9,17353,16531,17125,    6,17357,
-    7,17357,    6,17356,17361,17363,    7,17356,17359,17367,    0,  903,
-  767,17370, 4617,17373,  483,17375,   15,17371, 1011,17379,  767,17371,
- 4588,17383,  483,17383, 4579,17386, 4579,17383,  483,17390,  375,17371,
-   11,17395,  483,17370, 2265,17399, 4421,17399, 5285,17399,   11,17370,
-  375,17407,    6,17370,17380,17411,17379,17411, 1011,17414, 1011,17411,
-17379,17418,    7,17370, 3549,17423, 2001,17423, 8495,17423,10291,17423,
- 1011,17431,14073,17423,11277,17423, 4971,17423, 5045,17423,    6,17371,
-    5,17442,17423,17445, 1011,17447,    7,17371, 1011,17451,    0, 1369,
- 2789,17455, 2821,17455, 2759,17455, 2687,17455, 6658,17455,    2,17455,
-    6,17466, 6625,17455,    9,17470,12551,17455, 1347,17455,13808,17455,
- 6685,17455,13833,17455, 4413,17455,17025,17455,  265,17487,  241,17486,
-17038,17455,  903,17455,    9,17455, 6625,17496,   17,17454,12377,17501,
-   11,17454,12377,17505,  803,17455,   15,17454, 5303,17511, 4927,17511,
-17033,17511,16983,17511,  265,17454, 2853,17521,17082,17455,   11,17455,
-12377,17526,12564,17455,  241,17455,13737,17532,17025,17532, 1011,17455,
-17049,17538,12377,17455,   10,17543,   10,17542,  305,17543,   11,17543,
-17547,17551,   11,17542,17545,17555,17049,17455, 1011,17558,    4,17454,
-    5,17455,13737,17455,  241,17566,    0, 1275,    3,17570,    9,17573,
-    4,17570,    5,17570, 9856,17579, 9805,17579,    9,17582,    9,17579,
- 9805,17586,    5,17571,    3,17591,    0,17592,    0,17591,    3,17596,
-    9,17591, 1275,17601,17595,17603,17599,17603,   17,17591, 9805,17609,
- 1369,17590,   17,17613, 1486,17571,   17,17617, 1369,17571,17577,17621,
-    9,17623,    5,17621,    9,17627,    5,17620,   17,17631,    0,   17,
-    4,17634,  587,17637,  155,17635, 1011,17635, 1369,17634,12377,17645,
-16990,17635,  587,17635,12377,17650,12566,17635,  903,17635,16937,17656,
-12377,17635,  587,17660,16937,17635,  903,17664,    3,17634,  483,17669,
-    2,17635,    4,17673,    0,17674,    0,17673,    4,17678,  587,17673,
-   17,17683,17677,17685,17681,17685,    3,17635, 1369,17691,    0,   15,
-    5,17695,    7,17696, 1369,17694, 5303,17701, 4927,17701,16983,17701,
-17033,17701,    3,17694,    3,17695,10104,17712,10105,17713,17715,17717,
-10104,17713,10105,17712,17721,17723,    1,   13,  113,17727,    0,   12,
-17727,17731,    9,17732,    2,17735,    2,17734,  137,17732,  136,17732,
-    2,17733,17741,17745,    3,17733,17739,17749,17743,17749,    2,17732,
-    9,17754,17749,17757,17749,17755,    3,17732,17737,17763,17745,17763,
-    0,   13,    1,   12, 1369,17771,   33,17771,    3,17770, 8251,17777,
- 3807,17777, 9875,17777, 8165,17777,    3,17771, 8241,17787,17769,17771,
-    9,17791,    2,17792,    2,17793,  137,17791,  136,17791,    2,17791,
-    9,17802,    3,17791,17797,17807,    2,17790,17807,17811,17799,17811,
-    3,17790,17805,17817,17795,17817,17803,17817,17801,17817,    1,  413,
-    4,17826,    2,17826,    5,17826,    6,17833,    6,17832,    3,17826,
-    6,17839,    6,17838, 2653,17827, 1637,17827,14537,17827,14321,17827,
-  260,17826, 2903,17827, 1639,17827, 1641,17827, 3361,17827,  331,17826,
-17521,17827, 4909,17827,14593,17827,  261,17826,  257,17826,   14,17826,
- 1274,17826, 2159,17827, 2161,17827,  251,17827, 2647,17827,  331,17885,
-   15,17826, 1275,17826,14652,17827,    6,17827,17829,17895,17831,17895,
- 8997,17895,17863,17895,17871,17895,17889,17895,17891,17895,    7,17827,
-17833,17911,17839,17911, 8495,17911,  413,17910,    0,17919,17837,17911,
-17843,17911,  265,17911,17921,17927,    1,17927,17919,17931, 2647,17927,
- 8717,17911, 3785,17911,17853,17911,17875,17911,17877,17911,14315,17910,
-  261,17911,    7,17826,17835,17951,17841,17951, 8647,17951,  251,17951,
-    6,17826,    5,17960,17911,17963,    3,17960,17911,17967,15029,17827,
-  265,17971,17895,17973,    7,17971,14315,17827,    6,17978,    7,17978,
-    6,17979,17983,17985,    7,17979,17981,17989,    0,  412, 9036,17993,
- 9099,17993,17829,17993,17895,17998,17831,17993,17895,18002,17896,17993,
-17898,17993,17913,17993,17915,17993,  446,17993, 4371,18015, 4379,17993,
-17900,17993,17917,17993, 4360,17993, 3429,17993,17882,17993, 7039,17993,
-17958,17993,17949,17993,  241,17993,  445,18036, 4371,18039,  445,18037,
- 4349,18043,16097,17993,12289,17993, 8647,17993, 8997,18050, 4349,17993,
-  251,18054,17951,17993,  251,18058,  251,17993, 4349,18062,17827,18062,
-17951,18062,17895,17993,17829,18070,17831,18070, 8997,18070, 5521,17993,
-  375,18079,  445,17993,  241,18082, 4371,18085,    3,18083,    2,18082,
-18089,18091,    2,18083,    3,18082,18095,18097,  465,17993,    5,18101,
-    4,18100,18103,18105,    4,18101,    5,18100,18109,18111, 9082,17993,
- 8495,18115,17910,17993,17833,18119,17839,18119, 8495,18119,  375,17993,
-    7,17993, 8495,18129, 8997,18131,17827,18129,17829,18135,17831,18135,
- 8997,18135, 8997,18128, 8495,18143,17827,18128,17833,18147,17839,18147,
- 8495,18147, 8997,17993, 8647,18154,17895,18154,    7,18154, 8495,18161,
-17827,17993,  241,18164,    6,18167,    6,18166,  265,18165,17895,18173,
-  261,18164,  375,18165,  260,18164,  251,18164,    6,18165,18177,18185,
-    7,18165,18171,18189,18181,18189,    6,18164,18173,18195,  241,18194,
-18189,18199,18189,18195,    7,18164,17833,18205,17839,18205,18169,18205,
-18185,18205, 8495,18205,    1,  843,    0,  842,18217,18219,  483,18220,
-    4,18223,    4,18222,  581,18220,  580,18220,    4,18221,18229,18233,
-    5,18221,18227,18237,18231,18237,    4,18220,  483,18242,18237,18245,
-18237,18243,    5,18220,18225,18251,18233,18251,    0,  413,15309,18257,
-  265,18258,15363,18261,15424,18257,15363,18265,13375,18257,13381,18257,
- 4888,18257,13162,18257,  251,18256,  375,18256,  265,18257,15309,18281,
-15383,18283,15309,18280,15363,18287,  331,18257, 2663,18257,  251,18293,
-    9,18256,  483,18256,  375,18257, 4863,18300,13119,18300, 4863,18257,
-  375,18306,13119,18257,  375,18310,    6,18257,  264,18314,    7,18257,
-  264,18318,  264,18319,  265,18319,18321,18325,  265,18318,18323,18329,
- 8647,18319,  375,18319,  331,18319,    7,18256, 1689,18339, 1705,18339,
- 2701,18339,18317,18339, 8717,18339,12755,18339, 7627,18339, 7895,18339,
- 3785,18339,13443,18339, 7287,18339,  265,18339,  331,18339, 8495,18339,
-  375,18339,12745,18339,  457,18371,  375,18371,    6,18256,18291,18377,
-12745,18257,17895,18381, 8647,18381,    7,18381, 8495,18387,    1,  412,
- 1679,18391,  448,18391, 4349,18395, 4351,18391, 4390,18391,18300,18391,
- 4457,18391,18277,18391, 1673,18391,18279,18391, 1789,18391,18364,18391,
-18335,18391, 3427,18391, 7037,18391,  265,18391,  445,18422, 4349,18425,
-  445,18423, 4371,18429,16095,18391,12287,18391, 5189,18391,18299,18391,
-18297,18391, 2153,18391, 2151,18391, 4371,18391,  331,18446,18339,18391,
-  331,18450,  331,18391, 4371,18454,18339,18454,  445,18391,  265,18460,
- 4349,18463,    5,18461,    4,18460,18467,18469,    4,18461,    5,18460,
-18473,18475,  465,18391,    3,18479,    2,18478,18481,18483,    2,18479,
-    3,18478,18487,18489, 8386,18391,18318,18391,  375,18391,18257,18496,
-    7,18391,  265,18501,18257,18503, 8337,18500,18257,18500, 8337,18391,
-    7,18510, 8861,18391,    6,18515,    7,18515,    6,18514,18519,18521,
-    7,18514,18517,18525,18257,18391,  265,18528,  241,18529,    6,18532,
-    6,18533,  375,18528,  261,18529,  260,18529,  251,18529,    6,18529,
-  241,18546,18531,18547,    7,18529, 8495,18553,18537,18553,    6,18528,
-18553,18559,18541,18559,    7,18528,18549,18565,18535,18565,18547,18565,
-18543,18565,    0,  843,    1,  842,    5,18576,18575,18577,  483,18581,
-    4,18582,    4,18583,  581,18581,  580,18581,    4,18581,  483,18592,
-    5,18581,18587,18597,    4,18580,18597,18601,18589,18601,    5,18580,
-18595,18607,18585,18607,18593,18607,18591,18607,    1, 1217,16117,18617,
-12291,18617,16103,18617, 4959,18617,17399,18617, 2205,18617, 2207,18617,
- 1269,18617,    5,18633,    4,18632,18635,18637,    4,18633,    5,18632,
-18641,18643, 1259,18617,    2,18647,    3,18646,18649,18651,    3,18647,
-    2,18646,18655,18657,    7,18617,    0, 1216,    9,18662,18617,18665,
-  483,18662,18617,18669,18660,18663,    7,18663,18617,18674,18617,18663,
-    6,18679,    7,18679,    6,18678,18683,18685,    7,18678,18681,18689,
-    1, 1531, 4904,18693,17609,18693,17586,18693, 4903,18693,    9,18700,
-17579,18693,    9,18704,    9,18693, 4903,18708,17579,18708,    5,18692,
-    0, 1530,18693,18717,    4,18719,    5,18719,    4,18718,18723,18725,
-    5,18718,18721,18729,    1,   19, 1369,18733,    3,18733,    3,18732,
- 9875,18739,    0,   18,18733,18743,    2,18745,    3,18745,    2,18744,
-18749,18751,    3,18744,18747,18755,    0, 1217,12293,18759,16105,18759,
- 1269,18759,    2,18765,    3,18764,18767,18769,    3,18765,    2,18764,
-18773,18775, 1259,18759,    5,18779,    4,18778,18781,18783,    4,18779,
-    5,18778,18787,18789,  375,18759,    7,18759,    1, 1216,    4,18796,
-18759,18799,    3,18796,    6,18803,    6,18802,    5,18796,    6,18809,
-    6,18808,    2,18796,18759,18815, 5241,18797,   14,18796, 1274,18796,
- 2157,18797, 2155,18797,18795,18797,18799,18829,18815,18829,   15,18796,
- 1275,18796,    6,18796,    3,18838,    5,18838,    7,18796,18805,18845,
-18811,18845,18794,18797,18803,18851,18809,18851,    6,18797,18800,18857,
-18816,18857,18799,18857,18759,18862,18815,18857,18759,18866,18835,18857,
-18837,18857,18759,18857,18799,18874,18815,18874,    7,18797,18841,18881,
-18843,18881,18803,18881,18759,18887,18809,18881,18759,18891,18807,18881,
-18813,18881,18821,18881,18823,18881,18759,18880,18803,18903,18809,18903,
-18759,18797,    6,18909,    7,18909,    6,18908,18913,18915,    7,18908,
-18803,18919,18809,18919,18911,18919,    0, 1531,    1, 1530, 6717,18929,
-    9,18931,18927,18929,    4,18935,    5,18935,    4,18934,18939,18941,
-    5,18934,18937,18945,    0,   19,    1,   18,18949,18951,    2,18953,
-    3,18953,    2,18952,18957,18959,    3,18952,18955,18963,    0,    2,
-11303,18967,11349,18968, 5071,18967, 5097,18972,11350,18967, 5098,18967,
-11304,18967,11307,18981, 5072,18967, 5075,18985,11315,18967, 5079,18967,
-13961,18967,  581,18993,    4,18992,18995,18997,    5,18992,  580,18993,
-19001,19003,    5,18993,    4,18993,  483,19008,19001,19011,  483,18993,
-    4,19014,19001,19017,    4,19015,19007,19021, 1181,18966, 1206,18966,
- 3451,18967,  375,19029, 1967,18967,  375,19033,  567,18966, 4992,19037,
-    9,19037, 4971,19040, 4971,19037,    9,19044, 1141,18966,  555,18966,
-  981,18967,16129,18966,16143,19055, 9523,18967,  483,19059, 9525,19061,
- 1007,18967, 1297,18966,  524,18966,    0,19069,    4,19070,    4,19069,
-    0,19074,   97,18967,11067,18967, 1275,19080, 7947,19083, 1205,18967,
-  571,18967,11070,18967, 7947,19091,10043,18967, 1275,19094,10041,19097,
-10044,18967,10041,19101, 1206,18967, 3001,19105, 1901,19105,   30,18967,
- 8165,19111, 8150,18967,   33,19115, 1181,18967, 3663,19119, 1997,19119,
- 3069,19119, 1923,19119, 9769,18967, 3972,18967, 8124,18967, 9357,18967,
- 9346,18967, 8782,18967, 4244,18967, 4178,18967, 9768,18967, 8804,18967,
- 8245,18967, 8249,18967, 8247,18967, 6950,18967,12299,18967, 4652,18967,
-10684,18967,14096,18967, 4992,18967,  203,18967,11731,19167,17771,18967,
-  113,19171,14223,18967,   85,18967,11731,19177,11031,18967,  113,19181,
-  107,18967,11731,19185,11699,18967,  113,19189, 8701,18967, 9293,18967,
- 3933,18967,    9,19196, 8109,18967,    9,19200, 4213,18967,    9,19204,
- 4147,18967,    9,19208, 8757,18967,    9,19212, 9335,18967,    9,19216,
-10202,18967, 7947,19221,17637,19221,  578,18967, 4935,19227,11349,18967,
-11303,19230, 5097,18967, 5071,19234, 8647,18967,   11,19239,10603,18967,
-  375,19243,10427,19243,10609,19243,    7,19243,10607,19251,    9,19242,
- 4625,18967,  375,19257,   75,19257, 4629,19257,    7,19257, 4627,19265,
-    9,19256,11277,18967,   10,19270,11307,19273,   10,19271,11349,19277,
-  483,19271, 5045,18967,   10,19282, 5075,19285,   10,19283, 5097,19289,
-  483,19283, 6789,18967,    9,19294,  288,18967,  525,18967,19073,19301,
-19077,19301, 1811,19301, 1877,19301,    5,19301,17563,19301, 4861,19301,
- 1290,18967,    5,19317, 3721,19317, 1985,19317,17563,19317, 4861,19317,
-  296,18967, 8861,19329,   12,18967, 8165,19333,   18,18967,   25,18967,
-    9,19338, 8165,19341, 8165,19339,    9,19345, 7971,18967,    9,19348,
-   33,19351,   33,19349,    9,19355,   47,18967,11731,19359,10107,18967,
- 1275,19362, 7947,19365,17637,19365,  113,19363,   59,18967,17635,19373,
-10291,18967,  165,19377,  375,18967,  510,18967,   11,18967, 8165,19385,
-    9,19387,  265,19384,    9,19384, 8165,19393,    9,18967,  567,19397,
- 4971,19399,    6,19397,   25,19396, 8165,19405, 7971,19396,   33,19409,
- 3933,19396, 8109,19396, 4213,19396, 4147,19396, 9335,19396, 8757,19396,
- 8495,19396, 6789,19396, 4625,19396,10603,19396, 4971,19396,14073,19396,
-  567,19396, 4935,19437,   11,19397, 8109,19441, 3933,19441, 8495,19441,
- 7971,19441,  265,19396, 8861,19451,   11,19396, 8165,19455,  483,19396,
-   17,18967, 1275,19460, 4861,19463,17563,19463, 3721,19463, 1985,19463,
-   15,19460,   15,18967, 9731,19474, 1011,19475,  483,19475,   17,19474,
- 6515,18967,  483,19485, 6527,19487, 6557,19487, 6561,19487,14210,18967,
-   17,19495, 4971,18967,    9,19498,14073,18967,    9,19502, 5921,18967,
-  375,19507,10046,18967,   16,18966,    0,19513,    4,19514,19317,19517,
-19463,19517,    4,19513,    0,19522,19317,19525,19463,19525, 8495,19513,
-10351,19513, 4311,19513, 4329,19513, 8717,19513,10055,19513, 3785,19513,
-   14,18966,    6,19545,    2,19546,    2,19545,    6,19550,  482,19545,
-   17,19545,   10,18966,17777,19559, 2215,19559,11307,19559, 5075,19559,
-11713,19559, 2221,19559,11087,19559,10439,19559,10665,19559, 4643,19559,
-11037,19559, 2233,19559, 9195,19559,11277,19559, 5045,19559,19455,19559,
-19333,19559,19393,19559,19385,19559,    9,19597, 9317,19559, 9755,19559,
- 4321,19559,10171,19559, 4295,19559, 3833,19559,10603,19559,    9,19613,
- 4625,19559,    9,19617,    8,18967,   11,19621,   14,18967, 9731,19625,
-   17,19625,   11,18966, 8124,19631, 3972,19631, 8804,19631, 8150,19631,
- 7971,19631,    9,19640, 3933,19631,    9,19644, 8109,19631,    9,19648,
- 8495,19631,    9,19652,    9,19631, 8109,19656, 3933,19656, 8495,19656,
- 7971,19656,    9,18966,10001,19667,    5,19669,    4,19668,19671,19673,
-    4,19669,    5,19668,19677,19679,   16,18967,    7,19683,   10,18967,
-11277,19686,11307,19689, 5045,19686, 5075,19693,11349,19687, 5097,19687,
- 9195,19687,19656,19687,19441,19687,19631,19687,    9,19706,11277,19687,
-11303,19711, 5045,19687, 5071,19715,    9,19687,19631,19718,   19,18967,
-   13,18967,19631,19725,10385,18967,  101,19729,  128,19729,    9,19729,
-  113,19734,  483,19729,10081,19739,11759,19739,10405,19739,  113,19729,
-    9,19746,   67,18967,11613,19751,12216,19751,    9,19751,11731,19756,
-11731,19751,    9,19760,  566,18967,  253,19765, 1471,19765,   53,19765,
-  256,18967,  629,18967, 1413,18967, 1471,19777, 1346,18967,  340,18967,
- 8165,19783,  567,18967, 4935,19787,    9,19789,    9,19786, 4935,19793,
-  305,18967,  959,18967,11731,19799,  759,18967,11731,19803,  331,18967,
-17635,19807, 1325,18967,17635,19811,10001,18967,10003,19815,    4,19817,
-    4,19816,10007,19815,  580,19815,10006,19815,  483,19815,    4,19828,
-    4,19829,  581,19815,    4,19815,10003,19836,  483,19836,    5,19815,
-19819,19843,19833,19843,    4,19814,19835,19849,19823,19849,19843,19849,
-    5,19814,19839,19857,19821,19857,19825,19857,19827,19857,19841,19857,
-19831,19857,19837,19857, 9731,18967,   15,19872, 8495,18967,  483,19877,
-    9,19876, 9195,18967,  113,19883,11731,19883,  241,18967,    7,19888,
-  483,18967,    9,19892,   17,19893,  903,19897,    5,19892,  253,19901,
- 1471,19901,   53,19901,    5,19893, 1505,19909,  903,18967,    7,19913,
- 1275,18967,10043,19916,10041,19919,11067,19916, 7947,19923,17637,19917,
-10107,19927,    0,19916,    4,19931,    0,19932,19917,19935,    7,19932,
-19937,19939,    7,19931,    4,19942,   16,19931,    6,19916,    4,19949,
-    6,19950,19917,19953,    1,19950,19955,19957,    1,19949,    4,19960,
-    8,19916,    4,19965,    1,19966,    1,19965,    4,19970,10107,19916,
- 7947,19975,17637,19975, 7947,19917,11067,19981,10107,19981,    9,19917,
- 2009,19987, 3135,19987,19969,19987,19973,19987, 5231,19987,19957,19987,
-19963,19987,    0,19987, 5175,19987,14065,19987,   17,19916,19525,20009,
-19517,20009, 3721,20009, 1985,20009,    1,20009,19987,20019,20003,20009,
- 4861,20009,17563,20009,    5,19916,    4,19917,    5,19917,  265,18967,
-17635,20035, 5771,20035,    9,20035,   11,20034,   11,20035,    9,20034,
- 8861,20047,  483,20035,    7,20034, 8165,20053,    7,20035, 8495,20057,
-  587,18967,    7,20061,    4,20063,    4,20062,   16,20061,   17,20061,
-    4,20060,20071,20073,    5,20060,20067,20077,20069,20077,    4,20061,
-    7,20082,20077,20085,    5,20061,20065,20089,13947,18967,    5,20092,
-   17,20095,    5,20093,    9,20099,    4,18966, 8770,20103, 8729,20103,
- 8697,20103, 8784,20103, 4266,20103, 9262,20103,    2,20103,    7,20117,
- 8684,20103, 8717,20121,  331,20121, 8647,20103, 8757,20126, 8757,20103,
- 8647,20130,  375,20130, 4213,20103,  375,20136, 9750,20103,19687,20103,
-  347,20103,  386,20103,  340,20103,  331,20149,  375,20103, 8757,20152,
- 4213,20152, 9195,20152,  305,20152,    9,20103,10291,20103,  483,20165,
-   59,20103,   15,20103, 9195,20103,  375,20172,  331,20103,10001,20103,
-    9,20179,  305,20103,  375,20182,    7,20103, 8495,20186, 8717,20189,
-  331,20189, 8495,20187, 8757,20195, 9731,20186,  265,20187, 8757,20201,
- 4213,20201, 9195,20201,  305,20201,  265,20186,  331,20211, 8647,20187,
- 1325,20103,    7,20102, 8495,20219,10351,20219, 4311,20219, 4329,20219,
- 3785,20219,10055,20219, 8717,20219,  483,20103, 1275,20103,  265,20103,
-    7,20239, 8495,20241,  375,20241,    7,20238,  331,20247, 9731,20103,
-    7,20250, 8495,20103,    7,20254, 8717,20257,  331,20257,  483,20255,
-    9,20255,    7,20255, 8647,20267,  375,20267,    5,18966, 9535,20273,
- 9537,20273,    2,20273,    6,20278, 9559,20273,  482,20273, 9563,20273,
- 9362,20273,  922,20273, 1413,20273,   19,20273,   12,20273, 8150,20273,
- 8804,20273,19385,20273, 1290,20273, 9533,20305,  525,20273, 9533,20309,
- 7971,20273,    9,20312,   11,20273,    9,20316,   17,20273, 1275,20320,
- 9533,20323,    9,20273, 9195,20326,   11,20326, 7971,20326, 8495,20326,
- 9195,20273,    9,20336,    6,20273,    5,20341,    2,20340,    5,20340,
-18967,20347,   11,20341,    7,20273,    5,20353,    6,20272,   17,20357,
-    7,20272, 9195,20361,11277,20361, 5045,20361, 9755,20361, 4295,20361,
-10171,20361, 4321,20361, 3833,20361, 9317,20361,  483,20273,  903,20380,
- 1275,20273,   17,20384, 9533,20387,  903,20273,  483,20390, 8495,20273,
-    9,20394, 9731,20273,    6,20398,    7,20398,    6,20399,20403,20405,
-    7,20399,20401,20409,    6,18966,19836,20413,19857,20415,19854,20413,
-19871,20413,19815,20413,    4,20423,19843,20425,    4,20422,19857,20429,
-19477,20413,19145,20413,19875,20413,19843,20413,19849,20438,19849,20413,
-19843,20442,19718,20413,19473,20413,19483,20413,19725,20413,   19,20413,
-   12,20413,19337,20413,19687,20413,    9,20460,19475,20413, 9731,20465,
-   17,20465,    9,20413,19687,20470,   11,20470,   11,20413,    9,20476,
- 8495,20413,    5,20413,    9,20483,    4,20413,19815,20487,19849,20489,
-19815,20486,19857,20493,    5,20412,   17,20497,    7,18966,10439,20501,
-11087,20501,10665,20501, 4643,20501,11307,20501, 5075,20501,17777,20501,
- 2215,20501,18739,20501, 4339,20501,11713,20501, 2221,20501,11037,20501,
- 2233,20501,19626,20501,19129,20501,    0,20501,    4,20534,19301,20537,
-19317,20537,19463,20537,20009,20537,10036,20501,19843,20547, 8800,20501,
- 8714,20501, 5045,20501,11277,20501, 4551,20501,19628,20501,19455,20501,
-19393,20501,19723,20501,19333,20501,  305,20501, 8495,20570,  959,20501,
-19625,20501, 9731,20576,   17,20576,10603,20501,    9,20583, 4625,20501,
-    9,20587,19385,20501,    9,20591,  759,20501,   47,20501,10107,20501,
-  241,20599,  265,20598,10196,20501,   11,20501, 8495,20606,   17,20501,
-19625,20610,   59,20501,10291,20501, 1011,20617,   15,20501, 1325,20501,
- 8495,20501,   10,20624,   10,20625,  305,20624,   11,20624,20629,20633,
-   11,20625,20627,20637, 9731,20501,19625,20640,    4,20501,    7,20645,
-  483,20647,18967,20649,    0,20644,19301,20653,19317,20653,19463,20653,
-20009,20653,20651,20653,    7,20644,19916,20665,20653,20667, 1275,20665,
-18967,20670,20653,20673,18967,20665, 1275,20676,20653,20679,10001,20644,
-19843,20683, 1011,20645,10047,20645,    5,20501, 9287,20691,  331,20501,
-    4,20500, 8495,20697, 4311,20697,10351,20697, 3785,20697, 4329,20697,
- 8717,20697,10055,20697,    5,20500, 9195,20713,11277,20713, 5045,20713,
- 4321,20713, 9755,20713, 4295,20713,10171,20713, 9317,20713, 3833,20713,
-  903,20501,  265,20501,10107,20734, 9195,20501,  241,20739,10001,20501,
-    4,20742,19843,20745,    5,20742,18967,20748,    4,20743,20751,20753,
-19511,20753,19857,20753,    5,20743,    7,18967, 8810,20762, 8811,20762,
-    2,20763,    1,20768,20483,20763, 8495,20773, 8800,20763,20273,20763,
- 8495,20763,   11,20780, 8810,20763,20767,20785,10081,20763, 1011,20789,
- 1010,20788,20791,20793, 1010,20789, 1011,20788,20797,20799,  566,20763,
-   11,20763, 9731,20805, 8495,20805, 8495,20804,  265,20763,20482,20763,
-   17,20815,  567,20763, 9195,20819,    9,20763, 8811,20763,20765,20825,
-  241,20762,  265,20762, 8165,20831, 1011,20763,  375,20763,    4,20762,
-20815,20839,    5,20762,11276,20842, 5044,20842,11277,20842,11276,20843,
-20849,20851, 5045,20842, 5044,20843,20855,20857,20773,20843,20470,20843,
-20103,20843,20413,20843,    9,20866, 9195,20843,11277,20843,20845,20873,
- 5045,20843,20847,20877,    9,20843,20413,20880,    4,20763,20480,20885,
-    7,20884,20843,20889, 9366,20885,    1,20885,    3,20894,20842,20896,
-20843,20897,20899,20901,20889,20900,20842,20897,20843,20896,20907,20909,
-20890,20897,20889,20897,20843,20914,    3,20885,    1,20918,20842,20920,
-20843,20921,20923,20925,20889,20924,20842,20921,20843,20920,20931,20933,
-20890,20921,20889,20921,20843,20938, 9195,20885,  483,20942,20866,20885,
- 8495,20885,20413,20948,  483,20885, 9195,20952,20413,20885, 8495,20956,
-20843,20956,20843,20885,    1,20962,    3,20964,    3,20962,    1,20968,
-    7,20963,20897,20973,20921,20973,20967,20973,20971,20973,20413,20962,
-    5,20763,    7,20985,   17,20985,20413,20989,20413,20984,20839,20993,
-   17,20993,  483,20984,20839,20985,    1,21001,    3,21002,    3,21001,
-    1,21006,    7,21000,21005,21011,21009,21011,20413,21001,20413,20763,
-    5,21019,20885,21021,    9,21021,    5,21018,20839,21027,   17,21027,
-  483,20763,    5,21032,    5,18967,    0,21037,    3,21038, 9357,21037,
-20742,21037,20761,21045,20187,21037, 8495,21049,20501,21037,10001,21036,
-20753,21055,20763,21037, 8495,21059,13947,21036,   17,21063,  256,21037,
-20186,21037,20885,21037,    7,21071,20897,21073,20921,21073,    9,21037,
- 1275,21079, 9533,21081,21041,21081,   17,21037, 9195,21087, 7971,21087,
- 8495,21087,  483,21036,  253,21095, 1471,21095,   53,21095, 1275,21036,
-    6,21036,20640,21105,20610,21105,21069,21105, 9731,21105,20501,21112,
-20501,21105, 9731,21116,   17,21116,   17,21105,20501,21122,    7,21036,
-11276,21126, 5044,21126,11277,21126,11276,21127,21133,21135, 5045,21126,
- 5044,21127,21139,21141,    1,21127,    3,21144,18967,21147,    3,21127,
-    1,21150,18967,21153,18967,21127,20470,21127,21049,21127,20413,21127,
-    9,21162,20103,21127, 9195,21127,11277,21127,21129,21171, 5045,21127,
-21131,21175,    9,21127,20413,21178,    6,21037,21149,21183,21155,21183,
-20254,21183,19243,21183,19257,21183,18967,21183,    1,21183,    3,21196,
-21126,21198,21127,21199,21201,21203,21126,21199,21127,21198,21207,21209,
-    3,21183,    1,21212,21126,21214,21127,21215,21217,21219,21126,21215,
-21127,21214,21223,21225, 8495,21183,20103,21228,19687,21183,20843,21183,
-21166,21183,   11,21183,20501,21239,20103,21183, 8495,21242,21127,21242,
-21127,21183,20103,21248,20763,21183, 9731,21253,   17,21253,    7,21037,
-19625,21259,   15,21259,20413,21263,20103,21258,21105,21267,  241,21258,
-21105,21259,20103,21273,20103,21037,    7,21277,21199,21279,21215,21279,
-11277,21279, 5045,21279,21183,21279,    6,21276,    1,21291,    3,21292,
-21279,21295,    3,21291,    1,21298,21279,21301,    7,21276,21105,21305,
-  241,21037,  483,21309,    7,21308,    4,18967,21183,21315,    0,21314,
-20309,21319,  524,21319,20273,21323,20305,21319, 1291,21319,20273,21329,
-21081,21319,20323,21319,20387,21319,   11,21319,  483,21338,20273,21341,
-  483,21319,   11,21344,20273,21347,  165,21315,17635,21315, 1011,21352,
-17642,21315,20413,21315,    6,21359,    9,21315,20352,21315,11277,21365,
- 5045,21365,20985,21315,   11,21315,10075,21315,  483,21315, 1347,21315,
-    6,21314,    1,21381,    3,21382,21365,21385,    3,21381,    1,21388,
-21365,21391,20273,21381,   11,21381,    7,21314,    6,21315,   17,21401,
-    7,21315,21384,21404,21390,21404,21385,21405,20273,21411,21407,21411,
-21391,21405,20273,21417,21409,21417,21385,21404,21384,21405,21423,21425,
-21391,21404,21390,21405,21429,21431,11276,21404, 5044,21404,11276,21405,
-11277,21404,21439,21441, 5044,21405, 5045,21404,21445,21447,    0,21405,
-    4,21450,    4,21405,    0,21454, 8495,21405, 5045,21405,20273,21461,
-21437,21461,11277,21405,20273,21467,21435,21467,    9,21405,20273,21404,
-21385,21475,21391,21475,11277,21475, 5045,21475,  265,21405,  483,21405,
-18967,21487,21453,21489,21457,21489,21381,21405,20273,21315,    6,21497,
-    1,21499,    3,21500,    3,21499,    1,21504,    7,21496,21503,21509,
-21507,21509,21385,21509,21391,21509,11277,21509, 5045,21509, 1011,21315,
-17635,21522,    6,18967,    2,21526,   11,21529,20103,21527,20690,21527,
-    9,21535,21259,21527,    9,21539,   17,21527,    4,21526,   11,21545,
-    5,21526,20640,21549,21259,21549,20610,21549, 9731,21549,20501,21556,
-20501,21549, 9731,21560,   17,21560,   17,21549,20501,21566,    4,21527,
-   15,21571,    5,21527,  482,21575,    2,21575,    6,21578,    6,21575,
-    2,21582,    9,21575,20501,21587,20501,21574,    9,21591,20501,21527,
-    5,21595,   17,21597,    5,21594,    9,21601,    1,    3,19718,21604,
-19719,21604,19402,21605,20962,21604,20973,21613,21248,21604,21272,21604,
-21494,21604,20963,21604,21249,21604,21001,21604,21011,21627,21273,21604,
-21495,21604,21178,21604,20880,21604,21179,21604,20881,21604,21049,21604,
-20773,21604,21361,21604,15753,21605,  803,21649,14387,21605,  375,21653,
- 9663,21604, 9177,21604,20351,21604,20485,21604,21360,21604,  990,21604,
- 4745,21667,19685,21605,21087,21671,21156,21605,21087,21675,21317,21605,
-21291,21604,21279,21681,21499,21604,21509,21685,  996,21604, 4745,21689,
-21472,21604,21473,21604,  761,21605, 3419,21697, 6469,21697, 3119,21697,
-21048,21604,20772,21604,  973,21604,  955,21708, 4745,21711,    9,21708,
- 4745,21715, 4745,21709,  955,21719,    9,21719, 2077,21605,    7,21725,
-   14,21724,21727,21729,    6,21725,   15,21724,21733,21735,20350,21604,
-20484,21604, 9662,21604, 9176,21604,21380,21604,21104,21604,21126,21604,
-21183,21751,    9,21751,20842,21604,20885,21757,    9,21757,  305,21604,
-18967,21763,  375,21765,  955,21604,  973,21769, 4805,21771,  973,21768,
- 4745,21775,17423,21769, 4745,21769,  713,21604,21404,21604,21381,21785,
-    9,21785,20884,21604,21316,21605,21182,21604,20501,21795,21793,21795,
-21405,21604,21381,21800,    9,21800,20885,21604,20843,21806,20890,21807,
-20889,21807,20843,21812,20973,21807,21073,21807,20413,21807,20843,21807,
-21757,21823,20889,21822,21183,21604,21127,21828,21279,21829,21679,21829,
-20103,21829,21127,21829,21751,21839,21105,21604,21381,21604,21365,21845,
-21405,21844,20413,21845,21475,21845,21405,21845,21785,21855,20273,21855,
-21509,21845,20843,21604,20885,21862,    9,21862,21127,21604,21183,21868,
-18967,21869,21183,21873,    9,21868, 1199,21605,13923,21604,13935,21881,
- 9437,21605,  587,21885, 9439,21887, 1177,21605, 1421,21604,  668,21604,
-    1,21895,    5,21896,    5,21895,    1,21900,  117,21605,11759,21605,
- 1369,21906, 7971,21909,11760,21605, 7971,21913,  809,21605,  989,21605,
- 9929,21605, 1369,21920, 9927,21923, 9930,21605, 9927,21927,19596,21605,
-    9,21931,19556,21605,20170,21605,19707,21605,    9,21939,20956,21605,
-21791,21943,21242,21605,21795,21947,20773,21605,21707,21951,21049,21605,
-21705,21955,21373,21605,20464,21605,19557,21605,20499,21605,20359,21605,
- 9181,21605, 9671,21605, 4145,21605, 3801,21605, 4135,21605,10101,21605,
-20577,21605,19656,21605,19441,21605,19332,21605,19392,21605,19454,21605,
-21059,21605,19440,21605,19657,21605, 4134,21605,10100,21605,20498,21605,
-20358,21605,20142,21605,    9,22007,20576,21605,20864,21605,    9,22013,
-21116,21605,21166,21605,21183,22019,    9,22019,21560,21605, 9180,21605,
- 9670,21605, 3800,21605, 4144,21605,21026,21605,20839,22035,20814,21605,
-20839,22039,20992,21605,20839,22043,21359,21605,21845,22047,21647,22047,
-21053,21605,21795,22053,20779,21605, 8087,21605, 8091,21605, 8089,21605,
-20303,21605,    9,22065,20465,21605,10786,21605,11131,21605, 4696,21605,
-11970,21605,19722,21605,19333,21605,19393,21605,19455,21605,20351,21605,
-21739,22087,20485,21605,21741,22091, 9663,21605,21743,22095, 9177,21605,
-21745,22099,20350,21605,21661,22103,20484,21605,21663,22107, 9662,21605,
-21657,22111, 9176,21605,21659,22115,10099,21605,   17,22119,   17,22118,
- 4133,21605,   17,22125,   17,22124, 8251,21605,    9,22131, 3807,21605,
-    9,22135,   13,21604,18967,22139,   19,21604,20501,22143, 9875,22143,
-   12,21604, 8251,22149, 3807,22149,19559,22149,20501,22149, 9875,22149,
- 8165,22149,   18,21604, 3799,21605,   17,22165,   17,22164, 4143,21605,
-   17,22171,   17,22170, 4283,21605,    9,22177, 4279,21605,    9,22181,
- 9669,21605,   17,22185,   17,22184, 9179,21605,   17,22191,   17,22190,
- 9673,21605,    9,22197, 9967,21605,    9,22201,19624,21605,20501,22205,
-   17,22205,19686,21605,22149,22211,19441,22211,19656,22211,21607,22211,
-19631,22211,    9,22220,    9,22211,19631,22224,19559,21605,19385,22228,
-    9,22231,    9,22229,19545,21605,   17,22236,   17,22237,10102,21605,
- 7971,22243,17053,22243,  629,21605,21117,21605,21561,21605,20867,21605,
-20885,22255,21167,21605,21183,22259,21548,21605,   17,22263,20501,22263,
-21104,21605,21069,22269,21267,22269,21305,22269,21259,22269,20103,22277,
-   17,22269,20501,22269,20838,21605,20985,22285,20842,21605,21865,22289,
-21809,22289,21613,22289,21637,22289,21867,22289,20773,22289,20956,22289,
-21863,22289,20885,22305,    9,22305,20885,22289,20413,22310,20413,22289,
-20885,22314,21126,21605,21871,22319,21831,22319,21617,22319,21635,22319,
-21877,22319,21049,22319,21242,22319,21869,22319,21183,22335,    9,22335,
-21183,22319,20103,22340,20103,22319,21183,22344,21020,21605,20885,22349,
-21278,21605,21183,22353,21052,21605,21829,22357,21127,22357,21358,21605,
-21747,22363,21665,22363,21532,21605,20497,21605,   17,22371,   17,22370,
-20361,21605,    9,22377,20713,21605,    9,22381,20357,21605,   17,22385,
-   17,22384,21048,21605,21643,22391,20772,21605,21645,22395,21509,21605,
-21381,22399,21499,22399,    9,22399,21475,21605,21381,22407,    9,22407,
-21365,21605,21381,22413,    9,22413,11971,21605, 4697,21605, 8387,21605,
-    9,22423,11949,21605,   11,22426,    5,22428,    6,22426,    5,22432,
-    5,22426,    6,22436,    6,22437,    7,22426,22441,22443,    7,22427,
-22435,22447,22439,22447,22431,22447,   14,22426,22447,22455,    6,22427,
-   15,22426,22459,22461,    9,22426,    9,22427, 4669,21605,   11,22468,
-    5,22470,    6,22468,    5,22474,    5,22468,    6,22478,    6,22479,
-    7,22468,22483,22485,    7,22469,22477,22489,22481,22489,22473,22489,
-   14,22468,22489,22497,    6,22469,   15,22468,22501,22503,    9,22468,
-    9,22469,12345,21605,    5,22510,    4,22510,   12,22510,   13,22511,
-22517,22519,   12,22511,   13,22510,22523,22525,    4,22511,22513,22529,
-    5,22511,22515,22533, 5123,21605,    5,22536,    4,22536,   12,22536,
-   13,22537,22543,22545,   12,22537,   13,22536,22549,22551,    4,22537,
-22539,22555,    5,22537,22541,22559,10697,21605,    9,22562,19385,21605,
-19559,22566,    9,22569,    9,22567,19559,22573,19397,21605,    6,22576,
-   11,22577,   11,22576,19475,21605,20413,22584, 1406,21605, 1396,21605,
-  525,21605,  903,22593,  934,21605,    9,22597, 1290,21605,  903,22601,
-  669,21605,21899,22605,21903,22605, 1861,22605, 1887,22605,    4,22605,
-17013,22605, 4917,22605,19687,21605,22139,22621,21609,22621,    9,22621,
-20103,22620,    9,22629,19625,21605,20501,22632,19384,21605,21087,22637,
-20326,22637,    9,22636,20273,22637,    9,22644,    9,22637,20273,22648,
-19396,21605,    5,22652,   10,22652,19441,22657,   10,22653,19455,22661,
-   11,22652,22661,22665,   11,22653,22657,22669,19474,21605,20413,22673,
- 1418,21605,    4,22677, 3755,22677, 1995,22677,17013,22677, 4917,22677,
-   12,21605,22139,22689,18967,22688,   18,21605,22143,22695,21252,21605,
-21279,21605,21183,22701,21291,22701,    9,22701,20483,21605,20763,22708,
-20187,21605,21036,22712,21069,22715,21036,22713,21049,22719,21037,22713,
-21037,22712,    9,22713,20353,21605,    5,22729,21315,22729,   33,21605,
- 8150,22735,17727,22735,    9,22735, 7971,22740, 7971,22735,    9,22744,
-17025,22735, 8165,21605,   30,22751,  181,22751,    9,22751,   25,22756,
-   25,22751,    9,22760,  145,22751,   53,21605,17049,22767,10219,21605,
-  903,22771,  155,22771,10081,21605, 1369,22776, 7971,22779,17053,22779,
-  257,21605,    9,22785, 1171,21605, 4722,22789, 4713,22789,  903,22792,
-21315,22789,  903,22789, 4713,22798,  628,21605,    9,22803,   11,21605,
-  766,22807,  767,22807,20984,22807,20762,22806,22813,22815,20985,22807,
-20762,22807,22140,22807,19718,22807,19725,22807,  586,22806,22809,22829,
-    5,22807,20763,22832,22815,22835,20763,22833,22821,22839,  587,22832,
-22829,22843,  587,22833,  586,22807,22847,22849, 5515,22807,17043,22807,
- 4825,22807,17727,22807, 8150,22807,22139,22807,18967,22862,19396,22806,
-19397,22806,19396,22807,22869,22871,19397,22807,22867,22875,22653,22875,
-20763,22807,    5,22880,22815,22883,19687,22807,    9,22886, 7971,22807,
-    9,22890,19461,22807,    9,22807,19687,22896, 7971,22896,18967,22896,
-18967,22807,22139,22904,    9,22904,20103,22905,    9,22911, 1369,22806,
-  903,22806,    9,22917,  587,22807,    5,22920,22829,22923,18967,22806,
-20326,22927,21087,22927,    9,22926,20273,22927,    9,22934,    9,22927,
-20273,22938,    9,22806,18967,22942,20763,22806,22819,22947,  587,22806,
-22811,22951,    9,22951,   17,21605,19722,22956,19723,22957,22959,22961,
-19723,22956,19722,22957,22965,22967,19396,22956,19396,22957,19397,22956,
-22973,22975,19545,22956,20497,22956,20357,22956, 4133,22956,10099,22956,
- 3799,22956, 4143,22956, 9179,22956, 9669,22956,19475,22957,21315,22957,
-19397,22957,22971,23001, 1369,22956, 1275,22956,  903,23007,  587,22957,
-  903,22957,   15,21605,20103,23014,18967,23015,20501,23019, 1369,23014,
- 4917,23023,17013,23023, 3755,23023, 1995,23023,18967,23014,20413,23033,
-    9,21605,19631,23036,19384,23036,19384,23037,22567,23043,19385,23036,
-10697,23036, 4669,23036,11949,23036,   11,23037,23047,23055,22567,23055,
-18967,23055,18967,23036,   10,23062,   10,23063,   11,23062,23067,23069,
-   11,23063,23065,23073,   11,23036,18967,23076, 7049,21605,  587,23081,
- 7051,23083, 7055,23083, 7059,23083,17219,21605,  903,23091, 4663,21605,
-  903,23095, 4745,21605,  955,23099,    9,23099, 4569,21605,17423,21605,
-  955,23107,    9,23107,14625,21605, 5997,21605,    7,23114,    5,23114,
-    6,23119,23117,23121,    6,23118,    6,23114,    5,23126,    7,23115,
-23129,23131,23125,23131,   14,23114,23131,23137,    6,23115,   15,23114,
-23141,23143,20482,21605,20762,23146,20773,23149,20762,23147,20815,23153,
-20839,23147,21399,23147,19683,23147,20763,23147,20843,23163,23149,23163,
-20763,23146,20839,23169,23153,23169,20186,21605,21036,23174,21049,23177,
-21036,23175,21069,23181,  331,23175,   59,23175, 1325,23175,  265,23175,
-20644,21605,20352,21605, 9660,21605, 8386,21605,   59,23199,  331,23199,
- 1325,23199,  265,23199,21243,21605,21829,23209,20957,21605,21807,23213,
-21272,21605,21631,23217,20962,21605,    9,23221,21248,21605,21625,23225,
-21549,21605,20501,23228,21105,21605,20501,23232,20843,21605,21758,23237,
-21623,23237,21760,23237,21641,23237,20885,23237,21757,23246,20889,23247,
-21757,23237,20885,23252,    9,23252,20103,23236,    9,23259,    9,23237,
-21757,23262,20885,23236,    9,23267,21127,21605,21752,23271,21625,23271,
-21754,23271,21639,23271,18967,23270,21087,23281,21183,23271,21751,23284,
-21751,23271,21183,23288,    9,23288,20103,23270,21183,23295,    9,23295,
-    9,23271,21751,23300,21405,21605,21633,23305,21394,23305,21786,23305,
-21381,23305,20273,23312,21785,23312,20326,23305,21087,23305,21695,23305,
-21037,23305,21036,23304,23325,23327,21036,23305,21037,23304,23331,23333,
-21788,23305,21785,23305,21381,23338,    9,23338,    9,23305,20273,23344,
-21785,23344,20273,23305,21381,23350,    9,23350,21259,21605,21843,23357,
-20885,21605,20763,23360,    5,23363,18967,23362,    6,23360,18967,23368,
-18967,23360,    6,23372,    6,23373,    7,23360,23377,23379,    7,23361,
-23365,23383,    4,23383,23363,23387,23371,23383,23375,23383,23367,23383,
-21526,23360,23383,23397,    6,23361,21527,23360,23401,23403,    9,23361,
-20843,23407,21791,23361,20413,23411,20413,23360,21791,23415,20843,23360,
-    9,23419,21183,21605,21315,23422,21795,23425,21795,23423,20103,23429,
-20103,23422,21795,23433,20763,23422,21249,21605,21617,23439,21001,21605,
-    9,23443,21273,21605,21619,23447,21371,21605,    9,23451,21253,21605,
-    8,21604,22363,23457,22053,23457,21983,23457,23039,23457,21985,23457,
-22077,23457,22075,23457,22465,23457,22507,23457,23053,23457,23051,23457,
-20501,23457,23037,23457,19631,23483,11949,23483, 4669,23483,18967,23457,
-   10,21604,22870,23493,22869,23493,22867,23493,23041,23493,22583,23493,
-21995,23493,22665,23493,21991,23493,19441,23493,22626,23493,21997,23493,
-19656,23493,22908,23493,22902,23493,22419,23493,22421,23493,11970,23493,
- 4696,23493,21987,23493,23069,23493,21989,23493,23079,23493,22643,23493,
-22933,23493,22945,23493,22693,23493,22904,23493,    9,23546,22896,23493,
-18967,23550,22621,23493,    9,23554,19396,23493,22807,23558, 8647,23493,
-22637,23493,    9,23565,23077,23493,18967,23569,22689,23493,18967,23573,
-22927,23493,    9,23577,22943,23493,18967,23581,22807,23493,19396,23584,
-19396,23585,18967,23584,    9,23590,    9,23584,18967,23594,18967,23585,
-    9,23598,    9,23585,18967,23602,19631,23493,    9,23606,18967,23493,
-22896,23610,22807,23610,    9,23614,    9,23610,22807,23618,    9,23493,
-11949,23622, 4669,23622,22621,23622,19631,23622,22904,23622,22807,23622,
-18967,23634,18967,23622,22807,23638, 4669,23493,    9,23642,11949,23493,
-    9,23646,   16,21604,22979,23651,21935,23651,22239,23651,22389,23651,
-22375,23651,22001,23651,21999,23651,22005,23651,22003,23651,22123,23651,
-22129,23651,22983,23651,22981,23651,22987,23651,22985,23651,22989,23651,
-22995,23651,22993,23651,22991,23651,22169,23651,22029,23651,22027,23651,
-22175,23651,22031,23651,22189,23651,22195,23651,22033,23651,    7,23651,
-    3,23706,    3,23651,    7,23710,  586,23651,22957,23651,19545,23717,
-20357,23717,20497,23717,10099,23717, 4133,23717, 3799,23717, 9669,23717,
- 9179,23717, 4143,23717,19559,23651,20713,23651,20361,23651, 9967,23651,
- 9673,23651, 4283,23651, 3807,23651, 8251,23651, 4279,23651,   14,21604,
-23175,23755,23199,23755,    5,23755,    1,23760,22677,23763,23023,23763,
-    1,23755,    5,23768,22677,23771,23023,23771,16381,23755,14625,23755,
- 4569,23755,13325,23755, 8685,23755,19513,23755, 1369,23755,   17,23755,
-20219,23755, 4063,23755,10273,23755,20697,23755, 4137,23755, 8401,23755,
- 9955,23755, 3863,23755,19631,21605,   11,23808,    5,23810,    6,23808,
-    5,23814,    5,23808,    6,23818,    6,23819,    7,23808,23823,23825,
-    7,23809,23817,23829,23821,23829,23813,23829,   14,23808,23829,23837,
-    6,23809,   15,23808,23841,23843,    9,23808,23457,23847,    9,23809,
-19667,21605,    5,23852,    4,23852,   12,23852,   13,23853,23859,23861,
-   12,23853,   13,23852,23865,23867,    4,23853,23855,23871,    5,23853,
-23857,23875,    8,21605,23646,23879,23642,23879,23606,23879,23851,23879,
-22467,23879,22509,23879,19384,23879,19631,23879,23493,23894,23493,23879,
-11949,23898, 4669,23898,19631,23898,11949,23879,23493,23906, 4669,23879,
-23493,23910,18967,23879,   11,23914,   11,23915,23493,23919,   11,23879,
-18967,23922,   14,21605,18967,23926,20501,23929,   17,23929,18967,23927,
-20413,23935,   16,21605,22241,23939,22387,23939,22373,23939,22121,23939,
-22127,23939,22167,23939,22173,23939,22187,23939,22193,23939,19545,23939,
-10099,23939, 4133,23939, 3799,23939, 4143,23939, 9669,23939, 9179,23939,
-20357,23939,20497,23939,19625,23939,21549,23939,21105,23939,   11,21604,
-23053,23983,23051,23983,23039,23983,21985,23983,22085,23983,    5,23982,
-    6,23995,21983,23983,22077,23983,22075,23983,22081,23983,22083,23983,
-22572,23983,23847,23983,22465,23983,22507,23983,22211,23983,    9,24017,
-19396,23983,22567,23983,    9,24022, 8165,23983,    9,24027,23037,23983,
-11949,24031, 4669,24031,19631,24031,19559,23983,    9,24039, 8251,23983,
-    9,24043, 3807,23983,    9,24047, 9875,23983,    9,24051,20501,23983,
-    9,24055,    9,23982, 8251,24059, 3807,24059,22211,24059,19559,24059,
-20501,24059, 9875,24059, 8165,24059,    9,23983,22567,24074,18967,24074,
-18967,23983,21183,24081,23997,24081,  375,24081,    7,24081,23995,24089,
-    9,24080,    9,21604,22869,24095,23894,24095,21997,24095,21365,24095,
-21475,24095,21509,24095,21405,24094,22047,24095,22357,24095,23919,24095,
-21995,24095,22583,24095,23906,24095,23910,24095,21127,24094,22319,24125,
-20843,24094,22289,24129,22419,24095,22421,24095,21279,24095,  973,24094,
- 4745,24139,19559,24095,20361,24095,20713,24095, 9673,24095, 9967,24095,
- 4283,24095, 4279,24095, 8251,24095, 3807,24095,   33,24095, 7971,24161,
- 8165,24095,   25,24165, 9875,24095,20501,24095, 4745,24095,17423,24095,
-21405,24095,20273,24177,21785,24177,19631,24095,23879,24182, 4669,24095,
-23879,24186,11949,24095,23879,24190,  973,24095, 4805,24195,19687,24095,
-23493,24199,23879,24095,19631,24202,11949,24202, 4669,24202,20413,24095,
-   11,24094, 8251,24213, 3807,24213,22211,24213,19559,24213,20501,24213,
- 9875,24213, 8165,24213,21127,24095,21751,24229,20843,24095,21757,24233,
-   11,24095,19687,24237,23610,24237,23493,24237,18967,24242, 7971,24237,
-18967,24237,23493,24248,18967,24095,   10,24252,24213,24255,   10,24253,
-24237,24259,  483,24253,   10,21605,23893,24265,24020,24265,22581,24265,
-22669,24265,19455,24265,23917,24265,19333,24265,23073,24265,19393,24265,
-23060,24265,24092,24265,23925,24265,24078,24265,23651,24265, 9755,24265,
- 9317,24265, 4321,24265, 3833,24265,10171,24265, 4295,24265,22149,24265,
-18967,24307,24213,24265,18967,24311,24059,24265,18967,24315,21183,24265,
-19396,24265,23983,24320,19559,24321,  922,24265, 1413,24265,19683,24265,
-24074,24265,18967,24332,23055,24265,18967,24336,24080,24265,    9,24340,
-20839,24265,21399,24265,19385,24265,23879,24349,    9,24349,23983,24265,
-19396,24355,19396,24354,18967,24355,    9,24360,    9,24355,18967,24364,
-18967,24354,    9,24368,    9,24354,18967,24372,18967,24264,19441,24377,
-24213,24377,24059,24377,22149,24377,19656,24377,19631,24377,    9,24388,
-23983,24377,    9,24393,    9,24377,19631,24396,  903,24265,  483,24400,
-  483,24265,  903,24404,18967,24265,23055,24408,24074,24408,19559,24409,
-    9,24415,    9,24408,23983,24418,19559,24419,23983,24408,    9,24424,
-    9,24265,24080,24428,18967,24428,19559,24433,23983,24432,23983,24428,
-18967,24438,18967,24429,19631,24443,   17,21604,21963,24447,23958,24447,
-23972,24447,23974,24447,23960,24447,23962,24447,21979,24447,21977,24447,
-21967,24447,21965,24447,23964,24447,23966,24447,23968,24447,23970,24447,
-21971,24447,21969,24447,21975,24447,21973,24447,22807,24447,19545,24447,
-23939,24486,20357,24447,23939,24490,20497,24447,23939,24494, 9669,24447,
-23939,24498, 9179,24447,23939,24502, 3799,24447,23939,24506, 4143,24447,
-23939,24510,10099,24447,23939,24514, 4133,24447,23939,24518,23939,24447,
-19545,24522,20357,24522,20497,24522,10099,24522, 4133,24522, 3799,24522,
- 9669,24522, 9179,24522, 4143,24522,   15,24446,   15,21604,23357,24545,
-22713,24545,22423,24545, 8337,24545,20103,24545,   17,24544,  483,24545,
-   19,21605,22163,24561,18967,24560,   13,21605,24080,24567,22149,24567,
-23983,24567,18967,24572,18967,24567,23983,24576,  113,21605,10385,24581,
-23879,24583,    9,24583,11731,21605,   67,24589,23879,24591,    9,24591,
-  137,21605,12261,21605,  587,24599,10107,24601,11067,24601,12285,24601,
- 1346,21605, 1505,24609,  256,21605, 8495,24613,10107,24613, 1486,21605,
-  803,24619, 1504,21605,20029,24623,21103,24623,19781,24623,  973,21605,
- 2845,24631, 4812,24631,  955,24631, 4805,24636, 2971,24631, 4814,24631,
-    9,24631, 4805,24644, 4805,24631,  955,24648,    9,24648,  341,21605,
-  803,24655,17049,24655,20884,21605,21820,24661,21807,24661,20413,24664,
-20413,24661,21807,24668,21182,21605,21195,24673,21836,24673,21829,24673,
-20103,24678,20103,24673,21829,24682,20984,21605,20839,24687,20413,24689,
-20413,24686,20839,24693,21258,21605,23755,24697,21749,24697,21574,21605,
-    9,24703,21404,21605,24109,24707,21803,24707,21849,24707,21621,24707,
-21693,24707,21805,24707,21801,24707,21381,24721,    9,24721, 1141,21605,
-17025,24727, 1447,21605,17025,24731,  253,21605,17049,24735, 1471,21605,
-17049,24739,21018,21605,    5,24742,20839,24745,    5,24743,20885,24749,
-21276,21605,    7,24753,20413,21605,    6,24756,    4,24759,18967,24760,
-18967,24759,    4,24764,    4,24765,21314,24759,21570,24756,21571,24757,
-24773,24775,    6,24757,21314,24778,21314,24779,20885,24757,24661,24785,
-21571,24756,21570,24757,24789,24791,21315,24757,24783,24795,21381,24757,
-20885,24756,21791,24801,19475,24756,20984,24756,20839,24807,21315,24756,
-21747,24811,24781,24811,23457,24811,    5,24756,20762,24819,20762,24818,
-24763,24819,24767,24819,20839,24819,21399,24819,24771,24819,19683,24819,
-20763,24819,20843,24837,24823,24837,20763,24818,24821,24843,20839,24843,
-    5,24757,24769,24849,20885,24849,24661,24849,20763,24756,    5,24856,
-20839,24859,    5,24857,20885,24863,20103,21605,21183,24867,21127,24869,
-24673,24869,   15,24866,21183,24866,21795,24877,   15,24867,19687,24866,
-    9,24883,19625,24866,20843,24866,    9,24889,21549,24866,21127,24866,
-21183,24895,    9,24895,21105,24866,20763,24866,    5,24903,21527,24866,
-    9,24867,19687,24909,20843,24909,21127,24909,    6,24866,21036,24917,
-    5,24917,18967,24920,18967,24917,    5,24924,21036,24916,    5,24916,
-18967,24930,24881,24917,18967,24916,    5,24936,    7,24866,23755,24941,
- 1325,24941,  331,24941,   59,24941,  265,24941,    7,24867,23929,24953,
-22205,24953,24919,24953,24923,24953,24927,24953,24929,24953,24933,24953,
-24939,24953,24905,24953,    4,24953,24903,24973,22269,24953,22263,24953,
-  375,24953,21037,24953,24917,24983,    6,24867,    5,24986,24941,24989,
-24901,24987,24893,24987,24887,24987,21037,24866,24987,24999,    7,24999,
-20273,21605,21258,25004,21259,25005,25007,25009,21183,25005,21259,25004,
-21258,25005,25015,25017,  375,25005,    6,25004,    7,25004,    7,25005,
-25023,25027,21315,25027,    6,25005,25025,25033,20501,21605,    7,25036,
-    4,25039,    4,25038,20885,25037,    7,25037,18967,25047,    5,25049,
-    5,25048,    5,25047,18967,25054,    5,25046,21036,25047,21037,25037,
-22269,25063,21105,25063,   16,25036,   10,25037,  803,25037,  903,25037,
-    9,25037,   17,25036,19625,25036,21105,25036,21549,25036,21037,25036,
-21829,25087,25059,25087,21127,25087,24095,25087,25071,25087,   11,25037,
-    4,25036,    7,25100,25051,25101,    5,25036,25041,25107,18967,25106,
-25099,25111,    5,25037,25103,25115,25043,25115,25087,25115,    7,25114,
-25087,25123,25069,25115,    4,25037,25111,25129,25057,25129,25053,25129,
-25061,25129,25079,25129, 9165,21605, 9168,25140, 9169,25141,25143,25145,
- 9169,25140, 9168,25141,25149,25151, 8337,21605,   15,25155,    6,25155,
-    5,25158,    7,25155,  375,25163,    6,25154,25157,25167,    7,25154,
-25161,25171,23755,25171,   59,25171,  331,25171, 1325,25171,  265,25171,
- 9617,21605, 9630,25184, 9631,25185,25187,25189, 9629,25185, 9631,25184,
- 9630,25185,25195,25197,  375,25185,    6,25185,    7,25185,    6,25184,
-25205,25207,    7,25184,25203,25211, 9875,21605,    7,25214,    4,25216,
-    4,25217, 9893,25215,   16,25214,  803,25215,    9,25215,   17,25214,
-  903,25215,    4,25215,25231,25235,    5,25215,25219,25239,25225,25239,
-    4,25214,    7,25244,25239,25247,    5,25214,25221,25251,  843,21605,
-    9,25255,  413,21605,    7,25259,  375,25259, 1530,21605,    9,25265,
- 1216,21605,    7,25269,21497,21605,    7,25273,21277,21605,    7,25276,
-21183,25279,    7,25277,21105,25283,21019,21605,    5,25286,20885,25289,
-    5,25287,20839,25293,  265,21605,    7,25297, 7971,25299,  587,21605,
-   11,25302,    9,25305,    9,25303,   11,25309,    5,25303,20501,25313,
- 9875,25313,  903,21605,    9,25319,   11,25321,   11,25318,    9,25325,
-    7,25319, 1141,25329,   33,25329, 1447,25329, 1011,25318,    7,25337,
- 1275,21605,    9,25341, 1369,25343,   17,25340,  903,25347,    5,25340,
- 1505,25351,    5,25341,  253,25355,   53,25355, 1471,25355, 1369,25340,
-    9,25363, 1011,21605,    7,25367,  959,25369,   47,25369,  759,25369,
-  903,25366,    7,25377, 1369,21605, 9929,25380, 9927,25383,11759,25380,
- 7971,25387,17053,25381,10081,25391,    7,25380,    4,25394,    5,25395,
-    7,25398,25381,25401,    0,25398,25403,25405,    4,25395,    0,25395,
-    5,25410,    1,25380,    5,25415,    1,25416,25381,25419,    6,25416,
-25421,25423,    6,25415,    5,25426,   14,25415,   10,25380,    5,25433,
-    0,25434,    0,25433,    5,25438,   16,25380,10081,25380, 7971,25445,
-17053,25445, 7971,25381,11759,25451,10081,25451,   17,25380,   11,25380,
-   11,25381, 1965,25461, 3195,25461,25437,25461,25441,25461, 5197,25461,
-25405,25461,25413,25461,    1,25461, 4579,25461,15899,25461,   15,25380,
-23763,25483,23771,25483, 3755,25483, 1995,25483,    0,25483,25461,25493,
-25477,25483, 4917,25483,17013,25483,    4,25380,    7,25502,20029,25503,
-19781,25503,21103,25503,    5,25380,25409,25513,  803,25513,    4,25381,
-20033,25519,25457,25519,    5,25381,25397,25525,25505,25525,25443,25525,
-10219,25525,  959,25525,   47,25525,  759,25525, 1275,25380,    9,25541,
-  241,21605,    9,25545,  483,25545,    7,25544, 8495,25551,10107,25551,
-17571,21605,    7,25557,    4,25558,    4,25559,   16,25557,   17,25557,
-    4,25556,25567,25569,    5,25556,25561,25573,25565,25573,    4,25557,
-    7,25578,25573,25581,    5,25557,25563,25585,17371,21605,16711,25589,
-    7,25589,14315,21605,    5,25594,    6,25596,    6,25597,   14,25594,
-   15,25594,    6,25594,    5,25606,    7,25594,25601,25611,    6,25595,
-25605,25615,    7,25595,25609,25619,25599,25619,25603,25619,15705,21605,
-  767,25627,  483,25629,    4,25627,  483,25633,21527,21605,20103,25636,
-    5,25637,   17,25641,    5,25636,    9,25645,21315,21605,21183,25648,
-21795,25651,21183,25649,24673,25655,21747,25649,20413,25659,23457,25649,
-20413,25663,20413,25648,23457,25667,21747,25667,21037,21605,21829,25673,
-20501,25675,21127,25673,20501,25679,21105,25673,   11,25673,20501,25685,
-   15,25673,20501,25672,24095,25691,21829,25691,21127,25691,20187,25672,
-24095,25673,20501,25701,    6,25673,    7,25673,    6,25672,25707,25709,
-20103,25709,    7,25672,21749,25715,23755,25715,25705,25715,20103,25672,
-    7,25723,20763,21605,20482,25726,20839,25729,20483,25726,21183,25726,
-    4,25727,23147,25737,24819,25737,    5,25727,23383,25743,20956,25743,
-20773,25743,24953,25743,20885,25743,20413,25752,20413,25743,20885,25756,
-    4,25726,21605,25761,    7,25763,25743,25765,24849,25761,20413,25761,
-    5,25726,20839,25773,20413,25775,20413,25772,20839,25779,20413,25726,
-    5,25782,20839,25785,    5,25783,20885,25789,    5,21604,25275,25793,
-25003,25793,25725,25793,24755,25793,21049,25793,21242,25793,20773,25793,
-20956,25793,25699,25793,22725,25793,22391,25793,24682,25793,23209,25793,
-25712,25793,25733,25793,22711,25793,22395,25793,24668,25793,23213,25793,
-25770,25793,25083,25793,23235,25793,22017,25793,25085,25793,23231,25793,
-22025,25793,25087,25793,25691,25793,22357,25793,22047,25793,23455,25793,
-15567,25793,12971,25793,13355,25793,13541,25793,22869,25793,22635,25793,
-23021,25793,23894,25793,23919,25793,21997,25793,21995,25793,22583,25793,
-23906,25793,23910,25793,22419,25793,22421,25793,23034,25793,19656,25793,
-19441,25793,11970,25793, 4696,25793,22674,25793,22069,25793,25081,25793,
-22011,25793, 9357,25793,25205,25793,25027,25793, 9356,25793,25171,25793,
-24941,25793,23199,25793,23175,25793,20606,25793,25593,25793,19396,25793,
-11131,25793,21059,25793,23018,25793,20501,25933,20057,25793,22633,25793,
-20501,25939,21405,25793,  357,25793,  367,25793,  471,25793, 1249,25793,
-  628,25793, 4569,25793,14625,25793, 4545,25793,13325,25793, 8337,25961,
- 4549,25793,23229,25793,20501,25967,23233,25793,20501,25971,25706,25793,
-20186,25793, 8386,25793, 9083,25793, 9484,25793, 9984,25793,20187,25793,
- 8387,25793,19513,25793, 8401,25793,20219,25793, 4137,25793,10273,25793,
- 4063,25793, 3863,25793,20697,25793, 9955,25793,20353,25793,25709,25793,
-20103,26010,25715,25793,24673,25793,20103,26016,24697,25793,21183,25793,
-20103,26022,21259,25793, 4745,25793,17423,25793, 9082,25793,22673,25793,
-20413,26034,23033,25793,20413,26038,25551,25793,24613,25793,22249,25793,
-20326,25793,21087,25793, 9704,25793,23879,25793,19631,26054,11949,26054,
- 4669,26054,11949,25793,23879,26062,    9,26062, 4669,25793,23879,26068,
-    9,26068,20805,25793,23015,25793,18967,26076,20501,26079,18967,26077,
-20413,26083,19631,25793,23879,26086,    9,26086, 9377,25793,   11,26092,
-  341,25793,  241,26097, 8165,25793,  256,25793,  257,25793,   11,25793,
- 9195,26106,20501,26106,  587,26106, 9377,26106, 9875,26106,20763,26106,
-20804,25793,10219,25793,  587,26123,   53,25793,20501,25793,   10,26128,
-   10,26129,   11,26128,26133,26135,   11,26129,26131,26139,20413,25793,
-20885,26142,24661,26142,25761,26142,22673,26142,23033,26142,20762,25793,
-25761,25793,20413,26156,24661,25793,20413,26160,20885,25793,20413,26164,
-   17,25793,20762,26168,20762,26169,20763,26169,26171,26175,20763,26168,
-26173,26179,    9,25793,11949,26182, 4669,26182,19631,26182,18967,26182,
-20273,26182, 9617,26182,20763,25793,   11,26196,25707,25793, 9875,25793,
-   10,26202,   10,26203,   11,26202,26207,26209,   11,26203,26205,26213,
-  253,25793,    6,25793,25273,26219,24753,26219,24999,26219,24953,26219,
-25005,26219,25723,26219,25707,26219,25185,26219,25163,26219,25589,26219,
-24081,26219, 4713,26219,16363,26219, 9195,26219, 4863,26219,13119,26219,
- 8757,26219, 4213,26219,23493,26219, 8109,26219, 3933,26219, 4147,26219,
- 9335,26219,20103,26219, 8337,26219,20273,26219, 8997,26219,25673,26219,
-  241,26219,18967,26219,   11,26279,   11,26219,  587,26219, 8387,26219,
-14653,26219,20187,26219,    7,25793, 8717,26293, 3785,26293,25673,26292,
-23755,26293,10351,26293, 4311,26293, 4329,26293,10055,26293,20103,26292,
- 8337,26292, 8997,26292,   15,26293,18967,26317,18967,26292,  241,26292,
- 9195,25793,   11,26324, 1471,25793,    6,25792,23175,26331,25977,26331,
-24941,26331,26311,26331,26299,26331,25975,26331,25715,26331,24697,26331,
-26315,26331,23199,26331,25171,26331,25979,26331,26033,26331,26313,26331,
-16381,26331,26323,26331,26103,26331,13325,26331, 8685,26331,26155,26331,
-26321,26331,26293,26331,20103,26375,25673,26375, 8997,26375, 8337,26375,
-  241,26375,18967,26375,   17,26331, 1369,26331, 4569,26331,19513,26331,
- 4063,26331,10273,26331, 3863,26331,20697,26331, 9955,26331, 4137,26331,
-20219,26331, 8401,26331,14625,26331,    7,25792,25987,26415,26266,26415,
-26201,26415,26274,26415,26272,26415,25989,26415,25981,26415,26268,26415,
-21604,26415,18967,26433,26219,26435, 8997,26415,26219,26438,26105,26415,
-26276,26415, 8647,26415,19396,26415,26197,26415,26278,26415,26219,26415,
-20103,26454,25673,26454, 8997,26454, 8337,26454,  241,26454,18967,26454,
- 8337,26415,26219,26468,20103,26415,26219,26472,    9,26415,18967,26476,
-  241,26415,    1,26481,26219,26483,26219,26480,25673,26415,26219,26488,
-18967,26415,    9,26492,26219,26492,  587,25793,   11,26498, 1369,25793,
-25673,25793,20501,26505,    6,26504,    7,26504,26331,26511,    6,26505,
-26511,26515,    7,26505,26509,26519,26219,26519,18967,25793,    9,26524,
-23015,26524,20501,26529,  483,26525,    6,26524,    7,26524,26331,26537,
-    7,26525,26219,26541,    6,26525,  241,25793,    1,26547,    7,26549,
-26331,26551,    7,26548,26219,26555,    7,26547,    1,26558,26219,26561,
-26219,26559,    7,26546,26331,26567,20273,25793,    9,26570,14315,25793,
- 8997,25793,    7,26576,26331,26579,    7,26577,26219,26583, 9617,25793,
-    9,26586, 8337,25793,    7,26590,26331,26593,  483,26591,    9,26591,
-    7,26591,26219,26601,20103,25793,21183,26604,24673,26604,25709,26604,
-    7,26604,26331,26613,  483,26605,    9,26605,    7,26605,26219,26621,
-    4,21604,21955,26625,24877,26625,23433,26625,21947,26625,21951,26625,
-24801,26625,23415,26625,21943,26625,22282,26625,22251,26625,22266,26625,
-22253,26625,24811,26625,25667,26625,22363,26625,22053,26625,21116,26625,
-21560,26625,25735,26625,23437,26625,22699,26625,21253,26625,23930,26625,
-22206,26625,24805,26625,23937,26625,22587,26625,23039,26625,23053,26625,
-23051,26625,21961,26625,21981,26625,20465,26625,20576,26625,21985,26625,
-21983,26625,22077,26625,22075,26625, 9573,26625, 9575,26625,23847,26625,
-22465,26625,22507,26625,    3,26625,    7,26712, 9605,26625,  586,26625,
- 9599,26625,19474,26625,20413,26723,20186,26625,20805,26625,22423,26625,
-22713,26625,22205,26625,20501,26734,19625,26625,20501,26738,19687,26625,
-23929,26625,20501,26744,23934,26625,20413,26749,22585,26625,20413,26753,
- 8386,26625,23927,26625,18967,26759,20501,26761,18967,26758,20413,26765,
-23037,26625,19631,26769,11949,26769, 4669,26769, 1418,26625, 9565,26777,
-  669,26625, 9565,26781,22263,26625,20501,26784,22269,26625,20501,26788,
-21549,26625,20501,26792,20843,26625,21105,26625,20501,26798,21127,26625,
-23423,26625,20103,26805,23357,26625, 7971,26625, 1170,26625,25203,26813,
-20501,26625,22269,26816,22263,26816,21105,26816,21549,26816,22205,26816,
-23929,26816,19625,26816,20762,26625,26219,26833,23361,26625,20413,26837,
-   11,26625,    1,26841,18967,26841,   15,26625,18967,26846,20413,26849,
-18967,26847,20501,26853, 1369,26846, 9565,26857,    7,26625,    4,26861,
-    3,26860,    4,26860,21605,26867,20103,26860, 8337,26860,18967,26860,
-26219,26875, 1011,26860,25203,26879,    6,26625,21604,26882,20763,26883,
-    6,26624,24811,26889,22053,26889,22363,26889,25667,26889,20501,26889,
-25649,26889,20413,26901,18967,26889,    7,26624,24265,26907,19559,26907,
- 9673,26907, 8251,26907, 3807,26907, 4283,26907,20361,26907, 4279,26907,
-20713,26907, 9967,26907,  483,26625, 1369,26625,   15,26930, 9565,26933,
-25649,26625,20413,26937,18967,26625,   15,26940,20413,26943,23927,26940,
-20413,26947,    6,26940,21604,26950,    7,26940,26219,26955,    7,26941,
-26953,26959,26885,26959,26331,26959,23755,26959,    6,26941, 1011,26625,
-    7,26971,25207,26973,23197,26973,    7,26970,25203,26979,20103,26625,
-    7,26982, 8337,26625,    7,26986, 9565,26625, 9617,26625,    6,26992,
-    7,26992,    6,26993,26997,26999,    7,26993,26995,27003,20273,26625,
-    6,27006,    7,27006,    6,27007,27011,27013,    7,27007,27009,27017,
-    7,21604,25987,27021,26266,27021,22732,27021,22733,27021,25087,27021,
-25691,27021,22357,27021,22047,27021,26027,27021,25989,27021,26268,27021,
-20819,27021,20152,27021, 8374,27021, 8389,27021,20201,27021,20952,27021,
-    1,27021,    4,27056,    4,27057,    3,27021,    4,27062,  902,27021,
-19559,27021,20361,27021, 9673,27021,20713,27021, 9967,27021, 4283,27021,
- 4279,27021, 8251,27021, 3807,27021,26100,27021,26106,27021,26128,27021,
-26202,27021, 8647,27021,20326,27021,25239,27021,25115,27021, 8800,27021,
-21087,27021,  357,27021,  367,27021,  471,27021, 1249,27021, 8086,27021,
-19687,27021, 9704,27021,25742,27021,20885,27021,  483,27122, 1141,27021,
-  375,27021,20103,27128, 8337,27128,25673,27021,20501,27135,26219,27021,
-20103,27138, 8337,27138,   11,27139,   17,27139, 1447,27021,21127,27021,
-20843,27021, 8165,27021,25793,27154,  265,27155,   33,27021,  567,27021,
-22729,27021,21315,27164,   11,27021,25793,27169, 8495,27169,25793,27168,
- 8495,27168,18967,27169,21037,27169,21497,27021,21277,27021,21276,27021,
-21496,27021,20273,27021,    9,27190,21315,27190,20103,27021,26219,27196,
-  375,27196,21037,27196,21314,27021,22729,27205,20273,27205,21036,27021,
-25129,27211,20103,27211,21183,27021,    9,27021,20273,27218, 9617,27218,
-21315,27021,22729,27224,20273,27224,21037,27021,20103,27230,25743,27021,
-   25,27021, 7971,27236, 7971,27021,   25,27240, 9617,27021,    9,27244,
- 8337,27021,26219,27248,  375,27248,    4,27021,25037,27255,25215,27255,
-    3,27254,    1,27254,25727,27255,  483,27255,20691,27255, 9923,27255,
-18967,27255,20103,27273,18967,27254,22729,27277,20273,27277,    5,27021,
-27061,27283,    1,27283,25727,27282,18967,27283,22729,27291,20273,27291,
-   17,27283,18967,27297,18967,27282,25129,27301,20103,27301,25793,27021,
- 8165,27306,   11,27306,20501,27306, 9875,27306, 9731,27021, 8495,27021,
-   11,27318,    4,27020,    1,27323,27283,27324,27286,27323,27289,27323,
-27121,27323,24265,27323,27225,27323,27290,27323,27211,27323,27301,27323,
-27283,27323,    1,27344,25727,27345,18967,27344,18967,27345,19559,27323,
-18967,27323,27283,27356, 4283,27323, 9673,27323, 8251,27323, 3807,27323,
-20361,27323, 9967,27323,20713,27323, 4279,27323,    5,27020,27059,27377,
-27263,27377,27235,27377,27264,27377, 8647,27377,19396,27377,27231,27377,
-27272,27377,27205,27377,27277,27377,27255,27377,    1,27399,25727,27398,
-18967,27398,18967,27399,26219,27377,    9,27377,18967,27410,25727,27377,
-27255,27414,18967,27377,    9,27418,27255,27418, 1011,27021,25727,27021,
-    5,27426,27323,27429,    5,27427,27255,27433,18967,27021,    7,27437,
-21605,27439,    4,27441,    4,27440,    4,27439,21605,27446,    4,27438,
-   16,27437,  113,27437,11731,27437,   17,27437,    4,27436,22729,27461,
-21605,27460,27459,27465,27377,27461,20273,27461,    5,27436,25129,27473,
-27443,27473,27323,27473,20103,27473,    5,27437,25101,27483,23193,27483,
-    7,27483,21605,27489,27461,27491,27449,27483,27445,27483,27461,27483,
-27255,27483,21315,27483,    4,27437,    7,27504,27473,27505,27283,27505,
-21037,27505,  483,27021,20885,27514,20501,27021,  241,27519,25793,27518,
- 9875,27021,  241,27525,25793,27524,20413,27021,    6,21604,24811,27533,
-25667,27533,22363,27533,22053,27533,    1,27533,    5,27542,22605,27545,
-22677,27545,23023,27545,25483,27545,20644,27533,21359,27533,25793,27557,
-12345,27533,    5,27561,    4,27560,27563,27565,    4,27561,    5,27560,
-27569,27571, 5123,27533,    5,27575,    4,27574,27577,27579,    4,27575,
-    5,27574,27583,27585,19667,27533,    5,27589,    4,27588,27591,27593,
-    4,27589,    5,27588,27597,27599,  341,27533,21052,27533,25793,27605,
-25649,27533,20413,27609,25673,27533,21183,27613,26861,27533,    9,27617,
-26293,27533,    9,27621,17219,27533,  903,27625, 4663,27533,  903,27629,
-23195,27533,21315,27633,10219,27533,  903,27637,   53,27533,25025,27533,
-21315,27643,20103,27533,    9,27647,21314,27533,24795,27651,26142,27651,
-20413,27651,25793,27656,25793,27651,20413,27660,21036,27533,25129,27665,
-21259,27533,26625,27669,   17,27533,21315,27673,21037,27533,25793,27677,
-20501,27679,20501,27676,25793,27683, 8337,27533,    9,27687, 1471,27533,
-    5,27533,    6,27693,  587,27695,21605,27697,    1,27692,22605,27701,
-22677,27701,23023,27701,25483,27701,27699,27701,    6,27692,25380,27713,
-27701,27715, 1369,27713,21605,27718,27701,27721,21605,27713, 1369,27724,
-27701,27727,    9,27693,18967,27692,25129,27733, 9935,27693,20645,27693,
-    4,27533,20501,27740,26524,27741,20501,27745,25793,27741,18967,27748,
-20501,27751,18967,27749,20413,27755,18967,27741,25793,27758,20501,27761,
-20501,27759,25793,27765,18967,27740,26142,27769,20413,27769,25793,27772,
-25793,27769,20413,27776,26940,27533,26969,27781,  253,27533,    4,27532,
-24811,27787,22053,27787,22363,27787,25667,27787,20501,27787,25649,27787,
-20413,27799,18967,27787,    5,27532,24941,27805,23175,27805,25715,27805,
-24697,27805,25171,27805,23199,27805,26959,27805,16381,27805,13325,27805,
- 8685,27805,26293,27805,   17,27805, 1369,27805, 4569,27805,19513,27805,
- 4063,27805,10273,27805, 4137,27805,20219,27805, 8401,27805, 3863,27805,
-14625,27805,20697,27805, 9955,27805,  241,27533,18967,27533,20486,27857,
-20487,27857,20413,27857,    4,27862,    4,27863,  580,27857,  483,27857,
-    4,27870,    4,27871,  581,27857,    4,27856,27861,27879,26142,27879,
-27877,27879,20413,27879,25793,27886,25793,27879,20413,27890,    5,27856,
-25129,27895,27859,27895,27865,27895,27869,27895,27873,27895,    5,27857,
-25101,27907,27555,27907,23193,27907,27743,27907,27886,27907,27867,27907,
-27875,27907,20413,27907,27879,27922,27879,27907,20413,27926,    4,27857,
-20413,27930,27895,27933,  483,27930,27895,27937,27895,27931,20413,27941,
- 1369,27533,    5,27945,20501,27533,21037,27949,    4,27948,27907,27953,
-    5,27948,18967,27956,21037,27948,25793,27961,    4,27949,27959,27965,
-27665,27965,27733,27965,27895,27965,    5,27949,27961,27975,    7,21605,
-    1,27979,    2,27981,    5,27983,    5,27982, 1010,27981,    5,27981,
-    2,27990,    3,27978,    9,27995, 4311,27979,10351,27979, 4329,27979,
- 3785,27979,10055,27979, 8717,27979,26283,27979,26388,27979,23790,27979,
-27828,27979,22143,27979,22149,27979,24213,27979,24059,27979,  331,27979,
- 8337,28027,20103,28027,21036,27978,21049,28033,21242,28033,21183,28033,
-20103,28038,20103,28033,21183,28042,26331,27979,20103,28047, 8337,28047,
-   17,28046,21277,27978,21183,28055,27693,27979,18967,28059,25793,27979,
-21127,28063,20843,28063,19687,28063, 8337,28063,20103,28063, 7971,28063,
-  241,28063, 8495,27979,  241,28079, 8337,27978,26331,28083,27805,28083,
- 1325,28083,  331,28083,   59,28083,23755,28083,25793,28083,  265,28083,
-21037,27979,27665,28101,28033,28101,   11,28101,21315,27979, 1325,27979,
- 8337,28111,20103,28111,   59,27979, 8337,28117,20103,28117,10291,27979,
-  483,28123,20273,27978,27533,28127,21315,28129,20103,27978,26331,28133,
-27805,28133,23755,28133,  331,28133, 1325,28133,   59,28133,25793,28133,
-  265,28133,21105,27979,   11,27979,20103,28153, 8337,28153,   17,27979,
-26331,28158, 8337,28159,20103,28159,27805,28158,23755,28158,27731,27979,
-27692,27979,    9,28173,23755,27979,20103,28177, 8337,28177,   17,28176,
-23983,27979,    9,28185,   15,27979,    3,28189,20273,28189, 9617,28189,
-27805,27979,20103,28197, 8337,28197,   17,28196,  241,27978,25793,28205,
- 8495,28205,10107,28205,  265,27979,20103,28213, 8337,28213,    4,27978,
-27985,28219,21105,28219,21549,28219,19625,28219,28173,28219,18967,28229,
-    5,27978,19397,28233,28060,28233,18966,28232,18966,28233,    9,28241,
-27323,28233,23651,28233,26907,28233, 9755,28233, 9317,28233, 4321,28233,
- 3833,28233,10171,28233, 4295,28233,28101,28233,21183,28233, 1413,28233,
-  922,28233,27856,28233,28059,28233,18967,28272,19396,28233,28239,28277,
-19683,28233,18967,28232,28235,28283,28242,28283,28241,28283,    9,28288,
-    9,28283,28241,28292,27533,28233,18967,28296,    9,28233,18967,28300,
-28239,28303,18967,28301,28241,28307,21399,28233,20839,28233,  483,28233,
-  903,28314,  903,28233,  483,28318,18967,28233,28059,28322,28239,28323,
-    9,28327,27533,28322,    9,28322,28239,28333,    4,27979,27987,28337,
-27993,28337,28270,28337,28330,28337,28298,28337,27989,28337,  586,28337,
-    3,28337,    7,28352,    7,28337,    3,28356,27856,28337,28233,28360,
-21575,28337,28296,28337,18967,28366,27533,28337,28322,28370,18967,28370,
-28233,28374,28233,28370,18967,28378,28322,28337,27533,28382,18967,28337,
-28296,28386,27533,28386,28233,28390,28233,28386,27533,28394,28233,28337,
-27856,28398,27533,28398,18967,28402,18967,28398,27533,28406,    5,27979,
-27255,28411, 9287,28411,20885,28411,27533,28410,28219,28419,18967,28421,
-    9,28419,  241,28411,  483,28427,28219,28411,27856,28431,27533,28431,
-18967,28434,18967,28431,27533,28438,18967,28410,28219,28443,   17,28443,
-21036,27979,21069,28449,21267,28449,21305,28449,28219,28449,21259,28449,
-20103,28459,   17,28449,21037,27978,26331,28465,21749,28465,27805,28465,
-23755,28465,28449,28465,25793,28465,10001,27979,    9,28479,27533,27979,
-21496,28483,21277,28483,20885,28483,27931,28483,    9,28483, 9731,28483,
-21037,28482,21037,28483,21315,28483,20273,28500,21036,28482,28499,28505,
-21036,28483,28497,28509,20273,28483,21315,28512,    4,28483,    5,28483,
-28386,28519,28337,28519,18967,28522,18967,28519,28337,28526,   17,28519,
-    4,28482,28519,28533,    5,28482,28517,28537,28219,28537,18967,28541,
-    9,28537, 1275,27979,20031,28547,20885,28547,    5,28547,18967,27979,
-20103,28555,    5,28555,28337,28559,    9,28559,    5,28554,28219,28565,
-   17,28565,21527,27979,18967,27978,28519,28573,    7,28573,    4,28576,
-    4,28577,28553,28573,21605,28573,    5,28584,28581,28587,    5,28585,
-28579,28591,   16,28573,28591,28595,   11,28573,20273,28573,  567,28573,
-    5,28572,    4,28573,    7,28606,28591,28609,28483,28607,28547,28607,
-  483,28607,    5,28573,21605,28618,28581,28621,20762,21605,20803,28625,
-    7,28625,    4,28628,25743,28631,    4,28629,24687,28635,25773,28635,
-21035,28625,   16,28625,25743,28643,20999,28625,20985,28625,  483,28649,
-   11,28625,20273,28625,  567,28625,    4,28624,20985,28659,    5,28624,
-20956,28663,20773,28663,20885,28663,20413,28668,20413,28663,20885,28672,
-20482,28625,20839,28677,    4,28625,    7,28680,25743,28683,20843,28681,
-  483,28681,    5,28625,21605,28690,28635,28693,20839,28691,20413,28697,
-20413,28690,20839,28701,20413,28625,    5,28705,20885,28707,    5,28704,
-20839,28711,    5,21605,21183,28715,18967,28716,24673,28719,21194,28715,
-24673,28723,28573,28714,28581,28727,20620,28714,20621,28714, 9994,28714,
- 9995,28714,    1,28715,    1,28714,26781,28741,  668,28741,26625,28745,
-26777,28741, 1419,28741,26625,28751,26857,28741,26933,28741,    2,28741,
-    9,28741,  587,28760,26625,28763,  587,28741,    9,28766,26625,28769,
-21018,28714,20839,28773,19396,28715,22579,28777,21611,28777,19683,28715,
-20413,28783,23490,28715,20413,28787,21526,28714,26816,28791,24953,28791,
-   17,28791,20501,28791,26625,28798,26625,28791,20501,28802,20762,28714,
-20773,28807,20956,28807,20885,28807,20413,28812,20413,28807,20885,28816,
-27787,28715,18967,28821,20501,28823,18967,28820,20413,28827,27802,28715,
-20413,28831,21019,28714,20885,28835,27856,28715,20413,28839,27931,28715,
-20413,28843,26904,28715,20413,28847,26861,28715,18967,28851,20823,28715,
-20645,28715, 9935,28715,21362,28715,21376,28715,27533,28715,18967,28865,
-20501,28867,18967,28864,20413,28871, 9994,28715,28737,28875,20822,28715,
-28807,28879,20763,28715,28835,28883,28816,28883,20866,28883,21021,28883,
-20413,28883,28807,28892,20843,28892,28807,28883,20413,28898,    9,28899,
-20843,28883,20413,28904,    9,28882,28807,28909,  803,28715,   11,28913,
-27979,28715,18967,28917,20621,28715,28731,28921,20413,28714,21399,28925,
-20839,28925,25737,28925,19683,28925,20763,28925,20843,28935,28807,28935,
-20763,28924,20839,28941,25737,28715,20413,28945,20839,28715,20413,28949,
-20620,28715,28733,28953,21399,28715,20413,28957,  483,28715,21315,28960,
-26860,28715,28337,28715,   11,28967,23457,28715,18967,28970,20413,28973,
-18967,28971,20501,28977,    9,28715,21315,28980,20763,28981,20763,28980,
-28807,28987,   17,28715,11949,28991, 4669,28991,19631,28991,18967,28991,
-20273,28991, 9617,28991, 9995,28715,28735,29005, 1275,28714, 1505,29009,
-26889,28715,18967,29012,20413,29015,18967,29013,20501,29019, 1369,28714,
-  803,29023,  587,28715, 1505,28715,    6,28714,26940,29031,20413,29033,
-28965,29031,18967,29037,18967,29030,26816,29041,24953,29041,   17,29041,
-20501,29041,26625,29048,26625,29041,20501,29052,26625,29031,18967,29056,
-20413,29059,18967,29057,20501,29063,18967,29031,20413,29067,26625,29069,
-26625,29066,20413,29073,    7,28714,19397,29077,    0,29077,    2,29080,
-28991,29083,    2,29077,    0,29087,    0,29086,28991,29091,28999,29077,
-    1,29076,29091,29097,29083,29097,29081,29097,    2,29103,    1,29077,
-29089,29107,    2,29107,28852,29077,    0,29076,    2,29115,29107,29116,
-29110,29115,29107,29115,    2,29122,18966,29076,18966,29077,29097,29129,
-28991,29129,    9,29129,27323,29077,23651,29077,26907,29077, 9755,29077,
- 9317,29077, 4321,29077, 3833,29077,10171,29077, 4295,29077,21183,29077,
- 1413,29077,  922,29077,26940,29077,28851,29077,18967,29162,19396,29077,
-29127,29167,19683,29077,18967,29076,29079,29173,29134,29173,29129,29173,
-    9,29178,    9,29173,29129,29182,26625,29077,18967,29186,21399,29077,
-    9,29077,18967,29192,29127,29195,18967,29193,29129,29199,20839,29077,
-  483,29077,  903,29204,  903,29077,  483,29208,18967,29077,29115,29213,
-28851,29212,29127,29213,    9,29219,26625,29212,    9,29212,29127,29225,
-    6,28715,29083,29229,29097,29230,29091,29229,29097,29234,29098,29229,
-29100,29229,29105,29229,29109,29229,29119,29229,29121,29229,29125,29229,
-29111,29229,29115,29253,24907,29229,25639,29229,22369,29229,28600,29229,
-28557,29229,28654,29229,22057,29229,29178,29229,29160,29229,19706,29229,
-10737,29229,10475,29229,10979,29229,19597,29229,12137,29229,29219,29229,
-29215,29229,29130,29229,29222,29229,29129,29229,29173,29294,29097,29294,
-29188,29229,29097,29229,29091,29302,29083,29302,29129,29302,    1,29229,
-    5,29310,    5,29229,    1,29314,29173,29229,29129,29318,19687,29229,
-19631,29322,26940,29229,29077,29326,10697,29229, 8165,29331,19631,29229,
-19687,29334,21575,29229,20273,29229,28573,29340,28625,29340,29186,29229,
-18967,29346,19384,29229,19559,29351,28625,29229,20273,29354,28573,29229,
-20273,29358,   11,29229,18967,29362,19559,29365,18967,29363,19631,29369,
-  587,29229,21605,29373,29313,29375,29317,29375,26625,29229,29212,29380,
-18967,29380,29077,29384,29077,29380,18967,29388,29212,29229,29127,29393,
-29115,29393,26625,29392,18967,29229,29186,29400,29077,29401,29173,29405,
-29097,29405,26625,29400,29077,29410,   11,29401,19687,29415,   11,29400,
-19559,29419,29077,29400,29127,29423,26625,29422,29115,29423,29077,29229,
-26940,29430,26625,29430,18967,29434,18967,29430,29127,29439,26625,29438,
-29115,29439,18967,29431,29129,29447,    7,28715,28791,29451,29041,29451,
-19625,29451,21549,29451,21105,29451,26625,29450,29031,29463,18967,29465,
- 1275,29451,  903,29469,29031,29451,26940,29473,26625,29473,18967,29476,
-18967,29473,26625,29480,20763,28714,28635,29485,28855,29485,20839,29485,
-20413,29491,20413,29484,20839,29495,    9,29485,20762,28715,28941,29501,
-29495,29501,28773,29501,20815,29501,20993,29501,21027,29501,28985,29501,
-29498,29501,29485,29501,20413,29519,    9,29518,20985,29501,20413,29525,
-    9,29501,29485,29528,21527,28714,29229,29533,    9,29533,26940,28715,
-20413,29539, 9731,28715,    7,29543,26625,28715,20762,29547,    6,29547,
-    7,29547,29400,29553,29229,29553,18967,29556,18967,29552,18967,29553,
-29229,29562,    6,29546,29553,29567,    7,29546,29551,29571,29031,29571,
-18967,29575,18967,29546,20413,29579,18967,29547,20501,29583,    6,29582,
-    7,29582,    6,29583,29589,29591,    7,29583,29587,29595,  903,28715,
-    7,29599,18967,28715,21183,29602,24673,29605,21183,29603,21795,29609,
-23457,29602,20413,29613,27787,29602,20413,29617,27533,29602,20413,29621,
-20413,29603,27787,29625,26889,29625,26625,29625,27533,29625,23457,29625,
-26889,29602,20413,29637,26625,29602,20413,29641,21315,28715,21183,29645,
-24673,29645,25709,29645,    7,29645,  483,29644,    9,29644,18967,28714,
-27965,29659,27948,29659,26816,29659,26898,29659,27796,29659,24953,29659,
-20119,29659,25129,29659,29653,29659,26887,29659,23480,29659,25099,29659,
-21605,29659,    6,29684,29645,29687,29451,29659,28625,29691,28573,29691,
-20187,29659,28625,29659,19683,29659,20839,29659,21399,29659,28573,29659,
-27787,29659,20501,29708,20501,29659,27787,29712,26889,29712,26625,29712,
-27533,29712,23457,29712,27533,29659,20501,29724,   17,29659,    6,29658,
-26816,29731,24953,29731,29451,29731,   17,29731,20501,29731,26625,29740,
-26625,29731,20501,29744,    7,29658,29697,29749,20103,29749,20186,29659,
-29731,29755,    6,29659,29752,29759,24941,29759,23175,29759,29645,29759,
-28133,29759,21605,29758,29645,29771,20103,29759,29749,29774,29077,29759,
-29749,29759,20103,29780,   11,29759,20763,29759,26625,29787,    7,29659,
-29731,29791,20103,29793,20103,29790,29731,29797,23457,29659,20501,29800,
-26889,29659,20501,29804,20103,29659,    7,29809,29759,29811,    7,29808,
-29731,29815,26625,29659,20501,29818,    6,29819,    7,29819,    6,29818,
-29825,29827,    7,29818,29823,29831,21036,21605,27965,29835,27951,29835,
-27948,29835,26816,29835,27796,29835,26898,29835,27216,29835,28151,29835,
-28101,29835,26887,29835,21194,29835,24673,29857,24675,29835,21069,29835,
-21267,29835,21305,29835,24953,29835,20119,29835,22723,29835,25129,29835,
-25063,29835,23480,29835,21796,29835,21795,29835,20501,29882,25099,29835,
-18967,29835,21183,29889,21795,29891,21183,29888,24673,29895,21259,29835,
-20103,29899,21183,29835,27021,29902,18967,29902,24673,29907,20187,29835,
-21127,29911,28573,29835,28625,29835,19683,29835,20839,29835,21399,29835,
-27787,29835,20501,29924,27533,29835,20501,29928,27021,29835,21183,29932,
-20501,29835,27787,29936,26889,29936,26625,29936,27533,29936,23457,29936,
-21795,29936,   17,29835,    6,29834,26816,29953,21069,29953,21267,29953,
-24953,29953,21305,29953,25063,29953,21259,29953,20103,29967,   17,29953,
-20501,29953,26625,29972,26625,29953,20501,29976,    7,29834,21242,29981,
-29911,29981,21049,29981,21183,29981,20103,29988,20103,29981,21183,29992,
-20186,29835,29953,29997,21105,29997,    6,29835,28133,30003,21279,30003,
-21166,30003,29992,30003,23175,30003,24941,30003,20103,30003,21127,30016,
-29981,30016,21127,30003,20103,30022,29981,30003,20103,30026,   11,30003,
-20763,30003,26625,30033,    7,29835,21105,30037,20103,30039,29953,30037,
-20103,30043,20103,30036,29953,30047,21105,30047,23457,29835,20501,30052,
-26889,29835,20501,30056,26625,29835,20501,30060,    6,30061,    7,30061,
-    6,30060,30067,30069,    7,30060,30065,30073,20103,29835,    7,30077,
-30003,30079,21183,30079,    7,30076,29953,30085,21105,30085,    4,21605,
-26371,30091,26450,30091,26539,30091,26542,30091,27439,30090,27483,30101,
-17048,30091,26496,30091,26452,30091,26373,30091,26466,30091,26386,30091,
-  586,30091,  803,30117,  586,30090,  767,30121,    1,30091,   15,30124,
-    2,30124,    7,30124,26219,30131,    7,30125,23755,30135,26331,30135,
-27805,30135,25793,30135,    1,30090,26454,30145,26375,30145,26415,30145,
-26219,30150,26219,30145,26415,30154,26292,30145,26331,30159,25793,30145,
-    7,30162,26331,30165,    7,30163,26219,30169,    7,30145,25793,30173,
-26415,30175,25793,30172,26331,30179,    3,30090,  767,30183,26454,30091,
-18967,30186,26375,30091,18967,30190,28159,30091, 8684,30091, 8647,30091,
-26154,30091,26331,30201,26534,30091,26541,30205,26536,30091,26331,30209,
-26320,30091,26331,30213,19384,30091,20501,30217,19474,30091,20611,30091,
- 9989,30091,20762,30090,20985,30227,27436,30091,20501,30231,27507,30231,
-27451,30231,27453,30231,26492,30091,26219,30240,26278,30091,26415,30244,
-26219,30091,26541,30248,26492,30248,26415,30248,18967,30254,18967,30248,
-26415,30258,27021,30091,18967,30263,20413,30265,18967,30262,20501,30269,
-21527,30091,    9,30273,21258,30091,21575,30091,20501,30279,20985,30091,
-20501,30090,27907,30285,27483,30285,  340,30091,    9,30091,  483,30091,
-26292,30091,26331,30297,18967,30299,18967,30296,26331,30303,20413,30091,
-20763,30307,25793,30309,26197,30091,26415,30312,  375,30091,24095,30091,
-18967,30319,20413,30321,18967,30318,20501,30325,24252,30091,20501,30329,
-   15,30091,    1,30332,18967,30332,   11,30091,18967,30339,20413,30341,
-18967,30338,20501,30345, 1369,30339, 9565,30349,28741,30349,30129,30349,
-27979,30339,19631,30357,11949,30357, 4669,30357,26415,30091,    1,30365,
-26219,30367,26197,30364,26278,30364,26219,30364,18967,30374,18967,30364,
-26219,30378,18967,30365,26219,30383, 1369,30090,20029,30387,19781,30387,
-21103,30387,26541,30091,26219,30394,    6,30090,23646,30399,23642,30399,
-23606,30399,24349,30399,26086,30399,26062,30399,26068,30399,24583,30399,
-24591,30399,19384,30399,24265,30419,25793,30399,19631,30422,11949,30422,
- 4669,30422,11949,30399,23493,30430,25793,30430, 4669,30399,23493,30436,
-25793,30436,19631,30399,23493,30442,25793,30442,   11,30399,18967,30448,
-24265,30451,18967,30399,   11,30454,24265,30457,   11,30455,23493,30461,
-25793,30461,23493,30399,11949,30466, 4669,30466,19631,30466,    7,30090,
-21549,30475,21105,30475,19625,30475,    6,30091,26524,30483,26545,30485,
-26524,30482,26541,30489,    7,30091,26525,30492,30455,30493,25793,30497,
-    2,30493,    0,30500,30422,30503,25793,30503,30399,30506,30399,30503,
-25793,30510,    0,30493,    2,30514,30422,30517,25793,30517,30399,30520,
-30399,30517,25793,30524,    1,30492,26219,30529,18966,30493,30422,30533,
-25793,30533,30399,30536,30399,30533,25793,30540, 8495,30492,21183,30493,
- 8495,30493,26524,30492,26331,30551,21037,30492,25793,30492,26331,30557,
-18967,30559,18967,30556,26331,30563,  265,30492,  265,30493,25793,30493,
-26541,30571,30495,30571,26492,30571,26415,30571,18967,30578,18967,30571,
-26415,30582,18967,30492,26219,30587,25793,30586,26331,30591,25793,30587,
-26415,30595,20763,30090,26142,30599,24849,30599,25793,30599,20413,30604,
-20413,30599,25793,30608,20762,30091,26219,30613,20885,30613,25793,30612,
-26331,30619,25793,30613,26415,30623,26524,30091,20501,30627,    6,30626,
-26541,30631,    7,30626,26331,30635,    6,30627,26537,30639,30635,30639,
-    7,30627,30631,30645,26219,30645, 8495,30091,    7,30650,25793,30091,
-    1,30655,    7,30656,26219,30659,    7,30657,26331,30663,20762,30654,
-26331,30667,20762,30655,26197,30671,26219,30671,    6,30655,    7,30655,
-26197,30679,26278,30679,    1,30678,26219,30685,26219,30679,18967,30688,
-18967,30678,26219,30693,18967,30679,26219,30696,    6,30654,30679,30701,
-    7,30654,26331,30705,18967,30707,30677,30705,18967,30704,26331,30713,
-18967,30654,20501,30717,    6,30716,    7,30716,26331,30723,    6,30717,
-30723,30727,    7,30717,30721,30731,26219,30731,18967,30655,20413,30737,
-    7,30736,26219,30741,    7,30737,26331,30745,  265,30091,    0,30748,
-    6,30751,21605,30752,21605,30751,    6,30756,    6,30757,    7,30748,
-30755,30763,30759,30763,    7,30749,30761,30769,18967,30091,26454,30772,
-26375,30772,26292,30772,26331,30779,   11,30772,20501,30783,   15,30772,
-27021,30772,20501,30789,20501,30773,25793,30793,27021,30793,24095,30793,
-26415,30772,26219,30800,20187,30773,25793,30805,26219,30772,26415,30808,
-24095,30772,20501,30813,    6,30773,26604,30817,29645,30817,25793,30817,
-20103,30822,20103,30817,25793,30826,    7,30773,26331,30831,27805,30831,
-23755,30831,25793,30831,    6,30772,30831,30841,    7,30772,26219,30845,
-25793,30844,26331,30849,30817,30845,25793,30845,26415,30855,25793,30772,
-20501,30859,    6,30858,    7,30858,26331,30865,    6,30859,30865,30869,
-    7,30859,30863,30873,26219,30873,20103,30773,26219,30879,    7,30879,
-25793,30883,21037,30091,    6,30887,    7,30887,    6,30886,30891,30893,
-    7,30886,30889,30897,18967,30090,27530,30901,26142,30901,26009,30901,
-26270,30901,28571,30901,26454,30901,26375,30901,24210,30901,27459,30901,
-26219,30901,20273,30920,26415,30920,20413,30901,25793,30926,27021,30926,
-24095,30926,27021,30901,20413,30934,20985,30901,24095,30901,20413,30940,
-20352,30901,25793,30945,26292,30901,26331,30949,    7,30901,25793,30953,
-20273,30955,26415,30955,20273,30952,25793,30961,25793,30952,26331,30965,
-26415,30901,26219,30968,20273,30901,26219,30972,    7,30972,25793,30977,
-25793,30901,20413,30980,    7,30981,26219,30985,    7,30980,26331,30989,
-21314,21605,27530,30993,26142,30993,26270,30993,26009,30993,26454,30993,
-26375,30993,28571,30993,24795,30993,24799,30993,24210,30993,21850,30993,
-21845,30993,20413,31016,27459,30993,18967,30993,    6,31023,29645,31025,
-26219,30993,20273,31028,26415,31028,27021,30993,20413,31034,20413,30993,
-25793,31038,27021,31038,24095,31038,21845,31038,20985,30993,24095,30993,
-20413,31050,26292,30993,26331,31055,20352,30993,25793,31059,    7,30993,
-25793,31063,20273,31065,26415,31065,25793,31062,26331,31071,20273,31062,
-25793,31075,26415,30993,26219,31078,25793,30993,20413,31082,    7,31083,
-26219,31087,    7,31082,26331,31091,20273,30993,26219,31094,    7,31094,
-25793,31099,    6,21605,27347,31103,27401,31103,27378,31103,27327,31103,
-27380,31103,27329,31103,27263,31103,27377,31116,27285,31103,27059,31103,
-27377,31122,27194,31103,27203,31103,27215,31103,27208,31103,27228,31103,
-27233,31103,27188,31103,27187,31103,27184,31103,27183,31103,27294,31103,
-27275,31103,27305,31103,27280,31103,27481,31103,27470,31103,27341,31103,
-27394,31103,27122,31103,27390,31103,27337,31103,26796,31103,26802,31103,
-30939,31103,30229,31103,30616,31103,31049,31103,28681,31103,20843,31180,
-28686,31103,22287,31103,28661,31103,28649,31103,27502,31103,27513,31103,
-25030,31103,24983,31103,30283,31103,25683,31103,21058,31103,29835,31205,
-21195,31103,29835,31209,25629,31103,13894,31103,13919,31103,27498,31103,
-27509,31103,27930,31103,27895,31223,27857,31103,    4,31226,27895,31229,
-    4,31227,27907,31233,27479,31103,27468,31103,27500,31103,27511,31103,
-26941,31103, 9457,31103,30118,31103,30185,31103,30123,31103,30105,31103,
-26742,31103, 9444,31103, 9435,31103,  713,31260,30751,31102,30763,31265,
-30221,31103,19397,31102,28777,31271, 3119,31103, 3027,31103, 3805,31103,
- 4820,31103, 6469,31103, 3419,31103,27422,31103,27359,31103,27392,31103,
-27339,31103,27343,31103,27396,31103,27404,31103,27351,31103,27352,31103,
-27407,31103, 9539,31103,24554,31103,29659,31102,29645,31311,17294,31103,
-26843,31103,30335,31103,26845,31103,25689,31103,30337,31103,30787,31103,
-24552,31103,25157,31103,24881,31103,28387,31103,28386,31102,31335,31337,
-28387,31102,28386,31103,31341,31343,27287,31103,27323,31347,30127,31103,
-30117,31103,  803,31352,    3,31103,    0,31356,27277,31103,20273,31360,
-27377,31360,27461,31103,20273,31366,27483,31366,27377,31366,27205,31103,
-20273,31374,27377,31374,27218,31103,27316,31103,27398,31103,18967,31384,
-27345,31103,18967,31388,  413,31103,30292,31103,26986,31103,26982,31103,
- 9287,31103,27224,31103,20273,31402,27323,31403,21276,31103,29835,31409,
-21496,31103,27021,31412,27021,31413,21277,31103,27021,31418,27021,31419,
-21183,31419, 6441,31103,  759,31427, 4403,31103,17075,31103,16329,31103,
- 4919,31103,17099,31103, 9362,31103, 5309,31103, 4547,31103,27291,31103,
-20273,31446,27323,31447,26810,31103,26990,31103,  777,31103,  824,31103,
-  244,31103, 4933,31103, 5297,31103,17077,31103,13019,31103,12705,31103,
-13673,31103,18391,31103,18617,31103,14597,31103,27210,31103,27323,31481,
-27472,31103,27323,31485,27300,31103,27323,31489,26317,31103,26476,31103,
- 9134,31103, 1216,31103,19687,31103,26625,31500,19397,31103,29659,31505,
-29835,31505,22655,31505,23622,31103,27410,31103,22139,31103,22163,31103,
-24543,31103,24557,31103,  305,31103,21036,31102,26816,31527,25063,31527,
-31245,31527,21069,31527,21267,31527,21305,31527,24953,31527,21259,31527,
-20103,31543,   17,31527,20501,31527,26625,31548,26625,31527,20501,31552,
-26415,31103,    9,31556,26940,31103,29645,31103,29659,31563,27418,31103,
-27255,31566,27272,31103,27377,31570,27255,31103,27483,31574,27418,31574,
-27377,31574,18967,31580,18967,31574,27377,31584, 8446,31103,  155,31103,
-17049,31103, 1369,31593, 8861,31103,26625,31103,21127,31598,20843,31598,
-19687,31598, 8337,31598,20103,31598, 7971,31598, 9565,31598,18967,31598,
- 9731,31103,27021,31616,30613,31103,20885,31620, 9617,31102,26973,31625,
- 8337,31103,24545,31628,26625,31628,    9,31628, 4819,31103,  713,31636,
-13857,31103,  713,31640, 4543,31103,21372,31103,21315,31103,27190,31648,
-27483,31648,25027,31648,27021,31649,20273,31657,27377,31657,27021,31648,
-20273,31662,27323,31663,20273,31648,27021,31668,27021,31669,   11,31648,
-21037,31103,29835,31677,20103,31679,20763,31676,29835,31683,20103,31676,
-29835,31687,  713,31103,13857,31690, 9435,31690, 4819,31690,  803,31690,
-   25,31103, 7971,31103,26625,31702,20884,31103,29659,31707,29835,31707,
-20984,31103,28659,31713,28625,31713,30227,31713,22285,31713,17233,31103,
-  903,31722,30091,31103,    9,31726,20162,31103,20171,31103,25027,31103,
-21315,31734,27190,31103,21315,31738,21127,31103,26625,31742,20843,31103,
-26625,31746,28681,31746, 9565,31103,26625,31752, 8997,31103,    9,31756,
-  766,31103, 9455,31761,30121,31761, 3803,31761,  759,31761,    9,31103,
-27021,31770,30091,31770, 9195,31770,  241,31770,26415,31770, 8997,31770,
-27377,31770,23493,31770, 8337,31770,20103,31770, 1011,31103,  903,31792,
-  241,31103,    9,31796,27297,31103,27282,31103,27323,31803,18967,31805,
-18967,31802,27323,31809,   17,31803,20103,31103,24545,31814,26625,31814,
-21037,31814,29835,31821,    9,31814,21037,31815,25793,31827,20273,31103,
-27224,31830,27291,31830,27205,31830,27277,31830,27461,31830,21315,31830,
-27021,31842,27021,31843,27021,31830,21315,31848,27231,31103,27377,31852,
-  803,31103,30117,31856,  713,31856,20885,31103,27021,31862,30613,31862,
-23493,31103,    9,31868,24545,31103,20103,31872, 8337,31872,   17,31873,
-   11,31103,28715,31881,19631,31883,11949,31883, 4669,31883,21315,31880,
- 8451,31103,27377,31103,27059,31894,27263,31894,27205,31894,27231,31894,
-27461,31894,27272,31894,27277,31894,27255,31894,18967,31910,    9,31894,
-18967,31894,27255,31916,  903,31103,17233,31920, 1011,31920,  257,31103,
-27483,31103,21315,31928,27461,31928,27255,31928,    4,31102,23646,31937,
-23642,31937,23606,31937,24349,31937,26086,31937,26062,31937,26068,31937,
-24583,31937,24591,31937,19384,31937,24265,31957,25793,31937,19631,31960,
-11949,31960, 4669,31960,11949,31937,23493,31968,25793,31968, 4669,31937,
-23493,31974,25793,31974,19631,31937,23493,31980,25793,31980,   11,31937,
-18967,31986,24265,31989,18967,31937,   11,31992,24265,31995,   11,31993,
-23493,31999,25793,31999,23493,31937,11949,32004, 4669,32004,19631,32004,
-    5,31102,26940,32013,20413,32015,18967,32012,26816,32019,24953,32019,
-31245,32019,   17,32019,20501,32019,26625,32028,26625,32019,20501,32032,
-26625,32013,18967,32036,20413,32039,18967,32037,20501,32043,18967,32013,
-20413,32047,26625,32049,26625,32046,20413,32053,    4,31103,27857,32057,
-27879,32059,27857,32056,27895,32063,20763,32056,29835,32067,29659,32067,
-28715,32057,29083,32073,29091,32073,19631,32073,11949,32073, 4669,32073,
-29129,32073,18967,32073,29077,32087,18967,32056,23147,32091,24819,32091,
-28925,32091,28715,32091,20413,32099,    5,31103,27437,32102,19397,32103,
-21605,32103,20762,32108,20762,32109,  586,32108,  586,32109,31993,32103,
-25793,32119,    2,32103,21605,32123,    0,32122,31960,32127,25793,32127,
-31937,32130,31937,32127,25793,32134,32073,32127,    0,32103,21605,32141,
-    2,32140,31960,32145,25793,32145,31937,32148,31937,32145,25793,32152,
-32073,32145,  586,32140,  586,32141,21605,32102,18966,32102,18966,32103,
-21605,32167,    7,32169,    9,32167,31960,32167,25793,32167,31937,32176,
-31937,32167,25793,32180,32073,32167,    1,32103,32125,32187,31937,32189,
-    3,32103,32143,32193,31937,32195,28573,32103,28625,32103,20843,32201,
- 9195,32103,20501,32103,21183,32103,27436,32102,27323,32211, 9377,32103,
-  713,32215, 9875,32103,19396,32103,32165,32221,    9,32103,18967,32224,
-32165,32227,18967,32225,32167,32231,20763,32102,22285,32235,28659,32235,
-28625,32235,32111,32235,30227,32235,30772,32103,20501,32247,27021,32102,
-27323,32251,18967,32253,18967,32250,27323,32257,   17,32251, 1369,32103,
-  903,32103,    9,32265,  587,32102, 9455,32269,32159,32269,32115,32269,
- 3803,32269,30121,32269,  759,32269,25673,32103,20501,32283,20763,32103,
-32113,32287,27021,32287,30613,32287,  587,32103,32161,32295,32117,32295,
-30117,32295,  713,32295,27021,32103,27483,32305,32105,32305,27418,32305,
-27377,32305,18967,32312,18967,32305,27377,32316,31992,32103,32163,32321,
-18967,32103,32163,32325,31937,32327,32165,32325,    9,32331,    9,32324,
-32165,32335,30091,32324,20501,32339,31937,32324,32163,32343,31937,32103,
-18967,32346,32163,32349,30091,32103,    9,32353,18967,32352,20501,32357,
-18967,32353,20413,32361,18967,32102,24953,32365,32171,32365,32107,32365,
-32172,32365,32167,32365,    9,32374,    9,32365,32167,32378,27021,32364,
-27323,32383,27021,32365,27377,32387,21037,31102,26604,32391,31561,32391,
-31615,32391,29645,32391,25793,32391,20103,32400,20103,32391,25793,32404,
-21314,31103,23147,32409,24819,32409,28925,32409,28715,32409,20413,32417,
-21036,31103,25673,32421,20501,32423,25087,32421,25691,32421,22357,32421,
-24953,32421,21049,32421,21242,32421,21183,32421,20103,32438,27021,32420,
-27323,32443,20103,32421,21183,32446,27021,32421,27377,32451,27436,31103,
-    5,32454,27323,32457,    5,32455,27255,32461, 9195,31103,    9,32464,
-27021,31103,21496,32468,21277,32468,20885,32468,    9,32468, 9731,32468,
-21037,32468,21315,32468,20273,32482,27323,32483,21037,32469,21315,32469,
-27205,32491,21036,32468,27323,32495,32489,32495,21036,32469,27231,32501,
-32481,32501,20273,32468,21315,32506,    4,32469,    5,32469,27231,32513,
-27272,32513,27255,32513,18967,32518,18967,32513,27255,32522,    9,32513,
-    4,32468,32513,32529,    5,32468,27323,32533,18967,32535,32511,32533,
-18967,32532,27323,32541,   17,32533,18967,32468,    5,32546,27323,32549,
-    5,32547,27255,32553,  587,31103,30091,32557,  803,32559,    5,32556,
- 9455,32563, 3803,32563,30121,32563,  759,32563,    5,32557, 9435,32573,
-  803,32573,18967,31103,32391,32579,26625,32581,27398,32578,27345,32578,
-21605,32578,    7,32589,    4,32591,    4,32590,    4,32589,    7,32596,
-   16,32589,27282,32578,27323,32603,26625,32578,32391,32607,27377,32578,
-27255,32610,20483,32579,25793,32615,27255,32578,27377,32618,21183,32579,
-26625,32623,    4,32579,26142,32627,24849,32627,21605,32627,    7,32633,
-25793,32627,20413,32636,20413,32627,25793,32640,    5,32579,32593,32645,
-    4,32578,24819,32649,23147,32649,28925,32649,28715,32649,20413,32657,
-    5,32578,24953,32661,32595,32661,32599,32661,32635,32661,32601,32661,
-27021,32660,27323,32673,27021,32661,27377,32677,27021,32578,    5,32680,
-27323,32683,    5,32681,27255,32687,20763,31103,18967,32691,    5,32692,
-    5,32693,21037,32690,29835,32699,29659,32691,29835,32691,21036,32691,
-21037,32691,25793,32709,30091,32691,20885,32713,    4,32691,32697,32717,
-    5,32691,18967,32720,28681,32721,    4,32690,32723,32727,32695,32727,
-29659,32727,29835,32727,32707,32727,    5,32690,28625,32739,22285,32739,
-28659,32739,30227,32739,32709,32739,18967,31102,    5,32750,26816,32753,
-24953,32753,31245,32753,   17,32753,26625,32753,20501,32762,20501,32753,
-26625,32766,    5,32751,    9,32771,30091,32771,20501,32775,21526,21605,
-    5,32778,26816,32781,24953,32781,   17,32781,26625,32781,20501,32788,
-20501,32781,26625,32792,    5,32779,    9,32797,30091,32797,20501,32801,
-18967,21605,20355,32804,20354,32804,26415,32805,26219,32810,26454,32805,
-26375,32805,21127,32805,21183,32818,21248,32805,21273,32805,20986,32805,
-20987,32805,28109,32804,28108,32805,32831,32833,31676,32805,31527,32837,
-28109,32805,28108,32804,32841,32843,20352,32805,    4,32847,22729,32849,
-22731,32847,32809,32847,20486,32805,26292,32805,26331,32859,19622,32804,
-19623,32805,32863,32865,19623,32804,19622,32805,32869,32871,  386,32805,
-  347,32805,21396,32804,21397,32805,32879,32881,21546,32804,21547,32805,
-32885,32887,21397,32804,21396,32805,32891,32893,21547,32804,21546,32805,
-32897,32899,20477,32805,27673,32805,20476,32805,27672,32805,21127,32804,
-21087,32911,29031,32804,31881,32805,21543,32805,21087,32805,21127,32921,
-31880,32805,21542,32805,26219,32805,26415,32928,27283,32805,31103,32933,
-20353,32805,32807,32937,20487,32805,21403,32804,21402,32805,32943,32945,
-21573,32804,21572,32805,32949,32951,21403,32805,21402,32804,32955,32957,
-21573,32805,21572,32804,32961,32963,20985,32804,32829,32967,21401,32804,
-32056,32805,29450,32805,29041,32975,28791,32975,29731,32975,29659,32975,
-20984,32805,21400,32805,32971,32987,32103,32805,    7,32990,32365,32993,
-32057,32805,29451,32805,32915,32999,20984,32804,32827,33003,20985,32805,
-31103,33007,    7,33006,33003,33011,21400,32804,21401,32805,33015,33017,
-21183,32805,21127,33020,20413,32805,    4,33025,    4,33024,   11,33024,
-27533,32805,   17,33032,20273,32805,    7,33037,    7,33036,   15,33037,
-25793,32805,    7,33045,26219,33047,    7,33044,26331,33051,21527,32805,
-   17,33054,31103,32805,    4,33059,21037,33059,32421,33063,21037,33058,
-31527,33067,    4,33058,   11,33058,21037,32805,31103,33075,32391,33077,
-31103,33074,31527,33081,28715,32805,29031,33085,    7,33085,29759,33089,
-21527,33085,29229,33093,    7,33084,29041,33097,29731,33097,29659,33097,
-28791,33097,   15,33085,  580,32805, 1170,32805,  256,32805,  629,32805,
- 1413,32805,  922,32805,  581,32805, 1171,32805,  767,32805,31103,33125,
-  375,32805,  305,33128,  510,32805,   18,32804,   12,32804,23493,33137,
- 1291,32805,  525,32805,   13,32805,22807,33145,33137,33145,   19,32805,
-33135,33151,   18,32805,   13,32804,   12,32805,33157,33159,   19,32804,
-33155,33163,   16,32805,32421,33167,25743,33167,32365,33167,32661,33167,
-27533,33167,21037,33167,31103,33179,   10,32805,19333,33183,33137,33183,
-31648,33183,19455,33183,24237,33183,22896,33183,19393,33183,19385,33183,
-    9,33199,22807,33183,    9,33202,20413,33183,    9,33183,22807,33208,
-21315,33183,31103,33212,31103,33183,21315,33216,   14,32804,32847,33221,
-33041,33221,24953,33221,32975,33221,33097,33221,26816,33221,33167,33221,
-33111,33221,   17,33221,20501,33221,26625,33240,26625,33221,20501,33244,
-   10,32804,22149,33249,19441,33249,24213,33249,24059,33249,19656,33249,
-    9,33249,19631,33260,19631,33249,    9,33264,23983,33249,    9,33269,
-  524,32805, 1290,32805,   11,32804,21087,33277,20326,33277,33183,33277,
-    9,33283,    9,33276,23493,33287,33183,33287,23493,33277,    9,33293,
-20273,33277,    9,33296,    9,33277,20273,33300,    9,32804,   11,33304,
-23493,33307,33183,33307,   11,33305,24265,33313,33249,33313,   15,32804,
-32937,33319,32999,33319,26142,33319,33123,33319,20413,33319,25793,33328,
-20273,33319,25793,33319,20413,33334,   11,32805,24567,33339,33157,33339,
-24428,33339,20413,33338,31103,33338,33260,33339,33249,33339,    9,33352,
-24265,33339,    9,33356,    9,33339,24265,33360,33249,33360,  483,33338,
-    9,32805,30090,33368,30090,33369,30091,33368,33373,33375,  483,33368,
-   11,33369,20273,33381,30091,33369,33371,33385,20501,33385,   17,32805,
-19474,33390,19475,33391,33393,33395,21314,33390,19474,33391,19475,33390,
-33401,33403,21314,33391,21315,33390,33407,33409,27533,33390,21527,33390,
-33319,33391, 1275,33390,21315,33391,33399,33421,  305,32805,  375,33424,
- 1011,32805,    7,33428,33221,33431,   15,33429,    7,33429,  241,32805,
-    7,33438,  483,32805,    4,33442,  903,33442,    9,33442,    4,33443,
-   11,33442,  903,32805,    9,33455,  483,33454, 1275,32805,   17,33460,
-    7,32805,20985,33464,33003,33467,20985,33465,32985,33471,25672,33465,
-30772,33465,25673,33465,30773,33465,21036,33465,30090,33465,20273,33464,
-33221,33487,25793,33464,26331,33491,28715,33464,29731,33495,29659,33495,
-28791,33495,29041,33495,33221,33495,18967,33465,    5,33506,30091,33506,
-    5,33507,33485,33513,   17,33507,21605,33465,    4,33518,33513,33521,
-21037,33518,    4,33519,33509,33527,33483,33527,   11,33519,25793,33465,
-26415,33535, 1011,33464,33221,33539,  241,33464, 8495,33465,32103,33465,
-20273,33547,32165,33547,21037,33465,21604,33553,21605,33552,33555,33557,
-21605,33553,21604,33552,33561,33563,28715,33465,20273,33567,29533,33567,
-30091,33465,18967,33572,33221,33465,20273,33577,23927,33465,20273,33581,
-29031,33465,20273,33585,32013,33465,20273,33589,   15,33465,29835,33465,
-29659,33465,29077,33597,32102,33465,    4,33465,24687,33603,25773,33603,
-21605,33602,33513,33609,31830,33603,32645,33603,29485,33603,22729,33603,
-31103,33603,20273,33620,20273,33603,31103,33624,    5,33465,18967,33628,
-33527,33631,31103,33628,20103,33629,31103,33637,    5,33464,33519,33641,
-    7,33641,21605,33645,33603,33647,33620,33641,33547,33641,33557,33641,
-33475,33641,33525,33641,33481,33641,31648,33641,20413,33641,33603,33641,
-31103,33666,21315,33641,31103,33670,31103,33641,33603,33674,21315,33674,
-    4,33464,33507,33681,25743,33681,33601,33681,32365,33681,32661,33681,
-33635,33681,33575,33681,33477,33681,33511,33681,33479,33681,32421,33681,
-33221,33681,27533,33681,33629,33681,31103,33709,21037,33681,31103,33713,
-31103,33465,    5,33716,33681,33719,    5,33717,33603,33723,    6,32804,
-33624,33727,33713,33727,33085,33727,29229,33733,33179,33727,21036,33727,
-33681,33739,33167,33739,28714,33727,33567,33745,18967,33727,    5,33749,
-33603,33751,    5,33748,33681,33755,33167,33755,20273,33727,33603,33760,
-33603,33727,20273,33764,29451,33727,   17,33727,    5,33726,26816,33773,
-33681,33773,24953,33773,33487,33773,33041,33773,33495,33773,33097,33773,
-32847,33773,32975,33773,33167,33773,33111,33773,33539,33773,33431,33773,
-   17,33773,33465,33773,20273,33803,26625,33773,20501,33806,20501,33773,
-26625,33810,    5,33727,33603,33815,18967,33814,33681,33819,33167,33819,
-    9,33815,33465,33815,20273,33827,30091,33815,20501,33831,33465,33727,
-18967,33834,    4,33837,    4,33836,21315,33834,21314,33834,    4,33835,
-33843,33847,    5,33835,33841,33851,33845,33851,    4,33834,18967,33856,
-33851,33859,33851,33857,    5,33834,33839,33865,33847,33865,    5,32805,
-27953,33871,27743,33871,27555,33871,    2,33870,    0,33870,    3,33870,
-    1,33870,33609,33871,33521,33871,30285,33871,33485,33871,32717,33871,
-25101,33871,33027,33871,33061,33871,23193,33871,33593,33871,33451,33871,
-20413,33871,20885,33871,33603,33871,27533,33913,23015,33871,20501,33917,
-27741,33871,20501,33921,    9,33871,30492,33871,    6,33871,33879,33929,
-33881,33929,20273,33929,    7,33871,33883,33937,33885,33937,25793,33937,
-32805,33936,    4,33945,21605,33937,33947,33949,    5,33949,33945,33953,
-33603,33949,30091,33936,21527,33937,27533,33937,21315,33963,    7,33870,
-31648,33967,20413,33967,31103,33967,21315,33972,21315,33967,31103,33976,
-21315,33871,21605,33981,33929,33983,30091,33871,20501,33987,    6,33986,
-    7,33986,    6,33987,33993,33995,    7,33987,33991,33999,    4,32804,
-27530,34003,26142,34003,26270,34003,26009,34003,33879,34003,33929,34012,
-33881,34003,33929,34016,33930,34003,33932,34003,33939,34003,33941,34003,
-33506,34003,33681,34029,33683,34003,33934,34003,33943,34003,26454,34003,
-26375,34003,33769,34003,32937,34003,32999,34003,33664,34003,32941,34003,
-33908,34003,32997,34003,28571,34003,33970,34003,33961,34003,18967,34003,
-33465,34062,33681,34065,33465,34063,33641,34069,33206,34003,33123,34003,
-33121,34003,24210,34003,33413,34003,33415,34003,32903,34003,32909,34003,
-33771,34003,32917,34003,32927,34003,33275,34003,33143,34003,27459,34003,
-33419,34003,33463,34003,33035,34003,33057,34003,33517,34003,26219,34003,
-20273,34110,26415,34110,24265,34003,28233,34003,29077,34003,33183,34003,
-20413,34122,33641,34003,20413,34126,33967,34003,20413,34130,33391,34003,
-27533,34135,20413,34003,25793,34138,27021,34138,33641,34138,33871,34138,
-33967,34138,33183,34138,24095,34138,27021,34003,20413,34154,33929,34003,
-33879,34158,33881,34158,20273,34158,20985,34003,31103,34167,   11,34003,
-21605,34171,33465,34003,18967,34174,33681,34177,24095,34003,20413,34180,
-26292,34003,26331,34185,20352,34003,25793,34189,33936,34003,33883,34193,
-33885,34193,25793,34193,    7,34003,25793,34201,20273,34203,26415,34203,
-33871,34201,33879,34209,33881,34209,20273,34209,25793,34200,26331,34217,
-20273,34200,25793,34221,33871,34200,33883,34225,33885,34225,25793,34225,
-26415,34003,26219,34232,20273,34003,26219,34236,33929,34236,    7,34236,
-25793,34243,25793,34003,20413,34246,    7,34247,26219,34251,    7,34246,
-26331,34255,33871,34003,18967,34258,    6,34261,    6,34260,21605,34259,
-33929,34267,21527,34258,31103,34259,21526,34258,20413,34258,    6,34259,
-34271,34279,    7,34259,34265,34283,34275,34283,    6,34258,34267,34289,
-18967,34288,34283,34293,34283,34289,    7,34258,33883,34299,33885,34299,
-34263,34299,34279,34299,25793,34299,    4,32805,    2,34311,    7,34313,
-27669,34311,23357,34311,32468,34311,28483,34311,27978,34311,31746,34311,
-31742,34311,31500,34311,20413,34310,23014,34311,31103,34310,21605,34311,
-    7,34338,    7,34339,33773,34343,33221,34343,   15,34338,27021,34311,
-31103,34350,28411,34311,33629,34311,20413,34357,  483,34310,31103,34311,
-27021,34362,20843,34362,21127,34362,19687,34362,19687,34311,31103,34372,
-20843,34311,31103,34376,21127,34311,31103,34380,   15,34311,21605,34384,
-  375,34311,33727,34311,    9,34391,    7,34311,21605,34394,25793,34395,
-  265,34395,31103,34395,    7,34310,33755,34405,33819,34405,33773,34405,
-33739,34405,25743,34405,32661,34405,32421,34405,32365,34405,33221,34405,
-27533,34405,21037,34405,33727,34427,31103,34427,21037,34311,33929,34433,
-26219,34433,    7,34433,25793,34439,28715,34311,20413,34443,    5,32804,
-27965,34447,27948,34447,26816,34447,27796,34447,26898,34447,20353,34447,
-29451,34447,32847,34447,33487,34447,33041,34447,32975,34447,33495,34447,
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- 6685,35187, 7519,35187,   17,35783, 7521,35785, 7525,35785, 7529,35785,
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-35633,35827,35735,35827,35749,35815,35649,35815,18966,35815,35735,35837,
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- 4971,35930, 4987,35937,31856,35931,32295,35931, 7971,35931,14073,35931,
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-35975,35983, 1275,35972,    9,35987,  767,35187,31103,35991, 1487,35187,
-13737,35994,16937,35187,   17,35999, 9377,36001,17573,36001,16947,36001,
- 1347,35187,18967,36009,  555,36011,  251,36011, 1365,36011, 1351,36011,
-   21,36011,20762,35187,  241,36022,  256,35187,25793,36026,25793,36027,
- 8495,36026, 8495,36027,18967,36026,21037,36026,  972,35187, 9377,36041,
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-29759,36413,34723,36413,21183,36413,  959,36413,   47,36413,  759,36413,
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-36367,36439,21105,36439,21549,36439,29953,36439,29731,36439,34655,36439,
-33773,36439,29835,36439,29659,36439,34447,36439,32753,36439,32019,36439,
-29041,36439,23929,36439,22205,36439,19625,36439,33221,36439,36407,36439,
-36411,36439,18967,36348,    5,36490,    6,36493,36413,36495,    6,36492,
-36439,36499,36439,36493,   14,36490,36439,36505,    6,36491,36395,36509,
-    6,36490,    5,36512,36439,36515,  903,36349,    7,36519,    9,36518,
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-    9,36527,    7,36526, 9377,36539,    7,36527,   11,35187, 8069,36544,
- 8067,36547,16859,36544, 9875,36551,21529,36544,20501,36555,16091,36545,
- 9513,36559,    7,36544,    2,36563,    7,36564,36545,36567,    1,36564,
-36569,36571,    1,36563,    2,36574,    0,36544,    2,36579,    0,36580,
-36545,36583,    6,36580,36585,36587,    6,36579,    2,36590,  482,36579,
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-    2,36607,    6,36608,    6,36607,    2,36612,  482,36607, 9513,36544,
-20501,36619, 9875,36619,16091,36619,20501,36545,21529,36627, 9513,36627,
- 9875,36545,16859,36633, 9513,36633, 1369,36545, 1989,36639, 3587,36639,
-36601,36639,36605,36639, 5303,36639,36571,36639,36577,36639,    0,36639,
- 4897,36639,17041,36639,18967,36545,20281,36661,20345,36661,36611,36661,
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-36617,36661,  483,36661,20273,36683,36579,36683,36607,36683,21605,36544,
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-    1,36695,36639,36705,36655,36695,19051,36695,19667,36695, 5123,36695,
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-    9,36890,  375,36773, 8757,36898, 4213,36898, 9195,36898,27021,36898,
-  305,36898,  483,36773, 9195,36773,  375,36912,10001,36773,    9,36917,
- 1325,36773, 1275,36773,  331,36773,27533,36773,    9,36927,  305,36773,
-  375,36930,10291,36773,  483,36935,27021,36773,26219,36938,  375,36938,
-    7,36773,25793,36944,26331,36947, 8495,36944, 8717,36951,  331,36951,
-25793,36945,26415,36957,27021,36957, 8495,36945, 8757,36963,26625,36944,
- 9731,36944,21605,36945,24545,36971,26625,36971,    9,36971,  265,36945,
- 8757,36979, 4213,36979,27021,36979, 9195,36979,  305,36979,21605,36944,
-26331,36991,27805,36991,23755,36991,   59,36991,  331,36991, 1325,36991,
-25793,36991,  265,36991,  265,36944,  331,37009, 8647,36945,26219,36945,
-   59,36773,    7,36772,25793,37019, 8495,37019,23755,37019,10055,37019,
- 4329,37019, 4311,37019, 3785,37019,27805,37019,10351,37019, 8717,37019,
-26331,37019,    9,36773,31103,37042,   15,36773,31103,37047, 9731,36773,
-    7,37050,21605,36773,   15,37055,31103,37057,    6,37055,    5,37060,
-    7,37055,26219,37065,  375,37065,    6,37054,37057,37071,    7,37054,
-26331,37075,37063,37075,27805,37075,23755,37075,   59,37075,  331,37075,
- 1325,37075,25793,37075,  265,37075,  265,36773,    7,37095, 8495,37097,
-  375,37097,    7,37094,  331,37103,26625,36773,31103,37106,    7,37106,
- 8495,36773,    7,37112, 8717,37115,  331,37115,    9,37113,  483,37113,
-    7,37113, 8647,37125,  375,37125,25793,36773,    7,37130,26331,37133,
-  483,37131,    9,37131,    7,37131,26219,37141,    3,35186,20305,37145,
- 9641,37145,20309,37145, 9645,37145,    4,37145,    7,37154,35603,37157,
- 9719,37145,   16,37145,35603,37163,35619,37145,21081,37145,20323,37145,
-20387,37145, 9701,37145,35719,37145,  524,37145,20273,37179, 9617,37179,
- 1291,37145, 9617,37185,20273,37185,  305,37145,  375,37190,  386,37145,
-  347,37145,  767,37145,31103,37199,  483,37145,   11,37202, 9617,37205,
-20273,37205,  375,37145,  305,37210,    7,37145,    3,37215,18967,37217,
-35187,37219,    4,37214,35603,37223,37221,37223,    3,37214,35187,37229,
-   11,37145,  483,37232, 9617,37235,20273,37235,    6,35186,19975,37241,
-    0,37241,    2,37244,35575,37247,35633,37247,35735,37247,36695,37247,
-18966,37241,35735,37257,35633,37257,35575,37257,36695,37257,35749,37241,
-35649,37241,36721,37241,35597,37241,19365,37241,19221,37241,19917,37241,
-10107,37279,  587,37241,    3,37241,    2,37241,    6,37287,   17,37289,
-35187,37291,    0,37286,35575,37295,35633,37295,35735,37295,36695,37295,
-37293,37295,    6,37286,36544,37307,37295,37309,   11,37307,35187,37312,
-37295,37315,35187,37307,   11,37318,37295,37321,    7,35186,    4,37325,
-    3,37326,    3,37327,35927,37331,  902,37325,25525,37325, 1325,37325,
-10001,37325,  903,37341, 1275,37325,   59,37325,25793,37325,  587,37349,
- 8495,37325,  587,37353,    2,37325,    7,37356,37331,37359,  903,37357,
-10311,37357,    3,37325,    4,37366,27533,37325,  903,37371,  331,37325,
-    2,37324,25793,37377, 8495,37377,23755,37377, 4329,37377,10055,37377,
-27805,37377, 3785,37377, 4311,37377,26331,37377, 8717,37377,10351,37377,
-21605,37325,  903,37401,  155,37401,  265,37325,    7,35187, 5045,37408,
-  805,37409, 9195,37413,    4,37408,37279,37417,19916,37417,37241,37421,
- 1275,37417,18967,37424,37241,37427,18967,37417, 1275,37430,37241,37433,
-26546,37408,32805,37408,29599,37408,  652,37409, 9195,37443, 8812,37408,
-19888,37408,19913,37408,21308,37408,16481,37408,37285,37409,16783,37408,
-17827,37408,18797,37408,26498,37409, 8796,37409, 8495,37408,  241,37468,
-  331,37469,25793,37408,  241,37474,25793,37409,  241,37479,  587,37478,
- 8495,37409,  241,37485,  587,37484,21037,37408,  241,37490,   88,37409,
-37411,37495,16531,37408,  587,37409,  265,37500, 9195,37503,26625,37501,
-25793,37501, 8495,37501,25793,37500, 8495,37500, 9731,37501,  265,37409,
-  587,37518, 9195,37521, 4213,37519, 7971,37519, 8757,37519,  587,37519,
- 9377,37531, 9565,37519,   89,37409, 5069,37537, 9195,37537,27021,37537,
-  483,37409, 1275,37409,    9,37547,26503,37409, 8809,37409,18967,37408,
-  241,37554,  241,37408,25793,37558,25793,37559, 8495,37558, 8495,37559,
-18967,37558,21037,37558,  903,37408, 9377,37573,21605,37408,30003,37577,
-29759,37577,34723,37577,21183,37577,37495,37577,  959,37577,   47,37577,
-  759,37577,  265,37408, 9377,37595,  903,37409,31103,37598,31920,37409,
-31103,37409,  903,37604,  375,37409,    2,37408,37331,37611,37495,37611,
-    3,37408,14072,37616, 4970,37616,14072,37617,14073,37616,37623,37625,
- 4971,37616, 4970,37617,37629,37631,    7,37617,    4,37635,    1,37616,
-37537,37639,    9,37639,36773,37617,37537,37617, 7971,37617,14073,37617,
-37619,37651, 4971,37617,37621,37655,  483,37617,    9,37617,    2,37409,
-37369,37663,37329,37663,37637,37663,    7,37662,37617,37671,37335,37663,
- 9362,37663,27218,37663,37642,37663,37639,37663,    9,37682,28189,37663,
-    1,37663,    5,37688,37616,37690,37617,37691,37693,37695,37671,37694,
-37616,37691,37617,37690,37701,37703,37672,37691,37671,37691,37617,37708,
-    5,37663,    1,37712,37616,37714,37617,37715,37717,37719,37671,37718,
-37616,37715,37617,37714,37725,37727,37672,37715,37671,37715,37617,37732,
-28337,37663,37660,37663,27021,37663,    9,37740, 9195,37663,    9,37744,
-    9,37663,37639,37748,27021,37748, 9195,37748,37617,37748,37241,37663,
-37617,37663,    1,37760,    5,37762,    5,37760,    1,37766,    7,37761,
-37691,37771,37715,37771,37765,37771,37769,37771,    9,37760,    3,37409,
-37577,37783,    9,37785,   16,37783,    4,37783,    7,37790,    7,37783,
-    4,37794,18967,37783,35187,37799,37789,37801,37793,37801,37797,37801,
-    9,37782,37577,37809,37611,37809,37611,37783,    1,37815,    5,37816,
-    5,37815,    1,37820,    7,37814,37819,37825,37823,37825,    9,37815,
-    9,37409,    3,37832,37577,37835,37611,37835,    3,37833,37663,37841,
-    3,35187,10104,37844,10105,37844,    0,37845,    5,37850,    4,37844,
-36773,37855,10104,37845,37849,37859,10105,37845,37847,37863,36945,37845,
-37855,37867,10291,37844,36944,37845,  265,37873,37663,37845,    7,37877,
-37691,37879,37715,37879, 1369,37845,   11,37885, 9617,37887,37853,37887,
-20273,37887,   11,37844,    6,37844,    7,37844,14072,37898, 4970,37898,
-14073,37898,14072,37899,37905,37907, 4971,37898, 4970,37899,37911,37913,
-35187,37899,36773,37899, 7971,37899,14073,37899,37901,37923, 4971,37899,
-37903,37927,  483,37899,    6,37845,37856,37933,37855,37933,36773,37936,
-    1,37933,    5,37940,37898,37942,37899,37943,37945,37947,37898,37943,
-37899,37942,37951,37953,    5,37933,    1,37956,37898,37958,37899,37959,
-37961,37963,37898,37959,37899,37958,37967,37969,36773,37933,37855,37972,
-37899,37933,    7,37845,  265,37979,36773,37981,35187,37978,    2,37985,
-    4,37979,37987,37989,    3,37989,37985,37993,37663,37989,36773,37978,
-  265,37999,37897,37979,36773,37845,    4,38005,37933,38007,    7,38005,
-37943,38011,37959,38011,14073,38011, 4971,38011,    6,38004,    1,38021,
-    5,38022,38011,38025,    5,38021,    1,38028,38011,38031,38007,38021,
-    7,38004,  265,38037,18967,37845,    4,38041,37933,38043,  256,38041,
-    7,38041,  241,38048,  241,38041,    7,38052,    2,35187,29229,38057,
-28741,38059,28741,38056,29229,38063,    0,38057,    0,38056,28714,38069,
-37185,38069, 1290,38069,37145,38075,37179,38069,  525,38069,37145,38081,
-37887,38069,37205,38069,37235,38069,    5,38069,21605,38090,21605,38069,
-    5,38094, 1275,38069,   17,38098,37145,38101,   17,38069, 1275,38104,
-37145,38107, 1505,38057,17455,38057,  903,38112,17494,38057,  483,38057,
-37214,38057,14073,38121, 4971,38121,37783,38057,  587,38057,10373,38057,
-    9,38057,  155,38057,    6,38056,    1,38137,    5,38138,38121,38141,
-    5,38137,    1,38144,38121,38147,37145,38137,  587,38137,    7,38056,
-37331,38155,    6,38057,    5,38158,18966,38159,    0,38159,    2,38164,
-    2,38159,    0,38168, 1369,38159,   17,38159,35187,38175,38163,38177,
-38167,38177,38171,38177,    7,38057,38141,38185,37145,38187,38147,38185,
-37145,38191,34447,38185,28715,38185,38069,38197,38071,38185,29659,38185,
-29835,38185,38093,38185,38097,38185, 4971,38185,37145,38211,14073,38185,
-37145,38215,37145,38184,38141,38219,38147,38219,14073,38219, 4971,38219,
-21605,38185,  903,38229,37145,38057,    4,38232,    6,38233,    1,38237,
-    5,38238,    5,38237,    1,38242,38235,38237,    7,38233,  265,38249,
-    7,38232,38241,38253,38245,38253,38141,38253,38147,38253,14073,38253,
- 4971,38253,  903,38057,17455,38266,    6,35187,    4,38271,    1,38272,
-    0,38270,   17,38277,37844,38278,37845,38279,38281,38283,37845,38278,
-37844,38279,38287,38289, 1369,38271,    2,38270,  587,38295,    3,38270,
-    2,38271, 1275,38301,    1,    5,35962,38304,35963,38304,37760,38304,
-37771,38311,37976,38304,38002,38304,37761,38304,37977,38304,37815,38304,
-37825,38323,38003,38304,37930,38304,37658,38304,37931,38304,37659,38304,
-   77,38304, 3095,38337, 1917,38337,  120,38304, 3013,38343, 1897,38343,
-   79,38305, 3113,38349,  125,38305, 3023,38353,35929,38305,37885,38357,
-37916,38305,37885,38361,38021,38304,38011,38365,38237,38304,38253,38369,
- 4597,38305, 6625,38373,  113,38304, 4696,38377,    9,38377, 4669,38380,
- 4669,38377,    9,38384,37896,38304,37898,38304,37933,38391,  483,38391,
-37616,38304,37663,38397,  483,38397,   59,38304,23023,38403,25483,38403,
-22677,38403,27533,38304,23023,38411,22677,38411,22605,38411,25483,38411,
-37663,38304,37617,38420,37672,38421,37671,38421,37617,38426,37771,38421,
-37879,38421,37617,38421,38397,38435,37671,38434,37933,38304,37899,38440,
-38011,38441,37899,38441,38391,38447,37897,38304,38137,38304,38121,38453,
-38219,38453,38185,38453,37145,38459,38253,38453,37617,38304,37663,38464,
-  483,38464,37899,38304,37933,38470,  483,38470,  979,38305,21605,38477,
-  987,38479,21879,38305, 1205,38483,29229,38304,29375,38487,17105,38304,
-17117,38491,23755,38304,23023,38495,22677,38495,25483,38495,26863,38305,
-21605,38503,26865,38505,10091,38305,   15,38509,10093,38511, 1009,38305,
-  675,38304,22605,38517, 1418,38304,    1,38521,    3,38522,    3,38521,
-    1,38526,21604,38521,21895,38304,22605,38533,25380,38304,    5,38537,
-    6,38538,    6,38537,    5,38542,   14,38537, 1365,38305,17573,38305,
-    9,38550,10001,38553,27996,38305,27533,38557, 1203,38305,17574,38305,
-10001,38563,  177,38305,27995,38305,    9,38568,27533,38571, 7963,38305,
-    9,38574, 7961,38577, 7964,38305, 7961,38581,  120,38305,   77,38305,
-37758,38305,37972,38305,37457,38305,37867,38305,35912,38305,35733,38305,
-35732,38305,35913,38305,22605,38305,27533,38605,  675,38605,21895,38605,
-36856,38305,  483,38613,37644,38305,  483,38617,37918,38305,37933,38621,
-  483,38621,37177,38305,  483,38627, 4798,38305,15896,38305,23023,38305,
-   59,38635,27533,38635,23755,38635,22677,38305,27533,38643,   59,38643,
-23755,38643,25483,38305,   59,38651,27533,38651,23755,38651,25368,38305,
-30290,38305,27127,38305,30762,38305,30566,38305,  843,38304,35187,38669,
- 1531,38304,  842,38304, 1530,38304,35930,38305,38675,38679,38307,38679,
- 9492,38305,10001,38685,13755,38685,27533,38685,24597,38305,   59,38693,
-  331,38693,   97,38693,  141,38693, 1325,38693,  629,38305,37896,38305,
-37610,38305,37783,38709,37616,38305,38467,38713,38423,38713,38311,38713,
-38331,38713,38469,38713,38465,38713,37663,38725,  483,38725,37898,38305,
-38473,38731,38443,38731,38315,38731,38329,38731,38475,38731,38471,38731,
-37933,38743,  483,38743,37866,38305,37456,38305,17508,38305, 9257,38305,
-27149,38305, 9353,38305, 9253,38305,38253,38305,38137,38763,38237,38763,
-  483,38763,38219,38305,38137,38771,  483,38771,38121,38305,38137,38777,
-  483,38777,15897,38305, 4799,38305,27161,38305,20187,38305,  483,38789,
- 8387,38305,  483,38793, 9541,38305,15879,38305,  483,38798, 4787,38305,
-  483,38802,16125,38305,    3,38806,    2,38806,  842,38806,  843,38807,
-38813,38815,  842,38807,  843,38806,38819,38821,    2,38807,38809,38825,
-    3,38807,38811,38829, 5121,38305,    3,38832,    2,38832,  842,38832,
-  843,38833,38839,38841,  842,38833,  843,38832,38845,38847,    2,38833,
-38835,38851,    3,38833,38837,38855,35729,38305,  587,38859,  587,38858,
-19384,38305,  483,38865,  669,38305, 1011,38869, 1086,38305,  483,38873,
- 1418,38305, 1011,38877,25381,38305,38541,38881,38545,38881,25423,38881,
-25429,38881,    7,38881,25431,38881,38547,38881,   15,38881,25415,38897,
-38537,38897, 1419,38305,38525,38903,38529,38903, 1801,38903, 1875,38903,
-    2,38903,23983,38903,10603,38903, 4625,38903,21893,38903,38531,38903,
-21605,38903, 1421,38925,38521,38925, 1108,38305, 9565,38931,  246,38305,
-  483,38935,  294,38305, 8495,38939,35931,38305,38669,38943,38309,38943,
-  483,38943,36773,38942,  483,38951,19396,38305,35718,38305,37885,38957,
-37202,38957,37145,38957,  483,38962,  483,38957,37145,38966,  668,38305,
-    2,38971, 3507,38971, 1971,38971,21783,38971,23983,38971,10603,38971,
- 4625,38971,21605,38971,  713,38987,20060,38305,  483,38991,  713,38305,
-16833,38995,38011,38305,37933,38999,38021,38999,  483,38999,37285,38305,
-37409,39006,36945,38305,37845,39011,37845,39010,  483,39011,37215,38305,
-    3,39019,38057,39019, 9377,38305,    9,39024,10001,39027,13755,39027,
-27533,39027, 1471,38305,16937,39035, 9875,38305, 1011,39039, 1347,39039,
-  555,38305,20763,38305,  566,39046,  566,39047,  567,39046,39051,39053,
-  567,39047,39049,39057,  257,38305,  483,39061,  973,38305, 4816,39065,
- 4805,39065, 1011,39068,38057,39065, 1011,39065, 4805,39074,  628,38305,
-  483,39079, 1406,38305,  587,38305,23584,39085,24355,39085,37782,39085,
-37408,39084,39091,39093,37783,39085,37408,39085,38670,39085,    3,39085,
-37409,39102,39093,39105,37409,39103,39099,39109,38669,39085,35187,39112,
-35728,39084,23493,39085,22807,39118,22807,39085,23493,39122,35729,39084,
-35728,39085,39127,39129,35729,39085,39117,39133,37409,39085,    3,39136,
-39093,39139,  483,39085,35187,39142,35187,39085,38669,39146,  483,39146,
-36773,39147,  483,39153, 1011,39084,  483,39157,    9,39084, 4625,39161,
-10603,39161, 3507,39161, 1971,39161,23983,39161,21783,39161,21605,39161,
-  713,39175,18967,39084,  483,39179,35187,39084,37202,39183,37885,39183,
-37145,39183,  483,39188,  483,39183,37145,39192,37409,39084,39097,39197,
-   11,39084,  483,39201, 1369,38305,35964,39204,35965,39205,39207,39209,
-35965,39204,35964,39205,39213,39215,35761,39205,38057,39205,   15,39204,
- 1011,39223,   11,39205, 1011,39205,   11,39204, 1275,38305,  483,38305,
-35895,39234, 4787,39234,15879,39234,21405,38305, 1011,39243,  483,39243,
- 7535,38305,   15,39249, 7537,39251, 7541,39251, 7545,39251,28337,38305,
-21605,39259,28351,39261,28355,39261,28359,39261, 6147,38305,  483,39269,
-15269,38305,  483,39273,17423,38305, 1011,39277,  483,39277, 4827,38305,
-  483,39283, 4745,38305, 1011,39287,  483,39287,17232,38305,30492,38305,
-25793,39295,  265,39294, 4569,38305,  483,39301,14625,38305,  483,39305,
- 7063,38305,  483,39309,37284,38305,37356,38305,17233,38305,30493,38305,
-  483,39319,37973,38305,37759,38305,38002,38305,38327,39327,37760,38305,
-  483,39331,37976,38305,38321,39335,37617,38305,38398,39339,38319,39339,
-38400,39339,38335,39339,37663,39339,38397,39348,37671,39349,38397,39339,
-37663,39354,  483,39354,36773,39338,  483,39361,  483,39339,38397,39364,
-37663,39338,  483,39369,37899,38305,38392,39373,38321,39373,38394,39373,
-38333,39373,35187,39372,37885,39383,37933,39373,38391,39386,38391,39373,
-37933,39390,  483,39390,36773,39372,37933,39397,  483,39397,  483,39373,
-38391,39402,38185,38305,38150,39407,38137,39407,37145,39410,37202,39407,
-37885,39407,  483,39407,37145,39418,37145,39407,38137,39422,  483,39422,
-37979,38305,38451,39429,37663,38305,37409,39432,    3,39435,    7,39433,
-39437,39439,    2,39439,39435,39443,  483,39433,37617,39447,37241,39432,
-37617,39432,  483,39453,37933,38305,36773,39456,37977,38305,38315,39461,
-37815,38305,  483,39465,38003,38305,38317,39469,38127,38305,  483,39473,
-  482,38304,    5,39477,    6,39478,    6,39477,    5,39482,   14,39477,
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-26293,39633, 8685,39633,35843,39633, 1369,39633,19513,39633, 3863,39633,
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-19396,39787,35931,39787,39489,39815,15269,39787, 4827,39787,  587,39786,
-38679,39823,37899,39787,38391,39827,37617,39787,38397,39831,17423,39787,
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-  586,39858,39823,39861,  586,39859,39847,39865,  586,38305,39713,39869,
-38861,39869,39737,39869,39745,39869,38675,39869,35187,39879,39823,39869,
-35187,39883,39783,39869,35187,39887, 1108,39869,  295,39869,35927,39869,
-37611,39869,38155,39869,35719,39869,39705,39901,39749,39869,22807,39905,
-35728,39905,35187,39905,  483,39910,  483,39905,35187,39914,35187,39868,
-39823,39919,39783,39919,38675,39919,39749,39919,  483,39927, 1011,39869,
-    9,39930,    9,39869, 1011,39934, 1369,38304, 1275,39938, 1275,38304,
-39429,39943,23023,39943,22605,39943,25483,39943,22677,39943, 1369,39942,
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-  713,39967,  305,39967, 1489,39967, 1509,39967,   25,39967,15705,38305,
-  767,39979,39705,39981,17455,38305,   15,39985, 9513,39987,16859,39987,
-17469,39987,  803,39984,  154,38305,  165,39997,  374,38305,   11,40001,
-   66,38305,  340,38305,30091,40006,27978,38305,39633,40011,23755,40011,
-27805,40011,26331,40011,25793,40011, 8495,40011,  511,38305,   11,40025,
-  935,38305,  483,40029, 1109,38305,   11,40033,  295,38305,  256,38305,
-  375,40039, 9805,40039,20762,38305, 1141,40045, 1447,40045,   33,40045,
-   88,38305,11251,40053, 5177,40053,  136,38305,36727,40059,37895,40059,
-36079,40059,  144,38305,  113,40067,  341,38305,  113,40071,16937,40071,
-27979,38305,38411,40077,  483,40077,39943,40077, 9565,40077,  113,38305,
- 4727,40087,    9,40089,37662,38305,37241,40093,37932,38305,36773,40097,
-37782,38305,37978,38305,39633,40103,38389,40103,  305,38305,16833,40109,
-   25,38305,16833,40113,20501,38305, 1011,40117, 1347,40117,  253,38305,
-16937,40123,   53,38305,16937,40127,  251,38305,   21,38305,38004,38305,
-    7,40135,37241,38305,    6,40138,    2,40141,35187,40142,35187,40141,
-    2,40146,    2,40147,38056,40141,37663,40138,    3,40138,40145,40157,
-40149,40157,40153,40157,    3,40139,40151,40165,40093,40165,36773,38305,
-37933,40171,37899,40173,37933,40170,35931,40170,  483,40179,37617,40170,
-  483,40183,37899,40170,37933,40187,  483,40187,37409,40170,    3,40193,
-  483,40171,35931,40197,37617,40197,37899,40197,    6,40170,37844,40205,
-    3,40205,35187,40208,35187,40205,    3,40212,    7,40171,40207,40217,
-40211,40217,40215,40217,40195,40217,    2,40217,40193,40227,37845,40217,
-40205,40231,37845,40170,    7,40235,37325,38305,    7,40238,    2,40241,
-    2,40240,    7,40239,35187,40247,    3,40249,    3,40248,    3,40247,
-35187,40254,    3,40246,37844,40247, 1368,40238,  586,40239, 1369,40238,
-37845,40238,40259,40269,40265,40269,  587,40239,    2,40238,    7,40276,
-40251,40277,    3,40238,40243,40283,35187,40282,40275,40287,    3,40239,
-40279,40291,40245,40291,40269,40291,    7,40290,40269,40299,40263,40291,
-    2,40239,40287,40305,40257,40305,40253,40305,40261,40305,40267,40305,
-10219,38305,    7,40316,    2,40318,    2,40319, 1368,40316, 1369,40316,
-    2,40317,40327,40329,    3,40317,40321,40333,40325,40333,    2,40316,
-    7,40338,40333,40341,    3,40316,40323,40345,  413,38305,    7,40349,
-  375,40349, 1217,38305,  483,40355, 1216,38305,    7,40359,  412,38305,
-  483,40363,36348,38305,    2,40366,36429,40369,38233,38305,    7,40373,
-25296,38305,    7,40377,  265,38305,27978,40381,30492,40380,   17,40380,
- 8495,40387,    6,40380,   11,40391,    7,40380,30091,40394,    7,40381,
-27021,40399, 9195,40399,40391,40399,40001,40399,21605,40398,    6,40381,
-40395,40411,40007,40411,   17,40411,21605,40381,    7,40418,   17,40419,
-  241,40380,  483,40425,21605,40380,    7,40429,30091,40380,    7,40432,
-   11,38305,18967,40436,  483,40439,  587,40436,  483,40443, 1369,40436,
-  483,40437,  587,40449,    3,40436,    3,40437, 9875,40455,20501,40455,
- 1011,38305,  483,40461,  587,40463,  587,40460,  483,40467,    9,40460,
- 9565,40471,    7,40461,  959,40475,  759,40475,   47,40475,  903,40460,
-    7,40483,   15,38305, 1369,40486, 1011,40489,  241,40486,  483,40493,
-    3,40486,  165,40497,    3,40487,  253,40501, 1471,40501,   53,40501,
-21605,38305,27533,40509,   15,40509,31103,40513, 1275,40509,    7,40508,
-23755,40519,39633,40519,27805,40519,26331,40519,25793,40519, 8495,40519,
-    7,40509,26219,40533,  305,40533,   25,40533,  713,40533,  265,40509,
-31103,40543,  265,40508,    7,40547,25367,38305,    6,40551,    7,40551,
-    6,40550,40555,40557,    7,40550,40553,40561,   17,38305,19917,40565,
-  587,40565,  265,40564, 8495,40571,  265,40565, 8861,40575,    3,40564,
-  113,40579,    3,40565,10109,40583,10108,40583,10108,40582,40585,40589,
-10109,40582,40587,40593, 1141,40583, 1447,40583,   33,40583,  903,38305,
-    7,40603, 1141,40605, 1447,40605,   33,40605, 1011,40602,    7,40613,
-18967,38305, 1108,40617, 1072,40617,  165,40617, 1291,40617,  524,40617,
-    9,40617, 1011,40628,   11,40616,  483,40633,   11,40617,  483,40636,
-  483,40617,   11,40641, 1011,40640,  587,40641,   11,40640,    9,40616,
-  587,40616,  483,40653,    7,40616, 1141,40657, 1447,40657,   33,40657,
- 1011,40617,21183,40665,    7,40665,  483,40664,    9,40664,  241,38305,
-  483,40675,   15,40674,  483,40679,    9,40675,    7,40674,  375,40685,
- 9805,40685,    7,40675,  265,40691,   59,40691,  331,40691, 1325,40691,
-  265,40674,  483,40701,    9,38305, 7963,40704, 7961,40707,27995,40704,
-27533,40711,17573,40704,10001,40715,13755,40705, 9377,40719,    1,40704,
-    3,40723,    1,40724,40705,40727,    7,40724,40729,40731,    7,40723,
-    3,40734,  586,40723,    6,40704,    3,40741,    6,40742,40705,40745,
-    0,40742,40747,40749,    0,40741,    3,40752,21604,40704,    3,40757,
-    7,40758,    7,40757,    3,40762,  586,40757, 1274,40704,    3,40769,
-    0,40770,    0,40769,    3,40774, 9377,40704,27533,40779,10001,40779,
-13755,40779,10001,40705,17573,40787, 9377,40787,27533,40705,27995,40793,
- 9377,40793,21605,40705,26715,40799,26865,40799,40761,40799,40765,40799,
-40731,40799,40737,40799,    6,40799,26719,40799,40739,40799,40767,40799,
-  587,40799,26625,40821,40723,40821,40757,40821, 1275,40705, 1991,40829,
- 3621,40829,40773,40829,40777,40829, 5299,40829,40749,40829,40755,40829,
-    1,40829, 4907,40829,17711,40829, 1011,40704, 9565,40851,  587,40704,
-39515,40855,39523,40855, 3507,40855, 1971,40855,    0,40855,40829,40865,
-40845,40855,21783,40855,23983,40855, 4625,40855,10603,40855,39533,40855,
-21605,40855,  713,40881,39489,40881,18967,40704, 1011,40705,18967,40889,
- 9617,40889,    2,40704,36727,40895,37895,40895,36079,40895,    3,40704,
-11251,40903, 5177,40903,    2,40705,36729,40909,    3,40705,11355,40913,
-30748,38305,    7,40916,17125,38305,    7,40920,30091,38305,  340,40924,
-    7,40924,25793,40929,  265,40928, 1011,40925,    7,40935,  265,40925,
-    7,40939,  265,40924,    7,40942,14315,38305,31103,40947,  375,40947,
-    7,40947, 8495,40953,37845,38305,37897,40957, 1275,40957,36945,40956,
-    6,40957,    7,40957,    6,40956,40967,40969,36773,40969,    7,40956,
-38389,40975,39633,40975,40965,40975,36773,40956,    7,40983,37409,38305,
-37285,40986,  113,40987,    2,40987,39313,40993,40157,40993,    3,40987,
-39439,40999,40217,40999,    2,40986,38305,41005,    7,41007,40999,41009,
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-39323,41019,40972,41019,40989,41019,39009,41019,38751,41019,40094,41019,
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-  587,41380,40967,41019, 9195,41019,   11,41388,20413,41019,20885,41392,
-10219,41019,  587,41397,20501,41019,   10,41400,   10,41401,   11,41400,
-41405,41407,   11,41401,41403,41411,  253,41019,    6,41019,40373,41417,
-40135,41417,40235,41417,40983,41417,40967,41417,27021,41417,40533,41417,
-30091,41417, 4713,41417,16363,41417, 4863,41417,13119,41417,26415,41417,
- 8757,41417,23493,41417,27377,41417, 4213,41417, 9195,41417,39489,41417,
- 9335,41417, 4147,41417, 3933,41417, 8109,41417,36212,41417,36773,41417,
-20103,41417, 8337,41417,37145,41417, 8997,41417,40957,41417,  241,41417,
-35187,41478,18967,41417,   11,41483,35187,41417,  241,41486,  587,41487,
-  587,41417, 8387,41417,20187,41417,14653,41417,36945,41417,    7,41019,
-30091,41502,26331,41503, 8717,41503,23755,41503,27805,41503, 3785,41503,
-40957,41502,36212,41502,39633,41503,10055,41503, 4329,41503, 4311,41503,
-10351,41503,36773,41502,20103,41502, 8337,41502, 8997,41502, 1275,41503,
-   15,41503,18967,41541,35187,41502,  241,41544,  241,41502,35187,41548,
-27021,41019,   11,41552,   53,41019,    6,41018,41165,41559,41531,41559,
-41517,41559,41157,41559,40975,41559,40103,41559,41537,41559,41169,41559,
-41167,41559,41239,41559,41533,41559,41535,41559,40011,41559,27979,41559,
-40519,41559,41549,41559,41311,41559,16381,41559,13325,41559,26293,41559,
- 8685,41559,41361,41559,41545,41559,41503,41559,36773,41607,40957,41607,
- 8997,41607,20103,41607, 8337,41607,  241,41607,35187,41607, 1369,41559,
- 4569,41559,35843,41559,19513,41559, 3863,41559, 9955,41559, 4063,41559,
-37377,41559,10273,41559,20697,41559, 4137,41559,37019,41559,20219,41559,
- 8401,41559,14625,41559,    7,41018,41181,41653,41466,41653,41387,41653,
-41476,41653,41474,41653,41185,41653,41183,41653,41171,41653,41468,41653,
-41470,41653, 8997,41653,41417,41674,41315,41653,41478,41653,26219,41653,
- 8647,41653,41381,41653,41486,41653,19396,41653,41417,41653,36773,41692,
-40957,41692, 8997,41692,20103,41692, 8337,41692,  241,41692,35187,41692,
-20103,41653,41417,41708, 8337,41653,41417,41712,36773,41653,41417,41716,
-  483,41653,    9,41653,18967,41722,  241,41653,    1,41727,41417,41729,
-41417,41726,18967,41653,    9,41734,40957,41653,41417,41738,35187,41653,
-41417,41742,   11,41019,27021,41746,  587,41746, 9195,41746,20501,41746,
- 9377,41746, 9875,41746,20763,41746,    9,41019, 4669,41762,11949,41762,
-19631,41762,18967,41762,20273,41762, 9617,41762,   17,41019,20762,41776,
-20762,41777,20763,41776,41781,41783,20763,41777,41779,41787,40957,41019,
-    6,41790,    7,41790,41559,41795,    6,41791,41795,41799,    7,41791,
-41793,41803,41417,41803, 9617,41019,    9,41808,36212,41019,    7,41812,
-35187,41019,  256,41816,    7,41816,  241,41820,41559,41821,    7,41817,
-41417,41827,  241,41816,    7,41830,  241,41019,    1,41835,    7,41837,
-41559,41839,    7,41836,41417,41843,37408,41834,    7,41835,    1,41848,
-41417,41851,41417,41849,    7,41834,41559,41857,35187,41856,35187,41834,
-    7,41862,18967,41019,  483,41867,    9,41866,30091,41019,    7,41872,
-14315,41019, 8997,41019,    7,41878,41559,41881,    7,41879,41417,41885,
-20273,41019,    9,41888, 8337,41019,    7,41892,41559,41895,    9,41893,
-  483,41893,    7,41893,41417,41903,20103,41019,21183,41906,    7,41906,
-41559,41911,    9,41907,  483,41907,    7,41907,41417,41919,36773,41019,
-40097,41922,40969,41922,    7,41922,41559,41929,    9,41923,  483,41923,
-    7,41923,41417,41937,    2,38304,38595,41941,40177,41941,39459,41941,
-38591,41941,38593,41941,40155,41941,39451,41941,38589,41941,39237,41941,
-39241,41941,39239,41941,38599,41941,38597,41941,38633,41941,38631,41941,
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-38955,41941,40887,41941,39235,41941,35895,42025,15879,42025, 4787,42025,
- 8982,41941,  668,41941,26625,42035, 9731,42035, 1419,41941, 9731,42041,
-26625,42041,40471,41941,38931,41941,40037,41941,40851,41941,37617,41941,
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-35187,42066,31103,41941,26625,42070, 9195,41941,  483,41941,39433,41941,
-37241,42079,  587,41941,    1,42083,35187,42083,    9,42082, 9731,42089,
-26625,42089,    6,41941,    2,42095,21605,42097,38305,42099,    5,42094,
-38881,42103,42101,42103,    2,42094,38305,42109,    7,41940, 9459,42113,
- 8953,42113, 3997,42113, 4067,42113, 8277,42113, 3867,42113,    9,41941,
-  587,42126, 9731,42129,26625,42129,   17,41941, 8861,42134,26625,41941,
-31103,42138, 8861,41941,    7,42143,   17,42142,35187,41941,  375,42148,
- 9731,41941,    7,38304,39023,42155,41231,42155,25445,42155,    1,42155,
-    2,42162,    3,42162,38903,42167,38971,42167,39161,42167,40855,42167,
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-39161,42197,38971,42197,38903,42197,40855,42197,39175,42155,38987,42155,
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-31598,42155,25299,42155,  357,42155,  367,42155,  471,42155, 1249,42155,
-35690,42155,37519,42155,  272,42155, 1476,42155,  280,42155,  949,42155,
- 1517,42155,40387,42155,40571,42155,40033,42155,38939,42155,21087,42155,
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-  265,42270,  375,42155,35187,42274,31103,42155,26625,42278,25381,42155,
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-    9,42294,   53,42155,  265,42298,20273,42155,    9,42302,37899,42155,
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-38004,42155,36773,42155,37845,42322,38056,42155,39019,42327,37145,42327,
-37844,42155,40305,42333,37933,42155,  483,42155,37845,42155,36773,42340,
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- 9195,42155,  713,42356,    2,42155,    1,42360, 8229,42361,40987,42361,
-35187,42361,36773,42369,35187,42360,39019,42373,37145,42373,    3,42155,
-42179,42379,    1,42379,    7,42379,   15,42385,38305,42387,    1,42378,
-38903,42391,38971,42391,39161,42391,40855,42391,18967,42391,42389,42391,
-    7,42378,40704,42405,42391,42407,    9,42405,38305,42410,42391,42413,
-38305,42405,    9,42416,42391,42419,40987,42378, 1369,42379,35187,42378,
-40305,42427,   25,42155,21605,42431,    2,42154,    1,42435,42379,42436,
-42382,42435,42423,42435,42269,42435,42333,42435,42427,42435,42379,42435,
-    1,42450,40987,42451,35187,42451, 3997,42435, 4067,42435, 9459,42435,
- 8953,42435, 8277,42435, 3867,42435,    3,42154,42165,42471,42363,42471,
-42345,42471,42366,42471,26219,42471, 8647,42471,42341,42471,42368,42471,
-19396,42471,42361,42471,    1,42491,40987,42490,35187,42490,41417,42471,
-  483,42471,18967,42471,    9,42502,    9,42471,18967,42506,40987,42471,
-42361,42510,35187,42471,42361,42514,32805,42155,  265,42155,  253,42520,
- 1471,42520,   53,42520,40987,42155,    3,42528,42435,42531,    3,42529,
-42361,42535,35187,42155,    7,42539,38305,42541,    2,42543,    2,42542,
-    2,42541,38305,42548,    2,42540, 1368,42539,  375,42538, 1369,42539,
-    2,42538,39019,42561,38305,42560,42559,42565,37145,42561,    3,42538,
-40305,42571,42545,42571,42435,42571,    3,42539,40277,42579,39315,42579,
-    7,42579,38305,42585,42561,42587,42551,42579,42547,42579,42561,42579,
-42361,42579,    2,42539,    7,42598,42571,42599,37845,42599,    9,42155,
-20273,42606, 9617,42606,    6,38304,40509,42613,31103,42615,21604,42613,
-40471,42613,40851,42613,40037,42613,38931,42613, 8982,42613,27979,42613,
-  483,42631,41941,42631,40957,42613,37933,42637,41503,42613,  483,42641,
- 8861,42613,   17,42644,17423,42613, 1011,42649, 4745,42613, 1011,42653,
- 9875,42613, 1011,42657, 1471,42613,36773,42613,  483,42663,37844,42613,
-40305,42667,37979,42613,41941,42671, 1369,42613,38057,42675,  331,42613,
-   17,42678, 1325,42613,   17,42682,  334,42613, 1328,42613, 8337,42613,
-  483,42691,20103,42613,  483,42695,   53,42613,  393,42613, 1359,42613,
-    3,42613,  483,42705,35187,42704,40305,42709,10257,42705,37357,42705,
-    2,42613,   62,42613,   59,42613,   17,42720,20501,42613, 1011,42725,
-  253,42613,    3,42612,40975,42731,40103,42731,27979,42731,40519,42731,
-40011,42731,16381,42731,13325,42731,26293,42731, 8685,42731,41503,42731,
- 1369,42731, 4569,42731,35843,42731,19513,42731, 3863,42731, 9955,42731,
-20697,42731, 4137,42731,37019,42731, 8401,42731,20219,42731, 4063,42731,
-14625,42731,37377,42731,10273,42731,18967,42613,  165,42783,  241,42613,
-35187,42613,    3,42788,40305,42791,    3,42789,40277,42795,39315,42795,
-   17,42613, 8861,42800,  331,42800, 1325,42800,   59,42800,    7,38305,
-25004,42810,25005,42810,25184,42810,25185,42810,  264,42811,    5,42811,
-    0,42822,    3,42822,    1,42810,    4,42829,25004,42811,42815,42833,
-25184,42811,42819,42837,25005,42811,42813,42841,25185,42811,42817,42845,
-41493,42811,41622,42811,25367,42810,30748,42810,39650,42811,42752,42811,
-38673,42811,38675,42811,39823,42811,39783,42811,27533,42811,26625,42869,
-  331,42811,35187,42873,41559,42811, 1369,42876,  767,42811,18967,42881,
-41019,42811,37899,42885,37617,42885,35931,42885,27021,42885,30091,42885,
- 9195,42885,25793,42811,30091,42899,27021,42899,37845,42811,42667,42905,
-   59,42811,35187,42909, 1325,42811,35187,42913,37897,42811,17125,42810,
-30091,42810,25793,42921,41019,42921,  265,42920, 1369,42811,30091,42929,
-41559,42928,20103,42929, 8337,42929,36773,42929,42731,42928,39633,42928,
-42707,42811,42704,42811,  483,42947,39633,42811, 1369,42950,39749,42811,
-  483,42955, 1275,42811,  265,42810,40411,42961,30091,42960,21605,42810,
-26331,42967,25793,42967,23755,42967,27805,42967,39633,42967,42731,42967,
-41559,42967,41019,42967, 8495,42967,42731,42811, 1369,42986,  241,42810,
-  375,42991, 9805,42991,18967,42810, 1141,42997,   33,42997, 1447,42997,
-  265,42811,35187,43005, 9377,43005, 9533,43005,37145,43005,21605,42811,
-34311,43015,42619,43015,26625,43015,24545,43015, 9731,43015,    2,42810,
-    3,42810,    0,43028,43005,43031,  295,43029, 1108,43029,35927,43029,
-38155,43029,37611,43029,    9,43029, 1011,43044, 1011,43029,    9,43048,
-    2,42811,42831,43053,    5,43053,42829,43057,36256,43053,    9,43053,
-35187,43062,35187,43053,    9,43066,    3,42811,    5,43070,22807,43071,
-37663,43071,42613,43070,  483,43079,  241,43071,    9,43083,37845,42810,
-41559,43087,38389,43087,42731,43087,39633,43087,41019,43087,42613,42811,
-32805,43099,37845,43098,37845,43099,37844,43098,43105,43107,37844,43099,
-43103,43111,    3,43099, 1369,43115,    3,43098,  483,43119,   15,42811,
-20273,43123, 9617,43123,35187,42810,    7,43129,    2,43130,    2,43131,
-38305,43129,    3,43136,43135,43139,    3,43137,43133,43143, 1368,43129,
-43143,43147,   59,43129, 1325,43129,  331,43129,  265,43129,    2,43129,
-    7,43158,43143,43161,    3,43129,38305,43164,43135,43167,37408,38305,
-    7,43171,    2,43172,40999,43175,    2,43173,40101,43179,41017,43179,
- 1368,43171,40999,43185,   59,43171, 1325,43171,  331,43171,  265,43171,
-    2,43170,37783,43197,    2,43171,    7,43200,40999,43203,37617,43201,
-    3,43171,38305,43208,43179,43211,    3,38305,43129,43214,43135,43217,
-    1,43214, 1011,43221,42041,43221, 1418,43221,41941,43227,42035,43221,
-  669,43221,41941,43233,42089,43221,42129,43221, 1369,43221,   15,43240,
-41941,43243,   15,43221, 1369,43246,41941,43249,11989,43215,    9,43253,
-13737,43215,    9,43257,37357,43215,10257,43215,38118,43215,38132,43215,
-37544,43215,37409,43215,  483,43270,  113,43215,  587,43275,37345,43215,
-37241,43214,40993,43281,40993,43215,37241,43285,    9,43215,38057,43288,
-  483,43215,38057,43292,37409,43292,10289,43215,   15,43214,  165,43301,
-   11,43214,    9,43214,11251,43307, 5177,43307,   17,43214,  113,43313,
-   11,43215,  165,43215,    7,43214,    0,43321,    4,43322,    4,43321,
-    0,43326,35186,43321,  295,43321, 1108,43321,35927,43321,38155,43321,
-37611,43321,    9,43321, 1011,43342, 1011,43321,    9,43346,    7,43215,
-21604,43351,    1,43351,    3,43354,    3,43351,    1,43358,   15,43351,
-38305,43363,43353,43365,43357,43365,43361,43365, 1011,43363,37409,43214,
-43179,43375,41941,43215,37408,43379,    7,43379,35187,43382,35187,43379,
-    6,43386,    7,43386,    6,43387,43391,43393,    7,43387,43389,43397,
- 1011,43215,37408,43401,    7,43401,35187,43404,35187,43401,    7,43408,
-38057,43215,40097,43413,40969,43413,    7,43413,    9,43412,  483,43412,
-35187,43214,40305,43425,40275,43425,38305,43425,    6,43430,43413,43433,
-    6,43425,38305,43436,43413,43439,41941,43425,    6,43443,    7,43443,
-    6,43442,43447,43449,    7,43442,43445,43453, 1011,43425,    7,43457,
-37844,38305,42336,43461,42917,43461,42905,43461,39013,43461,40305,43461,
-40275,43461,37933,43461,42155,43474,42155,43461,37933,43478,    6,43460,
-41941,43461,    6,43485,    7,43485,    6,43484,43489,43491,    7,43484,
-43487,43495, 1011,43461,    7,43499,    2,38305,41603,43503,41686,43503,
-41825,43503,41828,43503,42541,43502,42579,43513,16936,43503,36400,43503,
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-36439,43523,41744,43503,41688,43503,41605,43503,41706,43503,41620,43503,
-    1,43503, 1275,43544,    4,43544,    7,43544,41417,43551,    7,43545,
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-    7,43565,41019,43593,41653,43595,41019,43592,41559,43599,    5,43502,
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- 8315,43503,37408,43502,37783,43643,42538,43503,42601,43647,42553,43647,
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- 9731,43711,43221,43711,43549,43711,26625,43711,  587,43503,42811,43721,
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-41019,43761,35895,43784,15879,43784, 4787,43784,15879,43761,39489,43792,
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-41019,43804,  587,43761,35187,43810,39869,43813,35187,43761,  587,43816,
-39869,43819,  587,43817,39489,43823,41019,43823,39489,43761,15879,43828,
- 4787,43828,35895,43828,    7,43502,    6,43503,36348,43838,36439,43841,
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-41019,43889,43761,43892,43761,43889,41019,43896,41816,43848,41559,43901,
-41019,43848,41559,43905,35187,43907,35187,43904,41559,43911,41019,43849,
-41827,43915,43851,43915,41742,43915,41653,43915,35187,43922,35187,43915,
-41653,43926,35187,43848,41417,43931,41019,43930,41559,43935,41019,43931,
-41653,43939,37409,43502,41354,43943,40165,43943,41019,43943,37241,43948,
-37241,43943,41019,43952,37408,43503,41417,43957,37663,43957,41019,43956,
-41559,43963,41019,43957,41653,43967,41816,43503,    6,43970,    7,43970,
-41559,43975,    6,43971,43975,43979,    7,43971,43973,43983,41417,43983,
-41019,43503,    1,43989,    7,43990,41417,43993,    7,43991,41559,43997,
-37408,43988,41559,44001,37408,43989,41381,44005,    7,43989,41381,44009,
-41486,44009,    1,44008,41417,44015,41417,44009,35187,44018,35187,44009,
-41417,44022,    7,43988,41559,44027,35187,44029,35187,44026,41559,44033,
-35187,43988,    6,44036,    7,44036,41559,44041,    6,44037,44041,44045,
-    7,44037,44039,44049,41417,44049,21605,43503,    7,44055,  265,44057,
-35187,43503,41692,44060,41607,44060,41502,44060,41559,44067, 1275,44060,
-41653,44060,41417,44072,36945,44061,41019,44077,41417,44060,41653,44080,
-    6,44061,41922,44085,43413,44085,41019,44085,36773,44090,36773,44085,
-41019,44094,    7,44061,41559,44099,42731,44099,39633,44099,41019,44099,
-    6,44060,44099,44109,    7,44060,41417,44113,41019,44112,41559,44117,
-44085,44113,41019,44113,41653,44123,41019,44060,    6,44126,    7,44126,
-41559,44131,    6,44127,44131,44135,    7,44127,44129,44139,41417,44139,
-36773,44061,41417,44145,    7,44145,41019,44149,35187,43502,41217,44153,
-41472,44153,29229,44153,41099,44153,36429,44153,42559,44153,41417,44153,
-37145,44166,37783,44153,37214,44153,41019,44173,    7,44153,41019,44177,
-37145,44179,37145,44176,41019,44183,37145,44153,41417,44186,    7,44186,
-41019,44191,38056,38305,41472,44195,41217,44195,41099,44195,29229,44195,
-36429,44195,42559,44195,35187,44195,    6,44209,43413,44211,41417,44195,
-37145,44214,37783,44195,37214,44195,41019,44221,    7,44195,41019,44225,
-37145,44227,37145,44224,41019,44231,37145,44195,41417,44234,    7,44234,
-41019,44239,    6,38305,42453,44243,42493,44243,42472,44243,42439,44243,
-42474,44243,42441,44243,42363,44243,42471,44256,42381,44243,42165,44243,
-42471,44262,42325,44243,42330,44243,42343,44243,42321,44243,42319,44243,
-42371,44243,42376,44243,42568,44243,42447,44243,42484,44243,42054,44243,
-42056,44243,44171,44243,43645,44243,43960,44243,44219,44243,43201,44243,
-37617,44298,43206,44243,38711,44243,43199,44243,42605,44243,40231,44243,
-43677,44243,40959,44243,10586,44243,10827,44243,42594,44243,42603,44243,
-42577,44243,42596,44243, 6664,44243, 6243,44243, 9780,44242,  566,44242,
-  566,44243,  567,44242,44337,44339,43517,44243, 9781,44242,42012,44243,
-36303,44242,36303,44243,26970,44242,26971,44242,43639,44243, 4593,44243,
- 6625,44358, 3113,44243, 3023,44243, 4736,44243, 6653,44243,42518,44243,
- 3251,44243,42516,44243,42486,44243,42449,44243,42496,44243,42456,44243,
-19257,44243,19243,44243,43425,44242,43413,44389,40511,44243,17452,44243,
-42085,44243,43707,44243,42087,44243,40961,44243,43709,44243,44071,44243,
-36099,44243,36098,44242,44409,44411,36099,44242,36098,44243,44415,44417,
-43605,44243,43222,44242,43223,44243,44423,44425,43222,44243,43223,44242,
-44429,44431,42199,44243,24081,44243,42181,44243,42383,44243,42435,44441,
-42401,44243,42177,44243,43547,44243,    5,44242,42283,44451,25380,44451,
-42155,44455, 1369,44451,21605,44458,42155,44461,21605,44451, 1369,44464,
-42155,44467,42373,44243,37145,44470,42561,44243,37145,44474,42579,44474,
-42327,44243,37145,44480,27514,44243,42490,44243,35187,44486,42451,44243,
-35187,44490,  413,44243,32805,44243,42155,44496,28547,44243,42064,44243,
-42138,44243,40517,44243,40543,44243,30294,44243,38004,44243,43461,44513,
-38232,44243,42155,44517,38005,44243,42155,44521,30749,44243, 9780,44243,
-44345,44527,26970,44243,44355,44531, 6625,44243, 4593,44534,   33,44535,
- 9781,44243,44333,44541,25005,44243,26971,44243,44353,44547,25185,44243,
-25589,44243,42074,44243,42152,44243,10831,44243,   77,44243,  120,44243,
-  506,44243,38041,44243, 5101,44243,16989,44243,10511,44243, 4931,44243,
- 5267,44243,16981,44243,13017,44243,12705,44243,13673,44243,18391,44243,
-18617,44243,14599,44243, 9366,44243,36302,44243,18217,44243,42332,44243,
-42435,44599,42570,44243,42435,44603,42426,44243,42435,44607,41539,44243,
-41720,44243, 9132,44243, 1216,44243,36302,44242,    3,44618,44351,44621,
-30748,44243,30748,44242,44525,44627,30749,44242,44625,44631,16931,44243,
-35931,44243,41941,44636,39600,44243,42500,44243,18929,44243,38669,44243,
-38677,44243,17019,44243,39941,44243,39955,44243,27021,44243,  483,44656,
-41941,44656,37844,44242,44351,44663,41653,44243,  483,44666,43413,44243,
-43425,44671,42514,44243,42361,44674,42368,44243,42471,44678,42361,44243,
-42579,44682,42514,44682,42471,44682,35187,44688,35187,44682,42471,44692,
-20234,44243, 8444,44243,  567,44243,44335,44701,16937,44243,   11,44705,
- 1369,44705,26625,44243,41941,44710,41941,44243,37899,44714,37617,44714,
-35931,44714,27021,44714,26625,44714, 9195,44714, 9731,44714,43957,44243,
-37663,44730,20103,44243,  483,44734, 8337,44243,  483,44738, 9533,44243,
- 4727,44243,   25,44744,10527,44243,   25,44748, 4541,44243,38128,44243,
-38057,44243,42155,44757,37145,44759,37145,44756,42155,44763,  587,44756,
-37845,44243,43461,44769,36773,44771,36773,44768,43461,44775,   25,44243,
-10527,44778, 4727,44778,  113,44778, 9195,44243,41941,44786,  483,44786,
-37782,44243,43197,44793,43643,44793,38709,44793,17451,44243, 1011,44800,
-35688,44243,36910,44243,36923,44243,37899,44243,41941,44810,37617,44243,
-41941,44814,43201,44814, 9731,44243,41941,44820, 8997,44243,  483,44824,
-   66,44243,   33,44829,  483,44243,27021,44832,30091,44832,  241,44832,
- 9195,44832,41653,44832, 8997,44832,42471,44832,39489,44832,20103,44832,
- 8337,44832,36773,44832,  903,44243, 1011,44856,18967,44243,  567,44861,
-  566,44860,44863,44865,  566,44861,  567,44860,44869,44871,  241,44243,
-  483,44874,42425,44243,42378,44243,42435,44881,35187,44883,35187,44880,
-42435,44887, 1369,44881,36773,44243,37845,44892,43461,44895,  483,44892,
-37845,44893,41019,44901,37145,44243,42327,44904,42373,44904,42561,44904,
-38057,44904,42155,44913,42341,44243,42471,44916,30091,44243,  483,44920,
-  113,44243,   25,44924,35187,44924,17125,44243,37663,44243,43957,44932,
-39489,44243,  483,44936,39943,44243, 1369,44941,  587,44243,43215,44945,
-35895,44947,15879,44947, 4787,44947,38057,44944, 8449,44243,20237,44243,
-  265,44242,40399,44961,   11,44961,42471,44243,42165,44966,42363,44966,
-42341,44966,42368,44966,42361,44966,35187,44976,  483,44966,35187,44966,
-42361,44982,20834,44243, 1011,44243,17451,44988,35187,44988,  903,44988,
-20763,44988,20763,44243, 1011,44998,  257,44243,42579,44243,42561,45004,
-42361,45004,    2,44242,39616,45011,39614,45011,39578,45011,39901,45011,
-41282,45011,41266,45011,41270,45011,39961,45011,39981,45011,35718,45011,
-39869,45031,41019,45011,35895,45034,15879,45034, 4787,45034,15879,45011,
-39489,45042,41019,45042, 4787,45011,39489,45048,41019,45048,35895,45011,
-39489,45054,41019,45054,  587,45011,35187,45060,39869,45063,35187,45011,
-  587,45066,39869,45069,  587,45067,39489,45073,41019,45073,39489,45011,
-15879,45078, 4787,45078,35895,45078,    3,44242,36302,45087,44349,45089,
-35187,45086,44351,45093,    2,44243,   14,45097,    5,45097,    6,45100,
-    6,45097,    5,45104,21605,45097,38305,45109,45099,45111,45103,45111,
-45107,45111,43215,45097,43325,45119,43329,45119,35895,45119,15879,45119,
- 4787,45119,43331,45119,35187,45119,43321,45133,35187,45096,39313,45137,
-40157,45137,43281,45137,43215,45137,37241,45145,    3,44243,42539,45148,
-38305,45149,37408,45152,37408,45153,45067,45149,41019,45159,    4,45149,
-    0,45163,38305,45163,    0,45162,45034,45169,41019,45169,45011,45172,
-45011,45169,41019,45176,45119,45169,    0,45149,38305,45183,    4,45182,
-45034,45187,41019,45187,45011,45190,45011,45187,41019,45194,45119,45187,
-    0,45148,38305,45148,    1,45148,45176,45205,45194,45205,45169,45205,
-45011,45210,45187,45205,45011,45214,45159,45205,45011,45205,45169,45220,
-45187,45220,35186,45148,35186,45149,38305,45229,    7,45231,45220,45229,
-45205,45229,45011,45236,45034,45229,41019,45229,45011,45242,45011,45229,
-45205,45246,41019,45246,45119,45229,    1,45149,45165,45255,45011,45257,
-45167,45255,45011,45261,    5,45149,45185,45265,45011,45267,43171,45149,
-37617,45271,42538,45148,42435,45275,37409,45148,38709,45279,43197,45279,
-45155,45279,43643,45279,42155,45148,42435,45289,35187,45291,35187,45288,
-42435,45295, 1369,45289, 1011,45149,  483,45301,   11,45148,   33,45305,
-37409,45149,45157,45309,43957,45309,   11,45149,   25,45315,35187,45315,
-42155,45149,42579,45321,45151,45321,42514,45321,42471,45321,35187,45328,
-35187,45321,42471,45332,45066,45149,45201,45337,45203,45337,35187,45149,
-45201,45343,45011,45345,45203,45343,45011,45349,45011,45342,45201,45353,
-45203,45353,45011,45149,35187,45358,45201,45361,45203,45361,35187,45148,
-40217,45367,45233,45367,42155,45366,42435,45373,42155,45367,42471,45377,
-37845,44242,41922,45381,43413,45381,44595,45381,44993,45381,41019,45381,
-36773,45390,36773,45381,41019,45394,38056,44243,39313,45399,40157,45399,
-43281,45399,43215,45399,37241,45407,37844,44243,40217,45411,42155,45410,
-42435,45415,42155,45411,42471,45419,42538,44243,    3,45422,42435,45425,
-    3,45423,42361,45429,42155,44243,32805,45432,37845,45432,37845,45433,
-37844,45432,42435,45441,45439,45441,37844,45433,42341,45447,45437,45447,
-    3,45433,42341,45453,42368,45453,42361,45453,35187,45458,35187,45453,
-42361,45462,  483,45453,    3,45432,42435,45469,35187,45471,35187,45468,
-42435,45475, 1369,45469,35187,45432,    3,45480,42435,45483,    3,45481,
-42361,45487,   11,44243, 8861,45491,    3,45490,   33,45495,    3,45491,
-  113,45499,  331,45491, 1325,45491,   59,45491,35187,44243,42490,45508,
-42451,45508,38305,45508,    7,45515,    2,45517,    2,45516,    2,45515,
-    7,45522, 1368,45515, 1011,45508,45381,45529,42378,45508,42435,45533,
-42471,45508,42361,45536,37285,45509,41019,45541,42361,45508,42471,45544,
-  113,45508,    2,45509,41354,45551,40165,45551,38305,45551,    7,45557,
-41019,45551,37241,45560,37241,45551,41019,45564,    3,45509,45519,45569,
-    2,45508,40157,45573,39313,45573,43281,45573,43215,45573,37241,45581,
-    3,45508,40217,45585,45521,45585,45525,45585,45559,45585,45527,45585,
-42155,45584,42435,45597,42155,45585,42471,45601,42155,45508,    3,45604,
-42435,45607,    3,45605,42361,45611,37409,44243,43503,45615,37663,45617,
-    3,45615,43201,45621,    3,45614,38709,45625,43197,45625,43643,45625,
-35187,44242,    3,45632,44351,45635,35187,38305,37214,45639,    2,45641,
-39019,45643,39021,45641,37286,45639,35890,45638,35891,45639,45651,45653,
-35891,45638,35890,45639,45657,45659,38152,45638,38153,45639,45663,45665,
-38296,45638,38297,45639,45669,45671,38153,45638,38152,45639,45675,45677,
-38297,45638,38296,45639,45681,45683,37283,45639,42675,45639,37282,45639,
-42674,45639,37899,45638,37885,45695,38293,45639,37885,45639,37899,45701,
-44945,45639,38292,45639,44944,45639,37287,45639,38173,45638,38172,45639,
-45713,45715,38303,45638,38302,45639,45719,45721,38173,45639,38172,45638,
-45725,45727,38303,45639,38302,45638,45731,45733,45096,45639,45149,45639,
-    7,45738,45367,45741,45097,45639,37241,45639,    2,45747,    2,45746,
-  587,45746,42613,45639, 1369,45754,38271,45639, 1369,45758,44243,45639,
-    2,45763,    2,45762,  587,45762,  136,45639,  137,45639, 1530,45638,
-  842,45638,  669,45639, 1419,45639,  843,45639,39085,45783,45777,45783,
- 1531,45639,45775,45789, 1530,45639,  843,45638,  842,45639,45795,45797,
- 1531,45638,45793,45801, 1368,45639,45411,45805,40999,45805,45367,45805,
-45585,45805,42613,45805,37845,45805,44243,45817,  586,45639,39847,45821,
-39142,45821,39085,45821,  483,45826,37241,45821,  483,45821,39085,45832,
-  586,45638,38675,45837,39823,45837,39783,45837,39749,45837,  483,45845,
- 1418,45639,  668,45639,  587,45638,37885,45853,37202,45853,37145,45853,
-  483,45858,  483,45853,37145,45862,  587,45639,37241,45866,44243,45866,
-    9,45866,  483,45639,  587,45875,37145,45877, 1369,45639,35760,45880,
-35761,45881,45883,45885,35760,45881,35761,45880,45889,45891,42613,45880,
-38271,45880,   15,45880,    9,45639,    2,45900,    2,45901,  587,45900,
-  265,45639,  375,45909,   15,45639, 1369,45912,    7,45639,40956,45917,
-44060,45917,40957,45917,44061,45917,43502,45917,37844,45917,35187,45917,
-    3,45930,43503,45930,    3,45931,45927,45937, 1369,45931,38305,45917,
-    2,45942,45937,45945,37845,45942,    2,45943,45933,45951,45929,45951,
-  587,45943,45149,45917,37145,45959,45227,45959,37845,45917,38305,45964,
-43503,45917,35187,45968,  375,45917,45148,45917,    2,45917,40101,45977,
-41017,45977,38305,45976,45937,45983,44904,45977,45569,45977,43375,45977,
-39019,45977,44243,45977,37145,45994,37145,45977,44243,45998,    3,45917,
-35187,46002,45951,46005,44243,46002,    3,45916,45943,46011,    7,46011,
-38305,46015,45977,46017,45994,46011,45959,46011,45967,46011,45919,46011,
-45949,46011,45925,46011,37241,46011,45977,46011,44243,46034,44243,46011,
-45977,46038,    2,45916,45931,46043,40999,46043,45975,46043,45367,46043,
-45585,46043,46009,46043,45971,46043,45921,46043,45935,46043,45923,46043,
-45411,46043,42613,46043,46003,46043,44243,46069,37845,46043,44243,46073,
-44243,45917,    3,46076,46043,46079,    3,46077,45977,46083,    6,45638,
-45998,46087,46073,46087,45817,46087,37844,46087,46043,46095,45805,46095,
-35187,46087,    3,46101,45977,46103,    3,46100,46043,46107,45805,46107,
-37145,46087,45977,46112,45977,46087,37145,46116,    3,46087,35187,46120,
-46043,46123,45805,46123,45917,46121,37145,46129,45917,46087,35187,46132,
-    2,46135,    2,46134,38057,46132,38056,46132,    2,46133,46141,46145,
-    3,46133,46139,46149,46143,46149,    2,46132,35187,46154,46149,46157,
-46149,46155,    3,46132,46137,46163,46145,46163,    3,45639,    5,46169,
-    6,46171,    4,46168,    0,46168,    5,46168,    1,46168,45983,46169,
-45945,46169,43679,46169,45927,46169,40277,46169,45749,46169,45765,46169,
-39315,46169,45905,46169,37241,46169,45977,46169,42613,46203,43848,46169,
-  256,46169,    6,46169,46175,46211,46177,46211,37145,46211,    7,46169,
-46179,46219,46181,46219,41019,46219,45639,46218,    2,46227,38305,46219,
-46229,46231,    3,46231,46227,46235,45977,46231,43503,46218,  241,46218,
-38271,46219,    7,46168,37241,46247,38057,46169,38305,46251,46211,46253,
-43503,46169,    6,46256,    7,46256,    6,46257,46261,46263,    7,46257,
-46259,46267,  241,46169,    7,46270,    2,45638,41472,46275,41217,46275,
-46175,46275,46211,46280,46177,46275,46211,46284,46212,46275,46214,46275,
-46221,46275,46223,46275,46173,46275,45930,46275,46043,46299,46045,46275,
-46216,46275,46225,46275,41099,46275,46032,46275,45711,46275,46200,46275,
-45745,46275,46248,46275,46245,46275,35187,46275,45917,46322,46043,46325,
-45917,46323,46011,46329,45830,46275,29229,46275,45773,46275,36429,46275,
-45895,46275,45897,46275,45687,46275,45693,46275,45705,46275,45707,46275,
-45849,46275,45779,46275,42559,46275,45899,46275,45915,46275,45757,46275,
-45761,46275,45941,46275,41417,46275,37145,46368,45821,46275,37241,46372,
-46011,46275,37241,46376,46247,46275,37241,46380,45881,46275,42613,46385,
-37241,46275,46011,46388,46169,46388,46247,46388,45821,46388,46211,46275,
-46175,46398,46177,46398,37145,46398,37783,46275,44243,46407,45917,46275,
-35187,46410,46043,46413,37214,46275,41019,46417,46218,46275,46179,46421,
-46181,46421,41019,46421,    7,46275,41019,46429,37145,46431,46169,46429,
-46175,46435,46177,46435,37145,46435,37145,46428,41019,46443,46169,46428,
-46179,46447,46181,46447,41019,46447,37145,46275,41417,46454,46211,46454,
-    7,46454,41019,46461,46169,46275,35187,46464,    6,46467,    6,46466,
-38305,46465,46211,46473,38271,46464,44243,46465,38270,46464,37241,46464,
-    6,46465,46477,46485,    7,46465,46471,46489,46481,46489,    6,46464,
-46473,46495,35187,46494,46489,46499,46489,46495,    7,46464,46179,46505,
-46181,46505,46469,46505,46485,46505,41019,46505,    2,45639,42671,46517,
-39429,46517,44814,46517,44810,46517,44636,46517,37241,46516,40077,46517,
-44243,46516,46003,46517,37241,46535,    9,46516,44243,46517,37617,46540,
-37899,46540,35931,46540,35931,46517,44243,46548,37617,46517,44243,46552,
-37899,46517,44243,46556,    7,46517,44243,46561,    7,46516,46107,46565,
-46123,46565,46095,46565,40999,46565,45585,46565,45411,46565,45367,46565,
-42613,46565,37845,46565,46087,46583,44243,46583,37845,46517,46211,46589,
-41417,46589,    7,46589,41019,46595,    3,45638,45951,46599,45942,46599,
-46011,46603,46013,46599,46066,46599,46540,46599,40305,46599,46529,46599,
-45751,46599,46533,46599,45767,46599,46580,46599,46563,46599,45649,46599,
-45737,46599,38305,46599,45917,46630,46011,46633,45917,46631,46043,46637,
-45814,46599,45771,46599,45869,46599,45871,46599,45689,46599,45691,46599,
-45699,46599,45709,46599,45851,46599,45781,46599,40275,46599,46539,46599,
-45903,46599,45873,46599,45907,46599,45753,46599,45769,46599,45957,46599,
-45805,46599,42613,46676,46043,46599,42613,46680,46565,46599,42613,46684,
-45867,46599,37241,46689,42613,46599,46043,46692,46565,46692,45805,46692,
-45917,46599,38305,46700,46011,46703,46560,46599,44243,46599,46517,46708,
-    7,46599,38305,46713,46517,46715,46517,46712,41941,46599,    6,46721,
-    7,46721,    6,46720,46725,46727,    7,46720,46723,46731, 1011,46599,
-    7,46735,46517,46599,38305,46738,35187,46739,    6,46742,    6,46743,
-44243,46738,38271,46739,38270,46739,37241,46739,    6,46739,35187,46756,
-46741,46757,    7,46739,41019,46763,46747,46763,    6,46738,46763,46769,
-46751,46769,    7,46738,46759,46775,46745,46775,46757,46775,46753,46775,
-    6,45639,    7,45638,43214,46787,45977,46789,38305,46787,    3,46793,
-46043,46795,46565,46795,45805,46795,    3,46792,45977,46803,   59,46787,
- 1325,46787,  331,46787,  265,46787,    2,46787,    7,46814,46795,46817,
-    3,46787,38305,46820,45977,46823,46785,46787,35187,46827,    2,46828,
-    2,46829,38057,46827,38056,46827,    2,46827,35187,46838,    3,46827,
-46833,46843,    2,46826,46843,46847,46835,46847,    3,46826,46841,46853,
-46831,46853,46839,46853,46837,46853,    0,    6,13135,46863,13169,46864,
- 4871,46863, 4893,46868,13172,46863, 4894,46863,13136,46863,13143,46877,
- 4872,46863, 4879,46881,13145,46863, 4881,46863,37417,46863,38056,46888,
-38057,46889,46891,46893,38057,46888,38056,46889,46897,46899,17176,46863,
-17380,46863,16950,46863,17058,46863,16948,46863,17056,46863,16974,46863,
-17072,46863,16996,46863,17086,46863, 3348,46863,18291,46863, 7316,46863,
- 8455,46863, 8343,46863, 8353,46863,13139,46863,13175,46863,13155,46863,
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- 9955,49001,10273,49001, 4137,49001, 3863,49001, 4063,49001, 1369,49001,
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-    7,49131,49115,49136,49001,49139,49001,49137,49115,49143,49115,49131,
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-    3,49171,46863,49172,46863,49171,    3,49176,    3,49177,37845,49169,
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-38305,49217,    9,49220,    9,49217,38305,49224,    6,49204,40705,49229,
-49217,49231,49219,49229,18967,49229,    4,49236,    5,49236,    5,49237,
-    4,49237,46863,49244,49241,49247,46863,49237,    4,49250,49241,49253,
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-  903,49267,10107,49204,48875,49271,10219,49205,  903,49275,17049,49204,
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-   11,49303,37409,49303,   11,49204,   33,49309,35187,49205, 1505,49313,
-    4,49204,49289,49317,    5,49204,13118,49320, 4862,49320,13118,49321,
-13119,49320,49327,49329, 4863,49320, 4862,49321,49333,49335,15193,49321,
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- 8997,49351,37019,49321,20219,49321,35843,49321,19513,49321,37377,49321,
-20697,49321,13119,49321,49323,49367, 4863,49321,49325,49371,  241,49321,
- 9875,49321, 1471,49321,   53,49321, 8401,49321,10273,49321, 9955,49321,
- 4137,49321, 4063,49321, 3863,49321, 1369,49321,18967,49321,  483,49397,
-    4,49205,    1,49401,    7,49402,49320,49404,49321,49405,49407,49409,
-49320,49405,49321,49404,49413,49415,    7,49401,    1,49418,49320,49420,
-49321,49421,49423,49425,49320,49421,49321,49420,49429,49431,    1,49400,
-    7,49435,    7,49400,49321,49439,    0,49400,49403,49443,    7,49445,
-49321,49447,    0,49401,49436,49451,49321,49453,    7,49451,49435,49456,
-49321,49459,49321,49457,49435,49463,49435,49451,    7,49466,49321,49469,
-49321,49401,    5,49205,20645,49475, 1505,49475, 9935,49475,18967,49205,
-    7,49483,    4,49484,    4,49485,   16,49483,   17,49483,    4,49482,
-49493,49495,    5,49482,49487,49499,49491,49499,    4,49483,    7,49504,
-49499,49507,    5,49483,49489,49511,    2,46863,    6,49515,   17,49517,
-35187,49519,    0,49515,38305,49523,   15,49525,    0,49514,36545,49529,
-49521,49529,   15,49529,    6,49514,49531,49537,36544,49537,49529,49541,
-49527,49537,   11,49537,35187,49546,49529,49549,35187,49537,   11,49552,
-49529,49555,45639,49514,46599,49559,45639,49515,46275,49563,17125,49515,
-   16,49567,   16,49566,   17,49567,49571,49573,   17,49566,49569,49577,
-17049,49514,    4,49514,    7,49583,    1,49585,  265,49583,    1,49588,
-    0,49588,49587,49589,49586,49588,49595,49597,49587,49588,49586,49589,
-49601,49603,    0,49589,49591,49607,    1,49589,49593,49611,    4,49515,
- 1011,49615,    1,49617,    0,49617,    1,49616,49621,49623,    0,49616,
-49619,49627,    4,46863,27857,49630,27895,49633,19815,49630,19857,49637,
-49237,49631,49239,49641,49237,49630,49241,49645,32805,49630,34447,49649,
-32805,49631,34003,49653,27857,49631,27879,49657,19815,49631,19849,49661,
-    2,49630,    7,49665,    1,49667,  265,49665,    1,49670,    0,49670,
-49669,49671,49668,49670,49677,49679,49669,49670,49668,49671,49683,49685,
-    0,49671,49673,49689,    1,49671,49675,49693,    2,49631,  903,49697,
-    1,49699,    0,49699,    1,49698,49703,49705,    0,49698,49701,49709,
-    1,    7,  377,49713,48110,49712,48111,49712,49152,49712,49472,49712,
-49153,49712,49473,49712,49374,49712,49054,49712,49375,49712,49055,49712,
-  704,49712,  100,49712,26502,49712,41376,49712, 8808,49712,47622,49713,
-47660,49713,47146,49713,47148,49713,49059,49713,49379,49713,49158,49713,
-49478,49713,49061,49713,49381,49713,48998,49713,49318,49713,47224,49713,
-47226,49713,48041,49713,48039,49713,47058,49713,47060,49713,47220,49713,
-47222,49713,48047,49713,47056,49713,47442,49713,49349,49713,49029,49713,
-49121,49713,49441,49713,47628,49713,47668,49713,48962,49713,49290,49713,
-22798,49713,39074,49713,31498,49713,44616,49713,31392,49713,44494,49713,
-47540,49713,47532,49713,31794,49713,44858,49713,48298,49713,48288,49713,
-31924,49713,44994,49713, 8652,49713, 8535,49713,13252,49713,43989,49712,
-41417,49843,30655,49712,26219,49847,26503,49712,41377,49712, 8809,49712,
-26547,49712,26219,49857,41835,49712,41417,49861,  273,49712,12897,49865,
- 8813,49712, 8647,49869,  376,49713,  705,49712,  101,49712,  803,49712,
-  483,49879,30091,49712,26219,49883,  113,49712,    9,49887,43503,49712,
-41417,49891,43215,49712,  483,49895,43214,49712,  112,49712,  802,49712,
-49320,49712,49401,49905,  241,49905,49000,49712,49081,49911,  241,49911,
-49081,49712,49001,49916,49001,49917,49911,49921,49401,49712,49321,49924,
-49321,49925,49905,49929,49001,49712,49081,49932,  241,49932,49321,49712,
-49401,49938,  241,49938,  414,49713,18391,49945,  420,49713,18391,49949,
-  449,49713,18391,49953, 8808,49713,49855,49957, 8453,49713,46863,49960,
-20239,49713,46863,49964,37095,49713,46863,49968,47976,49713,47593,49713,
-26502,49713,49851,49977,31921,49713,47592,49713, 8495,49983,  828,49713,
-49903,49987,  128,49713,49901,49991,  705,49713,49737,49995,  101,49713,
-49739,49999,47977,49713, 8495,50003,47488,49713,48122,49713,48480,49713,
-48440,49713,47568,49713, 1344,49713, 1482,49713,   64,49713, 1484,49713,
-  336,49713, 1480,49713,  254,49713, 1342,49713,  338,49713, 1123,49713,
-  931,49713,  665,49713, 1417,49713, 1429,49713, 1301,49713, 1127,49713,
-  941,49713,  523,49713, 1283,49713,  939,49713, 1103,49713,  171,49713,
- 1525,49713,  407,49713, 1517,49713,  949,49713,  280,49713, 1476,49713,
-  272,49713, 1017,49713, 1077,49713, 1047,49713, 1113,49713, 1245,49713,
- 1237,49713,  501,49713,  433,49713,  929,49713,  591,49713,  915,49713,
-  681,49713, 1555,49713,  911,49713, 1545,49713,  855,49713,41376,49713,
-49853,50107, 4900,49713,14622,49713,48113,49713, 8997,50115, 1382,49713,
-  695,49713,48286,49713,  903,50122,48294,49713, 1011,50126,26503,49713,
-49741,50131,47530,49713,  903,50134,47538,49713, 1011,50138,49289,49713,
-49317,50142,  903,50142,48961,49713,48997,50148, 1011,50148,21522,49713,
-46863,50154,38266,49713,46863,50158,  394,49713,  299,49713,31792,49713,
-  903,50166,44856,49713, 1011,50170,22789,49713,  903,50174,39065,49713,
- 1011,50178, 1386,49713,  545,49713,41377,49713,49743,50187,  413,49712,
- 8647,50191,18062,50191,17993,50191,  251,50196,  251,50191,17993,50200,
-46863,50191,  412,49712,48008,49713,50207,50209,49717,50209,  341,50209,
-40381,49713,   17,50217,  913,49713,  483,50221,  289,49713, 8809,49713,
-49745,50227,49000,49713,49935,50231,49919,50231,49721,50231,49731,50231,
-49937,50231,49933,50231,49081,50243,  241,50243,49320,49713,49941,50249,
-49927,50249,49723,50249,49729,50249,49943,50249,49939,50249,49401,50261,
-  241,50261, 1374,49713, 8672,49713,12534,49713,12921,49713,  264,50273,
-  265,50272,50275,50277,  264,50272,  265,50273,50281,50283, 8605,49713,
-26097,49713,41299,49713,26277,49713,41479,49713,26104,49713,41314,49713,
- 1477,49713,46863,50300,  281,49713,46863,50304, 1516,49713,46863,50308,
-  948,49713,46863,50312,44988,49713,  903,50316,31920,49713, 1011,50320,
-43293,49713,49895,50325,15156,49713,  264,50329,  265,50328,50331,50333,
-  264,50328,  265,50329,50337,50339, 8916,49713,14623,49713, 8495,50345,
- 4901,49713, 8495,50349,14611,49713,  241,50352, 4899,49713,  241,50356,
-15219,49713,  412,50360,  413,50361,50363,50365,  412,50361,  413,50360,
-50369,50371, 5119,49713,  412,50374,  413,50375,50377,50379,  412,50375,
-  413,50374,50383,50385,13177,49713,  413,50388,  264,50388,  264,50389,
-  265,50388,50395,50397,  265,50389,50393,50401, 5313,49713,12377,50404,
-47591,49713,  265,50409, 8861,50411,  265,50408, 8495,50415,47641,49713,
-43292,49713,49899,50421,15158,49713,39228,49713,23012,49713,40676,49713,
-25546,49713,  500,49713,18391,50435,  432,49713,18391,50439, 1244,49713,
-18617,50443, 1236,49713,18617,50447, 1109,49713,  903,50451, 1412,49713,
-  305,50455,44832,49713,31770,49713,25545,49713,    9,50462,40675,49713,
-  483,50466,  935,49713,  483,50471, 1087,49713,    9,50475, 1413,49713,
-  295,49713, 1290,49713,  903,50483, 1304,49713,    9,50487,48009,49713,
-50191,50491,49719,50491,  241,50491,22957,49713,  903,50498,39205,49713,
- 1011,50502,47608,49713, 1505,50506,21315,50506,47640,49713,  165,50512,
-38057,50512,  510,49713,46863,50518,  922,49713, 1108,49713, 1280,49713,
-    9,50527,  246,49713,  483,50531,  412,49713,47460,50535,  483,50535,
-    9,50535, 8997,50535,46863,50542,46863,50535, 8997,50546, 1216,49713,
-44243,50550,31103,50550,  483,50550,18617,50557,    9,50550,18617,50561,
- 8677,49713,  305,49713,  241,50567,16163,50567, 8647,50566, 8495,49713,
-  257,50574, 1141,49713,16531,50579,  253,49713,   59,50582, 1325,50582,
-  331,50582,  265,50582, 8634,49713, 8611,49713,41349,49713,26127,49713,
-  273,49713,12705,50601,13673,50601,18391,50601, 2923,50601,46863,50600,
-  331,49713,   53,50612, 1471,50612,  253,50612, 1369,50612, 8861,49713,
-  241,50623,  375,50625,  375,50622,  251,49713,  413,50631,17993,50633,
-  413,50630,18391,50637,15029,50630,  264,50641,  265,50640,50643,50645,
-  264,50640,  265,50641,50649,50651,39204,49713,  257,49713,  265,50657,
-26625,50657,25793,50657,41019,50657, 8495,50657, 9731,50657,25793,50656,
-41019,50656, 8495,50656,  265,50656, 4863,50677,12377,49713,46863,50680,
- 5313,50680,  341,49713,  241,50687,  298,49713, 4863,50691,  704,49713,
-49875,50695, 9195,50695,  100,49713,49877,50701,  395,49713,  829,49713,
-49879,50707, 9195,50707,  129,49713,49887,50713,   89,49713,48884,50716,
-48884,50717,48885,50717,50719,50723,48885,50716,50721,50727,   11,50716,
-  567,49713,42155,50733,41941,50733, 7971,50733, 9565,50733,  587,50733,
- 9377,50743,  587,50732, 9195,50747,38057,49713,47640,50750,46863,50750,
-  903,50754,  903,50750,46863,50758,21315,49713,47608,50762,46863,50762,
- 1011,50766, 1011,50762,46863,50770,  628,49713, 1396,49713,  241,50777,
-  288,49713, 7971,50781,  265,49713,23584,50785,39564,50785,24355,50785,
-39905,50785, 5520,50785,  256,50784,50795,50797, 5521,50785,  256,50785,
-50204,50785,   10,50784,    1,50785,  257,50808,50797,50811,  257,50809,
-50803,50815,   10,50785,50191,50785,46863,50820,47590,50784,23493,50785,
-22807,50826,39489,50785,39085,50830,22807,50785,23493,50834,39085,50785,
-39489,50838, 1087,50785,  935,50785,47591,50784, 8495,50847,47590,50785,
-50847,50851, 4213,50785, 8757,50785,26415,50785,41653,50785,27377,50785,
- 9335,50785,42471,50785, 8109,50785, 4147,50785, 3933,50785,   53,50784,
- 1471,50784,  253,50784,47591,50785,50825,50881,  257,50785,    1,50884,
-50797,50887,50797,50885, 4827,50885,  305,50785, 8861,50895, 8495,50785,
-  331,50899,46863,50785,50191,50902,  241,50902,  241,50785,46863,50908,
- 8337,50909,46863,50913, 1369,50784,  305,50917,   11,50785,50807,50921,
- 8165,50921, 1369,50921,  241,50784,47460,50929,  483,50929,    9,50929,
- 8997,50929,46863,50936,46863,50929, 8997,50940,  257,50784,50801,50945,
-50803,50945, 4863,50945,   11,50784,50819,50953, 7971,50953, 1011,49713,
-31920,50958,48294,50958,44856,50958,47538,50958,48961,50958,39065,50958,
-21315,50958,46863,50972,31103,50958,  903,50976, 1505,50958,46863,50980,
-44243,50958,  903,50984,39205,50958,    9,50958,  903,50958,31103,50992,
-44243,50992,46863,50958,21315,50998, 1505,50998,  903,49713,44988,51004,
-48286,51004,31792,51004,47530,51004,49289,51004,22789,51004,38057,51004,
-46863,51018,44243,51004, 1011,51022,  165,51004,46863,51026,31103,51004,
- 1011,51030,22957,51004,  483,51004, 1011,51004,44243,51038,31103,51038,
-46863,51004,38057,51044,  165,51044,  241,49713,47961,51050, 4899,51050,
-14611,51050,  375,51050,12377,51051,  375,51061, 8997,51051,  375,51065,
-  265,51065,46863,51069, 1275,51050,    9,51073,   15,51050,  483,51077,
-  265,51050,47460,51081,  483,51081,    9,51081, 8997,51081,46863,51088,
-46863,51081, 8997,51092, 8647,49713,  413,51096,  305,51097,   11,51097,
- 1369,51097,  341,51097,  305,51096,41417,49713,   11,51111, 1369,51111,
-26219,49713,   11,51117, 1369,51117,32102,49713,27021,51123,45148,49713,
-   11,51127, 1369,51127,31857,49713,44925,49713,32294,49713,45314,49713,
-17565,49713,32103,49713,  241,51143,  587,51142,45149,49713,   11,51148,
-49317,49713,49289,51152,48997,49713,48961,51156,49001,49713,49912,51161,
-49725,51161,49914,51161,49735,51161,49081,51161,49911,51170,49911,51161,
-49081,51174,  241,51174,  241,51161,49911,51180,49321,49713,49906,51185,
-49727,51185,49908,51185,49733,51185,49401,51185,49905,51194,49905,51185,
-49401,51198,  241,51198,  241,51185,49905,51204,49475,49713, 1505,51208,
-49155,49713,  165,51212,  240,49712,51059,51217,50163,51217,50165,51217,
-51051,51217,  375,51225,  264,49712,49715,51229,50838,51229,50834,51229,
-50850,51229,50847,51229,50945,51229,49983,51229,50415,51229,50677,51229,
-50691,51229,50496,51229,50003,51229,50906,51229,50910,51229,50345,51229,
-50349,51229, 8374,51229, 8389,51229,50705,51229,20152,51229,36898,51229,
-20201,51229,36979,51229,50902,51229,  241,51276,50908,51229,46863,51280,
-50491,51229,  241,51284,47590,51229,50785,51288,22807,51229,50785,51292,
-39085,51229,50785,51296,26219,51229,41417,51229,14524,51229,35690,51229,
-50733,51229,37519,51229,50781,51229,50953,51229,50455,51229,50917,51229,
-19396,51229, 8647,51229,20103,51229,  375,51324,36773,51229,  375,51328,
- 8337,51229,  375,51332,50785,51229,39085,51336,22807,51336,47590,51336,
-46863,51336,  241,51344,  241,51336,46863,51348,47488,51229,47961,51229,
-    9,51229,18967,51356,  483,51229,35187,51229,  375,51362,18967,51229,
-    9,51366,46863,51229,50908,51370,50785,51370,  241,51374,  241,51370,
-50785,51378,  375,51370,  241,51229,50491,51384,50902,51384,50785,51384,
-46863,51390,46863,51384,50785,51394,  375,51229, 8337,51398,20103,51398,
-36773,51398,14315,51398,35187,51398,46863,51398,14315,51229,  375,51412,
- 4899,51229,14611,51229, 1010,49712, 3867,51421, 8277,51421, 4067,51421,
- 3997,51421, 8953,51421, 9459,51421,  902,49712,50321,51435,51031,51435,
-24265,51435,28233,51435,29077,51435,51005,51435,31103,51447,19559,51435,
- 4283,51435, 9673,51435, 4279,51435, 3807,51435,20361,51435,20713,51435,
- 9967,51435, 8251,51435,47961,49713,  241,51468,47979,49713,  412,51472,
-  413,51473,51475,51477,  412,51473,  413,51472,51481,51483,  240,49713,
-  340,51487,51398,51487,51418,51487,51416,51487,51354,51487,47974,51487,
-47589,51487, 8590,51487,12537,51487,14620,51487,  375,51487,51229,51508,
-    7,51487,  265,51512,  265,51513,51229,51517,47580,51487, 8861,51521,
-47961,51487,51229,51524, 8495,51524,51229,51487,  375,51530,14611,51530,
- 4899,51530,47961,51530, 8495,51487, 4899,51540,47961,51540,14611,51540,
-14611,51487,51229,51548, 8495,51548, 4899,51487,51229,51554, 8495,51554,
-46863,51487,  265,51560, 8861,51563,  265,51561, 8495,51567,51229,51567,
-  265,51487,    7,51572,15309,51573,15308,51572,51577,51579,15308,51573,
-15309,51572,51583,51585,46863,51572, 8861,51589,  902,49713,31103,51593,
-43053,51593,46863,51593, 1010,49713, 1505,51601,  918,51601,    9,51601,
-  903,51606,  903,51601,    9,51610,  265,49712,49873,51615,50165,51615,
-51059,51615,51057,51615,51055,51615,51053,51615,49975,51615,49973,51615,
-50113,51615,50111,51615,50163,51615,51471,51615,50355,51615,50359,51615,
-50209,51615,  241,51645, 8948,51615,50225,51615,50479,51615,  331,51615,
- 8861,51654, 8861,51615,  331,51658, 4827,51615,15269,51615,51051,51615,
-  375,51667,14611,51667, 4899,51667,47961,51667,  241,51614,50209,51677,
-  241,49712,18300,51681, 8605,51681, 8916,51681,50945,51681,49321,51680,
-50249,51691,49001,51680,50231,51695,50705,51681, 8374,51681,51508,51681,
-50691,51681,47443,51681, 8389,51681,50677,51681,51517,51681, 8861,51681,
-  375,51714,26219,51681,41417,51681,  305,51681,48009,51681,51229,51725,
- 8647,51681, 8452,51681,46863,51731,  713,51681,   25,51681,18257,51681,
-  375,51738, 8337,51681,  375,51742,  265,51742,46863,51747,  375,51681,
-18257,51750, 8861,51750, 8337,51750,51487,51750,51487,51681,  375,51760,
-  265,51680,50209,51765,49321,51681,49905,51769,49001,51681,49911,51773,
-  265,51681,51370,51777,51229,51777,46863,51780,46863,51777,51229,51784,
- 8337,51776,46863,51789,46863,51681,  264,51792,51765,51795,  264,51793,
-51777,51799,  264,49713,51489,51803,51515,51803,51575,51803,51521,51803,
-50411,51803,50659,51803,51563,51803, 8471,51803, 8397,51803, 8371,51803,
-20149,51803,36887,51803,20211,51803,37009,51803,20247,51803,37103,51803,
-51589,51803,50207,51803,46863,51839,51765,51803,46863,51843,51677,51803,
-46863,51847,36773,51803,46863,51851,20103,51803,46863,51855, 8337,51803,
-46863,51859, 4613,51803,12571,51803,36539,51803,37595,51803,36049,51803,
-47581,51803,51487,51873,51615,51803,39085,51877,22807,51877,47590,51877,
-46863,51877,  241,51884,  241,51877,46863,51888,46863,51802,51765,51893,
-51677,51893,50207,51893,51615,51893,  241,51901,  341,51893, 1369,51803,
-  341,51803,51487,51909, 8337,51909,20103,51909,36773,51909,35187,51909,
-14315,51909,46863,51909,12377,51803,  375,51925, 1011,49712,26219,51929,
-41417,51929, 8647,51929,  903,49712,49981,51937,51594,51937,  375,51937,
-31103,51937,51593,51944,51593,51937,31103,51948,15269,51937, 4827,51937,
- 1217,49713,  483,51957,    9,51957,  413,49713, 8647,51962,13177,51962,
-  251,51962,18391,51969,  375,51962,18391,51973,44243,51962,31103,51962,
-18391,51963,  251,51981,  483,51962,18391,51985,    9,51962,18391,51989,
-  375,49713,    5,51992,51615,51995,  413,51993,17993,51999,  413,51992,
-18391,52003,  241,51993,51487,52007,46863,51992,  241,51992,51217,52013,
-51615,52013, 8861,51992,12377,51993,51487,52021,15029,51992,14315,49713,
-  341,52027,51487,52029,15029,49713,  266,52032,  267,52032,  264,52033,
-52035,52039,  465,52032,52039,52043,  413,52032,    6,52046,  264,52032,
-  251,52051,  241,52051,    6,52055,  265,52033,  251,52059,52051,52060,
- 8841,52059,52037,52059,52052,52059,52051,52059,  251,52070,15363,52059,
-15055,52059,15061,52059,52049,52059,52057,52059,  265,52032,  251,52084,
-52039,52087,52039,52085,  251,52091,  251,52032,  265,52094,52039,52097,
-  265,52095,52051,52101,  375,52032, 8639,49713, 8643,49713,26217,49713,
-41415,49713,  164,49713,51593,52115,  903,52115, 1504,49713,51601,52121,
-  144,49713,  113,52125,  802,49713,49880,52129,49879,52129,  483,52132,
- 9366,52129, 9195,52129,  483,52138,  483,52129,49879,52142, 9195,52142,
-31103,52129,  112,49713,49888,52151,49887,52151,    9,52154,    9,52151,
-49887,52158,44243,52151, 1486,49713,  803,52165,43214,49713,49896,52169,
-49895,52169,  483,52172,  483,52169,49895,52176, 1073,49713,  903,52181,
-  525,49713,  903,52185,  669,49713,  483,52189,  566,49713,51929,52193,
-51615,52193,10107,52193,21036,49713,   17,52201,   88,49713,37611,52205,
-36083,52205,38155,52205,35927,52205, 1346,49713, 1505,52215,  154,49713,
-  483,52219,26329,49713,41557,49713,  165,49713,49155,52226,47640,52226,
-46863,52226,  903,52232,  903,52226,46863,52236,43215,52226, 1505,49713,
-49475,52242,47608,52242,46863,52242, 1011,52248, 1011,52242,46863,52252,
-28715,52242,  803,49713,49903,52259,  483,52261,  483,52258,49903,52265,
-  113,49713,49901,52269,    9,52271,    9,52268,49901,52275,28715,49713,
- 1505,52278,43215,49713,49899,52283,  483,52285,  483,52282,49899,52289,
-  165,52282,29028,49713,43318,49713,25793,49713,  257,52298,  713,49713,
-  241,52303,16163,52303,41019,49713,  257,52308,   25,49713,  241,52313,
-16163,52313, 1447,49713,16531,52319,   33,49713,16531,52323, 1471,49713,
-   59,52326, 1325,52326,  331,52326,  265,52326,   53,49713, 1325,52336,
-   59,52336,  331,52336,  265,52336, 1325,49713,   53,52346, 1471,52346,
-  253,52346, 1369,52346,   59,49713, 1471,52356,   53,52356,  253,52356,
- 1369,52356,48466,49713,  483,52366,48408,49713,    9,52370,  843,49713,
-    9,52375, 1530,49713,    9,52379,40436,49713,  113,52383,  587,49713,
-28714,52387,36212,52387,30091,52387,  567,52386, 9195,52395,   11,52386,
-32103,52386,35187,52387,  241,52402,  241,52387,35187,52406,    4,52386,
- 9366,52411, 9195,52411,  483,52414,  483,52411, 9195,52418,31103,52411,
-    5,52387,21605,52424, 9195,52425,27021,52425,21605,52387,   11,52433,
-    5,52432,   11,49713,32805,52439,19888,52439,19913,52439,  265,52439,
-51803,52447,43503,52439, 1275,52438,    9,52453,   89,52438,  587,52438,
-  265,52438,51229,52461, 7971,52461,45149,52438,18967,52439,  241,52468,
-  241,52439,18967,52472,    2,52438,    9,52477,44243,52477,    3,52439,
- 7971,52483,42155,52483,    2,52439,52205,52489,38305,52439,  265,52493,
-38305,52438,  113,52497, 1369,49713,  331,52500,   59,52500,40674,52501,
-38305,52501,  265,52509,  241,52508,  241,52501,38305,52514, 1325,52500,
-  265,52500,51229,52521,  305,52521,   17,52500,  241,52527,38305,52500,
-35187,52501,  265,52501,  331,52535,51803,52535,    4,52500,51601,52541,
-    5,52500,  803,52545,    5,52501,  959,52549,   47,52549,  759,52549,
-    4,52501, 1275,52500,    9,52559,   17,49713, 1275,52562,  903,52565,
- 1369,52562,  241,52569,    2,52562,  903,52573,51593,52573,    3,52562,
-  113,52579,    3,52563, 1141,52583, 1447,52583,   33,52583,    2,52563,
-  265,52591,51803,52591,38305,49713, 1369,52596,    3,52596,    3,52597,
- 8165,52603,20501,52603, 9875,52603,   11,52603,   11,52596,  113,52613,
-   15,49713, 1010,52617, 1010,52616, 1011,52616,52619,52623, 1011,52617,
-52621,52627,  241,52616,  483,52631,    3,52616,  483,52635,    3,52617,
- 1369,52639, 1275,49713,   17,52642,  903,52645,   11,52642,    9,52649,
-  241,52642,    9,52653,    9,52643, 1369,52657,   11,52657,    5,52642,
- 1505,52663,    5,52643,   53,52667, 1471,52667,  253,52667, 1369,52642,
-    9,52675,18967,49713,  241,52679,    9,52681,    5,52678,   17,52685,
-    5,52679,    9,52689,  483,49713,  803,52693,52129,52695,43215,52693,
-52169,52699, 1216,52693,18759,52703,  413,52693,17993,52707,  803,52692,
-49903,52711,48466,52692,43215,52692,49899,52717,40675,52692, 1216,52692,
-18617,52723,  413,52692,18391,52727,44243,52692,38305,52693,46169,52733,
-    9,52692,46863,52736,  903,52692,    5,52692,10107,52743,51929,52743,
-51615,52743,    5,52693,46863,52692,    9,52752,    9,49713,  113,52757,
-52151,52759,    4,52756,    7,52763,    2,52765,    2,52764,    2,52763,
-    7,52770, 1368,52763, 1216,52757,18759,52777,  413,52757,17993,52781,
-  113,52756,49901,52785,48408,52756,25545,52756, 1216,52756,18617,52793,
-  413,52756,18391,52797,31103,52756,  483,52756,46863,52802, 1011,52756,
-    3,52756,52769,52809,52773,52809,37611,52809,38155,52809,35927,52809,
-52489,52809,52775,52809,    3,52757,52767,52825,52151,52825,37663,52825,
-52477,52825,31103,52825,46863,52756,  483,52836,31103,49713, 1216,52840,
-  413,52840,21036,52840,21037,52840,21037,52841,52847,52851,  903,52841,
-51593,52855, 1011,52840,  903,52858,21036,52841,52849,52863,  903,52840,
-51435,52867, 1011,52866,    9,52840,    5,52840,27021,52875,44243,49713,
- 1216,52878,  413,52878,  903,52878, 1011,52884, 1011,52878,  903,52888,
-  483,52878,    3,52878,   11,52895, 1369,52895,    3,52879,  483,52901,
-49205,49713,    5,52905,48885,49713,  113,52909,    3,52909,    3,49712,
-20819,52915,50945,52915,51508,52915,37537,52915,36898,52915,20152,52915,
- 8374,52915,50695,52915,50701,52915,50707,52915,50713,52915,50691,52915,
-50705,52915,37748,52915,20952,52915,52395,52915,52457,52915,52142,52915,
-52158,52915, 8389,52915,50677,52915,51517,52915,50747,52915,50731,52915,
-52418,52915,52478,52915,36979,52915,20201,52915,26219,52915,26106,52915,
-52129,52915,  483,52976,52411,52915,  483,52980,51123,52915,32103,52915,
-52875,52915,31770,52915,42885,52915,20885,52915,  483,52994,40399,52915,
-44714,52915,  357,52915,  367,52915,  471,52915, 1249,52915, 8800,52915,
- 8647,52915,47488,52915, 8086,52915,19687,52915,19559,52915,20361,52915,
- 9673,52915,20713,52915, 9967,52915, 4283,52915, 4279,52915, 3807,52915,
- 8251,52915,41746,52915,41417,52915,44832,52915, 9704,52915,20326,52915,
-21087,52915,52906,52915,48245,52915,48975,52915,48451,52915,52151,52915,
-    9,53058,52477,52915,    9,53062,51487,52915,  375,53066,50785,52915,
- 8165,52915,  265,53073, 1447,52915,38305,53077,21127,52915,20843,52915,
-52425,52915,37663,52915,    9,53086, 1141,52915,38305,53091,  566,52915,
-  567,52915,46863,53097,44243,52915,41941,53100,  483,53100,  375,52915,
-51487,53106,20103,53106, 8337,53106,36773,53106,46863,53106,41941,52915,
-44243,53118,   33,52915,38305,53123, 9617,52915,    9,53126, 8337,52915,
-  375,53130,48884,52915, 1011,52915,48885,52915,  483,53139,52907,52915,
-   25,52915, 7971,53144,41019,52915,   11,53148,  305,52915, 8495,52915,
-   11,53154,20103,52915,  375,53158,20273,52915,    9,53162,    4,52915,
-28411,53167,31103,53167,48408,53167,52905,53167,  483,53167,46863,53176,
-20691,53167, 9923,53167,46863,53167,  483,53184,    5,52915,52905,53188,
-   17,53189,18967,53193,46863,53188,  483,53188,25793,52915,   11,53200,
-  713,52915, 7971,52915,   25,53206,36773,52915,  375,53210,    4,52914,
-53191,53215,53051,53215,24265,53215,28233,53215,29077,53215,53135,53215,
-53197,53215,53189,53215,52905,53231,46863,53231,19559,53215, 9673,53215,
- 4283,53215,20361,53215, 9967,53215,20713,53215, 8251,53215, 4279,53215,
- 3807,53215,    5,52914,53143,53255,53174,53255,50785,53255,53139,53255,
-53184,53255,50733,53255,19396,53255,53167,53255,52905,53270,46863,53270,
- 8647,53255,41417,53255,26219,53255,    9,53255,18967,53282,  483,53255,
-18967,53255,    9,53288,52905,53255,53167,53292,46863,53255,53167,53296,
-   11,52915,25793,53301,25793,53300, 8495,53301, 8495,53300,18967,53301,
-41019,53301,41019,53300,21037,53301,    9,52915,52151,53318,37663,53318,
-52477,53318,31103,53318,20273,53318, 9617,53318,52905,52915,    5,53332,
-53215,53335,    5,53333,53167,53339, 9875,52915,35187,53343,  241,53343,
-46863,52915,  375,53348,    5,53348,53215,53353,    5,53349,53167,53357,
-  483,52915,52129,53360,20885,53360,52411,53360,44243,53360,    5,53361,
-    5,53360,18967,52915,11731,53375,  113,53375,31103,52915,    9,53380,
-20501,52915,35187,53385,  241,53385,    2,49712,52711,53391,52785,53391,
-51059,53391,50165,53391,49995,53391,49999,53391,49987,53391,49991,53391,
-50163,53391,52013,53391,52265,53391,52275,53391,17609,53391, 4904,53391,
-17586,53391,52259,53391,  483,53423,  272,53391, 1476,53391,  280,53391,
-  949,53391, 1517,53391,52269,53391,    9,53437, 9484,53391,51803,53391,
-51051,53391,  375,53445, 4903,53391,    9,53448,17579,53391,    9,53452,
-42991,53391,40039,53391,40685,53391, 1197,53391,  265,53391,  253,53464,
- 1471,53464,   53,53464,   53,53391,  265,53472,  253,53391,  265,53476,
-    5,53391, 1471,53391,  265,53482,    5,53390, 8953,53487, 9459,53487,
- 4067,53487, 3997,53487, 8277,53487, 3867,53487,   11,53391, 9377,53500,
-    9,53391, 4903,53504,17579,53504, 9377,53391,   11,53510,    5,53511,
-    5,49712,48765,53517,48835,53517,48843,53517,25445,53517,22779,53517,
-22243,53517,    7,53517,    2,53531,28063,53517,25299,53517,31598,53517,
-53152,53517,50733,53517,35690,53517,37519,53517,50781,53517,52461,53517,
-50953,53517,  272,53517, 1476,53517,  280,53517,  949,53517, 1517,53517,
-  357,53517,  367,53517,  471,53517, 1249,53517, 9304,53517,53204,53517,
-53144,53517,35931,53517,52912,53517,20326,53517,21087,53517,20273,53517,
-    9,53586,50785,53517, 1369,53591,53391,53591,25381,53517,48753,53597,
-10081,53597, 9704,53517,   53,53517,  265,53604,37899,53517,37617,53517,
-52483,53517, 9617,53517,    9,53614,  253,53517,  265,53618,31103,53517,
-26625,53622,  375,53517,35187,53626,26625,53517,31103,53630, 1471,53517,
-  265,53634,  265,53517,  253,53638, 1471,53638,   53,53638,49204,53517,
-49205,53517,52913,53517,  713,53517, 9195,53652,52915,53652,21605,53653,
-  305,53517,52915,53660,21605,53661,    2,53517, 8229,53667,52909,53667,
-46863,53667,    3,53517,52909,53674,53391,53675, 1369,53675,46863,53674,
-52915,53517,  305,53684,  713,53684,   25,53684,   25,53517,52915,53692,
-21605,53693, 9195,53517,  713,53698,    2,53516,53677,53703,53581,53703,
-53647,53703,53683,53703,53675,53703,52909,53713,46863,53713, 4067,53703,
- 3997,53703, 8953,53703, 9459,53703, 8277,53703, 3867,53703,    3,53516,
-53651,53731,53670,53731,50785,53731,50733,53731,53649,53731,53672,53731,
-19396,53731,53667,53731,52909,53746,46863,53746, 8647,53731,26219,53731,
-41417,53731,  483,53731,18967,53731,    9,53760,    9,53731,18967,53764,
-52909,53731,53667,53768,46863,53731,53667,53772,  587,53517,35187,53777,
-  483,53517,52909,53517,    3,53782,53703,53785,    3,53783,53667,53789,
-46863,53517,    3,53792,53703,53795,    3,53793,53667,53799,    9,53517,
-20273,53802, 9617,53802,35187,53517,  375,53808,    4,49712,48747,53813,
-37279,53813,19981,53813,24601,53813,    7,53813,21605,53823,53071,53813,
-52743,53813,52193,53813,50225,53813, 8306,53813,  545,53813,  695,53813,
- 1382,53813, 1374,53813, 1386,53813,51906,53813,53442,53813,53199,53813,
-53373,53813,53095,53813,51803,53813, 1369,53856,53391,53856, 9992,53813,
-20734,53813,19916,53813,48739,53867,37241,53867, 7947,53867,28205,53813,
-24613,53813,25551,53813,53189,53813,  483,53881,   33,53813, 9875,53813,
-  265,53886,  241,53887,20501,53813,  265,53892,  241,53893, 1141,53813,
-  154,53813,  483,53901, 1447,53813,  331,53813, 1369,53906,  265,53813,
- 8165,53910, 9875,53910,20501,53910, 1011,53813,   59,53813, 1369,53920,
-    3,53813, 8241,53925,   15,53924,  483,53929,53391,53813,51803,53932,
- 1325,53813, 1369,53936,    3,53812,24265,53941,28233,53941,29077,53941,
- 9673,53941,19559,53941, 4283,53941,20361,53941, 8251,53941, 3807,53941,
- 9967,53941,20713,53941, 4279,53941, 1369,53813,  331,53966, 1325,53966,
-   59,53966,51803,53966,18967,53813, 1275,53976,48739,53979,37241,53979,
- 7947,53979,  113,53977, 1275,53813,18967,53988,48739,53991, 7947,53991,
-37241,53991, 8165,53813,  265,53998,46863,53813,38056,54002,38056,54003,
-38057,54002,54007,54009,38057,54003,54005,54013,   15,53813,    3,54017,
- 1369,54019,    3,54016,  483,54023,    5,49713,  375,54026,51615,54029,
- 1368,54027,    7,54027,    2,54034,    2,54035,32805,54027,31103,54041,
-20035,54027,  375,54045,  341,54027,18967,54049,12377,54027,  375,54053,
-52915,54027,31103,54057,27021,54027,31103,54061,30091,54027,31103,54065,
-31103,54026,27021,54069,52915,54069,18967,54027,47608,54075,46863,54075,
- 1011,54078, 1011,54075,46863,54082,53924,54027,53825,54087,  483,54087,
-51929,54027,  483,54093,51615,54027,  375,54097,  483,54097, 1369,54026,
-  803,54103,  483,54026,53813,54107,10107,54107,51929,54107,51615,54107,
- 1275,54026, 1505,54117,18967,54026,   17,54121, 1369,54027,51601,54125,
-    2,54026,54078,54129,54075,54129,46863,54132,52541,54129, 1505,54129,
-  918,54129,52121,54129,54125,54129,  903,54129,    9,54146,    9,54129,
-  903,54150,46863,54129,54075,54154,    3,54026,54033,54159,54037,54159,
-53966,54159,12571,54159, 4613,54159,51615,54159, 8337,54159,46863,54173,
-52591,54159,53932,54159,53391,54159,53813,54180,53813,54159, 1369,54184,
-53391,54184,36773,54159,46863,54191,20103,54159,46863,54195, 1369,54159,
-53813,54198,    2,54027,    0,54202,54159,54205,46863,54207,    7,54202,
-54159,54211,  265,54203,    9,54215,54159,54203,    9,54219,46863,54219,
-    3,54027,48286,54225,54039,54225,54150,54225,52573,54225,52115,54225,
-38057,54225,46863,54236,53813,54224,53825,54241,  483,54241,    9,54225,
-54129,54246,  483,54225,53813,54251,54154,54225,46863,54225,38057,54256,
-54129,54256,54129,54225,    9,54262,46863,54262,10107,54027,  483,54269,
-53813,54027,  483,54273,    3,54273, 1369,54277,53391,54277,    3,54272,
-53825,54283,  483,54283,   17,54027,20273,54289, 9617,54289,    3,49713,
-16722,54295,16530,54294,54297,54299,16723,54295,16531,54294,54303,54305,
-16530,54295,    1,54295,35187,54311,   17,54313,    7,54295,16531,54316,
-54299,54319,16531,54317,54309,54323,   15,54317,38305,54327,    1,54294,
-40705,54331,54329,54331,   17,54331,    7,54294,54333,54339,40704,54339,
-54331,54343,49713,54339,    4,54346,    4,54339,49713,54350,54315,54339,
-    9,54339,38305,54356,54331,54359,38305,54339,    9,54362,54331,54365,
-52489,54295,    9,54369,36527,54295,  375,54373,  341,54295,12377,54295,
-    9,54379,16531,54295,    7,54382,54299,54385,37611,54295,    9,54389,
- 8321,54295,35927,54295,    9,54395,38155,54295,    9,54399,43503,54295,
-44243,54403,  113,54295,38305,54406,40086,54295, 8241,54295,44243,54294,
-   11,54415, 1369,54415, 1486,54295,35187,54295,47640,54423,46863,54423,
-  903,54426,  903,54423,46863,54430,53480,54295,11731,54295,51615,54295,
-  241,54295,   17,54294,  113,54443,38305,54294,    9,54294,37611,54449,
-38155,54449,35927,54449,52489,54449,   15,54294,  483,54459,   11,54295,
-44243,54463,38305,54295,  113,54466,38057,54295,    7,54471,  375,54471,
-    4,54294,54426,54477,54423,54477,46863,54480,52573,54477,54377,54477,
-52115,54477,43053,54477,46863,54477,54423,54492,    5,54294,54473,54497,
-    6,54497,54471,54501,53966,54497,12571,54497, 4613,54497,51615,54497,
- 8337,54497,46863,54513,52591,54497,53932,54497,53813,54497, 1369,54520,
-53391,54520,53391,54497,53813,54526,20103,54497,46863,54531,36773,54497,
-46863,54535, 1369,54497,53813,54538,    4,54295,    0,54542,54497,54545,
-46863,54547,    5,54295,48294,54551,21315,54551,46863,54554,53391,54550,
- 1369,54550,46863,54551,21315,54562,53391,54295,    5,54567,53813,54569,
-    5,54566, 1369,54295, 9893,54575,52129,54575,54353,54575,54349,54575,
-20885,54575,52411,54575,44243,54575,    5,54574,    5,54575,53813,54593,
-    2,49713,53227,54597,53262,54597,53355,54597,53358,54597,53298,54597,
-53264,54597,53229,54597,53274,54597,53234,54597,49168,54597,    1,54597,
-    7,54597,  567,54621,52915,54623,    4,54621,54575,54627,53360,54627,
-52915,54627,  483,54632,  483,54627,52915,54636,    9,54621,    1,54596,
-36544,54643,35187,54643,   11,54646,   11,54643,35187,54650,    7,54596,
-36545,54655,54643,54657,54645,54655,21605,54655,54653,54655,54649,54655,
-   15,54655,53270,54597,46863,54670,53231,54597,46863,54674,49169,54597,
-54097,54597,53134,54597,53215,54683,53352,54597,53215,54687,53196,54597,
-53215,54691, 8311,54597,48884,54596,54617,54697,53731,54597,53881,54597,
-54283,54597,54241,54597,54087,54597,36256,54597,53296,54597,53167,54712,
-53184,54597,53255,54716,53167,54597,53357,54720,53296,54720,53255,54720,
-46863,54726,46863,54720,53255,54730,48885,54597,    9,54734,54697,54737,
-54697,54735,    9,54741,35187,54597,    9,54744,    9,54597,48885,54748,
-54697,54751,48885,54749,35187,54748,   11,54749,52915,54759,53188,54597,
-53215,54763,46863,54765,46863,54762,53215,54769,53813,54763,53139,54597,
-53255,54774,44243,54597,   11,54779,54225,54597,53813,54783,51229,54597,
-  265,54597,54027,54789,47961,54791,14611,54791, 4899,54791,  375,54791,
-   17,54596,  903,54801,51593,54801,54477,54801,54225,54801,   11,54596,
-53318,54811,52825,54811,52915,54811,    9,54816,    9,54811,52915,54820,
-44243,54811,53255,54597,53139,54826,53184,54826,53167,54826,46863,54832,
-46863,54826,53167,54836,53357,54597,53167,54840,    4,54596,51418,54845,
-51416,54845,51398,54845,51354,54845,51909,54845,  340,54845,51803,54857,
-51873,54845,47974,54845,47589,54845, 8590,54845,14620,54845,12537,54845,
-52021,54845,52029,54845,53106,54845,  375,54845,51229,54878,52915,54878,
-    0,54845,    6,54885,    7,54845,  265,54888,51803,54891,  265,54889,
-51229,54895,52915,54895,47580,54845,51803,54901, 8861,54901, 8495,54845,
-47961,54906, 4899,54906,14611,54906,52915,54845,  375,54914,14611,54845,
-51229,54918, 8495,54918, 4899,54845,51229,54924, 8495,54924,47961,54845,
-51229,54930, 8495,54930,  265,54845,    7,54936,51803,54939,54887,54937,
-54886,54936,54943,54945,54887,54936,54886,54937,54949,54951,46863,54936,
- 8861,54955,51803,54955,46863,54845,  265,54960,51803,54963, 8861,54963,
-  265,54961,51229,54969, 8495,54969,51229,54845,  375,54974,14611,54974,
- 4899,54974,47961,54974,    5,54596, 1505,54985,  918,54985,52541,54985,
-52121,54985,54125,54985,  903,54985,    9,54996,    9,54985,  903,55000,
-    5,54597,54889,55005,52915,55007,53349,55004,    6,55005,54914,55013,
-52915,55013,54845,55016,54845,55013,52915,55020,   53,55005, 1471,55005,
-  253,55005,52557,55005,53348,55004,53215,55033,  241,55005,    9,55037,
-52915,55004,53215,55041,46863,55043,46863,55040,53215,55047,53813,55041,
-   17,55005,35187,55053,52915,55005,53357,55057,55011,55057,53296,55057,
-53255,55057,46863,55064,46863,55057,53255,55068,46863,55004,52915,55072,
-53215,55075,52915,55073,53255,55079,48885,54596,54679,55083,    9,55083,
-48884,54597,54755,55089,55086,55089,55083,55089,    9,55094,52915,55088,
-53215,55099,52915,55089,53255,55103,    9,55089,55083,55106,53348,54597,
-    5,55110,53215,55113,    5,55111,53167,55117,52915,54597,48884,55120,
-53215,55123,48884,55121,53139,55127,    5,55121,53139,55131,53184,55131,
-53167,55131,46863,55136,46863,55131,53167,55140,    5,55120,53215,55145,
-46863,55147,46863,55144,53215,55151,53813,55145,46863,55120,    5,55156,
-53215,55159,    5,55157,53167,55163,21605,54597,54027,55167,31103,55169,
-46863,54597,53270,55172,53231,55172,53188,55172,53215,55179,53255,55172,
-53167,55182,53167,55172,53255,55186,    5,55172,52915,55190,53215,55193,
-52915,55191,53255,55197,52915,55172,    5,55200,53215,55203,    5,55201,
-53167,55207,    4,49713,51398,55211,  375,55211,51229,55214,53709,55211,
-53740,55211,51909,55211,53797,55211,53800,55211,  340,55211,51803,55229,
-54339,55210,54575,55233,53774,55211,53742,55211,53711,55211,53750,55211,
-53716,55211,54663,55211,53533,55211, 1368,55211,52205,55251,54449,55251,
-52809,55251,54295,55251,    9,55259,    7,55211,  265,55263,51229,55265,
-   89,55263,52915,55269,  265,55262,51803,55273,    2,55262,52205,55277,
-52809,55277,54449,55277,54295,55277,    9,55285,    2,55263,52825,55289,
-53318,55289,    9,55289,52915,55294,52915,55289,    9,55298,53746,55211,
-46863,55302,53713,55211,46863,55306,31796,55211,25037,55211,25215,55211,
-42338,55211,42076,55211,43053,55211,42959,55211,54575,55211,54339,55325,
-54786,55211,51360,55211,53780,55211,52751,55211, 8148,55211, 9594,55211,
-54377,55211,54439,55211,53758,55211,54700,55211,54826,55211,53286,55211,
-53646,55211,53703,55353,53794,55211,53703,55357,53682,55211,53703,55361,
-53371,55211,  842,55211, 9377,55367,54591,55211,54421,55211,54561,55211,
-53681,55211,53255,55211,54597,55378,  483,55378,53679,55211,54573,55211,
-55131,55211,54559,55211,54435,55211,19892,55211,53772,55211,53667,55396,
-53672,55211,53731,55400,53667,55211,53799,55404,53772,55404,53731,55404,
-46863,55410,46863,55404,53731,55414,  935,55211,20733,55211, 9991,55211,
-41941,55211,  483,55424, 9565,55211,  483,55428, 1487,55211,54597,55211,
-51229,55434,   53,55435, 1471,55435,  253,55435,53731,55434,53255,55434,
-47546,55211,   66,55211, 1369,55451,  241,55211,31103,55454,18967,55211,
-  483,55458,  483,55211,42155,55462,41941,55462,51229,55462,53517,55462,
- 7971,55462, 9565,55462,53731,55462,53255,55462,  587,55462, 9377,55481,
-18967,55462,  587,55463, 9195,55487,52915,55487,53674,55211,53703,55493,
-46863,55495, 1369,55493,46863,55492,53703,55501,53391,55493,53649,55211,
-53731,55506,31103,55211,  241,55510,  587,55511,  113,55211,46863,55516,
-17455,55211,54551,55211, 1369,55523,53391,55523,51229,55211,  375,55528,
-54597,55528,  483,55528, 1011,55211, 8165,55537, 9875,55537,20501,55537,
-   11,55537,  265,55211,    7,55546,51803,55549,54295,55547,47961,55553,
-14611,55553, 4899,55553,  375,55553, 1369,55210,54985,55563,51601,55563,
-54129,55563,  587,55210, 9366,55571,54575,55571,53360,55571, 9195,55571,
-  483,55578,52915,55571,  483,55582,  483,55571, 9195,55586,52915,55586,
-31103,55571,53731,55211,53649,55594,53672,55594,53667,55594,46863,55600,
-  483,55594,54597,55594,46863,55594,53667,55608,  587,55211, 9377,55613,
-  483,55615,  483,55612, 9377,55619,21605,55211,21526,55622,    6,55623,
-21527,55622,55627,55629,    7,55622,    7,55623,55625,55635,    6,55622,
-18967,55638,55635,55641,18967,55622,    6,55645,55633,55647,    6,55644,
-55635,55651, 1347,55211, 1369,55655,53799,55211,53667,55658,    2,55210,
-51418,55663,51416,55663,51398,55663,51354,55663,51909,55663,  340,55663,
-51803,55675,51873,55663,47974,55663,47589,55663, 8590,55663,14620,55663,
-12537,55663,52021,55663,52029,55663,53106,55663,  375,55663,51229,55696,
-52915,55696,    0,55663,    6,55703,    7,55663,  265,55706,51803,55709,
-  265,55707,51229,55713,52915,55713,47580,55663,51803,55719, 8861,55719,
- 8495,55663,47961,55724, 4899,55724,14611,55724,52915,55663,  375,55732,
-14611,55663,51229,55736, 8495,55736, 4899,55663,51229,55742, 8495,55742,
-47961,55663,51229,55748, 8495,55748,  265,55663,    7,55754,51803,55757,
-55705,55755,55704,55754,55761,55763,55705,55754,55704,55755,55767,55769,
-46863,55754, 8861,55773,51803,55773,46863,55663,  265,55778,51803,55781,
- 8861,55781,  265,55779,51229,55787, 8495,55787,51229,55663,  375,55792,
-14611,55792, 4899,55792,47961,55792,    3,55210,54801,55803,52573,55803,
-52115,55803,43053,55803,46863,55803,    2,55211,    7,55814,52205,55817,
-52809,55817,54449,55817,54295,55817,    9,55825,54295,55815,54501,55829,
-    7,55829,54497,55833,  375,55829,    3,55211,55707,55839,52915,55841,
-55706,55839,53793,55838,55779,55839,    6,55839,55732,55851,52915,55851,
-55663,55854,55663,55851,52915,55858,    0,55851,55829,55851,    0,55850,
-55663,55867,    0,55839,    6,55870,55663,55873,    0,55838,49713,55838,
-55845,55879,    1,55838,55868,55883,55874,55883,55867,55883,55663,55888,
-55873,55883,55663,55892,55849,55883,55663,55883,55867,55898,55873,55898,
-46862,55839,55898,55905,55883,55905,55663,55908,55663,55905,55883,55912,
-    1,55839,55863,55917,55663,55919,    7,55839,55663,55922,55879,55925,
-55879,55923,55663,55929,52591,55839,53792,55838,53703,55935,43027,55839,
-43837,55839,39747,55839,53517,55838,53703,55945,46863,55947, 1369,55945,
-46863,55944,53703,55953,53391,55945, 1369,55839,18967,55959,   11,55838,
- 1369,55963,18967,55839,46863,55967,   11,55839,46863,55971,53517,55839,
-53799,55975,55847,55975,53772,55975,53731,55975,46863,55982,46863,55975,
-53731,55986,55778,55839,55877,55991,46863,55839,55877,55995,55663,55997,
-55663,55994,55877,56001,55663,55839,    7,56004,55879,56007,46863,56004,
-55877,56011,46863,55838,53517,56014,53703,56017,53517,56015,53731,56021,
-49204,55211,53517,56024,53703,56027,53517,56025,53731,56031,53792,55211,
-    3,56034,53703,56037,    3,56035,53667,56041, 7971,55211,  483,56044,
-42155,55211,  483,56048,53517,55211,  483,56052,49204,56052,53703,56057,
-49204,56053,53649,56061,    3,56053,53649,56065,53672,56065,53667,56065,
-46863,56070,  483,56065,54597,56065,46863,56065,53667,56078,    3,56052,
-53703,56083,46863,56085, 1369,56083,46863,56082,53703,56091,53391,56083,
-46863,56052,    3,56096,53703,56099,    3,56097,53667,56103,   11,55211,
-    3,56106, 1369,56109,    3,56107,  483,56113,46863,55211,53746,56116,
-53713,56116,53674,56116,53703,56123,53731,56116,53667,56126,53667,56116,
-53731,56130,  113,56116,    3,56116,53517,56136,53703,56139,53517,56137,
-53731,56143,53517,56116,    3,56146,53703,56149,    3,56147,53667,56153,
-46863,49713,47982,56156,47983,56157,56159,56161,47983,56156,47982,56157,
-56165,56167,49588,56156,49589,56157,56171,56173,49670,56156,49671,56157,
-56177,56179,49589,56156,49588,56157,56183,56185,49671,56156,49670,56157,
-56189,56191, 8453,56156,  273,56156,21522,56156,38266,56156, 1516,56156,
-  948,56156,20239,56156,37095,56156, 1477,56156,  281,56156,49617,56156,
-49616,56157,56215,56217,49699,56156,49698,56157,56221,56223,49617,56157,
-49616,56156,56227,56229,49699,56157,49698,56156,56233,56235, 1216,56156,
-  412,56156,12377,56156,  375,56156,  510,56156,38057,56156,  903,56248,
-  165,56156,  903,56252,21315,56156, 1011,56256, 1505,56156, 1011,56260,
-  413,56157,50785,56265,56241,56265, 1217,56157,56239,56271, 1216,56157,
-  413,56156,  412,56157,56277,56279, 1217,56156,56275,56283,  264,56157,
-51777,56287,50908,56287,50785,56287,  241,56292,  241,56287,50785,56296,
-  375,56287,  264,56156,50207,56303,51765,56303,51677,56303,51615,56303,
-  241,56311,  341,56303, 1011,56156, 1505,56316,21315,56316,  903,56156,
-  165,56322,38057,56322,  483,56156,    9,56328,    9,56156,  483,56332,
-    5,56157,    4,56156,56337,56339,46863,56340,    2,56343,    2,56342,
-49515,56340,49514,56340,    2,56341,56349,56353,    3,56341,56347,56357,
-56351,56357,    2,56340,46863,56362,56357,56365,56357,56363,    3,56340,
-56345,56371,56353,56371,    3,56157,  375,56377,    2,56156,56337,56381,
-    1,56383,    0,56382,56385,56387,    0,56383,    1,56382,56391,56393,
-56377,56381,46863,56396,    4,56399,    4,56398,49631,56396,49630,56396,
-    4,56397,56405,56409,    5,56397,56403,56413,56407,56413,    4,56396,
-46863,56418,56413,56421,56413,56419,    5,56396,56401,56427,56409,56427,
-    2,56157,    3,56156,56337,56435,    7,56437,    6,56436,56439,56441,
-    6,56437,    7,56436,56445,56447,56433,56435,46863,56451,    4,56452,
-    4,56453,49631,56451,49630,56451,    4,56451,46863,56462,    5,56451,
-56457,56467,    4,56450,56467,56471,56459,56471,    5,56450,56465,56477,
-56455,56477,56463,56477,56461,56477,    4,56157,56435,56487,    1,56489,
-    0,56488,56491,56493,    0,56489,    1,56488,56497,56499,56381,56487,
-    7,56503,    6,56502,56505,56507,    6,56503,    7,56502,56511,56513,
-    5,56156,56487,56517,46863,56519,    2,56520,    2,56521,49515,56519,
-49514,56519,    2,56519,46863,56530,    3,56519,56525,56535,    2,56518,
-56535,56539,56527,56539,    3,56518,56533,56545,56523,56545,56531,56545,
-56529,56545,    1,    2,11709,56555,11632,56555,11035,56555,10468,56555,
-17775,56555,11788,56555,12226,56555,11816,56555,11770,56555,44558,56555,
-42181,56555,44243,56576,44438,56555,10856,56555, 3447,56555,  375,56584,
- 3448,56555,11705,56555,11033,56555,10516,56555,17773,56555,18735,56555,
-10427,56555,10831,56600,10836,56555,10855,56555,16623,56555,16711,56555,
- 9533,56610,16718,56555, 3555,56555, 5882,56555, 9261,56555,  483,56621,
- 3699,56555,   15,56625,    6,56624,56627,56629,   14,56625,    7,56624,
-56633,56635, 1999,56555,   15,56639,    6,56638,56641,56643,   14,56639,
-    7,56638,56647,56649,29450,56555,29731,56653,29659,56653,28791,56653,
-29041,56653,38067,56555,    5,56663,38185,56665,42155,56554,44243,56669,
-42471,56670,44966,56669,42471,56669,44243,56676, 1471,56554,36639,56681,
-15390,56555,15383,56685,28715,56555,21527,56689,29229,56691,    7,56689,
-29759,56695,    7,56688,28791,56699,29041,56699,29731,56699,29659,56699,
- 1005,56555,16877,56554,16893,56711, 9925,56555, 1369,56715, 9927,56717,
-35336,56555,  989,56721,35278,56555, 1177,56725,  987,56555,35187,56728,
-  989,56731,36563,56554,36639,56735,  671,56554,36597,56554,36639,56741,
- 1418,56554,    1,56745,    4,56746,    4,56745,    1,56750,  147,56555,
-35187,56754,   53,56757,17637,56555,  587,56760,10107,56763,35316,56555,
- 1471,56767,35330,56555,   53,56771,17638,56555,10107,56775, 1489,56555,
-35187,56778, 1471,56781, 1179,56555,35187,56784, 1177,56787,37229,56555,
-35187,56790,37223,56793, 9441,56555,  587,56796, 9439,56799,37230,56555,
-37223,56803, 9442,56555, 9439,56807,45432,56555,42435,56811,   30,56555,
-11731,56814,45433,56555,56669,56819,43099,56555,52259,56555,  483,56825,
-44742,56555,44904,56555,52613,56555,52383,56555,52497,56555,39231,56555,
-40447,56555,39083,56555,38797,56555,39019,56555,39301,56555,39429,56555,
-39305,56555,  386,56555,  347,56555,54492,56555,45508,56555,56116,56555,
-55812,56555,40987,56555,52909,56555,51598,56555,50419,56555,56332,56555,
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-36661,57355,36675,57353, 8067,57353, 7979,57353, 7981,57353,39747,57353,
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-  253,57415,   53,57415,  117,57415, 1471,57415,11731,57404,    9,57424,
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-44243,57482,   33,57489,39205,57482,47640,57482,46863,57482,  903,57496,
-35187,57482,43027,57501,43837,57501, 8067,57501, 7979,57501,39747,57501,
- 7981,57501, 1369,57501, 7971,57515,  903,57482,46863,57518,    9,56555,
-10465,57522,11812,57522,10513,57522,   25,57522,11731,57530,56156,57522,
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-48402,57522,17455,57522, 5843,57522,   11,57523,46863,57555,49713,57522,
-46863,57558,  903,57522,35187,57522,46863,57564,46863,57522,49713,57568,
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- 6705,56555, 1369,57597, 6707,57599, 6711,57599, 6715,57599, 3697,56555,
-   16,57607,   16,57606,   17,57607,57611,57613,   17,57606,57609,57617,
- 3709,56555, 8075,56555,    9,57623, 3273,56555,    9,57626, 3423,56555,
-   16,57631,   16,57630,   17,57631,57635,57637,   17,57630,57633,57641,
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-    6,57691,    5,57692,    7,57691,    5,57691,    6,57698,    6,57699,
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-    7,57811,    2,57812,57353,57815,57501,57815,    2,57811,    7,57820,
-57353,57823,57501,57823,57515,57811,57373,57811, 1368,57811,57501,57833,
-57353,57833, 3867,57811, 8277,57811, 3997,57811, 4067,57811, 9459,57811,
- 8953,57811,57483,57811,    9,57811,   14,56555,38881,57855,   11,56554,
-44778,57859,44243,57859,   25,57862,47640,57859,   25,57859,44243,57868,
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-    9,57859,46863,57884,    9,56554,40903,57889,40053,57889,43307,57889,
- 5019,57889,12361,57889,   16,56555,19625,57901,21105,57901,21549,57901,
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-    9,57943,17635,56555,  155,57946,  903,57946,  145,56555,11731,57952,
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-21036,58782,21036,58783,21037,58782,58787,58789,21037,58783,58785,58793,
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-35187,58892,    6,58916,    7,58916,    6,58917,58921,58923,    7,58917,
-58919,58927,  587,56555, 9441,58930, 9439,58933,17637,58930,10107,58937,
-37417,58931,37241,58941,11067,58931, 7947,58945,    7,58930,    4,58949,
-    7,58950,58931,58953,    0,58950,58955,58957,    0,58949,    4,58960,
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-    0,58986,    0,58985,    4,58990,35186,58985,22807,58931,37241,58930,
-10107,58999,53813,58999,37417,58999, 7947,58930,53813,59007,10107,59007,
-11067,59007,10107,58931,17637,59015,48739,59015,37241,59015, 7947,59015,
-48739,58930,53813,59025,10107,59025,53813,58931,48739,59031,37241,59031,
- 7947,59031,40565,58930,   17,58931, 1985,59041, 3721,59041,58989,59041,
-58993,59041, 5299,59041,58957,59041,58963,59041,    1,59041,35233,59041,
-35917,59041, 4861,59041,17563,59041,58965,59041,58995,59041,35187,59041,
-   53,59071,58949,59071,58985,59071,35187,58930,35881,59079,35877,59079,
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- 9383,59079,35883,59079,   17,59079,37145,59101, 9377,59101,35867,59101,
-    9,58930,57797,59109,57805,59109, 3135,59109, 2009,59109,    0,59109,
-59041,59119,59057,59109, 5175,59109,14065,59109,    4,58930, 9366,59129,
- 9195,59129,  483,59132,  483,59129, 9195,59136,31103,59129,    5,58930,
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-    7,59159,59161,59169,40920,56555,    7,59172,43400,56555,    7,59177,
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-59189,59191,    6,59183,56555,59183,    7,59196,59191,59199,    7,59197,
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-    6,59207,59217,59229,    7,59207,59221,59233,59213,59233,   59,59233,
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-  483,59248,46863,59248,  165,59248, 1011,59248,    7,59259,17125,56555,
-    4,59262,    7,59265, 1011,59266, 1011,59265,    7,59270,    7,59271,
- 1170,59265,    5,59263,57993,59279,58313,59279,17129,59279,42811,59263,
-42811,59262,44243,59262,42810,59262,59287,59293,42810,59263,59289,59297,
-  375,59262,    6,59262,59269,59303,59273,59303,59277,59303,    7,59262,
-38305,59310,    6,59263,59275,59315,59311,59315,    7,59263,59303,59321,
-38305,59262,    7,59324,54295,56555,11731,59328,  113,59328,    5,59328,
-    5,59329,57901,59337,17455,56555,    7,59341,    4,59342,    4,59343,
-   16,59341,   17,59341,55211,59340,  803,59340,  903,59340,    9,59340,
-    4,59340,59351,59361,    5,59340,59345,59365,59349,59365,    4,59341,
-    7,59370,59365,59373,    5,59341,59347,59377,    4,56554,26454,59381,
-26375,59381, 8672,59381, 8743,59381,41692,59381,41607,59381, 8770,59381,
- 8729,59381, 3795,59381,47953,59381,48062,59381,47961,59381,48009,59404,
-48009,59381,47961,59408,26219,59381,26415,59412,41417,59381,41653,59416,
-44832,59381,31770,59381, 8757,59381, 8647,59424,41653,59381,41417,59428,
-26415,59381,26219,59432, 8647,59381,  305,59436, 8757,59436, 8605,59381,
-47580,59381,47933,59445, 8684,59381, 8717,59449, 8916,59381,44243,59381,
-  483,59454,41502,59381,41559,59459,  340,59381, 8717,59463, 3785,59463,
- 8495,59463,  375,59381, 8861,59470,46863,59470,47488,59381,26292,59381,
-26331,59479,    9,59381,31103,59482,  305,59381, 8647,59486,    7,59381,
-    1,59491,  264,59492,  264,59493,25793,59491,26415,59499,41019,59491,
-41653,59503, 8495,59491,  305,59507, 8757,59507, 8495,59490, 8717,59513,
-41019,59490,41559,59517,  265,59491,59497,59521, 8861,59521,46863,59521,
-25793,59490,26331,59529,  265,59490, 8717,59533,59495,59533, 3785,59533,
- 8495,59533,31103,59381,    9,59542,  483,59381,44243,59546,46863,59381,
-  265,59551,48009,59553,  265,59550,47933,59557,  375,59550,41019,59381,
-    7,59563,41417,59565,    7,59562,41559,59569,  265,59381,46863,59573,
-47961,59575,46863,59572,47933,59579,    7,59573, 8647,59583,    7,59572,
- 8717,59587, 3785,59587, 8495,59587,25793,59381,    7,59595,26219,59597,
-    7,59594,26331,59601, 8495,59381,    7,59604, 8717,59607,    7,59605,
- 8647,59611, 8861,59381,  375,59614,    5,56554,26777,59619, 9741,59619,
- 9745,59619,26781,59619,30349,59619,26857,59619,26933,59619,    2,59619,
-    7,59634,57353,59637,57501,59637,58637,59637,    6,59635, 9777,59619,
- 1368,59619,57501,59649,57353,59649,58637,59649,57515,59619,57373,59619,
-58663,59619, 9771,59619,40077,59619,31598,59619,55462,59619,50733,59619,
-37519,59619,35690,59619, 8982,59619,55211,59619,  483,59678,  668,59619,
- 9731,59683,26625,59683, 1419,59619, 9731,59689,26625,59689,   17,59619,
- 8861,59694,    9,59619,  587,59698, 9731,59701,26625,59701,  375,59619,
-35187,59706,    6,59619,    7,59619,    5,59713,    2,59712,57353,59717,
-57501,59717,58637,59717,    5,59712,58396,59725,59717,59727,35187,59725,
-56555,59730,59717,59733,56555,59725,35187,59736,59717,59739,    7,59618,
- 3867,59743, 8277,59743, 3997,59743, 4067,59743, 9459,59743, 8953,59743,
-31103,59619,26625,59756,  483,59619,55211,59760,  587,59619,    9,59764,
- 9731,59767,26625,59767,35187,59619,  375,59772,26625,59619,31103,59776,
- 8861,59619,    7,59781,   17,59780,    6,56554,36633,59787,36627,59787,
-    1,59787,    4,59792,57253,59795,57381,59795,57577,59795,59109,59795,
-    5,59792,38304,59787,39987,59787,36544,59787, 9875,59811,20501,59811,
-   11,59787,35187,59816,20501,59819, 9875,59819,    5,59787,    1,59824,
-    4,59787,    6,59829, 1369,59831,56555,59833,    1,59828,57253,59837,
-57381,59837,57577,59837,59109,59837,59835,59837,    6,59828,58930,59849,
-59837,59851,  587,59849,56555,59854,59837,59857,56555,59849,  587,59860,
-59837,59863,35187,59787,   11,59866,20501,59869, 9875,59869,    7,56554,
- 4904,59875,17586,59875,17609,59875,40685,59875,40039,59875,42991,59875,
- 9484,59875,  272,59875, 1476,59875,  280,59875,  949,59875, 1517,59875,
- 1197,59875, 4903,59875,    9,59902,17579,59875,    9,59906,   11,59875,
- 9377,59910,    9,59875, 4903,59914,17579,59914,  253,59875,  265,59920,
-   53,59875,  265,59924, 1471,59875,  265,59928,    5,59874, 3867,59933,
- 8277,59933, 4067,59933, 3997,59933, 8953,59933, 9459,59933,  265,59875,
-  253,59946, 1471,59946,   53,59946, 9377,59875,   11,59954,    5,59955,
-    7,56555,59826,59960,59827,59961,59963,59965,59827,59960,59826,59961,
-59969,59971,59804,59960,59805,59961,59975,59977,59805,59960,59804,59961,
-59981,59983,21036,59960,14072,59960,14073,59960,14072,59961,59991,59993,
-59183,59960,59191,59997,59183,59961,59185,60001, 4970,59960, 4971,59960,
- 4970,59961,60007,60009,16169,59961, 9617,60013,39786,59961,59807,59961,
-59806,59961,28715,59960,28791,60023,29731,60023,29659,60023,29041,60023,
-21036,59961,21037,59960,60033,60035,38304,59961,59787,60038,  483,60038,
-38304,59960,60019,60045,59787,60045,  483,60045,18967,59961,    5,60053,
-    5,60052,    2,59961,    0,60059,56555,60061,    5,60063,59961,60065,
-    7,60064,60067,60069,59960,60065,    6,60064,60073,60075,    1,59961,
-    3,60079,    5,60081,56555,60082,56555,60081,    5,60086,    5,60087,
- 1011,60079,56555,60093,    5,60079,    1,59960,21036,60099,    3,60099,
-56555,60103,    5,60105,    5,60104,    5,60103,56555,60110,    5,60099,
-18967,60114,18967,60099,    5,60118,    5,60119,    2,59960,59811,60125,
-36545,60125,59787,60129,59819,60125,59869,60125,   15,60125,29659,59961,
-29077,60139,39787,59961,60045,60143,32103,59961,41746,59961,26106,59961,
- 8800,59961,36526,59960,40920,59960, 1163,59961,41019,59961,   11,60160,
-35187,60161,59619,59961, 4971,59961,60005,60169,14073,59961,59989,60173,
- 4555,59961,  559,59961,   39,59961, 8495,59961,35187,60183,   11,60182,
-15029,59960,  375,60189,17125,59960,38305,60192,   11,59961,41019,60196,
-25793,60196, 8495,60196,  265,59961, 3447,60205,10831,60205,  305,60205,
-17125,60205,11731,60205,  567,59961,46863,60217,   15,59961, 3651,60221,
- 1993,60221, 4903,60221,17579,60221,  241,59960,38305,59960,60017,60233,
-60021,60233,60041,60233,60043,60233,60039,60233,59787,60243,  483,60243,
-17125,60232, 1011,59960,59279,60251,21037,59961,59987,60255,   11,60255,
-28715,59961,29533,60261,20273,60261, 9617,60261,35187,59960,25793,60269,
-41019,60269, 8495,60269,58715,60269,  265,60268,  265,59960,  331,60281,
-35187,60280,38305,59961,37845,60287,37844,60286,60289,60291,37844,60287,
-37845,60286,60295,60297,60048,60287,59787,60287,60045,60302,60050,60287,
-60045,60287,59787,60308,  483,60308,  483,60287,60045,60314, 1011,59961,
-25793,59961,35187,60321,   11,60320,    4,59960,60091,60327,60107,60327,
-60033,60327,60101,60327,59337,60327,58191,60327,58211,60327,60057,60327,
-60117,60327,60121,60327,21549,60327,21105,60327,19625,60327,58887,60327,
-17591,60327,    5,59960,    1,60359,    3,60361,60205,60363,60255,60359,
-    4,59961,60085,60369,60089,60369,60113,60369,60109,60369,57685,60369,
-59335,60369,58201,60369,58221,60369,57775,60369,57777,60369,60095,60369,
-60055,60369,60123,60369,31103,60369,21575,60369,58881,60369,58009,60369,
-17579,60369, 4903,60369,48408,60369,46863,60369,  483,60410,  483,60369,
-46863,60414,    5,59961,18967,60418,60327,60421, 1368,60419,    2,60419,
-    7,60426,    7,60419,    2,60430,59787,59961,38304,60435,60287,60437,
-38304,60434,60233,60441,  483,59961,38304,60445,60287,60447,38304,60444,
-60233,60451,    5,56555,60081,60454,60369,60457,60103,60454,60369,60461,
-    1,60455,    3,60464,    1,60454,59491,60469,59490,60469,59381,60469,
-    7,60474,    7,60475,    5,60469,59961,60481,    6,60468,60473,60485,
-60477,60485,    7,60468,60471,60491,59381,60491,    6,60469,59381,60497,
-60491,60498,60479,60497,60494,60497,60491,60497,59381,60506,    7,60469,
-59381,60510,60485,60513,60485,60511,59381,60517,    2,60454,60261,60521,
-60483,60521,53813,60455,  483,60527,52915,60455,46863,60531,59875,60455,
- 9801,60454,60369,60537,48735,60454,60369,60541,10107,60455,  483,60545,
- 9195,60455,46863,60549,54295,60454,60369,60553,  587,60455,17455,60557,
-11731,60557,    9,60455, 8861,60563,   17,60455,  587,60567,26625,60569,
- 9731,60569,60467,60569,  483,60454,53813,60577,10107,60577,20763,60455,
-46863,60583,46863,60454,27021,60587,52915,60587, 9195,60587,20763,60587,
- 1275,60454,60369,60597,  587,60454,25519,60601,27021,60455,46863,60605,
-    6,60454,38881,60609,59381,60455,30091,60455,31103,60615,    4,56555,
-    2,60619,    0,60621,56555,60623,    5,60625,    7,60621,60627,60629,
-    1,60618,59689,60633, 1418,60633,59619,60637,59683,60633,  669,60633,
-59619,60643,60569,60633,59701,60633,59767,60633,   15,60633, 1369,60652,
-59619,60655, 1369,60633,   15,60658,59619,60661,  842,60619, 9377,60665,
-59787,60619, 9377,60618,  483,60671,  587,60619,  483,60674, 9377,60677,
- 9377,60675,  483,60681,21527,60619,    9,60685,31103,60619,  587,60689,
-  587,60618, 9366,60693, 9195,60693,  483,60696,  483,60693, 9195,60700,
-31103,60693,  483,60619,  587,60706, 9377,60709, 9377,60707,  587,60707,
- 9195,60715,    7,60618,59337,60719,58191,60719,58211,60719,21105,60719,
-21549,60719,19625,60719,58887,60719,17591,60719,    6,60619,    1,60737,
-    4,60738,    4,60737,    1,60742, 1369,60737,56555,60747,60741,60749,
-60745,60749,    7,60619,    2,60755,21183,60755, 9377,60755,59619,60619,
-38305,60619,    3,60764,    2,60764,56555,60765,    6,60770,60769,60773,
-    6,60765,56555,60776,60769,60779, 1011,60619,46862,60782,46862,60783,
-46863,60783,60785,60789,46863,60782,60787,60793,    6,56555,36303,60797,
-36302,60796,60799,60801,36303,60796,36302,60797,60805,60807,40946,60796,
-40946,60797,60765,60796,60769,60815,    2,60797,    0,60818,40947,60796,
-60813,60823,40947,60797,60811,60827,60765,60797,60767,60831,59381,60797,
-   17,60797,35187,60837,20501,60839,60125,60839,60821,60839, 9875,60839,
-35187,60796,58723,60849,    5,60796,38881,60853,    0,    3, 8169,60857,
- 8028,60857, 8173,60857, 8214,60857, 8167,60857, 8154,60857, 8026,60857,
- 8054,60857,17728,60857,60210,60857,60283,60857,58128,60857,58023,60857,
-57476,60857,56854,60857,56856,60857,58901,60857,58906,60857,58122,60857,
-58066,60857,56810,60857,56822,60857,16743,60857,16696,60857, 4810,60857,
-16745,60857,16729,60857,16714,60857, 6648,60857, 2079,60857,  375,60916,
- 2086,60857,16733,60857,16565,60857,16683,60924,16692,60857,16735,60857,
-16739,60857,51942,60857,44534,60857,42383,60857,44243,60938,44440,60857,
-16747,60857,   75,60857, 6625,60946, 6632,60857, 6645,60857,60079,60857,
-    5,60955,60327,60957,    5,60954,60369,60961,60096,60857,60369,60965,
- 1325,60856,40829,60969, 1173,60857,17591,60856,17603,60975,10039,60857,
- 1275,60979,10041,60981,38560,60857, 1205,60985, 1203,60857,38305,60988,
- 1205,60991,38514,60857, 1007,60995,40741,60856,40829,60999,  531,60856,
- 1290,60856,    0,61005,    5,61006,    5,61005,    0,61010,40769,60856,
-40829,61015,38548,60857, 1325,61019,  177,60857,38305,61022,   59,61025,
-17053,60857,  483,61028,10081,61031, 1009,60857,38305,61034, 1007,61037,
- 1365,60857,38305,61040, 1325,61043,38566,60857,   59,61047,17054,60857,
-10081,61051,42109,60857,38305,61054,42103,61057, 9527,60857,  483,61060,
- 9525,61063,42110,60857,42103,61067, 9528,60857, 9525,61071,  386,60857,
-56555,61074, 8150,60857,  113,61078,  347,60857,56555,61082,58905,60857,
-  375,61086,45432,60857,56555,61090,43099,60857,56555,61094,40829,60857,
- 1325,61099,40741,61099,40769,61099,60535,60857,    9,61107,57916,60857,
-    9,61111,57851,60857,    9,61115,17727,60857,  113,61118,57060,60857,
- 8309,60857,60230,60857,57986,60857,57998,60857,60268,60857,58352,60857,
-58704,60857,13820,60857,13772,60857,57994,60857,58056,60857,42155,61144,
-36101,60857,  375,61149,37407,60857,47392,60857,36532,60857,36536,60857,
-57284,60857,58760,60857,58762,60857,58846,60857,58372,60857,57278,60857,
-57996,60857,57470,60857,  305,61174,60205,60857,  305,61178,58374,60857,
-58830,60857,57586,60857,57480,60857,57230,60857,57568,60857,40684,60857,
-36542,60857,  375,61197,42990,60857,40038,60857,37498,60857,36754,60857,
-35796,60857, 8225,60857, 8242,60857,  128,60857, 7971,61214,  101,60857,
- 7971,61218,37362,60857,48122,60857,12526,60857, 6698,60857,47690,60857,
-38704,60857,11943,60857,    9,61235,12343,60857,    5,61239,    4,61238,
-61241,61243,    4,61239,    5,61238,61247,61249,40132,60857,  331,61253,
-   59,61253,   97,61253, 1325,61253, 8148,60857,48753,61263,10081,61263,
-11759,61263,39044,60857,  331,61271, 1325,61271,  571,61271,   59,61271,
-42338,60857,48753,61281,44451,61281,10081,61281,42959,60857,48753,61289,
-44451,61289,42825,61289,10081,61289,  629,60857,56555,61298,38305,61298,
-  289,60857,  587,61305,10287,60857,17660,60857,10262,60857,40130,60857,
-  331,61315,   59,61315, 1325,61315,53780,60857,48753,61323,10081,61323,
-60668,60857,    9,61329, 8213,60857,    9,61332,11813,60857,    9,61337,
-17030,60857, 8211,60857, 8301,60857, 8209,60857,38110,60857, 8052,60857,
-    9,61350,10464,60857,    9,61355,10527,60857,    9,61359, 4727,60857,
-    9,61363,11989,60857,   11,61367,    5,61368,    6,61367,    5,61372,
-    5,61367,    6,61376,    6,61377,    7,61367,61381,61383,   15,61367,
-    6,61366,61387,61389,   14,61367,    7,61366,61379,61395,61375,61395,
-61371,61395,61393,61395,12371,60857,    5,61405,    4,61405,   12,61405,
-   13,61404,61411,61413,   13,61405,   12,61404,61417,61419,    5,61404,
-61409,61423,    4,61404,61407,61427, 6625,60857,44243,61430,  375,61430,
-   75,61430,    9,61431, 6685,60857,  483,61440,46863,61440,17060,60857,
-35768,60857,50524,60857,52806,60857,50480,60857,36296,60857,50990,60857,
-  510,60857,56555,61460,47608,60857,36293,60857,  483,61466,  295,60857,
-49713,61470, 1291,60857,61009,61475,61013,61475,20033,61475, 1831,61475,
- 1881,61475,19319,61475,    4,61475,19317,61489,15899,61475, 4579,61475,
-48561,60857,    9,61497,  922,60857,56555,61500,51937,60857,  375,61504,
-57915,60857,57859,61508,    9,61511,39234,60857,60853,61515,60609,61515,
- 9525,61515,42103,61515, 9517,61515,41989,61515,39485,61515,39481,61515,
-57855,61515, 9519,61515,41995,61515,39487,61515,   15,61515, 9513,61541,
-41941,61541,39477,61541,50958,60857,    9,61548,35761,60857,    9,61552,
-35719,60857,  375,61557,57482,60857,57852,61561,57811,61561,    9,61564,
-    9,61561,57811,61568,57522,60857,  483,61572,46863,61572, 1072,60857,
- 1108,60857,49713,61580,  524,60857,    4,61585,19301,61587,19311,61585,
- 3195,61585, 1965,61585,15899,61585, 4579,61585,40704,60857,    7,61601,
-40799,61603,40813,61601, 7961,61601, 7951,61601, 7953,61601,35893,61601,
-37897,61601,38299,61601, 1275,61601, 7947,61621,52756,60857, 1011,61624,
-10245,60857,37339,60857,   33,60857,10385,61632,    9,61635, 7971,60857,
-  101,61638,  128,61638,    9,61638,  113,61644,  483,61638,48753,61649,
-10081,61649,11759,61649,  113,61638,    9,61656,   21,60857,38305,61660,
-  331,61663,   59,61663,   97,61663, 1325,61663,47640,60857,56555,61672,
-17635,60857,12377,61676,11731,60857,13737,61680,  567,60857,46863,61685,
-55211,60857,44243,60857, 6625,61690,42383,61690,58116,61690,42155,61690,
-56555,61698,56555,61690,42155,61702, 1505,60857,38057,61706,  288,60857,
-46863,61711,48466,60857,56555,61714,   11,60857,  340,61719,  341,61719,
-  264,61718,61721,61725,    7,61719,  265,61728,61725,61731,  265,61729,
-  264,61719,61735,61737,56555,61719,57859,61741,    9,61743,  483,61718,
- 4579,61747,15899,61747, 3195,61747, 1965,61747,  265,61719,    7,61756,
-61725,61759,56555,61718,57852,61763,57811,61763,    9,61766,    9,61763,
-57811,61770,  265,61718,61723,61775,46863,61775,    9,60857, 8213,61780,
- 8052,61780, 7971,61780,  113,61786,36527,61780,58782,61780,58362,61780,
- 8241,61780,  113,61780, 7971,61798,35761,61780,50958,61780,  483,61780,
-56555,61806, 1011,61780,49713,61810,38305,61780,38299,61815,37897,61815,
- 7961,61815, 7951,61815,35893,61815, 7953,61815, 1275,61815, 7947,61829,
-49713,61780, 1011,61832,56555,61780,46863,61836,  483,61836,46863,61780,
-56555,61842, 7563,60857, 1275,61847, 7565,61849, 7569,61849, 7573,61849,
- 7065,60857,35187,61857,10089,60857,   16,61861,   16,61860,   17,61861,
-61865,61867,   17,61860,61863,61871,10257,60857,  903,61874, 8241,60857,
-    9,61878, 3255,60857,    9,61883,48789,60857,   16,61887,   16,61886,
-   17,61887,61891,61893,   17,61886,61889,61897,37357,60857,  903,61900,
- 3499,60857,    9,61905, 3445,60857,    9,61909,38184,60857,  375,61913,
-16722,60857,16543,61917,16679,61917,16537,61917,35187,61916,13922,60857,
-13753,61927, 4805,60857,  375,61930,16683,60857,16565,61934,  375,61934,
- 6515,60857,    9,61941,59824,60857,60369,61945,    9,61945, 9520,60857,
-    9,61951,16711,60857,16659,61954,    8,60856,    3,61959,    6,61960,
-61601,61963,61815,61963,    6,61959,    3,61968,61601,61971,61815,61971,
-61829,61959,61621,61959, 1274,61959,61815,61981,61601,61981,   16,60856,
-   10,60856,    5,61989,    0,61990,61585,61993,61747,61993,    0,61989,
-    5,61998,61585,62001,61747,62001,57811,61989,59933,61989,59743,61989,
- 8093,61989, 3837,61989,39619,61989,51421,61989,53703,61989,42435,61989,
- 4287,61989, 4303,61989,53487,61989,42113,61989, 9839,61989, 9579,61989,
-    9,61989,  113,62036,  128,61989,  101,61989,  113,61989,    9,62044,
-57859,60857,57915,62048,    9,62051,    9,62049,57915,62055,   11,60856,
-  483,62059,    9,60856,57889,62063, 5185,62063,11243,62063,12557,62063,
-11251,62063, 5177,62063,   16,60857,57293,62077,35603,62077,58669,62077,
-59079,62077,55005,62077,   17,60856,61685,62089,  483,62089,   15,60856,
-40829,62095,   10,60857,21183,62099,  759,62099,   47,62099,  959,62099,
-  203,62099,  107,62099,   85,62099,   67,62099,    9,62115,  113,60857,
- 8150,62118,17727,62118,13737,62118,    9,62118, 7971,62126,17025,62118,
- 7971,62118,    9,62132,10385,60857,    9,62137,   33,62139,   33,62136,
-    9,62143,  165,60857,17049,62146,17025,60857, 1275,62151, 7947,62153,
-48739,62153,17637,62153,17029,62153,37241,62153,  113,62150,17049,60857,
-  165,62166,10247,60857,37347,60857,10249,60857,16659,60857,16711,62176,
-37408,60857,56555,62180,16531,62180,  340,60857,51803,62187,  331,62187,
- 1325,62187,   59,62187,52439,60857,56555,62196,52563,60857,  265,62201,
- 1413,60857,56555,62204,  256,60857,56555,62208,38305,62208,  566,60857,
-61987,62215, 9377,62215,37325,62215,10219,62215,  959,62215,   47,62215,
-  759,62215,  587,62215,20763,62215,42810,60857,43073,62235,42827,62235,
-58703,62235,60849,62235,58027,62235,42821,62235, 1325,62235,   59,62235,
-  331,62235,  265,62235,42613,62235,56555,62257,  241,62234,  580,60857,
-20033,62263,59143,62263,60601,62263,58029,62263,55210,60857,31103,62273,
-37375,60857, 1347,60857,37409,60857,  375,62280,  375,60857,58905,62284,
-16683,62284, 4805,62284,58126,62284, 6625,62284, 2079,62284,51937,62284,
-  305,62284,56555,62300,56555,62284,  305,62304,37409,62284,  803,60857,
-37608,60857,  305,60857,60205,62314,57470,62314,  375,62314,56555,62320,
-56555,62314,  375,62324,58116,60857,44243,62328,58126,60857,  375,62332,
-42155,60857,58056,62336,44243,62336,56555,62340,  483,62336,48753,62345,
-44451,62345,10081,62345,56555,62336,44243,62352,53517,60857,  483,62356,
-48753,62359,10081,62359,  251,60857,38305,62364,  331,62367, 1325,62367,
-   59,62367,  555,60857,38305,62374,  331,62377, 1325,62377,  571,62377,
-   59,62377,60612,60857,    7,62387,36273,60857,    7,62391,59787,60857,
-60619,62394,    9,62397,    5,62394,60369,62401,    9,62401,    5,62395,
-60327,62407,60719,62407,57901,62407,   17,62407,59381,60857,60455,62416,
-    7,62419, 9513,60857,    5,62423,   17,62425,    5,62422,    9,62429,
-58362,60857,  903,62432,    9,62432,58348,60857,    7,62438,58782,60857,
-  903,62442,    9,62442,58396,60857,    7,62448,58742,60857,    9,62453,
-  483,62452,46863,62452,60763,60857,    7,62461,  903,60857,58782,62464,
-58362,62464,37357,62464,10257,62464,  483,62464,56555,62474,46863,62464,
-56555,62478,56555,62464,    9,62483,46863,62482,  483,62482,38057,62464,
-    7,62491,  265,60857,46863,62495,   11,62497,   11,62494,46863,62501,
-    7,62494,51803,62505,  331,62505, 1325,62505,   59,62505,    7,62495,
-  375,62515,35187,60857,59960,62518,16722,62518,    7,62518,56555,62524,
-16531,62524,56555,62518,    7,62530,16531,62518,    7,62534,46863,60857,
-36527,62538,58742,62538,57522,62538,12377,62538, 6685,62538, 1011,62538,
-  903,62538,56555,62552,    9,62538,56555,62556,56555,62538,  903,62560,
-    9,62560,36527,60857,    7,62567,  331,62569,    9,62566,46863,62566,
-  483,62566,    7,62566,  375,62579,38305,60857,42109,62582,42103,62585,
- 1205,62583, 1203,62589, 1007,62583, 1009,62593, 1203,62582, 1205,62597,
- 1009,62582, 1007,62601,  177,62582,   59,62605, 1365,62582, 1325,62609,
-  571,62583,  555,62613,   97,62583,   21,62617,    5,62582,    6,62621,
-    5,62622,62583,62625,    2,62622,62627,62629,    2,62621,    6,62632,
-  482,62621,    3,62582,    6,62639,    3,62640,62583,62643,    4,62640,
-62645,62647,    4,62639,    6,62650,    8,62639,   14,62582,    6,62657,
-    2,62658,    2,62657,    6,62662,  482,62657, 1274,62582,    6,62669,
-    4,62670,    4,62669,    6,62674,    8,62669,  256,62582,  629,62582,
-  555,62582,   59,62685,  331,62685, 1325,62685,  571,62685,   21,62582,
- 1325,62695,  331,62695,   59,62695,   97,62695, 1325,62583, 1365,62705,
-  251,62705,   21,62705,  555,62705,   59,62583,  177,62715,  251,62715,
-  555,62715,   21,62715,  251,62582,  331,62725,   59,62725, 1325,62725,
-  331,62583,  251,62733,  555,62733,   21,62733,   15,62583,10085,62741,
-10093,62741,62661,62741,62665,62741,40909,62741,62629,62741,62635,62741,
-    3,62741,10087,62741,62637,62741,62667,62741,  483,62741,10081,62765,
-62621,62765,62657,62765, 1275,62583,10005,62773,10041,62773,62673,62773,
-62677,62773,62647,62773,62653,62773,    5,62773,10009,62773,23879,62773,
-31937,62773,30399,62773,62655,62773,62679,62773,    9,62773,10001,62801,
-62639,62801,62669,62801,  483,62582,39485,62809,39481,62809, 9525,62809,
- 9517,62809,    4,62809,62773,62819,62787,62809,42103,62809,41989,62809,
- 9519,62809,41995,62809,57855,62809,60853,62809,60609,62809,39487,62809,
-   15,62809, 9513,62841,41941,62841,39477,62841,    9,62582,61971,62849,
-61963,62849, 7961,62849, 7951,62849,    2,62849,62741,62859,62757,62849,
- 7953,62849,35893,62849,38299,62849,37897,62849,61981,62849, 1275,62849,
- 7947,62875,61959,62875,    6,62582,    7,62582,58703,62883,58027,62883,
-60849,62883,   59,62883, 1325,62883,  331,62883,  265,62883,42613,62883,
-56555,62899,  241,62882,    7,62583,58715,62905,58056,62905,40799,62905,
-  375,62905,56555,62905,44243,62914,44243,62905,56555,62918,  265,62583,
-  375,62923,62881,62923,  241,62582,    6,62928,    7,62928,    6,62929,
-62933,62935,    7,62929,62931,62939, 1011,60857,52756,62942,46863,62942,
-  483,62942,    9,62942,49713,62950,49713,62942,    9,62954,    7,62943,
-10107,62959,53813,62959,49713,60857,22807,62965, 1108,62964,  295,62964,
-    9,62964, 1011,62972, 1011,62964,    9,62976,    4,62964,31103,62981,
-  241,60857,59960,62984,42810,62984,    7,62984,56555,62990,38305,62990,
-56555,62984,    7,62996,38305,62984,    6,63000,    7,63000,    6,63001,
-63005,63007,    7,63001,63003,63011,  483,60857, 9527,63014, 9525,63017,
-17053,63014,10081,63021,11759,63015, 7971,63025,44451,63015,42155,63029,
-    0,63014,    5,63033,    0,63034,63015,63037,    7,63034,63039,63041,
-    7,63033,    5,63044,   10,63033,    6,63014,    5,63051,    6,63052,
-63015,63055,    1,63052,63057,63059,    1,63051,    5,63062,38304,63051,
-   14,63014,    5,63069,    1,63070,    1,63069,    5,63074,38304,63069,
-36527,63014,58742,63014,57522,63014,12377,63014, 6685,63014, 7971,63014,
-48753,63091,10081,63091,11759,63091,42155,63014,10081,63099,48753,63099,
-44451,63099,10081,63015,17053,63107,53517,63107,42155,63107, 7971,63107,
-53517,63014,48753,63117,10081,63117,48753,63015,53517,63123, 7971,63123,
-42155,63123,36293,63014,   17,63015,   11,63015,    9,63014,56555,63136,
-   15,63015, 1995,63141, 3755,63141,63073,63141,63077,63141, 5303,63141,
-63059,63141,63065,63141,    0,63141,38403,63141,39943,63141, 4917,63141,
-17013,63141,63067,63141,63079,63141,38305,63141,   59,63171,63051,63171,
-63069,63171,  903,63014,56555,63178, 1011,63014,   11,63014,61993,63185,
-62001,63185, 3195,63185, 1965,63185,    1,63185,63141,63195,63157,63185,
- 4579,63185,15899,63185,38305,63014,39481,63205,39485,63205,42103,63205,
-41989,63205,    7,63205, 9525,63205, 9517,63205,41995,63205, 9519,63205,
-57855,63205,60609,63205,60853,63205,39487,63205,   15,63205,41941,63233,
- 9513,63233,39477,63233,    4,63014,20033,63241,59143,63241,60601,63241,
-58029,63241,63133,63241,    5,63014,61987,63253, 9377,63253,37325,63253,
-10219,63253,  959,63253,   47,63253,  759,63253,  587,63253,20763,63253,
-    4,63015,    7,63272,63253,63275,20029,63273,59147,63273,21103,63273,
-19781,63273,19301,63273,62773,63273,    5,63015,  803,63291,56555,63014,
-  903,63294,    9,63294,40674,60857,    6,63300,    7,63300,    6,63301,
-63305,63307,    7,63301,63303,63311,38266,60857,    7,63315,36752,60857,
-    7,63318,16937,60857,  580,63322,  483,63322,    4,63327,    4,63326,
-49631,63322,49630,63322,  581,63322,    4,63322,  483,63338,46863,63338,
-    5,63322,63329,63345,    4,63323,63333,63349,63337,63349,    5,63323,
-63335,63355,63325,63355,63331,63355,63341,63355,63343,63355,46863,63322,
-    4,63366,63355,63369,    4,63367,63345,63373,38057,60857,    5,63376,
-    6,63379,    6,63378,   14,63376,   15,63376, 1505,63376,    6,63376,
-    5,63390,    7,63376,63381,63395,  375,63395,    6,63377,63387,63401,
-    7,63377,63393,63405,63383,63405,38161,63405,   59,63405,63385,63405,
-  331,63405, 1325,63405,  265,63405,  903,63376,    7,63423,16531,60857,
- 1275,63427,16711,63429,37408,63426,    7,63426,16543,63435,16679,63435,
-16537,63435,35187,63434,    7,63427,16565,63445,35187,63426,    7,63448,
-12377,60857,    9,63453,46863,63452,  483,63452,17635,63452,13737,60857,
-  113,63462,11731,63462,    5,63462,13753,63469,    5,63463,13751,63473,
-13917,63473,13743,63473,60619,60857,59787,63480,    9,63483,60455,60857,
-59381,63486,    7,63489,    5,60856,45491,63493,42800,63493,59694,63493,
-10374,63493,60563,63493, 9606,63493,42134,63493,  629,63493,  705,63493,
-  101,63493,  299,63493,  828,63493,  128,63493,  394,63493,48122,63493,
-  803,63493,  483,63524,42613,63493,   17,63528,51992,63493,  375,63493,
-  241,63534,49713,63534,10291,63493,   17,63540,  256,63493,  113,63493,
-    9,63546,   17,63493,42613,63550,10291,63550,59619,63550, 9565,63550,
-41941,63550,    9,63493,  113,63562,    7,63493,21605,63567,  241,63566,
-    7,63492,59933,63573,59743,63573,57811,63573, 8093,63573, 3837,63573,
-53703,63573, 4287,63573,42435,63573, 4303,63573,53487,63573, 9839,63573,
-42113,63573, 9579,63573,39619,63573,51421,63573,31103,63493,46863,63493,
-12377,63606,  483,63493,  803,63610,49713,63493,  375,63614,56555,63493,
-    5,63619,    6,63621,    6,63620,   14,63619,   15,63619,    6,63618,
-63629,63631,    7,63618,63625,63635,63627,63635,    7,63619,63623,63641,
-    6,63619,    5,63644,63635,63647,  241,63493,  375,63650,    7,63650,
-59619,63493,    7,63657,   17,63656,12377,63493,46863,63662, 9565,63493,
-    7,63667,   17,63666,41941,63493,    7,63673,   17,63672,    4,60856,
-20305,63679, 9641,63679, 9645,63679,20309,63679,21081,63679,20323,63679,
-20387,63679,    3,63679,    6,63694,61601,63697,61815,63697,62849,63697,
-    6,63695, 9701,63679, 1274,63679,61815,63709,61601,63709,62849,63709,
-61829,63679,61621,63679,62875,63679, 9719,63679,43005,63679,58056,63679,
-  386,63679,  347,63679,  767,63679,31103,63733,  524,63679, 9617,63737,
-20273,63737, 1291,63679, 9617,63743,20273,63743,  305,63679,  375,63748,
-  375,63679,  305,63752,44243,63679,56555,63756,   11,63679,  483,63760,
- 9617,63763,20273,63763,    7,63679,38305,63769,56555,63771,    6,63679,
-    4,63775,    3,63774,61601,63779,61815,63779,62849,63779,    4,63774,
-62582,63787,63779,63789,38305,63787,60857,63792,63779,63795,60857,63787,
-38305,63798,63779,63801,    7,63678,63253,63805,62215,63805,  483,63679,
-   11,63810, 9617,63813,20273,63813,56555,63679,44243,63818,    7,60856,
-40787,63823,40793,63823,    0,63823,    5,63828,61475,63831,61585,63831,
-61747,63831,63185,63831,36001,63823,26106,63823,32103,63823,41746,63823,
-43005,63823, 8800,63823,59910,63823,36539,63823,37595,63823,36049,63823,
-63253,63823,62215,63823,61305,63823,48975,63823,48245,63823,48451,63823,
-60707,63823,  386,63823,  347,63823,  510,63823,60755,63823, 9852,63823,
-53500,63823,36041,63823,37573,63823,36275,63823,  375,63823,  305,63892,
-  273,63823,  281,63823, 1477,63823, 1516,63823,  948,63823,40704,63823,
-10001,63907,27533,63907, 8495,63823,   11,63912,48885,63823,  483,63917,
-41019,63823,   11,63920,  567,63823,63493,63925,  165,63823,  903,63928,
-   11,63823,25793,63932,41019,63932, 8495,63932,59875,63932, 9805,63932,
-53391,63932,60618,63823,  483,63947,    9,63823,  483,63950,38305,63950,
-27533,63955,10001,63955, 1505,63823, 1011,63960,  305,63823,  375,63964,
-    4,63823,63610,63969,63291,63969,63493,63969,  483,63974,  483,63969,
-63493,63978,56555,63968,  483,63983,    5,63823,    7,63987, 1275,63989,
-60857,63991,    0,63986,61475,63995,61585,63995,61747,63995,63185,63995,
-63993,63995,    7,63986,63014,64007,63995,64009,  483,64007,60857,64012,
-63995,64015,60857,64007,  483,64018,63995,64021,    4,63822,63253,64025,
-62215,64025,    5,63822,59743,64031,59933,64031,57811,64031, 8093,64031,
- 3837,64031,42435,64031, 4303,64031,53703,64031, 4287,64031,42113,64031,
- 9579,64031,53487,64031, 9839,64031,51421,64031,39619,64031,25793,63823,
-   11,64062,  903,63823,  165,64066,38305,63823,    9,64070,27533,64073,
-10001,64073, 1011,63823, 1505,64078,56555,63823,    4,64082,  483,64085,
-  483,63823,    9,64088,59875,63823,   11,64092,    5,64093, 9805,63823,
-   11,64098,    5,64099,53391,63823,   11,64104,    5,64105,    6,60856,
-60454,64111,60369,64113,    5,64111,56555,64116,60369,64119,56555,64111,
-   17,64122,    4,64122,    7,64126,    5,64122,60369,64131,    5,64123,
-60327,64135,60719,64135,64129,64135,57901,64135,    4,64123,64125,64145,
-    7,60857,16539,64149,16683,64151,  264,64149,  264,64148,    3,64149,
-16530,64158,16530,64159,    1,64158,58396,64148,58348,64148,36527,64148,
-  375,64171,40674,64148,36752,64148,  331,64149, 1325,64149,   59,64149,
-38057,64148,  375,64185,16531,64148,64161,64189,16543,64189,16679,64189,
-16537,64189,35187,64188,   17,64149,  241,64201,38305,64149,42383,64205,
- 6625,64205,58116,64205,42155,64205,56555,64212,56555,64205,42155,64216,
-16531,64149,64163,64221,16659,64221,48885,64149,56555,64227,   15,64149,
-  483,64231,38305,64231,27533,64235,64165,64235,10001,64235,35187,64148,
-56555,64242,16531,64242,  265,64148,64155,64249,51803,64249,  331,64249,
- 1325,64249,   59,64249,  241,64148,56555,64260,38305,64260,38305,64148,
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-  265,64267,42613,64267,56555,64283,  241,64266,  265,64149,64157,64289,
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-    6,68974,    0,69056,69035,69059,    7,68974,25793,69063,41019,69063,
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-    3,69150,   33,69153,    3,69151,  113,69157,20034,65869,  375,69161,
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-    2,69220,54159,69225,46863,69227,    2,69221,54256,69231,46863,69231,
-54225,69234,54225,69231,46863,69238,17635,65869,    7,69243,    2,69244,
-    2,69245, 1368,69243, 1369,69243,    2,69242,69253,69255,    3,69242,
-69247,69259,69251,69259,    2,69243,    7,69264,69259,69267,    3,69243,
-69249,69271,    2,65868,41692,69275,41607,69275, 8672,69275, 8743,69275,
-26454,69275,26375,69275, 8770,69275, 8729,69275, 3795,69275,47953,69275,
-48062,69275,47961,69275,48009,69298,48009,69275,47961,69302,41417,69275,
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- 8647,69318,26415,69275,26219,69322,41653,69275,41417,69326, 8647,69275,
-  305,69330, 8757,69330, 8605,69275,47580,69275,47933,69339, 8684,69275,
- 8717,69343, 8916,69275,31103,69275,    9,69348,26292,69275,26331,69353,
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-26331,69463,  265,69275,46863,69467,47961,69469,46863,69466,47933,69473,
-    7,69467, 8647,69477,    7,69466, 8717,69481, 3785,69481, 8495,69481,
-41019,69275,    7,69489,41417,69491,    7,69488,41559,69495, 8495,69275,
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-    3,65868,21116,69513,21253,69513,21560,69513,20465,69513,20576,69513,
-59683,69513,42035,69513, 9573,69513,59689,69513, 9575,69513,42041,69513,
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-68975,69545,69547,69549,68974,69545,68975,69544,69553,69555,    4,69513,
-    6,69558,66665,69561,66785,69561,66997,69561,68695,69561, 9599,69513,
-    8,69513,66997,69573,66785,69573,66665,69573,68695,69573,67011,69513,
-66805,69513,68721,69513,66693,69513,60569,69513,59701,69513,59767,69513,
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-20501,69618,21105,69513,20501,69622, 1418,69513,59619,69627, 9565,69627,
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-31103,69513,27021,69644, 8386,69513,50657,69513,36944,69513,48408,69513,
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-46863,69666,20501,69513,21105,69670,21549,69670,19625,69670,    6,69513,
-    3,69679,56555,69681,65869,69683,    4,69678,66665,69687,66785,69687,
-66997,69687,68695,69687,69685,69687,    3,69678,68460,69699,69687,69701,
-18967,69699,65869,69704,69687,69707,65869,69699,18967,69710,69687,69713,
-    7,69513,20103,69716, 8337,69716,36773,69716,27021,69513,31103,69724,
-    7,69512,24265,69729,28233,69729,29077,69729,20361,69729, 9673,69729,
- 4279,69729, 9967,69729,19559,69729, 4283,69729,20713,69729, 3807,69729,
- 8251,69729,44243,69513,41941,69754,46863,69513,  483,69758,   15,69513,
-18967,69763,20501,69765,18967,69762,20413,69769, 1369,69762, 9565,69773,
-41941,69773,59619,69773, 8337,69513,    7,69780,18967,69513,   15,69784,
-20413,69787, 1011,69513,44242,69790,44242,69791,44243,69790,69795,69797,
-44243,69791,69793,69801,28715,69513,    7,69805,36773,69513,    7,69808,
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-    7,69820,    6,69821,69825,69827,    7,69821,69823,69831, 9617,69513,
-    6,69834,    7,69834,    6,69835,69839,69841,    7,69835,69837,69845,
-    6,65868,    1,69849,    3,69850,    4,69849,    3,69855,67988,69856,
-67989,69857,69859,69861,67988,69857,67989,69856,69865,69867,21604,69849,
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-19981,69877,48747,69877,37279,69877,57047,69877,57029,69877,58153,69877,
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-58167,69877,56554,69877,66973,69911,66825,69911,66625,69911,68415,69911,
-66987,69877,66845,69877,68441,69877,66653,69877,24601,69877,57437,69877,
-57021,69877,57069,69877,54107,69877,52743,69877,52193,69877,20734,69877,
-25551,69877,24613,69877,28205,69877,20501,69877,  265,69950,  241,69951,
- 1141,69877,56555,69957,60577,69877,62959,69877,58377,69877,57981,69877,
-19916,69877, 7947,69969,48739,69969,37241,69969,58931,69877,48739,69977,
- 7947,69977,37241,69977, 8306,69877,   33,69877,56555,69987, 1447,69877,
-56555,69991, 9875,69877,  241,69995,  265,69994, 9992,69877,  545,69877,
-  695,69877, 1382,69877, 1374,69877, 1386,69877,  154,69877,  483,70013,
-60455,69877,  483,70017, 1369,69877,  331,70020, 1325,70020,   59,70020,
- 1325,69877, 1369,70028, 1275,69877,18967,70032,48739,70035,37241,70035,
- 7947,70035,   59,69877, 1369,70042,    2,69877,    7,70047,    9,70049,
-65869,70051,    1,70046,66625,70055,66825,70055,66973,70055,68415,70055,
-70053,70055,    7,70046,68176,70067,70055,70069,   15,70067,65869,70072,
-70055,70075,65869,70067,   15,70078,70055,70081,    3,69877, 8241,70085,
-   15,70084,  483,70089,  331,69877, 1369,70092,    3,69876,24265,70097,
-28233,70097,29077,70097,19559,70097,20713,70097, 4283,70097,20361,70097,
- 9673,70097, 4279,70097, 9967,70097, 8251,70097, 3807,70097,18967,69877,
- 1275,70122,48739,70125,37241,70125, 7947,70125,  113,70123, 1011,69877,
-  265,69877,20501,70136, 8165,70136, 9875,70136,46863,69877,38056,70144,
-38056,70145,38057,70144,70149,70151,38057,70145,70147,70155,   15,69877,
-    3,70159, 1369,70161,    3,70158,  483,70165,54027,69877,  483,70169,
- 8165,69877,  265,70172,    7,65869,69874,70176,69875,70177,70179,70181,
-69875,70176,69874,70177,70185,70187,69852,70176,69853,70177,70191,70193,
-69853,70176,69852,70177,70197,70199,11276,70176,11277,70176,11276,70177,
-70205,70207, 5044,70176, 5045,70176, 5044,70177,70213,70215,40583,70177,
-40583,70176,40582,70176,70219,70223,40582,70177,70221,70227,24094,70177,
-69871,70177,69870,70177,21604,70177,69849,70236,    9,70236,21604,70176,
-70233,70243,69849,70243,    9,70243,    4,70177,    0,70250,    1,70177,
-  264,70254,  264,70255,24095,70177,70243,70261,45149,70177,26498,70177,
-41326,70177, 8796,70177,27533,70177,    9,70273,25793,70177,27021,70277,
-  587,70276,  241,70277, 5045,70177,70211,70285,11277,70177,70203,70289,
- 4551,70177,10001,70177,    9,70295, 8495,70177,  305,70299,  587,70298,
-  241,70299,   88,70177, 1369,70307,  587,70177,25793,70310,41019,70310,
- 8495,70310, 1369,70177,20103,70319,36773,70319, 8337,70319,  265,70177,
-70259,70327,63493,70327, 8861,70327,46863,70327,   89,70177,46863,70337,
-  483,70177,18967,70341,37241,70343,48739,70343,70253,70343, 7947,70343,
- 1275,70177,44243,70353,21605,70176,70231,70357,70235,70357,70239,70357,
-70241,70357,70237,70357,69849,70367,    9,70367,26331,70357,23755,70357,
-27805,70357,  241,70176,25793,70379,59875,70379,41019,70379, 8495,70379,
- 9805,70379,53391,70379,  903,70176,25793,70393, 8495,70393,41019,70393,
-18967,70176,58715,70401,  375,70401,  265,70176,70257,70407,25793,70407,
-41019,70407, 8717,70407, 8495,70407, 3785,70407,21605,70177,70246,70421,
-69849,70421,70243,70424,70248,70421,70243,70421,69849,70430,    9,70430,
-24545,70421,    9,70421,70243,70438,  903,70421,  241,70177,51487,70445,
-  375,70177, 1369,70449,41019,70177,  587,70452,  241,70453,    2,70176,
-48009,70459,  265,70459,46863,70463,49321,70459,49001,70459,    3,70176,
-58056,70471,58601,70471,40799,70471,44243,70471,56555,70478,35927,70471,
-  375,70471,  510,70471,  483,70471,    9,70488,38155,70471,37611,70471,
-56555,70471,44243,70496,    9,70471,  483,70500,    2,70177,44243,70505,
-48466,70505,47640,70505,46863,70505,    9,70512,  903,70512,  903,70505,
-46863,70518,    9,70505,46863,70522,49155,70505,    3,70177, 1369,70529,
-    9,70531,37663,70529,    9,70528, 1369,70537,18967,70529,44243,70541,
-69849,70177,21604,70545,70421,70547,21604,70544,70357,70551,    9,70177,
-21604,70555,70421,70557,21604,70554,70357,70561,    3,70554, 1369,70565,
-    3,70555,  483,70569,    3,65869,60078,70572,60079,70572,13748,70573,
-13736,70572,70579,70581,13736,70573,13737,70572,13749,70573,70587,70589,
-    1,70573,    5,70592,    1,70572,69385,70597,69384,70597,69275,70597,
-    7,70602,    7,70603,59961,70597,    6,70596,70601,70611,70605,70611,
-    7,70596,70599,70617,69275,70617,    6,70597,69275,70623,70617,70624,
-70607,70623,70620,70623,70617,70623,69275,70632,56555,70623,    7,70597,
-69275,70638,70611,70641,70611,70639,69275,70645,48560,70572,   33,70649,
-60230,70573,57986,70573,58352,70573, 8309,70573,13737,70573,    7,70660,
-70581,70663,59960,70573,70575,70667,70611,70667,  241,70666,  256,70573,
-56555,70674,   11,70573,48583,70679,48328,70679,   25,70679,46863,70684,
-46863,70679,   25,70688,59961,70573,70577,70693,  483,70573,   15,70697,
-41941,70699, 9565,70699,70595,70699,59619,70699, 1369,70573,46863,70709,
-37409,70573,46863,70713,46863,70572,   11,70716,   33,70719, 1369,70717,
-   11,70717,   25,70725,37409,70717,   15,70572,40909,70731,   11,70572,
-   33,70735,46863,70737,46863,70734,   33,70741,    6,70572,    1,70744,
-70667,70747,    5,70744,    7,70572,70609,70753,58056,70753,70636,70753,
-70623,70753,56555,70760,40799,70753,58601,70753,44243,70753,56555,70768,
-35927,70753,  375,70753,  510,70753,  483,70753,    9,70778,38155,70753,
-37611,70753,    9,70753,  483,70786,56555,70753,70623,70790,44243,70790,
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-58348,70802,10291,70803,56555,70835,   59,70803, 1325,70803,  331,70803,
- 1275,70803,    9,70845,56555,70802,70611,70849,70747,70849,  241,70848,
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-    7,70866,38057,70573,    7,70871,43503,70573,44243,70875,56555,70573,
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-49001,71039,    7,70923,70989,71051,70997,71052,70995,71051,70997,71056,
-70998,71051,71000,71051,71005,71051,71009,71051,71017,71051,71019,71051,
-71023,71051,71011,71051,71013,71075,14219,71051,14013,71051,14267,71051,
-16151,71051,70997,71051,70995,71086,70989,71086,56554,71051,    1,71051,
-    2,71094,    2,71051,    1,71098,14211,71051, 9165,71103,    9,71051,
-65869,71107,71093,71109,71097,71109,71101,71109,70985,71051,69513,70923,
-  903,70923,46862,71120,46862,71121,46863,71121,71123,71127,46863,71120,
-71125,71131,    6,65869,    1,71134,70803,71137,56555,71139,    4,71134,
-69977,71143,58930,71143,69877,71147,69969,71143,19917,71143,69877,71153,
-70343,71143,70035,71143,70125,71143,  587,71143,56555,71162,69877,71165,
-56555,71143,  587,71168,69877,71171,    2,71134,  903,71175,    1,71177,
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-71195,71203,    3,71135,    8,71207,    4,71207,    6,71210,    6,71207,
-    4,71214,56555,71207,65869,71219,71209,71221,71213,71221,71217,71221,
-    0,    5,59619,71229,59961,71230,60166,71229, 1207,71228,19105,71237,
- 1180,71228,19119,71241,60158,71228,60180,71228,60178,71228,60318,71228,
-60167,71229, 1197,71228,59875,71255,53391,71255, 9805,71255,60159,71228,
-60181,71228,60179,71228,38158,71229,44195,71269, 1196,71228,60319,71228,
-28739,71229,    2,71277,29229,71279,   59,71228,60221,71283,63823,71228,
-61747,71287,61585,71287,61475,71287,63185,71287,   39,71228,56555,71297,
-   15,71299,    6,71298,71301,71303,   14,71299,    7,71298,71307,71309,
- 1163,71228,19119,71313,   25,71228,61747,71317,63185,71317,25461,71317,
-61585,71317,70985,71228,71086,71327,70997,71327,71051,71330,71051,71327,
-70997,71334,38057,71229,    6,71338,44195,71341,60973,71229, 1179,71345,
-49213,71229,49217,71349,54619,71229,   11,71353,54655,71355, 1003,71229,
-60857,71359, 1007,71361,11995,71228,12025,71365,64569,71228,64587,71369,
-61989,71228,61747,71373,63185,71373,61585,71373, 8065,71229,   11,71381,
- 8067,71383,63777,71229,60857,71387,63779,71389,21918,71229,  987,71393,
-54336,71229,54339,71397,  989,71229,21605,71400,  987,71403,21890,71229,
- 1179,71407,49262,71229,49217,71411,54331,71229,   17,71414,54339,71417,
-25395,71228,25461,71421, 1293,71228,61475,71425,25433,71228,25461,71429,
-61005,71228,61475,71433,63014,71228,    5,71437,    7,71438,    7,71437,
-    5,71442,   10,71437,  524,71228,    0,71449,    3,71450,    3,71449,
-    0,71454,60856,71449,21904,71229,   25,71461,  809,71229,21605,71464,
-  713,71467,13755,71229,   17,71470, 9377,71473,65054,71229,63823,71477,
-  117,71229,21605,71480,   25,71483,21916,71229,  713,71487,13764,71229,
- 9377,71491,65037,71229,   17,71494,63823,71497, 1177,71229,21605,71500,
- 1179,71503,49229,71229,   17,71506,49217,71509,26867,71229,21605,71512,
-26865,71515,10161,71229,   17,71518,10159,71521,26868,71229,26865,71525,
-10162,71229,10159,71529, 1180,71229, 2975,71533, 1903,71533,19025,71533,
-33464,71229,34655,71541,34447,71541,33221,71541,33773,71541, 1207,71229,
-19027,71551, 3567,71551, 1973,71551, 3041,71551, 1921,71551,19049,71551,
- 9824,71229,71273,71565,53462,71229,71273,71569,59900,71229,71273,71573,
-60319,71229,71251,71577,60159,71229,71245,71581,60178,71229,71267,71585,
-59901,71229,71255,71589,60158,71229,71263,71593,60180,71229,71265,71597,
-25461,71229,   25,71601,25395,71601,25433,71601,61475,71229,63823,71609,
- 1293,71609,61005,71609,65808,71229,65513,71617,65791,71617,65407,71617,
-65171,71617,60835,71229,60318,71229,71275,71629, 9617,71629,19797,71229,
-  375,71635,20735,71229,47386,71229,20040,71229,20050,71229,61747,71229,
-63823,71647,   25,71647,61989,71647,63185,71229,   25,71655,63823,71655,
-61989,71655,61585,71229,63823,71663,   25,71663,61989,71663,20056,71229,
-  375,71671, 9825,71229,71255,71675,53463,71229,71255,71679,57562,71229,
-58846,71229,58372,71229,58758,71229,58762,71229,57224,71229,57284,71229,
-57278,71229,58760,71229,20686,71229,24738,71229,  305,71703,  713,71703,
- 1489,71703,   25,71703,10074,71229, 9377,71713,17573,71713,63823,71713,
-22766,71229,  305,71721,   25,71721,  147,71721,  713,71721,27672,71229,
-63823,71731,27995,71731, 9377,71731,62147,71229,   25,71739,  305,71739,
-  147,71739,  169,71739,  713,71739,31881,71229,63823,71751,27995,71751,
-31359,71751, 9377,71751,60221,71229,   59,71761,  653,71229,   11,71765,
- 9993,71229,17542,71229, 9936,71229,24734,71229,  305,71775,  713,71775,
-   25,71775,60834,71229,21350,71229,16129,71229,    3,71787,    2,71787,
-  842,71787,  843,71786,71793,71795,  843,71787,  842,71786,71799,71801,
-    3,71786,71791,71805,    2,71786,71789,71809,16966,71229,19480,71229,
-50522,71229,52740,71229,57380,71229,59108,71229,50478,71229,57252,71229,
-19986,71229,51036,71229,57576,71229,58112,71229,58362,71229,  903,71836,
-47640,71229,56555,71840,60179,71229,71249,71845,60181,71229,71247,71849,
-63015,71229,71441,71853,71445,71853,62905,71853,63041,71853,63047,71853,
-63215,71853,    6,71853,63205,71867,19687,71853,21127,71853,20843,71853,
-63049,71853,71447,71853,   11,71853,63033,71881,71437,71881,19917,71229,
-    9,71886,  525,71229,71453,71891,71457,71891,36729,71891, 1851,71891,
- 1885,71891,35635,71891,    2,71891,35633,71905,62095,71891,17711,71891,
- 4907,71891,61003,71891,71459,71891,60857,71891,  531,71919,71449,71919,
- 1413,71229,  331,71925,49713,71924, 1419,71229,56555,71930,58782,71229,
-  903,71934,  296,71229, 8861,71939, 1106,71229,18967,71943, 9617,71943,
-24095,71229,46863,71949,57522,71229,   11,71953,  903,71952,  587,71952,
-51004,71229,  483,71960,22956,71229,70471,71965,70753,71965,10159,71965,
-26865,71965,10111,71965,26715,71965,23709,71965,23713,71965,67425,71965,
-10113,71965,26719,71965,23715,71965,  587,71965,10107,71991,26625,71991,
-23651,71991,19475,71229,  483,71998,  918,71229,56555,72002,  922,71229,
-56555,72006,49713,72006,  668,71229,56555,72012, 1290,71229,    2,72017,
-35575,72019,35585,72017, 3621,72017, 1991,72017,60969,72017,62095,72017,
-17711,72017, 4907,72017,60857,72017, 1325,72037,58930,71229,    9,72040,
-52692,71229,  903,72044,25380,71229,    6,72049,38881,72051,38891,72049,
- 9927,72049, 9891,72049, 9895,72049,19687,72049,21127,72049,20843,72049,
-   11,72049, 9875,72069, 1447,71229,15705,72073, 9917,71229,20615,71229,
-  759,71229,17455,72081, 9195,71229, 1487,72085, 1471,71229,21605,72088,
-  305,72091,  713,72091, 1489,72091,   25,72091, 9805,71229, 1197,72101,
- 1275,72101,    9,72105, 1197,72100,71273,72109,10001,71229,   17,72112,
- 9377,72115,17573,72115,63823,72115,17455,71229,12377,72122,59961,71229,
-59619,72126, 1011,72126, 9617,72131, 1011,72127, 9565,72135,59619,72135,
-   89,71229,17455,72141,60797,71229,59381,72144,  165,71229,21315,72148,
-  587,71229,66971,72153,17455,72153,57522,72152,    9,72152,56555,72160,
-56555,72152,    9,72164,60857,72153,    9,72169, 1369,71229,39085,72173,
-21605,72172,20843,72177,21127,72177, 9927,72177, 9891,72177,19687,72177,
- 9895,72177,   11,72177, 9875,72191, 1275,71229,   17,72194, 4907,72197,
-17711,72197, 3621,72197, 1991,72197,62095,72197,60969,72197,60857,72197,
- 1325,72211,  483,71229,20035,72214,58742,72214,19475,72214,51004,72214,
-56555,72214,  903,72224,  903,72214,56555,72228,49713,72228,49713,72214,
-  903,72234,55839,71229,46863,72239,65061,71229,60857,72243,65063,72245,
-65067,72245,65071,72245, 7065,71229,18967,72253, 6789,71229,   11,72257,
- 6843,72259, 6885,72259, 6889,72259,11277,71229,46863,72267, 9935,71229,
- 1011,72270,20645,71229, 1011,72274, 3445,71229,  375,72279, 5045,71229,
-46863,72283,17104,71229,48643,72287,12614,71229,  375,72291,69872,71229,
-68155,72295,71116,71229,71013,72299,70985,71229,71013,72303,71051,72305,
-71051,72302,71013,72309,71051,71229,70985,72313,70997,72315,70985,72312,
-71013,72319,  482,71228,23717,72323,24522,72323,24447,72323,23939,72328,
-23939,72323,24447,72332,22956,72323,23651,72337,21605,72323,   17,72341,
-23939,72343,   17,72340,23651,72347,   17,72323,21605,72351,24447,72353,
-21605,72350,23651,72357, 1368,71228,    7,72361,    5,72362,72049,72365,
-72177,72365,    5,72361,    7,72370,72049,72373,72177,72373,72191,72361,
-72069,72361,   10,72361,72177,72383,72049,72383,27021,72361,24095,72361,
- 9195,72361,52915,72361,23651,72361,51435,72361,21605,72361,    9,72401,
-67297,72361,70097,72361,69729,72361,11277,72361, 5045,72361,10171,72361,
-53941,72361, 9755,72361,26907,72361, 4321,72361,27323,72361, 3833,72361,
- 9317,72361, 4295,72361,53215,72361, 1274,71228,    3,72435,    0,72436,
-72017,72439,72197,72439,    0,72435,    3,72444,72017,72447,72197,72447,
-72211,72435,72037,72435,60856,72435,72197,72457,72017,72457,  586,71228,
-39619,72463,51421,72463,57811,72463,59933,72463,59743,72463, 8093,72463,
- 3837,72463,42435,72463, 4287,72463,53703,72463, 4303,72463,42113,72463,
- 9839,72463,53487,72463, 9579,72463,  483,72463,  803,72494,  828,72463,
-  705,72463,  803,72463,  483,72502,  482,71229,66737,72507,36661,72507,
-62741,72507,68727,72507,68381,72507, 1274,71229,  587,71228,61747,72521,
-25461,72521,61475,72521,63185,72521,61585,72521,  483,71228,56555,72533,
-    6,72535,    5,72536,    7,72535,    5,72535,    6,72542,    6,72543,
-72541,72547,    6,72534,   15,72535,72551,72553,    7,72534,72545,72557,
-72539,72557,   14,72535,72557,72563, 1368,71229,55839,72567,51803,72567,
-54159,72567,54497,72567,  265,72567, 1275,71228,59914,72579,60221,72579,
-18708,72579, 9856,72579,53504,72579, 9805,72579,    9,72590,53391,72579,
-    9,72594,59875,72579,    9,72598,18693,72579,    9,72602,60369,72579,
-    9,72579,18693,72608, 9805,72608,59875,72608,53391,72608,  586,71229,
-   33,72619, 1447,72619, 1141,72619,  889,72619,  795,72619,  787,72619,
-  767,72619,  483,72633, 1505,71229,16937,72636,56555,72636,  581,71229,
-60857,72643, 1325,72645,  331,72645,  571,72645,  585,72645,   59,72645,
-16937,71229, 1505,72656,13947,71229,    2,72661,14217,72663,   11,72661,
- 9875,72667,16091,72667,13955,72667,20501,72667, 9919,71229,20623,71229,
- 9921,71229, 1196,71229,72103,72683,71256,72683,71258,72683,71260,72683,
-71255,72683,59875,72692,53391,72692, 9805,72692,59875,72683,71255,72700,
- 9805,72683,71255,72704,53391,72683,71255,72708,  154,71229,64148,71229,
- 1325,72715,   59,72715,  331,72715,  265,72715,52501,71229,  265,72725,
-  297,71229,18967,72729, 1107,71229,59960,71229,21105,72735,65513,72735,
-65791,72735,65407,72735,21549,72735,19625,72735,65171,72735,59619,72735,
-   15,72735,   88,71229,70177,72755,70176,72754,72757,72759,70176,72755,
-70177,72754,72763,72765, 1141,72755, 1447,72755,   33,72755,   11,72755,
-37409,72755,  972,71229,   59,72779, 1325,72779,  331,72779,27978,71229,
-60796,71229,59381,72789,31102,71229,62905,72793,68761,72793,70401,72793,
-67541,72793,  164,71229,36729,72803,68447,72803,70731,72803,67547,72803,
-54596,71229,44243,72813,20695,71229,  155,71229,20763,71229,  375,72820,
- 1197,71229,71273,72825,59875,72827, 9805,72827,53391,72827,53391,72824,
-71273,72835, 9805,72824,71273,72839,59875,72824,71273,72843,  375,71229,
-20763,72846,20836,71229, 1141,71229,15705,72853,   33,71229,15705,72857,
-27021,71229, 1487,72861,  959,71229,17455,72865,52915,71229, 1487,72869,
-   47,71229,17455,72873,59875,71229, 1197,72877,72683,72879, 1275,72877,
-    9,72883, 1197,72876,71273,72887,  253,71229,21605,72890,  305,72893,
-   25,72893,  713,72893,53391,71229, 1197,72901,72683,72903, 1275,72901,
-    9,72907, 1197,72900,71273,72911,   53,71229,21605,72914,  305,72917,
-   25,72917,  147,72917,  713,72917,27533,71229,   17,72926,63823,72929,
-27995,72929, 9377,72929,30749,71229,    7,72937,26970,71229,    7,72941,
-70864,71229,    7,72945,69849,71229,    3,72948,68155,72951,    3,72949,
-67577,72955,68139,72955,70979,72955,69275,71229,70573,72962,    7,72965,
-69513,71229, 1011,72968,    7,72971, 9780,71229,    7,72975,59381,71229,
-    2,72979,72789,72981,60797,72978,    6,72978,56555,72986,72981,72989,
-26625,71229, 1011,72992,    7,72995, 9731,71229, 1011,72998,    7,73001,
-69790,71229,    7,73005,   13,71229,32805,71229,    7,73010,33221,73013,
-34655,73013,33773,73013,34447,73013,   15,73011,34875,73023,    7,73011,
-34723,73027,   19,71229,   59,73031,   18,71229,65076,71229,    7,73037,
-65493,73039,    7,73036,65171,73043,65791,73043,65513,73043,65407,73043,
-   15,73037,65357,73053,   12,71229,68974,71229,  375,73059,71119,71229,
-    7,73063, 1011,71229,52387,73067,20762,73067,59961,73066, 9617,73073,
-20645,73066, 9935,73066,   17,73066,18967,73081, 9617,73081,    6,73066,
-    7,73067,18967,73088,26625,73066,    7,73093,18967,73067,    7,73096,
-   17,73097, 9731,73066,    7,73103,69513,73066,    7,73107,21315,73066,
-    7,73111,   15,71229,18967,73115,   17,73117,    3,73114,    3,73115,
-72567,73123,   17,73114,  265,71229,    9,73128, 8861,73131,60857,73129,
-    9,73135,65869,73128,  375,73139,   11,71229,60857,73143,    9,73145,
- 1275,73143,    9,73149,    9,73142,60857,71229,    7,73154,   59,73157,
- 1325,73157,  331,73157,  265,73157,    7,73155,  375,73167,  265,73155,
-  375,73171,12377,73154,    7,73175,18967,71229,    7,73179,25793,73181,
-41019,73181, 8495,73181,46863,71229,20035,73188,58742,73188,  903,73188,
-56555,73194,56555,73188,  903,73198,20035,71229,21183,73203,    7,73203,
-  331,73207,  483,73202,46863,73202,    9,73202,    7,73202,  375,73217,
-49713,71229,39085,73221,  136,73220, 1197,73220,  137,73220,  922,73220,
- 1413,73220, 1011,73220,    6,73234,  483,73220,  903,73238,  903,73220,
-  483,73242,    2,73220,    9,73246,44243,73247,    3,73220,    5,73253,
-    6,73255,    9,73253,    2,73221,73257,73261,73229,73261,73258,73261,
-29229,73261,72683,73261,73237,73261,73087,73261,    9,73261,73253,73276,
-73253,73261,    9,73280,    3,73221,73225,73285,73249,73285,73227,73285,
-73247,73285,    9,73293,    9,73220,    2,73296,73285,73299,    2,73297,
-73253,73303,   17,71229,10161,73306,10159,73309,54339,73307,54331,73313,
-49217,73307,49229,73317,54331,73306,54339,73321,49229,73306,49217,73325,
-65037,73306,63823,73329,13755,73306, 9377,73333,27995,73307,27533,73337,
-17573,73307,10001,73341,    7,73306,    3,73345,    7,73346,73307,73349,
-    1,73346,73351,73353,    1,73345,    3,73356,21604,73345,    0,73306,
-    3,73363,    0,73364,73307,73367,    6,73364,73369,73371,    6,73363,
-    3,73374, 1274,73363,  586,73306,    3,73381,    1,73382,    1,73381,
-    3,73386,21604,73381,60856,73306,    3,73393,    6,73394,    6,73393,
-    3,73398, 1274,73393,10001,73306,63823,73405, 9377,73405,17573,73405,
-27533,73306, 9377,73413,63823,73413,27995,73413, 9377,73307,13755,73421,
-27533,73421,10001,73421,63823,73307,65037,73429,10001,73429,27533,73429,
-60857,73307,63697,73437,63779,73437,73397,73437,73401,73437,73371,73437,
-73377,73437,    7,73437,63709,73437,35893,73437,37897,73437,38299,73437,
-73379,73437,73403,73437, 1275,73437,63679,73465,73363,73465,73393,73465,
-  587,73307, 1971,73473, 3507,73473,73385,73473,73389,73473, 5231,73473,
-73353,73473,73359,73473,    0,73473,21783,73473,23983,73473, 4625,73473,
-10603,73473,73361,73473,73391,73473,21605,73473,  713,73503,73345,73503,
-73381,73503, 1011,73306,18967,73511, 9617,73511, 1275,73306,72439,73517,
-72447,73517, 3621,73517, 1991,73517,    1,73517,73473,73527,73489,73517,
-60969,73517,62095,73517, 4907,73517,17711,73517,72457,73517,60857,73517,
- 1325,73543,72435,73543,21605,73306,23713,73549,23709,73549,26865,73549,
-26715,73549,    6,73549,73437,73559,73451,73549,10159,73549,10111,73549,
-26719,73549,10113,73549,67425,73549,70753,73549,70471,73549,23715,73549,
-  587,73549,26625,73581,10107,73581,23651,73581, 1011,73307, 9565,73589,
-    2,73306,36729,73593,68447,73593,67547,73593,70731,73593,    2,73307,
-36727,73603,68451,73603,37895,73603,36079,73603,35575,73603,   15,73306,
-21605,71229,26867,73616,26865,73619, 1179,73617, 1177,73623,  987,73617,
-  989,73627, 1177,73616, 1179,73631,  989,73616,  987,73635,  809,73616,
-  713,73639,  117,73616,   25,73643, 1489,73617, 1471,73647,  147,73617,
-   53,73651,26219,73617,    5,73616,    7,73657,    5,73658,73617,73661,
-    2,73658,73663,73665,    2,73657,    7,73668, 1368,73657,    3,73616,
-    7,73675,    3,73676,73617,73679,    4,73676,73681,73683,    4,73675,
-    7,73686,   16,73675,   10,73616,    7,73693,    2,73694,    2,73693,
-    7,73698, 1368,73693,  586,73616,    7,73705,    4,73706,    4,73705,
-    7,73710,   16,73705,44243,73617,48466,73617,  340,73617, 1397,73617,
-   53,73616,  713,73725,  305,73725,   25,73725,  147,73725, 1471,73616,
-   25,73735,  305,73735,  713,73735, 1489,73735,   25,73617,  117,73745,
-  253,73745, 1471,73745,   53,73745,  713,73617,  809,73755,  253,73755,
-   53,73755, 1471,73755,  253,73616,  305,73765,   25,73765,  713,73765,
-  305,73617,  253,73773, 1471,73773,   53,73773,    9,73617,46863,73780,
-  587,73617, 9381,73785, 9439,73785,73709,73785,73713,73785,25519,73785,
-73683,73785,73689,73785,    5,73785, 9383,73785,62077,73785,64317,73785,
-64815,73785,73691,73785,73715,73785,   17,73785, 9377,73815,73675,73815,
-73705,73815,   11,73617, 7979,73823, 8067,73823,73697,73823,73701,73823,
-73603,73823,73665,73823,73671,73823,    3,73823, 7981,73823,39747,73823,
-43027,73823,43837,73823,73673,73823,73703,73823, 1369,73823, 7971,73853,
-73657,73853,73693,73853,   17,73616,23709,73861,23713,73861,10159,73861,
-10111,73861,    2,73861,73823,73871,73839,73861,26865,73861,26715,73861,
-10113,73861,26719,73861,67425,73861,70471,73861,70753,73861,23715,73861,
-  587,73861,10107,73893,26625,73893,23651,73893, 1369,73616,72365,73901,
-72373,73901, 9927,73901, 9891,73901,    4,73901,73785,73911,73801,73901,
- 9895,73901,19687,73901,20843,73901,21127,73901,72383,73901,   11,73901,
- 9875,73927,72361,73927,46863,73617,    9,73932,    6,73616,62905,73937,
-68761,73937,70401,73937,67541,73937,    7,73616,    6,73617,62883,73949,
-68767,73949,64267,73949,62235,73949,38881,73949,73437,73949,73947,73949,
-72787,73949,    7,73617,25793,73967,41019,73967, 8495,73967,73937,73967,
-72793,73967,  265,73966,  265,73617,    6,73981,    7,73981,    6,73980,
-73985,73987,    7,73980,73983,73991,  903,71229,64148,73995,57522,73994,
-58782,73994,58362,73994,52501,73995,52692,73994,46863,73994,56555,74008,
-    9,73994,56555,74012,  483,73994,56555,74016,49713,74016,49713,73994,
-  483,74022,   15,73995,  483,74027,    7,73994,   59,74031, 1325,74031,
-  331,74031,    7,73995,60857,74038,59875,74039,  375,74039, 9805,74039,
-53391,74039,60857,73995,    6,74051,    7,74051,    6,74050,74055,74057,
-    7,74050,74053,74061,56555,73994,    7,74065,46863,74064,  483,74064,
-    9,74064,58742,71229,    7,74075,    9,74074,46863,74074,  483,74074,
-56555,71229,43502,74085,21036,74085,    6,74089,    6,74088,43503,74085,
-    6,74095,    6,74094,21037,74085,59634,74085,59635,74085,    6,74105,
-    6,74104,21104,74085,59645,74085,43838,74085,21548,74085,21526,74085,
-    5,74118,59644,74085,19624,74085,18967,74085,    5,74126,    6,74128,
-    6,74129,    6,74126,    5,74134,    6,74127,   14,74126,38305,74085,
-    2,74142,59619,74085,    2,74146,    5,74085,59961,74151,    6,74151,
-21526,74150,    6,74150,18967,74158,18967,74150,    6,74162,    6,74163,
-    2,74085,59619,74168,38305,74168,   14,74085,18967,74174,21527,74085,
-74155,74179,    9,74179,19625,74085,21549,74085,43839,74085,21105,74085,
-47640,74084,  922,74084,  918,74084, 1505,74084,  668,74084, 1419,74084,
-  483,74084,  903,74204,   11,74085,    9,74209,   15,74085,74139,74213,
-46863,74084,  903,74216,    9,74084,   11,74221,  903,74220,  587,74220,
-  587,74084,    9,74228,    6,74084,74191,74233,74189,74233,74187,74233,
-74113,74233,74087,74233,74101,74233,74103,74233,74171,74233,74169,74233,
-59619,74251,74149,74233,72981,74233,74185,74233,74145,74233,74173,74233,
-74213,74233,59381,74233,    7,74084,74093,74269,74099,74269,74123,74269,
-74109,74269,74159,74269,74089,74269,74095,74269,74105,74269,74151,74269,
-74111,74269,74115,74269,74117,74269,74157,74269,74121,74269,21105,74269,
-21549,74269,65513,74269,65791,74269,65407,74269,74125,74269,19625,74269,
-65171,74269,74175,74269,74131,74269,74129,74269,74137,74269,74177,74269,
-74161,74269,74165,74269,74163,74269,74141,74269,59619,74269,   15,74269,
-    6,74085,21036,74336,74269,74339,43503,74336,74269,74343,59635,74336,
-74269,74347,    5,74336,74269,74351,18967,74350,74269,74355,18967,74336,
-    5,74358,74269,74361,    7,74085,74091,74365,74097,74365,74107,74365,
-74155,74365,21183,74365,65493,74365,74133,74365,74167,74365,    9,74365,
-  959,74365,   47,74365,  759,74365,  903,74084,    7,74391,  483,74390,
-    9,74390,46863,74390,    9,71229,20035,74400,58742,74400,58930,74400,
-19917,74400,  903,74400,56555,74410,  265,74400, 8861,74415,  587,74400,
-56555,74418,56555,74400,   11,74423,  903,74422,  587,74422,  265,74401,
- 8495,74431,   11,74431,    3,74400,70177,74437,70176,74436,74439,74441,
-70176,74437,70177,74436,74445,74447, 1141,74437, 1447,74437,   33,74437,
-   11,74437,37409,74437,    3,74401,  113,74461,   11,74400,21522,71229,
-    7,74467,63452,71229,    7,74471,13673,71229,    7,74475,17049,71229,
-    3,74478,48643,74481,    2,74479,    3,74479,48637,74487,49581,74487,
-47813,74487,21315,71229,  165,74494, 1011,74494,    7,74499,16163,71229,
-    2,74503,72683,74505,73087,74505,16171,74505,  375,74503,64669,71229,
-    7,74515,  265,74517,12377,71229,  256,74521,17455,74520,    7,74520,
-  375,74527,    7,74521,  241,74530,  331,74531,60857,74520,    7,74537,
-  241,74521,    7,74540,10385,71229,  375,74545,70899,71229,    7,74549,
-18391,71229,    7,74553,18617,71229,    7,74557,12705,71229,    7,74561,
-70573,71229,69275,74564,    7,74567,    3,71228,74332,74571,72750,74571,
-71253,74571,72985,74571,72147,74571,71783,74571,71577,74571,67600,74571,
-45491,74571,42800,74571,59710,74571,74365,74593,74269,74571,59619,74596,
-72735,74571,59619,74600,59694,74571,60563,74571,  629,74571,  101,74571,
-  705,74571,  299,74571,  128,74571,  828,74571,  394,74571,48122,74571,
-70327,74571,66930,74571, 9606,74571,10374,74571,  113,74571,    9,74632,
-74465,74571,73153,74571,73031,74571,73057,74571,73131,74571,71939,74571,
-72733,74571,74415,74571,72145,74571,59381,74653,42134,74571,10291,74571,
-   17,74658,51992,74571,  375,74571,  241,74664,65869,74664,49713,74664,
-60796,74571,74213,74673,  256,74571,  803,74571,  483,74678,  483,74571,
-  803,74682,31103,74571,65869,74686,    6,74571,59619,74690,74365,74693,
-56555,74690,74213,74697,    7,74571,  241,74700,    7,74570,57811,74705,
-59933,74705,59743,74705, 9839,74705, 9579,74705,39619,74705,51421,74705,
- 4287,74705, 4303,74705, 8093,74705, 3837,74705,53487,74705,42113,74705,
-42435,74705,53703,74705,42613,74571,   17,74736,46863,74571,12377,74740,
-    9,74571,  113,74744,49713,74571,  375,74748,   17,74571,42613,74752,
-59619,74752,10291,74752, 9565,74752,41941,74752, 9565,74571,    7,74765,
-   17,74764,65869,74571,60796,74771,60797,74771,31103,74770,60797,74770,
-74773,74779,60796,74770,74775,74783,  375,74770,  241,74571,  375,74788,
-    7,74788,56555,74571,    5,74795,74269,74797,72735,74797,    6,74797,
-74365,74803,    6,74796,74269,74807,72735,74807,   14,74795,72735,74813,
-74269,74813,   15,74795,    6,74795,    5,74820,74269,74823,72735,74823,
-    7,74795,74803,74829,    6,74794,74213,74833,74819,74833,    7,74794,
-74807,74839,74823,74839,71229,74838,74807,74845,74823,74845,74797,74845,
-74813,74845,74813,74839,12377,74571,46863,74856,41941,74571,    7,74861,
-   17,74860,59619,74571,74269,74866,72735,74866,    6,74866,74365,74873,
-    6,74867,74269,74877,72735,74877,    7,74867,   17,74866,    2,71228,
-71233,74887,56555,74887,72129,74887,72127,74887,59619,74895,71235,74887,
-72790,74887,71627,74887,74153,74887,74155,74887,74365,74906,74372,74887,
-74158,74887,74269,74913,74279,74887,74350,74887,74269,74919,74353,74887,
-74266,74887,74150,74887,    6,74927,74365,74929,    6,74926,74269,74933,
-74269,74927,74287,74887,74336,74887,    5,74940,74269,74943,60261,74887,
-71629,74887,63737,74887,37179,74887, 9535,74887,63743,74887, 9537,74887,
-37185,74887,74264,74887,74174,74887,74269,74965,74315,74887,73073,74887,
-37887,74887,37205,74887,37235,74887,74085,74887,    5,74978,    6,74981,
-74365,74983,    6,74980,74269,74987,74269,74981,    6,74978,    5,74992,
-74269,74995,    6,74979,74213,74999,   14,74978,74269,75003,    5,74887,
-74336,75006,74269,75009,74085,75006,    6,75013,74365,75015,    6,75012,
-74269,75019,74269,75013,74085,75007,74233,75025,    6,75006,72735,75029,
-74085,75028,74269,75033,74269,75029,74085,75029,74233,75039,    7,75006,
-71853,75043,72049,75043,72177,75043,73901,75043,    6,75007,74365,75053,
-    7,75007,72131,74887,72753,74887,74335,74887, 9563,74887,74382,74887,
-   10,74887,72177,75069,72049,75069,71853,75069,73901,75069,   14,74887,
-74085,75079,74233,75081,74085,75078,74269,75085,72735,75079,74269,75079,
-72191,74887,72069,74887,73927,74887,71881,74887,64759,74887,63763,74887,
-63813,74887, 9559,74887,74213,74887,74233,75108,74365,74887,74155,75112,
-    9,75112,43123,74887,42606,74887,53318,74887, 9362,74887,27218,74887,
-28189,74887,74233,74887,59381,75130,74213,75130,72789,74887,59381,75136,
-64289,74887,26182,74887,28991,74887, 8804,74887,54289,74887,53802,74887,
- 8150,74887, 1290,74887,63679,75155, 9533,75155,37145,75155,  525,74887,
- 9533,75163,63679,75163,37145,75163,  922,74887, 1413,74887,73615,74887,
-73127,74887,73009,74887,73035,74887,73081,74887,71943,74887,72729,74887,
-73511,74887,41762,74887, 7971,74887,    9,75192,53517,74887,    9,75196,
-  483,74887,  903,75200, 9195,74887,    9,75204, 1275,74887,   17,75208,
- 9533,75211,37145,75211,63679,75211,27021,74887,    9,75218,    7,74887,
-    2,75223,60857,75225,71229,75227,    5,75222,71853,75231,72049,75231,
-72177,75231,73901,75231,75229,75231,    2,75222,73616,75243,75231,75245,
-21605,75243,71229,75248,75231,75251,71229,75243,21605,75254,75231,75257,
-    6,74887,74150,75260,74269,75263,74085,75260,    5,75266,74269,75269,
-56555,75261,71229,75272,74085,75261,74155,75277,    9,75277,    5,75260,
-72735,75283,74085,75282,74269,75287,74269,75283,74085,75283,74233,75293,
-75275,75283,   11,75261,21604,75299,21604,75298,21605,75299,75303,75305,
-21605,75298,75301,75309,52915,74887,    9,75312,    6,74886,23717,75317,
-24522,75317,24447,75317,23939,75322,23939,75317,24447,75326,22956,75317,
-23651,75331,   17,75317,21605,75335,24447,75337,21605,75334,23651,75341,
-21605,75317,   17,75345,23939,75347,   17,75344,23651,75351,    7,74886,
-27021,75355,24095,75355, 9195,75355,52915,75355,21605,75355,    9,75365,
-67297,75355,26907,75355, 9755,75355, 9317,75355, 3833,75355,23651,75355,
-51435,75355,27323,75355, 4321,75355,69729,75355,53215,75355, 4295,75355,
-70097,75355,53941,75355,10171,75355, 5045,75355,11277,75355,42155,74887,
-    9,75402,   19,74887,   12,74887,   11,74887,    9,75410,    9,74887,
-74365,75414,42155,75414,27021,75414,52915,75414, 9195,75414,25793,75414,
-53517,75414, 7971,75414, 8495,75414,41019,75414,   11,75414,   17,74887,
- 1275,75438, 9533,75441,37145,75441,63679,75441, 8495,74887,    9,75448,
-  903,74887,  483,75452,21605,74887,26219,75457,42810,75456,75056,75456,
-75057,75457,75463,75465,75053,75457,42810,75457,75057,75456,75056,75457,
-75473,75475,42811,75456,75471,75479,42811,75457,75461,75483,44243,75457,
-  375,75457,    6,75457,    7,75457,25793,75493,    6,75456,75493,75497,
-    7,75456,75491,75501,41019,74887,    9,75504,59381,74887,72789,75508,
-74233,75508,25793,74887,    9,75514,26625,74887,    6,75518,    7,75518,
-    6,75519,75523,75525,    7,75519,75521,75529, 9731,74887,    6,75532,
-    7,75532,    6,75533,75537,75539,    7,75533,75535,75543,69513,74887,
-    6,75546,    7,75546,    6,75547,75551,75553,    7,75547,75549,75557,
-    7,71228,73276,75561,27306,75561,73261,75561,    9,75566,24095,75561,
-52603,75561,53910,75561,55537,75561,20053,75561,20831,75561,19783,75561,
-64289,75561,27021,75561,25793,75586,  265,75587,  959,75561,60857,75593,
-58775,75561, 5045,75561,11277,75561, 4551,75561,70136,75561,10196,75561,
-  273,75561, 1477,75561,  281,75561,  948,75561, 1516,75561,  922,75561,
- 1413,75561,52915,75561,  265,75623,   47,75561,60857,75627,25793,75561,
-27021,75630, 9195,75561,  265,75635,  759,75561,60857,75639,   89,75561,
- 5019,75643,60857,75643, 1505,75561, 1011,75648,  587,75561,60857,75653,
-70573,75653, 1369,75561,43503,75659,  483,75561,  903,75662,  165,75561,
-  903,75666, 1141,75561,18967,75671, 1447,75561,18967,75675,    2,75561,
-61780,75679,    9,75679,60857,75682,54295,75679,70085,75679,53925,75679,
-10155,75679,11529,75679,60857,75679,    9,75696,    3,75561,73221,75701,
-    9,75703, 8063,75701,53667,75701,42361,75701,   33,75561,18967,75713,
-    2,75560,27021,75717,24095,75717, 9195,75717,52915,75717,21605,75717,
-    9,75727,67297,75717,23651,75717,51435,75717,27323,75717, 4321,75717,
- 9755,75717,26907,75717, 9317,75717, 3833,75717,69729,75717,53941,75717,
-10171,75717,70097,75717,53215,75717, 4295,75717, 5045,75717,11277,75717,
-    3,75560,57811,75765,59933,75765,59743,75765,39619,75765,51421,75765,
- 4287,75765, 4303,75765, 9839,75765, 9579,75765, 8093,75765, 3837,75765,
-42113,75765,53487,75765,42435,75765,53703,75765,  265,75561,53813,75796,
-69877,75796,10107,75796, 1011,75561, 1505,75804,54597,75805,21605,75561,
-    9,75811,  145,75811,  903,75561,  165,75816,  483,75816,54295,75817,
-    9,75561,73261,75824,69877,75561,  265,75828,10107,75561,  265,75832,
-53813,75561,  265,75836,    6,71228,63091,75841,63099,75841,63117,75841,
-25451,75841,53597,75841,42283,75841,61289,75841,61281,75841,62345,75841,
-    0,75841,    3,75860,71891,75863,72017,75863,72197,75863,73517,75863,
-    3,75861,62359,75841,60856,75841,72197,75877,72017,75877,71891,75877,
-73517,75877,72211,75841,72037,75841,73543,75841,71919,75841,19739,75841,
-61649,75841,61263,75841,61323,75841,20763,75841, 1011,75903, 1010,75902,
-75905,75907, 1010,75903, 1011,75902,75911,75913,25380,75841, 7971,75917,
-53517,75917,42155,75917,63015,75841,53517,75925, 7971,75925,42155,75925,
- 1369,75841,21605,75932,53517,75935,42155,75935, 7971,75935,    3,75841,
-    6,75943,   11,75945,71229,75947,    0,75942,71891,75951,72017,75951,
-72197,75951,73517,75951,75949,75951,    6,75942,73306,75963,75951,75965,
-   17,75963,71229,75968,75951,75971,71229,75963,   17,75974,75951,75977,
-    2,75841,60857,75981,   16,75983,   16,75982,   17,75983,75987,75989,
-   17,75982,75985,75993,    2,75840,23717,75997,24522,75997,23939,75997,
-24447,76002,24447,75997,23939,76006,22956,75997,23651,76011,21605,75997,
-   17,76015,23939,76017,   17,76014,23651,76021,   17,75997,21605,76025,
-24447,76027,21605,76024,23651,76031,21605,75841, 1369,76034,53517,76037,
-42155,76037, 7971,76037,   17,75841,37844,76044,75872,76044,75873,76045,
-76049,76051,37844,76045,75873,76044,75872,76045,76057,76059,37845,76044,
-76055,76063,37845,76045,76047,76067,    7,71229,74797,76071,74829,76073,
-  264,76071,    5,76071,    3,76078,    3,76079,    5,76070,75925,76085,
-63014,76085,75841,76089,75917,76085,25381,76085,75841,76095,75935,76085,
-76037,76085,  483,76085,60857,76102,75841,76105,60857,76085,  483,76108,
-75841,76111,32805,76070,34655,76115,33773,76115,34447,76115,33221,76115,
-32805,76071,34003,76125,33319,76125,34447,76071,35031,76131,65407,76071,
-65335,76135,65076,76070,65513,76139,65791,76139,65407,76139,65171,76139,
-65076,76071,65625,76149,65267,76149,20035,76070,  375,76155,74794,76071,
-59381,76159,74819,76159,74571,76071,56555,76165,59619,76167,56555,76164,
-59381,76171,12377,76070,  375,76175,49204,76071, 1369,76071,  241,76181,
-56555,76071,74571,76184,59381,76187,59381,76185,74571,76191,49205,76071,
-65869,76195, 1275,76071,  903,76199,60857,76070,   59,76203, 1325,76203,
-  331,76203,  265,76203,  903,76070,   59,76213, 1325,76213,  331,76213,
-56555,76070,74877,76221,74866,76221,65513,76221,65791,76221,65407,76221,
-74807,76221,74823,76221,74797,76221,21105,76221,75029,76221,75283,76221,
-21549,76221,19625,76221,65171,76221,75079,76221,74813,76221,59619,76221,
-74571,76254,74571,76221,59619,76258,   15,76221,74887,76263,21605,76070,
-73949,76267,  265,76071,63823,76271,63679,76271,72619,76271, 9377,76271,
- 9533,76271,37145,76271,    2,76070,76077,76285,76081,76285,55839,76285,
-54159,76285,54497,76285,51803,76285,73123,76285,76179,76285,65869,76301,
-  265,76285,    3,76070,76196,76307,67988,76307,   33,76307, 1447,76307,
- 1141,76307,76271,76307,76195,76307,65869,76320,    9,76307,46863,76307,
-65869,76326,65869,76307,76195,76330,46863,76330,    2,76071,76310,76337,
-76328,76337,76334,76337,76083,76337,   10,76337,    5,76337,    7,76348,
-    7,76337,    5,76352,55803,76337,54225,76337,54477,76337,51593,76337,
-67988,76337,76307,76364,64345,76337,76324,76337,73121,76337,72713,76337,
-76326,76337,65869,76376,    9,76337,76307,76380,60857,76337,71229,76385,
-76347,76387,76351,76387,76355,76387,  903,76337,46863,76337,76330,76396,
-65869,76396,76307,76400,76307,76396,65869,76404,76330,76337,46863,76408,
-65869,76337,76326,76412,46863,76412,76307,76416,76307,76412,46863,76420,
-76307,76337,67988,76424,    9,76424,46863,76424,65869,76430,65869,76424,
-46863,76434,    3,76071,    5,76438,76285,76441,  113,76439,46863,76438,
-76285,76447,65869,76449,76285,76439,67988,76453,    9,76453,46863,76453,
-65869,76458,65869,76453,46863,76462,   15,76071,74485,76467,73261,76467,
-46863,76071,    3,76472,76285,76475,65869,76477,    3,76473,76412,76481,
-65869,76481,76337,76484,76337,76481,65869,76488,65869,76070,  375,76493,
-70176,71229,  375,76497,    3,71229,70554,76500,    5,76501,    1,76505,
-71229,76507,    2,76509,59961,76505,74887,76513,    6,76505,76511,76517,
-73261,76517,    0,76500,75163,76523,  524,76523,74887,76527,75155,76523,
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- 1369,78774,77591,78777,65076,77751,   17,78780,65625,78783, 1275,77751,
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-    6,78859,78827,78861,78838,78857,    9,78857,78827,78866,78827,78857,
-    9,78870,    9,78797,    2,78875,78857,78877,    3,78875,    2,78874,
-78841,78883,    3,78874,   17,77751,65076,78889,65407,78891,32805,78889,
-34447,78895,20035,78889,58742,78889,65076,78888,65625,78903,32805,78888,
-34003,78907,  903,78889,56555,78910,56555,78889,  903,78914,65869,78889,
-    2,78919,    3,78919,    2,78918,    3,78918,18967,77751,  295,78929,
- 1108,78929, 1011,78929,    9,78934,    9,78929, 1011,78938,  483,78929,
-18967,78943,    5,78944,    5,78945,21036,78943,21037,78943,    4,78943,
-78949,78955,    5,78943,18967,78958,    4,78942,78961,78963,78947,78963,
-78951,78963,    5,78942,78953,78971, 1369,77751,12376,78974,12376,78975,
-12377,78974,78979,78981,77410,78975,77517,78985,45639,78975,46599,78989,
-12377,78975,78977,78993,36527,78975,68806,78975,77410,78974,77591,79001,
-45639,78974,46275,79005, 1011,78975,65869,79008,65869,78975, 1011,79012,
-  265,78974,17827,79017,56555,78975,    4,79021,    5,79021,    4,79020,
-    5,79020,60857,77751,  241,79030,    9,79033,    5,79030,    9,79037,
-    5,79031,   17,79041,70177,77751,38056,79045,38056,79044,38057,79045,
-79049,79051,38057,79044,79047,79055,  375,79045,27979,77751,  375,79061,
-    2,77750,68283,79065,68275,79065,36633,79065,36627,79065,39987,79065,
-66423,79065,66883,79065,66405,79065,66397,79065,67687,79065,78047,79065,
-    9,79087,36544,79065, 9875,79091,20501,79091,68177,79065, 9875,79097,
-20501,79097,64396,79065,    9,79103,    5,79065,60857,79106,    9,79109,
-35187,79065,   11,79112,20501,79115, 9875,79115,   11,79065,35187,79120,
- 9875,79123,20501,79123,60857,79065,    5,79129,   17,79131,    5,79128,
-    9,79135,    3,77750,40779,79139,63907,79139,73421,79139,73429,79139,
-64235,79139,67465,79139,63955,79139,39027,79139,38685,79139,64073,79139,
-    6,79139,    4,79161,78728,79139,78838,79139,78827,79139,    9,79168,
-78725,79139,    9,79172, 9934,79139,20644,79139, 4663,79139,  903,79181,
-17219,79139,  903,79185,12345,79139,    5,79189,    4,79188,79191,79193,
-    4,79189,    5,79188,79197,79199, 5123,79139,    5,79203,    4,79202,
-79205,79207,    4,79203,    5,79202,79211,79213,19667,79139,    5,79217,
-    4,79216,79219,79221,    4,79217,    5,79216,79225,79227,73306,79139,
- 9377,79231,63823,79231,40705,79139, 9377,79237,63823,79237,21036,79139,
-70177,79139,    9,79245,  341,79139,64669,79249,65869,79249,  253,79139,
-65869,79255, 8337,79139,    9,79259,  241,79139, 1471,79139,65869,79265,
-37325,79139,  903,79269,20103,79139,    9,79273,10219,79139,  903,79277,
-    4,79139,20501,79280, 9875,79280,    5,79139,    6,79287,78827,79289,
-78725,79289,18967,79286, 9935,79287,20645,79287,36773,79139,    9,79301,
-   53,79139,65869,79305,    5,79138,27979,79309, 8685,79309,41503,79309,
-26293,79309, 1369,79309,16381,79309,13325,79309,35843,79309,19513,79309,
- 8401,79309, 4137,79309,14625,79309, 4569,79309,37019,79309, 4063,79309,
- 3863,79309,37377,79309,20219,79309,10273,79309, 9955,79309,20697,79309,
-    9,79139,78725,79352,78827,79352,35187,79139, 1505,79359,   17,79139,
-71229,79362, 9377,79365,63823,79365,21315,79363,71229,79139,   17,79372,
-63823,79375, 9377,79375,18967,79139,20413,79381,    4,79383,    4,79382,
-20487,79381,20486,79381,79161,79381,    4,79393,    4,79392,79163,79381,
-  580,79381,49630,79381,79162,79381,46863,79381,    4,79406,    4,79407,
-  483,79381,    4,79412,    4,79413,49631,79381,  581,79381,    4,79381,
-20413,79422,79161,79422,46863,79422,  483,79422,    5,79381,79385,79433,
-79179,79433,79283,79433,79395,79433,79411,79433,79417,79433,20413,79433,
-    4,79380,79389,79449,79446,79449,79421,79449,79419,79449,79399,79449,
-79433,79449,20413,79460,20413,79449,79433,79464,    5,79380,79425,79469,
-79387,79469,79391,79469,79427,79469,79397,79469,79401,79469,79403,79469,
-79405,79469,79429,79469,79409,79469,79431,79469,79415,79469,79423,79469,
-20413,79495, 1369,79139,    5,79499,27979,79139,65869,79503,    9,79503,
-20501,79139,    4,79508,79433,79511,    5,79508,18967,79514,21037,79508,
-    4,79509,79517,79521,79243,79521,79295,79521,79469,79521,    5,79509,
-79519,79531, 9875,79139,    4,79534,    5,79534,    4,79535,    5,79535,
-    4,77750,    3,79545,    5,77750,10256,79549,37356,79549, 4745,79549,
- 1011,79555,17423,79549, 1011,79559,63550,79549,64489,79549,63493,79549,
-   17,79566,70803,79549,56555,79571,74752,79549, 8982,79549,74571,79549,
-   17,79578, 8861,79549,   17,79582,37844,79549,27979,79549,  483,79589,
-  253,79549,56555,79593, 8337,79549,  483,79597,  241,79549, 1325,79549,
-   17,79602,  331,79549,   17,79606, 1328,79549,  334,79549,   53,79549,
-56555,79615,20501,79549, 1011,79619,36773,79549,  483,79623, 9875,79549,
- 1011,79627, 1359,79549,  393,79549,    2,79549,37325,79634,10219,79634,
-    3,79549,  483,79641,35187,79640,10257,79641,37357,79641,   62,79549,
-   59,79549,   17,79652,20103,79549,  483,79657, 1471,79549,56555,79661,
-    3,79548,27979,79665, 8685,79665,26293,79665,41503,79665, 1369,79665,
-16381,79665,13325,79665,19513,79665,35843,79665, 8401,79665, 4137,79665,
-14625,79665, 4569,79665,20219,79665, 3863,79665, 4063,79665,20697,79665,
-37019,79665, 9955,79665,10273,79665,37377,79665,18967,79549,  165,79709,
- 1369,79549,38057,79713,35187,79549,    3,79717,    3,79716,   17,79549,
-63493,79722,74571,79722, 8861,79722, 1325,79722,  331,79722,   59,79722,
-37325,79549,    2,79736,    3,79736,    2,79737,    3,79737,10219,79549,
-    2,79746,    3,79746,    2,79747,    3,79747,    5,77751, 1196,79756,
- 1196,79757, 1197,79756,79761,79763,21604,79757,    6,79757,  587,79769,
-21605,79771,    1,79757,    3,79774,    3,79775,18967,79775,  483,79781,
-    1,79756,25381,79785,63014,79785,79773,79785,60857,79785,  483,79792,
-  483,79785,60857,79796,    6,79756,79787,79801,63015,79801,79785,79805,
-25380,79801,79785,79809,79789,79801,79783,79801,79799,79801, 1369,79801,
-21605,79818,79785,79821,79795,79801,21605,79801, 1369,79826,79785,79829,
- 1216,79757,  413,79757, 1197,79757,79759,79837,79546,79757,  903,79757,
-20735,79757, 9993,79757, 1275,79756,    9,79849,60857,79756,    9,79853,
-56555,79757, 1505,79856,21605,79757,21376,79757,  483,79757,21315,79864,
-58112,79757,21315,79757,  483,79870, 1505,79757,56555,79874,    2,79756,
-79767,79879,    7,79881,    6,79880,79883,79885,    6,79881,    7,79880,
-79889,79891,79777,79879,    7,79895,    6,79894,79897,79899,    6,79895,
-    7,79894,79903,79905,28337,79879,    3,79756,79861,79911,    7,79913,
-    6,79912,79915,79917,    6,79913,    7,79912,79921,79923,    2,79757,
-79779,79927,    7,79929,    6,79928,79931,79933,    6,79929,    7,79928,
-79937,79939,    3,79757,    1,79942,79879,79945,    7,79947,    6,79946,
-79949,79951,    6,79947,    7,79946,79955,79957,79545,79942,79545,79757,
-    2,79963,    3,79963,    2,79962,    3,79962,    9,79757,63493,79973,
-74571,79973, 8861,79973, 1325,79973,  331,79973,   59,79973,    3,77751,
-79112,79987,    9,79989,78847,79987,    9,79993, 1216,79987,12371,79987,
-    5,79999,    4,79998,80001,80003,    4,79999,    5,79998,80007,80009,
-  413,79987,  375,79987,60454,79987,60369,80017,  566,79987,35187,79987,
-79065,80022,    9,80025,79106,79987, 1011,79987,37407,79987,10287,79987,
-65869,79987,  165,80036,38132,79987,    9,79987,38057,80042,67642,79987,
-38057,79987,    9,80048,  165,79987,65869,80052,    5,79986,    4,79987,
-    5,79987,79065,80060,56555,80060,60369,80065,  483,80060,79065,79987,
-35187,80070,    9,80073,    4,80071,    5,80071,    4,80070,    5,80070,
-56555,79987,49630,80084,46863,80084,    4,80089,    4,80088,  581,80084,
-  580,80084,49631,80084,    4,80084,46863,80100,  483,80100,    5,80084,
-60369,80107,80091,80107,    4,80085,80095,80113,80099,80113,    5,80085,
-60327,80119,60719,80119,80097,80119,80087,80119,57901,80119,80093,80119,
-80103,80119,80105,80119,  483,80084,    4,80136,80119,80139,    4,80137,
-80107,80143,  483,79987,    5,80146,    2,77751,79538,80151,79541,80153,
-79514,80151,79521,80157,79024,80151,79027,80161,78958,80151,78963,80165,
-79021,80151,    5,80168,79027,80171,    5,80169,79023,80175,78943,80151,
-    5,80178,78963,80181,    5,80179,78955,80185,    1,80151,    7,80189,
-    4,80191,    4,80190,   16,80189,    4,80189,    7,80198,28714,80151,
-   17,80203,79286,80151,79541,80207,79521,80207,35187,80150,79289,80213,
-29229,80213,79352,80213,    9,80213,79139,80220,79139,80213,    9,80224,
-    9,80151,    4,80150,  265,80231,    5,80150,80193,80235,28337,80235,
-    4,80151, 1011,80241,    5,80151,80195,80245,80201,80245,79534,80245,
-79543,80251,79508,80245,79531,80255,79021,80244,79027,80259,78943,80244,
-78963,80263,79021,80245,79029,80267,78943,80245,78971,80271,80197,80245,
-28219,80245,30475,80245,23939,80245,79139,80244,79541,80283,79521,80283,
-21605,80244,   17,80289,79139,80151,35187,80293,    9,80295,    4,80293,
-    5,80293,79537,80301,79511,80301,79177,80301,79179,80301,79285,80301,
-79283,80301,    4,80292,80301,80315,    5,80292,79541,80319,79521,80319,
-80299,80319,21605,80151,    5,80326,   17,80329,    5,80327,    9,80333,
-    4,77751,79750,80337,79753,80339,79740,80337,79743,80343,78922,80337,
-78925,80347,78880,80337,78883,80351,78919,80337,    3,80354,78925,80357,
-    3,80355,78921,80361,78875,80337,    3,80364,78883,80367,    3,80365,
-78877,80371,    6,80337, 1369,80375,56555,80377,    1,80337,60857,80381,
- 1275,80383,    1,80336,58931,80387,19916,80387,80379,80387,18967,80387,
- 1275,80394, 1275,80387,18967,80398,    6,80336,19917,80403,80387,80405,
-80389,80403,80391,80403,58930,80403,80387,80413,80385,80403,80401,80403,
-  587,80403,56555,80420,80387,80423,80397,80403,56555,80403,  587,80428,
-80387,80431,43214,80337,79640,80337,79753,80437,79743,80437,    2,80336,
-  265,80443,    2,80337,  903,80447,    3,80337,67988,80450,67988,80451,
-67989,80450,80455,80457,79746,80451,79755,80461,79736,80451,79745,80465,
-78919,80450,78925,80469,78875,80450,78883,80473,78919,80451,78927,80477,
-78875,80451,78887,80481,67989,80451,80453,80485,79549,80450,79753,80489,
-79743,80489,38305,80450,79549,80337,    2,80497,    3,80497,79749,80501,
-79739,80501,79551,80501,79553,80501,79639,80501,79637,80501,    2,80496,
-80501,80515,    3,80496,79753,80519,79743,80519,80499,80519,38305,80337,
-    3,80526,    3,80527,    0,    7, 1517,80532, 2575,80535,  949,80532,
- 2599,80539, 1476,80532, 2269,80543,  280,80532, 2289,80547,  272,80532,
- 4437,80551,  121,80532,38343,80555, 3075,80555, 1913,80555,   76,80532,
- 3005,80563, 1899,80563,38337,80563,  123,80533, 3061,80571,   81,80533,
- 2997,80575,  367,80532, 7627,80579,  357,80532, 1927,80583,  397,80532,
- 7895,80587, 1516,80532,  948,80532,  107,80532, 2221,80595,  203,80532,
- 2215,80599,  215,80532, 4339,80603,   91,80532, 5045,80607, 1477,80532,
-  281,80532,  273,80532,  317,80532,14469,80617,   67,80532,11087,80621,
- 4643,80621, 2233,80621, 4625,80621,    9,80629,   53,80532, 2289,80633,
- 1471,80532, 2269,80637,80012,80533,77949,80641,79834,80533,77949,80645,
-79996,80533,78669,80649,79832,80533,78669,80653,78546,80533,77949,80657,
-78108,80533,78141,80661,77949,80661,77855,80533,77949,80667,  416,80533,
-17993,80671,  418,80533,17993,80675,  447,80533,17993,80679,  295,80532,
-  294,80532,   76,80533,38587,80687,26285,80533,26390,80533,26106,80533,
-  121,80533,38585,80697,26502,80533,32269,80533,31761,80533,32563,80533,
-31921,80533,31591,80533,78287,80533,78141,80713,78099,80713,77949,80713,
-23788,80533,27830,80533,27947,80533,41746,80533,26216,80533,41414,80533,
-26126,80533,41348,80533,26328,80533,41556,80533,29029,80533,43319,80533,
-  203,80533, 2211,80745,60857,80745,   85,80533, 4593,80751, 2229,80751,
-60857,80751,80229,80533,39823,80533,23013,80533,39229,80533,39783,80533,
-38673,80533,38675,80533,  107,80533, 5019,80773, 2219,80773,60857,80773,
-80228,80533,40956,80533,45411,80783,37899,80783,41493,80533, 1517,80533,
- 2573,80791,80591,80791,  949,80533, 2593,80797,80593,80797,  280,80533,
- 2287,80803,80613,80803, 1476,80533, 2267,80809,80611,80809,  272,80533,
- 4457,80815,80615,80815, 8673,80533, 8681,80533, 8800,80533, 8742,80533,
-41622,80533, 8740,80533, 8610,80533, 8642,80533, 8638,80533,39650,80533,
-42752,80533, 8717,80533,  413,80843, 1369,80842,  341,80842, 3785,80533,
-  413,80851, 1369,80850,  341,80850,  413,80532, 8717,80859, 3785,80859,
-13443,80859, 7627,80859, 7287,80859, 7895,80859,12755,80859, 1689,80859,
- 2701,80859, 1705,80859,77859,80859,78459,80880,78548,80859,78048,80859,
-77837,80887,78071,80859,18454,80859,78147,80859,78459,80859,77859,80896,
-  265,80859,77751,80900,77837,80903,77751,80901,77859,80907,18391,80859,
-  331,80910,  331,80859,18391,80914, 8495,80859,77751,80859,  265,80920,
-77837,80923,12745,80859,  375,80927,  457,80927,  375,80859,13977,80533,
-80021,80533,13767,80533, 4347,80533, 2213,80533, 2225,80533, 2231,80533,
-10079,80533,79501,80533,18715,80533,18579,80533,14313,80533,80149,80533,
-13945,80533, 4987,80533,14091,80533, 4619,80533,80069,80533,13913,80533,
- 4555,80533,16635,80533,16301,80533, 2575,80533, 2599,80533, 2289,80533,
- 2269,80533, 4437,80533, 7549,80533, 7589,80533,13785,80533,80015,80533,
-23755,80533, 1369,80996,39633,80533, 1369,81000,78284,80533, 7205,80533,
- 2561,80533, 2261,80533, 4423,80533, 2307,80533,79318,80533,10058,80533,
-79674,80533,26331,80533, 1369,81022,41559,80533, 1369,81026, 4329,80533,
- 1369,81030, 4311,80533, 1369,81034,10354,80533, 3786,80533, 4330,80533,
-27805,80533, 1369,81044,42731,80533, 1369,81048,10055,80533, 1369,81052,
-10351,80533, 1369,81056, 4312,80533,78645,80533,78324,80533,78458,80533,
-  375,81067, 3794,80533,78147,80533,  413,81073, 1369,81072,  341,81072,
-  215,80533, 4345,81081,60857,81081,79309,80533, 1369,81086,79665,80533,
- 1369,81090, 1477,80533,80543,81095,  281,80533,80547,81099, 1516,80533,
-80535,81103,  948,80533,80539,81107,13443,80533,16669,80533,43293,80533,
-26104,80533,41314,80533,26277,80533,41479,80533,13027,80533,  264,81124,
-  264,81125,  413,81125,  265,81124,81129,81133,  265,81125,81127,81137,
- 5127,80533,  264,81140,  264,81141,  413,81141,  265,81140,81145,81149,
-  265,81141,81143,81153,15309,80533,  412,81157,  413,81156,81159,81161,
-  413,81157,  412,81156,81165,81167,32294,80533,45314,80533,31857,80533,
-44925,80533,14053,80533,22897,80533,39143,80533,78107,80533,  413,81184,
-78141,81187,77949,81187,  413,81185,77859,81193, 1276,80533,17993,81197,
-  438,80533,17993,81201, 1278,80533,18759,81205, 1242,80533,18759,81209,
-22806,80533,  903,81213,    9,81213,39084,80533,  483,81219,39204,80533,
-41941,81223,22956,80533,26625,81227, 1109,80533,35187,81231,  294,80533,
-80683,81235,35187,81235, 1413,80533, 1471,81241,  295,80533,80685,81245,
-39749,80533,  483,81249,24095,80533,35187,81253,   11,81252,39787,80533,
-  241,81259,  903,81259,  587,81258,24236,80533,39846,80533,78459,80533,
-  413,81270,77949,81273,  413,81271,77859,81277,39232,80533,46169,81281,
-  510,80533,   11,81285, 1108,80533,   11,81289, 1216,80533,79987,81292,
-78669,81295,79757,81292,78669,81299, 1275,81292,18759,81303,   15,81292,
-18759,81307, 8808,80533,41376,80533, 7195,80533, 1141,80533,14315,81317,
-  959,80533,17125,81321,  253,80533,25793,81324,41019,81324, 8495,81324,
-  317,80533,15661,81333,14991,81333,17993,81333, 2899,81333,  273,80533,
-80551,81343, 8634,80533, 8677,80533,  331,80533,  413,81351,18391,81353,
-  413,81350,17993,81357, 8861,81351,63493,81351,74571,81351,15029,81351,
- 8495,80533,  586,81368,  586,81369,  587,81368,81373,81375,   11,81368,
-  253,81368, 1471,81368,   53,81368,  587,81369,81371,81387,  305,81369,
-  713,81369,   25,81369, 1369,81368,  257,81369,  257,81368,14011,80533,
-  257,80533,25793,81404,41019,81404, 8495,81404,  973,80533,20103,81413,
- 8337,81413,36773,81413,  341,80533,30091,81421, 8717,81420,20103,81421,
-36773,81421, 8337,81421, 3785,81420,78147,81420,   89,80533,10831,81437,
-10903,81437, 5019,81437,60857,81437,17125,81437,  567,80533,63493,81449,
-74571,81449, 8861,81449,  652,80533,60857,81457,  288,80533, 8861,81461,
-  265,80533,78670,81465,77859,81467,  413,81465,77751,81471,77837,81473,
-77751,81470,77859,81477,73154,81465,62059,81465,78107,81465,15029,81465,
- 4593,81465,11985,81465,78459,81465,80057,81465,79911,81465, 8861,81465,
-63493,81465,74571,81465,72152,81465,61718,81465,77751,81465,  413,81508,
-77859,81511,  413,81509,77949,81515,   17,81464,35187,81519,   11,81465,
-60857,81522,  587,81465,71229,81526,71229,81465,60857,81530,   11,81531,
-  587,81530,60857,81465,   10,81539,   10,81538,  305,81539,   11,81539,
-81543,81547,71229,81538,   11,81538,81541,81553,  587,81464,60857,81557,
-   11,81464, 8861,81561, 1011,80533,50785,81565,    9,81564,   11,81569,
-   11,81565,    9,81573,71229,81565,77387,81577,  903,80533,50959,81581,
-45149,80533,35187,81585,   11,81584,32103,80533,27021,81591,  241,81591,
-  903,81591,  587,81590, 7333,80533,  483,81601, 6789,80533,    9,81605,
-  903,81605,14073,80533,  241,81611,  903,81611,  587,81610,11277,80533,
-35187,81619,   11,81618,42707,80533, 3445,80533,  375,81627,10313,80533,
-79643,80533, 2621,80533,14229,80533,11571,80533, 5045,80533,35187,81641,
-   11,81640, 4971,80533,  241,81647,  903,81647,  587,81646, 7009,80533,
- 7497,80533, 7287,80533, 7845,80533, 7925,80533, 7895,80533, 7685,80533,
- 7671,80533, 7627,80533,14102,80533,11348,80533, 5096,80533, 5000,80533,
- 7533,80533, 4617,80533,  483,81683,13907,80533,  483,81687, 7563,80533,
-  264,81691,  264,81690,  265,81691,81695,81697,  265,81690,81693,81701,
- 7531,80533,  483,81705,79634,80533,80501,81709,79719,81709,79640,80533,
-  483,81715,42716,80533,42795,81719,42704,80533,  483,81723,10308,80533,
-36131,81727,10310,80533,  483,81731, 5227,80533, 5009,80533, 3461,80533,
- 2981,80533, 3049,80533,80061,80533,  483,81745,  240,80532,77859,81749,
-78459,81750,78089,81749,78147,81755,78305,81749,78231,81749,78277,81749,
-78445,81749,78564,81749,78613,81749,78558,81749,78548,81749,78071,81749,
-78387,81749,78459,81776,78425,81749,78459,81780,78434,81749,78147,81785,
-13103,81749, 5161,81749,13074,81749, 5150,81749,13057,81749,13051,81796,
- 5141,81749, 5137,81800,13051,81749,13057,81804, 5137,81749, 5141,81808,
-13092,81749,13045,81813, 5154,81749, 5133,81817,78048,81749,77837,81821,
-78459,81749,78387,81824,78425,81824,77859,81824,25793,81749,41019,81749,
- 8495,81749,78147,81749,48009,81749,49321,81749,49001,81749,78399,81749,
-  265,81847,78459,81849,  265,81846,78147,81853,  265,81749,13027,81856,
-13045,81859, 5127,81856, 5133,81863,13027,81857,13057,81867, 5127,81857,
- 5141,81871,78399,81856,78147,81875,77751,81856,77837,81879,77751,81857,
-78387,81883,78425,81883,77859,81883,77751,81749,  265,81890,77837,81893,
-23755,81749,39633,81749, 3785,81749, 8717,81749,79309,81749,79665,81749,
-10055,81749,10351,81749,27805,81749,42731,81749,26331,81749, 4329,81749,
-41559,81749, 4311,81749, 5127,81749,  265,81925, 5137,81927,  265,81924,
- 5133,81931,13027,81749,  265,81935,13051,81937,  265,81934,13045,81941,
- 1010,80532,27021,81945,24095,81945,52915,81945, 9195,81945,81565,81945,
-    9,81955,81569,81945,23651,81945,67297,81945,81289,81945,21605,81945,
-    9,81967,51435,81945, 4321,81945, 9755,81945,11277,81945, 5045,81945,
- 4295,81945, 3833,81945,69729,81945,26907,81945,70097,81945,27323,81945,
-53941,81945,53215,81945,10171,81945, 9317,81945,  264,80532,51421,82001,
-39619,82001,57811,82001,59743,82001,59933,82001, 8093,82001, 3837,82001,
-53703,82001, 4303,82001,42435,82001, 4287,82001,53487,82001, 9579,82001,
-42113,82001, 9839,82001,  241,82001,  375,82032,  394,82001,  299,82001,
-  375,82001,  241,82040,78399,80533,  264,82044,  264,82045,  413,82045,
-  265,82044,82049,82053,  265,82045,82047,82057,  240,80533,78397,82061,
-78459,82063,78099,82061,78147,82066,78264,82061,78283,82061,78260,82061,
-78262,82061,78661,82061,78599,82061,78619,82061,78601,82061,78675,82061,
-77837,82061,77949,82088,78673,82061,77950,82061,78118,82061,78459,82097,
-78670,82061,77859,82101,77949,82061,78147,82104,77837,82104,78141,82061,
-78147,82110,  413,82061,77751,82115,77837,82117,77751,82114,77859,82121,
-78147,82061,78099,82124,78141,82124,77949,82124,78107,82061,  265,82132,
-78459,82135,  265,82133,78147,82139,77751,82061,  413,82142,77859,82145,
-  413,82143,77949,82149,  265,82061,78107,82152,78459,82155,78107,82153,
-78141,82159,  902,80533,37663,82163,37599,82163,  265,80532,25793,82169,
-41019,82169,39787,82169,23755,82169,39633,82169, 8495,82169,78147,82169,
- 8717,82169, 3785,82169,79309,82169,79665,82169,27805,82169,42731,82169,
-10055,82169,10351,82169,26331,82169,41559,82169, 4329,82169, 4311,82169,
- 4555,82169,14073,82169, 4971,82169,21605,82169,65869,82215,38305,82169,
-56555,82219,  483,82219,  241,80532, 4437,82225,    7,82225,  265,82229,
-39787,82225,51615,82225, 4613,82225,12571,82225,14073,82225, 4971,82225,
-  375,82225,  510,82225,51937,82225,16683,82225, 4805,82225,    9,82225,
-  483,82254,  483,82225,    9,82258,38305,82225,  483,82263, 1010,80533,
-55211,82267,64345,82267,36256,82267,35187,82267,    9,82274,    9,82267,
-35187,82278, 1011,80532,10001,82283,  903,82285,27533,82283,  903,82289,
-79139,82283,  903,82293,82267,82283,    9,82296,82278,82283,81231,82283,
-21605,82283,  903,82305,    9,82283,82267,82308,  903,80532, 3549,82313,
- 2001,82313,21769,82313,10291,82313, 1011,82321,42613,82313, 1011,82325,
-79549,82313, 1011,82329,24095,82313,25793,82313, 8495,82313, 5045,82313,
-11277,82313,39787,82313,14073,82313, 4971,82313,21605,82313,  955,82349,
-    9,82349,65869,82349,38305,82313, 1011,82357,  483,82357,41019,82313,
-  264,80533,   53,82365, 1471,82365,  253,82365,72567,82365,76285,82365,
-76939,82365,77751,82364,  375,82379,  471,82365,  367,82365,  357,82365,
-  341,82365,  241,82389,  241,82365,    9,82393,  483,82393,  413,80533,
-78106,82398,78107,82399,82401,82403,78459,82403,78106,82399,78107,82398,
-82409,82411,78141,82411,77949,82411,79987,82398,77949,82419,79757,82398,
-77949,82423,78459,82398,77949,82427,  331,82398,17993,82431,  261,82398,
-17993,82435,77949,82399,78459,82439,17993,82399,  331,82443, 1275,82398,
-17993,82447,   15,82398,17993,82451,  375,80533,   53,82455, 1471,82455,
-  253,82455, 1369,82455,   11,82455,  261,80533,  413,82467,18391,82469,
-  413,82466,17993,82473,15029,82467,  264,82477,  265,82476,82479,82481,
-  264,82476,  265,82477,82485,82487,16531,80533,  483,82491,12745,80533,
-  264,82495,13129,82495,  413,82495,13119,82501,15503,82495,50535,82495,
-50929,82495,51081,82495,82231,82495,13171,82495,13133,82495,  264,82494,
-  265,82495,82519,82521,  265,82494,82497,82525,  375,82495,  257,82495,
-  264,82531,  265,82530,82533,82535,  264,82530,  265,82531,82539,82541,
-  566,80533,   53,82545,  253,82545, 1471,82545,   88,80533, 1369,82553,
- 1346,80533,55211,82557,28714,80533,28337,82561,60618,80533,60757,82565,
-    3,82565,60755,82569,  154,80533,37663,82573,43214,80533,43053,82577,
-  483,82577,43502,80533,80531,82583,46169,82583,   67,80533,11529,82589,
-11569,82589, 4610,82589,61780,82589,    9,82589, 4593,82598,60857,82598,
-60857,82589,    9,82604, 4593,82589,    9,82608,37845,80533,38305,82612,
-45411,82615,37899,82615,79926,80533,79987,82621,    4,82623,    5,82622,
-82625,82627,    5,82623,    4,82622,82631,82633,80058,80533,79757,82637,
-    2,82639,    3,82638,82641,82643,    3,82639,    2,82638,82647,82649,
-80244,80533,   17,82653, 1447,80533,14315,82657,   33,80533,14315,82661,
-  759,80533,17125,82665,   47,80533,17125,82669, 1471,80533,41019,82672,
-25793,82672, 8495,82672,   53,80533,25793,82680,41019,82680, 8495,82680,
-25793,80533,  586,82688,  586,82689,   11,82688, 1369,82688,  587,82688,
-82693,82699,  253,82688,   53,82688, 1471,82688,  587,82689,82691,82709,
-   25,82689,  713,82689,  305,82689,  257,82688,  257,82689, 1325,80533,
-74571,82723,63493,82723, 8861,82723,15029,82723,41019,80533,  586,82732,
-  586,82733,  587,82732,82737,82739,   11,82732,  253,82732, 1471,82732,
-   53,82732,  713,82733,   25,82733,  305,82733,  587,82733,82735,82757,
-  257,82732, 1369,82732,  257,82733,   59,80533,63493,82767,74571,82767,
- 8861,82767,15029,82767,79139,80533,80244,82777,80245,82777,80293,82777,
-    4,82782,80319,82785,    4,82783,80301,82789,80298,82777,80319,82793,
-21036,82777,21037,82777, 1216,82777,  413,82777,80245,82776,82779,82805,
- 1011,82777,  903,82808,21037,82776,82797,82813,80244,82776,82781,82817,
-21036,82776,82799,82821,65869,82777,    9,82777,  903,82777, 1011,82828,
-    4,82777,80293,82833,80315,82835,80293,82832,80319,82839,79549,80533,
-80450,82843,80451,82843,80497,82843,    2,82848,80519,82851,    2,82849,
-80501,82855,80498,82843,80519,82859, 1216,82843,  413,82843,80451,82842,
-82845,82867,  903,82843, 1011,82870,80450,82842,82847,82875,56555,82843,
-  483,82843, 1011,82843,  903,82882,    2,82842,80501,82887,79719,82887,
-    3,82842,80337,82892,  483,82893,    3,82843,82867,82899, 1369,82899,
-    2,82843,82875,82905,82895,82905,80497,82905,80515,82911,80497,82904,
-80519,82915,80519,82905,80437,82905,80489,82905,79587,82905,79721,82905,
-79645,82905,80337,82842,    3,82930,82905,82933,    3,82931,82887,82937,
-27533,80533, 1216,82941,  413,82941,21036,82941,21037,82941, 1011,82941,
-  903,82950,21037,82940,82947,82955,21036,82940,82949,82959,    9,82941,
-65869,82941,  903,82941, 1011,82966,42613,80533, 1216,82971,  413,82971,
-  903,82971, 1011,82976,  483,82971,56555,82971, 1011,82971,  903,82984,
-    2,82971,42667,82989,42791,82989,42709,82989,    3,82971, 1369,82997,
-    2,82970,42795,83001,    3,82970,  483,83005,10001,80533, 1216,83009,
-  413,83009,21036,83009,21037,83009,21036,83008,83017,83019, 1011,83009,
-  903,83022,21037,83008,83015,83027,65869,83009,    9,83009,  903,83009,
- 1011,83034,10291,80533, 1216,83039,  413,83039,  903,83039, 1011,83044,
-56555,83039,  483,83039, 1011,83039,  903,83052,    2,83039,37871,83057,
-36133,83057,35803,83057,    3,83039, 1369,83065,    2,83038,36131,83069,
-    3,83038,  483,83073, 1369,80533,26331,83076,25793,83076,23755,83076,
-27805,83076,40381,83077,41559,83076, 8717,83076,21036,83077,39633,83076,
-78147,83076,79309,83076,10055,83076,42731,83076, 3785,83076,79665,83076,
- 4329,83076,10351,83076, 4311,83076,38305,83076,41941,83115,41019,83076,
- 8495,83076,38305,83077,41019,83123,    5,83077,18967,83126,18967,83077,
-   11,83131,    5,83130,   17,80533,25367,83137,62984,83137,60857,83137,
-  265,83143,  241,83142,  241,83137,60857,83148,21605,83136,26625,83153,
-  265,83136,35187,83157,21605,83137,25793,83161,35187,83137,  265,83165,
-  587,80533,62984,83169,62518,83169,68807,83169,36526,83169,17125,83169,
-  265,83169,35187,83180,35187,83169,60857,83184,  265,83184,32103,83168,
-38305,83168,  483,83193,39787,83168,14073,83168, 4971,83168,  265,83168,
-60857,83203,  241,83169,60857,83206,60857,83169,  241,83210,35187,83210,
-   11,80533,25793,83216,41019,83216, 8495,83216,  265,83217, 8495,83225,
-45149,83216,21605,83216,  903,83231,    9,83231,24095,83216,11277,83216,
- 5045,83216,  265,83216, 8861,83243,    3,83217,  375,83247,38305,80533,
-76424,83251,54262,83251,54219,83251,76453,83251,42185,83251,42193,83260,
-42194,83251,42191,83251,42193,83251,42185,83268,80450,83251,37844,83251,
-37845,83251,44663,83277,38707,83277,43483,83277,37897,83277,80451,83251,
-80450,83250,83287,83289,  120,83251,   77,83251,32805,83251,54225,83251,
-54129,83298,76337,83251,76307,83302,76307,83251,76337,83306,54129,83251,
-54225,83310,  113,83251,   25,83314,  506,83251, 1216,83251,  413,83251,
- 1413,83251,37845,83250,45411,83327,83275,83327,37899,83327,37897,83250,
-83275,83335,65076,83251,37844,83250,    6,83340,83277,83343,83277,83341,
-80451,83250,83273,83349,   66,83251,   33,83353,   25,83251,  113,83356,
- 1281,83251, 1086,83251,  922,83251,  483,83251,  241,83366,  587,83367,
-  903,83366,  241,83251,  483,83374,  903,83251, 1011,83378,  483,83378,
- 1369,83250,41941,83385,  587,83250,  483,83389,  587,83251, 1011,83392,
- 1011,83251,  903,83396,   11,83397,  587,83396, 1275,83250,46169,83405,
-60857,83251,56555,83408,56555,83251,   11,83413,60857,83412,    2,83250,
-80531,83419,46169,83419,    3,83250,43053,83425,  483,83425,    2,83251,
-80435,83431,80495,83431,43461,83431,80529,83431,46599,83431,43425,83431,
-    3,83251,43837,83445,43027,83445,   11,83445,   25,83451,39747,83445,
-   11,83444,   33,83457, 1369,83445,   11,83251,    3,83463,  113,83465,
-    3,83462,   33,83469,   15,80533, 1216,83473,18617,83475,  413,83473,
-18391,83479,25545,83473,62942,83473, 1216,83472,18759,83487,  413,83472,
-17993,83491,60857,83473, 1011,83494,18967,83473,   17,83499, 1011,83473,
-60857,83502,    3,83472,37663,83507,    3,83473,37611,83511,38155,83511,
-35927,83511,21605,80533,27065,83519,27261,83519,21036,83519,21037,83519,
-27067,83519,27255,83519,73221,83519,55211,83519,36256,83519,51593,83519,
-55803,83519,64345,83519,54477,83519, 1216,83519,  413,83519,21037,83518,
-83525,83551,21036,83518,83527,83555,  247,83519,  934,83519,    9,83519,
-35187,83562,   11,83563, 1011,83519,  903,83568,   17,83518,26625,83573,
-   11,83518,  903,83577,    9,83577,   11,83519,  903,83582,  903,83519,
-27021,83587, 1011,83586,   11,83587,   11,83586,35187,83519,    9,83596,
-65869,83519,    5,83518,28337,83603,    5,83519,27021,83607,52915,83607,
- 9195,83607,20501,83607, 9875,83607,30475,83607,28219,83607,23939,83607,
- 1275,80533,43214,83624,43214,83625,43215,83624,83629,83631, 1216,83625,
-18617,83635,  413,83625,18391,83639,43215,83625,83627,83643,40675,83625,
-73994,83625, 1216,83624,18759,83651,  413,83624,17993,83655,71229,83625,
-  903,83658,  903,83625,71229,83662,38305,83624,46169,83667,    5,83624,
-55211,83671,    5,83625,53813,83675,10107,83675,69877,83675,  483,80533,
-  241,83683,    9,83685,    9,83682,   11,83689,   17,83683,  903,83693,
-   11,83683,    9,83697,    5,83682,   53,83701,  253,83701, 1471,83701,
-    5,83683, 1505,83709,    9,80533,80151,83712, 1011,83713,82267,83717,
-  241,83713,  483,83721,  483,83712,   11,83725, 1011,83712,81945,83729,
-   11,83729,    3,83712, 1369,83735,    3,83713,  483,83739,17025,80533,
-    5,83742,    2,83745,   17,83746,   17,83745,    2,83750,    2,83751,
-  164,83745,38057,83743,38057,83742,38056,83742,83759,83763,38056,83743,
-83761,83767,    3,83742,83749,83771,83753,83771,83757,83771,    3,83743,
-83755,83779,13737,80533,  375,83783,80151,80533,    9,83786,35187,83787,
-    9,83791,    5,83787,    9,83795,    5,83786,   17,83799,79987,80533,
-  413,83802,77949,83805,  413,83803,77859,83809, 1216,83802,78669,83813,
- 1216,83803,77857,83817,    4,83803,79549,83821,    2,83823,    3,83822,
-83825,83827,    3,83823,    2,83822,83831,83833,    4,83802,79757,83837,
-    2,83839,    3,83838,83841,83843,    3,83839,    2,83838,83847,83849,
-79757,80533,  413,83852,77949,83855,  413,83853,77859,83859, 1216,83852,
-78669,83863, 1216,83853,77857,83867,    2,83853,79139,83871,    4,83873,
-    5,83872,83875,83877,    5,83873,    4,83872,83881,83883,    2,83852,
-79987,83887,    4,83889,    5,83888,83891,83893,    5,83889,    4,83888,
-83897,83899,    3,80532,79231,83903,79237,83903,79365,83903,79375,83903,
-73413,83903,73405,83903,40793,83903,40787,83903,71751,83903,36001,83903,
-71731,83903,72115,83903,72929,83903,71713,83903,    7,83903,    4,83933,
-83519,83935,32103,83903,26106,83903,41746,83903,43005,83903, 8800,83903,
-64513,83903,63253,83903,62215,83903,59910,83903,41019,83903,   11,83956,
-60755,83903,60707,83903, 9852,83903,48975,83903,48245,83903,48451,83903,
-76271,83903,82267,83903,    9,83974,82278,83903,83157,83903,81231,83903,
-81235,83903,81519,83903,  386,83903,  347,83903,  510,83903,  273,83903,
-  281,83903, 1477,83903, 1516,83903,  948,83903,  165,83903,  903,84004,
-40704,83903,79139,84009,27533,84009,10001,84009,73307,83903,79139,84017,
-27533,84017,10001,84017,53500,83903,37595,83903,36049,83903,36539,83903,
-68851,83903,36041,83903,37573,83903,36275,83903, 1505,83903, 1011,84040,
-25793,83903,   11,84044,64397,83903,  483,84049, 8495,83903,   11,84052,
-60618,83903,  483,84057,  375,83903,  305,84060,  903,83903,  165,84064,
- 1011,83903, 1505,84068,  305,83903,  375,84072,    4,83903,56555,84076,
-  483,84079,    5,83902,57811,84083,59743,84083,59933,84083, 9579,84083,
- 9839,84083,51421,84083,39619,84083, 4303,84083, 4287,84083, 8093,84083,
- 3837,84083,42113,84083,53487,84083,53703,84083,42435,84083,48885,83903,
-  483,84115,   11,83903,25793,84118,41019,84118, 8495,84118,59875,84118,
- 9805,84118,53391,84118,    9,83903,82267,84132,  483,84132,38305,84132,
-79139,84139,10001,84139,27533,84139,38305,83903,    9,84146,79139,84149,
-27533,84149,10001,84149, 9805,83903,   11,84156,    5,84157,  483,83903,
-    9,84162,56555,83903,    4,84166,  483,84169,53391,83903,   11,84172,
-    5,84173,59875,83903,   11,84178,    5,84179,    2,80532,11087,84185,
-11307,84185,11713,84185,10439,84185, 2221,84185,10665,84185,11037,84185,
- 2233,84185,17777,84185, 2215,84185,18739,84185, 4339,84185,79091,84185,
-79097,84185, 5075,84185, 4643,84185,79115,84185,79123,84185,59811,84185,
-36619,84185,68291,84185,68299,84185,24213,84185,24059,84185,22149,84185,
-22143,84185,72667,84185,60839,84185,35665,84185,59819,84185,59869,84185,
-35487,84185,    7,84185,    4,84251,27306,84185,24095,84185,53910,84185,
-55537,84185,79280,84185,80301,84263,83607,84185,40455,84185,25313,84185,
- 8714,84185,32103,84185,26106,84185, 8800,84185,41746,84185,81569,84185,
-48009,84185,49001,84185,49321,84185, 4551,84185,81531,84185,81289,84185,
-81245,84185,83729,84185,10196,84185,70136,84185,10603,84185,    9,84305,
- 4625,84185,    9,84309,81565,84185,    9,84313,23983,84185,    9,84317,
-76501,84185,68176,84185,79065,84323,59787,84323, 9513,84323,36545,84185,
-79065,84331,59787,84331, 9513,84331,  759,84185,35187,84339,10107,84185,
-  265,84342,  241,84343,69877,84185,  265,84348,  241,84349,  305,84185,
- 8495,84354,  959,84185,35187,84359,28714,84185,77079,84185, 1011,84365,
- 1010,84364,84367,84369, 1010,84365, 1011,84364,84373,84375,   47,84185,
-35187,84379,48245,84185,48975,84185,48451,84185,11277,84185, 5045,84185,
-52603,84185, 8495,84185,   10,84394,   10,84395,  305,84394,   11,84394,
-84399,84403,   11,84395,84397,84407,  331,84185,71229,84411,79549,84185,
- 1011,84415,  265,84185,53813,84418,71229,84419,10107,84418,69877,84418,
-79757,84419,  903,84185,55211,84431,10291,84185, 1011,84435,25793,84185,
-   10,84438,   10,84439,27021,84438,   11,84438,84443,84447,   11,84439,
-84441,84451,42613,84185, 1011,84455, 1325,84185,71229,84459,    5,84185,
-27255,84463, 9287,84463,53167,84463,21605,84462,    4,84185,79139,84472,
-80301,84475,49475,84473,73066,84473,28715,84473, 1011,84473,71229,84484,
-71229,84473, 1011,84488,27693,84473,10047,84473,79287,84473,41019,84185,
-   10,84498,   10,84499,   11,84498,84503,84505,   11,84499,84501,84509,
-   59,84185,71229,84513,    4,84184, 8495,84517,41019,84517,25793,84517,
-49001,84517,49321,84517,48009,84517,  265,84517,78147,84517,23755,84517,
-39633,84517, 3785,84517, 8717,84517,41559,84517, 4311,84517,79665,84517,
-10351,84517,26331,84517,42731,84517, 4329,84517,79309,84517,27805,84517,
-10055,84517,    5,84184,27021,84563,24095,84563, 9195,84563,52915,84563,
-21605,84563,    9,84573,23651,84563, 9755,84563,51435,84563,67297,84563,
- 4321,84563,69729,84563,26907,84563, 9317,84563,53215,84563,27323,84563,
-53941,84563, 3833,84563,10171,84563,70097,84563, 4295,84563, 5045,84563,
-11277,84563,53813,84185,  265,84610,  241,84611,48885,84185, 1011,84617,
-   11,84185,25793,84620, 8495,84620,41019,84620,   17,84185,30091,84629,
-65869,84185,   15,84632,79065,84635,59787,84635, 9513,84635,  803,84633,
-38305,84185, 1011,84645, 1347,84645,   15,84185,28714,84650,28714,84651,
-65869,84650,79065,84657, 9513,84657,59787,84657,28715,84650,84655,84665,
-28715,84651,84653,84669, 9195,84185,  241,84673,35187,84673,21605,84185,
-27255,84679,    7,84678,    4,84682,    4,84683,84253,84679,   16,84678,
-55211,84679,  803,84679,    9,84679,   17,84678,  903,84679,65869,84679,
-    4,84679,84699,84705,    5,84679,84685,84709,84691,84709,27021,84709,
-    4,84678,    7,84716,84709,84719,    5,84678,84687,84723,52915,84185,
-35187,84727,  241,84727,27021,84185,35187,84733,  241,84733,25793,84732,
-79139,84185,80245,84740,    4,84740,80301,84745,    5,84740,80151,84748,
-    4,84741,80319,84753,84751,84753,80207,84753,80283,84753,    5,84741,
-84743,84763,    5,80532,80759,84767,    7,84767,    2,84770,    3,84770,
-83251,84775,    2,84771,84776,84779,84775,84779,83251,84782,83251,84779,
-84775,84786,    3,84771,84773,84791,83251,84793,27306,84767,24095,84767,
-52603,84767,53910,84767,55537,84767,84438,84767,84394,84767,84498,84767,
-81539,84767,25793,84767,27021,84814,84185,84814,64289,84767,84060,84767,
-81569,84767,83729,84767,81245,84767,81289,84767,70136,84767,10196,84767,
-  273,84767, 1477,84767,  281,84767,  948,84767, 1516,84767,81565,84767,
-    9,84847, 1505,84767, 1011,84850, 5045,84767,11277,84767, 4551,84767,
-  922,84767, 1413,84767,20831,84767,19783,84767,20053,84767,58775,84767,
- 9195,84767,  265,84873,   47,84767,60857,84877,  165,84767,  903,84880,
-41019,84767,84185,84884,27021,84767,25793,84888,  265,84889, 8495,84767,
-84185,84894,  959,84767,60857,84899,   89,84767, 5019,84903,60857,84903,
-  375,84767,83903,84908,  759,84767,60857,84913,  265,84767,53813,84916,
-69877,84916,10107,84916, 1011,84767, 1505,84924,54597,84925,  903,84767,
-  165,84930,  483,84930,54295,84931, 1447,84767,18967,84939, 1141,84767,
-18967,84943,    2,84767,61780,84947,    9,84947,60857,84950,54295,84947,
-70085,84947,11529,84947,10155,84947,53925,84947,60857,84947,    9,84964,
-    3,84767, 8063,84969,42361,84969,53667,84969,84185,84767,41019,84976,
- 8495,84976,25793,84976,83903,84767,  375,84984,   33,84767,18967,84989,
-    2,84766,27021,84993,24095,84993, 9195,84993,52915,84993,21605,84993,
-    9,85003,67297,84993, 9755,84993,51435,84993,23651,84993, 4321,84993,
-26907,84993,69729,84993,10171,84993,53941,84993,70097,84993,53215,84993,
- 9317,84993, 4295,84993,27323,84993, 3833,84993, 5045,84993,11277,84993,
-    3,84766,57811,85041,59743,85041,59933,85041,51421,85041,39619,85041,
- 4303,85041, 4287,85041, 9579,85041, 9839,85041, 8093,85041, 3837,85041,
-53487,85041,42113,85041,53703,85041,42435,85041,52915,84767,  265,85073,
-  587,84767,60857,85077,70573,85077, 1369,84767,43503,85083,  483,84767,
-  903,85086,21605,84767,    9,85091,  145,85091,10107,84767,  265,85096,
-    9,84767,53813,84767,  265,85102,69877,84767,  265,85106,    4,80532,
-83715,85111,80781,85111,83789,85111,    7,85111,    2,85118,83511,85121,
-    2,85119,82163,85125,83507,85125,82573,85125, 1368,85111,83511,85133,
-25525,85111,84498,85111,84438,85111,84709,85111,79634,85111,80501,85145,
-84394,85111,64513,85111,63253,85111,62215,85111,81539,85111,64397,85111,
-  483,85159,83787,85111,    9,85163,43214,85111, 8495,85111,84185,85168,
-  587,85169,  331,85111,60857,85175,79139,85111,  903,85179,  265,85111,
-60857,85183,79987,85183,10001,85111,  903,85189,41019,85111,84185,85192,
-  587,85193,27533,85111,  903,85199,   59,85111,60857,85203,    3,85111,
-    4,85206,85125,85209,38305,85206,    2,85111,    7,85214,83511,85217,
-79549,85214,80501,85221,49155,85215,62464,85215,43215,85215,  903,85215,
-60857,85230,60857,85215,  903,85234,42705,85215,10311,85215,79641,85215,
-84185,85111,25793,85244,41019,85244, 8495,85244,25793,85111,84185,85252,
-  587,85253, 1325,85111,60857,85259,    2,85110, 8495,85263,25793,85263,
-41019,85263,49321,85263,49001,85263,48009,85263,  265,85263,78147,85263,
-39633,85263,23755,85263, 3785,85263, 8717,85263,26331,85263, 4329,85263,
-79309,85263,10055,85263,41559,85263,27805,85263, 4311,85263,79665,85263,
-42731,85263,10351,85263,49205,85111,  903,85309,21605,85111,  903,85313,
-  155,85313, 1275,85111,43215,85319,77751,85111,38305,85111,    7,85324,
-    2,85326,    2,85327, 1368,85324, 1369,85324,    2,85325,85335,85337,
-    3,85325,85329,85341,85333,85341,84185,85341,    2,85324,    7,85348,
-85341,85351,    3,85324,85331,85355,79549,85111,80451,85358,    2,85358,
-80501,85363,    3,85358,80337,85366,    2,85359,80519,85371,85369,85371,
-80437,85371,80489,85371,    3,85359,85361,85381,    5,80533,83932,85385,
-83933,85385,64148,85385,64149,85385,    0,85385,56555,85395, 1369,85397,
-    7,85385,83903,85400,60857,85400,  265,85401,83903,85407, 1275,85401,
-60857,85411,    0,85384,63015,85415,25380,85415,85413,85415,21605,85415,
- 1369,85422, 1369,85415,21605,85426,    7,85384,85417,85431,25381,85431,
-85415,85435,63014,85431,85415,85439,85419,85431,85399,85431,85429,85431,
-85425,85431,  483,85431,60857,85450,85415,85453,60857,85431,  483,85456,
-85415,85459,54440,85385,83903,85385,    7,85464,27425,85385,53137,85385,
- 9365,85385,  803,85385,60857,85474,62310,85385,85206,85385,85125,85481,
-  241,85385,  483,85485,54295,85484,54295,85385,  241,85490,  483,85384,
-   53,85495,  253,85495, 1471,85495, 1275,85384,55211,85503,21605,85384,
-28337,85507, 1369,85385, 1011,85511,60857,85385,    7,85514,  803,85514,
-    2,85384,85389,85521,85393,85521,55211,85521,64345,85521,84132,85521,
-36256,85521,83903,85521,    9,85534,    9,85521,83903,85538,35187,85538,
-35187,85521,    9,85544,    3,85384,85467,85549,85387,85549,85403,85549,
-85401,85549,83903,85557,85391,85549,85517,85549,85405,85549,   53,85549,
- 1471,85549,  253,85549,76285,85549,76939,85549,72567,85549,  241,85549,
-  483,85579,    9,85579,    2,85385,    3,85385,  165,85587, 1108,85587,
- 1072,85587,76337,85587, 1011,85587,  483,85596,    9,85596,85111,85586,
-85125,85603,    9,85587, 1011,85606,  483,85587, 1011,85610,80151,85384,
-   17,85615,85111,85385, 1368,85618,    7,85618,    2,85623,    2,85622,
- 1369,85618,    2,85619,85629,85631,    3,85619,85627,85635,85121,85635,
-85217,85635,85621,85635,85133,85635,    2,85618,    7,85646,85635,85649,
-    3,85618,85625,85653,85125,85653,55211,85385,  265,85659,   17,85385,
-    3,80533,73221,85665,    9,85667,78796,85665,    9,85671, 8139,85665,
-53639,85665,42521,85665,85322,85665,    9,85681,55004,85665,85111,85665,
-77751,85686,    9,85689,42613,85664,  483,85693,10291,85664,  483,85697,
-79549,85664,  483,85701,85585,85665,    9,85705,    9,85664, 1369,85709,
-   15,85664,37663,85713,85125,85713,38305,85664,43053,85719,  483,85719,
-   17,85665,  903,85725,35187,85665,77751,85728,    9,85731,    4,85664,
-85125,85735,37663,85735,    5,85664,76939,85741, 1471,85741,   53,85741,
-  253,85741,76285,85741,72567,85741,  241,85741,    9,85755,  483,85755,
-    5,85665, 1505,85761,  922,85761,  918,85761,54597,85760,  903,85761,
-    9,85770,  483,85770,  483,85761,  903,85776,    9,85761,  903,85780,
-77751,85760,    9,85785,79756,85665,    9,85789,84185,85665,   16,85792,
-    7,85792,    4,85797,    4,85796,   17,85792,    4,85793,85803,85805,
-  483,85805,    5,85793,85801,85811,85797,85811,85795,85811,    4,85792,
-    7,85818,85811,85821,    5,85792,85799,85825,54597,85665,   11,85829,
-    5,85828, 1369,85665,    9,85835,18967,85665,    4,85839,  483,85841,
-77751,85665,35187,85844,    9,85847,    9,85845,85111,85851,85111,85844,
-    9,85855,    5,85845,   17,85859,    5,85844,    9,85863,77751,85664,
-  375,85867,79986,80533,  375,85871,    2,80533,80080,85875,80079,85877,
-80298,85875,80319,85881,80293,85875,    4,85884,80319,85887,    4,85885,
-80301,85891,11727,85875,11047,85875,17787,85875,18737,85875,78670,85875,
-77859,85903,10874,85875,77952,85875,77857,85909,    7,85874,83903,85913,
-85167,85875,85355,85875,85213,85875, 1216,85875,77751,85923,77877,85925,
-77751,85922,77857,85929,62310,85875,64483,85875,68896,85875,62464,85875,
-61780,85875,61688,85875,85159,85875,10831,85875,    9,85946,  413,85875,
-77751,85951,77837,85953,77751,85950,77859,85957,74571,85875,17178,85875,
-50959,85875,43400,85875,11177,85875,84077,85875,85913,85971,40675,85875,
-55546,85875,54440,85875,69196,85875,17125,85875,    9,85982,15029,85875,
-65869,85986,52169,85875,49155,85875,40453,85875,43305,85875,40005,85875,
-84767,85875,77751,86001,    9,86003,73994,85875,42613,85874,42795,86009,
-10291,85874,36131,86013,70135,85875,53919,85875,10195,85875,79842,85875,
-79757,85875,  903,86024,63493,85875, 8861,85875,80058,85875,80079,86033,
-54422,85875,11529,85875,54447,85875,52601,85875,  145,85875,35187,86044,
-36096,85875,79601,85875,79549,85874,80501,86053,79719,86053,64396,85875,
-85111,86059, 1011,85875,43215,86062,  241,85875,54295,86066,65869,85875,
-60857,86070,15029,86070,    9,85875,10831,86076,60857,86076,17125,86076,
-84076,85875,  483,86085,  803,85875,60857,86088,  903,85875,53813,86093,
-60857,86092,10107,86093,69877,86093,79757,86092,71229,86092,  265,85875,
-55211,86106,10371,85875,42787,85875,55211,85875,60857,86114,  265,86114,
-38305,85874,46169,86121,80531,86121,72818,85875,   11,85875,43215,86128,
-43316,85875,35187,85875,54295,86134,  145,86134,71229,85875,  903,86140,
-  155,86140,43215,85875,   10,86147,   10,86146,85111,86147, 1011,86146,
-84767,86147,   11,86147,86151,86159,   11,86146,86149,86163,  155,85875,
-71229,86166,    5,85874,55211,86171,64345,86171,84132,86171,36256,86171,
-83903,86171,    9,86180,    9,86171,83903,86184,35187,86184,35187,86171,
-    9,86190,    4,85875,80070,86195,80077,86197,80293,86195,80315,86201,
-80293,86194,80319,86205,  483,86195,83903,86209,80533,86194,    3,86213,
-    7,86195,86215,86217,    2,86217,86213,86221,79987,86194,80079,86225,
-83903,86194,  483,86229,77751,86195,79545,86233,    3,86235,    2,86234,
-86237,86239,    2,86235,    3,86234,86243,86245,77751,86194,79549,86249,
-    3,86251,    2,86250,86253,86255,    2,86251,    3,86250,86259,86261,
-    5,85875,85914,86265,85913,86265,83903,86268,49713,86265,49712,86264,
-86273,86275,49712,86265,49713,86264,86279,86281,53813,86265,64317,86265,
-64815,86265,62077,86265,10107,86265,69877,86265,   17,86265,83903,86297,
-35187,86297,60857,86264,85111,86303,65869,86265,    9,86307,  587,86265,
-60857,86311,83903,86265,85913,86314,79757,85874,79987,86319,    4,86321,
-    5,86320,86323,86325,    5,86321,    4,86320,86329,86331,80336,85875,
-79549,86335,    3,86337,    2,86336,86339,86341,    2,86337,    3,86336,
-86345,86347,83903,85875,   16,86351,    7,86351,86265,86355,    4,86354,
-    4,86355,   17,86351,    4,86351,    7,86364,    5,86351,86361,86369,
-    4,86350,86363,86373,  483,86373,    5,86350,86359,86379,86367,86379,
-86355,86379,86353,86379,54295,85875,  241,86388,35187,86388,60857,85875,
-    7,86395,    4,86396,    4,86397,86265,86397,   16,86395,   17,86395,
-  803,86394,55211,86394,  903,86394,65869,86394,    9,86394,    4,86394,
-86407,86419,    5,86394,86399,86423,86405,86423,85111,86423,    4,86395,
-    7,86430,86423,86433,    5,86395,86401,86437,77751,85875,  413,86440,
-77859,86443,  413,86441,77949,86447, 1216,86440,77857,86451, 1216,86441,
-78669,86455,    4,86441,79757,86459,    3,86461,    2,86460,86463,86465,
-    2,86461,    3,86460,86469,86471,    4,86440,79549,86475,    3,86477,
-    2,86476,86479,86481,    2,86477,    3,86476,86485,86487,79987,85875,
-80244,86491,80245,86491,80151,86491,    5,86496,    5,86497,    4,86491,
-80083,86503,80029,86503,80063,86503,86501,86503,    5,86491,80151,86512,
-    4,86490,80079,86517,86513,86517,86493,86517,86515,86517,86499,86517,
-    5,86490,86495,86529,86503,86529,77751,85874,86529,86535,86503,86536,
-86532,86535,86521,86535,86512,86535,86517,86545,86503,86535,86529,86548,
-86491,86535,    5,86552,86517,86555,    5,86553,86503,86559,85663,86535,
-85100,86535,    9,86535,84767,86566,84767,86535,    9,86570,    5,86535,
-86491,86574,86517,86577,86491,86575,86529,86581,80150,80533,80315,86585,
-80301,86586,80298,86585,80319,86591,80301,86585,80315,86594,80316,86585,
-80325,86585,80293,86585,    4,86602,80319,86605,    4,86603,80301,86609,
-85663,86585,85100,86585,    9,86585,84767,86616,84767,86585,    9,86620,
-    4,86585,80293,86625,80315,86627,80293,86624,80319,86631,    4,80533,
-79968,86635,79967,86637,80498,86635,80519,86641,80497,86635,    2,86644,
-80519,86647,    2,86645,80501,86651,78670,86635,77859,86655,77952,86635,
-77857,86659,    0,86635,21605,86663,  587,86665,    7,86635,  483,86669,
-18967,86671,    0,86634,19917,86675,58930,86675,86673,86675,56555,86675,
-  587,86682,  587,86675,56555,86686,    7,86634,58931,86691,86675,86693,
-86677,86691,86679,86691,19916,86691,86675,86701,86265,86691,86667,86691,
-86689,86691,86685,86691, 1275,86691,18967,86712,86675,86715,18967,86691,
- 1275,86718,86675,86721,29023,86635,25513,86635,24619,86635,84363,86635,
-84723,86635,84471,86635, 1216,86635,77751,86737,77877,86739,77751,86736,
-77857,86743,63610,86635,63291,86635,84321,86635,86028,86635,86030,86635,
-85960,86635,86437,86635,76631,86635,76601,86635,74682,86635, 8974,86635,
-  413,86635,77751,86769,77837,86771,77751,86768,77859,86775,63493,86635,
-  483,86778,85875,86778,29598,86635,25545,86635,59206,86635,15029,86635,
-56555,86790,62942,86635,80030,86635,79987,86635, 1011,86798,74571,86635,
-85875,86802,  483,86802, 8861,86635,85875,86808,  483,86808,79926,86635,
-79967,86815,85875,86635, 8861,86818,63493,86818,74571,86818,79263,86635,
-76816,86635,77387,86829,76500,86635,84185,86833,   11,86833,  903,86635,
-28715,86838,56555,86635,15029,86842,  483,86635,63493,86846,74571,86846,
- 8861,86846, 1011,86635,79987,86854,60857,86854,10073,86635,27855,86635,
-62278,86635,  587,86635,28715,86866,29026,86635,60857,86635, 1011,86872,
- 1347,86872,28715,86635,   11,86879,84185,86879,  903,86878,  587,86878,
- 1347,86635,60857,86888,    2,86634,    4,86893,    7,86895,    3,86634,
-85125,86899,37663,86899,    2,86635,79962,86905,79965,86907,80497,86905,
-80515,86911,80497,86904,80519,86915,79757,86904,79967,86919,71229,86904,
-77387,86923,77751,86905,79065,86927,    5,86929,    4,86928,86931,86933,
-    4,86929,    5,86928,86937,86939,77751,86904,79139,86943,    5,86945,
-    4,86944,86947,86949,    4,86945,    5,86944,86953,86955,    3,86635,
-85217,86959,85121,86959,86897,86959,86217,86959,85133,86959,    6,86959,
-    6,86958,    7,86958,86971,86975,    7,86959,86973,86979,60755,86959,
-35927,86959,38155,86959,37611,86959,71229,86958,84185,86991,   11,86991,
-79987,86634,79757,86997,    2,86999,    3,86998,87001,87003,    3,86999,
-    2,86998,87007,87009,80150,86635,79139,87013,    5,87015,    4,87014,
-87017,87019,    4,87015,    5,87014,87023,87025,84767,86635, 1368,87029,
-    7,87029,    2,87032,    2,87033, 1369,87029,    2,87029,    7,87040,
-    3,87029,87037,87045,    2,87028,87039,87049,    3,87028,87035,87053,
-87043,87053,87031,87053,71229,86635,    7,87061,    2,87062,    2,87063,
- 1368,87061, 1369,87061,    2,87060,77387,87073,87071,87073,    3,87060,
-87065,87079,87069,87079,84185,87079,   11,87079,    2,87061,77373,87089,
-76635,87089,    7,87088,87079,87095,72519,87089,    3,87061,87067,87101,
-85875,87101,77751,86635,  413,87106,77859,87109,  413,87107,77949,87113,
- 1216,87106,77857,87117, 1216,87107,78669,87121,    2,87107,79987,87125,
-    5,87127,    4,87126,87129,87131,    4,87127,    5,87126,87135,87137,
-    2,87106,79139,87141,    5,87143,    4,87142,87145,87147,    4,87143,
-    5,87142,87151,87153,79757,86635,80450,87157,80451,87157,80337,87157,
-    3,87162,    3,87163,    2,87157,79971,87169,79841,87169,79961,87169,
-87167,87169,    3,87157,80337,87178,    2,87156,79967,87183,87179,87183,
-87159,87183,87181,87183,87165,87183,    3,87156,87161,87195,87169,87195,
-77751,86634,87195,87201,87169,87202,87198,87201,87187,87201,87178,87201,
-87183,87211,87169,87201,87195,87214,87157,87201,    3,87218,87183,87221,
-    3,87219,87169,87225,    3,87201,87157,87228,87183,87231,87157,87229,
-87195,87235,80336,80533,80515,87239,80501,87240,80498,87239,80519,87245,
-80501,87239,80515,87248,80516,87239,80525,87239,80497,87239,    2,87256,
-80519,87259,    2,87257,80501,87263,    2,87239,80497,87267,80515,87269,
-80497,87266,80519,87273,77751,80533,79962,87277,    2,87279,79971,87281,
-    2,87278,79967,87285,80070,87277,    4,87289,80083,87291,    4,87288,
-80079,87295,79968,87277,79967,87299,80080,87277,80079,87303,80498,87277,
-80519,87307,80298,87277,80319,87311,80497,87277,    2,87314,80519,87317,
-    2,87315,80501,87321,80293,87277,    4,87324,80319,87327,    4,87325,
-80301,87331,81857,87277,78453,87277,80233,87277,80445,87277, 8453,87277,
-  273,87277,84484,87277,85230,87277,84531,87277,85277,87277,21522,87277,
- 1516,87277,38266,87277,  948,87277,20239,87277, 1477,87277,37095,87277,
-  281,87277,84473,87277, 1011,87370,85215,87277,  903,87374,80242,87277,
-80448,87277,80447,87277,  903,87382,80241,87277, 1011,87386,38057,87277,
-  903,87390,  165,87277,  903,87394,21315,87277, 1011,87398, 1505,87277,
- 1011,87402, 1216,87276,  412,87276,  413,87277,87409,87411, 1217,87277,
-87407,87415,  413,87276, 1216,87277, 1217,87276,87421,87423,  412,87277,
-87419,87427,12377,87277,  375,87277,57522,87277,67028,87277,67800,87277,
-  510,87277,  240,87277,  265,87443,77750,87445,77751,87444,87447,87449,
-77751,87445,77750,87444,87453,87455,  264,87277,84517,87459,85263,87459,
-81749,87459,  341,87459,  264,87276,  375,87469,  241,87277,81464,87472,
-81465,87473,87475,87477,81464,87473,81465,87472,87481,87483, 1011,87277,
-84473,87486,80241,87486, 1505,87486,21315,87486,  903,87277,85215,87496,
-80447,87496,  165,87496,38057,87496,  483,87277,65869,87506,    9,87506,
-    9,87277,56555,87512,  483,87512,56555,87277,    9,87518,65869,87518,
-65869,87277,  483,87524,56555,87524,    5,87277,84185,87531, 1011,87533,
-    2,87531,80532,87536,    3,87531,85215,87541,    3,87530,87539,87545,
-85263,87545,84517,87545,81749,87545,    2,87530,87533,87555,    4,87276,
-87531,87559,    2,87561,    3,87561,    2,87560,87565,87567,    3,87560,
-87563,87571,    3,87277,85111,87575,  903,87577,87559,87575,    0,87581,
-    1,87580,87583,87585,    1,87581,    0,87580,87589,87591,    4,87575,
-80532,87594,    5,87575,84473,87599,    5,87574,87597,87603,84517,87603,
-85263,87603,81749,87603,    4,87574,87577,87613,    2,87276,85663,87617,
-85100,87617,    9,87617,84767,87622,84767,87617,    9,87626,87575,87617,
-    4,87631,    5,87631,    4,87630,87635,87637,    5,87630,87633,87641,
-    2,87277,79962,87645,79965,87647,80497,87645,80515,87651,80497,87644,
-80519,87655,79962,87644,79967,87659,87559,87645,    7,87663,    6,87662,
-87665,87667,    6,87663,    7,87662,87671,87673,    4,87645, 1011,87677,
-77751,87679,77750,87678,87681,87683,77750,87679,77751,87678,87687,87689,
-    4,87644,  265,87693,77750,87695,77751,87694,87697,87699,77751,87695,
-77750,87694,87703,87705,    3,87276,  375,87709,87645,87709,    4,87713,
-    5,87713,    4,87712,87717,87719,    5,87712,87715,87723,    4,87277,
-80070,87727,80077,87729,80293,87727,80315,87733,80293,87726,80319,87737,
-80070,87726,80079,87741,    2,87727,  903,87745,77751,87747,77750,87746,
-87749,87751,77750,87747,77751,87746,87755,87757,    2,87726,  265,87761,
-77750,87763,77751,87762,87765,87767,77751,87763,77750,87762,87771,87773,
-    5,87276,87575,87777,    7,87779,    6,87778,87781,87783,    6,87779,
-    7,87778,87787,87789,87645,87777,    0,87793,    1,87792,87795,87797,
-    1,87793,    0,87792,87801,87803,87727,87777,    2,87807,    3,87807,
-    2,87806,87811,87813,    3,87806,87809,87817
-};
-
-const int s_nDataSize2 = 24772;
-unsigned int s_Data2[24772] = {
-    3,    9,    5,    6,  119,  796,  636,  113,  449,  235,  239,  105,
-  789,   96,  439,  624,  630,  230,  111,  110,  787,  786,  628,  627,
-  116,  115,  436,  435,  227,  226,   93,   92,  792,  791,  100,   99,
-  443,  442,  633,  632,  128,  183,  234,  178,  233,   85,  762,  203,
-   32,  742,  356,  169,  152,   12,  672,  741,  127,  168,  671,  740,
-   50,  352,  149,   64,  414,  197,  276,  751,  722,  396,  275,  434,
-  721,  785,  274,  795,  720,  448,  273,  719,  474,  758,  718,  392,
-  269,  748,  715,  400,  118,  794,  635,   81,   76,  750,  747,  597,
-  595,   91,  433,  225,   74,  745,  680,  565,  268,  476,  271,  761,
-  350,  678,  345,  567,  757,  471,  470,  563,  469,  561,  551,  461,
-  465,  706,  650,  714,  261,  332,  641,  708,  676,  542,  260,  458,
-  755,  314,  325,  658,  288,  349,  760,  654,  656,  564,  562,  644,
-  552,  642,  550,  259,  252,  254,  322,  311,  329,  109,  784,  626,
-   43,  395,  182,   55,  399,  186,  104,  447,  238,   41,  389,  173,
-  175,  193,  485,  580,  579,  734,   25,  733,  528,  548,  310,  546,
-  344,  526,  308,  560,  342,  525,  556,  558,  523,  524,  522,  520,
-  307,  622,  623,  431,  618,  620,  429,  617,  305,  615,  519,  518,
-  516,  778,  304,  250,  302,  776,  216,  218,  774,  215,  301,  300,
-  514,  771,  513,  541,  298,  512,  297,  535,  321,  508,  510,  319,
-  538,  539,  533,  507,  509,  296,  146,  705,  531,  537,  317,  557,
-  341,  143,  697,  555,  544,  339,  613,  426,  217,  773,  619,  428,
-  221,  780,  611,  610,  424,  609,  769,  423,  422,  768,  213,  625,
-  783,  670,  732,  782,  578,  577,  731,  484,  387,  668,  669,  171,
-  172,  375,  191,  575,  729,  482,  446,  667,  237,  574,  728,  481,
-  398,  666,  185,  573,  727,  480,  394,  665,  181,  572,  695,  694,
-  140,  738,  372,  246,  690,  689,  136,  244,  369,  767,  212,  766,
-  702,  701,  367,  257,  700,  315,  726,  382,   59,  407,  190,   52,
-  366,  157,   65,  417,  201,   63,  413,  194,  686,  692,  243,  248,
-  699,  256,  150,  354,  365,  364,  353,  156,  685,  348,  242,  661,
-  192,  409,  376,  378,  411,  164,  569,  717,  473,  391,  660,  177,
-  189,  406,  374,  371,  405,  162,  200,  416,  363,  362,  415,  155,
-  313,  324,  361,  360,  331,  312,  328,  381,  316,  330,  359,  323,
- 4596,24359,41366,41344, 4857,37718, 4594,24357, 4846,37706, 4678,26650,
- 4592,24355, 4844,37704, 4591,24354, 4843,37703, 8816,41900,22056,15422,
- 7473, 8464,42932, 8814,41898, 6804,20483,12853, 8462,42930, 8809,42808,
-21978,15306, 7385, 8456,42895, 8807,41327,21965,15246,15293, 7372, 8454,
-42893, 3212,20457,36983, 3516, 6187, 6184,20453,29352,10563,10421, 2593,
-20452, 6183, 5637, 2589, 6182, 2645, 2619, 2283,26212,20199, 2269,12513,
- 2614, 2661,18113, 2288, 4777,35226, 4775, 4774, 4773,42536, 2198,32674,
-32753, 8833, 8780,40027,43084,39938,43445, 8548, 8831,24157,26148,31156,
-29057, 8503, 8771, 8777,24156,26147,36425,33823,40025,43073,43081,39936,
-43443,22500,18803, 8829, 8770,40023,43072,39934,43438, 8546, 8827,24155,
-26146,31154,29044, 8501, 8765,24153,26140,36424,33800,33820,40022,43066,
-39933,43435,22498,18801,43065,40020,43434,39931,18800,22493, 8764, 8499,
-26128,24151,33799,36411, 8826, 8544,26120,24146,29025,31141, 8762, 8824,
-43063,40019,43432,39929, 2287, 2286,21235,26865,13688,26627,13207,20826,
- 2106, 2073, 4667, 4378, 1966, 4054,13206,20825, 2159, 2168,18699,39853,
-10355,39675, 2167,39852,13205,18520, 2158,39674,20824,20823,42653,42280,
-18519,10116,21390,13926, 2032,42279, 1932,42652, 2166, 2157,42651, 5184,
-42278, 5035, 2070,21389,20822, 4377,13925,13204, 5034, 5183,13924,21388,
- 5033, 5182,39673,42650,39851,42277, 4221, 5142,18518,21387,18698,20821,
- 4220, 4982,10115,13923,10354,13203,39850,42276,39672,42649,20820,18697,
-42648,39671,42275,39849,18517,21386, 4376, 5032,13202,10353,13922,10114,
- 4375, 5181,20819,18696,21385,18516, 4981, 5141,42274,39848,42647,39670,
- 5031, 5180,42646, 5140,42273, 4980, 4219,21384,20818, 4374,13921,13201,
- 5135, 5174,39653,42257,39831,42630, 5172, 5133,24141,26112,31138,29023,
- 5026, 4969, 4975,24140,26111,36408,33796,39651,42249,42254,39829,42628,
-21363,18686, 5139, 5179,39669,42272,39847,42645, 5178, 5138,18515,20817,
-18695,21383, 5030, 4979,10113,13200,10352,13920,39668,42271,39846,42644,
-21382,18694, 5170,24183, 5169,36516, 5168,39992, 5167,22753, 5166,21404,
- 5165,39867, 5164,21361, 4045,26846, 4044,21215, 5162,39827, 5191,21359,
- 5190,39825, 5189, 5160, 5159, 4043, 5157, 5024, 1891,42248, 1847,42621,
- 4193, 4341,18472,20750, 1681,21357,10093,13145,13869, 2660, 7371, 2659,
- 2658,13144,20749, 1846, 1890,39824,18682,39649,10344, 1872,39823,18507,
-13143, 1889,39648,20748,20747,42620,42247,10107,18506,21356,13868, 1871,
-42246, 1843,42619, 2205,26240,26211, 2200,24249,24232, 2478, 2517,36625,
-34562,31491,29570, 2507, 2558,34076,37229,29433,31635, 8704, 8600,35491,
-38460,30352,32396,28999, 8171, 8335,38314,35364,32268,30297,30134, 8698,
- 8591,35488,38453,30345,32384,32389, 8166, 8333,38305,35357,32255,30292,
- 2285, 7325, 1898,14098, 1896, 1895, 1894,39359,24288,41706,41800,20017,
-37217,39357,36575,18022,26236,20013,24246,39355,39925,18013,18779,20001,
-22482,39395,20196,39397,20208,40017,39923,20064,42324,12370,42658,19065,
-18776,41387,41382, 9904,21392,10687,10412,41365,41360,18055,18053,39685,
-20893,39857,18775,43056,43431,42334,18524,42660,22479,40016,39922,14502,
-15946,39376,39374,20062,20060,21649,22478,39380,39378,12368,18702,43055,
-43430,18057,39680, 9906,39855,39991,21351,22752,39816,39990,39815,22751,
-21350,39639,39814,33754,42230,28989,42602,18468,18677,24118,26056,31087,
-28988,10090,10312,10318,24117,26055,36340,33753,39637,20700,20705,39812,
-18675,42228,42600,42219,42225,18464,42598,21348,39635,39810,13101,13106,
-13844,26054,24116,33752,36339,20699,21346,26053,24115,28987,31086,42218,
-42595,36338,39633,31085,39808,39667,39845,39666,39844,39665,39843,18693,
-18692,10351,10350,18514,39842,13199,13198,10112,39664,20816,20815,10111,
-18513,42270,42643,13919,21381,13918,42269,21380,42642,39806,21403,21344,
-39866,39805,39865,21343,21402,39804,21342,21175,26830,39802,21173,26826,
-21340,39346,24061,39338,32626,39333, 9843,39332,39331, 9814,39328,15936,
-39183,11746,19744,25614,39182,39181,39180,19836,42268,11903,42641,17932,
-17931,40961,40960, 9771,21379, 9770, 9769,40959,40958,17930,17929,39663,
-20814,39841,17928,40957,40956,42267,18512,42640,19835,39179,39178,11902,
-11901,39177,39176,19834,19833,19832,19831,39175,39174,11900,18691,40955,
-40954,17927,39662, 9768,39840,39173,19830,11899,17926,40953,13197, 9767,
-40952,20813, 9766,17925,40951,11898,19829,39172,11897,42266,19828,19827,
-42639,11896,40950,21378,13917,39171,39170,39169,39168,14088, 3310, 3309,
-35263, 2276,26305, 5245, 6267, 5248, 5445,10636,10624, 5401, 7751, 5390,
- 5674, 2548, 5410, 3350, 3931, 3971, 3960, 6123,28071,22800, 8025,27598,
-16338, 7478,22061,15427, 3847, 3840, 3822, 5835,26825,21172, 7148,26571,
-13617, 6808,20693,13100, 3469, 3729, 3618, 6021,27993,22666, 7965,27534,
-16152,16158, 7368,21963,15285,15291, 3513, 3757, 3655, 6026,28010,22688,
- 7970,27539,16193, 7376,21969,15297, 3722, 3611,27986,22657,22659,16147,
- 3608, 3610,25575,25569,25573,25568, 2720, 2722,23945,23941,23943,23940,
- 3606,26233,26200, 2718,24244,24224, 3603,22654,16143, 2716,22466,15931,
- 8720, 2547, 2499, 2498,35234, 8719,35524, 7050,35233, 6181,20028, 5622,
-20027, 5610, 7023,23939,24648,23938,24484, 5952, 7920,22462,25567,27390,
-15928,25566,27757, 5620, 7027,36388,33781,31116,29009, 5970, 7936,33795,
-36407,29022,31137, 5612, 7025,24121,24653,24129,24494, 5960, 7922,26081,
-27412,26074,27796, 5601, 7014, 6501, 5946,27753,22458, 7917,27387,15926,
- 4317, 7284,21850,15156, 5825, 5940, 5824, 5794, 7123, 6732, 6038,28015,
-22709, 7982,27551,16225, 7395,21983,15311, 8718, 5673, 7049, 8717,35523,
-23937,21560,14272,15352,40871,22739,16272,23936,22733,16263,14776,40870,
-21558,14265,23935,21474,14087,15148,40869,22445,15906,23934,41714,40868,
-34075,23933,34079,40867,41730,23932,41537,31827,37396,23931,41448, 4494,
-23930,41503,23929,26451,38349,32305,23928,24323,23927,40866,31785,37351,
-23925,40858, 4472,23924,40862,23923,40853,38197,23920,23919,38475,23914,
-23913,38152,23908,40840,28843,38481,23905,23904,23903,23902,23901,23900,
-23899,23898,23897,23896,40839,40838,23895,23894,40837,40836,23893,40835,
-23892,23891,40834,40833,23890,40832,23889,23888,40831,40830,23887,40829,
-23886,23885,40828,40827,23884,23882,40823,40826,40822,23879,23878,40819,
-40818,23877,23876,23922,23875,23874,32490,32499,23873,23872,32793,23871,
-17197,23870,23869,29043,33819,24320,40817,29655,38507,24317,24309,28839,
-33590,23867,23868,23865,40816,25558,25555,23866,40815,23860,23864,21472,
-14085,40814,22439,15900,25548,23863,40812,23859,23856,40811,40805,40808,
-23858,33581,33583,23854,23881,33580,33592,23853,23852,19635,33579,40804,
-23848,23844,33560,33558,35258,40795,23843,33557,33556,35255,25392,23842,
-33555,33554,23841,24131,24133,23789,17857,23787,18134,25390,26230,23785,
-25387,26229,26199,23783,23782,23781,23780,23779,23778,24120,24128,23777,
-17845,23775,27731,25366,18759,23762,23761,23760,23759,23758,23757,23851,
-23847,40801,40803,23850,33457,33578,35260,23849,33572,23756,33456,23755,
-25328,18750,10402,24219,24218,24217,24239,41600,41620,24216,24215,24238,
-29171,33958,24221,24241,24214,24237,24213,24236,24223,24243,24231,24248,
-24235,24212,41619,41599,24580,24740,24486,24650,24479,24643,24493,24652,
-24536,24696,24535,24695,24534,24694,24533,24693,24640,40701,30096,38438,
-24638,24477,35149,24692,24532,24054,24053,24052,24051,24050,23803,17878,
-23801,25476,23799,23798,23797,33549, 3281, 2981,35267, 2427, 2429, 2425,
- 2424, 2495, 7047, 7649, 2423,21521,14156, 2422,35247,23754,40705,23741,
-40684,40700,23725, 4338,40674,23724,40673, 7842, 7748, 7750, 7746, 7745,
- 7744, 7761, 7758, 7769, 7651, 7653, 7648, 7647, 7646, 7645,21520,14155,
- 6300,21670,14601, 7644,35246, 8354,35392, 7811, 7809, 7813,37284,31745,
- 7771,36483,31210, 7788, 7802,36473,31194, 4186, 4465, 4184,13064, 4181,
- 4180, 4236, 4246,23721,39799,39630,23720,18459,23719,10083,18671,39628,
-33435,13819,10309,39797,28701,21329,36039,30815,42588,42206,25299,25298,
-13062,42586,20667,20672,42197,42203,23718,21332,13824,33434,42590,28700,
-42208,30814,36038,25297,20676,13069,39022,22404,15866,17830,43413,13837,
- 9689,43025,21338, 9687,17828,40683,11384,19518,39000,11387,42593,21639,
-19521,42214,14460,40699,20689,13087,24049,24531,24691, 4190,23717,22449,
-15912,25296,20692,13099,23753,22427,15895,25337,20666,13060,23716,22403,
-15865,25288,20665,13059,13584, 4199, 4197,23711,19508,11363,25282,20745,
-13140, 9063, 9396, 9184, 9168, 9338,38785,32799, 9254,23359,17393, 9336,
-38782,32791, 9247,23353,17357, 9344,38793,32809, 9282,23387,17431, 9456,
-38858,32878, 9094,23244,17141,23710,21540,14212,15278,40657,22649,16130,
- 2758,21538,14208, 3347, 5771, 1853, 5082, 1788, 4966,42481,42234, 1708,
-26963,42233,26591,42480, 1852, 3346, 3345,42479,37847, 1851,37846, 1835,
-13635,42478,42232,37845,26590, 1785,10346, 1834,35043, 1833,37844,13634,
- 6891,27206, 6890,42477, 6889,37843, 5951, 5949,22464,27759, 5930, 5929,
-22774,28067, 5928, 5927,20495,26455, 5926, 5925,26249,26192, 5924,26307,
- 5934, 5932,27724,22402, 5923, 6119, 5922, 7262,27717, 5920, 6917, 6277,
- 5918, 5917, 5916, 5915, 5914, 5954, 6118, 6927,27234, 6888,42759,27205,
-29027,43024,42739, 8746,29048, 8768,43069, 6886, 6887,27204,42738,28699,
-43023, 8745, 8742,43021, 8741,43020, 8740,43019, 8784,43196, 8739,43018,
- 8767,43068, 8523, 8744, 4957,42196, 5672,42195, 4956,42194,24230,42193,
-33939,33938,24127,42192,33769,35199,24492,42191,35198,33768,24688,20662,
-24528,20661,24048,41181, 4990, 4842,42304,37700, 5671, 5670,42303,37699,
- 2546, 2545,37881,42519, 5669, 5668,37880,42518, 2544, 5667, 5666, 4137,
- 5106, 5104, 5072, 5070, 5074, 5076, 5068, 5067, 5066, 5065, 5064, 5063,
- 5100, 5096, 5095, 5094, 5084, 5062, 4634, 5061,42190,28698,42457,26562,
- 4635, 5091,42302,26982,42517,26626, 4666, 5090,37879, 4989,13687,42301,
-42516,37878,26981, 4665,10365, 4136,35060, 5089,42515, 4988,26625,42300,
-42514,26624,26980, 4664,42299, 4135,26979, 5088, 4134, 4987, 4663,42298,
-42513, 2163,37877,13686, 2162,42512, 2150,26623,37876,10364,35059,13685,
- 2161,42297, 2142,37875, 2140,42511, 2149,42296, 5087, 4986, 1917,26978,
-42295,26622,42510, 2148, 4848, 4862, 4827, 4826, 4841,37698, 4882,13463,
-42509,42294,37697,26621, 4840,10189, 4881,34876, 4839,37696, 4880,13462,
-37874,13684, 5086,37695, 4985,13461,42293,42508,37694,26977, 4838,10188,
- 4879,34875,23729,34834,40698,40656,23709,34880,40655,41381,24211,34827,
-41560,41559, 4874,34826, 4876,34861, 4892,34905, 4878,37693,13460, 4898,
-37778,13508, 8353,35391, 8390,35436, 8581, 8534, 8602,38462, 8683,38525,
-15448, 8641,38478, 8579,15277,38435,15138,33431,16652,33730,33429,34560,
-29423,29381,40645,41866,33391,26227,33910,40643,18131,33513,11326,11531,
-33511,28664,40769,33510,40787,33508,28642,40785,33751,18774,41232,27772,
-33679,28943,12118,40634,40633,33677,28941,40629,40632,40628,33675,28936,
-41598,41618,33605,33597,33360,33359,33358,33357,33787,39161,39321,39320,
-36288,34527,26330,41849,18165,34522,26325,33349,34055,41845,18161,34536,
-39160,38969,23693,41793,39327,39626,32091,42030,33307,32090, 4703,33453,
-28723,25230,25229,33306,28623,26436,26446,33608,33305,40807,35522,19640,
-33304,40825,35232,19645,33303,34053,33301,34044,34048,33298,41691,33296,
-41683,41686,33295,33536,33540,33535,33292,33287,33282,33286,33935,33933,
-33279,40631,33711,41180,33709,41173,35230,19918,33708,41172,35520,19917,
-33707,41171,33577,28797,33278,28611,33892,29148,33886,29144,33277,28610,
-33276,28609,33275,28608,33274,28607,33291,28620,33273,28606,43071,33822,
-43437,35917,33272,28605,36118,33548,30917,35916,33484,35981,35979,30906,
-28760,30775,33546,36116,33383,36083,28645,33367,28749,33482,33271,35915,
-36081,30729,33270,28604,39412,30728,39470,35914,33309,33311,39410,39456,
-18196,25216,28625,35913,39468,39505,20324,25215,30734,41748,35944,41830,
-23695,23697,28638,39458,33331,39507,25232,25234,30736,33269,41797,41832,
-18192,23675,35964,35966,41701,41752,20319,23674,35912,30727,41697,28603,
-41792,33268,33267,28602,36620,34558,31487,35911,33425,33427,36622,28601,
-37113,31476,28689,35910,31489,33266,34471,37010,34556,30813,36021,36023,
-29384,34420,37214,28675,33409,33411,31478,37012,30791,33265,29426,35909,
-37115,34422,36005,36007,34066,30726,34473,29386,35908,30725,34068,37210,
-29428,33264,39067,39069,23701,30724,23703,35907,23673,39065,33386,25214,
-23672,39063,28670,25213,36000,30777,40776,40768,25250,25252,33263,40764,
-28600,40762,33262,28599,43013,30723,43400,35906,23671,21636,22383,25212,
-14454,15824,15837,33740,28975,43052,33261,43429,36320,33739,28974,43051,
-31074,43428,36319,24075,31084,21648,28986,22477,26012,36329,14493,33749,
-15945,43398,43011,22377,15823,14439,21634,26052,24114,33366,33365,28644,
-33480,28747,36111,33529,30902,36079,33473,33260,33259,33972,33258,33553,
-33285,28618,41597,41617,33284,33970,33294,33539,33528,28778,11448,40591,
-40590,33526,33525,33524,33523,39058,39057,23835,30901,23815,36110,33479,
-25517,28746,25494,40753,40752,33538,28787,40610,40608,33522,33780,40589,
-42861,23670,33778,35362,33256,35344,33254,33463,34043,29414,41685,41783,
-34041,29411,26400,26365,34040,41682,34039,34052,29420,34038,29410,34037,
-29409,34065,34064,29425,34036,29408,39406,31565,39466,37204,34456,39450,
-18188,26395,37101,39499,20313,26360,41742,41824,24283,24274,29519,34552,
-31485,41780,36616,41681,34035,29407,36615,34551,31484,37203,34455,29376,
-37100,31472,34411,37003,34047,29418,41695,41790,34046,34050,34034,34073,
-34032,33930,33941,29158,33932,29155,33929,29153,33798,41083,18043,35223,
-35283,35285,35154,35225,35169,30109,40588,40587,35146,30088,22376,15822,
-35144,30086,22374,15820,35142,30084,22372,15818,39529,39623,35148,35209,
-39159,35167,39318,35262,30208,40586,40585,35254,30204,41614,41595,35257,
-30206,40794,40799,35162,40709,18758,34825,35269,35266,10793,10619,35245,
-10783,10561,35251,35243,35242,33724,33728,33722,33721,33968,34685,29738,
-40704,40703,34727,29780,41380,41359,34710,29763,20739,40561,13138,40560,
-34684,29737,20657,40559,13052,40558,33851,27196, 9902,42736,26993,36435,
-42547,42321,12366,27711,36437,43010,33439,42468, 9680,42735, 9685,36043,
-11382,33445,11374,42216,36041,43009,33849,37911, 9900,42734,35066,36431,
-37907,33847,12364,27710,36433,43008,35081,12602,37746,35083,35007,31772,
-37338,35022,35015,35047,35005,35004,35003,35002,35001,35000,10302,35071,
-10368,35013,35012,35011,34999,10301,13577,37817,34998,42180,10300,28558,
-17770,37820,19393,34996,13579,42450,37818,26546,35045,35058,42292,10363,
-26976,10362,37873,13683,35057,13682,42507,37872,26620,35056,37692,10361,
-13459,34874,37871,37691,35055,13681,10187,37870,34873,35054,37869,10360,
-13680,35053,37868,33660,25733, 9805,40999,26975,36216,42506,42291,11876,
-25732,36215,40998,33659,42505, 9804,40997, 9803,36214,11875,33658,11874,
-42290,36213,40996,33657,37867, 9802,40995,35052,36212,37866,33656,11873,
-25731,36211,40994,33655,37690, 9801,40993,34872,36210,37689,33654,11872,
-25730,36209,40992,33496,34824,18484,18433,34860,34891,18526,34871,42289,
-10186,26974,10185,37688,13458,34870,13457,42504,37687,26619,34869,37686,
-10184,13456,34868,37685,34922,37771,10204,13501,34915,37764,35355,41246,
-40557,24074,35361,40556,41290,23645,35390,35394,35388,35387,35423,35431,
-35421,35420,35419,34424,34430,29390,34410,29375,34409,29374,34408,29373,
-43003,34454,43397,37099,34419,34418,29383,34554,25244,41863,17813,34550,
-27709, 2281,26243,26215, 2280, 2279,26242,26806,26214,26542,23643,17768,
- 9617,19682,25590, 9615,11631,25602,17766,11650,19701,23641,24043,17975,
- 9857,19915,25886, 9855,12116,25884,17973,12114,19913,24041,24525,18827,
-24685,10438,18963,10587,18825,10436,24523,10585,24683,18961, 2443, 2442,
-18824,26805,10435,26541, 2441,21154,13576, 9256,38787,32802, 9246,38781,
-32790, 9253,38784,32798, 6490, 6682,39661,39839, 6676, 6675, 6674, 6673,
- 6672,39158, 6697,23640, 6775, 6783,36532,31231, 6580, 6579,18960,26804,
-10584,26540, 6578,21153,13575, 6857,38536,32501, 6867,38538,32503, 6855,
-38534,32498, 6822,20490,12860, 7477,22060,15426, 6814,20485,12855, 7472,
-22055,15421, 8988,38813,32831, 8677,38488, 8239,38346, 6280,21655, 6279,
-21654, 6320,23639,23638,23637,23636,40555,23635, 6274, 6315,38953, 8751,
- 8823, 6245,23632,23631,14039,20651,37335,31769,15808,34822,24166,24163,
-37375,31808,23727,25314,39344,39342,23630,14031,25171,15799, 6241,42999,
- 8753,42998, 6240,42997, 6239,42996, 6238, 7605, 7603,21633,24145,14431,
-24150,23743,21632,14430, 7577, 7576,21645,23768,14481,23764, 6237, 6236,
-21631,42614,14429,42241, 6235,21630,14428,24073,24072,24071,24070,41264,
-24069,24066,24065,37331,31766,24064,26009,24063,21647,14491, 8775,43079,
- 8774,43078, 8737,42995, 7643,21669,14595,23622,21711,14828, 7827, 7826,
-21710,23621,14827,23620, 7824,21709,14826, 6347, 6349, 6351,38519,32485,
- 6362,38530,32492, 6364,38532,32494, 6358,38528,32489,18365,24583,18606,
-18598,18597,18596,42444,37811,24657,24497,24634,24469,35138,24040,24039,
-24522,24682,24681,24521,24578,24738,39405,39465,41680,20283,41779,18147,
-18187,41741,20312,39449,41823,39498,24520,24680,24679,24519,24038,24037,
-39157,39156,40949,19826,40948,17924,23619,23846,24202,35241,41126,33720,
-25977,35386,41125,33719,25976,33718,41124,24482,24646,23834,23814,19058,
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- 9939,23558,12616,42351,23557,20934,33126,42350, 9183, 4283,10121,18549,
- 4282,40459, 4281, 4280,20604,42634,13003,42261, 4279,20603,13002, 5137,
- 4978,20602,42260,13001,42633,42632,42259,20601,20600,13000,12999,18690,
-10349,20599,20598,12998,18689, 4278,20597,12997,18511,10110,20596,20595,
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-35207,34534,40424,21425,14006,23588,22306,15747,40423,40414,40413,21439,
-14026,23556,22334,15779, 4372, 4369, 4368, 4367,35151,30093,22413,15879,
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- 4337, 4332, 4331,17775,23649,20740,26589,18110,24208,20732,26586, 4339,
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- 4363,17703,20773, 7224,21817,15106, 7278,21845,15151, 6793,20758,13149,
- 7453,22033,15389, 4419, 4418,18063,20916,18723,20909, 4414, 4413,17702,
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- 4005, 4614, 4004, 4613, 4003, 4612, 4002, 4651, 4042, 4650, 4041, 4649,
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- 4019, 4677, 4066, 4629, 4023, 4679,26656, 9567,17697,26655,26157,26889,
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- 9832, 9821, 4068, 4021, 4025, 4000, 3999, 3998, 3997, 3996, 3995, 3994,
- 3993, 3992,18079,18763,17849,17696, 5676, 3991, 5978, 4076, 9819, 4640,
- 4639,26788,26573,26828,26827, 4655, 4607,26604,26847,26850,26787, 4653,
- 4606,26845,26508,26844,26786, 4072, 4071, 4070, 9601, 9599,13239,13706,
- 9566, 9565,13247,13710, 9707, 9706,13224,13694,32148,17740,27672,18762,
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-26919,26918,42210,42129,30264,27000,42552,37919,29189,28991,30289,26917,
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-27093,27122,27137,27139,27143,26929,27252,27082,26987,26986,26985,26984,
-26965,27045,42306,26262,26269,26268,25864,25862,19907,12099,25861,21133,
-13558,26232,25284,21158,13589,36233,41002,41001,36232,25459,25467,25466,
-25439,25438,25437,25463,25462,25478,25436,25435,25434,25433,25432,25431,
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-11451,19575,25453,11454,25425,19564,11435,25422,25421,34547,36611,29498,
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-30295,30136,29007,29001,26504,26785,26503,26784,26502,26783,26501,26782,
-26653,20576,26803,26818,26810,26781,26780,26779,26778,26777,26905,26776,
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-28037,26796,26770,26831,21179,21176,13621,13619,26843,21132,13557,26822,
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-31587,17693,29537,33327,28442,17810,36909,20412,29314,35941,29298,34188,
-36928,35806,35802,19463,36753,18636,34169,33119,33123,36733,34325,34794,
-31401,18342,31383,20999,34344,37946,30550,19303,31586,17692,29536,34963,
-28441,18583,36908,20411,29313,37549,29297,34187,36927,35805,35801,21107,
-36752,34520,23692,17727,34206,33644,33630,36773,34362,33170,31439,18362,
-31423,19328,34379,35834,30989,19765,31619,17917,29553,33166,28915,17723,
-36949,20442,29350,35830,29333,34222,36965,36227,36190,19324,36793,17726,
-34205,33423,33403,37945,34793,33169,31860,18635,31422,19327,34378,35833,
-30811,19494,31618,17825,29552,33165,28687,17722,36948,21106,29349,35829,
-29830,34962,37548,36019,36035,19323,36792,17725,34204,34961,34792,36772,
-34361,33168,31438,18361,31421,19326,34377,35832,31859,21105,31617,18634,
-29551,33164,29829,17721,36947,20441,29348,35828,29332,34221,36964,37944,
-37547,19322,36791,17719,33381,33643,33629,36226,33162,30988,17916,30773,
-19320,35826,19764,28659,28914,35998,36189,17718,33380,33494,33506,37943,
-34791,33161,31858,18633,30772,19319,33379,35825,30915,19588,30771,17875,
-28658,33160,28758,17717,35997,21104,28657,35824,29828,34960,37546,36106,
-36096,19318,35996,34201,17619,33398,33418,34790,37942,31857,32969,31415,
-18632,34374,19209,30806,35662,31611,19489,29548,17820,28682,32964,36941,
-17615,29345,21103,29827,35647,37538,34959,36030,36014,36785,19204,38965,
-38827,38964,38402,38963,38394,30483,30481,30479,30197,30173,30172,37558,
-37533,33232,26991,33855,42319,26997,31853,42071,34785,30663,10141,42330,
-20996,31185,37937,30659,42076,28539,39558,29067,34954,39683,18580,28536,
-13358,39562,37532,24418,29823,36448,39688,35889,24422,37708,37640,36827,
-41765,29940,37091,37531,38132,37530,29954,29939,29952,29938,18047,17687,
-18179,17690,37648,36442,36300,26727,26710,26725,26709,36053,36296,36454,
- 8812, 5812, 8435, 8792, 4905,43814,43311,43002,43286,42582,42845,42928,
-42841,17738,17994,17736,17882,37784,37852,36298,36308,42834,26708,42866,
-42924,42836,41896, 4061, 5984, 5996, 3392, 6655, 3665, 5991, 2355,11822,
-11824,12297,12293,41271,41244, 9823, 9825,28555,30678,23629,25170,28972,
-31072,24113,26051,28716,30818,23740,25326,28544,30669,23602,25142, 9678,
- 9673,12176,11804, 6292,22567,16044,14145,14590, 2539, 5657,14143,14588,
-14164,14610, 2549, 5675, 1621, 5475, 1922, 5500, 3097, 5374, 5384, 3103,
- 1927, 5218, 5216, 1912, 5230, 1907, 5228, 1909, 1924, 5240, 1920, 5242,
- 5251, 1915,16600,16633,10970,11111,10966,11285,11116,12195,12208,11050,
-24332,28819,28826,30947,37995,11048,37653,24461,38605,24787,38432,11046,
-28807,30934,11044,43887,43853,43884,43850,43879,43845,43876,43842,14147,
-14592,11113,12199,17610,19104,17607,19103,35640,28333, 8578, 8135, 4818,
- 4785, 8230, 8669, 8667, 8228, 8584, 8161, 8176, 8596, 8576, 8133, 6923,
- 6164,36294, 8790,36293, 6921, 6162, 6901, 6157, 4816, 4783, 8178, 8598,
- 6925, 6166, 8586, 8163, 6903, 6159,24751,12788,39418,38649,38634,36069,
-38630,37529,39997,39585,40148,40037,40013,40113,39995,39678,40109,39587,
-39677,39544,39583,40111,39582,38677,35816,35815,38676,38692,38648,32845,
-30554,32330,30665,31742,31199,32322,32317,10868,10865,28325,28322,28318,
-28315,18253,11572,11569,37502,37165,35655,35652,35793,36302,36292,18631,
-34162,32968,32963,36726,34318,34789,31394,18338,31379,20998,34337,37941,
-30485,19208,31579,17614,29529,34958,28341,18582,36901,20407,29309,37537,
-29290,34180,36920,35646,35661,21102,36745,18630,18355,32967,32962,31856,
-31432,34788,34355,34200,34373,31610,31414,37940,36766,19207,19203,17613,
-17618,34957,34215,29547,29344,36784,36940,37536,36958,29826,29326,35645,
-35660,21101,20435,18629,17873,32966,32961,31855,30913,34787,33504,33376,
-33375,30768,30767,37939,36104,19206,19202,17612,17617,34956,33492,28654,
-28653,35993,35992,37535,36094,29825,28756,35644,35659,21100,19586,35799,
- 9353, 9466, 9351, 8511, 8467, 9356, 9355,38382,28878,28873,28860,28855,
-36282,36277,35797,18255,27821, 2597,18244,18243, 2456, 2596,18258,20185,
-18251,18250,18248, 2639,37181,37178,37131,37164,37190,37163,37162,37161,
- 2628, 2484,37160,37130,37159,37189,37158,37107,35671,28353,30196,28348,
-30171,28352,28351,30211,28330,32980,32985,32978,32983,28346,28350,28329,
-32887,32733,36647,36641,39425,39436,39434,17467,17466,17465,11252,11231,
-11249,11228,28577,30701,28571,30695,17464,36512,36527,32681,33885, 2803,
-29143, 2801,33883, 2815,29141, 2814,17283,36510,23099, 8940,16953, 8939,
-24190,24197,17374,36514,23332, 9222,17282, 9221,24186,24195,16899,36509,
-17342,36508,16716,36507,23331, 9220,17281, 9219,23513,23515,16898,35774,
-16770,35773,35812,32912, 9413, 9412,38826,38825,32843,32842,36520,32749,
-36525,32722,36524,32765, 9315, 9314,38768,38767,32721,32720,36523,32902,
-36522,32643,11922,11919,17550,32854,17500,32826,17196,32891,17326,32918,
-14566,13036,13033,13045, 9827,20640,20632, 5980,21627, 6232,20630, 4294,
-28502,30618, 3072, 3390, 3308, 3501, 3294, 3479, 3296, 3485, 3291, 3474,
-24393,42188,24390,42185,10400,38621,10397,38618,38600,37957,38597,37954,
- 3369, 3053, 2347, 2474, 2341, 2468, 3497, 3306, 3387, 3070, 3372, 3056,
- 3462, 3288, 3460, 3286, 3367, 3051, 6898, 5577, 6896, 5575, 6912, 5608,
- 3262,38172,27114, 3033,38221,27106, 3031, 2490,38144,27081, 2488, 9523,
-38143,27080, 9895, 3361, 3413, 3411, 2340, 2338,19193,20045, 3436,16188,
- 7760,16186,16190,16166, 7755,27548, 7979,27546, 7977,27554, 7985,27371,
- 7905,27369, 7903,10218,34894,29094,29104,23572,40849,33705,33700, 5477,
- 3365, 5504, 2343, 5409, 3495, 5442, 3385, 5436, 3375, 5376, 3454, 5430,
- 3363, 5327, 2345, 5283, 2367,32622,30556,30756,31026,32607,30558,30783,
-30872,30884, 6085, 1558, 5512, 1532, 5502, 1551, 6098, 1541,16642,32605,
-32620,16677,16631,16675,14167,14613,10974,10972, 5387, 3106,12007,12006,
-19884,19883,27888,27479,25821,25820,22532,21907,15995,15226,13355,13354,
-20992,20991,27887,27478,16175,22682, 3640,22681, 3639,28006, 3745,36150,
-14722,16168,31028,14779,14262, 5486, 3092,14788,14271, 5514, 2300,14739,
-14218, 5444, 3337, 3130, 5407,14202,14718, 3108, 5389,14190,14695, 3105,
- 5386,14188,14693,14733,14211, 5433, 3328, 3090, 5367,14184,14674, 2302,
- 5285,14115,14519, 2320, 5325,14137,14582,10976,10978, 2315, 5308,14118,
-14556,12287,16679,12187,12185,12167,12213,12211,12145,12210,12220,12171,
-12005,19882,25918,25819,19938,12144,13353,20990,25795,12218,12143,11787,
-16647,11802,11800,11791,11789,12169,12012,11287,12142,12004,11785,11783,
-32625,32624,16645,11772,16644,11535,11333,11771,11770,11769,11768,37781,
-39432,42704,17745,19044,28513,30325,30629,32526,33196,35580,33861,33845,
-31191,31174,35858,38269,11123,14378, 9612,10668,33200,35471,29073,29078,
-36461,36466,35854,38050,28508,30067,30634,32209,19344,21619,17744,37488,
-28512,29885,30628,32037,33195,35064,33860,33844,31190,37929,35857,37722,
-11122,29816, 9611,31846,33199,34888,29072,34947,36460,36465,35853,38020,
-28507,29935,30633,31908,19343,34770,42124,18618,28511,29884,30627,39579,
-33194,35063,33859,39542,31189,31173,41965,37721,26764,13467,24372,10194,
-39541,34887,29071,29077,36459,41964,35852,38019,28506,42123,30632,31907,
-39578,21065,35579,33450,33204,33209,10667, 9684,21618,19515,32208,30827,
-35470,33443,30642,30638,32525,30834,30066,28710,28516,28521,38268,36059,
-30324,28721,19043,17834,14377,11391,35867,35863,38049,36048,35019,33449,
-33203,33208,31845, 9683,34769,19514,31883,30826,34831,33442,37928,30637,
-31978,30833,29910,28709,34946,28520,37607,36058,29852,28720,37487,17833,
-29815,11390,35866,35862,37969,36047,35018,33448,39540,33207,10162,24371,
-21045,39577,31882,30825,34830,39539,30641,30636,39576,30832,42122,28708,
-28515,28519,37606,41963,29851,28719,18603,42121,13429,26763,41962,35861,
-37968,36046,18009,35174,33220,33214,31080,10542,33735,21858, 9872,32383,
-19996,35352,36326,30647,19350,32119,17751,30422,33746,28526,18003,38449,
-12303,30287,36336,18945,28983,15177,35873,35878,19987,38640,18008,35578,
-33219,33213,31079,10666,33734,21857, 9871,32382,19995,35469,36325,30646,
-19349,32524,17750,30421,33745,28525,18002,38448,12302,30323,36335,19042,
-28982,15176,35872,35877,19986,38639,18007,35173,33218,39538,31078,10541,
-39575,21856,24379,32381,39537,35351,36324,30645,19348,39574,17749,42120,
-33744,28524,41961,38447,26910,30286,42119,18944,28981,15175,35871,41960,
-19985,38638,18006,35172,33217,33212,31077,31844,33733,34768, 9870,32380,
-19994,35350,36323,37927,19347,32118,17748,30420,33743,34945,18001,38446,
-12301,30285,36334,37486,28980,29814,35870,35876,19984,38637,35881,43188,
-19019,43115,19000,43043,18937,42904,19125,40860,41464,40864,41531,40856,
-41497,27449,27858,26485,26484,18893,35399,18905,18871,36637, 8640,43490,
- 8638, 8636, 8632,43488, 8630,27913, 6309,27643, 6199,27650, 6201,27648,
-27317,15071,21781,27319,36291,30114,30113,18035,18034,18843,27630, 6194,
-27198,26411,27628,27627,27626,17953,18752,18873,18877, 6850,14325,14323,
-13562,27200,27195,26544,26498,35410,18842,18840, 7945, 4605,36290,29959,
-29958,18839,26754,26753,18838,30779,28661,28542,28311,32951,38593,37485,
-26198,38808,32719,26208,26206,26210,28413,12590,18544,11602,18501,10103,
-18493,11601,18500, 7875, 7873,27185,26532,26483,27409,27411,26491,27792,
-26530,26719,26489,26712,12815,27808,26482,27790,27795,27794,26070,27380,
-30341,10472,28732,29134,29567,29569,30349,30351,29019,29021,27745,26481,
-26480,25346,25339,25355,38807,32718,26068,26073,25349,25351,25348, 2714,
-26479,25856,26478,25855,26477,25854,26067,26078,32125,19191,26065,26076,
-26476,26475,26072,26080,26131,26136,32145,10040,37484,37483, 4063, 5977,
-22224,15675,18722,38647,38592,36537,38591,26410,26474,26473,26416,26683,
-27293,27228,26245,26662,35635,28328,28327,43141, 8634, 3698, 3417,43138,
- 8621, 3713, 3441, 4213, 6544, 4218, 6524,40309,21826,15119,24933,20136,
-12548,31819,24935,29131,37427,37426,37408,38126,37407,24931,24929,17280,
-35772,17341,35771, 8954, 8953, 8972, 8971,32782,38780,32780, 9335,38778,
- 9333,35811,32911,35810,32910,35809,32909, 9436, 9435, 9450, 9449, 8407,
- 8256,38629, 8415, 8264, 8255, 8406, 8263, 8414,35185,30123,35217,30156,
-35214,30153,35789,40137,14174,32950,32949,32948,32953,35923,39167,35925,
-38697,30195,42782,38646,27407,27788,27787, 8189,35791,12362,12359,11671,
-11668, 8208,38343, 8206,38341, 8147,38291, 8145,38289, 8143,38287,10851,
-27142,10850,27121,10849,27044, 6334, 1523,11177,11175,15347,23665,25199,
-23667,25201,41325,41317,41322,41314,12358,23576,40851,37545,38125,37544,
-37543,37541,41764,40304,28309,28308,28307,43105,18991,28306,28304,28884,
-35642,42567,41159, 9349,33613, 2854,28895, 2849,33611, 2852,28893, 2847,
-13527,26472,11550,36307, 9348,13526,18492,33879,41480,33867,41510,41496,
-41445,41530,41535,43810,43282,43307,37913,41501,41463,13758,43028,41495,
-43007,41529,12582,18534,26682,12589,18543,33877,41478,33870,41514, 4208,
- 6553, 4263,22580,16060,11642,19693, 6603,11623,25597, 7060,19674,25585,
- 5684, 2676, 3005, 3140, 4055, 5988, 4207, 6550,20547, 5987,19189,20546,
- 9831,13525,20545, 9723,40302,40300,40298,38633,31123,25354,25357,40313,
-40315,40312,40311,19187, 2935, 2932, 2975, 2972, 2931, 2389, 2392, 2388,
-38391,12812,38367,38390,38360,10845,23489, 9521,23488,23541,23486,10861,
-35182,30120,10858,12326,35220,30158,12323, 3320, 3318, 3083, 2317,41305,
-27826,27824,27810,30339,28303,30476,21529,28302,30475,21527,28301,30474,
-35418,30472,24979,41370,28299,40542,28298,40374,28297,41301,28504,41303,
-28296,40378,28295,40389, 9517,22223, 9515,22222,28294,30471,15673,28293,
-30470,26087,23485,26085,23484,26089,23634,26143,23482,28291,30468,35840,
-25163,24068,33717,30467,33713,31149,36306,36274,36305,33668,36280,36279,
-33666,41175,33726,30753, 8805, 9754,35271,35600,11567,11566, 8646,35602,
-11561, 8644,40541,43812,40373,43309,40377,40376,43284,40388, 5853,40387,
-35409,30466, 8193,35407,30465, 8192,35381,30464, 8184,35379,30463,35570,
-30461,43352,28290,30460,27624,28289,30459,28287,30457,39372,30625,39369,
-30622,38899,31715,39351,30456,39349,30978,39353,31089,29622,31709,38885,
-31720,38884,30455, 8191,38882,30961,39786,30454,31739,35838,35795, 9519,
-24942,24946,10856,10860,36345,36353,36344,36355,36343,36351,27406,35181,
-30119,35281,30226, 8360, 8356, 8330, 8358,39348,32112,36349,36348,36347,
-35184,30122,28764,41298,25054,40688,35240,30453, 8794,35249,30966,28852,
-35594,28858,28857,35592,35385,30452, 4903,35397,30969,11554,35412,30451,
-24989,41350,37156,36374,38124,38073,32589,11073,42118,18242,16618,38061,
-11079,42117,17959,36254,33491,33503,36103,33681,30912,17872,30766,19973,
-36261,19585,31039,28755,35991,36093,33703,33698,37155,38123,36373,18241,
-37154, 9818,20884,14498,26409,27227,26106,41758,37129,18218,12026,42159,
-18240,12035,42116,35785,38881,32098,33691,33693,33689,22218,12043,13218,
-10294,10292,12028,30542,30450,30538,30449,31151,30448,31161,30447,31163,
-31165,10883,22217, 5329,42155,42974, 8736,42153, 4951,41300,31460,30446,
-31458,30544,31450,30445,30548,30444,30546,30443,30850,30442,31129,30441,
-31171,30440,31177,31167,35657,35781, 5119, 5121,43484,18837,42822,32959,
-28339,32957,28337,10890,10889,35180,30118,10888,35116,30009,32955,28335,
-32956,28336,10886,32142,30439,32107,30438,33826,29060,33828,29062,30848,
-31159,32105,31158,18239,12112,42115,40294,22797,16335,11611,19666,23481,
-11704,19724,23480,11710,19727,23478,11634,19685,23477,11722,19733,23476,
-40292,21574,14298,14322,21593,40290,11726,19737,23475,11202,19384,23474,
-11677,19713,23473,11674,11673,19710,23534,11205,19387,23472,11208,19390,
-23471,11353,19502,23470,11011,19312,23469,11649,19700,23468,12449,20095,
-23467,11007,19309,23466,11630,19681,23465,12445,20092,23464,16116,10909,
-19216, 6507,10843,19185, 7796, 5508, 1553, 6102, 1544,11201,19383, 7799,
-10841,19183, 6769,10917,10916,19222, 6757, 1919, 5507, 5506, 2337,11200,
-19382, 7798, 3099, 5379, 5378, 3456,11204,19386, 7743, 3078, 5354,14173,
-14650,11010,19311, 6602,10930,19231, 7795,10927,10929,19230, 7724,10926,
-19228, 7741, 5302, 2336,11207,19389, 7616,10838,19181,41258,11641,19692,
-41257,10836,19179,41256,16649,22930,25272,11033,19314,25535,11323,19482,
-25545,11004,19307,25874,11315,19476,25895,12442,20090,25866,11468,19595,
-25469,11456,19577,25457,32610,32609,16651,22932,25274,30785,30886,11537,
-11335,11325,19484,25547,25471,19597,11470,16682,12289,16681,25058,22939,
-16691,12141,11331,16598,30781,11329,11767,11766,11320,19480,25541,12003,
-12140,11319,19479,41255,17819,18627,28695,29901,30805,31851,33397,34784,
-34199,34372,31609,31413,36013,37935,11341,13776, 9661,10272,33417,34953,
-29546,29343,36783,36939,36029,37525,28681,29821,30797,31919,19488,21087,
-17818,18651,28694,29922,30804,31892,33396,34847,34198,34371,31608,31412,
-36012,37979,11340,13854, 9660,10330,33416,35031,29545,29342,36782,36938,
-36028,37619,28680,29861,30796,32001,19487,21199,35953,18354,28693,29561,
-30803,31431,33395,34354,34197,34370,35934,31411,36011,36765,28634,12748,
-30745,10011,33415,34214,33340,29341,36781,36937,36027,36957,28679,29325,
-30795,31599,33320,20434,35951,18353,28692,29560,30802,31430,33394,34353,
-34196,34369,35932,31410,36010,36764,28632,12747,30743,10010,33414,34213,
-33338,29340,36780,36936,36026,36956,28678,29324,30794,31598,33318,20433,
-18163,34524,18170,34539,38973,41703,29442,14761,14765,14758,14451,13068,
-10317,20704,13105,42224,24299,30412,43809,43281,43306,38235,27349, 7889,
-14291,14320,14307,14275,27292,32314,26432, 8142,38286, 8205,38340,32311,
-26426,27542, 7973,24301,30414,29621,31708,38245, 2898,34620, 3233,38243,
- 2890,34618, 3225,38241, 2909,34616, 3245, 2476, 2353,29613,31699,38239,
- 2333,34614, 2311,38232, 2959,32947, 2997,38230, 2957,33238, 2995,32946,
- 2920, 3256,38218,33236, 2918, 3254,38216,32945, 2913, 3249,38211,33141,
- 2911, 3247,38209, 3284, 3458,28841,30957,38225, 2952,33595, 2990,32944,
- 2906, 3242,38205,33111, 2889, 3224,38171,26471,33619, 2904, 3240,38203,
-33617, 2902, 3238,38201,33615, 2900, 3236,38199, 9347,33603, 2896, 3231,
-38189,33601, 2888, 3223,38170,33599, 2908, 3244,38207,40288, 5473,19177,
- 6077,19175, 6083,40286, 5510,20671,42202,28668,40774,28870,35518,28876,
-28875,35516, 3026, 2497,12321,35396,30968,43080, 8776,42253, 4974, 9563,
-35780, 9562,35779, 9561,35778, 9560,35777,35621,35776,43187,43525,33087,
-28410, 8381,40344, 6063,40349, 5471, 8656, 8665,35769,35619,43193,43529,
-24924,24922,19170, 6052,40280, 5460,19169, 6094,40279, 5498,40284, 6048,
-40278, 5456,35768, 9554,35767, 9553,42816,42903,33083,28406, 8214, 8219,
-42821,42908,35276,30221,10834,40283, 5465,19173, 6057,40282, 5484,19172,
- 6072, 4604,35480, 8688,38151, 7004,35486, 8696,38161, 7021,35484, 8694,
-38154, 7019,11715,11706,15672,11667,11713,11702,15669,11664,11699,11717,
-11708, 5397, 3116,14777,14260, 5481, 3113, 5447, 3389,14741,14220, 5446,
- 3339, 5412, 3500, 3132, 5411,14204,14721, 7329,21927,15249, 5494, 2352,
- 5372, 3448, 3101, 5382,14186,14691, 2327, 5344,14162,14608, 3077, 5353,
-14172,14646,11648,19699, 6601,35482, 8692,38166, 7017, 5392, 3473, 3110,
- 5391,14192,14699,23463,43692,43694,24920,38951,22867,16482,33249,28118,
-16479,28586,28115,22864,30710,35901,40584,16114,11661,23661,38948,22861,
-16476,43690,33246,28112,16473,43689,28583,28109,22858,30707,35898,40581,
-25195,23462,43789,43767,24919,23461,43688,43686,24918,16464,28568,30692,
-28588,33251,30712,24853,35903,24812,28590,33253,30714,24855,35905,24814,
-28576,30700,28575,30699,28574,30698,28594,30718,28593,30717,28592,30716,
-23460,26117,23459,26125,25062,24917,25064,24916,23615,26119,23618,26127,
-24915,25159,24914,25161,23458,25068,23457,25070,25378,24913,25384,24912,
-23580,24911,23578,24910,25380,25086,25386,25084,23456,23455,43698,43696,
-43702,43700,24909,24908,23454,28127,23453,28131,28125,24907,28129,24906,
-23452,25073,23451,25076,27214,24905,27040,24904,23584,24903,23582,24902,
-27216,25090,27042,25088, 9897,23617,27212,23825,27038,23807,25508,25507,
-25485,25484,38076,32635,24060,43752,24059,43747,43751,25989,43746,25988,
-16663,38064,23708,23707,28163,28162,28160,28159,25277,25276,33688,11488,
-11501,33695,11465,19593,41254,23833,23813,24901,25514,24900,25491,25516,
-25493,23824,23806,25376,25506,25382,25483,25505,25482,23840,23819,25258,
-25524,25255,25501,25521,25498,16662,40650,40648,12139,16661,17475,16660,
-17494,16708,32634,16655,11765,16654,16668,16665,17463,25268,22928,16640,
-16658,12002,16657,41253,22927,16639,27274,27104, 8615, 2949, 8724, 2967,
-24899,24898, 5711, 3168,27087,27257,39591,39593,39778,39780,24897,24896,
-25305,41442,41415,24895,24981,41405,41436,24894,40670,21283,13733,25304,
-20144,12556,40669,23178,17049,25303,23330,17279,40668,22082,15459,25302,
-21736,14943,40667,22103,15510,25301,21714,14841,31816,38978,12457,20101,
-23723,12456,20100,23722,12455,20099,25853,25930,41147,41165,24893,25153,
-25151,41527,41493,41518,41484,24892,24891,24985,24983,41512,41476,41523,
-41489,24890,24889,29127,37418,38081,38944,38942,25926,25928,41143,41145,
-41161,41163,24888,24887,25157,24316,25155,24308,26445,24886,26435,24885,
-31153,30573, 8606,27241, 8708,27067,24884,11397,24883,19535, 5633,40721,
- 8611,27268, 8716,27098,24882,13815,24881,21327,27278,27119,15862, 8485,
-22401, 8532,24880,24879,27266,27096,13813, 5014,21325, 5150,24878,24877,
-24305,25080,24314,25078,24876,26430,24875,26443,38381,12808,38372, 9614,
-33240,28553,30852,30588,23810,25510,23829,25487,24874,25489,24873,25512,
-28730,32109,30590, 8604,27239, 8706,27065,25072,11400,25075,19538,23818,
-25523,23839,25500,25257,25497,25254,25520,25114,41379,26145,23677,25211,
-24077,36418,36416,36452,21509,20039,35274,30219,12320,35212,30151,33801,
-29031,33802,29032,12319,12317,12316,12325,33814,29038,29030,31148,29029,
-31147,33804,29034,31169,31146,33818,29042,23805,25504,23823,25481,26115,
-25480,26123,25503,25094,40694,30575,35818,25066,41355,14455,13070,10319,
-20706,13107,42226,34316,10000,34335,34160,17805,17791,20405,11306,35931,
-35950,34178,28631,31377,31577,31392,20421,29288,18326,29307,29527,36724,
-30742,33337,33317,18336, 9654,19444,19455,36899,36743,36918,12737,34315,
- 9999,34334,34159,17804,17790,20404,11305,35930,35949,34177,28630,31376,
-31576,31391,20420,29287,18325,29306,29526,36723,30741,33336,33316,18335,
- 9653,19443,19454,36898,36742,36917,12736,34314, 9998,34333,34158,34388,
-36806,31455,29578,35929,35948,34387,28629,31375,31575,31644,20419,29577,
-18324,29305,29525,36980,30740,33335,33315,29358,31643,36979,34229,36897,
-36741,36916,12735,34530,23691,34519,23690,34518,23689,37417,37349,37500,
-37481,37567,37337,37555,33628,33624,33374,33373, 9760, 9764,19763,19759,
-31002,30998,33638,33642,30765,30764,30983,30987,28913,28909,28652,28651,
-36225,36221,28904,28900,17915,17911,11887,11883,35990,35989,36188,36184,
-34783,33502,33372,33371,10271, 9735,21086,19584,31918,30877,34952,33490,
-30763,30762,31850,30911,29820,28754,28650,28649,37934,36102,29900,28792,
-18626,17871,13775,11515,35988,35987,37524,36092,34846,33501,33370,33369,
-10329, 9734,21198,19583,32000,30876,35030,33489,30761,30760,31891,30910,
-29860,28753,28648,28647,37978,36101,29921,28791,18650,17870,13853,11514,
-35986,35985,37618,36091,33500,33499,38464,38679, 9733, 9732,19582,19581,
-30875,30874,33488,33487,30759,30758,30909,30908,28752,28751,32408,32159,
-36100,36099,28790,28789,17869,17868,11513,11512,35984,35983,36090,36089,
-20673,42204,28671,40777,43082, 8778,35236,31145,42255, 4976,12467,15666,
-12584,18536,15665,18529,11600,18499,43684,43683,43682,43681,41521,41506,
-41487,41472,28106,28105,41520,41486,41505,41471,28104,28103,12588,18542,
-35566,30397,17734,29615,31701,29620,31707,11594,11580,11593,11592,13438,
-40317,40319, 2675,11660,19708,41252, 6693,40409,12569,20157,40408,40672,
-12563,20151,40276,40403,40406,12618,42353,20165,42669,40402,40405,40550,
-40548,12621,42356,20168,42672,40274,40272,40554,40552,35279,30224,34631,
-29684,40270,43213,40268,43541,40400,40397,24303,34628,29681,40399,43210,
-40396,43538,32283,11690, 3331,32281,11697,11696,11695,11694,19722, 2733,
-11692,19720, 2731, 6695, 6692,34708,29761,20865,13242,11180,11183,11179,
-11182, 2831,15192,39417,31625,18280,19041,29473,30322,31309,32523,34248,
-35577,34246,34106,31307,31515,36671,38267,12696,14376, 9964,10665,34104,
-35468,29216,29471,36826,36669,36824,38048,29214,30065,31513,32207,20360,
-21617,18318,37584,29511,29813,31361,31913,34295,34944,34300,34148,31356,
-37965,36713,37480,12727,29846, 9992,31873,34152,34767,29271,34991,36876,
-36717,36881,37926,29266,29895,31557,31843,20395,34820,42168,18576,29518,
-29812,31369,39620,34308,34943,34307,39550,31368,31564,42011,37479,26800,
-13352,24374,10138,39549,34766,29279,29517,36889,42010,36888,37925,29278,
-42167,31563,31842,39619,20989,18315,18575,34990,34819,31355,31912,34299,
-34942,34294,34151,31360,31556,36716,37478,21142,21022,18640,18594,34147,
-34765,29265,29510,36880,36712,36875,37924,29270,29894,37964,37583,20398,
-20988,39536,10155,34989,34818,31354,41959,34298,26909,34293,42114,31359,
-31555,39573,31872,24378,21021,26908,18593,42113,29845,29264,29509,36879,
-39572,36874,24377,29269,39535,37963,37582,41958,13391,39547,10137,34941,
-34764,31365,42007,34304,26936,34303,42164,31364,31560,39617,31841,24384,
-20987,26935,18574,42163,29811,29275,29514,36885,39616,36884,24383,29274,
-39546,37923,37477,42006,13351,38766,32717,41738,39446,26352,38806,41818,
-39493,26389,32819,38805,32818,38804,32817,41744,39452,26362,38765,41826,
-39501,26397,32716,38764,32715,41740,41820,23329,39495,17278,39448,26391,
-26354,23177,24271,17048,24282,41746,41828,23176,39503,17047,39454,26399,
-26364,23328,24276,17277,24285,24278,26367,18312,19039,29506,30320,31351,
-32521,34285,35575,34290,34140,31346,31552,36705,38265,12724,14374, 9989,
-10663,34144,35466,29261,29502,36866,36709,36871,38046,29256,30063,31548,
-32205,20392,21615,18311,37476,29505,29843,31350,31955,34284,34987,34289,
-34139,31345,37922,36704,37580,12723,29810, 9988,31840,34143,34816,29260,
-34940,36865,36708,36870,37961,29255,29907,31547,31870,20391,34763,42112,
-18591,29504,29842,31349,39571,34283,34986,34288,39534,31344,31551,41957,
-37579,26762,13389,24370,10153,39533,34815,29259,29501,36864,41956,36869,
-37960,29254,42111,31546,31869,39570,21019,18310,18590,34939,34762,31348,
-31954,34282,34985,34287,34138,31343,31550,36703,37578,21080,20986,18621,
-18573,34142,34814,29258,29500,36863,36707,36868,37959,29253,29906,37921,
-37475,20390,21018,39491,41816,18351,18625,29558,29899,31428,31849,34351,
-34782,34367,34194,31408,31606,36762,37933,12745,13774,10008,10270,34211,
-34951,29338,29543,36934,36778,36954,37523,29322,29819,31596,31917,20431,
-21085,18350,18649,29557,29920,31427,31890,34350,34845,34366,34193,31407,
-31605,36761,37977,12744,13852,10007,10328,34210,35029,29337,29542,36933,
-36777,36953,37617,29321,29859,31595,31999,20430,21197,39509,41834,39497,
-41822,39416,39422,36636,26312,40618,12761, 9997,34313,34157,34332,17789,
-17803,11304,20403,35947,35928,28628,34176,31574,31374,20418,31390,18323,
-29286,29524,29304,30739,36722,33314,33334, 9652,18334,19453,19442,36740,
-36896,12734,36915, 9996,34312,34156,34331,17788,17802,11303,20402,35946,
-35927,28627,34175,31573,31373,20417,31389,18322,29285,29523,29303,30738,
-36721,33313,33333, 9651,18333,19452,19441,36739,36895,12733,36914,26314,
-40623,12765,40108,39363,34244,18711,34242,34102, 9962,32204,20358,35465,
-31511,10662,34100,21614,31305,38045,31303,20356,29212,18278,29210,35574,
-36667,19038,29469,14373,18276,38264,12694,30319,36822,36665,36820,22228,
-34292,18709,34297,34146, 9991,32202,20394,35463,31554,10660,34150,21612,
-31353,38043,31358,20397,29263,18314,29268,35572,36711,19036,29508,14371,
-18317,38262,12726,30317,36873,36715,36878,22226,26350,24269,27187,27023,
-34349,33623,34365,34192,10006, 9763,20429,19758,31594,30997,34209,33641,
-31406,31604,31426,30986,29320,28908,29336,29541,36760,36220,29556,28899,
-18349,17910,12743,11882,36932,36776,36952,36183,34348,33627,34364,34191,
-10005, 9759,20428,19762,31593,31001,34208,33637,31405,31603,31425,30982,
-29319,28912,29335,29540,36759,36224,29555,28903,18348,17914,12742,11886,
-36931,36775,36951,36187,34330,18612,34311,34174, 9995,31998,20416,35028,
-31572,10327,34155,21196,31388,37616,31372,20401,29302,18332,29284,34844,
-36738,18648,29522,13851,18321,37976,12732,29919,36913,36720,36894,21052,
-34329,18579,34310,34173, 9994,31916,20415,34950,31571,10269,34154,21084,
-31387,37522,31371,20400,29301,18331,29283,34781,36737,18624,29521,13773,
-18320,37932,12731,29898,36912,36719,36893,20995,39415,36635,36645,36634,
-18150,32346,18876,18918,24312,24295,43680,43679,43678,43677,26441,26422,
-24311,28102,24294,28101,28100,26440,28099,26421,29619,31706,35564,30395,
-24748,12785,38909,17715,34572,32943,34565,32942,33109,32941,33107,32940,
-33462,32939,33464,33255,33791,32938,33839,32937,26996,33854,42329,33231,
- 4860,26990, 4869,42075, 4812,31180, 4889,42318,30662,30658,42070,31184,
-42110,29066,28535,28538, 4851,41955, 4868,29084, 4811,42109, 4886,26761,
-41954,35888,26760,36447,33841,33229, 6909, 6154,33836,33460,36639,34574,
-33128,35369,32936,35343,32935,35345,33257, 4929, 4853, 4801, 8174, 8594,
-26661,35341,33835,20883, 4403,27646,33832,36456,29081,34567,33172,36633,
-33793,33174,35371,33176,20032, 6170,31135, 7934,31122,21877,36400,15196,
-38669,38458,32136,32394,36405, 8854,12314, 8759,21876, 7933,32393,31121,
-38668,12313,36399,36404,32135, 8758,15195, 8853,38457,31134,20031, 7031,
-27226,35360,33777, 6907, 6152,27545, 7976,27376, 7910,25374, 5783,40720,
- 5590,40719,27247, 8608,27078, 8710,11395,25577,19533,25579,25372,34570,
-33459,36372,38122,40107,18793,26105,38657, 5299, 6951, 5277, 6942, 5207,
-35783,36420,35787,36422,35213,30152,35211,30150,35122,30023, 8388, 8378,
- 8328,24307, 8365,36415,36414,35216,30155,26359,24273, 8422, 8428, 5279,
- 6944, 5209,32415,39946, 7623, 5315,32412,39943, 7620, 5312,18875,32509,
-16150, 2984,35426,30960,32517,16139,30869,11425,25477,25461,30880,11462,
-30866,11422,39427,30599,35836,36440,36444,10217,34885,14438,42333,10393,
-20892,14503,42335,10413,20894,10266,34883,20882, 5976,26660, 7452,40393,
-22765,40392,42558,17686,24994,24996,38675,37474,26104,38673,37292,41297,
-41296, 5257,41295,42384,35378,31144, 7315,41309,22694,41308,42557,18046,
-26133,26138,42926,17689,25000,24998,26707,26706,11659,19707,23731,16164,
-22675, 3628,22673, 3626,27999, 3736,16172,22678, 3635,22677, 3634,28001,
- 3741,36160,14714,11656,36158,14704,11128,11130,11151,11166,11150,11165,
-18238,11137,11136,11156,11171,11139,11158,11173,43676,43675,40426,40422,
-23861,43674,43673,25549,11054,28809,30936,11052,11058,24334,28821,28828,
-30949,37997,11056,37655,19527,24456,19529,24467,17847,28737,30847,28736,
-30846,17852,24463,38607,24789,38434,22436,24452,22433,24449,18761,32104,
-30104,18766, 9511,24629,23450,22216,19145,21808, 9502,24823, 9509,24627,
- 9506,24624,23447,22213,10827,22210,19142,10825,27623,21805, 9499,24821,
-12241,24413,11978,11977,24351,37674,12240,38014,12239,24346,11976,11975,
-24408,38009,12238,37669,36177,23963,36172,23958,34838,10321,34735,29788,
-34724,29777,29106,29096,34761,10289,12275,18486,39272,17971,34802,10265,
-12256,24403,12237,12236,24341,37664,12254,38004,12252,24339,12235,12234,
-24401,38002,12250,37662,36165,23951,36167,23953,34650,29703,34652,29705,
-25917,25916,25915,25914,25913,25912,12270,24399,12269,12268,24337,37660,
-12267,38000,36163,23949,34648,29701,39271,39270,39269,39268,39614, 9840,
-39611, 9837,39311,39313,15815,18446,15664,18407,25958,25957,39326,39325,
-15938,18403,11852,24415,11851,11850,24353,37676,11849,38016,11848,24410,
-11847,11846,24348,37671,11845,38011,36179,23965,36174,23960,23948,36162,
-34737,29790,34726,29779,23955,36169,25637,25636,25635,25634,39114,39113,
-39112,39111,39110,39109,25665,25663,12587,18541,11879,18498,14047,18440,
-25702,25701,39166,39165,14090,18402,39108,17936,11844,24405,11843,11842,
-24343,37666,11841,38006,34806,10216,34670,29723,34760,10233,11867,24398,
-11866,11865,24336,37659,11864,37999,34647,29700,10477, 2940,32467,16149,
-32466,16148,22209,30149,27815,22206,30146,27818,21516,30358,29052,42781,
- 5262,29055, 5650,32406,39962, 7642, 5292,32403,39959, 7639, 5289,30355,
-31454,31143,27276,27113,15961, 8496,22495, 8542,26122,26114, 9817, 9816,
-40359,40358,40357,38632,36068,38628,36066,25364, 5587,25362, 5585,27744,
-35164,27741,32167,30182,43039, 8749,28286,30437,28285,30436,28557,30676,
-23626,25167,28284,30435,15392,38911,22203,15663,28480,30608,28283,30434,
-13472,38888,38891, 9556, 9558,32073,17462,28408,30540,28282,30433,28281,
-30432,28546,30667,23599,25139,28280,30431,32743,17461,17460,16952,32742,
-32889,17532,32841,17492,32823,28445,30560,26002,23327,17046,17276,23175,
-41237,32840,32328,32320,26000,23174,17275,17045,23326,41235,16461,22851,
-41251,16456,22848,41249,14757,14744,14494,14440,28961,31061,24084,26022,
- 9874, 9881,41268,41241,15171,24103,26041,24102,26040,24101,26039,24100,
-26038,24099,26037,41261,24098,26036,24096,26034,24095,26033,24094,26032,
-28970,31070,24093,26031,17457,14547, 9868, 9879, 9866, 9877,28967,31067,
-24111,26049,15173,41263,24108,26046,39341,22202,15662,28964,31064,24106,
-26044,28960,31060,24082,26020, 9865, 9876,32852,17456,17548,32851,17455,
-32816,32785,32916,17531,17044, 9586, 9584,32333,32325, 9591, 9589, 9595,
- 9593,28279,30430,12843,38913,22201,15661,28482,30610,40679,23173,17043,
-25319,23325,17274,40677,23324,17273,25317,23172,17042,32839,32327,32319,
-13094,11464,19592,25465,14477,13090,14461,13088,11377,11369,28713,30829,
-23737,25323,13425,39016,38994,39015,38993,39014,38992,39013,38991,39012,
-38990, 9676, 9671,17454,28706,30823,28704,30821,11381,11373,13427,25313,
-22200,15660,11379,11371,11376,11368,28703,30820,28278,30429,36332,17990,
-14546,14542,14497,14496,22199,15659,17992,36342,13093,13092,22198,15658,
-36055, 2866, 2829, 3638, 3744, 3499, 3633, 3740, 3484,11658, 3631, 3738,
- 3477,11670,11655, 5719, 3176, 5341, 4133, 4211, 6542, 5449, 3341, 6652,
- 3662, 3115, 5396,14196,14706, 3112, 5394,14194,14701,42953, 8732,11657,
-19706, 7754, 3118, 5400, 5399, 3481,11676,19712, 7757,11654,19704, 7752,
- 5403, 3483, 3120, 5402,14198,14713,27282,27129,15657, 8469,22197, 8525,
-25605,25607, 5438, 3330, 5347, 2330, 4205, 6539, 4204, 6536, 4216, 6535,
-18237,30015, 5335,42108, 5656,42107, 5334, 4130, 4202, 6534, 9809, 9807,
-12024,12022,26008,26705,31206,13483,12498,43672,43671,41432,41401,28098,
-41431,41400,28097,12417,12474,37392,41411,10446,37390,41407,43005,41462,
-12490,13482,12473,13478,12472, 4325,13891,13909,41113,11025,11027,11024,
-41934,41909,41932,41907,41930,41905,43557,43224,41928,41903,25633,26470,
-39107,22052,15418,25818,26704,10264,10263,10262,10261, 9791, 9790, 2808,
-12838,12830, 2417, 2470, 2512,26469,25852,26468,26467,26466,26465,12840,
-41950,41925,41947,41922,41942,41917,41939,41914,15417,22051, 7469,12848,
-12847,12835,26703,26702,26701,26700,26699,25611,31367,29516,42166, 4823,
-42009, 4867,26799, 4810, 4873,34306,36887,42106,26907,41953,31562,29277,
-34302,26934,42162, 4821,42005, 4866,31559, 4809, 4871,31363,29273,42105,
-29513,41952,26759,36883,13383,12952,13474,12951,13042,12950,13020,12949,
-14487,15161,13350,13349,20985,20984,27892,27483,13348,20983,25782,13347,
-20982,25206,12948,12947,20544, 4262,12946,12945,26464,14072,26566,26463,
-14046,26580,26462,18439, 4603,14071,13524,14070,18453,18438,17861, 4657,
-26461,17863,13626,18471,14057, 4633,13523,14045,22196,21308,39164,39106,
-39324,34716,29769,10260,10259,10258,10257,10256,10255,13793,13786,13790,
-13783,10254,10253,10252,10251,42104, 9370,42103, 4943,42102, 8891,42101,
- 4942,42100, 5521,42099, 4941,42098, 4940,42097, 5861,42096, 5548,42095,
- 4939,42094, 4938,42093, 5224,39607, 6179,39604, 6176,39600, 5011,39597,
- 5008,32103,30103,11072,11078,12111,13800,13797,39315,12034,12944,13018,
-26606,13076,13075,13600,32387,18401,26557,32345,32365,14060,26556,14059,
-26555,34072,34074,35363,33779,32386,32385,32344,32363,14015,13566,18400,
-18399,32343,32360,41729,41726,14014,13565,32342,31867,18491,10102,13908,
-18497,32463,16138,39646,39105,39267,39266,39104, 8395,38401, 6355,41721,
- 2806,14942,14940,15509, 2419, 2472, 2515,15507,38567,30014,30070, 6192,
-21609,14364,18236,30013, 5520, 4129,14974,15523,13346,13345,13381,13344,
-13040,13343,14489,15163,24034,23979,13415,25700,25956,25911,18771,18770,
-14056,10057,10087,17950,18452,18437,18457,10079,14044,17955,25910,25632,
-25631,30112,25667,14089,14069,15937,24022,15654,15908,17948,18398,18397,
-32341,15653,30111,12274,11878,12266,12265,12264,12263,11863,11862,11861,
-11860,11840,11839,11838,11837,11836,11835,11834,11833,11974,11973,12233,
-12232,11832,11831,11830,11829,12231,12230,11972,11971,12229,12228,12248,
-12246,12260,12258,12227,12226,32071,25909,12471,23983,23975,13362,39031,
-39034,23974,23973,24018,13370,24017,25987,23323,17041,17272,23171,41218,
-41216,23170,17040,25985,23322,17271,16688,16705,41214,41212,41210,43228,
-43561,41208,41207,43742,19608,11484,16702,22946,41206,41222,23193,17068,
-25991,23345,17302,41220,32632,32631,32629,32628,24058,43750,43745,25983,
-24057,43749,43744,25982,16694,16693,16711,11413,41203,43739,19605,11481,
-16698,22943,41202,11444,12020,11198,11196, 2533, 5649,11154,11169,19364,
-19373,23443,23442,25123,25132,17605,17604, 9495, 9494,11149,11164,19361,
-19370,23441,23439,25120,25129,17603,17601, 9493, 9491,11276,19424,25193,
-11263,28096,22842,19411,28093,16450,25186,22839,16447,14152,14598,14154,
-14600,40573,43670,43669,40565,11273,19421,25190,11260,28090,22836,19408,
-28087,16444,25183,22833,16441,40575,40567,11622,11639,19673,19690,23659,
-23654,25584,25596,17786,17781, 9645, 9639,40577,40569,11148,11163,19360,
-19369,23657,23652,25119,25128,17784,17779, 9643, 9637,11628,11646,19679,
-19697,23437,23436,25589,25601,17599,17598, 9489, 9488,25173,21913,15232,
-25175,22538,16001,12943,12942,20543,20542,27895,27486,11632,11651,19683,
-19702,23644,23642,25591,25603,17769,17767, 9618, 9616,11621,11638,19672,
-19689,23435,23433,25583,25595,17597,17595, 9487, 9485,24843,24802,27885,
-27476,24840,24799,27882,27473,11280,11267,19428,19415,24847,24806,11243,
-11222,11278,11265,19426,19413,24845,24804,11247,11226,11246,11225,11245,
-11224, 9633, 9626, 9631, 9624, 9630, 9623, 9629,22193,22192, 9622,11609,
-19664, 6702,11613,19668, 6646,11653,10814,19162, 2877,11724,19735, 6704,
-11720,19731, 6648,12357,10807,19156, 2750,35666,14645,35664,14654,14724,
-11679,19715, 6691,35668,14649,10928,10937,12356,22619, 3566,27955, 3703,
-22617, 3564,27953, 3701, 3642, 3747, 3503, 3652, 3754, 3510, 3650, 3752,
- 3508,12361,10908,19215, 2747,10907,19214, 2708,10905,19212, 2706,12355,
-22624, 3568,27957, 3705, 3648, 3750, 3506,10913,19219, 2711,36153,14644,
- 3409, 2351,16161,22670, 3623,22669, 3622,27996, 3733, 3621, 3732, 3472,
-36155,14698, 5721, 3178,11637,11620,19688,19671,25594,25582, 6644, 2752,
- 7104, 3068, 5757, 3211,22609, 3556,27948, 3691, 3647, 3749, 3505,11625,
-19676, 2678,14720,14712,14697,12350,20053, 6708,10920,10912,19224,19218,
-24965,24961, 6625, 2710, 7088, 3038, 5725, 3182,14643,11645,11627,19696,
-19678,25600,25588, 6598, 2670, 7057, 3002, 5681, 3137,11643,11624,19694,
-19675,25598,25586, 6604, 2677, 7061, 3006, 5685, 3141, 6665,11636,11619,
-19687,19670,25593,25581, 6597, 2669, 7056, 3001, 5680, 3136, 7420, 8000,
- 6079,22010,27569, 1609,15345,28036, 1696,16260,22730, 1661, 5493, 1546,
- 6090, 1536,14782,14264, 5488, 3076,11352,19501, 6767,11351,19500, 6759,
- 7423, 8002, 6081,22012,27571, 1593,15349,28040, 1694,16262,22732, 1659,
-11360,11358, 4196, 6563, 4559, 2510, 5632, 6430, 6983, 5538, 5417, 3315,
- 2532, 5648, 6454, 6991, 5552, 7418, 7998, 6076,22006,27567, 1615,15341,
-28034, 1703,16258,22728, 1668, 7429, 8005, 6096,22015,27574, 1945,15354,
-28043, 2010,16268,22736, 2045,11018, 7431, 8007, 6100,22017,27576, 1943,
-15357,28046, 2008,16271,22738, 2043, 7354, 7956, 6008,21954,27522, 3450,
-15280,27974, 3718,16127,22646, 3599,11022, 7356, 7958, 6010,21956,27524,
- 3452,15282,27977, 3720,16129,22648, 3601, 3219, 5763, 3215, 5759, 3217,
- 5761,12345, 7373,21966,15294,12347, 7375, 7969, 6025,21968,27538, 3512,
-15296,28009, 3756,16192,22687, 3654, 6020, 3468, 7964, 3728,27533,27992,
- 7367, 3617,21962,22665,15290,16157,11605,11607, 6022, 3470, 7966, 3730,
-27535,27994, 7369, 3619,21964,22667,15292,16159, 7212, 7880, 5884,21812,
-27338, 1956,15096,27654, 2021,15695,22246, 2056,15652, 7176, 7863, 5878,
-21771,27307, 1958,15057,27622, 2023,15651,22191, 2058, 5882, 1979, 7878,
- 2086,27336,27652, 7210, 2119,21810,22244,15094,15693,15650, 5877, 1981,
- 7862, 2088,27306,27621, 7175, 2121,21770,22190,15056,15649, 5903, 1972,
- 7898, 2079,27364,27706, 7254, 2112,21835,22345,15128,15791, 5905, 1970,
- 7900, 2077,27366,27708, 7256, 2110,21837,22347,15130,15793, 7277, 7914,
- 5937,21844,27383, 1947,15150,27748, 2012,15903,22442, 2047, 7279, 7916,
- 5939,21846,27385, 1942,15152,27751, 2007,15905,22444, 2042,11579,15682,
-15954,15648, 7174, 7861, 5876,21769,27305, 1951,15055,27620, 2016,15647,
-22189, 2051, 7225, 7887, 5893,21818,27346, 1941,15107,27681, 2006,15745,
-22304, 2041, 5965, 1995, 7927, 2103,27417,27801, 7292, 2136,21871,22489,
-15188,15956, 5967, 1997, 7929, 2105,27419,27805, 7295, 2138,21873,22492,
-15190,15959,15725,15646, 5875, 1974, 7860, 2081,27304,27619, 7173, 2114,
-21768,22188,15054,15645, 5898, 1969, 7893, 2076,27359,27701, 7249, 2109,
-21830,22340,15123,15786, 5963, 1993, 7925, 2101,27415,27799, 7290, 2134,
-21869,22487,15186,15953, 5975, 2335, 1930, 5492, 3095, 5371, 1929, 5238,
- 4396, 6018, 3466, 7962, 3726,27531,27990, 7365, 3615,21960,22663,15288,
-16155,15644, 5874, 1989, 7859, 2097,27303,27618, 7172, 2130,21767,22187,
-15053,15643, 5896, 1991, 7891, 2099,27357,27699, 7247, 2132,21828,22338,
-15121,15784, 5901, 1987, 7896, 2095,27362,27704, 7252, 2128,21833,22343,
-15126,15789,40964,40969,11764,11763,12001,12000,19881,19880,27891,27482,
-25817,25816,22535,21910,15998,15229,11762,11761,19755,19754,27894,27485,
-25630,25629,22537,21912,16000,15231,40905,40903, 9789, 9788,40901,40899,
-40897,40896,40966,40971,40909,40907,40895,40894, 6556, 2584,10923,19227,
- 7632, 5986, 2350, 6894, 5573, 5343, 2349, 6532, 2574, 6531, 2573,11135,
- 5333, 2323, 6530, 2572, 6538, 2576, 6558, 2586, 6548, 2579, 6523, 2567,
- 6552, 2581,42955,43330,42965,43372,42963,43370,43386,42977,43388,42979,
-43328,42952,27399,27780,18424,10069,27918,27458,27867,27441,27850,27237,
-18451,10078,26723,26534,25881,26460,25851,25613,25872,25850,25533,33674,
-28935,33476,28743,34646,29699,15642,22186,10387,20541,25975,33672,28932,
-25970,25973,25724, 6489, 6488,22185,16713,32639,32637,35179,30117,23822,
-35131,30072,15714,22269,15641,22184,15819,22373,15848,22391,12098,15640,
-22183,22249,16565,32569,32571, 9719,33478,28745,23832,25719,25969,25718,
-34680,29733,14043,18436,14466,14392,25879,25878,39323,17980,39257,17970,
-39317,17978,26434,29669,40064,43549,26428,39091,17935,39163,17943,39090,
-17934,39625,18600,34033,34028,34031,32368,15883,33670,28930,41658,41677,
-41679,39052,40789,10443,20697,10475,20687, 6684, 6686,10479,20540, 6681,
- 6680,18396,10056,14100,18395,32340,15639,21550,16438,32542,32541,22717,
-16437,32540,32539,15638,22182,35542,14642, 7787, 7786,10643,19009,10642,
-24512,19008,24672,12068,19901,24016, 6774, 6773,15637,22181,34007,34006,
-41647,41646,27847,27438,26554, 9787, 9786, 9785, 9784,43226,43559,43555,
-43222,25849,25610,26004,26007,15109,14390,26698,25609,10775,34837,15977,
-15208,22514,21889,27846,27437,15976,15207,27398,27397,21864,21863,22513,
-21888,27779,27778,15181,15180,27845,27436,22476,22475,15944,15943,24033,
-24032,23978,23977,27844,27435,22564,22563,16041,16040,27843,27434,21895,
-21894,15214,15213,27842,27433,22520,22519,15983,15982,15206,21887,15205,
-27865,21886,27456,27841,27432,21015,21014,13387,13386,27840,27431,20628,
-20627,13030,13029,15204,21885,25773,12104,12103,11744,11743,12094,12096,
-10779,34810, 9700,23972,23971,27861,27452,20981,20980,13342,13341,11739,
-11738, 7942, 7940,10724,10721,23970,23969,23982,24015,23968,23967,24014,
-23981,24013,24025,24027,24012,12070,27864,27455,22512,22511,15975,15974,
-27863,27454,20636,20634,13035,13032,24511,24671,19132,19131,10760,10759,
-10732,10735,24516,24676,19106,19108,10731,10734,24510,24670,19113,19112,
-10741,10740,24509,24669,19062,19061,10684,10683,10781,34759,15212,21893,
-25753, 7947,10429,10571,18816,18957,24508,24668,10426,10568,24505,18813,
-18954,24665,27870,27461,21901,21898,15220,15217,27873,27464,22526,22523,
-15989,15986,10439,10588,18828,18964,24526,24686,10437,10586,24524,18826,
-18962,24684,11737,11736,11945,11944,10596,10595,11735,11734, 9849, 9848,
-12067,12066,14142,14587, 9783, 9782,12065,12063,19900,19898,25848,25846,
-24011,24009,17969,17967, 9847, 9845,27876,27467,20539,20538,12941,12940,
-15223,21904,25776,12061,12060,14139,14584,12117,12115,19916,19914,25887,
-25885,24044,24042,17976,17974, 9858, 9856,11432,19557,25411,28147,22914,
-16602,41080,11934,19847,25742,28084,22830,16436,12222,12284,16672,12217,
-12215,41025,43668,11931,19844,25739,28081,22827,16433,11412,41027,11312,
-19473,25900,25247,19933,12130,41029,11109,19341,25898,25106,19931,12128,
-12154,19940,25920,28156,22923,16635,12183,19958,25945,25943,19956,12181,
-12158,19944,25924,25951,19964,12197,11798,19788,25675,25673,19786,11796,
-11776,19772,25641,25639,19770,11774,24992,20537,12939,12938,20536,25208,
-12059,11760,19753,25628,25627,19752,11759,11818,19804,25696,25688,19797,
-11808,11820,19806,25698,25690,19799,11810,40597,40758,40595,40594,11733,
-11449,11453,19574,25452,28145,22912,16597,12058,11816,19802,25694,25686,
-19795,11806,40639,41075,40637,11758,16629,11108,12193,11999,19879,25908,
-25815,19937,12138,12206,12205,12038,11757,19751,25785,25626,19870,11960,
-12937,20535,25784,25002,20534,12936,12057,43728,43725,32603,11411,19550,
-25402,28149,22917,16605,23999,25793,23996,25790,11938,19851,24003,11913,
-11936,19849,24001,11917,11916,11915,12045,12042,13120,15165,12156,19942,
-25922,25823,19886,12009,12122,19926,25891,25643,19774,11778,12125,19928,
-25893,25625,19750,11756,11815,32602,30882,43667,40537,12120,19924,25889,
-25693,19801,11814,11107,12033,12192,19962,25949,28154,22921,16628,12191,
-19961,25948,12190,19960,25947,25839,19892,12032,12296,19991,26015,12292,
-27396,21862,19981,27777,15179,26011,22474,15942,15399,12056,12846,12547,
-17076,15466,12055,15522,39256,39255,39254,39253,39252,39251,39263,39265,
-39250,39249,39248,39247,41047,41046,41059,41061,41051,41045,41043,41042,
-41041,41040,41039,41038,41037,41036,41035,25752,22562,16039,25751,22518,
-15981,25750,21013,13385,25749,20626,13028,13044,20642,25772,11943,12102,
-11742,12092,41054,41053,41056,12137,41034,14685,12136,11996,25761,20979,
-13340,11732,12162,25907,17091,15471,15526,39246,19972,12273,12354,17039,
-15458,15506,25771,22510,15973,24007,19896,12053,12090,24029,19903,12089,
-24006,19895,12052,24005,19894,12051,15407,12851,41065,41064,41063,41070,
-41068,41049,12119,41032,25779,22529,15992,11924,12041,41078,41073,11731,
-11311,19472,25246,28144,22911,16596,12050,25764,20533,12935,12049,12100,
-19908,25863,12189,12110,11106,19340,25105,28153,22920,16627,12109,19912,
-25883,12262,11859,17316,14861,11730,14973,14817,11729,12834,12408,39101,
-39103,39089,39088,39087,39086,39093,39095,39085,39084,39125,39121,39124,
-39120,40887,40886,40885,40884,40883,40882,40927,40893,40881,40880,40879,
-11755,40878,14710,14683,11754,11753,25624,25623,14807,12832,39083,20489,
-12859,39082,20052,12349,39081,21547,14236,39080,39079,43776,43805,39078,
-40447,43732,17270,14840,14939,17396,14901,15027,12225,12244,40915,40914,
-40913, 9781, 9780,11077,40876,40925,40891,40889,40936,40934,39151,39147,
-39150,39146,11813,11812,40932,40930,40938,14394,11970,12224,40944,40943,
-40942,11828,11827,40940,11826,40911,40947,39308,39307,39140,39139,11752,
-19749,25622,25621,19748,11751,14389,39077,39076, 9722, 9721,12135,19936,
-25814,25906,19878,11995,12934,13377,12967,13339,39117,39116,39149,39145,
-39154,39153, 9830, 9829,13375,12933,13338,12970,40737,40739,40734,17453,
-16185,16111,14676,12161,12134,12133,19935,25905,25813,19877,11994,12179,
-11794,11750,11749,16595,11439,11438,19567,25441,15755,17269,15754,15753,
-25531,25446,25408,19555,11420,25620,26459,25475,25474,25473,19599,11474,
-25445,25444,19570,11442,25406,19553,11418,25399,19547,11408,16959,17482,
-13265,13337,15636,39056,22178,15634,28773,30900,39099,39097,39119,39123,
-39075,39074, 9703, 9705,17452,28766,30894,28763,30892,28762,30891,12175,
-19951,25937,25837,19890,12018,40756,16626,11529,39135,39137,14641,11793,
-19784,25671,11748,19747,25619,12932,20532,25424,12048,11528,11522,11747,
-19746,25618,11780,19776,25645,12178,19954,25941,11436,19565,25426,11993,
-11992,19876,19875,27860,27451,25812,25811,22516,21891,15979,15210,25844,
-30888,11476,30863,11415,25810,12017,12016,19889,19888,27839,27430,25836,
-25835,22509,21884,15972,15203,25834,25940,19953,25939,19544,25396,25395,
-25617,19745,25616,19562,25420,25418,25647,19778,25649,19560,25416,25414,
-25670,19783,25669,19543,25394,25393,34715,29768, 1823, 1805,12576,24366,
- 1065, 1012,24432,38030,12599,37738,35076,34899,38032,37740,24173,22266,
-24434,21419,27315,26681,20922,13278,20920,13276,29112,20926,13281, 1859,
- 1842, 1150, 1140, 9932,39742, 9931,39741,24819,39740,34742,29795,13907,
-18540, 1482, 1476,12573,24363,12596,37734, 1062, 1009,24428,38026,12611,
-42344,12595,37733,35078,34901,38034,37742,24175,22274,24436,21423, 9930,
-39739, 9929,39738, 9926,39729, 9925,39728,24831,39727,29130,37421,29129,
-37420,29099,29109, 1469,36495,37425,37424,37423,12586,18539,12624,42360,
-20171,42676, 1479, 1473,12626,20173,42362, 1481,42678, 1475, 8054, 9922,
-39720,29125,37415,38037, 1149, 1139, 1152, 1142,12620,20167,42355, 1145,
-42671, 1135,35453,39526,38500,38702,24594,22314,41882,29647,27291,27290,
-27617,27314,27289,12795,30387,38366,30408,38358,38363,38365, 2930,38357,
- 2387,37255,29642,37254,29641,37253,29640,19022,43201,30416,38370,27663,
-37246,36144,37245,38299,40063,31679,40062,31678,31738,31737,31705,35446,
-31723,24604,15633,41888,29654, 8044,31735,38376, 2386,35443,31719,35442,
-31718,32516,16284,32479,16283,35456,39528,38504,38704,24596,22316,41884,
-29649,24601,29658,41890,15385,37241,37244, 1421,40058,31676,40057,31675,
-38385,12811,24756,12793,29602,30390,38389,38388,29600,29596,29618,31704,
-34636, 1433,29689, 1438,43219,43551,24599,29653,41887,15383,24598,29652,
-41886,15382, 1285, 1418, 8050,38379,12806,24754,12791,24750,12787,38378,
-38384,12810,38375,38387, 1306, 1294, 1303, 1291,29617,31703,29612,31698,
-34634, 1429,29687, 1436,43217,43548,34630, 1300,29683, 1288,43212,43540,
-30964, 3798, 3778, 3800, 3780,35425,30959,32462,16137,32461,16136,36652,
-34579,34586,36650,34577,34584,34085,29464,31470,29585,31656,31506,29370,
-29462,31468,29583,31654,31504,29368,36644,21875, 7932,32392, 5254,31444,
-20450,38667,12312,36398,36403,31443,31624,36800, 8757,12755, 8518,15194,
- 8852,38456, 8493,31120,31133,36972,36799,36971,12754,32134,20030,31623,
- 6169,20449, 7030, 8702, 8337,38763, 9313,41293, 8934,36480, 8701,43062,
- 8761,18031, 8593, 8173,38803,36371,36370,36369,18030,18029,18028,27225,
-41287,29017,38339, 8204,38308, 8169,34386,32391,34385,34228,31132, 7931,
-33774, 8517,31642, 8756,34227, 5253,36397,31641,38666,35366,35201,38455,
-33771,29576,36805, 6168,29575, 8492,36402, 8851,29015, 7029,36978,36804,
-36977,30301, 8061,41292, 7297,38121,38120,36368,18792,38119,36491,38118,
-38117,38116,31119,31118,41283,18027,41285,18033,27911,27641,42858,42857,
-26103,35204, 5619,36383, 5616,36380,24771, 7553,40207, 6407,31301,24617,
-34240,40205,34238,34098,31299,39906,36663, 7199,39905, 6221,43351, 7551,
-34096, 6406,29208,43349,36818,36661,36816,42721,29206,27330,42720, 7197,
-27172, 6220,24769, 7550,40204, 6404,31297,24616,34236,40203,34234,34094,
-31295,39903,36659, 7196,39901, 6218,43348, 7549,34092, 6402,29204,43347,
-36814,36657,36812,42718,29202,27329,42716, 7195,27170, 6216,34504,30404,
-34501,30401,18155,41645, 6885, 6148,41642, 7307,41673,41778,22311,41672,
-22818,41641,22547,41640,22332,41639,26348,26380,22545,41668,18159,41675,
-38227, 2955,34005, 2993, 2916,38213,34004, 3252, 2894,38183,34025, 3229,
- 2887,38169,34020, 3222, 2627, 2643,38824, 9409,41720, 9218,36476, 2626,
-41719, 2595, 2647, 2634,23169,18235,22102,18234,18217,21766,22081,18233,
-37188,18232,18231,18230,18216,21765,21923,18229,18215,36632,14274,35340,
-34569,20455, 2653,31640,31453,36976,12760,36803, 2617, 8060, 8540, 8244,
-38393, 6849,41718, 6440, 2625,36148, 8149,38297,41717, 3792,18228,18227,
- 6920, 6161,18226,18225,18224,18223,21921,18222,18221,41757,26415,41756,
-26414,20448, 2591,31622,31442,36970,12753,36798, 2464,18210,26408,26407,
-41754,34549,35325,41666, 7314,41665,41776,22693,41664, 6432,42556,18178,
-26697,26356,26393,34087,38762, 9312,41711, 8933,36479, 2483,41710, 2455,
-38802,37153,37152,37151,18209,18208,21763,18207,29565,21760,37224, 2557,
-18220,37221, 2554,36643,20333,36602,39439,31285,36604,39484,24264,40237,
-40132,40235,40130,39442,31290,36609,41735,39478,24258,40093,40186,40088,
-40181,18143,34398,34435,37029,20279,36994,18145,34400,34437,37031,20281,
-36996,39483,24263,39482,24262,39486,24266,40091,40184,40086,40179,40083,
-40176,40081,40174,40241,40136,40239,40134,34758,10627,34757,10559,39303,
-39305,34812,10557,37291,38086,37290,38094,37289,38080,38614,37288,38662,
-37287,38664,37301,38656,37473,38655,30133,20531,10622,20530,10525,18394,
-10055,18422,10067,18393,10054,26458,26696,10410,13522,15751,22319,25877,
-34645,29698,34644,29697,34660,29713,38660,37435,37440,34753,29806,34751,
-29804,34672,29725,34643,29696,34642,29695,34656,29709,34662,29715,34730,
-29783,34732,29785,34677,29730,34641,29694,34640,29693,34667,29720,34666,
-29719,37327,38096,20808,13191,18392,18391,10053,20807,20851,13231,18390,
-18389,10052,20850,20857,13235,18421,18419,10066,20855,18410,10062,18477,
-10096,20791,13179,18409,18412,10061,20790,14025,18388,13571,18387,20836,
-13215,18414,18417,10064,20835,13521,18416,34836,10553,34691,29744,13625,
-18470,13520,18480,39295,39298,12931,20529,20572,10615,12981,20574,12930,
-20528,12929,20527,12928,20526,32453,16108,27288,18450,10077, 5631,37822,
- 5630,42452,42565,18490,10101,13290,20941,13178,20789,13214,20834,34706,
-29759,34699,29752,13177,18474,20788,20787,18476,10095,13213,18479,20833,
-20832,18482,10098,13176,18538,13175,18496,32478,16282,32460,16135,13212,
-20831,13174,20786,13220,20838,13190,20806,13230,20849,32339,15631,32362,
-15847,32337,15629,39186,39188,15802,22360,25843,39259,39261,15628,22173,
-25858,39245,39244,12083,12081,10274,39719,40156,40256,40155,40255,24386,
-15813,24636,13407,30271,30269, 6595, 6594,34679,29732,14042,18435, 6251,
- 6249,13292,20943,34704,29757,34702,29755,34701,29754,13119,13118,18533,
-32482,16287,10342,39718,40154,40254,40153,40253,24396,13488,24439,13440,
-30194,30193,34714,29767,38659,37400,37405, 8700,30362,30361,30170,30169,
-37413,34739,29792,39737,10247,30192,30191,34741,29794,13117,37729,13629,
-42340,24441,13487,24438,13490,39736,10215,39748,10210,39731,10209,39726,
-10220,39735,10208,39725,10245,39733,10222,39717,10213,20954,10594,10379,
-39764,10378,39763,39762,10528,40246,40143,40245,40142,40220,40105,40219,
-40104,18564,10135,20952,13301,18563,18571,10134,20960,10373,39756,18559,
-10130,20948,13297,18558,18567,10129,20956,10205,34916,34923,37772,13502,
-37765,10203,34914,34921,37770,13500,37763,39761,10377,40172,40079,40170,
-40077,40152,40252,40151,40251,39766,10523,40161,40261,40160,40260,40233,
-40128,40231,40126,34851, 9960,34232,34090,10334, 1864,21204, 1757,32005,
- 1601,35035, 1797,31293,31509,31895,20354,29864,18274,29200,29467,37983,
- 1814,29926, 1571,18655, 1742,13858, 1881,36810,36655,37623,12692,34934,
-34778,34003, 7306,34002,29395,34001,34498,34011,34508,34000,34497,40229,
-34492,41761,34931,34775,41968,34018,34514,40243,34516,42397, 1037,41633,
- 1031,41632, 1048,42392, 1022,41635, 1050,42394, 1024,41760,41631, 1046,
-42390, 1020,41629, 2954,41628, 2992,41627, 2915,41626, 3251,41650, 2892,
-41652, 3227,41656, 2886,41654, 3221,34263, 9979,34254,34121, 9970,  936,
-20366,  931,31521,  926,34112,  921,31315,31530,31324,20375,29222,18286,
-29231,29479,36686,  916,29488,  911,18294,  906,12712,  901,36842,36677,
-36833,12703,34381,31639,34224, 2650,34226, 2616,31621, 2599, 2652,36975,
-34384,36802,29572,36797,29574,36969, 2482, 6384,37645,37150,37149,39645,
-37635,37644,37632,37148,37147,37146,37145,37144,27910, 2624, 8314, 6262,
-41716,37187,38260,37297,37347,42609,32086,38078,37639,34016, 7313,34015,
-29397,34014,34512,37090, 2481, 2480, 2630, 2637, 2505, 6421,37518,37128,
-37399,37127,37495,37126,37469,37124,37468,37513,37142,37123,37511,37462,
-37299,37756,37434,37122,37141,37121,37140,39431,36631,37412,37404,37498,
-37494,37472,10043,37461,37460,37467,10039,37458,37457,37647,37138,37137,
-37120,37510,37517,37520,37174,37505,37439,29444,37119,37136,37135,37172,
-37170,37118,37117, 2641, 2632,39414,26406,26405,27640,42564, 2623,37566,
-37286,31638,12764,12757,41733, 2622, 2621,37527,37402,37492,10045,37455,
-37454,37465,37185,37508,37437,37184,37183,26413,27645,42561,20297, 2612,
-20295, 2610,35114, 2608,35112, 2606,12763,37557,39421,18930,22264,27005,
-21417,13951,24817,38564,38257,38562,37452,38560,30007,38068,32735,32711,
-38761,32710, 9311,38760, 9310,38072,32709,38071,32901,38070,32764,17268,
-23321,24825, 9217,24780, 9216,17267,38060,16897,38059,17340,38058,17530,
-38066,27635,27312, 7608,38801,32708,27786,32093,30095,22171,15627,38645,
-30126,38644,38643, 5247, 5530,32815,38800,32814, 9381,38799, 9380,38075,
-32813,27684,30333,18707,35295,27162,27153,35405,22170,39882,38555,24446,
-22351,39919,38609,24465,35332,27193,35291,27160,27150,35403,42950, 8731,
-42949, 8730,42948, 8729,42947, 8728,35377,32076,40005, 8482,40002, 8479,
-35541,14640,35540,14639,14313,27249,27251,17038,23168,24827, 9024,24782,
- 9023,17037,38063,27021,16563,38690,23265,21508,37451,38084,32336,32515,
-15626,32520,15625,32511,15677,32508,15624,32529,16280,38571, 5200,32335,
-15623,35539,14638,14662,14637,35552,14666, 8626, 8629,14668,14708,18932,
-22271,27007,21421,13942,24829,30360,42780,35108,30005, 5647,35143,30085,
- 5665,22165,18820, 5605, 5604,35347,32111,32506,15929, 6955, 5331,40061,
-43546,42762,18769, 6937, 5272, 6936, 5271, 6935, 5270, 6933, 5268, 5629,
-22268, 6939, 5274,22180,22164, 6946, 5281,25809,32240,18748, 8323, 8156,
- 8316, 8158, 8320, 8153, 5580,35374,32097,35335,32096,35334,32095,32513,
-15882,32367,15881,38759, 9309,43061, 8932,36478, 8059,38798,38115,38114,
-38113,18791,18790,18789,30347,37642,37515,37450,38130,37755,38112,38111,
-27909,27639,37569,38128, 3646,22685,16184, 6338, 1522,12640,12645,15371,
- 6342, 1510,12642,12647,15373, 6782, 6781,14798,21699, 6344,14796,21697,
- 6341, 7801, 1555, 7440,12375, 7443, 8012, 6107,22026,27582, 1592,15367,
-28052, 1693,16277,22744, 1658, 1489, 7435,12373, 7437, 8010, 6105,22021,
-27580, 1940,15362,28050, 2005,16275,22742, 2040, 7442,22025,15366, 7439,
-22023,15364, 7426, 1562,12340,12333,12338,12331, 5804, 3214,12342,12335,
- 6027, 3514, 7971, 3758,27540,28011, 7377, 3656,21970,22689,15298,16194,
-15505,12533,15504,14938,16379,14982,16012,12532, 6752, 1497, 6749, 1494,
-41395,41428,41393,41426,41397,41430, 7673, 2785,12396, 3807, 8862,12509,
-12436,12393, 5370, 3094,12439,12401, 5365, 3088,14737,14216, 5440, 3335,
- 3128, 5405,14200,14716, 3087, 5364,14181,14664, 7871,12398, 4411, 4409,
-12435,20087, 6593, 3074, 5351,14171,14636,12448,20094, 6591,12546,15118,
-21825, 7236,12545,20135, 6451,12407,12544,12406,12388,12506, 3804, 8859,
-12522,12505, 7664, 2776, 7671, 2783, 7717, 2884,41403,41434, 6017, 3465,
- 7961, 3725,27530,27989, 7364, 3614,21959,22662,15287,16154,15051,21757,
- 7169,12568,20156, 6382,14937,21735, 6848,41461,41460,12427,20084, 2755,
-31205,31204,16392,12489,12488,12426, 4417,13481, 2225, 7635, 2415,15621,
- 7167, 7858, 5873,21755,27302, 2239,15049,27613, 2245,15620,22163, 2261,
- 7304, 7938, 5973,21879,27421, 2241,15198,27830, 2247,15967,22504, 2264,
- 7251, 7895, 5900,21832,27361, 2237,15125,27703, 2243,15788,22342, 2257,
-16032,12416,20081, 7526,31201,12415,12414,15686,15952, 2667,15619, 7166,
- 7857, 5872,21754,27301, 1949,15048,27612, 2014,15618,22162, 2049,12423,
- 7223, 7885, 5891,21816,27344, 1939,15105,27679, 2004,15743,22302, 2039,
-12404, 7351, 7953, 6005,21951,27517, 3446,15276,27968, 3715,16106,22638,
- 3587, 2256,21296,12567,13748,20155, 2235, 2255,21295,12566,13747,20154,
- 2234,12560,20148, 6450,41459,15243, 3788,41450,15617,41420,41458,12425,
-20083, 2209,31821,12497,12496,15117,21824, 7235,12562,20150, 6449, 2227,
- 2223,12487,20114, 4245,12485,20112, 4243,12875,20501, 4242,14245,41418,
-41456,12559,20147, 2220, 6016, 3464, 7960, 3724,27529,27988, 7363, 3613,
-21958,22661,15286,16153,12500,12432, 7405, 7990, 6044,21993,27559, 1591,
-15324,28021, 1692,16231,22715, 1657,15316,41467, 2217,12430, 7400, 7988,
- 6042,21988,27557, 1938,15318,28019, 2003,16229,22713, 2038, 7404,21992,
-15323, 7402,21990,15321, 1457,21287,12552,13738,20140, 1453,41444,15320,
-41469, 1463,15615,15612,16030,12413,20080, 1444,12412,20079, 1443,31824,
-31818,12565,20153, 2233,12484,32070,12483,12482,13480,13746,21294, 2254,
-12481,20111, 4241,12480,20110, 4240,12492,20116, 6512,12479,20109, 6380,
- 2268,22161,15610,15609,22160, 2259,15966,22503, 2263,12420,12419,15685,
-22239, 2251,12495,12558,20146, 2219,12554,20142, 1460,15103, 2216,41454,
-12422,41409,41438,15245, 3790,41453,11020,40855,30973,11578,11577,11591,
-11575,11589, 4564,11583,11582, 2666,11586,11585,12828,12826, 5829, 3832,
-12874,12870,20498, 3812,12869,20497, 3811, 3831, 5828, 3830, 5827, 3834,
- 5831,12877,12879,12873, 7468,22050,15416, 2531, 5823, 3818, 3836, 3843,
-12884,20506, 3875, 3905, 5843, 3898, 5839, 3900, 5841,12888, 7474,22057,
-15423,12890, 7476, 8024, 6122,22059,27597, 3926,15425,28070, 3966,16337,
-22799, 3955, 6117, 1968, 8021, 2075,27594,28066, 7460, 2108,22041,22773,
-15405,16310, 7454, 8017, 6112,22034,27590, 1937,15390,28062, 2002,16302,
-22767, 2037, 6115, 1983, 8019, 2091,27592,28064, 7456, 2124,22037,22769,
-15401,16306, 7450, 8015, 6110,22032,27588, 1954,15388,28060, 2019,16293,
-22756, 2054, 6109, 1977, 8014, 2084,27587,28059, 7449, 2117,22031,22755,
-15387,16292,12895, 7488, 8031, 6129,22071,27604, 1590,15438,28077, 1691,
-16344,22806, 1656, 3810, 3826, 3829,12893, 7483, 8029, 6127,22066,27602,
- 1936,15433,28075, 2001,16342,22804, 2036, 7487,22070,15437, 7485,22068,
-15435, 5838, 3897, 3886, 3910, 3915, 3877, 3891, 3902, 3874, 3889, 3896,
- 3873, 3888, 3895, 3879, 3893, 3904, 6124, 3932, 8026, 3972,27599,28072,
- 7479, 3961,22062,22801,15428,16339, 3884, 3908, 3913, 3809, 3825, 3828,
-12865,43305,43632,43303,43630,43300,43627,43299,43626,14287,43298,43625,
-43296,43623,14936,21734, 6847,22080,14935,22079,19102,22101,19101,14934,
-43294,14933,43621,14932,14931,15462,15475,15457,15456,14956,14950, 6852,
- 6846, 6845,15485,14333,14993,14992,14981,15007,15006,15005,15022,15014,
-15010,15009,15004,15025,14351,15024,15483,15020,14349,15012, 5524, 1639,
-14997,14337,14991,14332,14980,14979,14978,14995,14335,14984, 5519, 1906,
-14339,15000,14999,43316,43637,15003,15479,14306,43314,43635,15041,14354,
-15040,15493,15044,14356,15043,15495, 6866,14914,21725, 6369,14916,21727,
- 6371,12858,20488, 6820,12872,20500, 3817, 3953,22796,16334,12883,20505,
- 3872, 3952,22795,16333, 3951,22794,16332, 3865,22785,16323,19032,19100,
-38551,19030,19099,38548,30001,29999, 6915, 4625, 4602,35104,29997,15608,
-22159,15607,22158,15821,22375, 3127, 3334,35145,30087, 3314, 3325,15606,
-27585, 4632,15846,22390,40060,43545, 2385, 2530, 2543,40009,43415, 2964,
-38234,30168,30190,40054,43537,30277,23167,19097,40033,43462,38797,32707,
- 2929,30189,40458,23320,17266,25101,23166,17036,40446,23349,17310,25097,
-23198,17075,38926,38925,38924,38923,39028,39026,38922,38921,38920,38919,
-39041,39043,40452,40462,40454,40445,40444,40442,40449,32588,32587,32586,
-40456,23339,17294,25099,23187,17062,32922,32788,16896,17339,32594,40441,
-16617,25096,16879,23055,40439,16911,23063,40438,40437,23400,17527,16871,
-23049,40436,40435,22906,16587,40434,22905,16586,16585,22904,40433,40432,
-22903,16584,16868,23046,40465,16590,22909,40464,16609,16607,16594,43731,
-43730,40431,40430,39039,39038,39037,39036,16616,38937,38936,39243,39241,
-38935,38934,39292,39288,17173,16615,16752,16614,16613,16612,16744,16611,
-16789,39239,39238,16852,17211,32900,32763,16623,16621,11076,11075,39237,
-39236,39278,39277,39276,39275,11952,19862,25769,25748,19855,11942,32899,
-32762,17499,17451,17325,25842,21445,14034,17484,16791,25870,23275,17187,
-25841,23273,17185,25876,23263,17165,11948,19858,25763,13414,13413,39216,
-39215,39197,39196,39291,39287,12478,12477,13373,13336,13335,13368,12031,
-12030,39235,39234,12108,12107,39284,39283,11941,11940,19854,19853,27900,
-27491,25747,25746,22542,21917,16005,15236,39233,39232,39203,39201,27879,
-27470,27855,27446,27838,27429,25904,25903,25745,25955,25902,18666,42563,
-25759,25755,25998,27775,25808,27637,27015,27615,41158,41157,27836,27427,
-27049,27611,39207,39211,11951,11950,19861,19860,27835,27426,25768,25767,
-22508,21883,15971,15202,25766,11956,11954,19866,19864,27875,27466,25778,
-25775,22528,21903,15991,15222,39221,39219,39224,39223,39290,39286,39231,
-39230,39281,39280,14930,14929,14847,14954,14316,21588, 3816,14319,21591,
- 3882,14318,21590, 2882,14948,14946,14294,21570,  893,14296,21572,  964,
- 8262, 8413, 8261, 8412, 8253, 8404, 3081, 5860, 3167, 5859, 3175, 8260,
- 8411, 1395, 1411, 1414,21584,14311,14347,21606, 1403,14305,21581, 1409,
-14342,21602, 3815, 8259, 8410, 8258, 8409, 8252, 8403, 1406, 1393, 1111,
- 1117,14703,14648,14660, 8187, 8350, 3080, 2322, 5710, 3166, 5718, 3174,
-11162,11147,19368,19359,25127,25118, 6642, 2749, 7102, 3062, 5755, 3209,
-11161,11146,19367,19358,25126,25117, 6623, 2705, 7086, 3036, 5723, 3180,
-14635,11168,11153,19372,19363,25131,25122, 6590, 2665, 7054, 2999, 5678,
- 3134,11160,11145,19366,19357,25125,25116, 6600, 2674, 7059, 3004, 5683,
- 3139,14894,16401,15605,15603,14362,15842,14927,16368,43326,42946,43324,
-42944,43321,42941,42939,43319,43255,43588,43263,43596,43262,43595,14473,
-21643, 6260,30231,32200,38696,30229,38545,30262,30167,38588,30018,30166,
-30012, 3276, 3434,43569,43236,43566,43233,16329,22791, 6234,16050,22573,
- 6247, 7829, 7736, 7585, 7869, 7600, 6756, 7794, 7740, 6576,14475, 6583,
- 7597, 4175,14479, 4170,15601,22157, 6792,15140,15600,22156, 7261,14360,
- 2881, 2805, 5527, 2986, 2945, 2937, 2928, 2927, 2384, 2977,38654,30261,
- 8287, 8126, 8281, 8116,  830, 8286, 8125, 8285, 8124,  824,  827, 8303,
- 8131, 8302, 8123, 8307, 8101, 8300, 8301, 8120, 8121, 8299, 8119, 8297,
- 8118, 8295, 8104, 8292, 8129, 8306, 8103, 8308, 8106,30038,30035,38259,
-30315, 8425, 8427,32057,14884,13417,15599,22155, 6511,15656,22195, 7821,
- 6331, 6427,15712, 6424, 7414,15705,22257, 6844, 5887, 5799,16243,14926,
-21733, 6841,15598,15965, 6473,22154,15597,15868,15596,15840,22386, 6843,
-14445, 5911, 5635,14453,14444,14448,15830,15844,22388, 6840, 5913, 5628,
-15833,15827,15826,14839, 7575,15595, 2872, 2741,14925,21732, 6839,15594,
-22153, 2833,15593,22152, 2835,15592,22151, 2438,15591,22150, 2432, 2664,
-15875,22409, 2445, 2717,15589,22148, 7839,16355,16374,15782,22336, 7823,
-16357,22809, 7240,16207,22702, 7765,14756,14227,14755,14226,14754,14225,
-16218,16217,43513,43174,43510,43171,16224, 6719,21546,14235,16216,22706,
- 6725,14763,14230,16220,15588,22147, 7390,15933,22467, 7388,43505,43166,
-43502,43163,16209,22704, 7767,15811,22366, 7394,16146,22656, 7387,16145,
- 3605,22655,16144,15587,22146, 7231,15855,16035,15854,16034, 2839,15860,
-22399, 2838,15859,22398, 7229,15586,22145, 7501,30128,38653,30132,38652,
-38681,38651,30131,13334,16069,22590,16078, 6270,22599, 6269,16181,12927,
-27932, 6914, 6960, 5414, 8057, 5957, 6506, 6505,18941,18940,10538,10537,
-16179,13333,16170,13332,16388,15017, 7588, 6306, 5236, 5811, 5851, 5869,
- 6740, 7127, 5798, 6468, 6996, 5564,14405,14018,14404,14017,15770, 6466,
- 6994, 5562,14450,14447,15769,15768,15767,16373,22815, 7228,14407,14020,
-15772,16122,22643, 7227,14409,14022,14443, 5547, 5223,32069,27917,16038,
-22561,16037, 6291,22560, 6288,27915,15874,22408, 4435,15801,22359, 4459,
- 6574,22144,15585, 6562,22358,15800, 6582,22406,15872,16011, 5655, 4128,
-15584,22143, 4437, 5660, 4093,14634,14633,14632,14631,43483,18998,16048,
-22571, 6258,43478,43131,43475,43128, 6707,21367,13906,16183,22684, 4239,
-14678, 6689,21336,13835,14680,16124,13331, 5770, 5919,14672,14671, 5768,
- 5868, 5766, 5907, 6561, 4189,15911,22448, 6838, 5943, 5627, 6442, 6987,
- 5542,15703, 5594, 5416, 5598, 6075, 7011, 7997,28033,27566, 6496, 7417,
-22727,22005,16257,15340,15583, 5600, 5867, 7013, 7854,27610,27300, 6498,
- 7163,22142,21753,15582,15047, 5945, 5645, 6724, 7116, 5787, 5602, 5947,
- 7015, 7918,27754,27388, 6502, 7285,22459,21851,15927,15157, 5597, 5962,
- 7010, 7924,27798,27414, 6495, 7289,22486,21868,15951,15185,15455,16352,
-15503,16351,16350,15513,22106, 7835,14844,21717, 7820,14886,21720, 7819,
-15410,22044, 7818,14825,21708, 7817,14824,21707, 7816,16199,22692, 7815,
-14883,14823,43587,43254,43586,43253, 7825, 2663,16362,22811, 1398,16367,
-16366,43289,43616,43594,43261, 2414,16372,22814, 1155,16371,22813, 2421,
-16359,43280,43613,43252,43585,14838,16365,16364,43278,43611,43275,43608,
-43273,43606,43291,43618,15447,38524, 8682,15449,38526, 8684,43271,43604,
-43270,43603,43598,43265,43259,43592,16370,43269,43602,43017,43408,15858,
- 3596,22642,16121,15857,22397, 2837,14234,21545, 6718, 5782,14743,21688,
- 6318,16198,16215,16304,16214,16197,16213,16206,22701, 7764,16205,22700,
- 7763, 6717,21544,14233,16291,16212, 5810,43103,43458,40124,14170,40123,
-14169,30188,30187,38695,30186,38694,30185,32066,32060,14630,14629,14628,
- 3343, 7680,39970,32449, 5425, 7677,39967,32446, 5422, 8440, 8451, 3712,
- 3440, 3696, 3415, 3589, 3585, 3711, 3439,14244,43101,43456, 6671,21079,
-13519,15581,16237,43099,43454,43111,18997, 3710, 3438,43109,18995,43123,
-43470,43120,43467,16101,22636, 3583,15932, 3604,16312,16142,14805, 5765,
- 5233,43113,43460,16120, 3595,16119,22641, 3594,16118,22640, 3593,14803,
-16047,22570, 3522,16046,22569, 3521, 6706,20785,13173, 6447,21556,14255,
- 6445,22725,16252, 6333, 6444,14418,14028,14442,15337, 5596, 6067, 7009,
- 7995,28031,27564, 6494, 7412,22724,22003,16251,15336, 6435,21554,14253,
- 6438,22722,16249, 6434, 7416,14753,14387, 5540, 6065, 6985, 7993,28029,
-27562, 6437, 7410,22721,22001,16248,15334,15301,21973, 7380, 6030, 5803,
- 6029, 5775, 6743, 7129, 5801, 6731, 7122, 5793, 6727, 7118, 5789,14760,
- 6032, 5777,14746, 7386,21979,15307, 5781, 5452, 6034, 5779, 6723, 7115,
- 5786, 5795, 6039, 7124, 7983,28016,27552, 6733, 7396,22710,21984,16226,
-15312,14752,14748, 5791, 6037, 7120, 7981,28014,27550, 6729, 7392,22708,
-21982,16222,15310,43027,14465,21641, 6257,16327,22789, 6256,32237,15002,
-14464,14463, 6589, 6484,21453,14051,16246,14469,14468,15689,15950, 6254,
-15580, 5571, 5866, 7001, 7853,27609,27299, 6481, 7162,22141,21752,15579,
-15046,14751,14471, 5569, 5889, 6999, 7883,27677,27342, 6479, 7221,22300,
-21814,15741,15101,16326,22788, 3938,43577,43244,43574,43241, 6819,21366,
-13905, 6818,20784,13172,16331,22793, 4238, 5813, 3987, 6796,21319,13807,
- 5817, 4015, 5809, 4012, 6805,20713,13116, 6807, 7147, 5834,20783,26609,
- 3845,13171,26853, 3838,13666,21222, 3820, 6790, 7138, 5808,20805,26616,
- 1953,13189,26857, 2018,13674,21227, 2053, 5807, 1976, 7137, 2083,26636,
-26874, 6789, 2116,20848,21247,13229,13701, 5821, 1967, 7144, 2074,26629,
-26867, 6800, 2107,20830,21239,13211,13692, 6794, 7140, 5815,20782,26608,
- 1935,13170,26852, 2000,13665,21221, 2035, 5819, 1985, 7142, 2093,26647,
-26885, 6798, 2126,20870,21256,13245,13708,16325,22787, 3937, 3940, 3946,
- 3921, 3959, 3970, 3930, 3950, 3964, 3924, 3936, 3944, 3919, 3949, 3963,
- 3923, 3957, 3968, 3928, 6835, 7154, 5848,20903,26670, 1589,13261,26895,
- 1690,13717,21268, 1655, 3935, 3943, 3918, 6830, 7152, 5846,20898,26668,
- 1934,13256,26893, 1999,13715,21266, 2034, 6834,20902,13260, 6832,20900,
-13258,16315,22777, 3856, 3855, 3861, 3850, 5836, 3848, 7149, 3841,26628,
-26866, 6809, 3823,20829,21238,13210,13691, 3934, 3942, 3917,14837,21713,
- 6353,22100,14836,14835,14846, 6851,21738,14952, 6837,21731,14924,15502,
-15501,15516,15528,15540,14882,15536, 5864, 1638,16378, 5858, 4127, 5857,
- 1905, 6854,21740,14967,14881,15534,14878,14906,15544,15546, 6862,21746,
-15035, 6864,21748,15037,14867,14908,14897,14891,14888,14899,14875,14880,
-16098,16095,22634,22631, 3578, 3575,22629, 3573,27960, 3708,22608, 3555,
-27947, 3688,22606, 3553,27945, 3686,40118,14110,30165,38687,30164,32068,
- 3274, 3432, 3268, 3426,27965,27963,14626, 5349,27940,35536,14625,35538,
-14627,35535,14624,35534,14623, 6664, 6663, 4303,21444,14033, 6560,21443,
-14032, 5738, 3196, 2528, 2527, 5644, 7042, 8345, 8183, 2526, 3323, 3317,
- 5640, 7038, 6931, 5266, 5641, 7039, 2524, 3313, 7732,39979,32435, 5362,
- 7729,39976,32432, 5359,22612, 3559,27951, 3694,22611, 3558,27950, 3693,
- 7630,39953,32422, 5322, 7627,39950,32419, 5319,35533,14622,35532,14621,
-35531,14620,35545,14653,35530,14619,35544,14652,10716,10713,10708,10705,
-35527,14616,35529,14618,10710,10707,10593,10592, 2702, 2690,18867,18855,
-10470,10458, 5741, 3199, 7099, 3049,24735,24575, 5733, 3191, 3272, 3430,
- 5735, 3193, 5734, 3192, 7096, 3046,24732,24572, 5731, 3189, 7094, 3044,
-24730,24570, 5728, 3186, 7091, 3041,24727,24567, 5715, 3172, 7083, 3029,
-24724,24564, 3270, 3428, 2700, 2688,18865,18853,10468,10456,43482,18834,
- 5709, 3165, 5704, 3161, 5626, 4113, 5855, 4085, 5662, 3986, 5701, 3158,
- 5693, 3150, 7077, 3022, 7069, 3014,24716,24556,24708,24548, 6620, 2699,
- 6612, 2687,18985,18864,18977,18852,10613,10467,10605,10455, 5697, 3154,
- 5689, 3146, 7073, 3018,22604, 7065, 3010,24712,24552, 3551,24704,24544,
- 6616, 2694, 6608, 2682,27943,18981,18859,18973,18847, 3684,10609,10462,
-10601,10450,22603, 3550,27942, 3683, 2696, 2684,18861,18849,10464,10452,
- 5698, 3155, 5690, 3147, 7074, 3019, 7066, 3011,24713,24553,24705,24545,
- 6617, 2695, 6609, 2683,18982,18860,18974,18848,10610,10463,10602,10451,
-28004, 3126, 3060, 3379, 3125, 3123, 3122, 3333, 3066, 3383, 3065, 3382,
-10507,18914,10506, 2875,18913, 2874, 3304, 3493, 3302, 3491, 3301, 3490,
- 2746, 2745,18889,18888,10490,10489, 2744, 2743,18887,18886,10488,10487,
-14522, 5654, 2538,15766,15765,14397, 8138, 8310, 5559, 5546, 5545, 5222,
- 5707, 5221, 5717, 5544, 5220,16422,16417,16419,43666,43661,43664,43659,
-43656,43654,43652,43650,43643,43648,43641,43646, 1721, 7573, 1718, 7570,
- 7711, 2859, 7706, 2844,16494, 7690, 2800, 7688, 2798, 7687, 2797, 7709,
- 2857, 7704, 2842,16484, 7694, 2813,16502, 7685, 2795, 7714, 2864, 7684,
- 2794,16491,16490, 7693, 2812, 7683, 2793,16534,16541,16532,16539,16547,
-16552,16489,16551,32547,16545,32549,16550,16549,32544,16488,32584,32596,
-16580,22899,28140,32583,38724,43714,22901,28142,38722,43712,16582,32581,
-16671,16593,16569,16412,16411,16410, 7682, 2792, 7692, 2811,16524,16526,
-16408,16407,16430,16406,16509,16506, 3645,22871,16497,16427,16426,22823,
- 4558,16425,22822, 4556,16592,16500,16511,16465,16469,16467, 7701, 2822,
- 7699, 2820, 7697, 2818,16504,16951,23098, 8930,32714,16751,16750, 4324,
-16746,32898,32761, 9180,23289,17210, 6722,23032,16851,17209,23288, 9179,
-17215,23293, 9187,16839,16989, 6471,23037,16857,16836,16987,16831,16984,
-43775,43804, 4361, 9178,17191,23279, 9156,17164,23262, 9137,17189,23277,
- 9154,16785,17184,23272, 9152,17183,23271, 9151,17163,23261, 9136,16793,
-17260,23314, 9210,17259,23313, 9209,17258,17257,17256,17540,17520,16895,
-16894,17384,16916,17373,17084,23204, 9040,17546, 4126, 8890, 8929,23097,
-16950,16949,23096, 8928,16948,23095, 8927,16947,43871,43830,43869,43828,
-17472, 6376,22977,16757,16765,22969, 7161,17449,16799,17459,32713,16749,
-16748,17470,17447, 8952, 8951,16830,23015, 7448,16850,23031, 6788,32760,
-17208,23287, 9177, 8970, 8969,16809,22996, 4555,16808,22995, 6317,16849,
-23030, 7159,16829,23014, 6374,16848,23029, 7446,16828,23013, 6786,17207,
-23286, 9176,16782,16847,23028, 7215,16827,23012, 6419,16779,17480,32732,
-32754,32731,16784,17182,16768, 9189,43807,43778, 4268,17176,17161,43867,
-43826,17160,43865,43824, 9208,23312,17030,17255,23160, 9017, 9207,23311,
-17029,17254,23159, 9016, 9226,23343,17066,17298,23191, 9030,17028,17253,
- 9206,23310,17252, 9205,23309,17251,17027,23158, 9015,17250,23308, 9204,
-17026,23157, 9014,17249,23307, 9203,17248,23306, 9202,17025,23156, 9013,
-17247,16867,17519,16893,16892,16891,16890,16902,16865,23045, 6470,16873,
-16870,23048, 6378, 6190,23395,17522,16864,23044, 4525,16883,23059, 4509,
-16914,23065, 4508, 9201,23305,17246, 9249,23355,17360,17420,23377, 9272,
-17138,23241, 9091, 5871, 7856, 7524, 7165, 8042, 6140,16927,17143,23076,
-23246, 7522, 9096,28180,28208, 8040, 9120, 6138, 8876,17436,23391, 9286,
-17592,28242, 9307,23430,28276, 8912, 7520, 8038, 6136,17136,23239, 9089,
-17430,23386, 9281,17586,28237, 9302,23425,28271, 8907, 7518, 8036, 6134,
- 9269,23374,16924,17140,17417,23073,23243, 7516, 9093,28177,28205, 8034,
- 9117, 6132, 8873,17372,16889, 9229,23348,17074,17309,23197, 9034,17073,
-23196, 9033,16881,23057, 4517,16670,16574,22893,28134,32575,38716,43706,
-22895,28136,38718,43708,16576,32577,32601,16573,22892,28133,16625,22919,
-28152,16946,23094, 8925,16945,23093, 8924,38796,32704,17444,17443,17498,
-17477,17504,17488,17490,17442,17441,16795, 3581,22981,16775,16774,22980,
- 4507, 3580,23011,16826, 8943,23102,17179,16957,23268, 9147,32748,32893,
- 3864,22994,16807,16806,22993, 4539, 2179,23010,16825,17509,16846,23027,
- 2193, 2184,23020,16838,16855,23035, 2197, 2182,23018,16834,16811,22998,
- 4506,16813,23000, 4524,16982,16819,43800,43771, 9166, 1673, 9200,23304,
-17024,17245,23155, 9012, 9228,23347,17072,17308,23195, 9032, 9224,23341,
-17064,17296,23189, 9028,32759,32897,17214,23292, 9186,17206,23285, 9175,
- 3948,23026,16845, 3644,23025,16844,43803,43774, 9174, 2192,17159,23260,
- 9135, 9134,23259,17158,17440,17514,17512,16860,23040, 2191,17000,23134,
- 8995,16998,23132, 8993, 3591,23024,16843,17222,16994, 9192,23296,17218,
- 9194,23298,17220,17507,16992,23127, 8987,16862,23042, 1328,23154,17244,
-17023,17474,17243,17022,17497,17021,17486,17439,17496,17057,17093,17020,
-17019,17117,17352,17371,17370,17376,17369,17390,17379,17392,17109, 8894,
- 1637,17338, 8889, 1904,17356,17103,17438,17401,17126,17403,17128,17409,
-23364, 9261,17411,23366, 9263, 8923,23092,16944, 8922,23091,16943, 9133,
- 2862, 9144, 2791, 9142, 2810,  838,22973,16764,16761,22976,  840, 9131,
- 2790,16736,16734,17324, 8978,16842,23023, 3814, 9107,23257,17154,17107,
-23220, 9070, 9076,23226,17115, 8968, 8967,23119,16978,16803,22990, 3881,
-16802,22989, 2880,32747,16805,22992, 1327,16816,23003, 1334, 9165, 8962,
- 8961, 1344, 9163, 8966,23118,16977, 8964,23116,16975,17217,23295, 9191,
- 9011,23153,17018,17017,23152, 9010,17120,23229, 9079,17082,23202, 9038,
- 9062,23213,17099,32758,32757, 8984, 8982, 8977, 8976, 2171, 2170, 2178,
-23009,16824,43802,43773, 9173, 2190, 9199,23303,17016,17242,23151, 9009,
- 9198,23302,17015,17241,23150, 9008, 9196,23300,17239,23148,17238,17237,
-17236,17235,17234,17233,17232,17231,17518,17517,17172,17337,17336,17335,
-17334,17345,17205,32896,17333,32921,28257, 9056,43837, 9245, 9395,28250,
- 9329,43796, 9392,28197, 9326,43902,28224, 9053,43895, 9242,43834, 9049,
-28254, 9238, 9388,43793, 9322,28247, 9385,43899, 9319,28194,43892, 9046,
-28221, 9235, 9232,23352,17089,17323,23207, 9043,17321,17320,32773,32680,
-32679,32772,32685,32778,32683,32775,32792,32688,38823,32771,17516,17539,
-17543,17204,23284, 9172,17013,23147,17012, 9006,23146, 9005,17011,17010,
-23145,23144, 9004, 9003,17009,17007,23143,23141, 9002, 9000,17081,17080,
-23201,23200, 9037, 9036,38830, 9416,32848, 9415,32847,38829, 9215,23319,
-17035,17265,23165, 9022, 9213,23317,17033,17263,23163, 9020,17203,23283,
- 9171,16878,23054, 2188,17529,23402, 1325,17526,23399, 9170,16876,23052,
- 1324,17525,23398, 2187, 1177, 1188, 1160, 1185, 1167, 1170,32806,32697,
- 1220, 1215, 1246, 1202, 1250, 1232,32811,32702,17134,23237, 9087,17427,
-17583,23383,23422,28234,28268, 9278, 1184, 9299, 1187, 8904, 1176,16926,
-23075, 1159,17142,28179, 1166,23245,28207, 1169, 9095, 9119, 8875, 9275,
-23380,17423, 9277,23382,17426,17148,16931,23251,23080,28212,28184, 9101,
- 1236, 9124, 1240, 8880, 1226,32808,32699,38792,38755,43819,43784, 9280,
- 1245, 9301, 1249, 8906, 1231,23385,23083,28236,28187, 9343, 1254, 9363,
- 1256, 8883, 1210,38860,38757,43860,43786, 9458, 1260, 9471, 1262, 8911,
- 1219,17429,16934,28215,28270, 9127, 1208, 9376, 1258,32880,32701,43821,
-43907, 9306, 1214, 9480, 1264,28241,28275, 9365, 1222, 9378, 1242,43862,
-43909, 9473, 1228, 9482, 1252,17153,17585,23256,23424, 9106, 1197,32810,
-32931,38794,38872, 9285, 1201,23390,23429, 9345, 1204,38864,38874, 9462,
- 1206,17435,17591,32884,32933,17434,17590,23389,23428,28240,28274, 9284,
- 1200, 9305, 1213, 8910, 1218,17433,17589,23388,23427,28239,28273, 9283,
- 1199, 9304, 1212, 8909, 1217,17147,16930,23250,23079, 9100, 1235,28211,
-28183, 9123, 1239, 8879, 1225,16933,23082, 1244,17152,28186, 1248,23255,
-28214, 1230, 9105, 9126, 8882,17145,23248, 9098,17151,23254,17150, 9104,
-23253, 9103,38863, 9461,32883, 9460,32882,38862, 1316, 1319, 1337, 1313,
- 1340, 1322,17098,23212,17097, 9061,23211, 9060,38834, 9427,32857, 9426,
-32856,38833,17367,17366,17365,17364,17363,16908,32794,32925,17425,17582,
- 9448, 9447, 1380,17560,23409, 1373,38849, 9446,32872, 9444,32870,38847,
-38841, 9434,32864, 9432,32862,38839,38837, 9430,32860, 9429,32859,38836,
-32691,32796,17106,17105,23219,23218, 9069, 9068,38844, 9439,32867, 9438,
-32866,38843, 1370, 1378, 1348, 1375, 1356, 1362,16910,23062, 2186, 1385,
-23412,17568, 9252,23358,17387, 1382, 1390, 1353, 1387, 1359, 1365,32693,
-32800,17114,23225,17113, 9075,23224, 9074,38853, 9453,32875, 9452,32874,
-38852,17332,17331,17330,17329,16888,32787,32920,17432,17588,17358,17556,
-17351,17553,17389,17570,17378,17562,17382,17564,17394,17572,17362,17558,
- 9442, 9441, 9424, 9423, 1368, 1108,13330,13329,13400,13397,17078,17315,
-17071,17307,15133,13770,13518,14434,15468,14972,15521,14863,13769,14436,
-15135,13517,13768,14811,15395,13516,13767,14420,15116,13515,15518,14860,
-15465,14965,13805,14816,15398,13568,17124,17405,17070,17314,15369,14792,
-14790,15359,14821,15430,15491,14910,14770,15314,12926,13328,15520,14971,
-13327,12925,13326,12924,13325,12923,15542,15031,13469,13253,14815,15397,
-15464,14859,17349,16906,17347,16904,14873,16397,14871,16395,14532,13324,
-14527,13323,14525,13393,14530,12922,14535,12984,14537,12921,14517,12920,
-16382,14987,16384,14989,16022,13322,16017,13321,16015,13395,16020,12919,
-16025,12986,16027,12918,16008,12917,15775,15777,14402,14400,17398,14510,
-14903,14858,14508,14424,14819,16961,17305,14412,14855,13876,13883,13881,
-13873,14422,14414,14416,14809,13946,13944,13878,13889,13887,15029,14923,
-13451,14963,13840,13900,13831,13803,13842,13981,13779,13829,13959,13950,
-13971,13964,13962,13967,16068,22589,16077, 4261,22598, 4260,16066,22587,
-16075, 4259,22596, 4257,15256,21934,15263, 7336,21941, 7343,15254,21932,
-15261, 7334,21939, 7341,12916,20525, 4255,13079,20683, 4314,12915,20524,
- 4254,12914,20523, 4253,13081,20685, 4316,13320,20978, 4434,13419,21040,
- 4468,13319,20977, 4433,13318,20976, 4432,13317,20975, 4431,12913,20522,
- 4252,12912,20521, 4251,12911,20520, 4250, 4301,22781,16319,15412,22046,
- 7464,12910,20519, 6816,12909,20518, 6634,12908,20517, 6661,12907,20516,
- 6459,12906,20515, 6453,12905,20514, 6802,13316,20974, 6632,13315,20973,
- 6637,13314,20972, 6628,13313,20971, 6457,16321,22783, 4249,16308,22771,
- 4248,16203,22698, 6715,15914,22451, 6492,15305,21977, 7384,15303,21975,
- 7382,15155,21849, 7283,15414,22048, 7466,13006,20610, 6813,15403,22039,
- 7458,13009,20613, 6659,16201,22696, 6713,13403,21030, 6639, 8092, 8571,
- 8574, 8095,38612,37449,38626,37448,38624,37446,38541,37444,14814,17313,
-17312,12904,12903,12902,12901,13083,13012, 7107, 5350,42779,42777, 4169,
- 4393,14834,14922, 4390, 4349, 4424, 4270, 4347,18969,43135,27930,27928,
-27921, 4601, 4600, 4598,27511,27509,27504, 7785, 6772, 6679, 6487, 6688,
- 8090, 8569,30259,35323,30254,35317,30252,35315, 8089, 8568,18967,43133,
-30251,35314,30244,35307,30257,35321,30249,35312,15087,21797, 4505, 4504,
- 4512, 4579, 4577, 4514,29692,34639,29691,34638,29707,34654,29717,34664,
-29799,34746,29801,34748,29740,34687,13958, 6932, 5267, 6930, 5265, 4503,
- 4502, 4501, 4520, 4519, 4551, 8363, 2934, 2926, 2974, 2970, 8370, 2925,
- 2383, 2391, 2382, 8368, 8347,30250,35313, 8343, 7722, 7720,19096,19094,
-10709,10706, 4500,22238,15684, 4499,22236,15681,13514,21078, 7566,12900,
-20513, 6779,12899,20512, 6826,12898,20511, 6737,17122,23231, 9081, 9066,
-23216,17102,17111,23222, 9072, 9026,23185,17056,17095,23209, 9058,12897,
-20510, 7806,15550,22120, 7851, 7507,22090,15478,15533,22114, 7845,15538,
-22116, 7847, 7499,22084,15461,15530,22111, 7841,15711,22261, 6742,15708,
-22259, 7774, 7581,22380,15829,15836,22382, 7583,15923,22457, 7564, 7593,
-22241,15688,15442,22075, 7492,15489,22096, 7513,15481,22092, 7509, 7837,
-22108,15515,17005,23139, 8998, 8997,23138,17004,15500,22099, 7832, 7497,
-22078,15454,15453,22077, 7496, 7831,22098,15499,15473,22087, 7504, 4529,
-22140,15578,13822,15577, 4527,22139,15576,13817,15575,15724,13513,15574,
-22138, 4179,15573,13583,14251,15710,15572,22137, 7776,14257,15571,16242,
-15707,15570,22136, 6745,16254,15569,15832,15835,15702,15922,15568,22135,
- 6500,15567,15925, 4188, 4538,22455,15920, 4537,22454,15919, 7591,22453,
-15918,15917,13613,15916, 7595,22134,15566,14065,15565,17228,14833, 4173,
-13188,20804, 4365,13228,20847, 4386,17227,13237,20859, 4389,13169,20781,
- 4360,14099,13827, 4534,13603,21164, 7590,14068,14024,13570,13209,20828,
- 4382,13512,13412,13411,17003,17226,15452,14832,15498,14921,17328,16887,
-14866,16391,14521,13410,16377,14977,16010,13409,14396,13941,13885,13074,
-20679, 4310,13073,20678, 4309, 4308,22776,16314,15300,21972, 7379,13072,
- 4531,15564,22133, 6475,15870,15563,15825,13599,13511,15764, 6771, 6670,
- 6678, 6486, 7784,13448,13897, 3266, 3424,42761,42776, 6929, 5264, 2924,
- 2381,18833,43481, 8713, 2380, 2379, 2962,19078,42868,18806,43450, 2923,
- 1016, 1058,35100,29992, 1044,35096,29988,15561,22131,35097,29989, 1040,
- 2404, 1034, 1042, 1054, 1028, 5115, 5117,16064,22585,16073, 4297,22594,
- 4296,27926, 4624, 6948, 5294,15252,21930,15259, 7332,21937, 7339,27507,
- 8352,14813,14857,14970,14969,42775,13447,13896,13446,13895, 7110, 5369,
- 2980, 8377, 7739, 7738,19111,19110,10739,10738,18987,43158, 2942, 8712,
- 4563,13639,21187, 4554,13904, 4195, 4381,15070,21780, 4533,13903,14067,
-13957,16938,16937,42132,42573,17002,17225,15451,14920,15497,14831,14919,
-15409,22043, 7462,13305,20963, 6811,13304,20962, 6657,16196,22691, 6711,
-13303,13986,13985,13984,17224,14918,14830,42689,42380,42688,42379, 4429,
-13311,20969, 4428,13977,16936,13307,20965, 4423,13509,37779, 4899,13507,
-37777, 4897,13983,42687,42378,42373,42682,13988,42377,42686,42691,42382,
- 9078,23228,17119, 7511,22094,15487,15440,22073, 7490,13115,20712, 6824,
-42802, 8376, 8375, 7849,22118,15548,13826,13445,13894,13114,13628, 2232,
-21214,13743,13651,21291, 2250, 6477,21167,15144,13606,21841, 7270,13956,
-21399, 2214, 2231,21355,13867,15143,21840, 7269, 6483,21334,13833,13955,
- 4574,13113,13949, 4571, 4570,13731,21281, 4553,13168,13737,21286, 2230,
-13742,21290, 2249,13954,21398, 2213,13948,21396, 2229,13112,20711, 6735,
-13940,15265,21943,15066,21776,15085,21795,30243,35306,15560,22130, 4548,
-29765,34712,29750,34697, 2378, 5130, 5127,43480,18832, 2377,35094,29986,
- 2376,35090,29982,15558,22128,35091,29983, 2403,15077,21787,30235,35299,
-30246,35309, 8342,13111,20710, 6777,13110,20709, 7804, 4550,13208,20827,
- 4380,18680,42605, 4379,13646,18934,42986, 8312, 1778,42238,42611,13167,
-20780, 4359, 7035, 5307,42741, 1710, 1626, 8327, 8326, 2375, 8340, 8325,
- 7615, 7612,19074,19071,10696,10693, 4562,13166, 8224, 8659,19004,43178,
-15330,21997, 8664, 8226, 2922, 2374, 8223, 8658, 5467,  955, 6059,  953,
- 5464,  959, 6056,  957, 8661, 8663, 8218, 8221,14243,14242,16236,16235,
-32298,32297, 8076, 6069,42820,42819, 8383,10641,19007,10640, 6755,19006,
- 6754,15343,22008, 7135, 5491,42828, 2373, 8387, 8386, 7793, 7792,19130,
-19129,10758,10757,19123,42907,43185,43523,42818,42906, 8672, 8675, 1503,
- 6071, 5483, 1507,32302, 7134, 5490, 8080, 6089,19017,43192,43191,43528,
-43190,43527,42827,42913, 8385, 7791, 7790,19128,19127,10756,10755,10651,
-19016,10648, 6766,19013, 6763, 8233, 8236,42911,42825, 5497, 1549, 6093,
- 1539, 5496, 1548, 6092, 1538,15069,21779,15332,21999,15083,21793,15090,
-21800,15088,21798,15674,22221,15557,22127,15556,22126,15559,22129,15555,
-22125,15078,21788,15080,21790,15076,21786,15554,22124,15562,22132,15553,
-22123,15552,22122,15074,21784,15073,21783,15184,21867,15949,22485,15948,
-22484,15988,15219,22525,21900,27872,27463,15985,15216,27869,22522,21897,
-27460,27857,27448,27849,27440,25615,27633,27608,21778,15068,27834,27425,
-27765,27606,15970,15201,22507,21882,27833,27424,15969,15200,27899,27898,
-22541,22540,22506,21881,27490,27489,16004,16003,27832,27423,21916,21915,
-15235,15234,27897,27488
-};
-
-
-const int s_nDataSize3 = 24772;
-unsigned int s_Data3[24772] = {
-//Output priorities (total = 24772):
-10, 9, 12, 6, 11, 14, 4, 1, 7, 5, 2, 3, 13, 8, 0,
-0, 1, 2, 219, 218, 76, 217, 216, 77, 1, 0, 74, 78, 79, 75,
-70, 71, 72, 68, 73, 69, 310, 299, 296, 331, 297, 332, 114, 26, 298,
-340, 330, 336, 338, 339, 62, 112, 328, 334, 329, 335, 113, 337, 327, 333,
-115, 60, 27, 61, 63, 273, 215, 36, 213, 31, 35, 39, 319, 312, 320,
-323, 324, 343, 157, 345, 28, 178, 32, 59, 269, 58, 309, 305, 275, 271,
-308, 304, 34, 117, 181, 129, 154, 211, 30, 38, 177, 193, 55, 130, 268,
-33, 303, 174, 29, 37, 119, 212, 143, 188, 66, 270, 141, 183, 194, 179,
-126, 261, 190, 267, 344, 346, 272, 189, 173, 274, 51, 322, 321, 342, 315,
-214, 311, 14, 57, 223, 348, 125, 176, 192, 317, 280, 314, 165, 160, 175,
-326, 127, 17, 247, 172, 262, 5, 231, 99, 138, 124, 54, 301, 325, 167,
-15, 43, 205, 47, 122, 147, 292, 295, 83, 106, 86, 87, 220, 131, 347,
-293, 150, 209, 233, 67, 116, 148, 156, 171, 180, 191, 256, 195, 341, 128,
-277, 291, 281, 289, 294, 313, 102, 46, 103, 207, 229, 236, 240, 224, 227,
-249, 170, 49, 251, 258, 318, 133, 197, 278, 2, 56, 252, 265, 254, 20,
-142, 151, 316, 164, 121, 162, 41, 107, 139, 203, 288, 302, 48, 52, 110,
-53, 64, 4, 16, 284, 135, 307, 3, 40, 155, 202, 23, 93, 22, 92,
-290, 65, 210, 50, 98, 208, 94, 123, 137, 187, 225, 7, 10, 120, 109,
-263, 287, 186, 108, 152, 264, 90, 253, 96, 97, 136, 200, 118, 140, 300,
-306, 185, 6, 11, 89, 259, 85, 101, 132, 196, 24, 45, 260, 244, 91,
-18, 104, 232, 19, 44, 105, 184, 21, 84, 226, 250, 283, 279, 286, 158,
-248, 257, 255, 80, 169, 13, 100, 81, 168, 199, 238, 9, 12, 82, 182,
-201, 266, 146, 204, 230, 239, 241, 159, 221, 285, 134, 88, 242, 246, 8,
-144, 222, 149, 161, 228, 237, 276, 95, 206, 282, 163, 198, 243, 235, 245,
-42, 166, 25, 111, 145, 153, 234, 13, 0, 1, 8, 3, 11, 7, 9,
-2, 12, 4, 6, 5, 10, 0, 61, 62, 0, 2, 3, 5, 6, 8,
-15, 17, 1, 4, 7, 9, 10, 11, 12, 13, 14, 16, 18, 19, 20,
-21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
-36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50,
-51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 63, 64, 65, 66, 67,
-68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 4, 5,
-2, 0, 1, 3, 7, 10, 8, 11, 6, 9, 97, 100, 22, 123, 124,
-125, 98, 101, 40, 39, 66, 72, 75, 69, 68, 74, 21, 41, 67, 73,
-77, 30, 71, 23, 106, 36, 54, 55, 63, 96, 32, 99, 58, 59, 65,
-38, 107, 27, 17, 56, 57, 64, 70, 76, 29, 15, 31, 122, 102, 25,
-48, 49, 50, 51, 52, 53, 26, 28, 103, 37, 127, 104, 120, 121, 24,
-33, 46, 47, 62, 112, 113, 116, 105, 20, 13, 126, 128, 35, 34, 19,
-42, 43, 44, 45, 60, 61, 18, 79, 84, 91, 16, 14, 82, 89, 94,
-85, 119, 83, 88, 95, 118, 78, 90, 81, 86, 93, 12, 80, 87, 92,
-108, 109, 110, 111, 114, 115, 117, 148, 542, 149, 147, 303, 531, 555, 573,
-574, 532, 556, 150, 153, 155, 578, 304, 560, 536, 151, 154, 157, 534, 558,
-576, 533, 538, 557, 575, 547, 551, 570, 305, 568, 306, 540, 541, 544, 546,
-550, 553, 562, 564, 565, 571, 552, 554, 572, 535, 559, 577, 537, 561, 569,
-539, 543, 545, 548, 549, 563, 566, 567, 308, 307, 152, 156, 158, 382, 144,
-128, 145, 438, 446, 450, 458, 462, 470, 474, 482, 492, 500, 504, 510, 516,
-522, 530, 204, 394, 528, 381, 397, 480, 498, 396, 400, 436, 444, 448, 456,
-460, 468, 472, 490, 502, 508, 514, 520, 286, 388, 393, 294, 403, 273, 384,
-385, 387, 391, 399, 408, 313, 317, 347, 354, 414, 419, 426, 25, 88, 127,
-130, 198, 275, 336, 483, 126, 281, 283, 341, 432, 299, 325, 390, 402, 415,
-416, 417, 418, 427, 428, 116, 124, 134, 142, 221, 229, 298, 479, 486, 497,
-527, 24, 87, 227, 311, 315, 329, 353, 506, 512, 518, 30, 34, 41, 196,
-300, 484, 48, 104, 186, 191, 264, 335, 343, 363, 234, 276, 441, 443, 453,
-455, 465, 467, 477, 495, 525, 222, 269, 476, 494, 524, 395, 89, 140, 413,
-420, 425, 481, 499, 505, 511, 517, 529, 200, 257, 327, 398, 401, 440, 445,
-452, 457, 464, 469, 32, 36, 42, 47, 345, 365, 435, 442, 447, 454, 459,
-466, 471, 478, 489, 496, 501, 507, 513, 519, 526, 202, 323, 146, 170, 177,
-179, 248, 255, 368, 380, 206, 122, 132, 258, 279, 288, 296, 349, 375, 434,
-46, 114, 165, 180, 201, 219, 243, 250, 297, 405, 429, 33, 38, 43, 172,
-203, 208, 346, 392, 404, 410, 485, 488, 183, 216, 261, 348, 386, 430, 20,
-26, 65, 100, 131, 162, 167, 174, 182, 188, 189, 194, 210, 218, 240, 252,
-260, 266, 272, 284, 360, 372, 383, 423, 12, 17, 57, 92, 99, 129, 213,
-215, 230, 231, 278, 291, 293, 339, 389, 406, 411, 422, 15, 60, 62, 97,
-117, 119, 135, 199, 224, 225, 236, 245, 267, 302, 321, 326, 377, 407, 102,
-137, 175, 274, 431, 412, 421, 424, 173, 238, 246, 251, 253, 262, 270, 282,
-366, 370, 378, 437, 439, 449, 451, 461, 463, 473, 475, 491, 493, 503, 509,
-515, 521, 523, 0, 1, 81, 82, 106, 160, 168, 184, 185, 192, 193, 263,
-271, 277, 322, 358, 22, 28, 31, 40, 67, 98, 103, 105, 138, 254, 316,
-319, 355, 328, 10, 14, 49, 52, 59, 70, 73, 90, 112, 133, 220, 228,
-232, 233, 301, 309, 314, 331, 333, 337, 344, 351, 35, 37, 44, 163, 342,
-409, 433, 487, 259, 27, 29, 39, 50, 161, 164, 176, 178, 181, 187, 190,
-197, 205, 239, 241, 242, 324, 332, 359, 361, 362, 371, 373, 374, 6, 7,
-45, 55, 56, 75, 77, 79, 80, 108, 109, 159, 166, 169, 171, 195, 217,
-237, 247, 249, 256, 265, 268, 280, 334, 340, 350, 357, 367, 369, 379, 2,
-3, 9, 18, 19, 21, 23, 53, 63, 64, 66, 68, 72, 76, 83, 84,
-93, 95, 96, 101, 107, 111, 120, 121, 123, 125, 139, 141, 143, 212, 244,
-290, 295, 310, 312, 318, 320, 330, 338, 352, 356, 4, 5, 8, 11, 13,
-51, 54, 58, 61, 69, 71, 74, 78, 85, 86, 94, 110, 113, 115, 136,
-207, 209, 211, 214, 223, 226, 235, 285, 287, 289, 292, 364, 376, 16, 91,
-118, 0, 3, 19, 149, 96, 20, 150, 5, 1, 6, 4, 2, 147, 93,
-91, 145, 148, 95, 146, 85, 55, 66, 76, 59, 73, 81, 51, 61, 64,
-54, 58, 92, 94, 63, 173, 62, 86, 65, 75, 60, 74, 82, 56, 52,
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-12, 13, 10, 11, 14, 9, 6, 5, 7, 8, 21, 24, 23, 22, 20,
-19, 15, 16, 17, 18, 0, 1, 3, 2, 108, 109, 139, 153, 122, 96,
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-88, 83, 80, 35, 161, 151, 19, 11, 6, 147, 143, 34, 176, 123, 37,
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-82, 162, 177, 152, 81, 111, 7, 12, 20, 128, 4, 93, 21, 64, 13,
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-43, 45, 47, 110, 103, 105, 120, 145, 127, 38, 40, 42, 44, 46, 137,
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-91, 93, 94, 99, 101, 43, 73, 86, 88, 114, 116, 50, 52, 74, 76,
-77, 78, 79, 39, 113, 44, 45, 47, 48, 49, 51, 53, 54, 55, 57,
-58, 59, 60, 61, 63, 64, 65, 75, 80, 84, 90, 92, 98, 100, 112,
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-6, 5, 11, 3, 9, 2, 8, 1, 7, 4, 10, 3, 4, 11, 14,
-17, 32, 0, 1, 2, 5, 6, 7, 8, 9, 10, 12, 13, 15, 16,
-18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 33,
-34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 2, 3, 0, 1,
-15, 13, 17, 21, 77, 76, 33, 30, 34, 110, 105, 114, 118, 31, 32,
-35, 101, 100, 16, 131, 12, 14, 130, 135, 132, 112, 120, 116, 111, 115,
-119, 79, 117, 113, 121, 20, 133, 80, 134, 78, 81, 44, 109, 49, 47,
-124, 46, 28, 48, 126, 26, 87, 89, 90, 88, 6, 5, 7, 9, 11,
-19, 36, 38, 40, 42, 86, 91, 18, 4, 10, 39, 8, 37, 41, 43,
-45, 60, 127, 27, 61, 106, 129, 59, 108, 128, 53, 54, 57, 58, 62,
-50, 29, 56, 63, 52, 55, 107, 122, 123, 125, 51, 64, 65, 66, 67,
-68, 69, 70, 71, 72, 73, 74, 75, 82, 83, 84, 85, 92, 93, 94,
-95, 96, 97, 98, 99, 102, 103, 104, 23, 25, 24, 22, 175, 174, 176,
-162, 158, 165, 124, 166, 15, 155, 126, 160, 120, 121, 122, 123, 125, 127,
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-13, 14, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43,
-44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58,
-59, 60, 61, 62, 63, 64, 65, 67, 68, 70, 71, 73, 74, 76, 77,
-79, 80, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94,
-95, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 109, 110, 111, 112,
-113, 114, 115, 116, 117, 118, 119, 132, 133, 134, 135, 136, 137, 138, 139,
-140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 178, 179, 0, 1, 2,
-8, 6, 7, 3, 5, 4, 0, 1305, 1308, 540, 545, 558, 563, 564, 569,
-570, 575, 576, 581, 582, 587, 588, 593, 594, 599, 600, 605, 606, 611, 612,
-617, 618, 623, 624, 629, 630, 635, 636, 641, 642, 647, 648, 653, 654, 657,
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-4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18,
-19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
-34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
-49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
-64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78,
-79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
-94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108,
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-139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153,
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-184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198,
-199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, 212, 213,
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-244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255, 256, 257, 258,
-259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272, 273,
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-334, 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, 345, 346, 347, 348,
-349, 350, 351, 352, 353, 354, 355, 356, 357, 358, 359, 360, 361, 362, 363,
-364, 365, 366, 367, 368, 369, 370, 371, 372, 373, 374, 375, 376, 377, 378,
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-394, 395, 396, 397, 398, 399, 400, 401, 402, 403, 404, 405, 406, 407, 408,
-409, 410, 411, 412, 413, 414, 415, 416, 417, 418, 419, 420, 421, 422, 423,
-424, 425, 426, 427, 428, 429, 430, 431, 432, 433, 434, 435, 436, 437, 438,
-439, 440, 441, 442, 443, 444, 445, 446, 447, 448, 449, 450, 451, 452, 453,
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-469, 470, 471, 472, 473, 474, 475, 476, 477, 478, 479, 480, 481, 482, 483,
-484, 485, 486, 487, 488, 489, 490, 491, 492, 493, 494, 495, 496, 497, 498,
-499, 500, 501, 502, 503, 504, 505, 506, 507, 508, 509, 510, 511, 512, 513,
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-562, 565, 566, 567, 568, 571, 572, 573, 574, 577, 578, 579, 580, 583, 584,
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-756, 757, 758, 759, 760, 761, 762, 763, 764, 765, 766, 767, 768, 769, 770,
-771, 772, 773, 774, 775, 776, 777, 778, 779, 780, 781, 782, 783, 784, 785,
-786, 787, 788, 789, 790, 791, 792, 793, 794, 795, 796, 797, 798, 799, 800,
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-816, 817, 818, 819, 820, 821, 822, 823, 824, 825, 826, 827, 828, 829, 830,
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-846, 847, 848, 849, 850, 851, 852, 853, 854, 855, 856, 857, 858, 859, 860,
-861, 862, 863, 864, 865, 866, 867, 868, 869, 870, 871, 872, 873, 874, 875,
-876, 877, 878, 879, 880, 881, 882, 883, 884, 885, 886, 887, 888, 889, 890,
-891, 892, 893, 894, 895, 896, 897, 898, 899, 900, 901, 902, 903, 904, 905,
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-951, 952, 953, 954, 955, 956, 957, 958, 959, 960, 961, 962, 963, 964, 965,
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-981, 982, 983, 984, 985, 986, 987, 988, 989, 990, 991, 992, 993, 994, 995,
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-45, 57, 69, 79, 81, 91, 93, 98, 106, 119, 131, 143, 155, 59, 71,
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-80, 82, 85, 87, 92, 94, 97, 100, 102, 107, 117, 129, 141, 8, 20,
-23, 32, 44, 56, 68, 114, 126, 138, 150, 153, 179, 186, 191, 198, 180,
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-29, 30, 31, 34, 37, 40, 41, 42, 43, 46, 49, 52, 53, 54, 55,
-58, 61, 64, 65, 66, 67, 70, 109, 111, 112, 115, 116, 118, 121, 123,
-124, 127, 128, 130, 133, 135, 136, 139, 140, 142, 145, 147, 148, 151, 152,
-154, 213, 214, 215, 216, 177, 189, 184, 196, 221, 222, 223, 224, 178, 181,
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-204, 205, 206, 207, 208, 209, 210, 211, 212, 217, 218, 219, 220, 2, 4,
-6, 8, 10, 12, 32, 34, 36, 46, 48, 52, 54, 56, 58, 60, 62,
-64, 86, 87, 88, 105, 106, 107, 108, 109, 112, 113, 115, 117, 121, 1,
-3, 5, 7, 9, 11, 13, 14, 15, 16, 17, 18, 19, 20, 21, 23,
-25, 26, 27, 28, 29, 30, 31, 33, 35, 37, 38, 39, 40, 41, 42,
-43, 44, 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 66, 67,
-68, 71, 73, 75, 76, 78, 79, 80, 82, 83, 84, 92, 93, 94, 96,
-97, 98, 99, 100, 101, 102, 103, 104, 110, 111, 114, 116, 118, 119, 120,
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-166, 167, 170, 173, 174, 176, 180, 182, 184, 186, 0, 22, 24, 50, 69,
-70, 72, 74, 77, 81, 85, 89, 90, 91, 95, 123, 125, 128, 130, 132,
-133, 134, 135, 136, 137, 138, 139, 140, 142, 144, 147, 149, 151, 154, 155,
-157, 158, 159, 160, 161, 162, 163, 164, 165, 168, 169, 171, 172, 175, 177,
-178, 179, 181, 183, 185, 122, 85, 89, 92, 106, 118, 136, 148, 156, 164,
-27, 35, 37, 38, 52, 57, 62, 67, 71, 83, 55, 65, 68, 121, 26,
-53, 63, 66, 80, 82, 105, 114, 119, 123, 137, 143, 14, 25, 30, 31,
-100, 28, 117, 108, 134, 3, 12, 34, 36, 39, 40, 45, 46, 51, 59,
-60, 61, 73, 74, 75, 76, 77, 78, 84, 86, 87, 88, 90, 91, 93,
-94, 95, 110, 112, 115, 116, 120, 127, 128, 130, 132, 141, 142, 152, 175,
-58, 0, 1, 2, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 16,
-17, 18, 19, 20, 21, 22, 23, 24, 29, 32, 33, 41, 42, 43, 44,
-47, 48, 49, 50, 54, 56, 64, 69, 70, 72, 79, 81, 96, 97, 98,
-99, 101, 102, 103, 104, 107, 109, 111, 113, 124, 125, 126, 129, 131, 133,
-135, 138, 139, 140, 144, 145, 146, 147, 149, 150, 151, 153, 154, 155, 157,
-158, 159, 160, 161, 162, 163, 165, 166, 167, 168, 169, 170, 171, 172, 173,
-174, 176, 177, 23, 29, 5, 24, 25, 26, 27, 28, 30, 31, 0, 1,
-2, 3, 4, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
-18, 19, 20, 21, 22, 32, 83, 84, 96, 99, 100, 16, 85, 98, 18,
-26, 27, 37, 40, 49, 52, 17, 51, 55, 57, 97, 8, 3, 19, 9,
-50, 56, 58, 10, 53, 72, 82, 87, 89, 91, 14, 118, 129, 12, 81,
-86, 88, 90, 130, 11, 20, 21, 22, 23, 24, 25, 28, 29, 30, 31,
-32, 33, 34, 35, 36, 43, 67, 68, 69, 93, 95, 41, 45, 47, 4,
-5, 6, 13, 38, 117, 128, 71, 0, 1, 2, 15, 39, 92, 94, 65,
-70, 122, 123, 127, 7, 42, 44, 46, 48, 54, 59, 60, 61, 62, 63,
-64, 66, 105, 106, 109, 110, 111, 112, 113, 114, 121, 124, 126, 73, 74,
-75, 76, 77, 78, 79, 80, 101, 102, 103, 104, 107, 108, 115, 116, 119,
-120, 125, 18, 24, 5, 7, 9, 13, 0, 1, 2, 3, 4, 6, 8,
-10, 11, 12, 14, 15, 16, 17, 19, 20, 21, 22, 23, 25, 26, 27,
-28, 29, 30, 38, 37, 3, 2, 39, 4, 40, 5, 109, 110, 111, 99,
-107, 97, 105, 140, 141, 142, 0, 98, 106, 1, 100, 108, 34, 35, 36,
-10, 11, 42, 46, 50, 54, 58, 62, 66, 70, 13, 17, 21, 30, 6,
-88, 90, 96, 102, 113, 115, 121, 123, 125, 135, 137, 139, 9, 14, 18,
-22, 33, 44, 48, 52, 56, 60, 64, 68, 72, 116, 126, 130, 43, 47,
-51, 55, 59, 63, 67, 71, 85, 91, 93, 103, 80, 82, 83, 73, 75,
-76, 119, 129, 133, 12, 16, 20, 31, 7, 41, 45, 49, 53, 57, 61,
-65, 69, 117, 127, 131, 87, 89, 95, 101, 112, 114, 120, 122, 124, 134,
-136, 138, 86, 92, 94, 104, 118, 128, 132, 79, 81, 84, 74, 77, 78,
-8, 15, 19, 23, 32, 24, 25, 28, 26, 27, 29, 0, 1, 2, 3,
-4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18,
-19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
-34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
-49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
-64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78,
-79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
-94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108,
-109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123,
-124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138,
-139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153,
-154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 34, 5, 6, 7,
-8, 9, 10, 11, 12, 33, 47, 2, 4, 19, 20, 21, 36, 37, 38,
-40, 41, 0, 1, 3, 13, 14, 15, 16, 17, 18, 22, 23, 24, 25,
-26, 27, 28, 29, 30, 31, 32, 35, 39, 42, 43, 44, 45, 46, 48,
-49, 50, 144, 145, 0, 141, 142, 143, 155, 154, 139, 140, 146, 147, 150,
-151, 76, 82, 83, 84, 85, 86, 87, 158, 131, 77, 132, 159, 23, 24,
-25, 26, 27, 28, 32, 33, 73, 79, 91, 95, 1, 3, 5, 12, 13,
-14, 15, 16, 17, 18, 19, 20, 21, 22, 29, 30, 31, 34, 102, 104,
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-42, 44, 45, 46, 47, 56, 57, 58, 59, 60, 62, 64, 66, 68, 70,
-72, 74, 75, 78, 80, 81, 88, 89, 90, 92, 93, 94, 96, 97, 98,
-100, 103, 105, 107, 109, 137, 160, 161, 162, 35, 49, 51, 53, 55, 61,
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-126, 127, 128, 129, 130, 133, 134, 135, 136, 148, 149, 152, 153, 156, 157,
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-0, 1, 13, 14, 15, 16, 20, 28, 32, 34, 38, 40, 22, 23, 24,
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-98, 88, 59, 82, 97, 44, 46, 54, 68, 92, 100, 45, 53, 67, 43,
-91, 99, 80, 89, 77, 1, 3, 9, 5, 6, 7, 8, 70, 28, 83,
-22, 34, 42, 49, 51, 57, 17, 23, 29, 37, 63, 19, 25, 31, 39,
-48, 50, 52, 56, 58, 62, 64, 66, 84, 76, 90, 78, 75, 85, 4,
-0, 2, 10, 20, 26, 32, 36, 40, 15, 61, 16, 18, 24, 30, 35,
-38, 47, 55, 65, 21, 27, 33, 41, 0, 1, 2, 3, 4, 5, 6,
-7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21,
-22, 23, 24, 25, 26, 40, 42, 3, 1, 51, 5, 49, 48, 22, 24,
-4, 2, 52, 50, 76, 78, 80, 94, 96, 98, 23, 47, 26, 27, 63,
-64, 65, 70, 71, 21, 77, 79, 81, 17, 20, 33, 37, 41, 43, 57,
-55, 56, 58, 59, 60, 61, 62, 18, 19, 25, 32, 36, 95, 97, 99,
-0, 38, 39, 54, 67, 69, 73, 75, 85, 87, 91, 93, 53, 66, 84,
-86, 90, 89, 6, 7, 11, 12, 13, 82, 83, 68, 72, 74, 92, 8,
-9, 10, 14, 15, 16, 28, 29, 30, 31, 34, 35, 44, 45, 46, 88,
-0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
-15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
-30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44,
-45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
-60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,
-75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
-90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104,
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-120, 121, 122, 123, 124, 125, 0, 1, 2, 3, 4, 5, 6, 7, 8,
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-24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38,
-39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
-54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68,
-69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83,
-84, 85, 86, 87, 88, 89, 90, 91, 92, 0, 1, 2, 3, 4, 5,
-6, 7, 8, 1, 3, 43, 0, 2, 4, 5, 6, 7, 8, 9, 10,
-11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
-26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40,
-41, 42, 44, 45, 46, 89, 90, 0, 1, 2, 3, 4, 5, 6, 7,
-8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22,
-23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37,
-38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52,
-53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67,
-68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82,
-83, 84, 85, 86, 87, 88, 91, 92, 93, 94, 95, 96, 97, 98, 99,
-100, 101, 102, 103, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
-11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
-26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8,
-9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
-24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38,
-39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
-54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68,
-69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 186, 189, 174,
-185, 179, 180, 177, 181, 188, 191, 60, 63, 175, 183, 176, 184, 64, 61,
-62, 65, 178, 182, 187, 190, 130, 142, 154, 166, 104, 110, 116, 13, 24,
-36, 78, 122, 136, 148, 160, 172, 7, 18, 30, 84, 102, 108, 114, 105,
-111, 117, 120, 123, 74, 86, 98, 107, 113, 119, 125, 1, 9, 20, 32,
-44, 45, 55, 75, 99, 103, 109, 115, 0, 6, 19, 31, 42, 43, 54,
-72, 73, 85, 96, 97, 137, 149, 161, 173, 2, 46, 47, 56, 76, 77,
-100, 101, 127, 133, 139, 145, 151, 157, 163, 169, 8, 21, 33, 87, 106,
-112, 118, 121, 124, 128, 129, 140, 141, 152, 153, 3, 4, 15, 26, 38,
-48, 49, 50, 51, 57, 58, 66, 67, 68, 69, 80, 90, 91, 92, 93,
-126, 131, 134, 138, 143, 146, 150, 155, 158, 162, 167, 170, 10, 11, 22,
-23, 34, 35, 88, 89, 135, 147, 159, 171, 5, 12, 14, 16, 17, 25,
-27, 28, 29, 37, 39, 40, 41, 52, 53, 59, 70, 71, 79, 81, 82,
-83, 94, 95, 132, 144, 156, 164, 165, 168, 756, 759, 761, 104, 105, 640,
-647, 700, 107, 757, 760, 102, 222, 224, 310, 420, 431, 441, 460, 468, 491,
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-165, 178, 434, 467, 477, 480, 550, 569, 657, 671, 682, 718, 751, 13, 37,
-54, 175, 181, 262, 265, 313, 385, 465, 551, 563, 641, 645, 701, 719, 253,
-316, 333, 339, 364, 365, 369, 371, 436, 439, 461, 496, 499, 505, 514, 520,
-522, 577, 585, 588, 598, 601, 608, 617, 622, 685, 727, 733, 223, 240, 191,
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-52, 53, 59, 64, 88, 89, 94, 103, 118, 121, 124, 138, 143, 149, 163,
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-529, 530, 536, 537, 540, 553, 564, 570, 625, 626, 630, 635, 637, 643, 655,
-656, 668, 670, 678, 681, 691, 692, 699, 703, 704, 724, 738, 749, 750, 753,
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-319, 327, 391, 399, 440, 482, 142, 283, 325, 403, 443, 453, 485, 758, 0,
-24, 67, 298, 336, 346, 464, 489, 504, 507, 510, 516, 518, 521, 523, 524,
-535, 552, 559, 573, 576, 579, 582, 583, 591, 592, 594, 599, 602, 603, 607,
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-62, 63, 66, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
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-106, 108, 109, 110, 111, 112, 113, 114, 116, 117, 119, 120, 122, 123, 125,
-126, 127, 128, 129, 131, 132, 133, 134, 135, 136, 139, 140, 141, 145, 146,
-147, 148, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 167,
-168, 169, 170, 171, 172, 173, 174, 176, 177, 180, 182, 183, 185, 186, 188,
-189, 192, 193, 194, 195, 196, 197, 198, 200, 201, 203, 204, 206, 207, 209,
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-320, 321, 323, 326, 329, 330, 334, 335, 337, 341, 342, 343, 344, 345, 347,
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-363, 366, 367, 368, 370, 374, 375, 376, 377, 378, 380, 381, 383, 384, 386,
-387, 389, 390, 392, 393, 394, 395, 396, 397, 398, 402, 406, 407, 408, 409,
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-435, 438, 444, 445, 446, 447, 448, 449, 451, 452, 454, 456, 458, 459, 462,
-463, 466, 471, 472, 473, 474, 476, 479, 483, 484, 486, 487, 490, 492, 493,
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-533, 534, 538, 539, 541, 542, 543, 544, 545, 546, 548, 549, 554, 555, 556,
-557, 561, 562, 565, 568, 575, 578, 581, 584, 586, 589, 593, 596, 597, 600,
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-743, 744, 746, 748, 752, 755, 325, 326, 324, 15, 258, 103, 123, 3, 9,
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-355, 138, 163, 165, 193, 195, 204, 210, 219, 226, 131, 132, 208, 250, 251,
-278, 314, 315, 357, 365, 140, 146, 179, 206, 211, 20, 29, 50, 161, 166,
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-62, 68, 78, 84, 94, 100, 112, 114, 92, 98, 110, 238, 283, 55, 61,
-67, 349, 236, 243, 255, 266, 281, 288, 19, 24, 28, 42, 45, 49, 129,
-130, 207, 248, 249, 277, 354, 359, 360, 233, 275, 296, 352, 353, 22, 31,
-52, 54, 60, 66, 83, 89, 95, 101, 113, 119, 342, 345, 366, 231, 273,
-294, 25, 43, 46, 23, 32, 53, 343, 351, 358, 21, 30, 51, 344, 356,
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-15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
-30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44,
-45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59,
-60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,
-75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89,
-90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104,
-105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119,
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-135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149,
-150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164,
-165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179,
-180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194,
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-240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254,
-255, 256, 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269,
-270, 271, 272, 273, 274, 275, 276, 277, 278, 279, 280, 281, 282, 283, 284,
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-300, 301, 302, 303, 304, 305, 306, 307, 308, 309, 310, 311, 312, 313, 314,
-315, 316, 317, 318, 319, 320, 321, 322, 323, 324, 325, 326, 327, 328, 329,
-330, 331, 332, 333, 334, 335, 336, 337, 338, 339, 340, 341, 342, 343, 344,
-345, 346, 347, 348, 349, 350, 351, 352, 353, 354, 355, 356, 357, 358, 359,
-360, 361, 362, 363, 364, 365, 366, 367, 368, 369, 370, 371, 372, 373, 374,
-375, 376, 377, 19, 29, 33, 45, 86, 88, 90, 92, 18, 27, 31, 47,
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-48, 78, 84, 133, 135, 93, 112, 134, 136, 36, 40, 62, 66, 80, 38,
-42, 44, 50, 52, 54, 56, 58, 64, 127, 131, 137, 1, 15, 16, 21,
-22, 102, 111, 113, 128, 132, 138, 23, 25, 59, 68, 70, 94, 69, 3,
-4, 6, 7, 10, 104, 106, 108, 110, 121, 123, 67, 24, 26, 60, 122,
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-12, 14, 17, 71, 73, 75, 77, 79, 95, 97, 99, 100, 126, 65, 130,
-101, 118, 116, 120, 115, 117, 119, 219, 220, 221, 127, 131, 135, 139, 228,
-229, 230, 231, 232, 233, 234, 235, 222, 223, 224, 225, 226, 227, 236, 237,
-238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252,
-253, 254, 255, 256, 257, 258, 259, 260, 261, 262, 263, 264, 265, 266, 275,
-276, 277, 278, 9, 13, 17, 21, 25, 29, 36, 40, 44, 48, 49, 56,
-60, 64, 68, 72, 76, 80, 84, 171, 176, 180, 184, 0, 1, 2, 3,
-4, 5, 6, 7, 8, 10, 11, 12, 14, 15, 16, 18, 19, 20, 22,
-23, 24, 26, 27, 28, 30, 31, 32, 33, 34, 35, 37, 38, 39, 41,
-42, 43, 45, 46, 47, 50, 51, 52, 53, 54, 55, 57, 58, 59, 61,
-62, 63, 65, 66, 67, 69, 70, 71, 73, 74, 75, 77, 78, 79, 81,
-82, 83, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
-98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112,
-113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 128,
-129, 130, 132, 133, 134, 136, 137, 138, 140, 141, 142, 143, 144, 145, 146,
-147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161,
-162, 163, 164, 165, 166, 167, 168, 169, 170, 172, 173, 174, 175, 177, 178,
-179, 181, 182, 183, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195,
-196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210,
-211, 212, 213, 214, 215, 216, 217, 218, 267, 268, 269, 270, 271, 272, 273,
-274, 279, 280, 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 1, 2,
-3, 4, 0, 8, 12, 11, 102, 127, 6, 5, 101, 7, 128, 4, 3,
-10, 1, 2, 0, 9, 92, 90, 97, 114, 94, 95, 99, 112, 111, 123,
-116, 118, 120, 121, 125, 98, 89, 91, 96, 93, 100, 113, 24, 34, 16,
-36, 14, 22, 13, 21, 33, 18, 26, 30, 115, 117, 124, 119, 122, 126,
-17, 25, 29, 104, 19, 27, 31, 106, 28, 20, 32, 15, 23, 35, 54,
-56, 110, 51, 72, 88, 38, 40, 49, 58, 60, 64, 66, 74, 81, 105,
-107, 37, 39, 50, 52, 57, 59, 63, 65, 71, 73, 82, 87, 42, 43,
-45, 48, 61, 67, 70, 76, 77, 79, 83, 86, 53, 55, 41, 44, 46,
-47, 62, 68, 69, 75, 78, 80, 84, 85, 109, 103, 108, 7, 8, 6,
-9, 17, 10, 28, 26, 24, 50, 68, 4, 34, 5, 0, 23, 46, 2,
-18, 33, 1, 85, 19, 58, 62, 70, 29, 31, 35, 3, 25, 27, 47,
-48, 49, 51, 11, 90, 30, 32, 36, 40, 41, 42, 43, 44, 45, 12,
-13, 14, 15, 16, 20, 21, 22, 37, 38, 39, 52, 53, 54, 55, 56,
-57, 59, 60, 61, 63, 64, 65, 66, 67, 69, 71, 72, 73, 74, 75,
-76, 77, 78, 79, 80, 81, 82, 83, 84, 86, 87, 88, 89, 88, 125,
-101, 103, 124, 127, 134, 135, 25, 29, 37, 45, 165, 177, 163, 180, 138,
-142, 113, 24, 28, 36, 40, 41, 44, 48, 49, 58, 59, 60, 61, 66,
-67, 68, 69, 70, 71, 72, 73, 89, 92, 93, 145, 148, 149, 94, 105,
-109, 151, 154, 161, 173, 96, 99, 100, 102, 104, 107, 108, 111, 114, 115,
-116, 118, 119, 120, 122, 123, 126, 132, 133, 136, 137, 140, 141, 155, 156,
-159, 160, 164, 169, 171, 172, 175, 176, 179, 181, 182, 183, 0, 1, 2,
-3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
-18, 19, 20, 21, 22, 23, 26, 27, 30, 31, 32, 33, 34, 35, 38,
-39, 42, 43, 46, 47, 50, 51, 52, 53, 54, 55, 56, 57, 62, 63,
-64, 65, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86,
-87, 90, 91, 95, 97, 98, 106, 110, 112, 117, 121, 128, 129, 130, 131,
-139, 143, 144, 146, 147, 150, 152, 153, 157, 158, 162, 166, 167, 168, 170,
-174, 178, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
-13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,
-28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 0, 1, 2, 3,
-4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18,
-19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
-34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
-49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
-64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78,
-79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93,
-94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108,
-109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123,
-124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138,
-139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153,
-154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 168,
-169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183,
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-14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 26, 27, 28, 29, 30,
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-16, 17, 8, 16, 18, 7, 26, 30, 34, 104, 14, 15, 17, 19, 22,
-48, 68, 73, 75, 79, 11, 1, 6, 20, 28, 32, 36, 38, 40, 44,
-98, 102, 103, 105, 106, 115, 2, 13, 21, 23, 49, 53, 54, 55, 56,
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-52, 104, 106, 109, 110, 1, 4, 18, 25, 29, 32, 19, 34, 22, 5,
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-93, 99, 2, 24, 28, 31, 35, 53, 55, 81, 91, 97, 105, 0, 3,
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-60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74,
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-87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101,
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-20, 23, 26, 29, 32, 35, 38, 41, 44, 47, 50, 53, 56, 59, 62,
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-19, 21, 22, 24, 25, 27, 28, 30, 31, 33, 34, 36, 37, 39, 40,
-42, 43, 45, 46, 48, 49, 51, 52, 54, 55, 57, 58, 60, 61, 63,
-64, 66, 67, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
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-78, 5, 22, 25, 41, 49, 1, 9, 17, 95, 103, 102, 104, 75, 76,
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-7, 8, 13, 21, 36, 18, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-32, 33, 34, 35, 37, 15, 16, 22, 17, 19, 20, 0, 1, 0, 1,
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-42, 44, 45, 48, 49, 50, 52, 53, 56, 57, 59, 60, 61, 62, 63,
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-12, 13, 15, 16, 17, 18, 19, 20, 21, 27, 28, 29, 31, 32, 33,
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-10, 15, 21, 49, 58, 50, 59, 83, 1, 2, 7, 8, 12, 13, 14,
-16, 17, 20, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38,
-39, 40, 41, 42, 43, 45, 46, 48, 51, 52, 55, 56, 57, 60, 61,
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-13, 32, 37, 76, 3, 10, 11, 19, 20, 21, 22, 23, 27, 28, 29,
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-17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-32, 33, 34, 35, 36, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
-48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 60, 61, 62, 63,
-64, 65, 36, 61, 20, 1, 19, 126, 127, 60, 56, 33, 34, 35, 21,
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-30, 31, 37, 38, 39, 40, 43, 47, 48, 51, 4, 5, 6, 7, 8,
-9, 10, 11, 14, 15, 16, 17, 18, 69, 79, 81, 82, 87, 88, 89,
-90, 92, 93, 95, 98, 100, 101, 102, 104, 105, 121, 122, 123, 130, 132,
-3, 2, 10, 11, 1, 4, 6, 8, 5, 7, 9, 0, 31, 30, 15,
-43, 49, 53, 57, 45, 12, 13, 16, 18, 32, 34, 36, 14, 33, 35,
-37, 21, 23, 17, 19, 20, 22, 24, 25, 26, 27, 28, 29, 42, 48,
-52, 56, 38, 41, 44, 46, 50, 54, 39, 40, 47, 51, 55, 35, 36,
-3, 5, 7, 9, 11, 2, 17, 30, 34, 14, 20, 23, 4, 6, 13,
-16, 18, 19, 22, 24, 25, 31, 32, 33, 8, 10, 12, 15, 21, 0,
-1, 26, 27, 28, 29, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
-10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
-25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
-40, 41, 42, 43, 44, 45, 46, 47, 5, 4, 6, 21, 0, 3, 18,
-16, 15, 17, 9, 12, 20, 7, 14, 19, 8, 10, 11, 13, 1, 2,
-167, 168, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
-13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,
-28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42,
-43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
-58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72,
-73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87,
-88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102,
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-133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147,
-148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162,
-163, 164, 165, 166, 0, 1, 2, 3, 4, 5, 6, 7, 8, 0, 1,
-2, 3, 7, 6, 8, 9, 16, 2, 18, 19, 28, 27, 24, 25, 26,
-17, 3, 20, 22, 21, 23, 13, 0, 4, 14, 1, 5, 12, 10, 11,
-15, 8, 9, 10, 11, 0, 1, 2, 3, 4, 5, 6, 7, 12, 13,
-14, 15, 16, 17, 18, 19, 0, 1, 2, 3, 4, 5, 6, 7, 8,
-9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
-24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38,
-39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
-54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68,
-69, 70, 71, 72, 73, 18, 22, 28, 35, 53, 54, 57, 59, 0, 1,
-2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
-17, 19, 20, 21, 23, 24, 25, 26, 27, 29, 30, 31, 32, 33, 34,
-36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50,
-51, 52, 55, 56, 58, 9, 13, 4, 6, 11, 15, 8, 12, 5, 7,
-10, 14, 2, 3, 0, 1, 0, 3, 4, 7, 1, 2, 5, 6, 8,
-9, 10, 0, 1, 2, 65, 64, 66, 52, 46, 49, 53, 59, 44, 48,
-45, 57, 34, 25, 26, 27, 36, 56, 24, 43, 47, 0, 1, 2, 3,
-4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18,
-19, 20, 21, 22, 23, 28, 29, 30, 31, 32, 33, 35, 37, 38, 39,
-40, 41, 42, 50, 51, 54, 55, 58, 60, 61, 62, 63, 0, 1, 2,
-3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
-18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,
-33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
-48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62,
-63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
-78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92,
-93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107,
-108, 109, 110, 111, 112, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
-10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
-25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
-40, 41, 42, 43, 44, 45, 46, 47, 48, 0, 1, 2, 3, 4, 5,
-6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
-21, 22, 23, 24, 25, 26, 0, 1, 2, 3, 4, 5, 6, 7, 8,
-9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
-24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38,
-39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
-54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68,
-69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83,
-84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98,
-99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113,
-114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128,
-129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143,
-144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158,
-159, 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173,
-174, 175, 84, 86, 5, 16, 18, 21, 81, 82, 3, 6, 10, 12, 14,
-22, 24, 26, 29, 39, 41, 42, 54, 56, 58, 60, 62, 75, 0, 1,
-2, 4, 7, 8, 9, 11, 13, 15, 17, 19, 20, 23, 25, 27, 28,
-30, 31, 32, 33, 34, 35, 36, 37, 38, 40, 43, 44, 45, 46, 47,
-48, 49, 50, 51, 52, 53, 55, 57, 59, 61, 63, 64, 65, 66, 67,
-68, 69, 70, 71, 72, 73, 74, 76, 77, 78, 79, 80, 83, 85, 0,
-2, 4, 6, 14, 16, 18, 20, 8, 31, 10, 11, 24, 25, 28, 29,
-32, 33, 36, 38, 40, 41, 44, 45, 9, 30, 1, 3, 5, 7, 12,
-13, 15, 17, 19, 21, 22, 23, 26, 27, 34, 35, 37, 39, 42, 43,
-46, 47, 27, 28, 35, 36, 45, 46, 13, 14, 59, 60, 0, 1, 2,
-3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 15, 16, 17, 18, 19,
-20, 21, 22, 23, 24, 25, 26, 29, 30, 31, 32, 33, 34, 37, 38,
-39, 40, 41, 42, 43, 44, 47, 48, 49, 50, 51, 52, 53, 54, 55,
-56, 57, 58, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72,
-73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87,
-88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102,
-103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117,
-118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132,
-133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147,
-148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162,
-163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177,
-178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192,
-193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207,
-208, 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222,
-223, 224, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
-13, 14, 15, 16, 17, 0, 4, 1, 2, 3, 7, 5, 9, 6, 8,
-0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
-15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
-30, 31, 32, 33, 34, 35, 36, 37, 8, 11, 9, 10, 0, 1, 4,
-5, 2, 3, 6, 7, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
-10, 11, 12, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
-12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26,
-27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41,
-42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56,
-57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71,
-72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86,
-87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101,
-102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116,
-117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131,
-132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146,
-147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, 160, 161,
-162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176,
-177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
-192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206,
-207, 208, 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219, 220, 221,
-222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235, 236,
-237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251,
-252, 253, 254, 255, 256, 257, 0, 1, 2, 3, 4, 5, 6, 7, 8,
-9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23,
-35, 1, 2, 20, 29, 32, 33, 34, 0, 3, 4, 5, 6, 7, 8,
-9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 21, 22, 23, 24,
-25, 26, 27, 28, 30, 31, 36, 37, 38, 39, 40, 41, 42, 43, 44,
-45, 46, 47, 48, 49, 50, 51, 52, 53, 0, 1, 2, 3, 4, 5,
-6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
-21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
-36, 37, 38, 39, 40, 0, 1, 0, 1, 2, 3, 4, 5, 0, 1,
-2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
-17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,
-47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61,
-62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76,
-77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91,
-92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106,
-107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121,
-122, 123, 124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136,
-137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151,
-152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166,
-167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, 180, 181,
-182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 196,
-197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211,
-212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226,
-227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241,
-242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255, 256,
-257, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
-14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-29, 0, 1, 4, 27, 19, 21, 5, 18, 6, 8, 10, 11, 12, 14,
-15, 16, 17, 20, 0, 1, 2, 3, 7, 9, 13, 22, 23, 24, 25,
-26, 28, 29, 30, 31, 32, 33, 34, 35, 0, 1, 2, 3, 4, 0,
-1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
-16, 17, 18, 19, 112, 110, 113, 111, 29, 37, 18, 93, 96, 97, 99,
-98, 92, 100, 104, 105, 108, 101, 61, 62, 69, 77, 86, 70, 78, 85,
-68, 76, 87, 60, 54, 55, 59, 30, 38, 73, 81, 90, 94, 19, 14,
-16, 71, 79, 84, 50, 51, 57, 0, 2, 4, 6, 8, 10, 12, 20,
-26, 34, 44, 64, 72, 80, 91, 40, 63, 13, 5, 7, 9, 11, 15,
-1, 3, 39, 21, 48, 49, 56, 95, 74, 82, 89, 31, 25, 33, 45,
-65, 43, 103, 106, 107, 109, 17, 52, 53, 58, 28, 36, 41, 23, 27,
-35, 47, 42, 66, 22, 24, 32, 46, 67, 75, 83, 88, 102, 6, 7,
-0, 1, 3, 5, 2, 4, 50, 48, 52, 54, 56, 2, 6, 14, 18,
-22, 26, 30, 34, 49, 53, 55, 57, 58, 59, 60, 0, 1, 3, 4,
-5, 7, 8, 9, 10, 11, 12, 13, 15, 16, 17, 19, 20, 21, 23,
-24, 25, 27, 28, 29, 31, 32, 33, 35, 36, 37, 38, 39, 40, 41,
-42, 43, 44, 45, 46, 47, 51, 23, 24, 25, 26, 16, 18, 20, 22,
-15, 17, 19, 21, 6, 8, 10, 12, 14, 0, 2, 1, 3, 4, 5,
-11, 7, 9, 13, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
-11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25,
-26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40,
-41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55,
-56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70,
-71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85,
-86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100,
-101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115,
-116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130,
-131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 1, 0,
-2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0, 1,
-2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
-17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46,
-47, 48, 49, 50, 51, 52, 53, 54, 55, 0, 1, 2, 3, 4, 5,
-6, 7, 8, 9, 10, 11, 12, 0, 1, 2, 112, 114, 19, 61, 70,
-18, 111, 3, 5, 6, 66, 82, 109, 110, 113, 58, 102, 104, 31, 35,
-36, 37, 38, 71, 77, 86, 93, 95, 96, 108, 47, 25, 45, 46, 53,
-55, 75, 40, 41, 42, 52, 60, 83, 84, 24, 26, 11, 12, 22, 23,
-28, 30, 57, 63, 65, 69, 81, 90, 106, 32, 33, 34, 49, 50, 51,
-72, 73, 78, 79, 87, 88, 94, 4, 7, 8, 9, 10, 20, 21, 29,
-39, 43, 44, 48, 54, 56, 59, 62, 64, 67, 68, 74, 76, 80, 89,
-91, 92, 100, 101, 115, 116, 16, 99, 13, 14, 15, 17, 27, 85, 97,
-98, 103, 105, 107, 117, 7, 10, 19, 0, 1, 2, 3, 4, 5, 6,
-8, 9, 11, 12, 13, 14, 15, 16, 17, 18, 0, 1, 2, 3, 4,
-5, 7, 17, 0, 1, 2, 3, 4, 5, 6, 8, 9, 10, 11, 12,
-13, 14, 15, 16, 18, 19, 20, 21, 22, 23, 0, 1, 0, 7, 11,
-5, 6, 10, 3, 4, 1, 2, 8, 9, 12, 0, 1, 2, 3, 4,
-0, 1, 2, 3, 4, 1, 3, 0, 2, 4, 5, 6, 7, 8, 9,
-10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 0, 1, 2, 3, 4,
-5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
-20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34,
-35, 36, 0, 1, 75, 78, 76, 15, 79, 77, 8, 85, 14, 0, 4,
-10, 81, 83, 84, 87, 12, 80, 82, 11, 9, 2, 6, 86, 36, 38,
-37, 13, 1, 5, 3, 7, 49, 22, 24, 28, 32, 50, 58, 63, 66,
-71, 23, 25, 29, 33, 47, 48, 51, 52, 53, 54, 46, 17, 19, 16,
-20, 21, 26, 27, 30, 31, 34, 35, 39, 40, 41, 42, 43, 44, 45,
-55, 56, 57, 59, 60, 61, 62, 64, 65, 67, 68, 69, 70, 72, 73,
-74, 18, 11, 22, 1, 3, 5, 7, 9, 10, 13, 15, 16, 18, 20,
-26, 28, 0, 2, 4, 6, 8, 12, 14, 17, 19, 21, 23, 24, 25,
-27, 29, 47, 45, 43, 48, 42, 44, 49, 46, 33, 11, 27, 31, 37,
-38, 63, 17, 18, 21, 23, 25, 29, 32, 35, 77, 83, 97, 0, 5,
-9, 15, 16, 19, 39, 41, 53, 69, 20, 22, 24, 26, 28, 30, 34,
-36, 76, 82, 96, 102, 103, 1, 3, 7, 13, 40, 51, 57, 61, 67,
-71, 73, 75, 81, 87, 95, 101, 106, 107, 70, 2, 4, 6, 8, 10,
-12, 14, 50, 52, 54, 55, 56, 58, 59, 60, 62, 64, 65, 66, 68,
-72, 74, 78, 79, 80, 84, 85, 86, 88, 89, 90, 91, 92, 93, 94,
-98, 99, 100, 104, 105, 108, 109, 0, 1, 46, 43, 47, 42, 3, 44,
-5, 20, 4, 18, 24, 26, 30, 38, 34, 36, 7, 9, 22, 2, 45,
-21, 40, 19, 35, 37, 39, 32, 12, 14, 28, 10, 16, 41, 25, 27,
-31, 6, 8, 23, 33, 11, 17, 13, 15, 29, 52, 50, 53, 48, 49,
-51, 0, 1, 0, 1, 2, 3, 4, 5, 0, 1, 2, 3, 4, 5,
-6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
-21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
-36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50,
-51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
-66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80,
-81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
-96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110,
-111, 112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125,
-126, 127, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140,
-141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155,
-156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170,
-171, 172, 173, 174, 175, 176, 177, 178, 179, 0, 1, 2, 3, 4, 5,
-6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20,
-21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35,
-36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50,
-51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65,
-66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80,
-81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
-96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110,
-111, 112, 113, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
-12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26,
-27, 28, 29, 30, 31, 32, 33, 34, 35, 5, 15, 19, 27, 31, 35,
-39, 43, 96, 104, 120, 121, 131, 0, 1, 2, 10, 12, 24, 25, 46,
-47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 76, 77, 78, 79, 80,
-81, 82, 83, 84, 85, 86, 87, 88, 90, 91, 93, 95, 97, 99, 101,
-103, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118,
-119, 122, 123, 124, 125, 126, 127, 128, 129, 130, 132, 133, 134, 135, 136,
-137, 138, 140, 144, 148, 152, 156, 160, 164, 3, 4, 6, 7, 8, 9,
-11, 13, 14, 16, 17, 18, 20, 21, 22, 23, 26, 28, 29, 30, 32,
-33, 34, 36, 37, 38, 40, 41, 42, 44, 45, 57, 58, 59, 60, 61,
-62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 89,
-92, 94, 98, 100, 102, 139, 141, 142, 143, 145, 146, 147, 149, 150, 151,
-153, 154, 155, 157, 158, 159, 161, 162, 163, 165, 166, 36, 57, 60, 65,
-68, 114, 135, 156, 161, 162, 165, 170, 176, 179, 182, 183, 188, 191, 194,
-197, 198, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12,
-13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,
-28, 29, 30, 31, 32, 33, 34, 35, 37, 38, 39, 40, 41, 42, 43,
-44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 58, 59,
-61, 62, 63, 64, 66, 67, 69, 70, 71, 72, 73, 74, 75, 76, 77,
-78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92,
-93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107,
-108, 109, 110, 111, 112, 113, 115, 116, 117, 118, 119, 120, 121, 122, 123,
-124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 136, 137, 138, 139,
-140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154,
-155, 157, 158, 159, 160, 163, 164, 166, 167, 168, 169, 171, 172, 173, 174,
-175, 177, 178, 180, 181, 184, 185, 186, 187, 189, 190, 192, 193, 195, 196,
-199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, 212, 213,
-214, 215, 216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228,
-229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243,
-244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255, 256, 257, 258,
-259, 260, 261, 262, 263, 264, 265, 266, 267, 268, 269, 270, 271, 272, 273,
-274, 275, 276, 277, 278, 279, 280, 281, 282, 283, 284, 285, 286, 287, 288,
-289, 290, 291, 292, 293, 294, 295, 296, 297, 298, 299, 300, 301, 302, 303,
-304, 305, 306, 307, 308, 309, 310, 311, 312, 313, 314, 315, 316, 317, 318,
-319, 320, 321, 322, 323, 324, 325, 326, 327, 328, 329, 330, 331, 332, 333,
-334, 335, 336, 337, 338, 339, 340, 341, 342, 343, 344, 345, 346, 347, 348,
-349, 350, 351, 352, 353, 354, 355, 356, 357, 358, 359, 360, 361, 362, 363,
-364, 365, 366, 367, 368, 369, 370, 371, 372, 373, 374, 375, 376, 377, 378,
-379, 380, 381, 382, 383, 384, 385, 386, 387, 388, 389, 390, 391, 392, 393,
-394, 395, 396, 397, 398, 399, 400, 401, 402, 403, 404, 405, 406, 407, 408,
-409, 410, 411, 412, 413, 414, 415, 416, 417, 418, 419, 420, 421, 422, 423,
-424, 425, 426, 427, 428, 429, 430, 431, 432, 433, 434, 435, 436, 437, 438,
-439, 440, 441, 442, 443, 444, 445, 446, 447, 448, 449, 450, 451, 452, 453,
-454, 455, 456, 457, 458, 459, 460, 461, 462, 463, 464, 465, 466, 467, 468,
-469, 470, 471, 472, 473, 474, 475, 476, 477, 478, 479, 480, 481, 482, 483,
-484, 485, 486, 487, 488, 489, 490, 491, 492, 493, 494, 495, 496, 497, 498,
-499, 500, 501, 502, 503, 504, 505, 506, 0, 1, 2, 3, 4, 5, 6,
-7, 8, 9, 10, 11, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
-10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24,
-25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,
-40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54,
-55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69,
-70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84,
-85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99,
-100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114,
-115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129,
-130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 144,
-145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
-160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174,
-175, 176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187, 188, 189,
-190, 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204,
-205, 206, 207, 208, 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219,
-220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234,
-235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249,
-250, 251, 252, 253, 254, 255, 256, 257, 258, 259, 260, 261, 262, 263, 264,
-265, 266, 267, 268, 269, 270, 271, 272, 273, 274, 275, 276, 277, 278, 279,
-280, 281, 282, 283, 284, 285, 286, 287, 288, 289, 290, 291, 292, 293, 294,
-295, 296, 297, 298, 299, 300, 301, 302, 303, 304, 305, 306, 307, 308, 309,
-310, 311, 312, 313, 314, 315, 316, 317, 318, 319, 320, 321, 322, 323, 324,
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-922, 923, 924, 925, 926, 927, 928, 929, 930, 931, 932, 933, 934, 935, 936,
-937, 938, 939, 940, 941, 942, 943, 944, 945, 946, 947, 948, 949, 950, 951,
-952, 953, 954, 955, 956, 957, 958, 959, 960, 961, 962, 963, 964, 965, 966,
-967, 968, 969, 970, 971, 972, 973, 974, 975, 976, 977, 978, 979, 980, 981,
-982, 983, 984, 985, 986, 987, 988, 989, 990, 991, 992, 993, 994, 995, 996,
-997, 998, 999, 1000, 1001, 1002, 1003, 1004, 1005, 1006, 1007, 1008, 1009, 1010, 1011,
-1012, 1013, 1014, 1015, 1016, 1017, 1018, 1019, 1020, 1021, 1022, 1023, 1024, 1025, 1026,
-1027, 1028, 1029, 1030, 1031, 1032, 1033, 1034, 1035, 1036, 1037, 1038, 1039, 1040, 1041,
-1042, 1043, 1044, 1045, 1046, 1047, 1048, 1049, 1050, 1051, 1052, 1053, 1054, 1055, 1056,
-1057, 1058, 1059, 1060, 1061, 1062, 1063, 1064, 1065, 1066, 1067, 1068, 1069, 1070, 1071,
-1072, 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1080, 1081, 1082, 1083, 1084, 1085, 1086,
-1087, 1088, 1089, 1090, 1091, 1092, 1093, 1094, 1095, 1096, 1097, 1098, 1099, 1100, 1101,
-1102, 1103, 1104, 1105, 1106, 1107, 1108, 1109, 1110, 1111, 1112, 1113, 1114, 1115, 1116,
-1117, 1118, 1119, 1120, 1121, 1122, 1123, 1124, 1125, 1126, 1127, 1128, 1129, 1130, 1131,
-1132, 1133, 1134, 1135, 1136, 1137, 1138, 1139, 1140, 1141, 1142, 1143, 1144, 1145, 1146,
-1147, 1148, 1149, 1150, 1151, 1152, 1153, 1154, 1155, 1156, 1157, 1158, 1159, 1160, 1161,
-1162, 1163, 1164, 1165, 1166, 1167, 1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176,
-1177, 1178, 1179, 1180, 1181, 1182, 1183, 1184, 1185, 1186, 1187, 1188, 1189, 1190, 1191,
-1192, 1193, 1194, 1195, 1196, 1197, 1198, 1199, 1200, 1201, 1202, 1203, 1204, 1205, 1206,
-1207, 1208, 1209, 1210, 1211, 1212, 1213, 1214, 1215, 1216, 1217, 1218, 1219, 1220, 1221,
-1222, 1223, 1224, 1225, 1226, 1227, 1228, 1229, 1230, 1231, 1232, 1233, 1234, 1235, 1236,
-1237, 1238, 1239, 1240, 1241, 1242, 1243, 1244, 1245, 1246, 1247, 1248, 1249, 1250, 1251,
-1252, 1253, 1254, 1255, 1256, 1257, 1258, 1259, 1260, 1261, 1262, 1263, 1264, 1265, 1266,
-1267, 1268, 1269, 1270, 1271, 1272, 1273, 1274, 1275, 1276, 1277, 1278, 1279, 1280, 1281,
-1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289, 1290, 1291, 1292, 1293, 1294, 1295, 1296,
-1297, 1298, 1299, 1300, 1301, 1302, 1303, 1304, 1305, 1306, 1307, 1308, 1309, 1310, 1311,
-1312, 1313, 1314, 1315, 1316, 1317, 1318, 1319, 1320, 1321, 1322, 1323, 1324, 1325, 1326,
-1327, 1328, 1329, 1330, 1331, 1332, 1333, 1334, 1335, 1336, 1337, 1338, 1339, 1340, 1341,
-1342, 1343, 1344, 1345, 1346, 1347, 1348, 1349, 1350, 1351, 1352, 1353, 1354, 1355, 1356,
-1357, 1358, 1359, 1360, 1361, 1362, 1363, 1364, 1365, 1366, 1367, 1368, 1369, 1370, 1371,
-1372, 1373, 1374, 1375, 1376, 1377, 1378, 1379, 1380, 1381, 1382, 1383, 1384, 1385, 1386,
-1387, 1388, 1389, 1390, 1391, 1392, 1393, 1394, 1395, 1396, 1397, 1398, 1399, 1400, 1401,
-1402, 1403, 1404, 1405, 1406, 1407, 1408, 1409, 1410, 1411, 1412, 1413, 1414, 1415, 1416,
-1417, 1418, 1419, 1420, 1421, 1422, 1423, 1424, 1425, 1426, 1427, 1428, 1429, 1430, 1431,
-1432, 1433, 1434, 1435, 1436, 1437, 1438, 1439, 1440, 1441, 1442, 1443, 1444, 1445, 1446,
-1447, 1448, 1449, 1450, 1451, 1452, 1453, 1454, 1455, 1456, 1457, 1458, 1459, 1460, 1461,
-1462, 1463, 1464, 1465, 1466, 1467, 1468, 1469, 1470, 1471, 1472, 1473, 1474, 1475, 1476,
-1477, 1478, 1479, 1480, 1481, 1482, 1483, 1484, 1485, 1486, 1487, 1488, 1489, 1490, 1491,
-1492, 1493, 1494, 1495, 1496, 1497, 1498, 1499, 1500, 1501, 1502, 1503, 1504, 1505, 1506,
-1507, 1508, 1509, 1510, 1511, 1512, 1513, 1514, 1515, 1516, 1517, 1518, 1519, 1520, 1521,
-1522, 1523, 1524, 1525, 1526, 1527, 1528, 1529, 1530, 1531, 1532, 1533, 1534, 1535, 1536,
-1537, 1538, 1539, 1540, 1541, 1542, 1543, 1544, 1545, 1546, 1547, 1548, 1549, 1550, 1551,
-1552, 1553, 1554, 1555, 1556, 1557, 1558, 1559, 1560, 1561, 1562, 1563, 1564, 1565, 1566,
-1567, 1568, 1569, 1570, 1571, 1572, 1573, 1574, 1575, 1576, 1577, 1578, 1579, 1580, 1581,
-1582, 1583, 1584, 1585, 1586, 1587, 1588, 1589, 1590, 1591, 1592, 1593, 1594, 1595, 1596,
-1597, 1598, 1599, 1600, 1601, 1602, 1603, 1604, 1605, 1606, 1607, 1608, 1609, 1610, 1611,
-1612, 1613, 1614, 1615, 1616, 1617, 1618, 1619, 1620, 1621, 1622, 1623, 1624, 1625, 1626,
-1627, 1628, 1629, 1630, 1631, 1632, 1633, 1634, 1635, 1636, 1637, 1638, 1639, 1640, 1641,
-1642, 1643, 1644, 1645, 1646, 1647, 1648, 1649, 1650, 1651, 1652, 1653, 1654, 1655, 1656,
-1657, 1658, 1659, 1660, 1661, 1662, 1663, 1664, 1665, 1666, 1667, 1668, 1669, 1670, 1671,
-1672, 1673, 1674, 1675, 1676, 1677, 1678, 1679, 1680, 1681, 1682, 1683, 1684, 1685, 1686,
-1687, 1688, 1689, 1690, 1691, 1692, 1693, 1694, 1695, 1696, 1697, 1698, 1699, 1700, 1701,
-1702, 1703, 1704, 1705, 1706, 1707, 1708, 1709, 1710, 1711, 1712, 1713, 1714, 1715, 1716,
-1717, 1718, 1719, 1720, 1721, 1722, 1723, 1724, 1725, 1726, 1727, 1728, 1729, 1730, 1731,
-1732, 1733, 1734, 1735, 1736, 1737, 1738, 1739, 1740, 1741, 1742, 1743, 1744, 1745, 1746,
-1747, 1748, 1749, 1750, 1751, 1752, 1753, 1754, 1755, 1756, 1757, 1758, 1759, 1760, 1761,
-1762, 1763, 1764, 1765, 1766, 1767, 1768, 1769, 1770, 1771, 1772, 1773, 1774, 1775, 1776,
-1777, 1778, 1779, 1780, 1781, 1782, 1783, 1784, 1785, 1786, 1787, 1788, 1789, 1790, 1791,
-1792, 1793, 1794, 1795, 1796, 1797, 1798, 1799, 1800, 1801, 1802, 1803, 1804, 1805, 1806,
-1807, 1808, 1809, 1810, 1811, 1812, 1813, 1814, 1815, 1816, 1817, 1818, 1819, 1820, 1821,
-1822, 1823, 1824, 1825, 1826, 1827, 1828, 1829, 1830, 1831, 1832, 1833, 1834, 1835, 1836,
-1837, 1838, 1839, 1840, 1841, 1842, 1843, 1844, 1845, 1846, 1847, 1848, 1849, 1850, 1851,
-1852, 1853, 1854, 1855, 1856, 1857, 1858, 1859, 1860, 1861, 1862, 1863, 1864, 1865, 1866,
-1867, 1868, 1869, 1870, 1871, 1872, 1873, 1874, 1875, 1876, 1877, 1878, 1879, 1880, 1881,
-1882, 1883, 1884, 1885, 1886, 1887, 1888, 1889, 1890, 1891, 1892, 1893, 1894, 1895, 1896,
-1897, 1898, 1899, 1900, 1901, 1902, 1903, 1904, 1905, 1906, 1907, 1908, 1909, 1910, 1911,
-1912, 1913, 1914, 1915, 1916, 1917, 1918, 1919, 1920, 1921, 1922, 1923, 1924, 1925, 1926,
-1927, 1928, 1929, 1930, 1931, 1932, 1933, 1934, 1935, 1936, 1937, 1938, 1939, 1940, 1941,
-1942, 1943, 1944, 1945, 1946, 1947, 1948, 1949, 1950, 1951, 1952, 1953, 1954, 1955, 1956,
-1957, 1958, 1959, 1960, 1961, 1962, 1963, 1964, 1965, 1966, 1967, 1968, 1969, 1970, 1971,
-1972, 1973, 1974, 1975, 1976, 1977, 1978, 1979, 1980, 1981, 1982, 1983, 1984, 1985, 1986,
-1987, 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
-2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2016,
-2017, 2018, 2019, 2020, 2021, 2022, 2023, 2024, 2025, 2026, 2027, 2028, 2029, 2030, 2031,
-2032, 2033, 2034, 2035, 2036, 2037, 2038, 2039, 2040, 2041, 2042, 2043, 2044, 2045, 2046,
-2047, 2048, 2049, 2050, 2051, 2052, 2053, 2054, 2055, 2056, 2057, 2058, 2059, 2060, 2061,
-2062, 2063, 2064, 2065, 2066, 2067, 2068, 2069, 2070, 2071, 2072, 2073, 2074, 2075, 2076,
-2077, 2078, 2079, 2080, 2081, 2082, 2083, 2084, 2085, 2086, 2087, 2088, 2089, 2090, 2091,
-2092, 2093, 2094, 2095, 2096, 2097, 2098, 2099, 2100, 2101, 2102, 2103, 2104, 2105, 2106,
-2107, 2108, 2109, 2110, 2111, 2112, 2113, 2114, 2115, 2116, 2117, 2118, 2119, 2120, 2121,
-2122, 2123, 2124, 2125, 2126, 2127, 2128, 2129, 2130, 2131, 2132, 2133, 2134, 2135, 2136,
-2137, 2138, 2139, 2140, 2141, 2142, 2143, 2144, 2145, 2146, 2147, 2148, 2149, 2150, 2151,
-2152, 2153, 2154, 2155, 2156, 2157, 2158, 2159, 2160, 2161, 2162, 2163, 2164, 2165, 2166,
-2167, 2168, 2169, 2170, 2171, 2172, 2173, 2174, 2175, 2176, 2177, 2178, 2179, 2180, 2181,
-2182, 2183, 2184, 2185, 2186, 2187, 2188, 2189, 2190, 2191, 2192, 2193, 2194, 2195, 2196,
-2197, 2198, 2199, 2200, 2201, 2202, 2203, 2204, 2205, 2206, 2207, 2208, 2209, 2210, 2211,
-2212, 2213, 2214, 2215, 2216, 2217, 2218, 2219, 2220, 2221, 2222, 2223, 2224, 2225, 2226,
-2227, 2228, 2229, 2230, 2231, 2232, 2233, 2234, 2235, 2236, 2237, 2238, 2239, 2240, 2241,
-2242, 2243, 2244, 2245, 2246, 2247, 2248, 2249, 2250, 2251, 2252, 2253, 2254, 2255, 2256,
-2257, 2258, 2259, 2260, 2261, 2262, 2263, 2264, 2265, 2266, 2267, 2268, 2269, 2270, 2271,
-2272, 2273, 2274, 2275, 2276, 2277, 2278, 2279, 2280, 2281, 2282, 2283, 2284, 2285, 2286,
-2287, 2288, 2289, 2290, 2291, 2292, 2293, 2294, 2295, 2296, 2297, 2298, 2299, 2300, 2301,
-2302, 2303, 2304, 2305, 2306, 2307, 2308, 2309, 2310, 2311, 2312, 2313, 2314, 2315, 2316,
-2317, 2318, 2319, 2320, 2321, 2322, 2323, 2324, 2325, 2326, 2327, 2328, 2329, 2330, 2331,
-2332, 2333, 2334, 2335, 2336, 2337, 2338, 2339, 2340, 2341, 2342, 2343, 2344, 2345, 2346,
-2347, 2348, 2349, 2350, 2351, 2352, 2353, 2354, 2355, 2356, 2357, 2358, 2359, 2360, 2361,
-2362, 2363, 2364, 2365, 2366, 2367, 2368, 2369, 2370, 2371, 2372, 2373, 2374, 2375, 2376,
-2377, 2378, 2379, 2380, 2381, 2382, 2383, 2384, 2385, 2386, 2387, 2388, 2389, 2390, 2391,
-2392, 2393, 2394, 2395, 2396, 2397, 2398, 2399, 2400, 2401, 2402, 2403, 2404, 2405, 2406,
-2407, 2408, 2409, 2410, 2411, 2412, 2413, 2414, 2415, 2416, 2417, 2418, 2419, 2420, 2421,
-2422, 2423, 2424, 2425, 2426, 2427, 2428, 2429, 2430, 2431, 2432, 2433, 2434, 2435, 2436,
-2437, 2438, 2439, 2440, 2441, 2442, 2443, 2444, 2445, 2446, 2447, 2448, 2449, 2450, 2451,
-2452, 2453, 2454, 2455, 2456, 2457, 2458, 2459, 2460, 2461, 2462, 2463, 2464, 2465, 2466,
-2467, 2468, 2469, 2470, 2471, 2472, 2473, 2474, 2475, 2476, 2477, 2478, 2479, 2480, 2481,
-2482, 2483, 2484, 2485, 2486, 2487, 2488, 2489, 2490, 2491, 2492, 2493, 2494, 2495, 2496,
-2497, 2498, 2499, 2500, 2501, 2502, 2503, 2504, 2505, 2506, 2507, 2508, 2509, 2510, 2511,
-2512, 2513, 2514, 2515, 2516, 2517, 2518, 2519, 2520, 2521, 2522, 2523, 2524, 2525, 2526,
-2527, 2528, 2529, 2530, 2531, 2532, 2533, 2534, 2535, 2536, 2537, 2538, 2539, 2540, 2541,
-2542, 2543, 2544, 2545, 2546, 2547, 2548, 2549, 2550, 2551, 2552, 2553, 2554, 2555, 2556,
-2557, 2558, 2559, 2560, 2561, 2562, 2563, 2564, 2565, 2566, 2567, 2568, 2569, 2570, 2571,
-2572, 2573, 2574, 2575, 2576, 2577, 2578, 2579, 2580, 2581, 2582, 2583, 2584, 2585, 2586,
-2587, 2588, 2589, 2590, 2591, 2592, 2593, 2594, 2595, 2596, 2597, 2598, 2599, 2600, 2601,
-2602, 2603, 2604, 2605, 2606, 2607, 2608, 2609, 2610, 2611, 2612, 2613, 2614, 2615, 2616,
-2617, 2618, 2619, 2620, 2621, 2622, 2623, 2624, 2625, 2626, 2627, 2628, 2629, 2630, 2631,
-2632, 2633, 2634, 2635, 2636, 2637, 2638, 2639, 2640, 2641, 2642, 2643, 2644, 2645, 2646,
-2647, 2648, 2649, 2650, 2651, 2652, 2653, 2654, 2655, 2656, 2657, 2658, 2659, 2660, 2661,
-2662, 2663, 2664, 2665, 2666, 2667, 2668, 2669, 2670, 2671, 2672, 2673, 2674, 2675, 2676,
-2677, 2678, 2679, 2680, 2681, 2682, 2683, 2684, 2685, 2686, 2687, 2688, 2689, 2690, 2691,
-2692, 2693, 2694, 2695, 2696, 2697, 2698, 2699, 2700, 2701, 2702, 2703, 2704, 2705, 2706,
-2707, 2708, 2709, 2710, 2711, 2712, 2713, 2714, 2715, 2716, 2717, 2718, 2719, 2720, 2721,
-2722, 2723, 2724, 2725, 2726, 2727, 2728, 2729, 2730, 2731, 2732, 2733, 2734, 2735, 2736,
-2737, 2738, 2739, 2740, 2741, 2742, 2743, 2744, 2745, 2746, 2747, 2748, 2749, 2750, 2751,
-2752, 2753, 2754, 2755, 2756, 2757, 2758, 2759, 2760, 2761, 2762, 2763, 2764, 2765, 2766,
-2767, 2768, 2769, 2770, 2771, 2772, 2773, 2774, 2775, 2776, 2777, 2778, 2779, 2780, 2781,
-2782, 2783, 2784, 2785, 2786, 2787, 2788, 2789, 2790, 2791, 2792, 2793, 2794, 2795, 2796,
-2797, 2798, 2799, 2800, 2801, 2802, 2803, 2804, 2805, 2806, 2807, 2808, 2809, 2810, 2811,
-2812, 2813, 2814, 2815, 2816, 2817, 2818, 2819, 2820, 2821, 2822, 2823, 2824, 2825, 2826,
-2827, 2828, 2829, 2830, 2831, 2832, 2833, 2834, 2835, 2836, 2837, 2838, 2839, 2840, 2841,
-2842, 2843, 2844, 2845, 2846, 2847, 2848, 2849, 2850, 2851, 2852, 2853, 2854, 2855, 2856,
-2857, 2858, 2859, 2860, 2861, 2862, 2863, 9, 11, 6, 7, 8, 10, 4, 5,
-0, 1, 2, 3, 0, 2, 10, 3, 6, 1, 9, 11, 4, 8, 7,
-5, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
-14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28,
-29, 30, 31, 32, 33, 34, 35, 68, 116, 22, 10, 97, 117, 52, 110,
-7, 19, 111, 115, 6, 18, 0, 74, 88, 12, 48, 108, 99, 109, 38,
-104, 4, 16, 24, 96, 15, 3, 50, 84, 71, 85, 36, 102, 103, 119,
-54, 86, 100, 30, 25, 105, 113, 69, 53, 63, 98, 87, 93, 89, 95,
-9, 21, 62, 114, 5, 17, 26, 55, 2, 14, 65, 8, 20, 64, 92,
-42, 106, 11, 23, 46, 66, 34, 101, 107, 56, 35, 47, 57, 67, 76,
-118, 75, 83, 82, 94, 37, 77, 29, 51, 1, 13, 27, 49, 58, 112,
-39, 59, 28, 70, 44, 73, 80, 81, 32, 72, 31, 43, 33, 40, 41,
-45, 60, 61, 78, 79, 90, 91
-};
-
-
-/**Function*************************************************************
-
-  Synopsis    [Reads library from array.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Dar_LibReadNodes()
-{
-    Vec_Int_t * vResult;
-    int i;
-    vResult = Vec_IntAlloc( s_nDataSize1 );
-    for ( i = 0; i < s_nDataSize1; i++ )
-        Vec_IntPush( vResult, s_Data1[i] );
-    return vResult;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads library from array.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Dar_LibReadOuts()
-{
-    Vec_Int_t * vResult;
-    int i;
-    vResult = Vec_IntAlloc( s_nDataSize2 );
-    for ( i = 0; i < s_nDataSize2; i++ )
-        Vec_IntPush( vResult, s_Data2[i] );
-    return vResult;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads library from array.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Dar_LibReadPrios()
-{
-    Vec_Int_t * vResult;
-    int i;
-    vResult = Vec_IntAlloc( s_nDataSize3 );
-    for ( i = 0; i < s_nDataSize3; i++ )
-        Vec_IntPush( vResult, s_Data3[i] );
-    return vResult;
-}
-
-#if 0
-
-#include "abc.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-/**Function*************************************************************
-
-  Synopsis    [Generate arrays.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Aig_NtkGenerateArrays( Abc_Ntk_t * pNtk )
-{
-    extern int Io_WriteAigerEncode( char * pBuffer, int Pos, unsigned x );
-
-    Abc_Obj_t * pObj;
-    int i, Count = 0;
-    assert( Abc_NtkPiNum(pNtk) == 4 );
-    assert( Abc_NtkIsStrash(pNtk) );
-    assert( Abc_ObjFanoutNum(Abc_AigConst1(pNtk)) == 0 );
-/*
-    {
-        unsigned char * pBuffer;
-        int Pos, uLit, uLit0, uLit1, Size, Digit;
-
-        Abc_NtkForEachPi( pNtk, pObj, i )
-            pObj->pCopy = (void *)Count++;
-
-        Pos = 0;
-        pBuffer = ABC_ALLOC( char, 200000 );
-        Abc_AigForEachAnd( pNtk, pObj, i )
-        {
-            pObj->pCopy = (void *)Count++;
-            uLit  = ((int)pObj->pCopy << 1);
-            uLit0 = (((int)Abc_ObjFanin0(pObj)->pCopy) << 1) | Abc_ObjFaninC0(pObj);
-            uLit1 = (((int)Abc_ObjFanin1(pObj)->pCopy) << 1) | Abc_ObjFaninC1(pObj);
-            assert( uLit0 < uLit1 );
-            Pos = Io_WriteAigerEncode( pBuffer, Pos, uLit  - uLit1 );
-            Pos = Io_WriteAigerEncode( pBuffer, Pos, uLit1 - uLit0 );
-        }
-        // write the buffer
-        Size = 0;
-        for ( i = 0; i < Pos; i++ )
-        {
-            if ( i % 36 == 0 )
-                printf( "\n" );
-
-            Digit = pBuffer[i] & 0xF;
-            if ( Digit < 10 )
-                printf( "%d", Digit );
-            else 
-                printf( "%c", Digit - 10 + 'A' );
-
-
-            Digit = pBuffer[i];
-            Digit >>= 4;
-            if ( Digit < 10 )
-                printf( "%d", Digit );
-            else 
-                printf( "%c", Digit - 10 + 'A' );
-
-        }
-        printf( "\n" );
-        printf( "Size = %d.\n", Pos );
-    }
-*/
-
-
-    Abc_NtkForEachPi( pNtk, pObj, i )
-        pObj->pCopy = (void *)Count++;
-    Abc_AigForEachAnd( pNtk, pObj, i )
-    {
-//        if ( (Count - 4) % 6 == 0 )
-//            printf( "\n" );
-//        printf( "%5d,", (((int)Abc_ObjFanin0(pObj)->pCopy) << 1) | Abc_ObjFaninC0(pObj) );
-//        printf( "%5d,", (((int)Abc_ObjFanin1(pObj)->pCopy) << 1) | Abc_ObjFaninC1(pObj) );
-        pObj->pCopy = (void *)Count++;
-    }
-//    printf( "\n" );
-//    printf( "Nodes = %d.\n", Count-4 );
-
-
-
-    Abc_NtkForEachPo( pNtk, pObj, i )
-    {
-        if ( i % 12 == 0 )
-            printf( "\n" );
-        printf( "%5d,",  (int)Abc_ObjFanin0(pObj)->pCopy );
-    }
-    printf( "\n" );
-    printf( "Outputs = %d.\n", Abc_NtkPoNum(pNtk) );
-
-
-/*
-    {
-        unsigned char * pBuffer;
-        Vec_Int_t * vOuts;
-        int Pos, Prev, Out;
-
-        vOuts = Vec_IntAlloc( 25000 );
-        Abc_NtkForEachPo( pNtk, pObj, i )
-            Vec_IntPush( vOuts, Abc_ObjFaninId0(pObj) );
-        Vec_IntSort( vOuts, 0 );
-
-        Pos = 0;
-        pBuffer = ABC_ALLOC( char, 50000 );
-        Prev = 0;
-        Vec_IntForEachEntry( vOuts, Out, i )
-        {
-            assert( Prev < Out );
-            Pos = Io_WriteAigerEncode( pBuffer, Pos, Out - Prev );
-            Prev = Out;
-        }
-        Vec_IntFree( vOuts );
-
-        // write the buffer
-        for ( i = 0; i < Pos; i++ )
-        {
-            if ( i % 32 == 0 )
-                printf( "\n" );
-            printf( "%d,",  pBuffer[i] );
-        }
-        printf( "\n" );
-        printf( "Size = %d.\n", Pos );
-    }
-*/
-
-}
-
-#endif
-
-
-
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dar/darInt.h b/src/aig/dar/darInt.h
deleted file mode 100644
index 23e89d3c..00000000
--- a/src/aig/dar/darInt.h
+++ /dev/null
@@ -1,171 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [darInt.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    [Internal declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: darInt.h,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#ifndef __DAR_INT_H__
-#define __DAR_INT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-#include <time.h>
-
-//#include "bar.h"
-#include "vec.h"
-#include "aig.h"
-#include "dar.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
- 
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Dar_Man_t_            Dar_Man_t;
-typedef struct Dar_Cut_t_            Dar_Cut_t;
-
-// the AIG 4-cut
-struct Dar_Cut_t_  // 6 words
-{
-    unsigned         uSign;          // cut signature
-    unsigned         uTruth  : 16;   // the truth table of the cut function
-    unsigned         Value   : 11;   // the value of the cut 
-    unsigned         fBest   :  1;   // marks the best cut
-    unsigned         fUsed   :  1;   // marks the cut currently in use
-    unsigned         nLeaves :  3;   // the number of leaves
-    int              pLeaves[4];     // the array of leaves
-};
-
-// the AIG manager
-struct Dar_Man_t_
-{
-    // input data
-    Dar_RwrPar_t *   pPars;          // rewriting parameters
-    Aig_Man_t *      pAig;           // AIG manager 
-    // various data members
-    Aig_MmFixed_t *  pMemCuts;       // memory manager for cuts
-    void *           pManCnf;        // CNF managers
-    Vec_Ptr_t *      vCutNodes;      // the nodes with cuts allocated
-    // current rewriting step
-    Vec_Ptr_t *      vLeavesBest;    // the best set of leaves
-    int              OutBest;        // the best output (in the library)
-    int              OutNumBest;     // the best number of the output
-    int              GainBest;       // the best gain
-    int              LevelBest;      // the level of node with the best gain
-    int              ClassBest;      // the equivalence class of the best replacement
-    // function statistics
-    int              nTotalSubgs;    // the total number of subgraphs tried
-    int              ClassTimes[222];// the runtimes for each class
-    int              ClassGains[222];// the gains for each class
-    int              ClassSubgs[222];// the graphs for each class
-    int              nCutMemUsed;    // memory used for cuts
-    // rewriting statistics
-    int              nNodesInit;     // the original number of nodes
-    int              nNodesTried;    // the number of nodes attempted
-    int              nCutsAll;       // all cut pairs
-    int              nCutsTried;     // computed cuts
-    int              nCutsUsed;      // used cuts
-    int              nCutsBad;       // bad cuts due to absent fanin
-    int              nCutsGood;      // good cuts
-    int              nCutsSkipped;   // skipped bad cuts
-    // timing statistics
-    int              timeCuts;
-    int              timeEval;
-    int              timeOther;
-    int              timeTotal;
-    int              time1;
-    int              time2;
-};
-
-static inline Dar_Cut_t *  Dar_ObjCuts( Aig_Obj_t * pObj )                         { return (Dar_Cut_t *)pObj->pData;    }
-static inline void         Dar_ObjSetCuts( Aig_Obj_t * pObj, Dar_Cut_t * pCuts )   { assert( !Aig_ObjIsNone(pObj) ); pObj->pData = pCuts;   }
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                          ITERATORS                               ///
-////////////////////////////////////////////////////////////////////////
-
-// iterator over all cuts of the node
-#define Dar_ObjForEachCutAll( pObj, pCut, i )                                   \
-    for ( (pCut) = Dar_ObjCuts(pObj), i = 0; i < (int)(pObj)->nCuts; i++, pCut++ ) 
-#define Dar_ObjForEachCut( pObj, pCut, i )                                      \
-    for ( (pCut) = Dar_ObjCuts(pObj), i = 0; i < (int)(pObj)->nCuts; i++, pCut++ ) if ( (pCut)->fUsed==0 ) {} else
-// iterator over leaves of the cut
-#define Dar_CutForEachLeaf( p, pCut, pLeaf, i )                                 \
-    for ( i = 0; (i < (int)(pCut)->nLeaves) && (((pLeaf) = Aig_ManObj(p, (pCut)->pLeaves[i])), 1); i++ )
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== darBalance.c ========================================================*/
-/*=== darCore.c ===========================================================*/
-/*=== darCut.c ============================================================*/
-extern void            Dar_ManCutsRestart( Dar_Man_t * p, Aig_Obj_t * pRoot );
-extern void            Dar_ManCutsFree( Dar_Man_t * p );
-extern Dar_Cut_t *     Dar_ObjPrepareCuts( Dar_Man_t * p, Aig_Obj_t * pObj );
-extern Dar_Cut_t *     Dar_ObjComputeCuts_rec( Dar_Man_t * p, Aig_Obj_t * pObj );
-extern Dar_Cut_t *     Dar_ObjComputeCuts( Dar_Man_t * p, Aig_Obj_t * pObj );
-extern void            Dar_ObjCutPrint( Aig_Man_t * p, Aig_Obj_t * pObj );
-/*=== darData.c ===========================================================*/
-extern Vec_Int_t *     Dar_LibReadNodes();
-extern Vec_Int_t *     Dar_LibReadOuts();
-extern Vec_Int_t *     Dar_LibReadPrios();
-/*=== darLib.c ============================================================*/
-extern void            Dar_LibStart();
-extern void            Dar_LibStop();
-extern void            Dar_LibReturnCanonicals( unsigned * pCanons );
-extern void            Dar_LibEval( Dar_Man_t * p, Aig_Obj_t * pRoot, Dar_Cut_t * pCut, int Required, int * pnMffcSize );
-extern Aig_Obj_t *     Dar_LibBuildBest( Dar_Man_t * p );
-/*=== darMan.c ============================================================*/
-extern Dar_Man_t *     Dar_ManStart( Aig_Man_t * pAig, Dar_RwrPar_t * pPars );
-extern void            Dar_ManStop( Dar_Man_t * p );
-extern void            Dar_ManPrintStats( Dar_Man_t * p );
-/*=== darPrec.c ============================================================*/
-extern char **         Dar_Permutations( int n );
-extern void            Dar_Truth4VarNPN( unsigned short ** puCanons, char ** puPhases, char ** puPerms, unsigned char ** puMap );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/dar/darLib.c b/src/aig/dar/darLib.c
deleted file mode 100644
index bf78577c..00000000
--- a/src/aig/dar/darLib.c
+++ /dev/null
@@ -1,1339 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [darLib.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    [Library of AIG subgraphs used for rewriting.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: darLib.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "darInt.h"
-#include "gia.h"
-#include "dar.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Dar_Lib_t_            Dar_Lib_t;
-typedef struct Dar_LibObj_t_         Dar_LibObj_t;
-typedef struct Dar_LibDat_t_         Dar_LibDat_t;
-
-struct Dar_LibObj_t_ // library object (2 words)
-{
-    unsigned         Fan0    : 16;  // the first fanin
-    unsigned         Fan1    : 16;  // the second fanin
-    unsigned         fCompl0 :  1;  // the first compl attribute
-    unsigned         fCompl1 :  1;  // the second compl attribute
-    unsigned         fPhase  :  1;  // the phase of the node
-    unsigned         fTerm   :  1;  // indicates a PI
-    unsigned         Num     : 28;  // internal use
-};
-
-struct Dar_LibDat_t_ // library object data
-{
-    union { 
-    Aig_Obj_t *      pFunc;         // the corresponding AIG node if it exists
-    int              iGunc; };      // the corresponding AIG node if it exists
-    int              Level;         // level of this node after it is constructured
-    int              TravId;        // traversal ID of the library object data
-    float            dProb;         // probability of the node being 1
-    unsigned char    fMffc;         // set to one if node is part of MFFC
-    unsigned char    nLats[3];      // the number of latches on the input/output stem
-};
-
-struct Dar_Lib_t_ // library 
-{
-    // objects
-    Dar_LibObj_t *   pObjs;         // the set of library objects
-    int              nObjs;         // the number of objects used
-    int              iObj;          // the current object
-    // structures by class
-    int              nSubgr[222];   // the number of subgraphs by class
-    int *            pSubgr[222];   // the subgraphs for each class
-    int *            pSubgrMem;     // memory for subgraph pointers
-    int              nSubgrTotal;   // the total number of subgraph
-    // structure priorities
-    int *            pPriosMem;     // memory for priority of structures
-    int *            pPrios[222];   // pointers to the priority numbers
-    // structure places in the priorities
-    int *            pPlaceMem;     // memory for places of structures in the priority lists
-    int *            pPlace[222];   // pointers to the places numbers
-    // structure scores
-    int *            pScoreMem;     // memory for scores of structures
-    int *            pScore[222];   // pointers to the scores numbers
-    // nodes by class
-    int              nNodes[222];   // the number of nodes by class
-    int *            pNodes[222];   // the nodes for each class
-    int *            pNodesMem;     // memory for nodes pointers
-    int              nNodesTotal;   // the total number of nodes
-    // prepared library
-    int              nSubgraphs;
-    int              nNodes0Max;
-    // nodes by class
-    int              nNodes0[222];   // the number of nodes by class
-    int *            pNodes0[222];   // the nodes for each class
-    int *            pNodes0Mem;     // memory for nodes pointers
-    int              nNodes0Total;   // the total number of nodes
-    // structures by class
-    int              nSubgr0[222];   // the number of subgraphs by class
-    int *            pSubgr0[222];   // the subgraphs for each class
-    int *            pSubgr0Mem;     // memory for subgraph pointers
-    int              nSubgr0Total;   // the total number of subgraph
-    // object data
-    Dar_LibDat_t *   pDatas;
-    int              nDatas;
-    // information about NPN classes
-    char **          pPerms4;
-    unsigned short * puCanons; 
-    char *           pPhases; 
-    char *           pPerms; 
-    unsigned char *  pMap;
-};
-
-static Dar_Lib_t * s_DarLib = NULL;
-
-static inline Dar_LibObj_t * Dar_LibObj( Dar_Lib_t * p, int Id )    { return p->pObjs + Id; }
-static inline int            Dar_LibObjTruth( Dar_LibObj_t * pObj ) { return pObj->Num < (0xFFFF & ~pObj->Num) ? pObj->Num : (0xFFFF & ~pObj->Num); }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the library.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Dar_Lib_t * Dar_LibAlloc( int nObjs )
-{
-    unsigned uTruths[4] = { 0xAAAA, 0xCCCC, 0xF0F0, 0xFF00 };
-    Dar_Lib_t * p;
-    int i;//, clk = clock();
-    p = ABC_ALLOC( Dar_Lib_t, 1 );
-    memset( p, 0, sizeof(Dar_Lib_t) );
-    // allocate objects
-    p->nObjs = nObjs;
-    p->pObjs = ABC_ALLOC( Dar_LibObj_t, nObjs );
-    memset( p->pObjs, 0, sizeof(Dar_LibObj_t) * nObjs );
-    // allocate canonical data
-    p->pPerms4 = Dar_Permutations( 4 );
-    Dar_Truth4VarNPN( &p->puCanons, &p->pPhases, &p->pPerms, &p->pMap );
-    // start the elementary objects
-    p->iObj = 4;
-    for ( i = 0; i < 4; i++ )
-    {
-        p->pObjs[i].fTerm = 1;
-        p->pObjs[i].Num = uTruths[i];
-    }
-//    ABC_PRT( "Library start", clock() - clk );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Frees the library.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibFree( Dar_Lib_t * p )
-{
-    ABC_FREE( p->pObjs );
-    ABC_FREE( p->pDatas );
-    ABC_FREE( p->pNodesMem );
-    ABC_FREE( p->pNodes0Mem );
-    ABC_FREE( p->pSubgrMem );
-    ABC_FREE( p->pSubgr0Mem );
-    ABC_FREE( p->pPriosMem );
-    ABC_FREE( p->pPlaceMem );
-    ABC_FREE( p->pScoreMem );
-    ABC_FREE( p->pPerms4 );
-    ABC_FREE( p->puCanons );
-    ABC_FREE( p->pPhases );
-    ABC_FREE( p->pPerms );
-    ABC_FREE( p->pMap );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns canonical truth tables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar_LibReturnClass( unsigned uTruth )
-{
-    return s_DarLib->pMap[uTruth & 0xffff];
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns canonical truth tables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibReturnCanonicals( unsigned * pCanons )
-{
-    int Visits[222] = {0};
-    int i, k;
-    // find canonical truth tables
-    for ( i = k = 0; i < (1<<16); i++ )
-        if ( !Visits[s_DarLib->pMap[i]] )
-        {
-            Visits[s_DarLib->pMap[i]] = 1;
-            pCanons[k++] = ((i<<16) | i);
-        }
-    assert( k == 222 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds one AND to the library.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibAddNode( Dar_Lib_t * p, int Id0, int Id1, int fCompl0, int fCompl1 )
-{
-    Dar_LibObj_t * pFan0 = Dar_LibObj( p, Id0 );
-    Dar_LibObj_t * pFan1 = Dar_LibObj( p, Id1 );
-    Dar_LibObj_t * pObj  = p->pObjs + p->iObj++;
-    pObj->Fan0 = Id0;
-    pObj->Fan1 = Id1;
-    pObj->fCompl0 = fCompl0;
-    pObj->fCompl1 = fCompl1;
-    pObj->fPhase = (fCompl0 ^ pFan0->fPhase) & (fCompl1 ^ pFan1->fPhase);
-    pObj->Num = 0xFFFF & (fCompl0? ~pFan0->Num : pFan0->Num) & (fCompl1? ~pFan1->Num : pFan1->Num);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds one AND to the library.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibSetup_rec( Dar_Lib_t * p, Dar_LibObj_t * pObj, int Class, int fCollect )
-{
-    if ( pObj->fTerm || (int)pObj->Num == Class )
-        return;
-    pObj->Num = Class;
-    Dar_LibSetup_rec( p, Dar_LibObj(p, pObj->Fan0), Class, fCollect );
-    Dar_LibSetup_rec( p, Dar_LibObj(p, pObj->Fan1), Class, fCollect );
-    if ( fCollect )
-        p->pNodes[Class][ p->nNodes[Class]++ ] = pObj-p->pObjs;
-    else
-        p->nNodes[Class]++;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds one AND to the library.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibSetup( Dar_Lib_t * p, Vec_Int_t * vOuts, Vec_Int_t * vPrios )
-{
-    int fTraining = 0;
-    Dar_LibObj_t * pObj;
-    int nNodesTotal, uTruth, Class, Out, i, k;
-    assert( p->iObj == p->nObjs );
-
-    // count the number of representatives of each class
-    for ( i = 0; i < 222; i++ )
-        p->nSubgr[i] = p->nNodes[i] = 0;
-    Vec_IntForEachEntry( vOuts, Out, i )
-    {
-        pObj = Dar_LibObj( p, Out );
-        uTruth = Dar_LibObjTruth( pObj );
-        Class = p->pMap[uTruth];
-        p->nSubgr[Class]++;
-    }
-    // allocate memory for the roots of each class
-    p->pSubgrMem = ABC_ALLOC( int, Vec_IntSize(vOuts) );
-    p->pSubgr0Mem = ABC_ALLOC( int, Vec_IntSize(vOuts) );
-    p->nSubgrTotal = 0;
-    for ( i = 0; i < 222; i++ )
-    {
-        p->pSubgr[i] = p->pSubgrMem + p->nSubgrTotal;
-        p->pSubgr0[i] = p->pSubgr0Mem + p->nSubgrTotal;
-        p->nSubgrTotal += p->nSubgr[i];
-        p->nSubgr[i] = 0;
-    }
-    assert( p->nSubgrTotal == Vec_IntSize(vOuts) );
-    // add the outputs to storage
-    Vec_IntForEachEntry( vOuts, Out, i )
-    {
-        pObj = Dar_LibObj( p, Out );
-        uTruth = Dar_LibObjTruth( pObj );
-        Class = p->pMap[uTruth];
-        p->pSubgr[Class][ p->nSubgr[Class]++ ] = Out;
-    }
-
-    if ( fTraining )
-    {
-        // allocate memory for the priority of roots of each class
-        p->pPriosMem = ABC_ALLOC( int, Vec_IntSize(vOuts) );
-        p->nSubgrTotal = 0;
-        for ( i = 0; i < 222; i++ )
-        {
-            p->pPrios[i] = p->pPriosMem + p->nSubgrTotal;
-            p->nSubgrTotal += p->nSubgr[i];
-            for ( k = 0; k < p->nSubgr[i]; k++ )
-                p->pPrios[i][k] = k;
-
-        }
-        assert( p->nSubgrTotal == Vec_IntSize(vOuts) );
-
-        // allocate memory for the priority of roots of each class
-        p->pPlaceMem = ABC_ALLOC( int, Vec_IntSize(vOuts) );
-        p->nSubgrTotal = 0;
-        for ( i = 0; i < 222; i++ )
-        {
-            p->pPlace[i] = p->pPlaceMem + p->nSubgrTotal;
-            p->nSubgrTotal += p->nSubgr[i];
-            for ( k = 0; k < p->nSubgr[i]; k++ )
-                p->pPlace[i][k] = k;
-
-        }
-        assert( p->nSubgrTotal == Vec_IntSize(vOuts) );
-
-        // allocate memory for the priority of roots of each class
-        p->pScoreMem = ABC_ALLOC( int, Vec_IntSize(vOuts) );
-        p->nSubgrTotal = 0;
-        for ( i = 0; i < 222; i++ )
-        {
-            p->pScore[i] = p->pScoreMem + p->nSubgrTotal;
-            p->nSubgrTotal += p->nSubgr[i];
-            for ( k = 0; k < p->nSubgr[i]; k++ )
-                p->pScore[i][k] = 0;
-
-        }
-        assert( p->nSubgrTotal == Vec_IntSize(vOuts) );
-    }
-    else
-    {
-        int Counter = 0;
-        // allocate memory for the priority of roots of each class
-        p->pPriosMem = ABC_ALLOC( int, Vec_IntSize(vOuts) );
-        p->nSubgrTotal = 0;
-        for ( i = 0; i < 222; i++ )
-        {
-            p->pPrios[i] = p->pPriosMem + p->nSubgrTotal;
-            p->nSubgrTotal += p->nSubgr[i];
-            for ( k = 0; k < p->nSubgr[i]; k++ )
-                p->pPrios[i][k] = Vec_IntEntry(vPrios, Counter++);
-
-        }
-        assert( p->nSubgrTotal == Vec_IntSize(vOuts) );
-        assert( Counter == Vec_IntSize(vPrios) );
-    }
-
-    // create traversal IDs
-    for ( i = 0; i < p->iObj; i++ )
-        Dar_LibObj(p, i)->Num = 0xff;
-    // count nodes in each class
-    for ( i = 0; i < 222; i++ )
-        for ( k = 0; k < p->nSubgr[i]; k++ )
-            Dar_LibSetup_rec( p, Dar_LibObj(p, p->pSubgr[i][k]), i, 0 );
-    // count the total number of nodes
-    p->nNodesTotal = 0;
-    for ( i = 0; i < 222; i++ )
-        p->nNodesTotal += p->nNodes[i];
-    // allocate memory for the nodes of each class
-    p->pNodesMem = ABC_ALLOC( int, p->nNodesTotal );
-    p->pNodes0Mem = ABC_ALLOC( int, p->nNodesTotal );
-    p->nNodesTotal = 0;
-    for ( i = 0; i < 222; i++ )
-    {
-        p->pNodes[i] = p->pNodesMem + p->nNodesTotal;
-        p->pNodes0[i] = p->pNodes0Mem + p->nNodesTotal;
-        p->nNodesTotal += p->nNodes[i];
-        p->nNodes[i] = 0;
-    }
-    // create traversal IDs
-    for ( i = 0; i < p->iObj; i++ )
-        Dar_LibObj(p, i)->Num = 0xff;
-    // add the nodes to storage
-    nNodesTotal = 0;
-    for ( i = 0; i < 222; i++ )
-    {
-         for ( k = 0; k < p->nSubgr[i]; k++ )
-            Dar_LibSetup_rec( p, Dar_LibObj(p, p->pSubgr[i][k]), i, 1 );
-         nNodesTotal += p->nNodes[i];
-//printf( "Class %3d : Subgraphs = %4d. Nodes = %5d.\n", i, p->nSubgr[i], p->nNodes[i] );
-    }
-    assert( nNodesTotal == p->nNodesTotal );
-     // prepare the number of the PI nodes
-    for ( i = 0; i < 4; i++ )
-        Dar_LibObj(p, i)->Num = i;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the library.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibCreateData( Dar_Lib_t * p, int nDatas )
-{
-    if ( p->nDatas == nDatas )
-        return;
-    ABC_FREE( p->pDatas );
-    // allocate datas
-    p->nDatas = nDatas;
-    p->pDatas = ABC_ALLOC( Dar_LibDat_t, nDatas );
-    memset( p->pDatas, 0, sizeof(Dar_LibDat_t) * nDatas );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds one AND to the library.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibSetup0_rec( Dar_Lib_t * p, Dar_LibObj_t * pObj, int Class, int fCollect )
-{
-    if ( pObj->fTerm || (int)pObj->Num == Class )
-        return;
-    pObj->Num = Class;
-    Dar_LibSetup0_rec( p, Dar_LibObj(p, pObj->Fan0), Class, fCollect );
-    Dar_LibSetup0_rec( p, Dar_LibObj(p, pObj->Fan1), Class, fCollect );
-    if ( fCollect )
-        p->pNodes0[Class][ p->nNodes0[Class]++ ] = pObj-p->pObjs;
-    else
-        p->nNodes0[Class]++;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the library.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibPrepare( int nSubgraphs )
-{
-    Dar_Lib_t * p = s_DarLib;
-    int i, k, nNodes0Total;
-    if ( p->nSubgraphs == nSubgraphs )
-        return;
-
-    // favor special classes:
-    //  1 : F = (!d*!c*!b*!a)
-    //  4 : F = (!d*!c*!(b*a))
-    // 12 : F = (!d*!(c*!(!b*!a)))
-    // 20 : F = (!d*!(c*b*a))
-
-    // set the subgraph counters 
-    p->nSubgr0Total = 0;
-    for ( i = 0; i < 222; i++ )
-    {
-//        if ( i == 1 || i == 4 || i == 12 || i == 20 ) // special classes 
-        if ( i == 1 ) // special classes 
-            p->nSubgr0[i] = p->nSubgr[i];
-        else
-            p->nSubgr0[i] = ABC_MIN( p->nSubgr[i], nSubgraphs );
-        p->nSubgr0Total += p->nSubgr0[i];
-        for ( k = 0; k < p->nSubgr0[i]; k++ )
-            p->pSubgr0[i][k] = p->pSubgr[i][ p->pPrios[i][k] ];
-    }
-
-    // count the number of nodes
-    // clean node counters
-    for ( i = 0; i < 222; i++ )
-        p->nNodes0[i] = 0;
-    // create traversal IDs
-    for ( i = 0; i < p->iObj; i++ )
-        Dar_LibObj(p, i)->Num = 0xff;
-    // count nodes in each class
-    // count the total number of nodes and the largest class
-    p->nNodes0Total = 0;
-    p->nNodes0Max = 0;
-    for ( i = 0; i < 222; i++ )
-    {
-        for ( k = 0; k < p->nSubgr0[i]; k++ )
-            Dar_LibSetup0_rec( p, Dar_LibObj(p, p->pSubgr0[i][k]), i, 0 );
-        p->nNodes0Total += p->nNodes0[i];
-        p->nNodes0Max = ABC_MAX( p->nNodes0Max, p->nNodes0[i] );
-    }
-
-    // clean node counters
-    for ( i = 0; i < 222; i++ )
-        p->nNodes0[i] = 0;
-    // create traversal IDs
-    for ( i = 0; i < p->iObj; i++ )
-        Dar_LibObj(p, i)->Num = 0xff;
-    // add the nodes to storage
-    nNodes0Total = 0;
-    for ( i = 0; i < 222; i++ )
-    {
-        for ( k = 0; k < p->nSubgr0[i]; k++ )
-            Dar_LibSetup0_rec( p, Dar_LibObj(p, p->pSubgr0[i][k]), i, 1 );
-         nNodes0Total += p->nNodes0[i];
-    }
-    assert( nNodes0Total == p->nNodes0Total );
-     // prepare the number of the PI nodes
-    for ( i = 0; i < 4; i++ )
-        Dar_LibObj(p, i)->Num = i;
-
-    // realloc the datas
-    Dar_LibCreateData( p, p->nNodes0Max + 32 ); 
-    // allocated more because Dar_LibBuildBest() sometimes requires more entries
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads library from array.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Dar_Lib_t * Dar_LibRead()
-{
-    Vec_Int_t * vObjs, * vOuts, * vPrios;
-    Dar_Lib_t * p;
-    int i;
-    // read nodes and outputs
-    vObjs  = Dar_LibReadNodes();
-    vOuts  = Dar_LibReadOuts();
-    vPrios = Dar_LibReadPrios();
-    // create library
-    p = Dar_LibAlloc( Vec_IntSize(vObjs)/2 + 4 );
-    // create nodes
-    for ( i = 0; i < vObjs->nSize; i += 2 )
-        Dar_LibAddNode( p, vObjs->pArray[i] >> 1, vObjs->pArray[i+1] >> 1,
-            vObjs->pArray[i] & 1, vObjs->pArray[i+1] & 1 );
-    // create outputs
-    Dar_LibSetup( p, vOuts, vPrios );
-    Vec_IntFree( vObjs );
-    Vec_IntFree( vOuts );
-    Vec_IntFree( vPrios );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the library.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibStart()
-{
-//    int clk = clock();
-    assert( s_DarLib == NULL );
-    s_DarLib = Dar_LibRead();
-//    printf( "The 4-input library started with %d nodes and %d subgraphs. ", s_DarLib->nObjs - 4, s_DarLib->nSubgrTotal );
-//    ABC_PRT( "Time", clock() - clk );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the library.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibStop()
-{
-    assert( s_DarLib != NULL );
-    Dar_LibFree( s_DarLib );
-    s_DarLib = NULL;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the score of the class and adjusts the priority of this class.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibIncrementScore( int Class, int Out, int Gain )
-{
-    int * pPrios = s_DarLib->pPrios[Class];  // pPrios[i] = Out
-    int * pPlace = s_DarLib->pPlace[Class];  // pPlace[Out] = i
-    int * pScore = s_DarLib->pScore[Class];  // score of Out
-    int Out2;
-    assert( Class >= 0 && Class < 222 );
-    assert( Out >= 0 && Out < s_DarLib->nSubgr[Class] );
-    assert( pPlace[pPrios[Out]] == Out );
-    // increment the score
-    pScore[Out] += Gain;
-    // move the out in the order 
-    while ( pPlace[Out] > 0 && pScore[Out] > pScore[ pPrios[pPlace[Out]-1] ] )
-    {
-        // get the previous output in the priority list
-        Out2 = pPrios[pPlace[Out]-1];
-        // swap Out and Out2
-        pPlace[Out]--;
-        pPlace[Out2]++;
-        pPrios[pPlace[Out]] = Out;
-        pPrios[pPlace[Out2]] = Out2;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints out the priorities into the file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibDumpPriorities()
-{
-    int i, k, Out, Out2, Counter = 0, Printed = 0;
-    printf( "\nOutput priorities (total = %d):\n", s_DarLib->nSubgrTotal );
-    for ( i = 0; i < 222; i++ )
-    {
-//        printf( "Class%d: ", i );
-        for ( k = 0; k < s_DarLib->nSubgr[i]; k++ )
-        {
-            Out = s_DarLib->pPrios[i][k];
-            Out2 = k == 0 ? Out : s_DarLib->pPrios[i][k-1];
-            assert( s_DarLib->pScore[i][Out2] >= s_DarLib->pScore[i][Out] );
-//            printf( "%d(%d), ", Out, s_DarLib->pScore[i][Out] );
-            printf( "%d, ", Out );
-            Printed++;
-            if ( ++Counter == 15 )
-            {
-                printf( "\n" );
-                Counter = 0;
-            }
-        }
-    }
-    printf( "\n" );
-    assert( Printed == s_DarLib->nSubgrTotal );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Matches the cut with its canonical form.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar_LibCutMatch( Dar_Man_t * p, Dar_Cut_t * pCut )
-{
-    Aig_Obj_t * pFanin;
-    unsigned uPhase;
-    char * pPerm;
-    int i;
-    assert( pCut->nLeaves == 4 );
-    // get the fanin permutation
-    uPhase = s_DarLib->pPhases[pCut->uTruth];
-    pPerm = s_DarLib->pPerms4[ (int)s_DarLib->pPerms[pCut->uTruth] ];
-    // collect fanins with the corresponding permutation/phase
-    for ( i = 0; i < (int)pCut->nLeaves; i++ )
-    {
-        pFanin = Aig_ManObj( p->pAig, pCut->pLeaves[ (int)pPerm[i] ] );
-        if ( pFanin == NULL )
-        {
-            p->nCutsBad++;
-            return 0;
-        }
-        pFanin = Aig_NotCond(pFanin, ((uPhase >> i) & 1) );
-        s_DarLib->pDatas[i].pFunc = pFanin;
-        s_DarLib->pDatas[i].Level = Aig_Regular(pFanin)->Level;
-        // copy the propability of node being one
-        if ( p->pPars->fPower )
-        {
-            float Prob = Aig_Int2Float( Vec_IntEntry( p->pAig->vProbs, Aig_ObjId(Aig_Regular(pFanin)) ) );
-            s_DarLib->pDatas[i].dProb = Aig_IsComplement(pFanin)? 1.0-Prob : Prob;
-        }
-    }
-    p->nCutsGood++;
-    return 1;
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Marks the MFFC of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar_LibCutMarkMffc( Aig_Man_t * p, Aig_Obj_t * pRoot, int nLeaves, float * pPower )
-{
-    int i, nNodes;
-    // mark the cut leaves
-    for ( i = 0; i < nLeaves; i++ )
-        Aig_Regular(s_DarLib->pDatas[i].pFunc)->nRefs++;
-    // label MFFC with current ID
-    nNodes = Aig_NodeMffcLabel( p, pRoot, pPower );
-    // unmark the cut leaves
-    for ( i = 0; i < nLeaves; i++ )
-        Aig_Regular(s_DarLib->pDatas[i].pFunc)->nRefs--;
-    return nNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Evaluates one cut.]
-
-  Description [Returns the best gain.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibObjPrint_rec( Dar_LibObj_t * pObj )
-{
-    if ( pObj->fTerm )
-    {
-        printf( "%c", 'a' + (int)(pObj - s_DarLib->pObjs) );
-        return;
-    }
-    printf( "(" );
-    Dar_LibObjPrint_rec( Dar_LibObj(s_DarLib, pObj->Fan0) );
-    if ( pObj->fCompl0 )
-        printf( "\'" );
-    Dar_LibObjPrint_rec( Dar_LibObj(s_DarLib, pObj->Fan1) );
-    if ( pObj->fCompl0 )
-        printf( "\'" );
-    printf( ")" );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Assigns numbers to the nodes of one class.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibEvalAssignNums( Dar_Man_t * p, int Class, Aig_Obj_t * pRoot )
-{
-    Dar_LibObj_t * pObj;
-    Dar_LibDat_t * pData, * pData0, * pData1;
-    Aig_Obj_t * pFanin0, * pFanin1;
-    int i;
-    for ( i = 0; i < s_DarLib->nNodes0[Class]; i++ )
-    {
-        // get one class node, assign its temporary number and set its data
-        pObj = Dar_LibObj(s_DarLib, s_DarLib->pNodes0[Class][i]);
-        pObj->Num = 4 + i;
-        assert( (int)pObj->Num < s_DarLib->nNodes0Max + 4 );
-        pData = s_DarLib->pDatas + pObj->Num;
-        pData->fMffc = 0;
-        pData->pFunc = NULL;
-        pData->TravId = 0xFFFF;
-
-        // explore the fanins
-        assert( (int)Dar_LibObj(s_DarLib, pObj->Fan0)->Num < s_DarLib->nNodes0Max + 4 );
-        assert( (int)Dar_LibObj(s_DarLib, pObj->Fan1)->Num < s_DarLib->nNodes0Max + 4 );
-        pData0 = s_DarLib->pDatas + Dar_LibObj(s_DarLib, pObj->Fan0)->Num;
-        pData1 = s_DarLib->pDatas + Dar_LibObj(s_DarLib, pObj->Fan1)->Num;
-        pData->Level = 1 + ABC_MAX(pData0->Level, pData1->Level);
-        if ( pData0->pFunc == NULL || pData1->pFunc == NULL )
-            continue;
-        pFanin0 = Aig_NotCond( pData0->pFunc, pObj->fCompl0 );
-        pFanin1 = Aig_NotCond( pData1->pFunc, pObj->fCompl1 );
-        if ( Aig_Regular(pFanin0) == pRoot || Aig_Regular(pFanin1) == pRoot )
-            continue;
-        pData->pFunc = Aig_TableLookupTwo( p->pAig, pFanin0, pFanin1 );
-        if ( pData->pFunc )
-        {
-            // update the level to be more accurate
-            pData->Level = Aig_Regular(pData->pFunc)->Level;
-            // mark the node if it is part of MFFC
-            pData->fMffc = Aig_ObjIsTravIdCurrent(p->pAig, Aig_Regular(pData->pFunc));
-            // assign the probability
-            if ( p->pPars->fPower )
-            {
-                float Prob = Aig_Int2Float( Vec_IntEntry( p->pAig->vProbs, Aig_ObjId(Aig_Regular(pData->pFunc)) ) );
-                pData->dProb = Aig_IsComplement(pData->pFunc)? 1.0-Prob : Prob;
-            }
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Evaluates one cut.]
-
-  Description [Returns the best gain.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar_LibEval_rec( Dar_LibObj_t * pObj, int Out, int nNodesSaved, int Required, float * pPower )
-{
-    Dar_LibDat_t * pData;
-    float Power0, Power1;
-    int Area;
-    if ( pPower )
-        *pPower = (float)0.0;
-    pData = s_DarLib->pDatas + pObj->Num;
-    if ( pData->TravId == Out )
-        return 0;
-    pData->TravId = Out;
-    if ( pObj->fTerm )
-    {
-        if ( pPower )
-            *pPower = pData->dProb;
-        return 0;
-    }
-    assert( pObj->Num > 3 );
-    if ( pData->Level > Required )
-        return 0xff;
-    if ( pData->pFunc && !pData->fMffc )
-    {
-        if ( pPower )
-            *pPower = pData->dProb;
-        return 0;
-    }
-    // this is a new node - get a bound on the area of its branches
-    nNodesSaved--;
-    Area = Dar_LibEval_rec( Dar_LibObj(s_DarLib, pObj->Fan0), Out, nNodesSaved, Required+1, pPower? &Power0 : NULL );
-    if ( Area > nNodesSaved )
-        return 0xff;
-    Area += Dar_LibEval_rec( Dar_LibObj(s_DarLib, pObj->Fan1), Out, nNodesSaved, Required+1, pPower? &Power1 : NULL );
-    if ( Area > nNodesSaved )
-        return 0xff;
-    if ( pPower )
-    {
-        Dar_LibDat_t * pData0 = s_DarLib->pDatas + Dar_LibObj(s_DarLib, pObj->Fan0)->Num;
-        Dar_LibDat_t * pData1 = s_DarLib->pDatas + Dar_LibObj(s_DarLib, pObj->Fan1)->Num;
-        pData->dProb = (pObj->fCompl0? 1.0 - pData0->dProb : pData0->dProb)*
-                       (pObj->fCompl1? 1.0 - pData1->dProb : pData1->dProb);
-        *pPower = Power0 + 2.0 * pData0->dProb * (1.0 - pData0->dProb) +
-                  Power1 + 2.0 * pData1->dProb * (1.0 - pData1->dProb);
-    }
-    return Area + 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Evaluates one cut.]
-
-  Description [Returns the best gain.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibEval( Dar_Man_t * p, Aig_Obj_t * pRoot, Dar_Cut_t * pCut, int Required, int * pnMffcSize )
-{
-    int fTraining = 0;
-    float PowerSaved, PowerAdded;
-    Dar_LibObj_t * pObj;
-    int Out, k, Class, nNodesSaved, nNodesAdded, nNodesGained, clk;
-    clk = clock();
-    if ( pCut->nLeaves != 4 )
-        return;
-    // check if the cut exits and assigns leaves and their levels
-    if ( !Dar_LibCutMatch(p, pCut) )
-        return;
-    // mark MFFC of the node
-    nNodesSaved = Dar_LibCutMarkMffc( p->pAig, pRoot, pCut->nLeaves, p->pPars->fPower? &PowerSaved : NULL );
-    // evaluate the cut
-    Class = s_DarLib->pMap[pCut->uTruth];
-    Dar_LibEvalAssignNums( p, Class, pRoot );
-    // profile outputs by their savings
-    p->nTotalSubgs += s_DarLib->nSubgr0[Class];
-    p->ClassSubgs[Class] += s_DarLib->nSubgr0[Class];
-    for ( Out = 0; Out < s_DarLib->nSubgr0[Class]; Out++ )
-    {
-        pObj = Dar_LibObj(s_DarLib, s_DarLib->pSubgr0[Class][Out]);
-        if ( Aig_Regular(s_DarLib->pDatas[pObj->Num].pFunc) == pRoot )
-            continue;
-        nNodesAdded = Dar_LibEval_rec( pObj, Out, nNodesSaved - !p->pPars->fUseZeros, Required, p->pPars->fPower? &PowerAdded : NULL );
-        nNodesGained = nNodesSaved - nNodesAdded;
-        if ( p->pPars->fPower && PowerSaved < PowerAdded )
-            continue;
-        if ( fTraining && nNodesGained >= 0 )
-            Dar_LibIncrementScore( Class, Out, nNodesGained + 1 );
-        if ( nNodesGained < 0 || (nNodesGained == 0 && !p->pPars->fUseZeros) )
-            continue;
-        if ( nNodesGained <  p->GainBest || 
-            (nNodesGained == p->GainBest && s_DarLib->pDatas[pObj->Num].Level >= p->LevelBest) )
-            continue;
-        // remember this possibility
-        Vec_PtrClear( p->vLeavesBest );
-        for ( k = 0; k < (int)pCut->nLeaves; k++ )
-            Vec_PtrPush( p->vLeavesBest, s_DarLib->pDatas[k].pFunc );
-        p->OutBest    = s_DarLib->pSubgr0[Class][Out];
-        p->OutNumBest = Out;
-        p->LevelBest  = s_DarLib->pDatas[pObj->Num].Level;
-        p->GainBest   = nNodesGained;
-        p->ClassBest  = Class;
-        assert( p->LevelBest <= Required );
-        *pnMffcSize   = nNodesSaved;
-    }
-clk = clock() - clk;
-p->ClassTimes[Class] += clk;
-p->timeEval += clk;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Clears the fields of the nodes used in this cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_LibBuildClear_rec( Dar_LibObj_t * pObj, int * pCounter )
-{
-    if ( pObj->fTerm )
-        return;
-    pObj->Num = (*pCounter)++;
-    s_DarLib->pDatas[ pObj->Num ].pFunc = NULL;
-    Dar_LibBuildClear_rec( Dar_LibObj(s_DarLib, pObj->Fan0), pCounter );
-    Dar_LibBuildClear_rec( Dar_LibObj(s_DarLib, pObj->Fan1), pCounter );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reconstructs the best cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Dar_LibBuildBest_rec( Dar_Man_t * p, Dar_LibObj_t * pObj )
-{
-    Aig_Obj_t * pFanin0, * pFanin1;
-    Dar_LibDat_t * pData = s_DarLib->pDatas + pObj->Num;
-    if ( pData->pFunc )
-        return pData->pFunc;
-    pFanin0 = Dar_LibBuildBest_rec( p, Dar_LibObj(s_DarLib, pObj->Fan0) );
-    pFanin1 = Dar_LibBuildBest_rec( p, Dar_LibObj(s_DarLib, pObj->Fan1) );
-    pFanin0 = Aig_NotCond( pFanin0, pObj->fCompl0 );
-    pFanin1 = Aig_NotCond( pFanin1, pObj->fCompl1 );
-    pData->pFunc = Aig_And( p->pAig, pFanin0, pFanin1 );
-//    assert( pData->Level == (int)Aig_Regular(pData->pFunc)->Level );
-    return pData->pFunc;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reconstructs the best cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Dar_LibBuildBest( Dar_Man_t * p )
-{
-    int i, Counter = 4;
-    for ( i = 0; i < Vec_PtrSize(p->vLeavesBest); i++ )
-        s_DarLib->pDatas[i].pFunc = (Aig_Obj_t *)Vec_PtrEntry( p->vLeavesBest, i );
-    Dar_LibBuildClear_rec( Dar_LibObj(s_DarLib, p->OutBest), &Counter );
-    return Dar_LibBuildBest_rec( p, Dar_LibObj(s_DarLib, p->OutBest) );
-}
-
-
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Matches the cut with its canonical form.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar2_LibCutMatch( Gia_Man_t * p, Vec_Int_t * vCutLits, unsigned uTruth )
-{
-    unsigned uPhase;
-    char * pPerm;
-    int i;
-    assert( Vec_IntSize(vCutLits) == 4 );
-    // get the fanin permutation
-    uPhase = s_DarLib->pPhases[uTruth];
-    pPerm  = s_DarLib->pPerms4[ (int)s_DarLib->pPerms[uTruth] ];
-    // collect fanins with the corresponding permutation/phase
-    for ( i = 0; i < Vec_IntSize(vCutLits); i++ )
-    {
-//        pFanin = Gia_ManObj( p, pCut->pLeaves[ (int)pPerm[i] ] );
-//        pFanin = Gia_ManObj( p, Vec_IntEntry( vCutLits, (int)pPerm[i] ) );
-//        pFanin = Gia_ObjFromLit( p, Vec_IntEntry( vCutLits, (int)pPerm[i] ) );
-        s_DarLib->pDatas[i].iGunc = Gia_LitNotCond( Vec_IntEntry(vCutLits, (int)pPerm[i]), ((uPhase >> i) & 1) );
-        s_DarLib->pDatas[i].Level = Gia_ObjLevel( p, Gia_Regular(Gia_ObjFromLit(p, s_DarLib->pDatas[i].iGunc)) );
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Assigns numbers to the nodes of one class.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar2_LibEvalAssignNums( Gia_Man_t * p, int Class )
-{
-    Dar_LibObj_t * pObj;
-    Dar_LibDat_t * pData, * pData0, * pData1;
-    int iFanin0, iFanin1, i, iLit;
-    for ( i = 0; i < s_DarLib->nNodes0[Class]; i++ )
-    {
-        // get one class node, assign its temporary number and set its data
-        pObj = Dar_LibObj(s_DarLib, s_DarLib->pNodes0[Class][i]);
-        pObj->Num = 4 + i;
-        assert( (int)pObj->Num < s_DarLib->nNodes0Max + 4 );
-        pData = s_DarLib->pDatas + pObj->Num;
-        pData->fMffc = 0;
-        pData->iGunc = -1;
-        pData->TravId = 0xFFFF;
-
-        // explore the fanins
-        assert( (int)Dar_LibObj(s_DarLib, pObj->Fan0)->Num < s_DarLib->nNodes0Max + 4 );
-        assert( (int)Dar_LibObj(s_DarLib, pObj->Fan1)->Num < s_DarLib->nNodes0Max + 4 );
-        pData0 = s_DarLib->pDatas + Dar_LibObj(s_DarLib, pObj->Fan0)->Num;
-        pData1 = s_DarLib->pDatas + Dar_LibObj(s_DarLib, pObj->Fan1)->Num;
-        pData->Level = 1 + ABC_MAX(pData0->Level, pData1->Level);
-        if ( pData0->iGunc == -1 || pData1->iGunc == -1 )
-            continue;
-        iFanin0 = Gia_LitNotCond( pData0->iGunc, pObj->fCompl0 );
-        iFanin1 = Gia_LitNotCond( pData1->iGunc, pObj->fCompl1 );
-        // compute the resulting literal
-        if ( iFanin0 == 0 || iFanin1 == 0 || iFanin0 == Gia_LitNot(iFanin1) )
-            iLit = 0;
-        else if ( iFanin0 == 1 || iFanin0 == iFanin1 )
-            iLit = iFanin1;
-        else if ( iFanin1 == 1 )
-            iLit = iFanin0;
-        else
-        {
-            iLit = Gia_ManHashLookup( p, Gia_ObjFromLit(p, iFanin0), Gia_ObjFromLit(p, iFanin1) );
-            if ( iLit == 0 )
-                iLit = -1;
-        }
-        pData->iGunc = iLit;
-        if ( pData->iGunc >= 0 )
-        {
-            // update the level to be more accurate
-            pData->Level = Gia_ObjLevel( p, Gia_Regular(Gia_ObjFromLit(p, pData->iGunc)) );
-            // mark the node if it is part of MFFC
-//            pData->fMffc = Gia_ObjIsTravIdCurrentArray(p, Gia_Regular(pData->pGunc));
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Evaluates one cut.]
-
-  Description [Returns the best gain.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar2_LibEval_rec( Dar_LibObj_t * pObj, int Out )
-{
-    Dar_LibDat_t * pData;
-    int Area;
-    pData = s_DarLib->pDatas + pObj->Num;
-    if ( pData->TravId == Out )
-        return 0;
-    pData->TravId = Out;
-    if ( pObj->fTerm )
-        return 0;
-    assert( pObj->Num > 3 );
-    if ( pData->iGunc >= 0 )//&& !pData->fMffc )
-        return 0;
-    // this is a new node - get a bound on the area of its branches
-//    nNodesSaved--;
-    Area = Dar2_LibEval_rec( Dar_LibObj(s_DarLib, pObj->Fan0), Out );
-//    if ( Area > nNodesSaved )
-//        return 0xff;
-    Area += Dar2_LibEval_rec( Dar_LibObj(s_DarLib, pObj->Fan1), Out );
-//    if ( Area > nNodesSaved )
-//        return 0xff;
-    return Area + 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Evaluates one cut.]
-
-  Description [Returns the best gain.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar2_LibEval( Gia_Man_t * p, Vec_Int_t * vCutLits, unsigned uTruth, int fKeepLevel, Vec_Int_t * vLeavesBest2 )
-{
-    int p_OutBest    = -1;
-    int p_OutNumBest = -1;
-    int p_LevelBest  =  1000000;
-    int p_GainBest   = -1000000;
-    int p_ClassBest  = -1;
-    int fTraining    =  0;
-    Dar_LibObj_t * pObj;
-    int Out, k, Class, nNodesSaved, nNodesAdded, nNodesGained, clk;
-    clk = clock();
-    assert( Vec_IntSize(vCutLits) == 4 );
-    assert( (uTruth >> 16) == 0 );
-    // check if the cut exits and assigns leaves and their levels
-    if ( !Dar2_LibCutMatch(p, vCutLits, uTruth) )
-        return -1;
-    // mark MFFC of the node
-//    nNodesSaved = Dar2_LibCutMarkMffc( p->pAig, pRoot, pCut->nLeaves, p->pPars->fPower? &PowerSaved : NULL );
-    nNodesSaved = 0;
-    // evaluate the cut
-    Class = s_DarLib->pMap[uTruth];
-    Dar2_LibEvalAssignNums( p, Class );
-    // profile outputs by their savings
-//    p->nTotalSubgs += s_DarLib->nSubgr0[Class];
-//    p->ClassSubgs[Class] += s_DarLib->nSubgr0[Class];
-    for ( Out = 0; Out < s_DarLib->nSubgr0[Class]; Out++ )
-    {
-        pObj = Dar_LibObj(s_DarLib, s_DarLib->pSubgr0[Class][Out]);
-//        nNodesAdded = Dar2_LibEval_rec( pObj, Out, nNodesSaved - !p->pPars->fUseZeros, Required, p->pPars->fPower? &PowerAdded : NULL );
-        nNodesAdded = Dar2_LibEval_rec( pObj, Out );
-        nNodesGained = nNodesSaved - nNodesAdded;
-        if ( fKeepLevel )
-        {
-            if ( s_DarLib->pDatas[pObj->Num].Level >  p_LevelBest || 
-                (s_DarLib->pDatas[pObj->Num].Level == p_LevelBest && nNodesGained <= p_GainBest) )
-                continue;
-        }
-        else
-        {
-            if ( nNodesGained <  p_GainBest || 
-                (nNodesGained == p_GainBest && s_DarLib->pDatas[pObj->Num].Level >= p_LevelBest) )
-                continue;
-        }
-        // remember this possibility
-        Vec_IntClear( vLeavesBest2 );
-        for ( k = 0; k < Vec_IntSize(vCutLits); k++ )
-            Vec_IntPush( vLeavesBest2, s_DarLib->pDatas[k].iGunc );
-        p_OutBest    = s_DarLib->pSubgr0[Class][Out];
-        p_OutNumBest = Out;
-        p_LevelBest  = s_DarLib->pDatas[pObj->Num].Level;
-        p_GainBest   = nNodesGained;
-        p_ClassBest  = Class;
-//        assert( p_LevelBest <= Required );
-    }
-//clk = clock() - clk;
-//p->ClassTimes[Class] += clk;
-//p->timeEval += clk;
-    assert( p_OutBest != -1 );
-    return p_OutBest;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Clears the fields of the nodes used i this cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar2_LibBuildClear_rec( Dar_LibObj_t * pObj, int * pCounter )
-{
-    if ( pObj->fTerm )
-        return;
-    pObj->Num = (*pCounter)++;
-    s_DarLib->pDatas[ pObj->Num ].iGunc = -1;
-    Dar2_LibBuildClear_rec( Dar_LibObj(s_DarLib, pObj->Fan0), pCounter );
-    Dar2_LibBuildClear_rec( Dar_LibObj(s_DarLib, pObj->Fan1), pCounter );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reconstructs the best cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar2_LibBuildBest_rec( Gia_Man_t * p, Dar_LibObj_t * pObj )
-{
-    Gia_Obj_t * pNode;
-    Dar_LibDat_t * pData;
-    int iFanin0, iFanin1;
-    pData = s_DarLib->pDatas + pObj->Num;
-    if ( pData->iGunc >= 0 )
-        return pData->iGunc;
-    iFanin0 = Dar2_LibBuildBest_rec( p, Dar_LibObj(s_DarLib, pObj->Fan0) );
-    iFanin1 = Dar2_LibBuildBest_rec( p, Dar_LibObj(s_DarLib, pObj->Fan1) );
-    iFanin0 = Gia_LitNotCond( iFanin0, pObj->fCompl0 );
-    iFanin1 = Gia_LitNotCond( iFanin1, pObj->fCompl1 );
-    pData->iGunc = Gia_ManHashAnd( p, iFanin0, iFanin1 );
-    pNode = Gia_ManObj( p, Gia_Lit2Var(pData->iGunc) );
-    if ( Gia_ObjIsAnd( pNode ) )
-        Gia_ObjSetAndLevel( p, pNode );
-    Gia_ObjSetPhase( pNode );
-    return pData->iGunc;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reconstructs the best cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar2_LibBuildBest( Gia_Man_t * p, Vec_Int_t * vLeavesBest2, int OutBest )
-{
-    int i, iLeaf, Counter = 4;
-    assert( Vec_IntSize(vLeavesBest2) == 4 );
-    Vec_IntForEachEntry( vLeavesBest2, iLeaf, i )
-        s_DarLib->pDatas[i].iGunc = iLeaf;
-    Dar2_LibBuildClear_rec( Dar_LibObj(s_DarLib, OutBest), &Counter );
-    return Dar2_LibBuildBest_rec( p, Dar_LibObj(s_DarLib, OutBest) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Evaluate and build the new node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar_LibEvalBuild( Gia_Man_t * p, Vec_Int_t * vCutLits, unsigned uTruth, int fKeepLevel, Vec_Int_t * vLeavesBest2 )
-{
-    int OutBest = Dar2_LibEval( p, vCutLits, uTruth, fKeepLevel, vLeavesBest2 );
-    return Dar2_LibBuildBest( p, vLeavesBest2, OutBest );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dar/darMan.c b/src/aig/dar/darMan.c
deleted file mode 100644
index 59150103..00000000
--- a/src/aig/dar/darMan.c
+++ /dev/null
@@ -1,174 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [darMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    [AIG manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: darMan.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "darInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the rewriting manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Dar_Man_t * Dar_ManStart( Aig_Man_t * pAig, Dar_RwrPar_t * pPars )
-{
-    Dar_Man_t * p;
-    Aig_ManCleanData( pAig );
-    p = ABC_ALLOC( Dar_Man_t, 1 );
-    memset( p, 0, sizeof(Dar_Man_t) );
-    p->pPars = pPars;
-    p->pAig  = pAig;
-    p->vCutNodes = Vec_PtrAlloc( 1000 );
-    p->pMemCuts = Aig_MmFixedStart( p->pPars->nCutsMax * sizeof(Dar_Cut_t), 1024 );
-    p->vLeavesBest = Vec_PtrAlloc( 4 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the rewriting manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_ManStop( Dar_Man_t * p )
-{
-    if ( p->pPars->fVerbose )
-        Dar_ManPrintStats( p );
-    if ( p->vCutNodes )
-        Vec_PtrFree( p->vCutNodes );
-    if ( p->pMemCuts )
-        Aig_MmFixedStop( p->pMemCuts, 0 );
-    if ( p->vLeavesBest ) 
-        Vec_PtrFree( p->vLeavesBest );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the AIG manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_ManPrintStats( Dar_Man_t * p )
-{
-    unsigned pCanons[222];
-    int Gain, i;
-    extern void Kit_DsdPrintFromTruth( unsigned * pTruth, int nVars );
-
-    Gain = p->nNodesInit - Aig_ManNodeNum(p->pAig);
-    printf( "Tried = %8d. Beg = %8d. End = %8d. Gain = %6d. (%6.2f %%).  Cut mem = %d Mb\n", 
-        p->nNodesTried, p->nNodesInit, Aig_ManNodeNum(p->pAig), Gain, 100.0*Gain/p->nNodesInit, p->nCutMemUsed );
-    printf( "Cuts = %8d. Tried = %8d. Used = %8d. Bad = %5d. Skipped = %5d. Ave = %.2f.\n", 
-        p->nCutsAll, p->nCutsTried, p->nCutsUsed, p->nCutsBad, p->nCutsSkipped,
-        (float)p->nCutsUsed/Aig_ManNodeNum(p->pAig) );
-
-    printf( "Bufs = %5d. BufMax = %5d. BufReplace = %6d. BufFix = %6d.  Levels = %4d.\n", 
-        Aig_ManBufNum(p->pAig), p->pAig->nBufMax, p->pAig->nBufReplaces, p->pAig->nBufFixes, Aig_ManLevels(p->pAig) );
-    ABC_PRT( "Cuts  ", p->timeCuts );
-    ABC_PRT( "Eval  ", p->timeEval );
-    ABC_PRT( "Other ", p->timeOther );
-    ABC_PRT( "TOTAL ", p->timeTotal );
-
-    if ( !p->pPars->fVeryVerbose )
-        return;
-    Dar_LibReturnCanonicals( pCanons );
-    for ( i = 0; i < 222; i++ )
-    {
-        if ( p->ClassGains[i] == 0 && p->ClassTimes[i] == 0 )
-            continue;
-        printf( "%3d : ", i );
-        printf( "G = %6d (%5.2f %%)  ", p->ClassGains[i], Gain? 100.0*p->ClassGains[i]/Gain : 0.0 );
-        printf( "S = %8d (%5.2f %%)  ", p->ClassSubgs[i], p->nTotalSubgs? 100.0*p->ClassSubgs[i]/p->nTotalSubgs : 0.0 );
-        printf( "R = %7d   ", p->ClassGains[i]? p->ClassSubgs[i]/p->ClassGains[i] : 9999999 );
-//        Kit_DsdPrintFromTruth( pCanons + i, 4 );
-//        ABC_PRTP( "T", p->ClassTimes[i], p->timeEval );
-        printf( "\n" );
-    }
-    fflush( stdout );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-#if 0
-
-ABC_NAMESPACE_IMPL_END
-
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-void Dar_ManPrintScript()
-{
-    unsigned pCanons[222];
-    int i;
-    Dar_LibReturnCanonicals( pCanons );
-    for ( i = 1; i < 222; i++ )
-    {
-        Kit_DsdNtk_t * pNtk;
-        pNtk = Kit_DsdDecompose( pCanons + i, 4 );
-        printf( "    \"" );
-        Kit_DsdPrint( stdout, pNtk );
-        printf( "\",              /* %3d  */\n", i );
-        Kit_DsdNtkFree( pNtk );
-    }
-}
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dar/darPrec.c b/src/aig/dar/darPrec.c
deleted file mode 100644
index 4d164123..00000000
--- a/src/aig/dar/darPrec.c
+++ /dev/null
@@ -1,394 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [darPrec.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    [Truth table precomputation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: darPrec.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "darInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Allocated one-memory-chunk array.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char ** Dar_ArrayAlloc( int nCols, int nRows, int Size )
-{
-    char ** pRes;
-    char * pBuffer;
-    int i;
-    assert( nCols > 0 && nRows > 0 && Size > 0 );
-    pBuffer = ABC_ALLOC( char, nCols * (sizeof(void *) + nRows * Size) );
-    pRes = (char **)pBuffer;
-    pRes[0] = pBuffer + nCols * sizeof(void *);
-    for ( i = 1; i < nCols; i++ )
-        pRes[i] = pRes[0] + i * nRows * Size;
-    return pRes;
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Computes the factorial.]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-int Dar_Factorial( int n )
-{
-    int i, Res = 1;
-    for ( i = 1; i <= n; i++ )
-        Res *= i;
-    return Res;
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Fills in the array of permutations.]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-void Dar_Permutations_rec( char ** pRes, int nFact, int n, char Array[] )
-{
-    char ** pNext;
-    int nFactNext;
-    int iTemp, iCur, iLast, k;
-
-    if ( n == 1 )
-    {
-        pRes[0][0] = Array[0];
-        return;
-    }
-
-    // get the next factorial
-    nFactNext = nFact / n;
-    // get the last entry
-    iLast = n - 1;
-
-    for ( iCur = 0; iCur < n; iCur++ )
-    {
-        // swap Cur and Last
-        iTemp        = Array[iCur];
-        Array[iCur]  = Array[iLast];
-        Array[iLast] = iTemp;
-
-        // get the pointer to the current section
-        pNext = pRes + (n - 1 - iCur) * nFactNext;
-
-        // set the last entry 
-        for ( k = 0; k < nFactNext; k++ )
-            pNext[k][iLast] = Array[iLast];
-
-        // call recursively for this part
-        Dar_Permutations_rec( pNext, nFactNext, n - 1, Array );
-
-        // swap them back
-        iTemp        = Array[iCur];
-        Array[iCur]  = Array[iLast];
-        Array[iLast] = iTemp;
-    }
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Computes the set of all permutations.]
-
-  Description [The number of permutations in the array is n!. The number of
-  entries in each permutation is n. Therefore, the resulting array is a 
-  two-dimentional array of the size: n! x n. To free the resulting array,
-  call ABC_FREE() on the pointer returned by this procedure.]
-
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-char ** Dar_Permutations( int n )
-{
-    char Array[50];
-    char ** pRes;
-    int nFact, i;
-    // allocate memory
-    nFact = Dar_Factorial( n );
-    pRes  = Dar_ArrayAlloc( nFact, n, sizeof(char) );
-    // fill in the permutations
-    for ( i = 0; i < n; i++ )
-        Array[i] = i;
-    Dar_Permutations_rec( pRes, nFact, n, Array );
-    // print the permutations
-/*
-    {
-    int i, k;
-    for ( i = 0; i < nFact; i++ )
-    {
-        printf( "{" );
-        for ( k = 0; k < n; k++ )
-            printf( " %d", pRes[i][k] );
-        printf( " }\n" );
-    }
-    }
-*/
-    return pRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Permutes the given vector of minterms.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_TruthPermute_int( int * pMints, int nMints, char * pPerm, int nVars, int * pMintsP )
-{
-    int m, v;
-    // clean the storage for minterms
-    memset( pMintsP, 0, sizeof(int) * nMints );
-    // go through minterms and add the variables
-    for ( m = 0; m < nMints; m++ )
-        for ( v = 0; v < nVars; v++ )
-            if ( pMints[m] & (1 << v) )
-                pMintsP[m] |= (1 << pPerm[v]);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Permutes the function.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Dar_TruthPermute( unsigned Truth, char * pPerms, int nVars, int fReverse )
-{
-    unsigned Result;
-    int * pMints;
-    int * pMintsP;
-    int nMints;
-    int i, m;
-
-    assert( nVars < 6 );
-    nMints  = (1 << nVars);
-    pMints  = ABC_ALLOC( int, nMints );
-    pMintsP = ABC_ALLOC( int, nMints );
-    for ( i = 0; i < nMints; i++ )
-        pMints[i] = i;
-
-    Dar_TruthPermute_int( pMints, nMints, pPerms, nVars, pMintsP );
-
-    Result = 0;
-    if ( fReverse )
-    {
-        for ( m = 0; m < nMints; m++ )
-            if ( Truth & (1 << pMintsP[m]) )
-                Result |= (1 << m);
-    }
-    else
-    {
-        for ( m = 0; m < nMints; m++ )
-            if ( Truth & (1 << m) )
-                Result |= (1 << pMintsP[m]);
-    }
-
-    ABC_FREE( pMints );
-    ABC_FREE( pMintsP );
-
-    return Result;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Changes the phase of the function.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Dar_TruthPolarize( unsigned uTruth, int Polarity, int nVars )
-{
-    // elementary truth tables
-    static unsigned Signs[5] = {
-        0xAAAAAAAA,    // 1010 1010 1010 1010 1010 1010 1010 1010
-        0xCCCCCCCC,    // 1010 1010 1010 1010 1010 1010 1010 1010
-        0xF0F0F0F0,    // 1111 0000 1111 0000 1111 0000 1111 0000
-        0xFF00FF00,    // 1111 1111 0000 0000 1111 1111 0000 0000
-        0xFFFF0000     // 1111 1111 1111 1111 0000 0000 0000 0000
-    };
-    unsigned uTruthRes, uCof0, uCof1;
-    int nMints, Shift, v;
-    assert( nVars < 6 );
-    nMints = (1 << nVars);
-    uTruthRes = uTruth;
-    for ( v = 0; v < nVars; v++ )
-        if ( Polarity & (1 << v) )
-        {
-            uCof0  = uTruth & ~Signs[v];
-            uCof1  = uTruth &  Signs[v];
-            Shift  = (1 << v);
-            uCof0 <<= Shift;
-            uCof1 >>= Shift;
-            uTruth = uCof0 | uCof1;
-        }
-    return uTruth;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes NPN canonical forms for 4-variable functions.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_Truth4VarNPN( unsigned short ** puCanons, char ** puPhases, char ** puPerms, unsigned char ** puMap )
-{
-    unsigned short * uCanons;
-    unsigned char * uMap;
-    unsigned uTruth, uPhase, uPerm;
-    char ** pPerms4, * uPhases, * uPerms;
-    int nFuncs, nClasses;
-    int i, k;
-
-    nFuncs  = (1 << 16);
-    uCanons = ABC_CALLOC( unsigned short, nFuncs );
-    uPhases = ABC_CALLOC( char, nFuncs );
-    uPerms  = ABC_CALLOC( char, nFuncs );
-    uMap    = ABC_CALLOC( unsigned char, nFuncs );
-    pPerms4 = Dar_Permutations( 4 );
-
-    nClasses = 1;
-    nFuncs = (1 << 15);
-    for ( uTruth = 1; uTruth < (unsigned)nFuncs; uTruth++ )
-    {
-        // skip already assigned
-        if ( uCanons[uTruth] )
-        {
-            assert( uTruth > uCanons[uTruth] );
-            uMap[~uTruth & 0xFFFF] = uMap[uTruth] = uMap[uCanons[uTruth]];
-            continue;
-        }
-        uMap[uTruth] = nClasses++;
-        for ( i = 0; i < 16; i++ )
-        {
-            uPhase = Dar_TruthPolarize( uTruth, i, 4 );
-            for ( k = 0; k < 24; k++ )
-            {
-                uPerm = Dar_TruthPermute( uPhase, pPerms4[k], 4, 0 );
-                if ( uCanons[uPerm] == 0 )
-                {
-                    uCanons[uPerm] = uTruth;
-                    uPhases[uPerm] = i;
-                    uPerms[uPerm]  = k;
-                    uMap[uPerm]    = uMap[uTruth];
-
-                    uPerm = ~uPerm & 0xFFFF;
-                    uCanons[uPerm] = uTruth;
-                    uPhases[uPerm] = i | 16;
-                    uPerms[uPerm]  = k;
-                    uMap[uPerm]    = uMap[uTruth];
-                }
-                else
-                    assert( uCanons[uPerm] == uTruth );
-            }
-            uPhase = Dar_TruthPolarize( ~uTruth & 0xFFFF, i, 4 ); 
-            for ( k = 0; k < 24; k++ )
-            {
-                uPerm = Dar_TruthPermute( uPhase, pPerms4[k], 4, 0 );
-                if ( uCanons[uPerm] == 0 )
-                {
-                    uCanons[uPerm] = uTruth;
-                    uPhases[uPerm] = i;
-                    uPerms[uPerm]  = k;
-                    uMap[uPerm]    = uMap[uTruth];
-
-                    uPerm = ~uPerm & 0xFFFF;
-                    uCanons[uPerm] = uTruth;
-                    uPhases[uPerm] = i | 16;
-                    uPerms[uPerm]  = k;
-                    uMap[uPerm]    = uMap[uTruth];
-                }
-                else
-                    assert( uCanons[uPerm] == uTruth );
-            }
-        }
-    }
-    for ( uTruth = 1; uTruth < 0xffff; uTruth++ )
-        assert( uMap[uTruth] != 0 );
-    uPhases[(1<<16)-1] = 16;
-    assert( nClasses == 222 );
-    ABC_FREE( pPerms4 );
-    if ( puCanons ) 
-        *puCanons = uCanons;
-    else
-        ABC_FREE( uCanons );
-    if ( puPhases ) 
-        *puPhases = uPhases;
-    else
-        ABC_FREE( uPhases );
-    if ( puPerms ) 
-        *puPerms = uPerms;
-    else
-        ABC_FREE( uPerms );
-    if ( puMap ) 
-        *puMap = uMap;
-    else
-        ABC_FREE( uMap );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dar/darRefact.c b/src/aig/dar/darRefact.c
deleted file mode 100644
index d13856ba..00000000
--- a/src/aig/dar/darRefact.c
+++ /dev/null
@@ -1,636 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [darRefact.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    [Refactoring.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: darRefact.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "darInt.h"
-#include "kit.h"
-
-#include "bdc.h"
-#include "bdcInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// the refactoring manager
-typedef struct Ref_Man_t_            Ref_Man_t;
-struct Ref_Man_t_
-{
-    // input data
-    Dar_RefPar_t *   pPars;          // rewriting parameters
-    Aig_Man_t *      pAig;           // AIG manager 
-    // computed cuts
-    Vec_Vec_t *      vCuts;          // the storage for cuts
-    // truth table and ISOP
-    Vec_Ptr_t *      vTruthElem;     // elementary truth tables
-    Vec_Ptr_t *      vTruthStore;    // storage for truth tables
-    Vec_Int_t *      vMemory;        // storage for ISOP
-    Vec_Ptr_t *      vCutNodes;      // storage for internal nodes of the cut
-    // various data members
-    Vec_Ptr_t *      vLeavesBest;    // the best set of leaves
-    Kit_Graph_t *    pGraphBest;     // the best factored form
-    int              GainBest;       // the best gain
-    int              LevelBest;      // the level of node with the best gain
-    // bi-decomposition
-    Bdc_Par_t        DecPars;        // decomposition parameters
-    Bdc_Man_t *      pManDec;        // decomposition manager
-    // node statistics
-    int              nNodesInit;     // the initial number of nodes
-    int              nNodesTried;    // the number of nodes tried
-    int              nNodesBelow;    // the number of nodes below the level limit
-    int              nNodesExten;    // the number of nodes with extended cut
-    int              nCutsUsed;      // the number of rewriting steps
-    int              nCutsTried;     // the number of cuts tries
-    // timing statistics
-    int              timeCuts;
-    int              timeEval;
-    int              timeOther;
-    int              timeTotal;
-};
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the structure with default assignment of parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_ManDefaultRefParams( Dar_RefPar_t * pPars )
-{
-    memset( pPars, 0, sizeof(Dar_RefPar_t) );
-    pPars->nMffcMin     =  2;  // the min MFFC size for which refactoring is used
-    pPars->nLeafMax     = 12;  // the max number of leaves of a cut
-    pPars->nCutsMax     =  5;  // the max number of cuts to consider  
-    pPars->fUpdateLevel =  0;
-    pPars->fUseZeros    =  0;
-    pPars->fVerbose     =  0;
-    pPars->fVeryVerbose =  0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the rewriting manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ref_Man_t * Dar_ManRefStart( Aig_Man_t * pAig, Dar_RefPar_t * pPars )
-{
-    Ref_Man_t * p;
-    // start the manager
-    p = ABC_ALLOC( Ref_Man_t, 1 );
-    memset( p, 0, sizeof(Ref_Man_t) );
-    p->pAig         = pAig;
-    p->pPars        = pPars;
-    // other data
-    p->vCuts        = Vec_VecStart( pPars->nCutsMax );
-    p->vTruthElem   = Vec_PtrAllocTruthTables( pPars->nLeafMax );
-    p->vTruthStore  = Vec_PtrAllocSimInfo( 1024, Kit_TruthWordNum(pPars->nLeafMax) );
-    p->vMemory      = Vec_IntAlloc( 1 << 16 );
-    p->vCutNodes    = Vec_PtrAlloc( 256 );
-    p->vLeavesBest  = Vec_PtrAlloc( pPars->nLeafMax );
-    // alloc bi-decomposition manager
-    p->DecPars.nVarsMax = pPars->nLeafMax;
-    p->DecPars.fVerbose = pPars->fVerbose;
-    p->DecPars.fVeryVerbose = 0;
-//    p->pManDec = Bdc_ManAlloc( &p->DecPars );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints out the statistics of the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_ManRefPrintStats( Ref_Man_t * p )
-{
-    int Gain = p->nNodesInit - Aig_ManNodeNum(p->pAig);
-    printf( "NodesBeg = %8d. NodesEnd = %8d. Gain = %6d. (%6.2f %%).\n", 
-        p->nNodesInit, Aig_ManNodeNum(p->pAig), Gain, 100.0*Gain/p->nNodesInit );
-    printf( "Tried = %6d. Below = %5d. Extended = %5d.  Used = %5d.  Levels = %4d.\n", 
-        p->nNodesTried, p->nNodesBelow, p->nNodesExten, p->nCutsUsed, Aig_ManLevels(p->pAig) );
-    ABC_PRT( "Cuts  ", p->timeCuts );
-    ABC_PRT( "Eval  ", p->timeEval );
-    ABC_PRT( "Other ", p->timeOther );
-    ABC_PRT( "TOTAL ", p->timeTotal );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the rewriting manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_ManRefStop( Ref_Man_t * p )
-{
-    if ( p->pManDec )
-        Bdc_ManFree( p->pManDec );
-    if ( p->pPars->fVerbose )
-        Dar_ManRefPrintStats( p );
-    Vec_VecFree( p->vCuts );
-    Vec_PtrFree( p->vTruthElem );
-    Vec_PtrFree( p->vTruthStore );
-    Vec_PtrFree( p->vLeavesBest );
-    Vec_IntFree( p->vMemory );
-    Vec_PtrFree( p->vCutNodes );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ref_ObjComputeCuts( Aig_Man_t * pAig, Aig_Obj_t * pRoot, Vec_Vec_t * vCuts )
-{
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ref_ObjPrint( Aig_Obj_t * pObj )
-{
-    printf( "%d", pObj? Aig_Regular(pObj)->Id : -1 );
-    if ( pObj )
-        printf( "(%d) ", Aig_IsComplement(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of new nodes added when using this graph.]
-
-  Description [AIG nodes for the fanins should be assigned to pNode->pFunc 
-  of the leaves of the graph before calling this procedure. 
-  Returns -1 if the number of nodes and levels exceeded the given limit or 
-  the number of levels exceeded the maximum allowed level.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar_RefactTryGraph( Aig_Man_t * pAig, Aig_Obj_t * pRoot, Vec_Ptr_t * vCut, Kit_Graph_t * pGraph, int NodeMax, int LevelMax )
-{
-    Kit_Node_t * pNode, * pNode0, * pNode1;
-    Aig_Obj_t * pAnd, * pAnd0, * pAnd1;
-    int i, Counter, LevelNew, LevelOld;
-    // check for constant function or a literal
-    if ( Kit_GraphIsConst(pGraph) || Kit_GraphIsVar(pGraph) )
-        return 0;
-    // set the levels of the leaves
-    Kit_GraphForEachLeaf( pGraph, pNode, i )
-    {
-        pNode->pFunc = Vec_PtrEntry(vCut, i);
-        pNode->Level = Aig_Regular((Aig_Obj_t *)pNode->pFunc)->Level;
-        assert( Aig_Regular((Aig_Obj_t *)pNode->pFunc)->Level < (1<<24)-1 );
-    }
-//printf( "Trying:\n" );
-    // compute the AIG size after adding the internal nodes
-    Counter = 0;
-    Kit_GraphForEachNode( pGraph, pNode, i )
-    {
-        // get the children of this node
-        pNode0 = Kit_GraphNode( pGraph, pNode->eEdge0.Node );
-        pNode1 = Kit_GraphNode( pGraph, pNode->eEdge1.Node );
-        // get the AIG nodes corresponding to the children 
-        pAnd0 = (Aig_Obj_t *)pNode0->pFunc; 
-        pAnd1 = (Aig_Obj_t *)pNode1->pFunc; 
-        if ( pAnd0 && pAnd1 )
-        {
-            // if they are both present, find the resulting node
-            pAnd0 = Aig_NotCond( pAnd0, pNode->eEdge0.fCompl );
-            pAnd1 = Aig_NotCond( pAnd1, pNode->eEdge1.fCompl );
-            pAnd  = Aig_TableLookupTwo( pAig, pAnd0, pAnd1 );
-            // return -1 if the node is the same as the original root
-            if ( Aig_Regular(pAnd) == pRoot )
-                return -1;
-        }
-        else
-            pAnd = NULL;
-        // count the number of added nodes
-        if ( pAnd == NULL || Aig_ObjIsTravIdCurrent(pAig, Aig_Regular(pAnd)) )
-        {
-            if ( ++Counter > NodeMax )
-                return -1;
-        }
-        // count the number of new levels
-        LevelNew = 1 + ABC_MAX( pNode0->Level, pNode1->Level );
-        if ( pAnd )
-        {
-            if ( Aig_Regular(pAnd) == Aig_ManConst1(pAig) )
-                LevelNew = 0;
-            else if ( Aig_Regular(pAnd) == Aig_Regular(pAnd0) )
-                LevelNew = (int)Aig_Regular(pAnd0)->Level;
-            else if ( Aig_Regular(pAnd) == Aig_Regular(pAnd1) )
-                LevelNew = (int)Aig_Regular(pAnd1)->Level;
-            LevelOld = (int)Aig_Regular(pAnd)->Level;
-//            assert( LevelNew == LevelOld );
-        }
-        if ( LevelNew > LevelMax )
-            return -1;
-        pNode->pFunc = pAnd;
-        pNode->Level = LevelNew;
-/*
-printf( "Checking " );
-Ref_ObjPrint( pAnd0 );
-printf( " and " );
-Ref_ObjPrint( pAnd1 );
-printf( "  Result " );
-Ref_ObjPrint( pNode->pFunc );
-printf( "\n" );
-*/
-    }
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Dar_RefactBuildGraph( Aig_Man_t * pAig, Vec_Ptr_t * vCut, Kit_Graph_t * pGraph )
-{
-    Aig_Obj_t * pAnd0, * pAnd1;
-    Kit_Node_t * pNode = NULL;
-    int i;
-    // check for constant function
-    if ( Kit_GraphIsConst(pGraph) )
-        return Aig_NotCond( Aig_ManConst1(pAig), Kit_GraphIsComplement(pGraph) );
-    // set the leaves
-    Kit_GraphForEachLeaf( pGraph, pNode, i )
-        pNode->pFunc = Vec_PtrEntry(vCut, i);
-    // check for a literal
-    if ( Kit_GraphIsVar(pGraph) )
-        return Aig_NotCond( (Aig_Obj_t *)Kit_GraphVar(pGraph)->pFunc, Kit_GraphIsComplement(pGraph) );
-    // build the AIG nodes corresponding to the AND gates of the graph
-//printf( "Building (current number %d):\n", Aig_ManObjNumMax(pAig) );
-    Kit_GraphForEachNode( pGraph, pNode, i )
-    {
-        pAnd0 = Aig_NotCond( (Aig_Obj_t *)Kit_GraphNode(pGraph, pNode->eEdge0.Node)->pFunc, pNode->eEdge0.fCompl ); 
-        pAnd1 = Aig_NotCond( (Aig_Obj_t *)Kit_GraphNode(pGraph, pNode->eEdge1.Node)->pFunc, pNode->eEdge1.fCompl ); 
-        pNode->pFunc = Aig_And( pAig, pAnd0, pAnd1 );
-/*
-printf( "Checking " );
-Ref_ObjPrint( pAnd0 );
-printf( " and " );
-Ref_ObjPrint( pAnd1 );
-printf( "  Result " );
-Ref_ObjPrint( pNode->pFunc );
-printf( "\n" );
-*/
-    }
-    // complement the result if necessary
-    return Aig_NotCond( (Aig_Obj_t *)pNode->pFunc, Kit_GraphIsComplement(pGraph) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar_ManRefactorTryCuts( Ref_Man_t * p, Aig_Obj_t * pObj, int nNodesSaved, int Required )
-{
-    Vec_Ptr_t * vCut;
-    Kit_Graph_t * pGraphCur;
-    int k, RetValue, GainCur, nNodesAdded;
-    unsigned * pTruth;
-
-    p->GainBest = -1;
-    p->pGraphBest = NULL;
-    Vec_VecForEachLevel( p->vCuts, vCut, k )
-    {
-        if ( Vec_PtrSize(vCut) == 0 )
-            continue;
-//        if ( Vec_PtrSize(vCut) != 0 && Vec_PtrSize(Vec_VecEntry(p->vCuts, k+1)) != 0 )
-//            continue;
-
-        p->nCutsTried++;
-        // get the cut nodes
-        Aig_ObjCollectCut( pObj, vCut, p->vCutNodes );
-        // get the truth table
-        pTruth = Aig_ManCutTruth( pObj, vCut, p->vCutNodes, p->vTruthElem, p->vTruthStore );
-        if ( Kit_TruthIsConst0(pTruth, Vec_PtrSize(vCut)) )
-        {
-            p->GainBest = Aig_NodeMffcSupp( p->pAig, pObj, 0, NULL );
-            p->pGraphBest = Kit_GraphCreateConst0();
-            Vec_PtrCopy( p->vLeavesBest, vCut );
-            return p->GainBest;
-        }
-        if ( Kit_TruthIsConst1(pTruth, Vec_PtrSize(vCut)) )
-        {
-            p->GainBest = Aig_NodeMffcSupp( p->pAig, pObj, 0, NULL );
-            p->pGraphBest = Kit_GraphCreateConst1();
-            Vec_PtrCopy( p->vLeavesBest, vCut );
-            return p->GainBest;
-        }
-
-        // try the positive phase
-        RetValue = Kit_TruthIsop( pTruth, Vec_PtrSize(vCut), p->vMemory, 0 );
-        if ( RetValue > -1 )
-        {
-            pGraphCur = Kit_SopFactor( p->vMemory, 0, Vec_PtrSize(vCut), p->vMemory );
-/*
-{
-    int RetValue;
-    RetValue = Bdc_ManDecompose( p->pManDec, pTruth, NULL, Vec_PtrSize(vCut), NULL, 1000 );
-    printf( "Graph = %d. Bidec = %d.\n", Kit_GraphNodeNum(pGraphCur), RetValue );
-}
-*/
-            nNodesAdded = Dar_RefactTryGraph( p->pAig, pObj, vCut, pGraphCur, nNodesSaved - !p->pPars->fUseZeros, Required );
-            if ( nNodesAdded > -1 )
-            {
-                GainCur = nNodesSaved - nNodesAdded;
-                if ( p->GainBest < GainCur || (p->GainBest == GainCur && 
-                    (Kit_GraphIsConst(pGraphCur) || Kit_GraphRootLevel(pGraphCur) < Kit_GraphRootLevel(p->pGraphBest))) )
-                {
-                    p->GainBest = GainCur;
-                    if ( p->pGraphBest )
-                        Kit_GraphFree( p->pGraphBest );
-                    p->pGraphBest = pGraphCur;
-                    Vec_PtrCopy( p->vLeavesBest, vCut );
-                }
-                else
-                    Kit_GraphFree( pGraphCur );
-            }
-            else
-                Kit_GraphFree( pGraphCur );
-        }
-        // try negative phase
-        Kit_TruthNot( pTruth, pTruth, Vec_PtrSize(vCut) );
-        RetValue = Kit_TruthIsop( pTruth, Vec_PtrSize(vCut), p->vMemory, 0 );
-//        Kit_TruthNot( pTruth, pTruth, Vec_PtrSize(vCut) );
-        if ( RetValue > -1 )
-        {
-            pGraphCur = Kit_SopFactor( p->vMemory, 1, Vec_PtrSize(vCut), p->vMemory );
-/*
-{
-    int RetValue;
-    RetValue = Bdc_ManDecompose( p->pManDec, pTruth, NULL, Vec_PtrSize(vCut), NULL, 1000 );
-    printf( "Graph = %d. Bidec = %d.\n", Kit_GraphNodeNum(pGraphCur), RetValue );
-}
-*/
-            nNodesAdded = Dar_RefactTryGraph( p->pAig, pObj, vCut, pGraphCur, nNodesSaved - !p->pPars->fUseZeros, Required );
-            if ( nNodesAdded > -1 )
-            {
-                GainCur = nNodesSaved - nNodesAdded;
-                if ( p->GainBest < GainCur || (p->GainBest == GainCur && 
-                    (Kit_GraphIsConst(pGraphCur) || Kit_GraphRootLevel(pGraphCur) < Kit_GraphRootLevel(p->pGraphBest))) )
-                {
-                    p->GainBest = GainCur;
-                    if ( p->pGraphBest )
-                        Kit_GraphFree( p->pGraphBest );
-                    p->pGraphBest = pGraphCur;
-                    Vec_PtrCopy( p->vLeavesBest, vCut );
-                }
-                else
-                    Kit_GraphFree( pGraphCur );
-            }
-            else
-                Kit_GraphFree( pGraphCur );
-        }
-    }
-
-    return p->GainBest;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if a non-PI node has nLevelMin or below.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar_ObjCutLevelAchieved( Vec_Ptr_t * vCut, int nLevelMin )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Vec_PtrForEachEntry( Aig_Obj_t *, vCut, pObj, i )
-        if ( !Aig_ObjIsPi(pObj) && (int)pObj->Level <= nLevelMin )
-            return 1;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
- 
-***********************************************************************/
-int Dar_ManRefactor( Aig_Man_t * pAig, Dar_RefPar_t * pPars )
-{
-//    Bar_Progress_t * pProgress;
-    Ref_Man_t * p;
-    Vec_Ptr_t * vCut, * vCut2;
-    Aig_Obj_t * pObj, * pObjNew;
-    int nNodesOld, nNodeBefore, nNodeAfter, nNodesSaved, nNodesSaved2;
-    int i, Required, nLevelMin, clkStart, clk;
-
-    // start the manager
-    p = Dar_ManRefStart( pAig, pPars );
-    // remove dangling nodes
-    Aig_ManCleanup( pAig );
-    // if updating levels is requested, start fanout and timing
-    Aig_ManFanoutStart( pAig );
-    if ( p->pPars->fUpdateLevel )
-        Aig_ManStartReverseLevels( pAig, 0 );
-
-    // resynthesize each node once
-    clkStart = clock();
-    vCut = Vec_VecEntry( p->vCuts, 0 );
-    vCut2 = Vec_VecEntry( p->vCuts, 1 );
-    p->nNodesInit = Aig_ManNodeNum(pAig);
-    nNodesOld = Vec_PtrSize( pAig->vObjs );
-//    pProgress = Bar_ProgressStart( stdout, nNodesOld );
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-//        Bar_ProgressUpdate( pProgress, i, NULL );
-        if ( !Aig_ObjIsNode(pObj) )
-            continue;
-        if ( i > nNodesOld )
-            break;
-        Vec_VecClear( p->vCuts );
-
-//printf( "\nConsidering node %d.\n", pObj->Id );
-        // get the bounded MFFC size
-clk = clock();
-        nLevelMin = ABC_MAX( 0, Aig_ObjLevel(pObj) - 10 );
-        nNodesSaved = Aig_NodeMffcSupp( pAig, pObj, nLevelMin, vCut );
-        if ( nNodesSaved < p->pPars->nMffcMin ) // too small to consider
-        {
-p->timeCuts += clock() - clk;
-            continue; 
-        }
-        p->nNodesTried++;
-        if ( Vec_PtrSize(vCut) > p->pPars->nLeafMax ) // get one reconv-driven cut
-        {
-            Aig_ManFindCut( pObj, vCut, p->vCutNodes, p->pPars->nLeafMax, 50 );
-            nNodesSaved = Aig_NodeMffcLabelCut( p->pAig, pObj, vCut );
-        }
-        else if ( Vec_PtrSize(vCut) < p->pPars->nLeafMax - 2 && p->pPars->fExtend )
-        {
-            if ( !Dar_ObjCutLevelAchieved(vCut, nLevelMin) )
-            {
-                if ( Aig_NodeMffcExtendCut( pAig, pObj, vCut, vCut2 ) )
-                {
-                    nNodesSaved2 = Aig_NodeMffcLabelCut( p->pAig, pObj, vCut );
-                    assert( nNodesSaved2 == nNodesSaved );
-                }
-                if ( Vec_PtrSize(vCut2) > p->pPars->nLeafMax )
-                    Vec_PtrClear(vCut2);
-                if ( Vec_PtrSize(vCut2) > 0 )
-                {
-                    p->nNodesExten++;
-//                    printf( "%d(%d) ", Vec_PtrSize(vCut), Vec_PtrSize(vCut2) );
-                }
-            }
-            else
-                p->nNodesBelow++;
-        }
-p->timeCuts += clock() - clk;
-
-        // try the cuts
-clk = clock();
-        Required = pAig->vLevelR? Aig_ObjRequiredLevel(pAig, pObj) : ABC_INFINITY;
-        Dar_ManRefactorTryCuts( p, pObj, nNodesSaved, Required );
-p->timeEval += clock() - clk;
-
-        // check the best gain
-        if ( !(p->GainBest > 0 || (p->GainBest == 0 && p->pPars->fUseZeros)) )
-        {
-            if ( p->pGraphBest )
-                Kit_GraphFree( p->pGraphBest );
-            continue;
-        }
-//printf( "\n" );
-
-        // if we end up here, a rewriting step is accepted
-        nNodeBefore = Aig_ManNodeNum( pAig );
-        pObjNew = Dar_RefactBuildGraph( pAig, p->vLeavesBest, p->pGraphBest );
-        assert( (int)Aig_Regular(pObjNew)->Level <= Required );
-        // replace the node
-        Aig_ObjReplace( pAig, pObj, pObjNew, p->pPars->fUpdateLevel );
-        // compare the gains
-        nNodeAfter = Aig_ManNodeNum( pAig );
-        assert( p->GainBest <= nNodeBefore - nNodeAfter );
-        Kit_GraphFree( p->pGraphBest );
-        p->nCutsUsed++;
-//        break;
-    }
-p->timeTotal = clock() - clkStart;
-p->timeOther = p->timeTotal - p->timeCuts - p->timeEval;
-
-//    Bar_ProgressStop( pProgress );
-    // put the nodes into the DFS order and reassign their IDs
-//    Aig_NtkReassignIds( p );
-    // fix the levels
-    Aig_ManFanoutStop( pAig );
-    if ( p->pPars->fUpdateLevel )
-        Aig_ManStopReverseLevels( pAig );
-/*
-    Aig_ManForEachObj( p->pAig, pObj, i )
-        if ( Aig_ObjIsNode(pObj) && Aig_ObjRefs(pObj) == 0 )
-        {
-            printf( "Unreferenced " );
-            Aig_ObjPrintVerbose( pObj, 0 );
-            printf( "\n" );
-        }
-*/
-    // remove dangling nodes (they should not be here!)
-    Aig_ManCleanup( pAig );
-
-    // stop the rewriting manager
-    Dar_ManRefStop( p );
-//    Aig_ManCheckPhase( pAig );
-    if ( !Aig_ManCheck( pAig ) )
-    {
-        printf( "Dar_ManRefactor: The network check has failed.\n" );
-        return 0;
-    }
-    return 1;
-
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dar/darResub.c b/src/aig/dar/darResub.c
deleted file mode 100644
index 44367207..00000000
--- a/src/aig/dar/darResub.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [darResub.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: darResub.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "darInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dar/darScript.c b/src/aig/dar/darScript.c
deleted file mode 100644
index 884eed07..00000000
--- a/src/aig/dar/darScript.c
+++ /dev/null
@@ -1,927 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [darScript.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    [Rewriting scripts.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: darScript.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "darInt.h"
-#include "dch.h"
-#include "gia.h"
-#include "giaAig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one iteration of AIG rewriting.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dar_ManRewriteDefault( Aig_Man_t * pAig )
-{
-    Aig_Man_t * pTemp;
-    Dar_RwrPar_t Pars, * pPars = &Pars;
-    Dar_ManDefaultRwrParams( pPars );
-    pAig = Aig_ManDupDfs( pAig ); 
-    Dar_ManRewrite( pAig, pPars );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    return pAig;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reproduces script "rwsat".]
-
-  Description []
-               
-  SideEffects [This procedure does not tighten level during restructuring.]
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dar_ManRwsat( Aig_Man_t * pAig, int fBalance, int fVerbose )
-//alias rwsat       "st; rw -l; b -l; rw -l; rf -l"
-{
-    Aig_Man_t * pTemp;
-
-    Dar_RwrPar_t ParsRwr, * pParsRwr = &ParsRwr;
-    Dar_RefPar_t ParsRef, * pParsRef = &ParsRef;
-
-    Dar_ManDefaultRwrParams( pParsRwr );
-    Dar_ManDefaultRefParams( pParsRef );
-
-    pParsRwr->fUpdateLevel = 0;
-    pParsRef->fUpdateLevel = 0;
-
-    pParsRwr->fVerbose = fVerbose;
-    pParsRef->fVerbose = fVerbose;
-//printf( "1" );
-    pAig = Aig_ManDupDfs( pAig ); 
-    if ( fVerbose ) printf( "Starting:  " ), Aig_ManPrintStats( pAig );
-
-//printf( "2" );
-    // balance
-    if ( fBalance )
-    {
-    pAig = Dar_ManBalance( pTemp = pAig, 0 );
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Balance:   " ), Aig_ManPrintStats( pAig );
-    }
-   
-//Aig_ManDumpBlif( pAig, "inter.blif", NULL, NULL );
-//printf( "3" );
-    // rewrite
-    Dar_ManRewrite( pAig, pParsRwr );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Rewrite:   " ), Aig_ManPrintStats( pAig );
-
-//printf( "4" );
-    // refactor
-    Dar_ManRefactor( pAig, pParsRef );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Refactor:  " ), Aig_ManPrintStats( pAig );
-
-//printf( "5" );
-    // balance
-    if ( fBalance )
-    {
-    pAig = Dar_ManBalance( pTemp = pAig, 0 );
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Balance:   " ), Aig_ManPrintStats( pAig );
-    }
-    
-//printf( "6" );
-    // rewrite
-    Dar_ManRewrite( pAig, pParsRwr );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Rewrite:   " ), Aig_ManPrintStats( pAig );
-
-//printf( "7" );
-    return pAig;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one iteration of AIG rewriting.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dar_ManHaigPrintStats( Aig_Man_t * pAig )
-{
-    Aig_Obj_t * pObj;
-    int Counter, i;
-    Counter = 0;
-    Aig_ManForEachNode( pAig, pObj, i )
-        Counter += (pObj->pHaig != NULL);
-    printf( "Total nodes = %6d. Equiv nodes = %6d.\n", Aig_ManNodeNum(pAig), Counter );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reproduces script "compress".]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dar_ManCompress( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fPower, int fVerbose )
-//alias compress2   "b -l; rw -l; rwz -l; b -l; rwz -l; b -l"
-{
-    Aig_Man_t * pTemp;
-
-    Dar_RwrPar_t ParsRwr, * pParsRwr = &ParsRwr;
-    Dar_RefPar_t ParsRef, * pParsRef = &ParsRef;
-
-    Dar_ManDefaultRwrParams( pParsRwr );
-    Dar_ManDefaultRefParams( pParsRef );
-
-    pParsRwr->fUpdateLevel = fUpdateLevel;
-    pParsRef->fUpdateLevel = fUpdateLevel;
-
-    pParsRwr->fPower = fPower;
-
-    pParsRwr->fVerbose = 0;//fVerbose;
-    pParsRef->fVerbose = 0;//fVerbose;
-
-    pAig = Aig_ManDupDfs( pAig ); 
-    if ( fVerbose ) printf( "Starting:  " ), Aig_ManPrintStats( pAig );
-/*
-    // balance
-    if ( fBalance )
-    {
-    pAig = Dar_ManBalance( pTemp = pAig, fUpdateLevel );
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Balance:   " ), Aig_ManPrintStats( pAig );
-    }
-*/    
-    // rewrite
-    Dar_ManRewrite( pAig, pParsRwr );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Rewrite:   " ), Aig_ManPrintStats( pAig );
-    
-    // refactor
-    Dar_ManRefactor( pAig, pParsRef );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Refactor:  " ), Aig_ManPrintStats( pAig );
-
-    // balance
-    if ( fBalance )
-    {
-    pAig = Dar_ManBalance( pTemp = pAig, fUpdateLevel );
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Balance:   " ), Aig_ManPrintStats( pAig );
-    }
-
-    pParsRwr->fUseZeros = 1;
-    pParsRef->fUseZeros = 1;
-    
-    // rewrite
-    Dar_ManRewrite( pAig, pParsRwr );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "RewriteZ:  " ), Aig_ManPrintStats( pAig );
-
-    return pAig;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reproduces script "compress2".]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dar_ManCompress2( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fFanout, int fPower, int fVerbose )
-//alias compress2   "b -l; rw -l; rf -l; b -l; rw -l; rwz -l; b -l; rfz -l; rwz -l; b -l"
-{
-    Aig_Man_t * pTemp;
-
-    Dar_RwrPar_t ParsRwr, * pParsRwr = &ParsRwr;
-    Dar_RefPar_t ParsRef, * pParsRef = &ParsRef;
-
-    Dar_ManDefaultRwrParams( pParsRwr );
-    Dar_ManDefaultRefParams( pParsRef );
-
-    pParsRwr->fUpdateLevel = fUpdateLevel;
-    pParsRef->fUpdateLevel = fUpdateLevel;
-    pParsRwr->fFanout = fFanout;
-    pParsRwr->fPower = fPower;
-
-    pParsRwr->fVerbose = 0;//fVerbose;
-    pParsRef->fVerbose = 0;//fVerbose;
-
-    pAig = Aig_ManDupDfs( pAig ); 
-    if ( fVerbose ) printf( "Starting:  " ), Aig_ManPrintStats( pAig );
-/*
-    // balance
-    if ( fBalance )
-    {
-    pAig = Dar_ManBalance( pTemp = pAig, fUpdateLevel );
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Balance:   " ), Aig_ManPrintStats( pAig );
-    }
-*/
-    // rewrite
-//    Dar_ManRewrite( pAig, pParsRwr );
-    pParsRwr->fUpdateLevel = 0;  // disable level update
-    Dar_ManRewrite( pAig, pParsRwr );
-    pParsRwr->fUpdateLevel = fUpdateLevel;  // reenable level update if needed
-
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Rewrite:   " ), Aig_ManPrintStats( pAig );
-    
-    // refactor
-    Dar_ManRefactor( pAig, pParsRef );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Refactor:  " ), Aig_ManPrintStats( pAig );
-
-    // balance
-//    if ( fBalance )
-    {
-    pAig = Dar_ManBalance( pTemp = pAig, fUpdateLevel );
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Balance:   " ), Aig_ManPrintStats( pAig );
-    }
-    
-    // rewrite
-    Dar_ManRewrite( pAig, pParsRwr );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Rewrite:   " ), Aig_ManPrintStats( pAig );
-
-    pParsRwr->fUseZeros = 1;
-    pParsRef->fUseZeros = 1;
-    
-    // rewrite
-    Dar_ManRewrite( pAig, pParsRwr );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "RewriteZ:  " ), Aig_ManPrintStats( pAig );
-
-    // balance
-    if ( fBalance )
-    {
-    pAig = Dar_ManBalance( pTemp = pAig, fUpdateLevel );
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Balance:   " ), Aig_ManPrintStats( pAig );
-    }
-    
-    // refactor
-    Dar_ManRefactor( pAig, pParsRef );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "RefactorZ: " ), Aig_ManPrintStats( pAig );
-    
-    // rewrite
-    Dar_ManRewrite( pAig, pParsRwr );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "RewriteZ:  " ), Aig_ManPrintStats( pAig );
-
-    // balance
-    if ( fBalance )
-    {
-    pAig = Dar_ManBalance( pTemp = pAig, fUpdateLevel );
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Balance:   " ), Aig_ManPrintStats( pAig );
-    }
-    return pAig;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reproduces script "compress2".]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Dar_ManChoiceSynthesis( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fPower, int fVerbose )
-//alias resyn    "b; rw; rwz; b; rwz; b"
-//alias resyn2   "b; rw; rf; b; rw; rwz; b; rfz; rwz; b"
-{
-    Vec_Ptr_t * vAigs;
-    Aig_Obj_t * pObj;
-    int i;
-
-    vAigs = Vec_PtrAlloc( 3 );
-    pAig = Aig_ManDupDfs(pAig);
-    Vec_PtrPush( vAigs, pAig );
-
-    Aig_ManForEachObj( pAig, pObj, i )
-        pObj->pHaig = pObj;
-
-    pAig = Dar_ManCompress(pAig, fBalance, fUpdateLevel, fPower, fVerbose);
-    Vec_PtrPush( vAigs, pAig );
-//Aig_ManPrintStats( pAig );
-
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        pObj->pNext = pObj->pHaig;
-        pObj->pHaig = pObj;
-    }
-
-    pAig = Dar_ManCompress2(pAig, fBalance, fUpdateLevel, 1, fPower, fVerbose);
-    Vec_PtrPush( vAigs, pAig );
-//Aig_ManPrintStats( pAig );
-
-    pAig = (Aig_Man_t *)Vec_PtrEntry( vAigs, 1 );
-    Aig_ManForEachObj( pAig, pObj, i )
-        pObj->pHaig = pObj->pNext;
-
-    return vAigs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reproduces script "compress2".]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dar_ManChoice( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fConstruct, int nConfMax, int nLevelMax, int fVerbose )
-{
-    Aig_Man_t * pMan, * pTemp;
-    Vec_Ptr_t * vAigs;
-    int i, clk;
-
-clk = clock();
-//    vAigs = Dar_ManChoiceSynthesisExt();
-    vAigs = Dar_ManChoiceSynthesis( pAig, fBalance, fUpdateLevel, 0, fVerbose );
-
-    // swap the first and last network
-    // this should lead to the primary choice being "better" because of synthesis
-    // (it is also important when constructing choices)
-    if ( !fConstruct )
-    {
-        pMan = (Aig_Man_t *)Vec_PtrPop( vAigs );
-        Vec_PtrPush( vAigs, Vec_PtrEntry(vAigs,0) );
-        Vec_PtrWriteEntry( vAigs, 0, pMan );
-    }
-
-if ( fVerbose )
-{
-ABC_PRT( "Synthesis time", clock() - clk );
-}
-clk = clock();
-    if ( fConstruct )
-        pMan = Aig_ManChoiceConstructive( vAigs, fVerbose );
-    else
-        pMan = Aig_ManChoicePartitioned( vAigs, 300, nConfMax, nLevelMax, fVerbose );
-    Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pTemp, i )
-        Aig_ManStop( pTemp );
-    Vec_PtrFree( vAigs );
-if ( fVerbose )
-{
-ABC_PRT( "Choicing time ", clock() - clk );
-}
-    return pMan;
-//    return NULL;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Reproduces script "compress".]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dar_NewCompress( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fPower, int fVerbose )
-//alias compress2   "b -l; rw -l; rwz -l; b -l; rwz -l; b -l"
-{
-    Aig_Man_t * pTemp;
-
-    Dar_RwrPar_t ParsRwr, * pParsRwr = &ParsRwr;
-    Dar_RefPar_t ParsRef, * pParsRef = &ParsRef;
-
-    Dar_ManDefaultRwrParams( pParsRwr );
-    Dar_ManDefaultRefParams( pParsRef );
-
-    pParsRwr->fUpdateLevel = fUpdateLevel;
-    pParsRef->fUpdateLevel = fUpdateLevel;
-
-    pParsRwr->fPower = fPower;
-
-    pParsRwr->fVerbose = 0;//fVerbose;
-    pParsRef->fVerbose = 0;//fVerbose;
-
-//    pAig = Aig_ManDupDfs( pAig ); 
-    if ( fVerbose ) printf( "Starting:  " ), Aig_ManPrintStats( pAig );
-
-    // rewrite
-    Dar_ManRewrite( pAig, pParsRwr );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Rewrite:   " ), Aig_ManPrintStats( pAig );
-    
-    // refactor
-    Dar_ManRefactor( pAig, pParsRef );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Refactor:  " ), Aig_ManPrintStats( pAig );
-
-    // balance
-    if ( fBalance )
-    {
-    pAig = Dar_ManBalance( pTemp = pAig, fUpdateLevel );
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Balance:   " ), Aig_ManPrintStats( pAig );
-    }
-
-    pParsRwr->fUseZeros = 1;
-    pParsRef->fUseZeros = 1;
-    
-    // rewrite
-    Dar_ManRewrite( pAig, pParsRwr );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "RewriteZ:  " ), Aig_ManPrintStats( pAig );
-
-    return pAig;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reproduces script "compress2".]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dar_NewCompress2( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fFanout, int fPower, int fLightSynth, int fVerbose )
-//alias compress2   "b -l; rw -l; rf -l; b -l; rw -l; rwz -l; b -l; rfz -l; rwz -l; b -l"
-{
-    Aig_Man_t * pTemp;
-
-    Dar_RwrPar_t ParsRwr, * pParsRwr = &ParsRwr;
-    Dar_RefPar_t ParsRef, * pParsRef = &ParsRef;
-
-    Dar_ManDefaultRwrParams( pParsRwr );
-    Dar_ManDefaultRefParams( pParsRef );
-
-    pParsRwr->fUpdateLevel = fUpdateLevel;
-    pParsRef->fUpdateLevel = fUpdateLevel;
-    pParsRwr->fFanout = fFanout;
-    pParsRwr->fPower = fPower;
-
-    pParsRwr->fVerbose = 0;//fVerbose;
-    pParsRef->fVerbose = 0;//fVerbose;
-
-//    pAig = Aig_ManDupDfs( pAig ); 
-    if ( fVerbose ) printf( "Starting:  " ), Aig_ManPrintStats( pAig );
-
-    // skip if lighter synthesis is requested
-    if ( !fLightSynth )
-    {
-        // rewrite
-        //Dar_ManRewrite( pAig, pParsRwr );
-//        pParsRwr->fUpdateLevel = 0;  // disable level update  // this change was requested in July and later disabled
-        Dar_ManRewrite( pAig, pParsRwr );
-//        pParsRwr->fUpdateLevel = fUpdateLevel;  // reenable level update if needed
-
-        pAig = Aig_ManDupDfs( pTemp = pAig ); 
-        Aig_ManStop( pTemp );
-        if ( fVerbose ) printf( "Rewrite:   " ), Aig_ManPrintStats( pAig );
-    
-        // refactor
-        Dar_ManRefactor( pAig, pParsRef );
-        pAig = Aig_ManDupDfs( pTemp = pAig ); 
-        Aig_ManStop( pTemp );
-        if ( fVerbose ) printf( "Refactor:  " ), Aig_ManPrintStats( pAig );
-    }
-
-    // balance
-    pAig = Dar_ManBalance( pTemp = pAig, fUpdateLevel );
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Balance:   " ), Aig_ManPrintStats( pAig );
-    
-    // skip if lighter synthesis is requested
-    if ( !fLightSynth )
-    {
-        // rewrite
-        Dar_ManRewrite( pAig, pParsRwr );
-        pAig = Aig_ManDupDfs( pTemp = pAig ); 
-        Aig_ManStop( pTemp );
-        if ( fVerbose ) printf( "Rewrite:   " ), Aig_ManPrintStats( pAig );
-    }
-
-    pParsRwr->fUseZeros = 1;
-    pParsRef->fUseZeros = 1;
-    
-    // rewrite
-    Dar_ManRewrite( pAig, pParsRwr );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "RewriteZ:  " ), Aig_ManPrintStats( pAig );
-
-    // skip if lighter synthesis is requested
-    if ( !fLightSynth )
-    {
-        // balance
-        if ( fBalance )
-        {
-        pAig = Dar_ManBalance( pTemp = pAig, fUpdateLevel );
-        Aig_ManStop( pTemp );
-        if ( fVerbose ) printf( "Balance:   " ), Aig_ManPrintStats( pAig );
-        }
-    }
-    
-    // refactor
-    Dar_ManRefactor( pAig, pParsRef );
-    pAig = Aig_ManDupDfs( pTemp = pAig ); 
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "RefactorZ: " ), Aig_ManPrintStats( pAig );
-    
-    // skip if lighter synthesis is requested
-    if ( !fLightSynth )
-    {
-        // rewrite
-        Dar_ManRewrite( pAig, pParsRwr );
-        pAig = Aig_ManDupDfs( pTemp = pAig ); 
-        Aig_ManStop( pTemp );
-        if ( fVerbose ) printf( "RewriteZ:  " ), Aig_ManPrintStats( pAig );
-    }
-
-    // balance
-    if ( fBalance )
-    {
-    pAig = Dar_ManBalance( pTemp = pAig, fUpdateLevel );
-    Aig_ManStop( pTemp );
-    if ( fVerbose ) printf( "Balance:   " ), Aig_ManPrintStats( pAig );
-    }
-    return pAig;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Count the number of nodes with very high fanout count.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dar_NewChoiceSynthesisGuard( Aig_Man_t * pAig )
-{
-    Aig_Obj_t * pObj;
-    int i, Count = 0;
-    Aig_ManForEachNode( pAig, pObj, i )
-        if ( Aig_ObjRefs(pObj) > 1000 )
-            Count += Aig_ObjRefs(pObj) / 1000;
-    return (int)(Count > 10);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reproduces script "compress2".]
-
-  Description [Takes AIG manager, consumes it, and produces GIA manager.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Gia_Man_t * Dar_NewChoiceSynthesis( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fPower, int fLightSynth, int fVerbose )
-//alias resyn    "b; rw; rwz; b; rwz; b"
-//alias resyn2   "b; rw; rf; b; rw; rwz; b; rfz; rwz; b"
-{
-    Vec_Ptr_t * vGias;
-    Gia_Man_t * pGia, * pTemp;
-    int i;
-
-    if ( fUpdateLevel && Dar_NewChoiceSynthesisGuard(pAig) )
-    {
-        if ( fVerbose )
-            printf( "Warning: Due to high fanout count of some nodes, level updating is disabled.\n" );
-        fUpdateLevel = 0;
-    }
-
-    vGias = Vec_PtrAlloc( 3 );
-    pGia = Gia_ManFromAig(pAig);
-    Vec_PtrPush( vGias, pGia );
-
-    pAig = Dar_NewCompress( pAig, fBalance, fUpdateLevel, fPower, fVerbose );
-    pGia = Gia_ManFromAig(pAig);
-    Vec_PtrPush( vGias, pGia );
-//Aig_ManPrintStats( pAig );
-
-    pAig = Dar_NewCompress2( pAig, fBalance, fUpdateLevel, 1, fPower, fLightSynth, fVerbose );
-    pGia = Gia_ManFromAig(pAig);
-    Vec_PtrPush( vGias, pGia );
-//Aig_ManPrintStats( pAig );
-
-    Aig_ManStop( pAig );
-
-    // swap around the first and the last
-    pTemp = (Gia_Man_t *)Vec_PtrPop( vGias );
-    Vec_PtrPush( vGias, Vec_PtrEntry(vGias,0) );
-    Vec_PtrWriteEntry( vGias, 0, pTemp );
-
-//    Aig_Man_t * pAig;
-//    int i;
-//    printf( "Choicing will be performed with %d AIGs:\n", Vec_PtrSize(p->vAigs) );
-//    Vec_PtrForEachEntry( Aig_Man_t *, p->vAigs, pAig, i )
-//        Aig_ManPrintStats( pAig );
-
-    // derive the miter
-    pGia = Gia_ManChoiceMiter( vGias );
-
-    // cleanup
-    Vec_PtrForEachEntry( Gia_Man_t *, vGias, pTemp, i )
-        Gia_ManStop( pTemp );
-    Vec_PtrFree( vGias );
-    return pGia;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reproduces script "compress2".]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-/*
-Aig_Man_t * Dar_ManChoiceNew( Aig_Man_t * pAig, Dch_Pars_t * pPars )
-{
-    extern Aig_Man_t * Dch_ComputeChoices( Vec_Ptr_t * vAigs, Dch_Pars_t * pPars );
-    extern Aig_Man_t * Cec_ComputeChoices( Vec_Ptr_t * vAigs, Dch_Pars_t * pPars );
-
-    int fVerbose = pPars->fVerbose;
-    int fConstruct = 0;
-    Aig_Man_t * pMan, * pTemp;
-    Vec_Ptr_t * vAigs;
-    int i, clk;
-
-clk = clock();
-//    vAigs = Dar_ManChoiceSynthesisExt();
-//    vAigs = Dar_ManChoiceSynthesis( pAig, 1, 1, pPars->fPower, fVerbose );
-    vAigs = Dar_ManChoiceSynthesis( pAig, 1, 1, pPars->fPower, 0 );
-
-    // swap the first and last network
-    // this should lead to the primary choice being "better" because of synthesis
-    // (it is also important when constructing choices)
-    if ( !fConstruct )
-    {
-        pMan = Vec_PtrPop( vAigs );
-        Vec_PtrPush( vAigs, Vec_PtrEntry(vAigs,0) );
-        Vec_PtrWriteEntry( vAigs, 0, pMan );
-    }
-
-if ( fVerbose )
-{
-//ABC_PRT( "Synthesis time", clock() - clk );
-}
-    pPars->timeSynth = clock() - clk;
-
-clk = clock();
-    // perform choice computation
-    if ( pPars->fUseGia )
-        pMan = Cec_ComputeChoices( vAigs, pPars );
-    else
-        pMan = Dch_ComputeChoices( vAigs, pPars );
-
-    // reconstruct the network
-    pMan = Aig_ManDupDfsGuided( pTemp = pMan, Vec_PtrEntry(vAigs,0) );
-    Aig_ManStop( pTemp );
-    // duplicate the timing manager
-    pTemp = Vec_PtrEntry( vAigs, 0 );
-    if ( pTemp->pManTime )
-    {
-        extern void * Tim_ManDup( void * p, int fDiscrete );     
-        pMan->pManTime = Tim_ManDup( pTemp->pManTime, 0 );
-    }
-    // reset levels
-    Aig_ManChoiceLevel( pMan );
-    ABC_FREE( pMan->pName );
-    ABC_FREE( pMan->pSpec );
-    pMan->pName = Aig_UtilStrsav( pTemp->pName );
-    pMan->pSpec = Aig_UtilStrsav( pTemp->pSpec );
-
-    // cleanup
-    Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pTemp, i )
-        Aig_ManStop( pTemp );
-    Vec_PtrFree( vAigs );
-
-if ( fVerbose )
-{
-//ABC_PRT( "Choicing time ", clock() - clk );
-}
-    return pMan;
-//    return NULL;
-}
-*/
-
-/**Function*************************************************************
-
-  Synopsis    [Reproduces script "compress2".]
-
-  Description [Consumes the input AIG to reduce memory usage.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dar_ManChoiceNewAig( Aig_Man_t * pAig, Dch_Pars_t * pPars )
-{
-//    extern Aig_Man_t * Dch_DeriveTotalAig( Vec_Ptr_t * vAigs );
-    extern Aig_Man_t * Dch_ComputeChoices( Aig_Man_t * pAig, Dch_Pars_t * pPars );
-    int fVerbose = pPars->fVerbose;
-    Aig_Man_t * pMan, * pTemp;
-    Vec_Ptr_t * vAigs;
-    Vec_Ptr_t * vPios;
-    void * pManTime;
-    char * pName, * pSpec;
-    int i, clk;
-
-clk = clock();
-    vAigs = Dar_ManChoiceSynthesis( pAig, 1, 1, pPars->fPower, fVerbose );
-pPars->timeSynth = clock() - clk;
-    // swap the first and last network
-    // this should lead to the primary choice being "better" because of synthesis
-    // (it is also important when constructing choices)
-    pMan = (Aig_Man_t *)Vec_PtrPop( vAigs );
-    Vec_PtrPush( vAigs, Vec_PtrEntry(vAigs,0) );
-    Vec_PtrWriteEntry( vAigs, 0, pMan );
-
-    // derive the total AIG
-    pMan = Dch_DeriveTotalAig( vAigs );
-    // cleanup
-    Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pTemp, i )
-        Aig_ManStop( pTemp );
-    Vec_PtrFree( vAigs );
-
-    // compute choices
-    pMan = Dch_ComputeChoices( pTemp = pMan, pPars );
-    Aig_ManStop( pTemp );
-
-    // save useful things
-    pManTime = pAig->pManTime; pAig->pManTime = NULL;
-    pName = Aig_UtilStrsav( pAig->pName );
-    pSpec = Aig_UtilStrsav( pAig->pSpec );
-
-    // create guidence
-    vPios = Aig_ManOrderPios( pMan, pAig ); 
-    Aig_ManStop( pAig );
-
-    // reconstruct the network
-    pMan = Aig_ManDupDfsGuided( pTemp = pMan, vPios );
-    Aig_ManStop( pTemp );
-    Vec_PtrFree( vPios );
-
-    // reset levels
-    pMan->pManTime = pManTime;
-    Aig_ManChoiceLevel( pMan );
-
-    // copy names
-    ABC_FREE( pMan->pName );
-    ABC_FREE( pMan->pSpec );
-    pMan->pName = pName;
-    pMan->pSpec = pSpec;
-    return pMan;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reproduces script "compress2".]
-
-  Description [Consumes the input AIG to reduce memory usage.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dar_ManChoiceNew( Aig_Man_t * pAig, Dch_Pars_t * pPars )
-{
-    extern Aig_Man_t * Cec_ComputeChoices( Gia_Man_t * pGia, Dch_Pars_t * pPars );
-//    extern Aig_Man_t * Dch_DeriveTotalAig( Vec_Ptr_t * vAigs );
-    extern Aig_Man_t * Dch_ComputeChoices( Aig_Man_t * pAig, Dch_Pars_t * pPars );
-    int fVerbose = pPars->fVerbose;
-    Aig_Man_t * pMan, * pTemp;
-    Gia_Man_t * pGia;
-    Vec_Ptr_t * vPios;
-    void * pManTime;
-    char * pName, * pSpec;
-    int clk;
-
-    // save useful things
-    pManTime = pAig->pManTime; pAig->pManTime = NULL;
-    pName = Aig_UtilStrsav( pAig->pName );
-    pSpec = Aig_UtilStrsav( pAig->pSpec );
-
-    // perform synthesis
-clk = clock();
-    pGia = Dar_NewChoiceSynthesis( Aig_ManDupDfs(pAig), 1, 1, pPars->fPower, pPars->fLightSynth, pPars->fVerbose );
-pPars->timeSynth = clock() - clk;
-
-    // perform choice computation
-    if ( pPars->fUseGia )
-        pMan = Cec_ComputeChoices( pGia, pPars );
-    else
-    {
-        pMan = Gia_ManToAigSkip( pGia, 3 );
-        Gia_ManStop( pGia );
-        pMan = Dch_ComputeChoices( pTemp = pMan, pPars );
-        Aig_ManStop( pTemp );
-    }
-
-    // create guidence
-    vPios = Aig_ManOrderPios( pMan, pAig ); 
-    Aig_ManStop( pAig );
-
-    // reconstruct the network
-    pMan = Aig_ManDupDfsGuided( pTemp = pMan, vPios );
-    Aig_ManStop( pTemp );
-    Vec_PtrFree( vPios );
-
-    // reset levels
-    pMan->pManTime = pManTime;
-    Aig_ManChoiceLevel( pMan );
-
-    // copy names
-    ABC_FREE( pMan->pName );
-    ABC_FREE( pMan->pSpec );
-    pMan->pName = pName;
-    pMan->pSpec = pSpec;
-    return pMan;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dar/dar_.c b/src/aig/dar/dar_.c
deleted file mode 100644
index 323abed2..00000000
--- a/src/aig/dar/dar_.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dar_.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: dar_.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "darInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dar/module.make b/src/aig/dar/module.make
deleted file mode 100644
index b1b0332c..00000000
--- a/src/aig/dar/module.make
+++ /dev/null
@@ -1,10 +0,0 @@
-SRC +=    src/aig/dar/darBalance.c \
-    src/aig/dar/darCore.c \
-    src/aig/dar/darCut.c \
-    src/aig/dar/darData.c \
-    src/aig/dar/darLib.c \
-    src/aig/dar/darMan.c \
-    src/aig/dar/darPrec.c \
-    src/aig/dar/darRefact.c \
-    src/aig/dar/darResub.c \
-    src/aig/dar/darScript.c
diff --git a/src/aig/dch/dch.h b/src/aig/dch/dch.h
deleted file mode 100644
index 69f340e5..00000000
--- a/src/aig/dch/dch.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dch.h] 
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Choice computation for tech-mapping.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 29, 2008.]
-
-  Revision    [$Id: dch.h,v 1.00 2008/07/29 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __DCH_H__
-#define __DCH_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-// choicing parameters
-typedef struct Dch_Pars_t_ Dch_Pars_t;
-struct Dch_Pars_t_
-{
-    int              nWords;        // the number of simulation words
-    int              nBTLimit;      // conflict limit at a node
-    int              nSatVarMax;    // the max number of SAT variables
-    int              fSynthesis;    // set to 1 to perform synthesis
-    int              fPolarFlip;    // uses polarity adjustment
-    int              fSimulateTfo;  // uses simulation of TFO classes
-    int              fPower;        // uses power-aware rewriting
-    int              fUseGia;       // uses GIA package 
-    int              fUseCSat;      // uses circuit-based solver
-    int              fLightSynth;   // uses lighter version of synthesis
-    int              fVerbose;      // verbose stats
-    int              timeSynth;     // synthesis runtime
-    int              nNodesAhead;   // the lookahead in terms of nodes
-    int              nCallsRecycle; // calls to perform before recycling SAT solver
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== dchAig.c ==========================================================*/
-extern Aig_Man_t *   Dch_DeriveTotalAig( Vec_Ptr_t * vAigs );
-/*=== dchCore.c ==========================================================*/
-extern void          Dch_ManSetDefaultParams( Dch_Pars_t * p );
-extern int           Dch_ManReadVerbose( Dch_Pars_t * p );
-extern Aig_Man_t *   Dch_ComputeChoices( Aig_Man_t * pAig, Dch_Pars_t * pPars );
-extern void          Dch_ComputeEquivalences( Aig_Man_t * pAig, Dch_Pars_t * pPars );
-/*=== dchScript.c ==========================================================*/
-extern Aig_Man_t *   Dar_ManChoiceNew( Aig_Man_t * pAig, Dch_Pars_t * pPars );
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/dch/dchAig.c b/src/aig/dch/dchAig.c
deleted file mode 100644
index 91a00c63..00000000
--- a/src/aig/dch/dchAig.c
+++ /dev/null
@@ -1,119 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dchAig.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Choice computation for tech-mapping.]
-
-  Synopsis    [AIG manipulation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 29, 2008.]
-
-  Revision    [$Id: dchAig.c,v 1.00 2008/07/29 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "dchInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the cumulative AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_DeriveTotalAig_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
-{
-    if ( pObj->pData )
-        return;
-    Dch_DeriveTotalAig_rec( p, Aig_ObjFanin0(pObj) );
-    Dch_DeriveTotalAig_rec( p, Aig_ObjFanin1(pObj) );
-    pObj->pData = Aig_And( p, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the cumulative AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dch_DeriveTotalAig( Vec_Ptr_t * vAigs )
-{
-    Aig_Man_t * pAig, * pAig2, * pAigTotal;
-    Aig_Obj_t * pObj, * pObjPi, * pObjPo;
-    int i, k, nNodes;
-    assert( Vec_PtrSize(vAigs) > 0 );
-    // make sure they have the same number of PIs/POs
-    nNodes = 0;
-    pAig = (Aig_Man_t *)Vec_PtrEntry( vAigs, 0 );
-    Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig2, i )
-    {
-        assert( Aig_ManPiNum(pAig) == Aig_ManPiNum(pAig2) );
-        assert( Aig_ManPoNum(pAig) == Aig_ManPoNum(pAig2) );
-        nNodes += Aig_ManNodeNum(pAig2);
-        Aig_ManCleanData( pAig2 );
-    }
-    // map constant nodes
-    pAigTotal = Aig_ManStart( nNodes );
-    Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig2, k )
-        Aig_ManConst1(pAig2)->pData = Aig_ManConst1(pAigTotal);
-    // map primary inputs
-    Aig_ManForEachPi( pAig, pObj, i )
-    {
-        pObjPi = Aig_ObjCreatePi( pAigTotal );
-        Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig2, k )
-            Aig_ManPi( pAig2, i )->pData = pObjPi;
-    }
-    // construct the AIG in the order of POs
-    Aig_ManForEachPo( pAig, pObj, i )
-    {
-        Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pAig2, k )
-        {
-            pObjPo = Aig_ManPo( pAig2, i );
-            Dch_DeriveTotalAig_rec( pAigTotal, Aig_ObjFanin0(pObjPo) );
-        }
-        Aig_ObjCreatePo( pAigTotal, Aig_ObjChild0Copy(pObj) );
-    }
-/*
-    // mark the cone of the first AIG
-    Aig_ManIncrementTravId( pAigTotal );
-    Aig_ManForEachObj( pAig, pObj, i )
-        if ( pObj->pData ) 
-            Aig_ObjSetTravIdCurrent( pAigTotal, pObj->pData );
-*/
-    // cleanup should not be done
-    return pAigTotal;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dch/dchChoice.c b/src/aig/dch/dchChoice.c
deleted file mode 100644
index 1772f8aa..00000000
--- a/src/aig/dch/dchChoice.c
+++ /dev/null
@@ -1,508 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dchChoice.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Choice computation for tech-mapping.]
-
-  Synopsis    [Contrustion of choices.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 29, 2008.]
-
-  Revision    [$Id: dchChoice.c,v 1.00 2008/07/29 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "dchInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of representatives.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_DeriveChoiceCountReprs( Aig_Man_t * pAig )
-{
-    Aig_Obj_t * pObj, * pRepr;
-    int i, nReprs = 0;
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        pRepr = Aig_ObjRepr( pAig, pObj );
-        if ( pRepr == NULL )
-            continue;
-        assert( pRepr->Id < pObj->Id );
-        nReprs++;
-    }
-    return nReprs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of equivalences.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_DeriveChoiceCountEquivs( Aig_Man_t * pAig )
-{
-    Aig_Obj_t * pObj, * pTemp, * pPrev;
-    int i, nEquivs = 0, Counter = 0;
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        if ( !Aig_ObjIsChoice(pAig, pObj) )
-            continue;
-        for ( pPrev = pObj, pTemp = Aig_ObjEquiv(pAig, pObj); pTemp; 
-              pPrev = pTemp, pTemp = Aig_ObjEquiv(pAig, pTemp) )
-        {
-            if ( pTemp->nRefs > 0 )
-            {
-                // remove referenced node from equivalence class
-                assert( pAig->pEquivs[pPrev->Id] == pTemp );
-                pAig->pEquivs[pPrev->Id] = pAig->pEquivs[pTemp->Id];
-                pAig->pEquivs[pTemp->Id] = NULL;
-                // how about the need to continue iterating over the list?
-                // pPrev = pTemp ???
-                Counter++;
-            }
-            nEquivs++;
-        }
-    }
-//    printf( "Removed %d classes.\n", Counter );
-
-    if ( Counter )
-        Dch_DeriveChoiceCountEquivs( pAig );
-//    if ( Counter )
-//    printf( "Removed %d equiv nodes because of non-zero ref counter.\n", Counter );
-    return nEquivs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the choice node of pRepr is in the TFI of pObj.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_ObjCheckTfi_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
-{
-    // check the trivial cases
-    if ( pObj == NULL )
-        return 0;
-    if ( Aig_ObjIsPi(pObj) )
-        return 0;
-    if ( pObj->fMarkA )
-        return 1;
-    // skip the visited node
-    if ( Aig_ObjIsTravIdCurrent( p, pObj ) )
-        return 0;
-    Aig_ObjSetTravIdCurrent( p, pObj );
-    // check the children
-    if ( Dch_ObjCheckTfi_rec( p, Aig_ObjFanin0(pObj) ) )
-        return 1;
-    if ( Dch_ObjCheckTfi_rec( p, Aig_ObjFanin1(pObj) ) )
-        return 1;
-    // check equivalent nodes
-    return Dch_ObjCheckTfi_rec( p, Aig_ObjEquiv(p, pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the choice node of pRepr is in the TFI of pObj.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_ObjCheckTfi( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pRepr )
-{
-    Aig_Obj_t * pTemp;
-    int RetValue;
-    assert( !Aig_IsComplement(pObj) );
-    assert( !Aig_IsComplement(pRepr) );
-    // mark nodes of the choice node
-    for ( pTemp = pRepr; pTemp; pTemp = Aig_ObjEquiv(p, pTemp) )
-        pTemp->fMarkA = 1;
-    // traverse the new node
-    Aig_ManIncrementTravId( p );
-    RetValue = Dch_ObjCheckTfi_rec( p, pObj );
-    // unmark nodes of the choice node
-    for ( pTemp = pRepr; pTemp; pTemp = Aig_ObjEquiv(p, pTemp) )
-        pTemp->fMarkA = 0;
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns representatives of fanin in approapriate polarity.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Aig_Obj_t * Aig_ObjGetRepr( Aig_Man_t * p, Aig_Obj_t * pObj )
-{
-    Aig_Obj_t * pRepr;
-    if ( (pRepr = Aig_ObjRepr(p, Aig_Regular(pObj))) )
-        return Aig_NotCond( pRepr, Aig_Regular(pObj)->fPhase ^ pRepr->fPhase ^ Aig_IsComplement(pObj) );
-    return pObj;
-}
-
-static inline Aig_Obj_t * Aig_ObjChild0CopyRepr( Aig_Man_t * p, Aig_Obj_t * pObj ) { return Aig_ObjGetRepr( p, Aig_ObjChild0Copy(pObj) ); }
-static inline Aig_Obj_t * Aig_ObjChild1CopyRepr( Aig_Man_t * p, Aig_Obj_t * pObj ) { return Aig_ObjGetRepr( p, Aig_ObjChild1Copy(pObj) ); }
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the AIG with choices from representatives.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_DeriveChoiceAigNode( Aig_Man_t * pAigNew, Aig_Man_t * pAigOld, Aig_Obj_t * pObj )
-{
-    Aig_Obj_t * pRepr, * pObjNew, * pReprNew;
-    // get the new node
-    pObj->pData = Aig_And( pAigNew, 
-        Aig_ObjChild0CopyRepr(pAigNew, pObj), 
-        Aig_ObjChild1CopyRepr(pAigNew, pObj) );
-    pRepr = Aig_ObjRepr( pAigOld, pObj );
-    if ( pRepr == NULL )
-        return;
-    // get the corresponding new nodes
-    pObjNew  = Aig_Regular((Aig_Obj_t *)pObj->pData);
-    pReprNew = Aig_Regular((Aig_Obj_t *)pRepr->pData);
-    if ( pObjNew == pReprNew )
-        return;
-    // skip the earlier nodes
-    if ( pReprNew->Id > pObjNew->Id )
-        return;
-    assert( pReprNew->Id < pObjNew->Id );
-    // set the representatives
-    Aig_ObjSetRepr( pAigNew, pObjNew, pReprNew );
-    // skip used nodes
-    if ( pObjNew->nRefs > 0 )
-        return;
-    assert( pObjNew->nRefs == 0 );
-    // update new nodes of the object
-    if ( !Aig_ObjIsNode(pRepr) )
-        return;
-    // skip choices with combinational loops
-    if ( Dch_ObjCheckTfi( pAigNew, pObjNew, pReprNew ) )
-        return;
-    // add choice
-    pAigNew->pEquivs[pObjNew->Id]  = pAigNew->pEquivs[pReprNew->Id];
-    pAigNew->pEquivs[pReprNew->Id] = pObjNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the AIG with choices from representatives.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dch_DeriveChoiceAig_old( Aig_Man_t * pAig )
-{
-    Aig_Man_t * pChoices, * pTemp;
-    Aig_Obj_t * pObj;
-    int i;
-    // start recording equivalences
-    pChoices = Aig_ManStart( Aig_ManObjNumMax(pAig) );
-    pChoices->pEquivs = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
-    pChoices->pReprs  = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
-    // map constants and PIs
-    Aig_ManCleanData( pAig );
-    Aig_ManConst1(pAig)->pData = Aig_ManConst1(pChoices);
-    Aig_ManForEachPi( pAig, pObj, i )
-        pObj->pData = Aig_ObjCreatePi( pChoices );
-    // construct choices for the internal nodes
-    assert( pAig->pReprs != NULL );
-    Aig_ManForEachNode( pAig, pObj, i )
-        Dch_DeriveChoiceAigNode( pChoices, pAig, pObj );
-    Aig_ManForEachPo( pAig, pObj, i )
-        Aig_ObjCreatePo( pChoices, Aig_ObjChild0CopyRepr(pChoices, pObj) );
-    Dch_DeriveChoiceCountEquivs( pChoices );
-    // there is no need for cleanup
-    ABC_FREE( pChoices->pReprs );
-    pChoices = Aig_ManDupDfs( pTemp = pChoices );
-    Aig_ManStop( pTemp );
-    return pChoices;
-}
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Checks for combinational loops in the AIG.]
-
-  Description [Returns 1 if combinational loop is detected.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Aig_ManCheckAcyclic_rec( Aig_Man_t * p, Aig_Obj_t * pNode, int fVerbose )
-{
-    Aig_Obj_t * pFanin;
-    int fAcyclic;
-    if ( Aig_ObjIsPi(pNode) || Aig_ObjIsConst1(pNode) )
-        return 1;
-    assert( Aig_ObjIsNode(pNode) );
-    // make sure the node is not visited
-    assert( !Aig_ObjIsTravIdPrevious(p, pNode) );
-    // check if the node is part of the combinational loop
-    if ( Aig_ObjIsTravIdCurrent(p, pNode) )
-    {
-        if ( fVerbose )
-            Abc_Print( 1, "Network \"%s\" contains combinational loop!\n", p->pSpec? p->pSpec : NULL );
-        if ( fVerbose )
-        Abc_Print( 1, "Node \"%d\" is encountered twice on the following path to the COs:\n", Aig_ObjId(pNode) );
-        return 0;
-    }
-    // mark this node as a node on the current path
-    Aig_ObjSetTravIdCurrent( p, pNode );
-
-    // visit the transitive fanin
-    pFanin = Aig_ObjFanin0(pNode);
-    // check if the fanin is visited
-    if ( !Aig_ObjIsTravIdPrevious(p, pFanin) ) 
-    {
-        // traverse the fanin's cone searching for the loop
-        if ( !(fAcyclic = Aig_ManCheckAcyclic_rec(p, pFanin, fVerbose)) )
-        {
-            // return as soon as the loop is detected
-            if ( fVerbose )
-            Abc_Print( 1, " %d ->", Aig_ObjId(pFanin) );
-            return 0;
-        }
-    }
-
-    // visit the transitive fanin
-    pFanin = Aig_ObjFanin1(pNode);
-    // check if the fanin is visited
-    if ( !Aig_ObjIsTravIdPrevious(p, pFanin) ) 
-    {
-        // traverse the fanin's cone searching for the loop
-        if ( !(fAcyclic = Aig_ManCheckAcyclic_rec(p, pFanin, fVerbose)) )
-        {
-            // return as soon as the loop is detected
-            if ( fVerbose )
-            Abc_Print( 1, " %d ->", Aig_ObjId(pFanin) );
-            return 0;
-        }
-    }
-
-    // visit choices
-    if ( Aig_ObjRepr(p, pNode) == NULL && Aig_ObjEquiv(p, pNode) != NULL )
-    {
-        for ( pFanin = Aig_ObjEquiv(p, pNode); pFanin; pFanin = Aig_ObjEquiv(p, pFanin) )
-        {
-            // check if the fanin is visited
-            if ( Aig_ObjIsTravIdPrevious(p, pFanin) ) 
-                continue;
-            // traverse the fanin's cone searching for the loop
-            if ( (fAcyclic = Aig_ManCheckAcyclic_rec(p, pFanin, fVerbose)) )
-                continue;
-            // return as soon as the loop is detected
-            if ( fVerbose )
-            Abc_Print( 1, " %d", Aig_ObjId(pFanin) );
-            if ( fVerbose )
-            Abc_Print( 1, " (choice of %d) -> ", Aig_ObjId(pNode) );
-            return 0;
-        }
-    }
-    // mark this node as a visited node
-    Aig_ObjSetTravIdPrevious( p, pNode );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks for combinational loops in the AIG.]
-
-  Description [Returns 1 if there is no combinational loops.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Aig_ManCheckAcyclic( Aig_Man_t * p, int fVerbose )
-{
-    Aig_Obj_t * pNode;
-    int fAcyclic;
-    int i;
-    // set the traversal ID for this DFS ordering
-    Aig_ManIncrementTravId( p );   
-    Aig_ManIncrementTravId( p );   
-    // pNode->TravId == pNet->nTravIds      means "pNode is on the path"
-    // pNode->TravId == pNet->nTravIds - 1  means "pNode is visited but is not on the path"
-    // pNode->TravId <  pNet->nTravIds - 1  means "pNode is not visited"
-    // traverse the network to detect cycles
-    fAcyclic = 1;
-    Aig_ManForEachPo( p, pNode, i )
-    {
-        pNode = Aig_ObjFanin0(pNode);
-        if ( Aig_ObjIsTravIdPrevious(p, pNode) )
-            continue;
-        // traverse the output logic cone
-        if ( (fAcyclic = Aig_ManCheckAcyclic_rec(p, pNode, fVerbose)) )
-            continue;
-        // stop as soon as the first loop is detected
-        if ( fVerbose )
-        Abc_Print( 1, " CO %d\n", i );
-        break;
-    }
-    return fAcyclic;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes combinational loop.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Aig_ManFixLoopProblem( Aig_Man_t * p, int fVerbose )
-{
-    Aig_Obj_t * pObj;
-    int i, Counter = 0, Counter2 = 0;
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        if ( !Aig_ObjIsTravIdCurrent(p, pObj) )
-            continue;
-        Counter2++;
-        if ( Aig_ObjRepr(p, pObj) == NULL && Aig_ObjEquiv(p, pObj) != NULL )
-        {
-            Aig_ObjSetEquiv(p, pObj, NULL);
-            Counter++;
-        }
-    }
-    if ( fVerbose )
-    Abc_Print( 1, "Fixed %d choice nodes on the path with %d objects.\n", Counter, Counter2 );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the AIG with choices from representatives.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dch_DeriveChoiceAigInt( Aig_Man_t * pAig )
-{
-    Aig_Man_t * pChoices;
-    Aig_Obj_t * pObj;
-    int i;
-    // start recording equivalences
-    pChoices = Aig_ManStart( Aig_ManObjNumMax(pAig) );
-    pChoices->pEquivs = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
-    pChoices->pReprs  = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
-    // map constants and PIs
-    Aig_ManCleanData( pAig );
-    Aig_ManConst1(pAig)->pData = Aig_ManConst1(pChoices);
-    Aig_ManForEachPi( pAig, pObj, i )
-        pObj->pData = Aig_ObjCreatePi( pChoices );
-    // construct choices for the internal nodes
-    assert( pAig->pReprs != NULL );
-    Aig_ManForEachNode( pAig, pObj, i )
-        Dch_DeriveChoiceAigNode( pChoices, pAig, pObj );
-    Aig_ManForEachPo( pAig, pObj, i )
-        Aig_ObjCreatePo( pChoices, Aig_ObjChild0CopyRepr(pChoices, pObj) );
-    Dch_DeriveChoiceCountEquivs( pChoices );
-    Aig_ManSetRegNum( pChoices, Aig_ManRegNum(pAig) );
-    return pChoices;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the AIG with choices from representatives.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dch_DeriveChoiceAig( Aig_Man_t * pAig )
-{
-    extern int Aig_ManCheckAcyclic( Aig_Man_t * pAig, int fVerbose );
-    Aig_Man_t * pChoices, * pTemp;
-    int fVerbose = 0;
-    pChoices = Dch_DeriveChoiceAigInt( pAig );
-//    pChoices = Dch_DeriveChoiceAigInt( pTemp = pChoices );
-//    Aig_ManStop( pTemp );
-    // there is no need for cleanup
-    ABC_FREE( pChoices->pReprs );
-    while ( !Aig_ManCheckAcyclic( pChoices, fVerbose ) )
-    {
-        if ( fVerbose )
-        Abc_Print( 1, "There is a loop!\n" );
-        Aig_ManFixLoopProblem( pChoices, fVerbose );
-    }
-    pChoices = Aig_ManDupDfs( pTemp = pChoices );
-    Aig_ManStop( pTemp );
-    return pChoices;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dch/dchClass.c b/src/aig/dch/dchClass.c
deleted file mode 100644
index 83a3bc2e..00000000
--- a/src/aig/dch/dchClass.c
+++ /dev/null
@@ -1,611 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dchClass.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Choice computation for tech-mapping.]
-
-  Synopsis    [Representation of candidate equivalence classes.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 29, 2008.]
-
-  Revision    [$Id: dchClass.c,v 1.00 2008/07/29 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "dchInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-/*
-    The candidate equivalence classes are stored as a vector of pointers 
-    to the array of pointers to the nodes in each class.
-    The first node of the class is its representative node.
-    The representative has the smallest topological order among the class nodes.
-    The nodes inside each class are ordered according to their topological order.
-    The classes are ordered according to the topo order of their representatives.
-*/
-
-// internal representation of candidate equivalence classes
-struct Dch_Cla_t_
-{
-    // class information
-    Aig_Man_t *      pAig;             // original AIG manager
-    Aig_Obj_t ***    pId2Class;        // non-const classes by ID of repr node
-    int *            pClassSizes;      // sizes of each equivalence class
-    // statistics
-    int              nClasses;         // the total number of non-const classes
-    int              nCands1;          // the total number of const candidates
-    int              nLits;            // the number of literals in all classes
-    // memory
-    Aig_Obj_t **     pMemClasses;      // memory allocated for equivalence classes
-    Aig_Obj_t **     pMemClassesFree;  // memory allocated for equivalence classes to be used
-    // temporary data
-    Vec_Ptr_t *      vClassOld;        // old equivalence class after splitting
-    Vec_Ptr_t *      vClassNew;        // new equivalence class(es) after splitting
-    // procedures used for class refinement
-    void *           pManData;
-    unsigned (*pFuncNodeHash) (void *,Aig_Obj_t *);              // returns hash key of the node
-    int (*pFuncNodeIsConst)   (void *,Aig_Obj_t *);              // returns 1 if the node is a constant
-    int (*pFuncNodesAreEqual) (void *,Aig_Obj_t *, Aig_Obj_t *); // returns 1 if nodes are equal up to a complement
-};
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static inline Aig_Obj_t *  Dch_ObjNext( Aig_Obj_t ** ppNexts, Aig_Obj_t * pObj )                       { return ppNexts[pObj->Id];  }
-static inline void         Dch_ObjSetNext( Aig_Obj_t ** ppNexts, Aig_Obj_t * pObj, Aig_Obj_t * pNext ) { ppNexts[pObj->Id] = pNext; }
-
-// iterator through the equivalence classes
-#define Dch_ManForEachClass( p, ppClass, i )                 \
-    for ( i = 0; i < Aig_ManObjNumMax(p->pAig); i++ )        \
-        if ( ((ppClass) = p->pId2Class[i]) == NULL ) {} else
-// iterator through the nodes in one class
-#define Dch_ClassForEachNode( p, pRepr, pNode, i )           \
-    for ( i = 0; i < p->pClassSizes[pRepr->Id]; i++ )        \
-        if ( ((pNode) = p->pId2Class[pRepr->Id][i]) == NULL ) {} else
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates one equivalence class.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Dch_ObjAddClass( Dch_Cla_t * p, Aig_Obj_t * pRepr, Aig_Obj_t ** pClass, int nSize ) 
-{
-    assert( p->pId2Class[pRepr->Id] == NULL );
-    p->pId2Class[pRepr->Id] = pClass; 
-    assert( p->pClassSizes[pRepr->Id] == 0 );
-    assert( nSize > 1 );
-    p->pClassSizes[pRepr->Id] = nSize;
-    p->nClasses++;
-    p->nLits += nSize - 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes one equivalence class.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Aig_Obj_t ** Dch_ObjRemoveClass( Dch_Cla_t * p, Aig_Obj_t * pRepr ) 
-{
-    Aig_Obj_t ** pClass = p->pId2Class[pRepr->Id];
-    int nSize;
-    assert( pClass != NULL );
-    p->pId2Class[pRepr->Id] = NULL; 
-    nSize = p->pClassSizes[pRepr->Id];
-    assert( nSize > 1 );
-    p->nClasses--;
-    p->nLits -= nSize - 1;
-    p->pClassSizes[pRepr->Id] = 0;
-    return pClass;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Dch_Cla_t * Dch_ClassesStart( Aig_Man_t * pAig )
-{
-    Dch_Cla_t * p;
-    p = ABC_ALLOC( Dch_Cla_t, 1 );
-    memset( p, 0, sizeof(Dch_Cla_t) );
-    p->pAig         = pAig;
-    p->pId2Class    = ABC_CALLOC( Aig_Obj_t **, Aig_ManObjNumMax(pAig) );
-    p->pClassSizes  = ABC_CALLOC( int, Aig_ManObjNumMax(pAig) );
-    p->vClassOld    = Vec_PtrAlloc( 100 );
-    p->vClassNew    = Vec_PtrAlloc( 100 );
-    assert( pAig->pReprs == NULL );
-    Aig_ManReprStart( pAig, Aig_ManObjNumMax(pAig) );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ClassesSetData( Dch_Cla_t * p, void * pManData, 
-    unsigned (*pFuncNodeHash)(void *,Aig_Obj_t *),               // returns hash key of the node
-    int (*pFuncNodeIsConst)(void *,Aig_Obj_t *),                 // returns 1 if the node is a constant
-    int (*pFuncNodesAreEqual)(void *,Aig_Obj_t *, Aig_Obj_t *) ) // returns 1 if nodes are equal up to a complement
-{
-    p->pManData           = pManData;
-    p->pFuncNodeHash      = pFuncNodeHash;
-    p->pFuncNodeIsConst   = pFuncNodeIsConst;
-    p->pFuncNodesAreEqual = pFuncNodesAreEqual;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stop representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ClassesStop( Dch_Cla_t * p )
-{
-    if ( p->vClassNew )    Vec_PtrFree( p->vClassNew );
-    if ( p->vClassOld )    Vec_PtrFree( p->vClassOld );
-    ABC_FREE( p->pId2Class );
-    ABC_FREE( p->pClassSizes );
-    ABC_FREE( p->pMemClasses );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stop representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_ClassesLitNum( Dch_Cla_t * p )
-{
-    return p->nLits;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stop representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t ** Dch_ClassesReadClass( Dch_Cla_t * p, Aig_Obj_t * pRepr, int * pnSize )
-{
-    assert( p->pId2Class[pRepr->Id] != NULL );
-    assert( p->pClassSizes[pRepr->Id] > 1 );
-    *pnSize = p->pClassSizes[pRepr->Id];
-    return p->pId2Class[pRepr->Id];
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks candidate equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ClassesCheck( Dch_Cla_t * p )
-{
-    Aig_Obj_t * pObj, * pPrev, ** ppClass;
-    int i, k, nLits, nClasses, nCands1;
-    nClasses = nLits = 0;
-    Dch_ManForEachClass( p, ppClass, k )
-    {
-        pPrev = NULL;
-        Dch_ClassForEachNode( p, ppClass[0], pObj, i )
-        {
-            if ( i == 0 )
-                assert( Aig_ObjRepr(p->pAig, pObj) == NULL );
-            else
-            {
-                assert( Aig_ObjRepr(p->pAig, pObj) == ppClass[0] );
-                assert( pPrev->Id < pObj->Id );
-                nLits++;
-            }
-            pPrev = pObj;
-        }
-        nClasses++;
-    }
-    nCands1 = 0;
-    Aig_ManForEachObj( p->pAig, pObj, i )
-        nCands1 += Dch_ObjIsConst1Cand( p->pAig, pObj );
-    assert( p->nLits == nLits );
-    assert( p->nCands1 == nCands1 );
-    assert( p->nClasses == nClasses );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints simulation classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ClassesPrintOne( Dch_Cla_t * p, Aig_Obj_t * pRepr )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Abc_Print( 1, "{ " );
-    Dch_ClassForEachNode( p, pRepr, pObj, i )
-        Abc_Print( 1, "%d(%d,%d) ", pObj->Id, pObj->Level, Aig_SupportSize(p->pAig,pObj) );
-    Abc_Print( 1, "}\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints simulation classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ClassesPrint( Dch_Cla_t * p, int fVeryVerbose )
-{
-    Aig_Obj_t ** ppClass;
-    Aig_Obj_t * pObj;
-    int i;
-    Abc_Print( 1, "Equivalence classes: Const1 = %5d. Class = %5d. Lit = %5d.\n", 
-        p->nCands1, p->nClasses, p->nLits );
-    if ( !fVeryVerbose )
-        return;
-    Abc_Print( 1, "Constants { " );
-    Aig_ManForEachObj( p->pAig, pObj, i )
-        if ( Dch_ObjIsConst1Cand( p->pAig, pObj ) )
-            Abc_Print( 1, "%d(%d,%d) ", pObj->Id, pObj->Level, Aig_SupportSize(p->pAig,pObj) );
-    Abc_Print( 1, "}\n" );
-    Dch_ManForEachClass( p, ppClass, i )
-    {
-        Abc_Print( 1, "%3d (%3d) : ", i, p->pClassSizes[i] );
-        Dch_ClassesPrintOne( p, ppClass[0] );
-    }
-    Abc_Print( 1, "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates initial simulation classes.]
-
-  Description [Assumes that simulation info is assigned.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ClassesPrepare( Dch_Cla_t * p, int fLatchCorr, int nMaxLevs )
-{
-    Aig_Obj_t ** ppTable, ** ppNexts, ** ppClassNew;
-    Aig_Obj_t * pObj, * pTemp, * pRepr;
-    int i, k, nTableSize, nNodes, iEntry, nEntries, nEntries2;
-
-    // allocate the hash table hashing simulation info into nodes
-    nTableSize = Aig_PrimeCudd( Aig_ManObjNumMax(p->pAig)/4 );
-    ppTable = ABC_CALLOC( Aig_Obj_t *, nTableSize ); 
-    ppNexts = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAig) ); 
-
-    // add all the nodes to the hash table
-    nEntries = 0;
-    Aig_ManForEachObj( p->pAig, pObj, i )
-    {
-        if ( fLatchCorr )
-        {
-            if ( !Aig_ObjIsPi(pObj) )
-                continue;
-        }
-        else
-        {
-            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
-                continue;
-            // skip the node with more that the given number of levels
-            if ( nMaxLevs && (int)pObj->Level >= nMaxLevs )
-                continue;
-        }
-        // check if the node belongs to the class of constant 1
-        if ( p->pFuncNodeIsConst( p->pManData, pObj ) )
-        {
-            Dch_ObjSetConst1Cand( p->pAig, pObj );
-            p->nCands1++;
-            continue;
-        }
-        // hash the node by its simulation info
-        iEntry = p->pFuncNodeHash( p->pManData, pObj ) % nTableSize;
-        // add the node to the class
-        if ( ppTable[iEntry] == NULL )
-            ppTable[iEntry] = pObj;
-        else
-        {
-            // set the representative of this node
-            pRepr = ppTable[iEntry];
-            Aig_ObjSetRepr( p->pAig, pObj, pRepr );
-            // add node to the table
-            if ( Dch_ObjNext( ppNexts, pRepr ) == NULL )
-            { // this will be the second entry
-                p->pClassSizes[pRepr->Id]++;
-                nEntries++;
-            }
-            // add the entry to the list
-            Dch_ObjSetNext( ppNexts, pObj, Dch_ObjNext( ppNexts, pRepr ) );
-            Dch_ObjSetNext( ppNexts, pRepr, pObj );
-            p->pClassSizes[pRepr->Id]++;
-            nEntries++;
-        }
-    }
-
-    // allocate room for classes
-    p->pMemClasses = ABC_ALLOC( Aig_Obj_t *, nEntries + p->nCands1 );
-    p->pMemClassesFree = p->pMemClasses + nEntries;
- 
-    // copy the entries into storage in the topological order
-    nEntries2 = 0;
-    Aig_ManForEachObj( p->pAig, pObj, i )
-    {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
-            continue;
-        nNodes = p->pClassSizes[pObj->Id];
-        // skip the nodes that are not representatives of non-trivial classes
-        if ( nNodes == 0 )
-            continue;
-        assert( nNodes > 1 );
-        // add the nodes to the class in the topological order
-        ppClassNew = p->pMemClasses + nEntries2;
-        ppClassNew[0] = pObj;
-        for ( pTemp = Dch_ObjNext(ppNexts, pObj), k = 1; pTemp; 
-              pTemp = Dch_ObjNext(ppNexts, pTemp), k++ )
-        {
-            ppClassNew[nNodes-k] = pTemp;
-        }
-        // add the class of nodes
-        p->pClassSizes[pObj->Id] = 0;
-        Dch_ObjAddClass( p, pObj, ppClassNew, nNodes );
-        // increment the number of entries
-        nEntries2 += nNodes;
-    }
-    assert( nEntries == nEntries2 );
-    ABC_FREE( ppTable );
-    ABC_FREE( ppNexts );
-    // now it is time to refine the classes
-    Dch_ClassesRefine( p );
-    Dch_ClassesCheck( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Iteratively refines the classes after simulation.]
-
-  Description [Returns the number of refinements performed.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_ClassesRefineOneClass( Dch_Cla_t * p, Aig_Obj_t * pReprOld, int fRecursive )
-{
-    Aig_Obj_t ** pClassOld, ** pClassNew;
-    Aig_Obj_t * pObj, * pReprNew;
-    int i;
-
-    // split the class
-    Vec_PtrClear( p->vClassOld );
-    Vec_PtrClear( p->vClassNew );
-    Dch_ClassForEachNode( p, pReprOld, pObj, i )
-        if ( p->pFuncNodesAreEqual(p->pManData, pReprOld, pObj) )
-            Vec_PtrPush( p->vClassOld, pObj );
-        else
-            Vec_PtrPush( p->vClassNew, pObj );
-    // check if splitting happened
-    if ( Vec_PtrSize(p->vClassNew) == 0 )
-        return 0;
-
-    // get the new representative
-    pReprNew = (Aig_Obj_t *)Vec_PtrEntry( p->vClassNew, 0 );
-    assert( Vec_PtrSize(p->vClassOld) > 0 );
-    assert( Vec_PtrSize(p->vClassNew) > 0 );
-
-    // create old class
-    pClassOld = Dch_ObjRemoveClass( p, pReprOld );
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassOld, pObj, i )
-    {
-        pClassOld[i] = pObj;
-        Aig_ObjSetRepr( p->pAig, pObj, i? pReprOld : NULL );
-    }
-    // create new class
-    pClassNew = pClassOld + i;
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassNew, pObj, i )
-    {
-        pClassNew[i] = pObj;
-        Aig_ObjSetRepr( p->pAig, pObj, i? pReprNew : NULL );
-    }
-
-    // put classes back
-    if ( Vec_PtrSize(p->vClassOld) > 1 )
-        Dch_ObjAddClass( p, pReprOld, pClassOld, Vec_PtrSize(p->vClassOld) );
-    if ( Vec_PtrSize(p->vClassNew) > 1 )
-        Dch_ObjAddClass( p, pReprNew, pClassNew, Vec_PtrSize(p->vClassNew) );
-
-    // check if the class should be recursively refined
-    if ( fRecursive && Vec_PtrSize(p->vClassNew) > 1 )
-        return 1 + Dch_ClassesRefineOneClass( p, pReprNew, 1 );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Refines the classes after simulation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_ClassesRefine( Dch_Cla_t * p )
-{
-    Aig_Obj_t ** ppClass;
-    int i, nRefis = 0;
-    Dch_ManForEachClass( p, ppClass, i )
-        nRefis += Dch_ClassesRefineOneClass( p, ppClass[0], 0 );
-    return nRefis;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns equivalence class of the given node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ClassesCollectOneClass( Dch_Cla_t * p, Aig_Obj_t * pRepr, Vec_Ptr_t * vRoots )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Vec_PtrClear( vRoots );
-    Dch_ClassForEachNode( p, pRepr, pObj, i )
-        Vec_PtrPush( vRoots, pObj );
-    assert( Vec_PtrSize(vRoots) > 1 ); 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns equivalence class of the given node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ClassesCollectConst1Group( Dch_Cla_t * p, Aig_Obj_t * pObj, int nNodes, Vec_Ptr_t * vRoots )
-{
-    int i, Limit;
-    Vec_PtrClear( vRoots );
-    Limit = ABC_MIN( pObj->Id + nNodes, Aig_ManObjNumMax(p->pAig) );
-    for ( i = pObj->Id; i < Limit; i++ )
-    {
-        pObj = Aig_ManObj( p->pAig, i );
-        if ( pObj && Dch_ObjIsConst1Cand( p->pAig, pObj ) )
-            Vec_PtrPush( vRoots, pObj );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Refine the group of constant 1 nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_ClassesRefineConst1Group( Dch_Cla_t * p, Vec_Ptr_t * vRoots, int fRecursive )
-{
-    Aig_Obj_t * pObj, * pReprNew, ** ppClassNew;
-    int i;
-    if ( Vec_PtrSize(vRoots) == 0 )
-        return 0;
-    // collect the nodes to be refined
-    Vec_PtrClear( p->vClassNew );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vRoots, pObj, i )
-        if ( !p->pFuncNodeIsConst( p->pManData, pObj ) )
-            Vec_PtrPush( p->vClassNew, pObj );
-    // check if there is a new class
-    if ( Vec_PtrSize(p->vClassNew) == 0 )
-        return 0;
-    p->nCands1 -= Vec_PtrSize(p->vClassNew);
-    pReprNew = (Aig_Obj_t *)Vec_PtrEntry( p->vClassNew, 0 );
-    Aig_ObjSetRepr( p->pAig, pReprNew, NULL );
-    if ( Vec_PtrSize(p->vClassNew) == 1 )
-        return 1;
-    // create a new class composed of these nodes
-    ppClassNew = p->pMemClassesFree;
-    p->pMemClassesFree += Vec_PtrSize(p->vClassNew);
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassNew, pObj, i )
-    {
-        ppClassNew[i] = pObj;
-        Aig_ObjSetRepr( p->pAig, pObj, i? pReprNew : NULL );
-    }
-    Dch_ObjAddClass( p, pReprNew, ppClassNew, Vec_PtrSize(p->vClassNew) );
-    // refine them recursively
-    if ( fRecursive )
-        return 1 + Dch_ClassesRefineOneClass( p, pReprNew, 1 );
-    return 1;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dch/dchCnf.c b/src/aig/dch/dchCnf.c
deleted file mode 100644
index 4175a123..00000000
--- a/src/aig/dch/dchCnf.c
+++ /dev/null
@@ -1,334 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dchCnf.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Choice computation for tech-mapping.]
-
-  Synopsis    [Computation of CNF.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 29, 2008.]
-
-  Revision    [$Id: dchCnf.c,v 1.00 2008/07/29 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "dchInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Addes clauses to the solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_AddClausesMux( Dch_Man_t * p, Aig_Obj_t * pNode )
-{
-    Aig_Obj_t * pNodeI, * pNodeT, * pNodeE;
-    int pLits[4], RetValue, VarF, VarI, VarT, VarE, fCompT, fCompE;
-
-    assert( !Aig_IsComplement( pNode ) );
-    assert( Aig_ObjIsMuxType( pNode ) );
-    // get nodes (I = if, T = then, E = else)
-    pNodeI = Aig_ObjRecognizeMux( pNode, &pNodeT, &pNodeE );
-    // get the variable numbers
-    VarF = Dch_ObjSatNum(p,pNode);
-    VarI = Dch_ObjSatNum(p,pNodeI);
-    VarT = Dch_ObjSatNum(p,Aig_Regular(pNodeT));
-    VarE = Dch_ObjSatNum(p,Aig_Regular(pNodeE));
-    // get the complementation flags
-    fCompT = Aig_IsComplement(pNodeT);
-    fCompE = Aig_IsComplement(pNodeE);
-
-    // f = ITE(i, t, e)
-
-    // i' + t' + f
-    // i' + t  + f'
-    // i  + e' + f
-    // i  + e  + f'
-
-    // create four clauses
-    pLits[0] = toLitCond(VarI, 1);
-    pLits[1] = toLitCond(VarT, 1^fCompT);
-    pLits[2] = toLitCond(VarF, 0);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pNodeI->fPhase )               pLits[0] = lit_neg( pLits[0] );
-        if ( Aig_Regular(pNodeT)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarI, 1);
-    pLits[1] = toLitCond(VarT, 0^fCompT);
-    pLits[2] = toLitCond(VarF, 1);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pNodeI->fPhase )               pLits[0] = lit_neg( pLits[0] );
-        if ( Aig_Regular(pNodeT)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarI, 0);
-    pLits[1] = toLitCond(VarE, 1^fCompE);
-    pLits[2] = toLitCond(VarF, 0);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pNodeI->fPhase )               pLits[0] = lit_neg( pLits[0] );
-        if ( Aig_Regular(pNodeE)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarI, 0);
-    pLits[1] = toLitCond(VarE, 0^fCompE);
-    pLits[2] = toLitCond(VarF, 1);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pNodeI->fPhase )               pLits[0] = lit_neg( pLits[0] );
-        if ( Aig_Regular(pNodeE)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-
-    // two additional clauses
-    // t' & e' -> f'
-    // t  & e  -> f 
-
-    // t  + e   + f'
-    // t' + e'  + f 
-
-    if ( VarT == VarE )
-    {
-//        assert( fCompT == !fCompE );
-        return;
-    }
-
-    pLits[0] = toLitCond(VarT, 0^fCompT);
-    pLits[1] = toLitCond(VarE, 0^fCompE);
-    pLits[2] = toLitCond(VarF, 1);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( Aig_Regular(pNodeT)->fPhase )  pLits[0] = lit_neg( pLits[0] );
-        if ( Aig_Regular(pNodeE)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarT, 1^fCompT);
-    pLits[1] = toLitCond(VarE, 1^fCompE);
-    pLits[2] = toLitCond(VarF, 0);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( Aig_Regular(pNodeT)->fPhase )  pLits[0] = lit_neg( pLits[0] );
-        if ( Aig_Regular(pNodeE)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Addes clauses to the solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_AddClausesSuper( Dch_Man_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSuper )
-{
-    Aig_Obj_t * pFanin;
-    int * pLits, nLits, RetValue, i;
-    assert( !Aig_IsComplement(pNode) );
-    assert( Aig_ObjIsNode( pNode ) );
-    // create storage for literals
-    nLits = Vec_PtrSize(vSuper) + 1;
-    pLits = ABC_ALLOC( int, nLits );
-    // suppose AND-gate is A & B = C
-    // add !A => !C   or   A + !C
-    Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pFanin, i )
-    {
-        pLits[0] = toLitCond(Dch_ObjSatNum(p,Aig_Regular(pFanin)), Aig_IsComplement(pFanin));
-        pLits[1] = toLitCond(Dch_ObjSatNum(p,pNode), 1);
-        if ( p->pPars->fPolarFlip )
-        {
-            if ( Aig_Regular(pFanin)->fPhase )  pLits[0] = lit_neg( pLits[0] );
-            if ( pNode->fPhase )                pLits[1] = lit_neg( pLits[1] );
-        }
-        RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-        assert( RetValue );
-    }
-    // add A & B => C   or   !A + !B + C
-    Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pFanin, i )
-    {
-        pLits[i] = toLitCond(Dch_ObjSatNum(p,Aig_Regular(pFanin)), !Aig_IsComplement(pFanin));
-        if ( p->pPars->fPolarFlip )
-        {
-            if ( Aig_Regular(pFanin)->fPhase )  pLits[i] = lit_neg( pLits[i] );
-        }
-    }
-    pLits[nLits-1] = toLitCond(Dch_ObjSatNum(p,pNode), 0);
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pNode->fPhase )  pLits[nLits-1] = lit_neg( pLits[nLits-1] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + nLits );
-    assert( RetValue );
-    ABC_FREE( pLits );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the supergate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_CollectSuper_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vSuper, int fFirst, int fUseMuxes )
-{
-    // if the new node is complemented or a PI, another gate begins
-    if ( Aig_IsComplement(pObj) || Aig_ObjIsPi(pObj) || 
-         (!fFirst && Aig_ObjRefs(pObj) > 1) || 
-         (fUseMuxes && Aig_ObjIsMuxType(pObj)) )
-    {
-        Vec_PtrPushUnique( vSuper, pObj );
-        return;
-    }
-    // go through the branches
-    Dch_CollectSuper_rec( Aig_ObjChild0(pObj), vSuper, 0, fUseMuxes );
-    Dch_CollectSuper_rec( Aig_ObjChild1(pObj), vSuper, 0, fUseMuxes );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the supergate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_CollectSuper( Aig_Obj_t * pObj, int fUseMuxes, Vec_Ptr_t * vSuper )
-{
-    assert( !Aig_IsComplement(pObj) );
-    assert( !Aig_ObjIsPi(pObj) );
-    Vec_PtrClear( vSuper );
-    Dch_CollectSuper_rec( pObj, vSuper, 1, fUseMuxes );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the solver clause database.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ObjAddToFrontier( Dch_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vFrontier )
-{
-    assert( !Aig_IsComplement(pObj) );
-    if ( Dch_ObjSatNum(p,pObj) )
-        return;
-    assert( Dch_ObjSatNum(p,pObj) == 0 );
-    if ( Aig_ObjIsConst1(pObj) )
-        return;
-    Vec_PtrPush( p->vUsedNodes, pObj );
-    Dch_ObjSetSatNum( p, pObj, p->nSatVars++ );
-    if ( Aig_ObjIsNode(pObj) )
-        Vec_PtrPush( vFrontier, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the solver clause database.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_CnfNodeAddToSolver( Dch_Man_t * p, Aig_Obj_t * pObj )
-{ 
-    Vec_Ptr_t * vFrontier;
-    Aig_Obj_t * pNode, * pFanin;
-    int i, k, fUseMuxes = 1;
-    // quit if CNF is ready
-    if ( Dch_ObjSatNum(p,pObj) )
-        return;
-    // start the frontier
-    vFrontier = Vec_PtrAlloc( 100 );
-    Dch_ObjAddToFrontier( p, pObj, vFrontier );
-    // explore nodes in the frontier
-    Vec_PtrForEachEntry( Aig_Obj_t *, vFrontier, pNode, i )
-    {
-        // create the supergate
-        assert( Dch_ObjSatNum(p,pNode) );
-        if ( fUseMuxes && Aig_ObjIsMuxType(pNode) )
-        {
-            Vec_PtrClear( p->vFanins );
-            Vec_PtrPushUnique( p->vFanins, Aig_ObjFanin0( Aig_ObjFanin0(pNode) ) );
-            Vec_PtrPushUnique( p->vFanins, Aig_ObjFanin0( Aig_ObjFanin1(pNode) ) );
-            Vec_PtrPushUnique( p->vFanins, Aig_ObjFanin1( Aig_ObjFanin0(pNode) ) );
-            Vec_PtrPushUnique( p->vFanins, Aig_ObjFanin1( Aig_ObjFanin1(pNode) ) );
-            Vec_PtrForEachEntry( Aig_Obj_t *, p->vFanins, pFanin, k )
-                Dch_ObjAddToFrontier( p, Aig_Regular(pFanin), vFrontier );
-            Dch_AddClausesMux( p, pNode );
-        }
-        else
-        {
-            Dch_CollectSuper( pNode, fUseMuxes, p->vFanins );
-            Vec_PtrForEachEntry( Aig_Obj_t *, p->vFanins, pFanin, k )
-                Dch_ObjAddToFrontier( p, Aig_Regular(pFanin), vFrontier );
-            Dch_AddClausesSuper( p, pNode, p->vFanins );
-        }
-        assert( Vec_PtrSize(p->vFanins) > 1 );
-    }
-    Vec_PtrFree( vFrontier );
-}
-
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dch/dchCore.c b/src/aig/dch/dchCore.c
deleted file mode 100644
index bc78682b..00000000
--- a/src/aig/dch/dchCore.c
+++ /dev/null
@@ -1,158 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dchCore.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Choice computation for tech-mapping.]
-
-  Synopsis    [The core procedures.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 29, 2008.]
-
-  Revision    [$Id: dchCore.c,v 1.00 2008/07/29 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "dchInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ManSetDefaultParams( Dch_Pars_t * p )
-{
-    memset( p, 0, sizeof(Dch_Pars_t) );
-    p->nWords         =     8;  // the number of simulation words
-    p->nBTLimit       =  1000;  // conflict limit at a node
-    p->nSatVarMax     =  5000;  // the max number of SAT variables
-    p->fSynthesis     =     1;  // derives three snapshots
-    p->fPolarFlip     =     1;  // uses polarity adjustment
-    p->fSimulateTfo   =     1;  // simulate TFO
-    p->fPower         =     0;  // power-aware rewriting
-    p->fLightSynth    =     0;  // uses lighter version of synthesis
-    p->fVerbose       =     0;  // verbose stats
-    p->nNodesAhead    =  1000;  // the lookahead in terms of nodes
-    p->nCallsRecycle  =   100;  // calls to perform before recycling SAT solver
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns verbose parameter.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_ManReadVerbose( Dch_Pars_t * p )
-{
-    return p->fVerbose;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs computation of AIGs with choices.]
-
-  Description [Takes several AIGs and performs choicing.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Dch_ComputeChoices( Aig_Man_t * pAig, Dch_Pars_t * pPars )
-{
-    Dch_Man_t * p;
-    Aig_Man_t * pResult;
-    int clk, clkTotal = clock();
-    // reset random numbers
-    Aig_ManRandom(1);
-    // start the choicing manager
-    p = Dch_ManCreate( pAig, pPars );
-    // compute candidate equivalence classes
-clk = clock(); 
-    p->ppClasses = Dch_CreateCandEquivClasses( pAig, pPars->nWords, pPars->fVerbose );
-p->timeSimInit = clock() - clk;
-//    Dch_ClassesPrint( p->ppClasses, 0 );
-    p->nLits = Dch_ClassesLitNum( p->ppClasses );
-    // perform SAT sweeping
-    Dch_ManSweep( p );
-    // free memory ahead of time
-p->timeTotal = clock() - clkTotal;
-    Dch_ManStop( p );
-    // create choices
-    ABC_FREE( pAig->pTable );
-    pResult = Dch_DeriveChoiceAig( pAig );
-    // count the number of representatives
-    if ( pPars->fVerbose ) 
-        Abc_Print( 1, "STATS:  Reprs = %6d.  Equivs = %6d.  Choices = %6d.\n", 
-               Dch_DeriveChoiceCountReprs( pAig ),
-               Dch_DeriveChoiceCountEquivs( pResult ),
-               Aig_ManChoiceNum( pResult ) );
-    return pResult;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs computation of AIGs with choices.]
-
-  Description [Takes several AIGs and performs choicing.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ComputeEquivalences( Aig_Man_t * pAig, Dch_Pars_t * pPars )
-{
-    Dch_Man_t * p;
-    int clk, clkTotal = clock();
-    // reset random numbers
-    Aig_ManRandom(1);
-    // start the choicing manager
-    p = Dch_ManCreate( pAig, pPars );
-    // compute candidate equivalence classes
-clk = clock(); 
-    p->ppClasses = Dch_CreateCandEquivClasses( pAig, pPars->nWords, pPars->fVerbose );
-p->timeSimInit = clock() - clk;
-//    Dch_ClassesPrint( p->ppClasses, 0 );
-    p->nLits = Dch_ClassesLitNum( p->ppClasses );
-    // perform SAT sweeping
-    Dch_ManSweep( p );
-    // free memory ahead of time
-p->timeTotal = clock() - clkTotal;
-    Dch_ManStop( p );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dch/dchInt.h b/src/aig/dch/dchInt.h
deleted file mode 100644
index 6072d97b..00000000
--- a/src/aig/dch/dchInt.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dchInt.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Choice computation for tech-mapping.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 29, 2008.]
-
-  Revision    [$Id: dchInt.h,v 1.00 2008/07/29 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __DCH_INT_H__
-#define __DCH_INT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include "aig.h"
-#include "satSolver.h"
-#include "dch.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-// equivalence classes
-typedef struct Dch_Cla_t_ Dch_Cla_t;
-
-// choicing manager
-typedef struct Dch_Man_t_ Dch_Man_t;
-struct Dch_Man_t_
-{
-    // parameters
-    Dch_Pars_t *     pPars;          // choicing parameters
-    // AIGs used in the package
-//    Vec_Ptr_t *      vAigs;          // user-given AIGs
-    Aig_Man_t *      pAigTotal;      // intermediate AIG
-    Aig_Man_t *      pAigFraig;      // final AIG
-    // equivalence classes
-    Dch_Cla_t *      ppClasses;      // equivalence classes of nodes
-    Aig_Obj_t **     pReprsProved;   // equivalences proved
-    // SAT solving
-    sat_solver *     pSat;           // recyclable SAT solver
-    int              nSatVars;       // the counter of SAT variables
-    int *            pSatVars;       // mapping of each node into its SAT var
-    Vec_Ptr_t *      vUsedNodes;     // nodes whose SAT vars are assigned
-    int              nRecycles;      // the number of times SAT solver was recycled
-    int              nCallsSince;    // the number of calls since the last recycle
-    Vec_Ptr_t *      vFanins;        // fanins of the CNF node
-    Vec_Ptr_t *      vSimRoots;      // the roots of cand const 1 nodes to simulate
-    Vec_Ptr_t *      vSimClasses;    // the roots of cand equiv classes to simulate
-    // solver cone size
-    int              nConeThis;
-    int              nConeMax;
-    // SAT calls statistics
-    int              nSatCalls;      // the number of SAT calls
-    int              nSatProof;      // the number of proofs
-    int              nSatFailsReal;  // the number of timeouts
-    int              nSatCallsUnsat; // the number of unsat SAT calls
-    int              nSatCallsSat;   // the number of sat SAT calls
-    // choice node statistics
-    int              nLits;          // the number of lits in the cand equiv classes
-    int              nReprs;         // the number of proved equivalent pairs
-    int              nEquivs;        // the number of final equivalences
-    int              nChoices;       // the number of final choice nodes
-    // runtime stats
-    int              timeSimInit;    // simulation and class computation
-    int              timeSimSat;     // simulation of the counter-examples
-    int              timeSat;        // solving SAT
-    int              timeSatSat;     // sat
-    int              timeSatUnsat;   // unsat
-    int              timeSatUndec;   // undecided
-    int              timeChoice;     // choice computation
-    int              timeOther;      // other runtime
-    int              timeTotal;      // total runtime
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-static inline int  Dch_ObjSatNum( Dch_Man_t * p, Aig_Obj_t * pObj )             { return p->pSatVars[pObj->Id]; }
-static inline void Dch_ObjSetSatNum( Dch_Man_t * p, Aig_Obj_t * pObj, int Num ) { p->pSatVars[pObj->Id] = Num;  }
-
-static inline Aig_Obj_t * Dch_ObjFraig( Aig_Obj_t * pObj )                       { return (Aig_Obj_t *)pObj->pData;  }
-static inline void        Dch_ObjSetFraig( Aig_Obj_t * pObj, Aig_Obj_t * pNode ) { pObj->pData = pNode; }
-
-static inline int  Dch_ObjIsConst1Cand( Aig_Man_t * pAig, Aig_Obj_t * pObj ) 
-{
-    return Aig_ObjRepr(pAig, pObj) == Aig_ManConst1(pAig);
-}
-static inline void Dch_ObjSetConst1Cand( Aig_Man_t * pAig, Aig_Obj_t * pObj ) 
-{
-    assert( !Dch_ObjIsConst1Cand( pAig, pObj ) );
-    Aig_ObjSetRepr( pAig, pObj, Aig_ManConst1(pAig) );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== dchAig.c ===================================================*/
-/*=== dchChoice.c ===================================================*/
-extern int           Dch_DeriveChoiceCountReprs( Aig_Man_t * pAig );
-extern int           Dch_DeriveChoiceCountEquivs( Aig_Man_t * pAig );
-extern Aig_Man_t *   Dch_DeriveChoiceAig( Aig_Man_t * pAig );
-/*=== dchClass.c =================================================*/
-extern Dch_Cla_t *   Dch_ClassesStart( Aig_Man_t * pAig );
-extern void          Dch_ClassesSetData( Dch_Cla_t * p, void * pManData,
-                         unsigned (*pFuncNodeHash)(void *,Aig_Obj_t *),
-                         int (*pFuncNodeIsConst)(void *,Aig_Obj_t *),
-                         int (*pFuncNodesAreEqual)(void *,Aig_Obj_t *, Aig_Obj_t *) );
-extern void          Dch_ClassesStop( Dch_Cla_t * p );
-extern int           Dch_ClassesLitNum( Dch_Cla_t * p );
-extern Aig_Obj_t **  Dch_ClassesReadClass( Dch_Cla_t * p, Aig_Obj_t * pRepr, int * pnSize );
-extern void          Dch_ClassesPrint( Dch_Cla_t * p, int fVeryVerbose );
-extern void          Dch_ClassesPrepare( Dch_Cla_t * p, int fLatchCorr, int nMaxLevs );
-extern int           Dch_ClassesRefine( Dch_Cla_t * p );
-extern int           Dch_ClassesRefineOneClass( Dch_Cla_t * p, Aig_Obj_t * pRepr, int fRecursive );
-extern void          Dch_ClassesCollectOneClass( Dch_Cla_t * p, Aig_Obj_t * pRepr, Vec_Ptr_t * vRoots );
-extern void          Dch_ClassesCollectConst1Group( Dch_Cla_t * p, Aig_Obj_t * pObj, int nNodes, Vec_Ptr_t * vRoots );
-extern int           Dch_ClassesRefineConst1Group( Dch_Cla_t * p, Vec_Ptr_t * vRoots, int fRecursive );
-/*=== dchCnf.c ===================================================*/
-extern void          Dch_CnfNodeAddToSolver( Dch_Man_t * p, Aig_Obj_t * pObj );
-/*=== dchMan.c ===================================================*/
-extern Dch_Man_t *   Dch_ManCreate( Aig_Man_t * pAig, Dch_Pars_t * pPars );
-extern void          Dch_ManStop( Dch_Man_t * p );
-extern void          Dch_ManSatSolverRecycle( Dch_Man_t * p );
-/*=== dchSat.c ===================================================*/
-extern int           Dch_NodesAreEquiv( Dch_Man_t * p, Aig_Obj_t * pObj1, Aig_Obj_t * pObj2 );
-/*=== dchSim.c ===================================================*/
-extern Dch_Cla_t *   Dch_CreateCandEquivClasses( Aig_Man_t * pAig, int nWords, int fVerbose );
-/*=== dchSimSat.c ===================================================*/
-extern void          Dch_ManResimulateCex( Dch_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pRepr );
-extern void          Dch_ManResimulateCex2( Dch_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pRepr );
-/*=== dchSweep.c ===================================================*/
-extern void          Dch_ManSweep( Dch_Man_t * p );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/dch/dchMan.c b/src/aig/dch/dchMan.c
deleted file mode 100644
index dc856309..00000000
--- a/src/aig/dch/dchMan.c
+++ /dev/null
@@ -1,191 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dchMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Choice computation for tech-mapping.]
-
-  Synopsis    [Calls to the SAT solver.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 29, 2008.]
-
-  Revision    [$Id: dchMan.c,v 1.00 2008/07/29 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "dchInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Dch_Man_t * Dch_ManCreate( Aig_Man_t * pAig, Dch_Pars_t * pPars )
-{
-    Dch_Man_t * p;
-    // create interpolation manager
-    p = ABC_ALLOC( Dch_Man_t, 1 );
-    memset( p, 0, sizeof(Dch_Man_t) );
-    p->pPars        = pPars;
-    p->pAigTotal    = pAig; //Dch_DeriveTotalAig( vAigs );
-    Aig_ManFanoutStart( p->pAigTotal );
-    // SAT solving
-    p->nSatVars     = 1;
-    p->pSatVars     = ABC_CALLOC( int, Aig_ManObjNumMax(p->pAigTotal) );
-    p->vUsedNodes   = Vec_PtrAlloc( 1000 );
-    p->vFanins      = Vec_PtrAlloc( 100 );
-    p->vSimRoots    = Vec_PtrAlloc( 1000 );
-    p->vSimClasses  = Vec_PtrAlloc( 1000 );
-    // equivalences proved
-    p->pReprsProved = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAigTotal) );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints stats of the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ManPrintStats( Dch_Man_t * p )
-{
-    int nNodeNum = Aig_ManNodeNum(p->pAigTotal) / 3;
-    Abc_Print( 1, "Parameters: Sim words = %d. Conf limit = %d. SAT var max = %d.\n", 
-        p->pPars->nWords, p->pPars->nBTLimit, p->pPars->nSatVarMax );
-    Abc_Print( 1, "AIG nodes : Total = %6d. Dangling = %6d. Main = %6d. (%6.2f %%)\n", 
-        Aig_ManNodeNum(p->pAigTotal), 
-        Aig_ManNodeNum(p->pAigTotal)-nNodeNum,
-        nNodeNum,
-        100.0 * nNodeNum/Aig_ManNodeNum(p->pAigTotal) );
-    Abc_Print( 1, "SAT solver: Vars = %d. Max cone = %d. Recycles = %d.\n", 
-        p->nSatVars, p->nConeMax, p->nRecycles );
-    Abc_Print( 1, "SAT calls : All = %6d. Unsat = %6d. Sat = %6d. Fail = %6d.\n", 
-        p->nSatCalls, p->nSatCalls-p->nSatCallsSat-p->nSatFailsReal, 
-        p->nSatCallsSat, p->nSatFailsReal );
-    Abc_Print( 1, "Choices   : Lits = %6d. Reprs = %5d. Equivs = %5d. Choices = %5d.\n", 
-        p->nLits, p->nReprs, p->nEquivs, p->nChoices );
-    Abc_Print( 1, "Choicing runtime statistics:\n" );
-    p->timeOther = p->timeTotal-p->timeSimInit-p->timeSimSat-p->timeSat-p->timeChoice;
-    Abc_PrintTimeP( 1, "Sim init   ", p->timeSimInit,  p->timeTotal );
-    Abc_PrintTimeP( 1, "Sim SAT    ", p->timeSimSat,   p->timeTotal );
-    Abc_PrintTimeP( 1, "SAT solving", p->timeSat,      p->timeTotal );
-    Abc_PrintTimeP( 1, "  sat      ", p->timeSatSat,   p->timeTotal );
-    Abc_PrintTimeP( 1, "  unsat    ", p->timeSatUnsat, p->timeTotal );
-    Abc_PrintTimeP( 1, "  undecided", p->timeSatUndec, p->timeTotal );
-    Abc_PrintTimeP( 1, "Choice     ", p->timeChoice,   p->timeTotal );
-    Abc_PrintTimeP( 1, "Other      ", p->timeOther,    p->timeTotal );
-    Abc_PrintTimeP( 1, "TOTAL      ", p->timeTotal,    p->timeTotal );
-    if ( p->pPars->timeSynth )
-    {
-    Abc_PrintTime( 1, "Synthesis  ", p->pPars->timeSynth );
-    }
-} 
-
-/**Function*************************************************************
-
-  Synopsis    [Frees the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ManStop( Dch_Man_t * p )
-{
-    Aig_ManFanoutStop( p->pAigTotal );
-    if ( p->pPars->fVerbose )
-        Dch_ManPrintStats( p );
-    if ( p->pAigFraig )
-        Aig_ManStop( p->pAigFraig );
-    if ( p->ppClasses )
-        Dch_ClassesStop( p->ppClasses );
-    if ( p->pSat )
-        sat_solver_delete( p->pSat );
-    Vec_PtrFree( p->vUsedNodes );
-    Vec_PtrFree( p->vFanins );
-    Vec_PtrFree( p->vSimRoots );
-    Vec_PtrFree( p->vSimClasses );
-    ABC_FREE( p->pReprsProved );
-    ABC_FREE( p->pSatVars );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recycles the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ManSatSolverRecycle( Dch_Man_t * p )
-{
-    int Lit;
-    if ( p->pSat )
-    {
-        Aig_Obj_t * pObj;
-        int i;
-        Vec_PtrForEachEntry( Aig_Obj_t *, p->vUsedNodes, pObj, i )
-            Dch_ObjSetSatNum( p, pObj, 0 );
-        Vec_PtrClear( p->vUsedNodes );
-//        memset( p->pSatVars, 0, sizeof(int) * Aig_ManObjNumMax(p->pAigTotal) );
-        sat_solver_delete( p->pSat );
-    }
-    p->pSat = sat_solver_new();
-    sat_solver_setnvars( p->pSat, 1000 );
-    // var 0 is not used
-    // var 1 is reserved for const1 node - add the clause
-    p->nSatVars = 1;
-//    p->nSatVars = 0;
-    Lit = toLit( p->nSatVars );
-    if ( p->pPars->fPolarFlip )
-        Lit = lit_neg( Lit );
-    sat_solver_addclause( p->pSat, &Lit, &Lit + 1 );
-    Dch_ObjSetSatNum( p, Aig_ManConst1(p->pAigFraig), p->nSatVars++ );
-
-    p->nRecycles++;
-    p->nCallsSince = 0;
-}
-
-
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dch/dchSat.c b/src/aig/dch/dchSat.c
deleted file mode 100644
index f5e346ef..00000000
--- a/src/aig/dch/dchSat.c
+++ /dev/null
@@ -1,166 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dchSat.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Choice computation for tech-mapping.]
-
-  Synopsis    [Calls to the SAT solver.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 29, 2008.]
-
-  Revision    [$Id: dchSat.c,v 1.00 2008/07/29 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "dchInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Runs equivalence test for the two nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_NodesAreEquiv( Dch_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew )
-{
-    int nBTLimit = p->pPars->nBTLimit;
-    int pLits[2], RetValue, RetValue1, status, clk;
-    p->nSatCalls++;
-
-    // sanity checks
-    assert( !Aig_IsComplement(pNew) );
-    assert( !Aig_IsComplement(pOld) );
-    assert( pNew != pOld );
-
-    p->nCallsSince++;  // experiment with this!!!
-    
-    // check if SAT solver needs recycling
-    if ( p->pSat == NULL || 
-        (p->pPars->nSatVarMax && 
-         p->nSatVars > p->pPars->nSatVarMax && 
-         p->nCallsSince > p->pPars->nCallsRecycle) )
-        Dch_ManSatSolverRecycle( p );
-
-    // if the nodes do not have SAT variables, allocate them
-    Dch_CnfNodeAddToSolver( p, pOld );
-    Dch_CnfNodeAddToSolver( p, pNew );
-
-    // propage unit clauses
-    if ( p->pSat->qtail != p->pSat->qhead )
-    {
-        status = sat_solver_simplify(p->pSat);
-        assert( status != 0 );
-        assert( p->pSat->qtail == p->pSat->qhead );
-    }
-
-    // solve under assumptions
-    // A = 1; B = 0     OR     A = 1; B = 1 
-    pLits[0] = toLitCond( Dch_ObjSatNum(p,pOld), 0 );
-    pLits[1] = toLitCond( Dch_ObjSatNum(p,pNew), pOld->fPhase == pNew->fPhase );
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pOld->fPhase )  pLits[0] = lit_neg( pLits[0] );
-        if ( pNew->fPhase )  pLits[1] = lit_neg( pLits[1] );
-    }
-//Sat_SolverWriteDimacs( p->pSat, "temp.cnf", pLits, pLits + 2, 1 );
-clk = clock();
-    RetValue1 = sat_solver_solve( p->pSat, pLits, pLits + 2, 
-        (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-p->timeSat += clock() - clk;
-    if ( RetValue1 == l_False )
-    {
-p->timeSatUnsat += clock() - clk;
-        pLits[0] = lit_neg( pLits[0] );
-        pLits[1] = lit_neg( pLits[1] );
-        RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-        assert( RetValue );
-        p->nSatCallsUnsat++;
-    }
-    else if ( RetValue1 == l_True )
-    {
-p->timeSatSat += clock() - clk;
-        p->nSatCallsSat++;
-        return 0;
-    }
-    else // if ( RetValue1 == l_Undef )
-    {
-p->timeSatUndec += clock() - clk;
-        p->nSatFailsReal++;
-        return -1;
-    }
-
-    // if the old node was constant 0, we already know the answer
-    if ( pOld == Aig_ManConst1(p->pAigFraig) )
-    {
-        p->nSatProof++;
-        return 1;
-    }
-
-    // solve under assumptions
-    // A = 0; B = 1     OR     A = 0; B = 0 
-    pLits[0] = toLitCond( Dch_ObjSatNum(p,pOld), 1 );
-    pLits[1] = toLitCond( Dch_ObjSatNum(p,pNew), pOld->fPhase ^ pNew->fPhase );
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pOld->fPhase )  pLits[0] = lit_neg( pLits[0] );
-        if ( pNew->fPhase )  pLits[1] = lit_neg( pLits[1] );
-    }
-clk = clock();
-    RetValue1 = sat_solver_solve( p->pSat, pLits, pLits + 2, 
-        (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-p->timeSat += clock() - clk;
-    if ( RetValue1 == l_False )
-    {
-p->timeSatUnsat += clock() - clk;
-        pLits[0] = lit_neg( pLits[0] );
-        pLits[1] = lit_neg( pLits[1] );
-        RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-        assert( RetValue );
-        p->nSatCallsUnsat++;
-    }
-    else if ( RetValue1 == l_True )
-    {
-p->timeSatSat += clock() - clk;
-        p->nSatCallsSat++;
-        return 0;
-    }
-    else // if ( RetValue1 == l_Undef )
-    {
-p->timeSatUndec += clock() - clk;
-        p->nSatFailsReal++;
-        return -1;
-    }
-    // return SAT proof
-    p->nSatProof++;
-    return 1;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dch/dchSim.c b/src/aig/dch/dchSim.c
deleted file mode 100644
index b2d24761..00000000
--- a/src/aig/dch/dchSim.c
+++ /dev/null
@@ -1,297 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dchSim.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Choice computation for tech-mapping.]
-
-  Synopsis    [Performs random simulation at the beginning.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 29, 2008.]
-
-  Revision    [$Id: dchSim.c,v 1.00 2008/07/29 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "dchInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static inline unsigned * Dch_ObjSim( Vec_Ptr_t * vSims, Aig_Obj_t * pObj )
-{ 
-    return (unsigned *)Vec_PtrEntry( vSims, pObj->Id ); 
-}
-static inline unsigned Dch_ObjRandomSim()    
-{ 
-    return Aig_ManRandom(0);               
-}
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the node appears to be constant 1 candidate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_NodeIsConstCex( void * p, Aig_Obj_t * pObj )
-{
-    return pObj->fPhase == pObj->fMarkB;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the nodes appear equal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_NodesAreEqualCex( void * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
-{
-    return (pObj0->fPhase == pObj1->fPhase) == (pObj0->fMarkB == pObj1->fMarkB);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes hash value of the node using its simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Dch_NodeHash( void * p, Aig_Obj_t * pObj )
-{
-    Vec_Ptr_t * vSims = (Vec_Ptr_t *)p;
-    static int s_FPrimes[128] = { 
-        1009, 1049, 1093, 1151, 1201, 1249, 1297, 1361, 1427, 1459, 
-        1499, 1559, 1607, 1657, 1709, 1759, 1823, 1877, 1933, 1997, 
-        2039, 2089, 2141, 2213, 2269, 2311, 2371, 2411, 2467, 2543, 
-        2609, 2663, 2699, 2741, 2797, 2851, 2909, 2969, 3037, 3089, 
-        3169, 3221, 3299, 3331, 3389, 3461, 3517, 3557, 3613, 3671, 
-        3719, 3779, 3847, 3907, 3943, 4013, 4073, 4129, 4201, 4243, 
-        4289, 4363, 4441, 4493, 4549, 4621, 4663, 4729, 4793, 4871, 
-        4933, 4973, 5021, 5087, 5153, 5227, 5281, 5351, 5417, 5471, 
-        5519, 5573, 5651, 5693, 5749, 5821, 5861, 5923, 6011, 6073, 
-        6131, 6199, 6257, 6301, 6353, 6397, 6481, 6563, 6619, 6689, 
-        6737, 6803, 6863, 6917, 6977, 7027, 7109, 7187, 7237, 7309, 
-        7393, 7477, 7523, 7561, 7607, 7681, 7727, 7817, 7877, 7933, 
-        8011, 8039, 8059, 8081, 8093, 8111, 8123, 8147
-    };
-    unsigned * pSim;
-    unsigned uHash;
-    int k, nWords;
-    nWords = (unsigned *)Vec_PtrEntry(vSims, 1) - (unsigned *)Vec_PtrEntry(vSims, 0);
-    uHash = 0;
-    pSim  = Dch_ObjSim( vSims, pObj );
-    if ( pObj->fPhase )
-    {
-        for ( k = 0; k < nWords; k++ )
-            uHash ^= ~pSim[k] * s_FPrimes[k & 0x7F];
-    }
-    else
-    {
-        for ( k = 0; k < nWords; k++ )
-            uHash ^= pSim[k] * s_FPrimes[k & 0x7F];
-    }
-    return uHash;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation info is composed of all zeros.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_NodeIsConst( void * p, Aig_Obj_t * pObj )
-{
-    Vec_Ptr_t * vSims = (Vec_Ptr_t *)p;
-    unsigned * pSim;
-    int k, nWords;
-    nWords = (unsigned *)Vec_PtrEntry(vSims, 1) - (unsigned *)Vec_PtrEntry(vSims, 0);
-    pSim  = Dch_ObjSim( vSims, pObj );
-    if ( pObj->fPhase )
-    {
-        for ( k = 0; k < nWords; k++ )
-            if ( ~pSim[k] )
-                return 0;
-    }
-    else
-    {
-        for ( k = 0; k < nWords; k++ )
-            if ( pSim[k] )
-                return 0;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation infos are equal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Dch_NodesAreEqual( void * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
-{
-    Vec_Ptr_t * vSims = (Vec_Ptr_t *)p;
-    unsigned * pSim0, * pSim1;
-    int k, nWords;
-    nWords = (unsigned *)Vec_PtrEntry(vSims, 1) - (unsigned *)Vec_PtrEntry(vSims, 0);
-    pSim0 = Dch_ObjSim( vSims, pObj0 );
-    pSim1 = Dch_ObjSim( vSims, pObj1 );
-    if ( pObj0->fPhase != pObj1->fPhase )
-    {
-        for ( k = 0; k < nWords; k++ )
-            if ( pSim0[k] != ~pSim1[k] )
-                return 0;
-    }
-    else
-    {
-        for ( k = 0; k < nWords; k++ )
-            if ( pSim0[k] != pSim1[k] )
-                return 0;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Perform random simulation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_PerformRandomSimulation( Aig_Man_t * pAig, Vec_Ptr_t * vSims )
-{
-    unsigned * pSim, * pSim0, * pSim1;
-    Aig_Obj_t * pObj;
-    int i, k, nWords;
-    nWords = (unsigned *)Vec_PtrEntry(vSims, 1) - (unsigned *)Vec_PtrEntry(vSims, 0);
-
-    // assign const 1 sim info
-    pObj = Aig_ManConst1(pAig);
-    pSim = Dch_ObjSim( vSims, pObj );
-    memset( pSim, 0xff, sizeof(unsigned) * nWords );
-
-    // assign primary input random sim info
-    Aig_ManForEachPi( pAig, pObj, i )
-    {
-        pSim = Dch_ObjSim( vSims, pObj );
-        for ( k = 0; k < nWords; k++ )
-            pSim[k] = Dch_ObjRandomSim();
-        pSim[0] <<= 1;
-    }
-
-    // simulate AIG in the topological order
-    Aig_ManForEachNode( pAig, pObj, i )
-    {
-        pSim0 = Dch_ObjSim( vSims, Aig_ObjFanin0(pObj) ); 
-        pSim1 = Dch_ObjSim( vSims, Aig_ObjFanin1(pObj) ); 
-        pSim  = Dch_ObjSim( vSims, pObj );
-
-        if ( Aig_ObjFaninC0(pObj) && Aig_ObjFaninC1(pObj) ) // both are compls
-        {
-            for ( k = 0; k < nWords; k++ )
-                pSim[k] = ~pSim0[k] & ~pSim1[k];
-        }
-        else if ( Aig_ObjFaninC0(pObj) && !Aig_ObjFaninC1(pObj) ) // first one is compl
-        {
-            for ( k = 0; k < nWords; k++ )
-                pSim[k] = ~pSim0[k] & pSim1[k];
-        }
-        else if ( !Aig_ObjFaninC0(pObj) && Aig_ObjFaninC1(pObj) ) // second one is compl
-        {
-            for ( k = 0; k < nWords; k++ )
-                pSim[k] = pSim0[k] & ~pSim1[k];
-        }
-        else // if ( Aig_ObjFaninC0(pObj) && Aig_ObjFaninC1(pObj) ) // none is compl
-        {
-            for ( k = 0; k < nWords; k++ )
-                pSim[k] = pSim0[k] & pSim1[k];
-        }
-    }
-    // get simulation information for primary outputs
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives candidate equivalence classes of AIG nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Dch_Cla_t * Dch_CreateCandEquivClasses( Aig_Man_t * pAig, int nWords, int fVerbose )
-{
-    Dch_Cla_t * pClasses;
-    Vec_Ptr_t * vSims;
-    int i;
-    // allocate simulation information
-    vSims = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(pAig), nWords );
-    // run random simulation from the primary inputs
-    Dch_PerformRandomSimulation( pAig, vSims );
-    // start storage for equivalence classes
-    pClasses = Dch_ClassesStart( pAig );
-    Dch_ClassesSetData( pClasses, vSims, Dch_NodeHash, Dch_NodeIsConst, Dch_NodesAreEqual );
-    // hash nodes by sim info
-    Dch_ClassesPrepare( pClasses, 0, 0 );
-    // iterate random simulation
-    for ( i = 0; i < 7; i++ )
-    {
-        Dch_PerformRandomSimulation( pAig, vSims );
-        Dch_ClassesRefine( pClasses );
-    }
-    // clean up and return
-    Vec_PtrFree( vSims );
-    // prepare class refinement procedures
-    Dch_ClassesSetData( pClasses, NULL, NULL, Dch_NodeIsConstCex, Dch_NodesAreEqualCex );
-    return pClasses;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dch/dchSimSat.c b/src/aig/dch/dchSimSat.c
deleted file mode 100644
index 325543d1..00000000
--- a/src/aig/dch/dchSimSat.c
+++ /dev/null
@@ -1,258 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dchSimSat.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Choice computation for tech-mapping.]
-
-  Synopsis    [Performs resimulation using counter-examples.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 29, 2008.]
-
-  Revision    [$Id: dchSimSat.c,v 1.00 2008/07/29 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "dchInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Collects internal nodes in the reverse DFS order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ManCollectTfoCands_rec( Dch_Man_t * p, Aig_Obj_t * pObj )
-{
-    Aig_Obj_t * pFanout, * pRepr;
-    int iFanout = -1, i;
-    assert( !Aig_IsComplement(pObj) );
-    if ( Aig_ObjIsTravIdCurrent(p->pAigTotal, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent(p->pAigTotal, pObj);
-    // traverse the fanouts
-    Aig_ObjForEachFanout( p->pAigTotal, pObj, pFanout, iFanout, i )
-        Dch_ManCollectTfoCands_rec( p, pFanout );
-    // check if the given node has a representative
-    pRepr = Aig_ObjRepr( p->pAigTotal, pObj );
-    if ( pRepr == NULL )
-        return;
-    // pRepr is the constant 1 node
-    if ( pRepr == Aig_ManConst1(p->pAigTotal) )
-    {
-        Vec_PtrPush( p->vSimRoots, pObj );
-        return;
-    }
-    // pRepr is the representative of an equivalence class
-    if ( pRepr->fMarkA )
-        return;
-    pRepr->fMarkA = 1;
-    Vec_PtrPush( p->vSimClasses, pRepr );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collect equivalence classes and const1 cands in the TFO.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
- 
-***********************************************************************/
-void Dch_ManCollectTfoCands( Dch_Man_t * p, Aig_Obj_t * pObj1, Aig_Obj_t * pObj2 )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Vec_PtrClear( p->vSimRoots );
-    Vec_PtrClear( p->vSimClasses );
-    Aig_ManIncrementTravId( p->pAigTotal );
-    Aig_ObjSetTravIdCurrent( p->pAigTotal, Aig_ManConst1(p->pAigTotal) );    
-    Dch_ManCollectTfoCands_rec( p, pObj1 );
-    Dch_ManCollectTfoCands_rec( p, pObj2 );
-    Vec_PtrSort( p->vSimRoots, (int (*)(void))Aig_ObjCompareIdIncrease );
-    Vec_PtrSort( p->vSimClasses, (int (*)(void))Aig_ObjCompareIdIncrease );
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vSimClasses, pObj, i )
-        pObj->fMarkA = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resimulates the cone of influence of the solved nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
- 
-***********************************************************************/
-void Dch_ManResimulateSolved_rec( Dch_Man_t * p, Aig_Obj_t * pObj )
-{
-    if ( Aig_ObjIsTravIdCurrent(p->pAigTotal, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent(p->pAigTotal, pObj);
-    if ( Aig_ObjIsPi(pObj) )
-    {
-        Aig_Obj_t * pObjFraig;
-        int nVarNum;
-        pObjFraig = Dch_ObjFraig( pObj );
-        assert( !Aig_IsComplement(pObjFraig) );
-        nVarNum = Dch_ObjSatNum( p, pObjFraig );
-        // get the value from the SAT solver
-        // (account for the fact that some vars may be minimized away)
-        pObj->fMarkB = !nVarNum? 0 : sat_solver_var_value( p->pSat, nVarNum );
-//        pObj->fMarkB = !nVarNum? Aig_ManRandom(0) & 1 : sat_solver_var_value( p->pSat, nVarNum );
-        return;
-    }
-    Dch_ManResimulateSolved_rec( p, Aig_ObjFanin0(pObj) );
-    Dch_ManResimulateSolved_rec( p, Aig_ObjFanin1(pObj) );
-    pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) )
-                 & ( Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj) );
-    // count the cone size
-    if ( Dch_ObjSatNum( p, Aig_Regular(Dch_ObjFraig(pObj)) ) > 0 )
-        p->nConeThis++;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resimulates the cone of influence of the other nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ManResimulateOther_rec( Dch_Man_t * p, Aig_Obj_t * pObj )
-{
-    if ( Aig_ObjIsTravIdCurrent(p->pAigTotal, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent(p->pAigTotal, pObj);
-    if ( Aig_ObjIsPi(pObj) )
-    {
-        // set random value
-        pObj->fMarkB = Aig_ManRandom(0) & 1;
-        return;
-    }
-    Dch_ManResimulateOther_rec( p, Aig_ObjFanin0(pObj) );
-    Dch_ManResimulateOther_rec( p, Aig_ObjFanin1(pObj) );
-    pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) )
-                 & ( Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Handle the counter-example.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ManResimulateCex( Dch_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pRepr )
-{
-    Aig_Obj_t * pRoot, ** ppClass;
-    int i, k, nSize, RetValue1, RetValue2, clk = clock();
-    // get the equivalence classes
-    Dch_ManCollectTfoCands( p, pObj, pRepr );
-    // resimulate the cone of influence of the solved nodes
-    p->nConeThis = 0;
-    Aig_ManIncrementTravId( p->pAigTotal );
-    Aig_ObjSetTravIdCurrent( p->pAigTotal, Aig_ManConst1(p->pAigTotal) );
-    Dch_ManResimulateSolved_rec( p, pObj );
-    Dch_ManResimulateSolved_rec( p, pRepr );
-    p->nConeMax = ABC_MAX( p->nConeMax, p->nConeThis );
-    // resimulate the cone of influence of the other nodes
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vSimRoots, pRoot, i )
-        Dch_ManResimulateOther_rec( p, pRoot );
-    // refine these nodes
-    RetValue1 = Dch_ClassesRefineConst1Group( p->ppClasses, p->vSimRoots, 0 );
-    // resimulate the cone of influence of the cand classes
-    RetValue2 = 0;
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vSimClasses, pRoot, i )
-    {
-        ppClass = Dch_ClassesReadClass( p->ppClasses, pRoot, &nSize );
-        for ( k = 0; k < nSize; k++ )
-            Dch_ManResimulateOther_rec( p, ppClass[k] );
-        // refine this class
-        RetValue2 += Dch_ClassesRefineOneClass( p->ppClasses, pRoot, 0 );
-    }
-    // make sure refinement happened
-    if ( Aig_ObjIsConst1(pRepr) )
-        assert( RetValue1 );
-    else
-        assert( RetValue2 );
-p->timeSimSat += clock() - clk;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Handle the counter-example.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ManResimulateCex2( Dch_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pRepr )
-{
-    Aig_Obj_t * pRoot;
-    int i, RetValue, clk = clock();
-    // get the equivalence class
-    if ( Dch_ObjIsConst1Cand(p->pAigTotal, pObj) )
-        Dch_ClassesCollectConst1Group( p->ppClasses, pObj, 500, p->vSimRoots );
-    else
-        Dch_ClassesCollectOneClass( p->ppClasses, pRepr, p->vSimRoots );
-    // resimulate the cone of influence of the solved nodes
-    p->nConeThis = 0;
-    Aig_ManIncrementTravId( p->pAigTotal );
-    Aig_ObjSetTravIdCurrent( p->pAigTotal, Aig_ManConst1(p->pAigTotal) );
-    Dch_ManResimulateSolved_rec( p, pObj );
-    Dch_ManResimulateSolved_rec( p, pRepr );
-    p->nConeMax = ABC_MAX( p->nConeMax, p->nConeThis );
-    // resimulate the cone of influence of the other nodes
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vSimRoots, pRoot, i )
-        Dch_ManResimulateOther_rec( p, pRoot );
-    // refine this class
-    if ( Dch_ObjIsConst1Cand(p->pAigTotal, pObj) )
-        RetValue = Dch_ClassesRefineConst1Group( p->ppClasses, p->vSimRoots, 0 );
-    else
-        RetValue = Dch_ClassesRefineOneClass( p->ppClasses, pRepr, 0 );
-    assert( RetValue );
-p->timeSimSat += clock() - clk;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dch/dchSweep.c b/src/aig/dch/dchSweep.c
deleted file mode 100644
index 4b054be2..00000000
--- a/src/aig/dch/dchSweep.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [dchSweep.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Choice computation for tech-mapping.]
-
-  Synopsis    [One round of SAT sweeping.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 29, 2008.]
-
-  Revision    [$Id: dchSweep.c,v 1.00 2008/07/29 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "dchInt.h"
-#include "bar.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static inline Aig_Obj_t * Dch_ObjChild0Fra( Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin0(pObj)? Aig_NotCond(Dch_ObjFraig(Aig_ObjFanin0(pObj)), Aig_ObjFaninC0(pObj)) : NULL;  }
-static inline Aig_Obj_t * Dch_ObjChild1Fra( Aig_Obj_t * pObj ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? Aig_NotCond(Dch_ObjFraig(Aig_ObjFanin1(pObj)), Aig_ObjFaninC1(pObj)) : NULL;  }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ManSweepNode( Dch_Man_t * p, Aig_Obj_t * pObj )
-{ 
-    Aig_Obj_t * pObjRepr, * pObjFraig, * pObjFraig2, * pObjReprFraig;
-    int RetValue;
-    // get representative of this class
-    pObjRepr = Aig_ObjRepr( p->pAigTotal, pObj );
-    if ( pObjRepr == NULL )
-        return;
-    // get the fraiged node
-    pObjFraig = Dch_ObjFraig( pObj );
-    if ( pObjFraig == NULL )
-        return;
-    // get the fraiged representative
-    pObjReprFraig = Dch_ObjFraig( pObjRepr );
-    if ( pObjReprFraig == NULL )
-        return;
-    // if the fraiged nodes are the same, return
-    if ( Aig_Regular(pObjFraig) == Aig_Regular(pObjReprFraig) )
-    {
-        // remember the proved equivalence
-        p->pReprsProved[ pObj->Id ] = pObjRepr;
-        return;
-    }
-    assert( Aig_Regular(pObjFraig) != Aig_ManConst1(p->pAigFraig) );
-    RetValue = Dch_NodesAreEquiv( p, Aig_Regular(pObjReprFraig), Aig_Regular(pObjFraig) );
-    if ( RetValue == -1 ) // timed out
-    {
-        Dch_ObjSetFraig( pObj, NULL );
-        return;
-    }
-    if ( RetValue == 1 )  // proved equivalent
-    {
-        pObjFraig2 = Aig_NotCond( pObjReprFraig, pObj->fPhase ^ pObjRepr->fPhase );
-        Dch_ObjSetFraig( pObj, pObjFraig2 );
-        // remember the proved equivalence
-        p->pReprsProved[ pObj->Id ] = pObjRepr;
-        return;
-    }
-    // disproved the equivalence
-    if ( p->pPars->fSimulateTfo )
-        Dch_ManResimulateCex( p, pObj, pObjRepr );
-    else
-        Dch_ManResimulateCex2( p, pObj, pObjRepr );
-    assert( Aig_ObjRepr( p->pAigTotal, pObj ) != pObjRepr );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for the internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Dch_ManSweep( Dch_Man_t * p )
-{
-    Bar_Progress_t * pProgress = NULL;
-    Aig_Obj_t * pObj, * pObjNew;
-    int i;
-    // map constants and PIs
-    p->pAigFraig = Aig_ManStart( Aig_ManObjNumMax(p->pAigTotal) );
-    Aig_ManCleanData( p->pAigTotal );
-    Aig_ManConst1(p->pAigTotal)->pData = Aig_ManConst1(p->pAigFraig);
-    Aig_ManForEachPi( p->pAigTotal, pObj, i )
-        pObj->pData = Aig_ObjCreatePi( p->pAigFraig );
-    // sweep internal nodes
-    pProgress = Bar_ProgressStart( stdout, Aig_ManObjNumMax(p->pAigTotal) );
-    Aig_ManForEachNode( p->pAigTotal, pObj, i )
-    {
-        Bar_ProgressUpdate( pProgress, i, NULL );
-        if ( Dch_ObjFraig(Aig_ObjFanin0(pObj)) == NULL || 
-             Dch_ObjFraig(Aig_ObjFanin1(pObj)) == NULL )
-            continue;
-        pObjNew = Aig_And( p->pAigFraig, Dch_ObjChild0Fra(pObj), Dch_ObjChild1Fra(pObj) );
-        if ( pObjNew == NULL )
-            continue;
-        Dch_ObjSetFraig( pObj, pObjNew );
-        Dch_ManSweepNode( p, pObj );
-    }
-    Bar_ProgressStop( pProgress );
-    // update the representatives of the nodes (makes classes invalid)
-    ABC_FREE( p->pAigTotal->pReprs );
-    p->pAigTotal->pReprs = p->pReprsProved;
-    p->pReprsProved = NULL;
-    // clean the mark
-    Aig_ManCleanMarkB( p->pAigTotal );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/dch/module.make b/src/aig/dch/module.make
deleted file mode 100644
index 5709f87a..00000000
--- a/src/aig/dch/module.make
+++ /dev/null
@@ -1,10 +0,0 @@
-SRC +=    src/aig/dch/dchAig.c \
-    src/aig/dch/dchChoice.c \
-    src/aig/dch/dchClass.c \
-    src/aig/dch/dchCnf.c \
-    src/aig/dch/dchCore.c \
-    src/aig/dch/dchMan.c \
-    src/aig/dch/dchSat.c \
-    src/aig/dch/dchSim.c \
-    src/aig/dch/dchSimSat.c \
-    src/aig/dch/dchSweep.c
diff --git a/src/aig/deco/deco.h b/src/aig/deco/deco.h
deleted file mode 100644
index 84f2e25e..00000000
--- a/src/aig/deco/deco.h
+++ /dev/null
@@ -1,714 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [deco.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [A simple decomposition tree/node data structure and its APIs.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: deco.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __DEC_H__
-#define __DEC_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Dec_Edge_t_ Dec_Edge_t;
-struct Dec_Edge_t_
-{
-    unsigned          fCompl   :  1;   // the complemented bit
-    unsigned          Node     : 30;   // the decomposition node pointed by the edge
-};
-
-typedef struct Dec_Node_t_ Dec_Node_t;
-struct Dec_Node_t_
-{
-    Dec_Edge_t        eEdge0;          // the left child of the node
-    Dec_Edge_t        eEdge1;          // the right child of the node
-    // other info
-    union { int       iFunc;           // the literal of the node (AIG)
-    void *            pFunc; };        // the function of the node (BDD or AIG)
-    unsigned          Level    : 14;   // the level of this node in the global AIG
-    // printing info 
-    unsigned          fNodeOr  :  1;   // marks the original OR node
-    unsigned          fCompl0  :  1;   // marks the original complemented edge
-    unsigned          fCompl1  :  1;   // marks the original complemented edge
-    // latch info
-    unsigned          nLat0    :  5;   // the number of latches on the first edge
-    unsigned          nLat1    :  5;   // the number of latches on the second edge
-    unsigned          nLat2    :  5;   // the number of latches on the output edge
-};
-
-typedef struct Dec_Graph_t_ Dec_Graph_t;
-struct Dec_Graph_t_
-{
-    int               fConst;          // marks the constant 1 graph
-    int               nLeaves;         // the number of leaves
-    int               nSize;           // the number of nodes (including the leaves) 
-    int               nCap;            // the number of allocated nodes
-    Dec_Node_t *      pNodes;          // the array of leaves and internal nodes
-    Dec_Edge_t        eRoot;           // the pointer to the topmost node
-};
-
-typedef struct Dec_Man_t_ Dec_Man_t;
-struct Dec_Man_t_
-{
-    void *            pMvcMem;         // memory manager for MVC cover (used for factoring)
-    Vec_Int_t *       vCubes;          // storage for cubes
-    Vec_Int_t *       vLits;           // storage for literals 
-    // precomputation information about 4-variable functions
-    unsigned short *  puCanons;        // canonical forms
-    char *            pPhases;         // canonical phases
-    char *            pPerms;          // canonical permutations
-    unsigned char *   pMap;            // mapping of functions into class numbers
-};
-
-
-////////////////////////////////////////////////////////////////////////
-///                        ITERATORS                                 ///
-////////////////////////////////////////////////////////////////////////
-
-// interator throught the leaves
-#define Dec_GraphForEachLeaf( pGraph, pLeaf, i )                                              \
-    for ( i = 0; (i < (pGraph)->nLeaves) && (((pLeaf) = Dec_GraphNode(pGraph, i)), 1); i++ )
-// interator throught the internal nodes
-#define Dec_GraphForEachNode( pGraph, pAnd, i )                                               \
-    for ( i = (pGraph)->nLeaves; (i < (pGraph)->nSize) && (((pAnd) = Dec_GraphNode(pGraph, i)), 1); i++ )
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates an edge pointing to the node in the given polarity.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Edge_t Dec_EdgeCreate( int Node, int fCompl )   
-{
-    Dec_Edge_t eEdge = { fCompl, Node }; 
-    return eEdge; 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Converts the edge into unsigned integer.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline unsigned Dec_EdgeToInt( Dec_Edge_t eEdge )   
-{
-    return (eEdge.Node << 1) | eEdge.fCompl; 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Converts unsigned integer into the edge.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Edge_t Dec_IntToEdge( unsigned Edge )   
-{
-    return Dec_EdgeCreate( Edge >> 1, Edge & 1 ); 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Converts the edge into unsigned integer.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline unsigned Dec_EdgeToInt_( Dec_Edge_t m )  { union { Dec_Edge_t x; unsigned y; } v; v.x = m; return v.y;  }
-/*
-static inline unsigned Dec_EdgeToInt_( Dec_Edge_t eEdge )   
-{
-    return *(unsigned *)&eEdge;
-}
-*/
-
-/**Function*************************************************************
-
-  Synopsis    [Converts unsigned integer into the edge.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Edge_t Dec_IntToEdge_( unsigned m )    { union { Dec_Edge_t x; unsigned y; } v; v.y = m; return v.x;  }
-/*
-static inline Dec_Edge_t Dec_IntToEdge_( unsigned Edge )   
-{
-    return *(Dec_Edge_t *)&Edge;
-}
-*/
-
-/**Function*************************************************************
-
-  Synopsis    [Creates a graph with the given number of leaves.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Graph_t * Dec_GraphCreate( int nLeaves )   
-{
-    Dec_Graph_t * pGraph;
-    pGraph = ABC_ALLOC( Dec_Graph_t, 1 );
-    memset( pGraph, 0, sizeof(Dec_Graph_t) );
-    pGraph->nLeaves = nLeaves;
-    pGraph->nSize = nLeaves;
-    pGraph->nCap = 2 * nLeaves + 50;
-    pGraph->pNodes = ABC_ALLOC( Dec_Node_t, pGraph->nCap );
-    memset( pGraph->pNodes, 0, sizeof(Dec_Node_t) * pGraph->nSize );
-    return pGraph;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates constant 0 graph.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Graph_t * Dec_GraphCreateConst0()   
-{
-    Dec_Graph_t * pGraph;
-    pGraph = ABC_ALLOC( Dec_Graph_t, 1 );
-    memset( pGraph, 0, sizeof(Dec_Graph_t) );
-    pGraph->fConst = 1;
-    pGraph->eRoot.fCompl = 1;
-    return pGraph;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates constant 1 graph.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Graph_t * Dec_GraphCreateConst1()   
-{
-    Dec_Graph_t * pGraph;
-    pGraph = ABC_ALLOC( Dec_Graph_t, 1 );
-    memset( pGraph, 0, sizeof(Dec_Graph_t) );
-    pGraph->fConst = 1;
-    return pGraph;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the literal graph.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Graph_t * Dec_GraphCreateLeaf( int iLeaf, int nLeaves, int fCompl )   
-{
-    Dec_Graph_t * pGraph;
-    assert( 0 <= iLeaf && iLeaf < nLeaves );
-    pGraph = Dec_GraphCreate( nLeaves );
-    pGraph->eRoot.Node   = iLeaf;
-    pGraph->eRoot.fCompl = fCompl;
-    return pGraph;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates a graph with the given number of leaves.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Dec_GraphFree( Dec_Graph_t * pGraph )   
-{
-    ABC_FREE( pGraph->pNodes );
-    ABC_FREE( pGraph );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the graph is a constant.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dec_GraphIsConst( Dec_Graph_t * pGraph )   
-{
-    return pGraph->fConst;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the graph is constant 0.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dec_GraphIsConst0( Dec_Graph_t * pGraph )   
-{
-    return pGraph->fConst && pGraph->eRoot.fCompl;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the graph is constant 1.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dec_GraphIsConst1( Dec_Graph_t * pGraph )   
-{
-    return pGraph->fConst && !pGraph->eRoot.fCompl;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the graph is complemented.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dec_GraphIsComplement( Dec_Graph_t * pGraph )   
-{
-    return pGraph->eRoot.fCompl;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks if the graph is complemented.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Dec_GraphComplement( Dec_Graph_t * pGraph )   
-{
-    pGraph->eRoot.fCompl ^= 1;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of leaves.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dec_GraphLeaveNum( Dec_Graph_t * pGraph )   
-{
-    return pGraph->nLeaves;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dec_GraphNodeNum( Dec_Graph_t * pGraph )   
-{
-    return pGraph->nSize - pGraph->nLeaves;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the pointer to the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Node_t * Dec_GraphNode( Dec_Graph_t * pGraph, int i )   
-{
-    return pGraph->pNodes + i;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the pointer to the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Node_t * Dec_GraphNodeLast( Dec_Graph_t * pGraph )   
-{
-    return pGraph->pNodes + pGraph->nSize - 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of the given node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dec_GraphNodeInt( Dec_Graph_t * pGraph, Dec_Node_t * pNode )   
-{
-    return pNode - pGraph->pNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Check if the graph represents elementary variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dec_GraphIsVar( Dec_Graph_t * pGraph )   
-{
-    return pGraph->eRoot.Node < (unsigned)pGraph->nLeaves;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Check if the graph represents elementary variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dec_GraphNodeIsVar( Dec_Graph_t * pGraph, Dec_Node_t * pNode )   
-{
-    return Dec_GraphNodeInt(pGraph,pNode) < pGraph->nLeaves;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the elementary variable elementary variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Node_t * Dec_GraphVar( Dec_Graph_t * pGraph )   
-{
-    assert( Dec_GraphIsVar( pGraph ) );
-    return Dec_GraphNode( pGraph, pGraph->eRoot.Node );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of the elementary variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Dec_GraphVarInt( Dec_Graph_t * pGraph )   
-{
-    assert( Dec_GraphIsVar( pGraph ) );
-    return Dec_GraphNodeInt( pGraph, Dec_GraphVar(pGraph) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sets the root of the graph.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Dec_GraphSetRoot( Dec_Graph_t * pGraph, Dec_Edge_t eRoot )   
-{
-    pGraph->eRoot = eRoot;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Appends a new node to the graph.]
-
-  Description [This procedure is meant for internal use.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Node_t * Dec_GraphAppendNode( Dec_Graph_t * pGraph )   
-{
-    Dec_Node_t * pNode;
-    if ( pGraph->nSize == pGraph->nCap )
-    {
-        pGraph->pNodes = ABC_REALLOC( Dec_Node_t, pGraph->pNodes, 2 * pGraph->nCap ); 
-        pGraph->nCap   = 2 * pGraph->nCap;
-    }
-    pNode = pGraph->pNodes + pGraph->nSize++;
-    memset( pNode, 0, sizeof(Dec_Node_t) );
-    return pNode;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates an AND node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Edge_t Dec_GraphAddNodeAnd( Dec_Graph_t * pGraph, Dec_Edge_t eEdge0, Dec_Edge_t eEdge1 )
-{
-    Dec_Node_t * pNode;
-    // get the new node
-    pNode = Dec_GraphAppendNode( pGraph );
-    // set the inputs and other info
-    pNode->eEdge0 = eEdge0;
-    pNode->eEdge1 = eEdge1;
-    pNode->fCompl0 = eEdge0.fCompl;
-    pNode->fCompl1 = eEdge1.fCompl;
-    return Dec_EdgeCreate( pGraph->nSize - 1, 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates an OR node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Edge_t Dec_GraphAddNodeOr( Dec_Graph_t * pGraph, Dec_Edge_t eEdge0, Dec_Edge_t eEdge1 )
-{
-    Dec_Node_t * pNode;
-    // get the new node
-    pNode = Dec_GraphAppendNode( pGraph );
-    // set the inputs and other info
-    pNode->eEdge0 = eEdge0;
-    pNode->eEdge1 = eEdge1;
-    pNode->fCompl0 = eEdge0.fCompl;
-    pNode->fCompl1 = eEdge1.fCompl;
-    // make adjustments for the OR gate
-    pNode->fNodeOr = 1;
-    pNode->eEdge0.fCompl = !pNode->eEdge0.fCompl;
-    pNode->eEdge1.fCompl = !pNode->eEdge1.fCompl;
-    return Dec_EdgeCreate( pGraph->nSize - 1, 1 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates an XOR node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Edge_t Dec_GraphAddNodeXor( Dec_Graph_t * pGraph, Dec_Edge_t eEdge0, Dec_Edge_t eEdge1, int Type )
-{
-    Dec_Edge_t eNode0, eNode1, eNode;
-    if ( Type == 0 )
-    {
-        // derive the first AND
-        eEdge0.fCompl ^= 1;
-        eNode0 = Dec_GraphAddNodeAnd( pGraph, eEdge0, eEdge1 );
-        eEdge0.fCompl ^= 1;
-        // derive the second AND
-        eEdge1.fCompl ^= 1;
-        eNode1 = Dec_GraphAddNodeAnd( pGraph, eEdge0, eEdge1 );
-        // derive the final OR
-        eNode = Dec_GraphAddNodeOr( pGraph, eNode0, eNode1 );
-    }
-    else
-    {
-        // derive the first AND
-        eNode0 = Dec_GraphAddNodeAnd( pGraph, eEdge0, eEdge1 );
-        // derive the second AND
-        eEdge0.fCompl ^= 1;
-        eEdge1.fCompl ^= 1;
-        eNode1 = Dec_GraphAddNodeAnd( pGraph, eEdge0, eEdge1 );
-        // derive the final OR
-        eNode = Dec_GraphAddNodeOr( pGraph, eNode0, eNode1 );
-        eNode.fCompl ^= 1;
-    }
-    return eNode;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates an XOR node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Dec_Edge_t Dec_GraphAddNodeMux( Dec_Graph_t * pGraph, Dec_Edge_t eEdgeC, Dec_Edge_t eEdgeT, Dec_Edge_t eEdgeE, int Type )
-{
-    Dec_Edge_t eNode0, eNode1, eNode;
-    if ( Type == 0 )
-    {
-        // derive the first AND
-        eNode0 = Dec_GraphAddNodeAnd( pGraph, eEdgeC, eEdgeT );
-        // derive the second AND
-        eEdgeC.fCompl ^= 1;
-        eNode1 = Dec_GraphAddNodeAnd( pGraph, eEdgeC, eEdgeE );
-        // derive the final OR
-        eNode = Dec_GraphAddNodeOr( pGraph, eNode0, eNode1 );
-    }
-    else
-    {
-        // complement the arguments
-        eEdgeT.fCompl ^= 1;
-        eEdgeE.fCompl ^= 1;
-        // derive the first AND
-        eNode0 = Dec_GraphAddNodeAnd( pGraph, eEdgeC, eEdgeT );
-        // derive the second AND
-        eEdgeC.fCompl ^= 1;
-        eNode1 = Dec_GraphAddNodeAnd( pGraph, eEdgeC, eEdgeE );
-        // derive the final OR
-        eNode = Dec_GraphAddNodeOr( pGraph, eNode0, eNode1 );
-        eNode.fCompl ^= 1;
-    }
-    return eNode;
-}
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/deco/module.make b/src/aig/deco/module.make
deleted file mode 100644
index d6d908e7..00000000
--- a/src/aig/deco/module.make
+++ /dev/null
@@ -1 +0,0 @@
-SRC += 
diff --git a/src/aig/fra/fra.h b/src/aig/fra/fra.h
deleted file mode 100644
index ea362bdf..00000000
--- a/src/aig/fra/fra.h
+++ /dev/null
@@ -1,389 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fra.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [[New FRAIG package.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fra.h,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#ifndef __FRA_H__
-#define __FRA_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-#include <time.h>
-
-#include "vec.h"
-#include "aig.h"
-#include "dar.h"
-#include "satSolver.h"
-#include "ioa.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
- 
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Fra_Par_t_   Fra_Par_t;
-typedef struct Fra_Ssw_t_   Fra_Ssw_t;
-typedef struct Fra_Sec_t_   Fra_Sec_t;
-typedef struct Fra_Man_t_   Fra_Man_t;
-typedef struct Fra_Cla_t_   Fra_Cla_t;
-typedef struct Fra_Sml_t_   Fra_Sml_t;
-typedef struct Fra_Bmc_t_   Fra_Bmc_t;
-
-// FRAIG parameters
-struct Fra_Par_t_
-{
-    int              nSimWords;         // the number of words in the simulation info
-    double           dSimSatur;         // the ratio of refined classes when saturation is reached
-    int              fPatScores;        // enables simulation pattern scoring
-    int              MaxScore;          // max score after which resimulation is used
-    double           dActConeRatio;     // the ratio of cone to be bumped
-    double           dActConeBumpMax;   // the largest bump in activity
-    int              fChoicing;         // enables choicing
-    int              fSpeculate;        // use speculative reduction
-    int              fProve;            // prove the miter outputs
-    int              fVerbose;          // verbose output
-    int              fDoSparse;         // skip sparse functions
-    int              fConeBias;         // bias variables in the cone (good for unsat runs)
-    int              nBTLimitNode;      // conflict limit at a node
-    int              nBTLimitMiter;     // conflict limit at an output
-    int              nLevelMax;         // the max level to consider seriously
-    int              nFramesP;          // the number of timeframes to in the prefix
-    int              nFramesK;          // the number of timeframes to unroll
-    int              nMaxImps;          // the maximum number of implications to consider
-    int              nMaxLevs;          // the maximum number of levels to consider
-    int              fRewrite;          // use rewriting for constraint reduction
-    int              fLatchCorr;        // computes latch correspondence only
-    int              fUseImps;          // use implications
-    int              fUse1Hot;          // use one-hotness conditions
-    int              fWriteImps;        // record implications
-    int              fDontShowBar;      // does not show progressbar during fraiging
-};
-
-// seq SAT sweeping parameters
-struct Fra_Ssw_t_
-{
-    int              nPartSize;         // size of the partition
-    int              nOverSize;         // size of the overlap between partitions
-    int              nFramesP;          // number of frames in the prefix
-    int              nFramesK;          // number of frames for induction (1=simple) 
-    int              nMaxImps;          // max implications to consider
-    int              nMaxLevs;          // max levels to consider
-    int              nMinDomSize;       // min clock domain considered for optimization
-    int              fUseImps;          // use implications  
-    int              fRewrite;          // enable rewriting of the specualatively reduced model
-    int              fFraiging;         // enable comb SAT sweeping as preprocessing 
-    int              fLatchCorr;        // perform register correspondence
-    int              fWriteImps;        // write implications into a file
-    int              fUse1Hot;          // use one-hotness constraints
-    int              fVerbose;          // enable verbose output 
-    int              fSilent;           // disable any output 
-    int              nIters;            // the number of iterations performed
-    float            TimeLimit;         // the runtime budget for this call
-};
-
-// SEC parametesr
-struct Fra_Sec_t_
-{
-    int              fTryComb;          // try CEC call as a preprocessing step
-    int              fTryBmc;           // try BMC call as a preprocessing step 
-    int              nFramesMax;        // the max number of frames used for induction
-    int              nBTLimit;          // the conflict limit at a node
-    int              nBTLimitGlobal;    // the global conflict limit
-    int              nBTLimitInter;     // the conflict limit for interpolation
-    int              nBddVarsMax;       // the state space limit for BDD reachability
-    int              nBddMax;           // the max number of BDD nodes
-    int              nBddIterMax;       // the limit on the number of BDD iterations
-    int              nPdrTimeout;       // the timeout for PDR in the end
-    int              fPhaseAbstract;    // enables phase abstraction
-    int              fRetimeFirst;      // enables most-forward retiming at the beginning
-    int              fRetimeRegs;       // enables min-register retiming at the beginning
-    int              fFraiging;         // enables fraiging at the beginning
-    int              fInduction;        // enable the use of induction
-    int              fInterpolation;    // enables interpolation
-    int              fInterSeparate;    // enables interpolation for each outputs separately
-    int              fReachability;     // enables BDD based reachability
-    int              fReorderImage;     // enables BDD reordering during image computation
-    int              fStopOnFirstFail;  // enables stopping after first output of a miter has failed to prove
-    int              fUseNewProver;     // the new prover
-    int              fUsePdr;           // the PDR
-    int              fSilent;           // disables all output
-    int              fVerbose;          // enables verbose reporting of statistics
-    int              fVeryVerbose;      // enables very verbose reporting  
-    int              TimeLimit;         // enables the timeout
-    int              fReadUnsolved;     // inserts the unsolved model back
-    int              nSMnumber;         // the number of model written
-    // internal parameters
-    int              fRecursive;        // set to 1 when SEC is called recursively
-    int              fReportSolution;   // enables report solution in a special form
-};
-
-// FRAIG equivalence classes
-struct Fra_Cla_t_
-{
-    Aig_Man_t *      pAig;              // the original AIG manager
-    Aig_Obj_t **     pMemRepr;          // pointers to representatives of each node
-    Vec_Ptr_t *      vClasses;          // equivalence classes
-    Vec_Ptr_t *      vClasses1;         // equivalence class of Const1 node
-    Vec_Ptr_t *      vClassesTemp;      // temporary storage for new classes
-    Aig_Obj_t **     pMemClasses;       // memory allocated for equivalence classes
-    Aig_Obj_t **     pMemClassesFree;   // memory allocated for equivalence classes to be used
-    Vec_Ptr_t *      vClassOld;         // old equivalence class after splitting
-    Vec_Ptr_t *      vClassNew;         // new equivalence class(es) after splitting
-    int              nPairs;            // the number of pairs of nodes
-    int              fRefinement;       // set to 1 when refinement has happened
-    Vec_Int_t *      vImps;             // implications
-    // procedures used for class refinement
-    int (*pFuncNodeHash)     (Aig_Obj_t *, int);         // returns has key of the node
-    int (*pFuncNodeIsConst)  (Aig_Obj_t *);              // returns 1 if the node is a constant
-    int (*pFuncNodesAreEqual)(Aig_Obj_t *, Aig_Obj_t *); // returns 1 if nodes are equal up to a complement
-};
-
-// simulation manager
-struct Fra_Sml_t_
-{
-    Aig_Man_t *      pAig;              // the original AIG manager
-    int              nPref;             // the number of times frames in the prefix
-    int              nFrames;           // the number of times frames 
-    int              nWordsFrame;       // the number of words in each time frame
-    int              nWordsTotal;       // the total number of words at a node
-    int              nWordsPref;        // the number of word in the prefix
-    int              fNonConstOut;      // have seen a non-const-0 output during simulation
-    int              nSimRounds;        // statistics
-    int              timeSim;           // statistics
-    unsigned         pData[0];          // simulation data for the nodes
-};
-
-// FRAIG manager
-struct Fra_Man_t_
-{
-    // high-level data    
-    Fra_Par_t *      pPars;             // parameters governing fraiging
-    // AIG managers
-    Aig_Man_t *      pManAig;           // the starting AIG manager
-    Aig_Man_t *      pManFraig;         // the final AIG manager
-    // mapping AIG into FRAIG
-    int              nFramesAll;        // the number of timeframes used
-    Aig_Obj_t **     pMemFraig;         // memory allocated for points to the fraig nodes
-    int              nSizeAlloc;        // allocated size of the arrays for timeframe nodes
-    // equivalence classes 
-    Fra_Cla_t *      pCla;              // representation of (candidate) equivalent nodes
-    // simulation info
-    Fra_Sml_t *      pSml;              // simulation manager
-    // bounded model checking manager
-    Fra_Bmc_t *      pBmc;
-    // counter example storage
-    int              nPatWords;         // the number of words in the counter example
-    unsigned *       pPatWords;         // the counter example
-    Vec_Int_t *      vCex;
-    // one-hotness conditions
-    Vec_Int_t *      vOneHots;          
-    // satisfiability solving
-    sat_solver *     pSat;              // SAT solver
-    int              nSatVars;          // the number of variables currently used
-    Vec_Ptr_t *      vPiVars;           // the PIs of the cone used 
-    ABC_INT64_T           nBTLimitGlobal;    // resource limit
-    ABC_INT64_T           nInsLimitGlobal;   // resource limit
-    Vec_Ptr_t **     pMemFanins;        // the arrays of fanins for some FRAIG nodes
-    int *            pMemSatNums;       // the array of SAT numbers for some FRAIG nodes
-    int              nMemAlloc;         // allocated size of the arrays for FRAIG varnums and fanins
-    Vec_Ptr_t *      vTimeouts;         // the nodes, for which equivalence checking timed out
-    // statistics
-    int              nSimRounds;
-    int              nNodesMiter;
-    int              nLitsBeg;
-    int              nLitsEnd;
-    int              nNodesBeg;
-    int              nNodesEnd;
-    int              nRegsBeg;
-    int              nRegsEnd;
-    int              nSatCalls;
-    int              nSatCallsSat;
-    int              nSatCallsUnsat;
-    int              nSatProof;
-    int              nSatFails;
-    int              nSatFailsReal;
-    int              nSpeculs;   
-    int              nChoices;
-    int              nChoicesFake;
-    int              nSatCallsRecent;
-    int              nSatCallsSkipped;
-    // runtime
-    int              timeSim;
-    int              timeTrav;
-    int              timeRwr;
-    int              timeSat;
-    int              timeSatUnsat;
-    int              timeSatSat;
-    int              timeSatFail;
-    int              timeRef;
-    int              timeTotal;
-    int              time1;
-    int              time2;
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-static inline unsigned *   Fra_ObjSim( Fra_Sml_t * p, int Id )                           { return p->pData + p->nWordsTotal * Id; }
-static inline unsigned     Fra_ObjRandomSim()                                            { return Aig_ManRandom(0);               }
-
-static inline Aig_Obj_t *  Fra_ObjFraig( Aig_Obj_t * pObj, int i )                       { return ((Fra_Man_t *)pObj->pData)->pMemFraig[((Fra_Man_t *)pObj->pData)->nFramesAll*pObj->Id + i];  }
-static inline void         Fra_ObjSetFraig( Aig_Obj_t * pObj, int i, Aig_Obj_t * pNode ) { ((Fra_Man_t *)pObj->pData)->pMemFraig[((Fra_Man_t *)pObj->pData)->nFramesAll*pObj->Id + i] = pNode; }
-
-static inline Vec_Ptr_t *  Fra_ObjFaninVec( Aig_Obj_t * pObj )                           { return ((Fra_Man_t *)pObj->pData)->pMemFanins[pObj->Id];      }
-static inline void         Fra_ObjSetFaninVec( Aig_Obj_t * pObj, Vec_Ptr_t * vFanins )   { ((Fra_Man_t *)pObj->pData)->pMemFanins[pObj->Id] = vFanins;   }
-
-static inline int          Fra_ObjSatNum( Aig_Obj_t * pObj )                             { return ((Fra_Man_t *)pObj->pData)->pMemSatNums[pObj->Id];     }
-static inline void         Fra_ObjSetSatNum( Aig_Obj_t * pObj, int Num )                 { ((Fra_Man_t *)pObj->pData)->pMemSatNums[pObj->Id] = Num;      }
-
-static inline Aig_Obj_t *  Fra_ClassObjRepr( Aig_Obj_t * pObj )                          { return ((Fra_Man_t *)pObj->pData)->pCla->pMemRepr[pObj->Id];  }
-static inline void         Fra_ClassObjSetRepr( Aig_Obj_t * pObj, Aig_Obj_t * pNode )    { ((Fra_Man_t *)pObj->pData)->pCla->pMemRepr[pObj->Id] = pNode; }
-
-static inline Aig_Obj_t *  Fra_ObjChild0Fra( Aig_Obj_t * pObj, int i ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin0(pObj)? Aig_NotCond(Fra_ObjFraig(Aig_ObjFanin0(pObj),i), Aig_ObjFaninC0(pObj)) : NULL;  }
-static inline Aig_Obj_t *  Fra_ObjChild1Fra( Aig_Obj_t * pObj, int i ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? Aig_NotCond(Fra_ObjFraig(Aig_ObjFanin1(pObj),i), Aig_ObjFaninC1(pObj)) : NULL;  }
-
-static inline int          Fra_ImpLeft( int Imp )                                        { return Imp & 0xFFFF;         }
-static inline int          Fra_ImpRight( int Imp )                                       { return Imp >> 16;            }
-static inline int          Fra_ImpCreate( int Left, int Right )                          { return (Right << 16) | Left; }
-
-////////////////////////////////////////////////////////////////////////
-///                         ITERATORS                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== fraCec.c ========================================================*/
-extern int                 Fra_FraigSat( Aig_Man_t * pMan, ABC_INT64_T nConfLimit, ABC_INT64_T nInsLimit, int fFlipBits, int fAndOuts, int fNewSolver, int fVerbose );
-extern int                 Fra_FraigCec( Aig_Man_t ** ppAig, int nConfLimit, int fVerbose );
-extern int                 Fra_FraigCecPartitioned( Aig_Man_t * pMan1, Aig_Man_t * pMan2, int nConfLimit, int nPartSize, int fSmart, int fVerbose );
-/*=== fraClass.c ========================================================*/
-extern int                 Fra_BmcNodeIsConst( Aig_Obj_t * pObj );
-extern int                 Fra_BmcNodesAreEqual( Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 );
-extern void                Fra_BmcStop( Fra_Bmc_t * p );
-extern void                Fra_BmcPerform( Fra_Man_t * p, int nPref, int nDepth );
-extern void                Fra_BmcPerformSimple( Aig_Man_t * pAig, int nFrames, int nBTLimit, int fRewrite, int fVerbose );
-/*=== fraClass.c ========================================================*/
-extern Fra_Cla_t *         Fra_ClassesStart( Aig_Man_t * pAig );
-extern void                Fra_ClassesStop( Fra_Cla_t * p );
-extern void                Fra_ClassesCopyReprs( Fra_Cla_t * p, Vec_Ptr_t * vFailed );
-extern void                Fra_ClassesPrint( Fra_Cla_t * p, int fVeryVerbose );
-extern void                Fra_ClassesPrepare( Fra_Cla_t * p, int fLatchCorr, int nMaxLevs );
-extern int                 Fra_ClassesRefine( Fra_Cla_t * p );
-extern int                 Fra_ClassesRefine1( Fra_Cla_t * p, int fRefineNewClass, int * pSkipped );
-extern int                 Fra_ClassesCountLits( Fra_Cla_t * p );
-extern int                 Fra_ClassesCountPairs( Fra_Cla_t * p );
-extern void                Fra_ClassesTest( Fra_Cla_t * p, int Id1, int Id2 );
-extern void                Fra_ClassesLatchCorr( Fra_Man_t * p );
-extern void                Fra_ClassesPostprocess( Fra_Cla_t * p );
-extern void                Fra_ClassesSelectRepr( Fra_Cla_t * p );
-extern Aig_Man_t *         Fra_ClassesDeriveAig( Fra_Cla_t * p, int nFramesK );
-/*=== fraCnf.c ========================================================*/
-extern void                Fra_CnfNodeAddToSolver( Fra_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew );
-/*=== fraCore.c ========================================================*/
-extern void                Fra_FraigSweep( Fra_Man_t * pManAig );
-extern int                 Fra_FraigMiterStatus( Aig_Man_t * p );
-extern int                 Fra_FraigMiterAssertedOutput( Aig_Man_t * p );
-extern Aig_Man_t *         Fra_FraigPerform( Aig_Man_t * pManAig, Fra_Par_t * pPars );
-extern Aig_Man_t *         Fra_FraigChoice( Aig_Man_t * pManAig, int nConfMax, int nLevelMax );
-extern Aig_Man_t *         Fra_FraigEquivence( Aig_Man_t * pManAig, int nConfMax, int fProve );
-/*=== fraHot.c ========================================================*/
-extern Vec_Int_t *         Fra_OneHotCompute( Fra_Man_t * p, Fra_Sml_t * pSim );
-extern void                Fra_OneHotAssume( Fra_Man_t * p, Vec_Int_t * vOneHots );
-extern void                Fra_OneHotCheck( Fra_Man_t * p, Vec_Int_t * vOneHots );
-extern int                 Fra_OneHotRefineUsingCex( Fra_Man_t * p, Vec_Int_t * vOneHots );
-extern int                 Fra_OneHotCount( Fra_Man_t * p, Vec_Int_t * vOneHots );
-extern void                Fra_OneHotEstimateCoverage( Fra_Man_t * p, Vec_Int_t * vOneHots );
-extern Aig_Man_t *         Fra_OneHotCreateExdc( Fra_Man_t * p, Vec_Int_t * vOneHots );
-extern void                Fra_OneHotAddKnownConstraint( Fra_Man_t * p, Vec_Ptr_t * vOnehots );
-/*=== fraImp.c ========================================================*/
-extern Vec_Int_t *         Fra_ImpDerive( Fra_Man_t * p, int nImpMaxLimit, int nImpUseLimit, int fLatchCorr );
-extern void                Fra_ImpAddToSolver( Fra_Man_t * p, Vec_Int_t * vImps, int * pSatVarNums );
-extern int                 Fra_ImpCheckForNode( Fra_Man_t * p, Vec_Int_t * vImps, Aig_Obj_t * pNode, int Pos );
-extern int                 Fra_ImpRefineUsingCex( Fra_Man_t * p, Vec_Int_t * vImps );
-extern void                Fra_ImpCompactArray( Vec_Int_t * vImps );
-extern double              Fra_ImpComputeStateSpaceRatio( Fra_Man_t * p );
-extern int                 Fra_ImpVerifyUsingSimulation( Fra_Man_t * p );
-extern void                Fra_ImpRecordInManager( Fra_Man_t * p, Aig_Man_t * pNew );
-/*=== fraInd.c ========================================================*/
-extern Aig_Man_t *         Fra_FraigInduction( Aig_Man_t * p, Fra_Ssw_t * pPars );
-/*=== fraIndVer.c =====================================================*/
-extern int                 Fra_InvariantVerify( Aig_Man_t * p, int nFrames, Vec_Int_t * vClauses, Vec_Int_t * vLits );
-/*=== fraLcr.c ========================================================*/
-extern Aig_Man_t *         Fra_FraigLatchCorrespondence( Aig_Man_t * pAig, int nFramesP, int nConfMax, int fProve, int fVerbose, int * pnIter, float TimeLimit );
-/*=== fraMan.c ========================================================*/
-extern void                Fra_ParamsDefault( Fra_Par_t * pParams );
-extern void                Fra_ParamsDefaultSeq( Fra_Par_t * pParams );
-extern Fra_Man_t *         Fra_ManStart( Aig_Man_t * pManAig, Fra_Par_t * pParams );
-extern void                Fra_ManClean( Fra_Man_t * p, int nNodesMax );
-extern Aig_Man_t *         Fra_ManPrepareComb( Fra_Man_t * p );
-extern void                Fra_ManFinalizeComb( Fra_Man_t * p );
-extern void                Fra_ManStop( Fra_Man_t * p );
-extern void                Fra_ManPrint( Fra_Man_t * p );
-/*=== fraSat.c ========================================================*/
-extern int                 Fra_NodesAreEquiv( Fra_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew );
-extern int                 Fra_NodesAreImp( Fra_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew, int fComplL, int fComplR );
-extern int                 Fra_NodesAreClause( Fra_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew, int fComplL, int fComplR );
-extern int                 Fra_NodeIsConst( Fra_Man_t * p, Aig_Obj_t * pNew );
-/*=== fraSec.c ========================================================*/
-extern void                Fra_SecSetDefaultParams( Fra_Sec_t * p );
-extern int                 Fra_FraigSec( Aig_Man_t * p, Fra_Sec_t * pParSec, Aig_Man_t ** ppResult );
-/*=== fraSim.c ========================================================*/
-extern int                 Fra_SmlNodeHash( Aig_Obj_t * pObj, int nTableSize );
-extern int                 Fra_SmlNodeIsConst( Aig_Obj_t * pObj );
-extern int                 Fra_SmlNodesAreEqual( Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 );
-extern int                 Fra_SmlNodeNotEquWeight( Fra_Sml_t * p, int Left, int Right );
-extern int                 Fra_SmlNodeCountOnes( Fra_Sml_t * p, Aig_Obj_t * pObj );
-extern int                 Fra_SmlCheckOutput( Fra_Man_t * p );
-extern void                Fra_SmlSavePattern( Fra_Man_t * p );
-extern void                Fra_SmlSimulate( Fra_Man_t * p, int fInit );
-extern void                Fra_SmlResimulate( Fra_Man_t * p );
-extern Fra_Sml_t *         Fra_SmlStart( Aig_Man_t * pAig, int nPref, int nFrames, int nWordsFrame );
-extern void                Fra_SmlStop( Fra_Sml_t * p );
-extern Fra_Sml_t *         Fra_SmlSimulateSeq( Aig_Man_t * pAig, int nPref, int nFrames, int nWords, int fCheckMiter );
-extern Fra_Sml_t *         Fra_SmlSimulateComb( Aig_Man_t * pAig, int nWords );
-extern Abc_Cex_t *         Fra_SmlGetCounterExample( Fra_Sml_t * p );
-extern Abc_Cex_t *         Fra_SmlCopyCounterExample( Aig_Man_t * pAig, Aig_Man_t * pFrames, int * pModel );
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/fra/fraBmc.c b/src/aig/fra/fraBmc.c
deleted file mode 100644
index 3907fcdd..00000000
--- a/src/aig/fra/fraBmc.c
+++ /dev/null
@@ -1,451 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraBmc.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    [Bounded model checking.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraBmc.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// simulation manager
-struct Fra_Bmc_t_
-{
-    // parameters
-    int              nPref;             // the size of the prefix
-    int              nDepth;            // the depth of the frames
-    int              nFramesAll;        // the total number of timeframes
-    // implications to be filtered
-    Vec_Int_t *      vImps;
-    // AIG managers
-    Aig_Man_t *      pAig;              // the original AIG manager
-    Aig_Man_t *      pAigFrames;        // initialized timeframes
-    Aig_Man_t *      pAigFraig;         // the fraiged initialized timeframes
-    // mapping of nodes
-    Aig_Obj_t **     pObjToFrames;      // mapping of the original node into frames
-    Aig_Obj_t **     pObjToFraig;       // mapping of the frames node into fraig
-};
-
-static inline Aig_Obj_t *  Bmc_ObjFrames( Aig_Obj_t * pObj, int i )                       { return ((Fra_Man_t *)pObj->pData)->pBmc->pObjToFrames[((Fra_Man_t *)pObj->pData)->pBmc->nFramesAll*pObj->Id + i];  }
-static inline void         Bmc_ObjSetFrames( Aig_Obj_t * pObj, int i, Aig_Obj_t * pNode ) { ((Fra_Man_t *)pObj->pData)->pBmc->pObjToFrames[((Fra_Man_t *)pObj->pData)->pBmc->nFramesAll*pObj->Id + i] = pNode; }
-
-static inline Aig_Obj_t *  Bmc_ObjFraig( Aig_Obj_t * pObj )                               { return ((Fra_Man_t *)pObj->pData)->pBmc->pObjToFraig[pObj->Id];  }
-static inline void         Bmc_ObjSetFraig( Aig_Obj_t * pObj, Aig_Obj_t * pNode )         { ((Fra_Man_t *)pObj->pData)->pBmc->pObjToFraig[pObj->Id] = pNode; }
-
-static inline Aig_Obj_t *  Bmc_ObjChild0Frames( Aig_Obj_t * pObj, int i ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin0(pObj)? Aig_NotCond(Bmc_ObjFrames(Aig_ObjFanin0(pObj),i), Aig_ObjFaninC0(pObj)) : NULL;  }
-static inline Aig_Obj_t *  Bmc_ObjChild1Frames( Aig_Obj_t * pObj, int i ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? Aig_NotCond(Bmc_ObjFrames(Aig_ObjFanin1(pObj),i), Aig_ObjFaninC1(pObj)) : NULL;  }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the nodes are equivalent.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_BmcNodesAreEqual( Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
-{
-    Fra_Man_t * p = (Fra_Man_t *)pObj0->pData;
-    Aig_Obj_t * pObjFrames0, * pObjFrames1;
-    Aig_Obj_t * pObjFraig0, * pObjFraig1;
-    int i;
-    for ( i = p->pBmc->nPref; i < p->pBmc->nFramesAll; i++ )
-    {
-        pObjFrames0 = Aig_Regular( Bmc_ObjFrames(pObj0, i) );
-        pObjFrames1 = Aig_Regular( Bmc_ObjFrames(pObj1, i) );
-        if ( pObjFrames0 == pObjFrames1 )
-            continue;
-        pObjFraig0 = Aig_Regular( Bmc_ObjFraig(pObjFrames0) );
-        pObjFraig1 = Aig_Regular( Bmc_ObjFraig(pObjFrames1) );
-        if ( pObjFraig0 != pObjFraig1 )
-            return 0;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the node is costant.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_BmcNodeIsConst( Aig_Obj_t * pObj )
-{
-    Fra_Man_t * p = (Fra_Man_t *)pObj->pData;
-    return Fra_BmcNodesAreEqual( pObj, Aig_ManConst1(p->pManAig) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Refines implications using BMC.]
-
-  Description [The input is the combinational FRAIG manager,
-  which is used to FRAIG the timeframes. ]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_BmcFilterImplications( Fra_Man_t * p, Fra_Bmc_t * pBmc )
-{
-    Aig_Obj_t * pLeft, * pRight;
-    Aig_Obj_t * pLeftT, * pRightT;
-    Aig_Obj_t * pLeftF, * pRightF;
-    int i, f, Imp, Left, Right;
-    int fComplL, fComplR;
-    assert( p->nFramesAll == 1 );
-    assert( p->pManAig == pBmc->pAigFrames );
-    Vec_IntForEachEntry( pBmc->vImps, Imp, i )
-    {
-        if ( Imp == 0 )
-            continue;
-        Left  = Fra_ImpLeft(Imp);
-        Right = Fra_ImpRight(Imp);
-        // get the corresponding nodes
-        pLeft  = Aig_ManObj( pBmc->pAig, Left );
-        pRight = Aig_ManObj( pBmc->pAig, Right );
-        // iterate through the timeframes
-        for ( f = pBmc->nPref; f < pBmc->nFramesAll; f++ )
-        {
-            // get timeframe nodes
-            pLeftT  = Bmc_ObjFrames( pLeft, f );
-            pRightT = Bmc_ObjFrames( pRight, f );
-            // get the corresponding FRAIG nodes
-            pLeftF  = Fra_ObjFraig( Aig_Regular(pLeftT), 0 );
-            pRightF = Fra_ObjFraig( Aig_Regular(pRightT), 0 );
-            // get the complemented attributes
-            fComplL = pLeft->fPhase ^ Aig_IsComplement(pLeftF) ^ Aig_IsComplement(pLeftT);
-            fComplR = pRight->fPhase ^ Aig_IsComplement(pRightF) ^ Aig_IsComplement(pRightT);
-            // check equality
-            if ( Aig_Regular(pLeftF) == Aig_Regular(pRightF) )
-            {
-                if ( fComplL == fComplR ) // x => x  - always true
-                    continue;
-                assert( fComplL != fComplR );
-                // consider 4 possibilities:
-                // NOT(1) => 1    or   0 => 1  - always true
-                // 1 => NOT(1)    or   1 => 0  - never true
-                // NOT(x) => x    or   x       - not always true
-                // x => NOT(x)    or   NOT(x)  - not always true
-                if ( Aig_ObjIsConst1(Aig_Regular(pLeftF)) && fComplL ) // proved implication
-                    continue;
-                // disproved implication
-                Vec_IntWriteEntry( pBmc->vImps, i, 0 ); 
-                break;
-            }
-            // check the implication 
-            if ( Fra_NodesAreImp( p, Aig_Regular(pLeftF), Aig_Regular(pRightF), fComplL, fComplR ) != 1 )
-            {
-                Vec_IntWriteEntry( pBmc->vImps, i, 0 );
-                break;
-            }
-        }
-    }
-    Fra_ImpCompactArray( pBmc->vImps );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the BMC manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Fra_Bmc_t * Fra_BmcStart( Aig_Man_t * pAig, int nPref, int nDepth )
-{
-    Fra_Bmc_t * p;
-    p = ABC_ALLOC( Fra_Bmc_t, 1 );
-    memset( p, 0, sizeof(Fra_Bmc_t) );
-    p->pAig = pAig;
-    p->nPref = nPref;
-    p->nDepth = nDepth;
-    p->nFramesAll = nPref + nDepth;
-    p->pObjToFrames  = ABC_ALLOC( Aig_Obj_t *, p->nFramesAll * Aig_ManObjNumMax(pAig) );
-    memset( p->pObjToFrames, 0, sizeof(Aig_Obj_t *) * p->nFramesAll * Aig_ManObjNumMax(pAig) );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the BMC manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_BmcStop( Fra_Bmc_t * p )
-{
-    Aig_ManStop( p->pAigFrames );
-    if ( p->pAigFraig )
-        Aig_ManStop( p->pAigFraig );
-    ABC_FREE( p->pObjToFrames );
-    ABC_FREE( p->pObjToFraig );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Constructs initialized timeframes of the AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Fra_BmcFrames( Fra_Bmc_t * p, int fKeepPos )
-{
-    Aig_Man_t * pAigFrames;
-    Aig_Obj_t * pObj, * pObjNew;
-    Aig_Obj_t ** pLatches;
-    int i, k, f;
-
-    // start the fraig package
-    pAigFrames = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * p->nFramesAll );
-    pAigFrames->pName = Aig_UtilStrsav( p->pAig->pName );
-    pAigFrames->pSpec = Aig_UtilStrsav( p->pAig->pSpec );
-    // create PI nodes for the frames
-    for ( f = 0; f < p->nFramesAll; f++ )
-        Bmc_ObjSetFrames( Aig_ManConst1(p->pAig), f, Aig_ManConst1(pAigFrames) );
-    for ( f = 0; f < p->nFramesAll; f++ )
-        Aig_ManForEachPiSeq( p->pAig, pObj, i )
-            Bmc_ObjSetFrames( pObj, f, Aig_ObjCreatePi(pAigFrames) );
-    // set initial state for the latches
-    Aig_ManForEachLoSeq( p->pAig, pObj, i )
-        Bmc_ObjSetFrames( pObj, 0, Aig_ManConst0(pAigFrames) );
-
-    // add timeframes
-    pLatches = ABC_ALLOC( Aig_Obj_t *, Aig_ManRegNum(p->pAig) );
-    for ( f = 0; f < p->nFramesAll; f++ )
-    {
-        // add internal nodes of this frame
-        Aig_ManForEachNode( p->pAig, pObj, i )
-        {
-            pObjNew = Aig_And( pAigFrames, Bmc_ObjChild0Frames(pObj,f), Bmc_ObjChild1Frames(pObj,f) );
-            Bmc_ObjSetFrames( pObj, f, pObjNew );
-        }
-        if ( f == p->nFramesAll - 1 )
-            break;
-        // save the latch input values
-        k = 0;
-        Aig_ManForEachLiSeq( p->pAig, pObj, i )
-            pLatches[k++] = Bmc_ObjChild0Frames(pObj,f);
-        assert( k == Aig_ManRegNum(p->pAig) );
-        // insert them to the latch output values
-        k = 0;
-        Aig_ManForEachLoSeq( p->pAig, pObj, i )
-            Bmc_ObjSetFrames( pObj, f+1, pLatches[k++] );
-        assert( k == Aig_ManRegNum(p->pAig) );
-    }
-    ABC_FREE( pLatches );
-    if ( fKeepPos )
-    {
-        for ( f = 0; f < p->nFramesAll; f++ )
-            Aig_ManForEachPoSeq( p->pAig, pObj, i )
-                Aig_ObjCreatePo( pAigFrames, Bmc_ObjChild0Frames(pObj,f) );
-        Aig_ManCleanup( pAigFrames );
-    }
-    else
-    {
-        // add POs to all the dangling nodes
-        Aig_ManForEachObj( pAigFrames, pObjNew, i )
-            if ( Aig_ObjIsNode(pObjNew) && pObjNew->nRefs == 0 )
-                Aig_ObjCreatePo( pAigFrames, pObjNew );
-    }
-    // return the new manager
-    return pAigFrames;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs BMC for the given AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_BmcPerform( Fra_Man_t * p, int nPref, int nDepth )
-{
-    Aig_Obj_t * pObj;
-    int i, nImpsOld = 0, clk = clock();
-    assert( p->pBmc == NULL );
-    // derive and fraig the frames
-    p->pBmc = Fra_BmcStart( p->pManAig, nPref, nDepth );
-    p->pBmc->pAigFrames = Fra_BmcFrames( p->pBmc, 0 );
-    // if implications are present, configure the AIG manager to check them
-    if ( p->pCla->vImps )
-    {
-        p->pBmc->pAigFrames->pImpFunc = (void (*) (void*, void*))Fra_BmcFilterImplications;
-        p->pBmc->pAigFrames->pImpData = p->pBmc;
-        p->pBmc->vImps = p->pCla->vImps;
-        nImpsOld = Vec_IntSize(p->pCla->vImps);
-    } 
-    p->pBmc->pAigFraig = Fra_FraigEquivence( p->pBmc->pAigFrames, 1000000, 0 );
-    p->pBmc->pObjToFraig = p->pBmc->pAigFrames->pObjCopies;
-    p->pBmc->pAigFrames->pObjCopies = NULL;
-    // annotate frames nodes with pointers to the manager
-    Aig_ManForEachObj( p->pBmc->pAigFrames, pObj, i )
-        pObj->pData = p;
-    // report the results
-    if ( p->pPars->fVerbose )
-    {
-        printf( "Original AIG = %d. Init %d frames = %d. Fraig = %d.  ", 
-            Aig_ManNodeNum(p->pBmc->pAig), p->pBmc->nFramesAll, 
-            Aig_ManNodeNum(p->pBmc->pAigFrames), Aig_ManNodeNum(p->pBmc->pAigFraig) );
-        ABC_PRT( "Time", clock() - clk );
-        printf( "Before BMC: " );  
-//        Fra_ClassesPrint( p->pCla, 0 );
-        printf( "Const = %5d. Class = %5d. Lit = %5d. ", 
-            Vec_PtrSize(p->pCla->vClasses1), Vec_PtrSize(p->pCla->vClasses), Fra_ClassesCountLits(p->pCla) );
-        if ( p->pCla->vImps )
-            printf( "Imp = %5d. ", nImpsOld );
-        printf( "\n" );
-    }
-    // refine the classes
-    p->pCla->pFuncNodeIsConst   = Fra_BmcNodeIsConst;
-    p->pCla->pFuncNodesAreEqual = Fra_BmcNodesAreEqual;
-    Fra_ClassesRefine( p->pCla );
-    Fra_ClassesRefine1( p->pCla, 1, NULL );
-    p->pCla->pFuncNodeIsConst   = Fra_SmlNodeIsConst;
-    p->pCla->pFuncNodesAreEqual = Fra_SmlNodesAreEqual;
-    // report the results
-    if ( p->pPars->fVerbose )
-    {
-        printf( "After  BMC: " );  
-//        Fra_ClassesPrint( p->pCla, 0 );
-        printf( "Const = %5d. Class = %5d. Lit = %5d. ", 
-            Vec_PtrSize(p->pCla->vClasses1), Vec_PtrSize(p->pCla->vClasses), Fra_ClassesCountLits(p->pCla) );
-        if ( p->pCla->vImps )
-            printf( "Imp = %5d. ", Vec_IntSize(p->pCla->vImps) );
-        printf( "\n" );
-    }
-    // free the BMC manager
-    Fra_BmcStop( p->pBmc );  
-    p->pBmc = NULL;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs BMC for the given AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_BmcPerformSimple( Aig_Man_t * pAig, int nFrames, int nBTLimit, int fRewrite, int fVerbose )
-{
-    extern Fra_Man_t * Fra_LcrAigPrepare( Aig_Man_t * pAig );
-    Fra_Man_t * pTemp;
-    Fra_Bmc_t * pBmc;
-    Aig_Man_t * pAigTemp;
-    int clk, iOutput;
-    // derive and fraig the frames
-    clk = clock();
-    pBmc = Fra_BmcStart( pAig, 0, nFrames );
-    pTemp = Fra_LcrAigPrepare( pAig );
-    pTemp->pBmc = pBmc;
-    pBmc->pAigFrames = Fra_BmcFrames( pBmc, 1 );
-    if ( fVerbose )
-    {
-        printf( "AIG:  PI/PO/Reg = %d/%d/%d.  Node = %6d. Lev = %5d.\n", 
-            Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig), Aig_ManPoNum(pAig)-Aig_ManRegNum(pAig), Aig_ManRegNum(pAig),
-            Aig_ManNodeNum(pAig), Aig_ManLevelNum(pAig) );
-        printf( "Time-frames (%d):  PI/PO = %d/%d.  Node = %6d. Lev = %5d.  ", 
-            nFrames, Aig_ManPiNum(pBmc->pAigFrames), Aig_ManPoNum(pBmc->pAigFrames), 
-            Aig_ManNodeNum(pBmc->pAigFrames), Aig_ManLevelNum(pBmc->pAigFrames) );
-        ABC_PRT( "Time", clock() - clk );
-    }
-    if ( fRewrite )
-    {
-        clk = clock();
-        pBmc->pAigFrames = Dar_ManRwsat( pAigTemp = pBmc->pAigFrames, 1, 0 );
-        Aig_ManStop( pAigTemp );
-        if ( fVerbose )
-        {
-            printf( "Time-frames after rewriting:  Node = %6d. Lev = %5d.  ", 
-                Aig_ManNodeNum(pBmc->pAigFrames), Aig_ManLevelNum(pBmc->pAigFrames) );
-            ABC_PRT( "Time", clock() - clk );
-        }
-    }
-    clk = clock();
-    iOutput = Fra_FraigMiterAssertedOutput( pBmc->pAigFrames );
-    if ( iOutput >= 0 )
-        pAig->pSeqModel = Abc_CexMakeTriv( Aig_ManRegNum(pAig), Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig), Aig_ManPoNum(pAig)-Aig_ManRegNum(pAig), iOutput );
-    else
-    {
-        pBmc->pAigFraig = Fra_FraigEquivence( pBmc->pAigFrames, nBTLimit, 1 );
-        iOutput = Fra_FraigMiterAssertedOutput( pBmc->pAigFraig );
-        if ( pBmc->pAigFraig->pData )
-        {
-            pAig->pSeqModel = Fra_SmlCopyCounterExample( pAig, pBmc->pAigFrames, (int *)pBmc->pAigFraig->pData );
-            ABC_FREE( pBmc->pAigFraig->pData );
-        }
-        else if ( iOutput >= 0 )
-            pAig->pSeqModel = Abc_CexMakeTriv( Aig_ManRegNum(pAig), Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig), Aig_ManPoNum(pAig)-Aig_ManRegNum(pAig), iOutput );
-    }
-    if ( fVerbose )
-    {
-        printf( "Fraiged init frames: Node = %6d. Lev = %5d.  ", 
-            pBmc->pAigFraig? Aig_ManNodeNum(pBmc->pAigFraig) : -1,
-            pBmc->pAigFraig? Aig_ManLevelNum(pBmc->pAigFraig) : -1 );
-        ABC_PRT( "Time", clock() - clk );
-    }
-    Fra_BmcStop( pBmc );  
-    ABC_FREE( pTemp );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraCec.c b/src/aig/fra/fraCec.c
deleted file mode 100644
index c52f4308..00000000
--- a/src/aig/fra/fraCec.c
+++ /dev/null
@@ -1,516 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraCec.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    [CEC engined based on fraiging.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraCec.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-#include "cnf.h"
-#include "satSolver2.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_FraigSat( Aig_Man_t * pMan, ABC_INT64_T nConfLimit, ABC_INT64_T nInsLimit, int fFlipBits, int fAndOuts, int fNewSolver, int fVerbose )
-{
-    if ( fNewSolver )
-    {
-        extern void * Cnf_DataWriteIntoSolver2( Cnf_Dat_t * p, int nFrames, int fInit );
-        extern int    Cnf_DataWriteOrClause2( void * pSat, Cnf_Dat_t * pCnf );
-
-        sat_solver2 * pSat;
-        Cnf_Dat_t * pCnf;
-        int status, RetValue, clk = clock();
-        Vec_Int_t * vCiIds;
-
-        assert( Aig_ManRegNum(pMan) == 0 );
-        pMan->pData = NULL;
-
-        // derive CNF
-        pCnf = Cnf_Derive( pMan, Aig_ManPoNum(pMan) );
-    //    pCnf = Cnf_DeriveSimple( pMan, Aig_ManPoNum(pMan) );
-
-        if ( fFlipBits ) 
-            Cnf_DataTranformPolarity( pCnf, 0 );
-
-        // convert into SAT solver
-        pSat = (sat_solver2 *)Cnf_DataWriteIntoSolver2( pCnf, 1, 0 );
-        if ( pSat == NULL )
-        {
-            Cnf_DataFree( pCnf );
-            return 1;
-        }
-
-
-        if ( fAndOuts )
-        {
-            // assert each output independently
-            if ( !Cnf_DataWriteAndClauses( pSat, pCnf ) )
-            {
-                sat_solver2_delete( pSat );
-                Cnf_DataFree( pCnf );
-                return 1;
-            }
-        }
-        else
-        {
-            // add the OR clause for the outputs
-            if ( !Cnf_DataWriteOrClause2( pSat, pCnf ) )
-            {
-                sat_solver2_delete( pSat );
-                Cnf_DataFree( pCnf );
-                return 1;
-            }
-        }
-        vCiIds = Cnf_DataCollectPiSatNums( pCnf, pMan );
-        Cnf_DataFree( pCnf );
-
-
-        printf( "Created SAT problem with %d variable and %d clauses. ", sat_solver2_nvars(pSat), sat_solver2_nclauses(pSat) );
-        ABC_PRT( "Time", clock() - clk );
-
-        // simplify the problem
-        clk = clock();
-        status = sat_solver2_simplify(pSat);
-//        printf( "Simplified the problem to %d variables and %d clauses. ", sat_solver2_nvars(pSat), sat_solver2_nclauses(pSat) );
-//        ABC_PRT( "Time", clock() - clk );
-        if ( status == 0 )
-        {
-            Vec_IntFree( vCiIds );
-            sat_solver2_delete( pSat );
-    //        printf( "The problem is UNSATISFIABLE after simplification.\n" );
-            return 1;
-        }
-
-        // solve the miter
-        clk = clock();
-        if ( fVerbose )
-            pSat->verbosity = 1;
-        status = sat_solver2_solve( pSat, NULL, NULL, (ABC_INT64_T)nConfLimit, (ABC_INT64_T)nInsLimit, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-        if ( status == l_Undef )
-        {
-    //        printf( "The problem timed out.\n" );
-            RetValue = -1;
-        }
-        else if ( status == l_True )
-        {
-    //        printf( "The problem is SATISFIABLE.\n" );
-            RetValue = 0;
-        }
-        else if ( status == l_False )
-        {
-    //        printf( "The problem is UNSATISFIABLE.\n" );
-            RetValue = 1;
-        }
-        else
-            assert( 0 );
-
-    //    Abc_Print( 1, "The number of conflicts = %6d.  ", (int)pSat->stats.conflicts );
-    //    Abc_PrintTime( 1, "Solving time", clock() - clk );
- 
-        // if the problem is SAT, get the counterexample
-        if ( status == l_True )
-        {
-            pMan->pData = Sat_Solver2GetModel( pSat, vCiIds->pArray, vCiIds->nSize );
-        }
-        // free the sat_solver2
-        if ( fVerbose )
-            Sat_Solver2PrintStats( stdout, pSat );
-    //sat_solver2_store_write( pSat, "trace.cnf" );
-    //sat_solver2_store_free( pSat );
-        sat_solver2_delete( pSat );
-        Vec_IntFree( vCiIds );
-        return RetValue;
-    }
-    else
-    {
-        sat_solver * pSat;
-        Cnf_Dat_t * pCnf;
-        int status, RetValue, clk = clock();
-        Vec_Int_t * vCiIds;
-
-        assert( Aig_ManRegNum(pMan) == 0 );
-        pMan->pData = NULL;
-
-        // derive CNF
-        pCnf = Cnf_Derive( pMan, Aig_ManPoNum(pMan) );
-    //    pCnf = Cnf_DeriveSimple( pMan, Aig_ManPoNum(pMan) );
-
-        if ( fFlipBits ) 
-            Cnf_DataTranformPolarity( pCnf, 0 );
-
-        // convert into SAT solver
-        pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
-        if ( pSat == NULL )
-        {
-            Cnf_DataFree( pCnf );
-            return 1;
-        }
-
-
-        if ( fAndOuts )
-        {
-            // assert each output independently
-            if ( !Cnf_DataWriteAndClauses( pSat, pCnf ) )
-            {
-                sat_solver_delete( pSat );
-                Cnf_DataFree( pCnf );
-                return 1;
-            }
-        }
-        else
-        {
-            // add the OR clause for the outputs
-            if ( !Cnf_DataWriteOrClause( pSat, pCnf ) )
-            {
-                sat_solver_delete( pSat );
-                Cnf_DataFree( pCnf );
-                return 1;
-            }
-        }
-        vCiIds = Cnf_DataCollectPiSatNums( pCnf, pMan );
-        Cnf_DataFree( pCnf );
-
-
-    //    printf( "Created SAT problem with %d variable and %d clauses. ", sat_solver_nvars(pSat), sat_solver_nclauses(pSat) );
-    //    ABC_PRT( "Time", clock() - clk );
-
-        // simplify the problem
-        clk = clock();
-        status = sat_solver_simplify(pSat);
-    //    printf( "Simplified the problem to %d variables and %d clauses. ", sat_solver_nvars(pSat), sat_solver_nclauses(pSat) );
-    //    ABC_PRT( "Time", clock() - clk );
-        if ( status == 0 )
-        {
-            Vec_IntFree( vCiIds );
-            sat_solver_delete( pSat );
-    //        printf( "The problem is UNSATISFIABLE after simplification.\n" );
-            return 1;
-        }
-
-        // solve the miter
-        clk = clock();
-        if ( fVerbose )
-            pSat->verbosity = 1;
-        status = sat_solver_solve( pSat, NULL, NULL, (ABC_INT64_T)nConfLimit, (ABC_INT64_T)nInsLimit, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-        if ( status == l_Undef )
-        {
-    //        printf( "The problem timed out.\n" );
-            RetValue = -1;
-        }
-        else if ( status == l_True )
-        {
-    //        printf( "The problem is SATISFIABLE.\n" );
-            RetValue = 0;
-        }
-        else if ( status == l_False )
-        {
-    //        printf( "The problem is UNSATISFIABLE.\n" );
-            RetValue = 1;
-        }
-        else
-            assert( 0 );
-
-    //    Abc_Print( 1, "The number of conflicts = %6d.  ", (int)pSat->stats.conflicts );
-    //    Abc_PrintTime( 1, "Solving time", clock() - clk );
- 
-        // if the problem is SAT, get the counterexample
-        if ( status == l_True )
-        {
-            pMan->pData = Sat_SolverGetModel( pSat, vCiIds->pArray, vCiIds->nSize );
-        }
-        // free the sat_solver
-        if ( fVerbose )
-            Sat_SolverPrintStats( stdout, pSat );
-    //sat_solver_store_write( pSat, "trace.cnf" );
-    //sat_solver_store_free( pSat );
-        sat_solver_delete( pSat );
-        Vec_IntFree( vCiIds );
-        return RetValue;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_FraigCec( Aig_Man_t ** ppAig, int nConfLimit, int fVerbose )
-{
-    int nBTLimitStart =        300;   // starting SAT run
-    int nBTLimitFirst =          2;   // first fraiging iteration
-    int nBTLimitLast  = nConfLimit;   // the last-gasp SAT run
-
-    Fra_Par_t Params, * pParams = &Params;
-    Aig_Man_t * pAig = *ppAig, * pTemp;
-    int i, RetValue, clk;
-
-    // report the original miter
-    if ( fVerbose )
-    {
-        printf( "Original miter:   Nodes = %6d.\n", Aig_ManNodeNum(pAig) );
-    }
-    RetValue = Fra_FraigMiterStatus( pAig );
-//    assert( RetValue == -1 );
-    if ( RetValue == 0 )
-    {
-        pAig->pData = ABC_ALLOC( int, Aig_ManPiNum(pAig) );
-        memset( pAig->pData, 0, sizeof(int) * Aig_ManPiNum(pAig) );
-        return RetValue;
-    }
-
-    // if SAT only, solve without iteration
-clk = clock();
-    RetValue = Fra_FraigSat( pAig, (ABC_INT64_T)2*nBTLimitStart, (ABC_INT64_T)0, 1, 0, 0, 0 );
-    if ( fVerbose )
-    {
-        printf( "Initial SAT:      Nodes = %6d.  ", Aig_ManNodeNum(pAig) );
-ABC_PRT( "Time", clock() - clk );
-    }
-    if ( RetValue >= 0 )
-        return RetValue;
-
-    // duplicate the AIG
-clk = clock();
-    pAig = Dar_ManRwsat( pTemp = pAig, 1, 0 );
-    Aig_ManStop( pTemp );
-    if ( fVerbose )
-    {
-        printf( "Rewriting:        Nodes = %6d.  ", Aig_ManNodeNum(pAig) );
-ABC_PRT( "Time", clock() - clk );
-    }
-
-    // perform the loop
-    Fra_ParamsDefault( pParams );
-    pParams->nBTLimitNode = nBTLimitFirst;
-    pParams->nBTLimitMiter = nBTLimitStart;
-    pParams->fDontShowBar = 1;
-    pParams->fProve = 1;
-    for ( i = 0; i < 6; i++ )
-    {
-//printf( "Running fraiging with %d BTnode and %d BTmiter.\n", pParams->nBTLimitNode, pParams->nBTLimitMiter );
-        // run fraiging
-clk = clock();
-        pAig = Fra_FraigPerform( pTemp = pAig, pParams );
-        Aig_ManStop( pTemp );
-        if ( fVerbose )
-        {
-            printf( "Fraiging (i=%d):   Nodes = %6d.  ", i+1, Aig_ManNodeNum(pAig) );
-ABC_PRT( "Time", clock() - clk );
-        }
-
-        // check the miter status
-        RetValue = Fra_FraigMiterStatus( pAig );
-        if ( RetValue >= 0 )
-            break;
-
-        // perform rewriting
-clk = clock();
-        pAig = Dar_ManRewriteDefault( pTemp = pAig );
-        Aig_ManStop( pTemp );
-        if ( fVerbose )
-        {
-            printf( "Rewriting:        Nodes = %6d.  ", Aig_ManNodeNum(pAig) );
-ABC_PRT( "Time", clock() - clk );
-        } 
-
-        // check the miter status
-        RetValue = Fra_FraigMiterStatus( pAig );
-        if ( RetValue >= 0 )
-            break;
-        // try simulation
-
-        // set the parameters for the next run
-        pParams->nBTLimitNode = 8 * pParams->nBTLimitNode;
-        pParams->nBTLimitMiter = 2 * pParams->nBTLimitMiter;
-    }
-
-    // if still unsolved try last gasp
-    if ( RetValue == -1 )
-    {
-clk = clock();
-        RetValue = Fra_FraigSat( pAig, (ABC_INT64_T)nBTLimitLast, (ABC_INT64_T)0, 1, 0, 0, 0 );
-        if ( fVerbose )
-        {
-            printf( "Final SAT:            Nodes = %6d.  ", Aig_ManNodeNum(pAig) );
-ABC_PRT( "Time", clock() - clk );
-        }
-    }
-
-    *ppAig = pAig;
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_FraigCecPartitioned( Aig_Man_t * pMan1, Aig_Man_t * pMan2, int nConfLimit, int nPartSize, int fSmart, int fVerbose )
-{
-    Aig_Man_t * pAig;
-    Vec_Ptr_t * vParts;
-    int i, RetValue = 1, nOutputs;
-    // create partitions
-    vParts = Aig_ManMiterPartitioned( pMan1, pMan2, nPartSize, fSmart );
-    // solve the partitions
-    nOutputs = -1;
-    Vec_PtrForEachEntry( Aig_Man_t *, vParts, pAig, i )
-    {
-        nOutputs++;
-        if ( fVerbose )
-        {
-            printf( "Verifying part %4d  (out of %4d)  PI = %5d. PO = %5d. And = %6d. Lev = %4d.\r", 
-                i+1, Vec_PtrSize(vParts), Aig_ManPiNum(pAig), Aig_ManPoNum(pAig), 
-                Aig_ManNodeNum(pAig), Aig_ManLevelNum(pAig) );
-            fflush( stdout );
-        }
-        RetValue = Fra_FraigMiterStatus( pAig );
-        if ( RetValue == 1 )
-            continue;
-        if ( RetValue == 0 )
-            break;
-        RetValue = Fra_FraigCec( &pAig, nConfLimit, 0 );
-        Vec_PtrWriteEntry( vParts, i, pAig );
-        if ( RetValue == 1 )
-            continue;
-        if ( RetValue == 0 )
-            break;
-        break;
-    }
-    // clear the result
-    if ( fVerbose )
-    {
-        printf( "                                                                                          \r" );
-        fflush( stdout );
-    }
-    // report the timeout
-    if ( RetValue == -1 )
-    {
-        printf( "Timed out after verifying %d partitions (out of %d).\n", nOutputs, Vec_PtrSize(vParts) );
-        fflush( stdout );
-    }
-    // free intermediate results
-    Vec_PtrForEachEntry( Aig_Man_t *, vParts, pAig, i )
-        Aig_ManStop( pAig );
-    Vec_PtrFree( vParts );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_FraigCecTop( Aig_Man_t * pMan1, Aig_Man_t * pMan2, int nConfLimit, int nPartSize, int fSmart, int fVerbose )
-{
-    Aig_Man_t * pTemp;
-    //Abc_NtkDarCec( pNtk1, pNtk2, fPartition, fVerbose );
-    int RetValue, clkTotal = clock();
-
-    if ( Aig_ManPiNum(pMan1) != Aig_ManPiNum(pMan1) )
-    {
-        printf( "Abc_CommandAbc8Cec(): Miters have different number of PIs.\n" );
-        return 0;
-    }
-    if ( Aig_ManPoNum(pMan1) != Aig_ManPoNum(pMan1) )
-    {
-        printf( "Abc_CommandAbc8Cec(): Miters have different number of POs.\n" );
-        return 0;
-    }
-    assert( Aig_ManPiNum(pMan1) == Aig_ManPiNum(pMan1) );
-    assert( Aig_ManPoNum(pMan1) == Aig_ManPoNum(pMan1) );
-
-    // make sure that the first miter has more nodes
-    if ( Aig_ManNodeNum(pMan1) < Aig_ManNodeNum(pMan2) )
-    {
-        pTemp = pMan1;
-        pMan1 = pMan2;
-        pMan2 = pTemp;
-    }
-    assert( Aig_ManNodeNum(pMan1) >= Aig_ManNodeNum(pMan2) );
-
-    if ( nPartSize )
-        RetValue = Fra_FraigCecPartitioned( pMan1, pMan2, nConfLimit, nPartSize, fSmart, fVerbose );
-    else // no partitioning
-        RetValue = Fra_FraigCecPartitioned( pMan1, pMan2, nConfLimit, Aig_ManPoNum(pMan1), 0, fVerbose );
-
-    // report the miter
-    if ( RetValue == 1 )
-    {
-        printf( "Networks are equivalent.   " );
-ABC_PRT( "Time", clock() - clkTotal );
-    }
-    else if ( RetValue == 0 )
-    {
-        printf( "Networks are NOT EQUIVALENT.   " );
-ABC_PRT( "Time", clock() - clkTotal );
-    }
-    else
-    {
-        printf( "Networks are UNDECIDED.   " );
-ABC_PRT( "Time", clock() - clkTotal );
-    }
-    fflush( stdout );
-    return RetValue;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraClass.c b/src/aig/fra/fraClass.c
deleted file mode 100644
index 8cf2a54d..00000000
--- a/src/aig/fra/fraClass.c
+++ /dev/null
@@ -1,862 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraClass.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraClass.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-/*
-    The candidate equivalence classes are stored as a vector of pointers 
-    to the array of pointers to the nodes in each class.
-    The first node of the class is its representative node.
-    The representative has the smallest topological order among the class nodes.
-    The nodes inside each class are ordered according to their topological order.
-    The classes are ordered according to the topological order of their representatives.
-    The array of pointers to the class nodes is terminated with a NULL pointer.
-    To enable dynamic addition of new classes (during class refinement),
-    each array has at least as many NULLs in the end, as there are nodes in the class.
-*/
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static inline Aig_Obj_t *  Fra_ObjNext( Aig_Obj_t ** ppNexts, Aig_Obj_t * pObj )                       { return ppNexts[pObj->Id];  }
-static inline void         Fra_ObjSetNext( Aig_Obj_t ** ppNexts, Aig_Obj_t * pObj, Aig_Obj_t * pNext ) { ppNexts[pObj->Id] = pNext; }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Starts representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Fra_Cla_t * Fra_ClassesStart( Aig_Man_t * pAig )
-{
-    Fra_Cla_t * p;
-    p = ABC_ALLOC( Fra_Cla_t, 1 );
-    memset( p, 0, sizeof(Fra_Cla_t) );
-    p->pAig = pAig;
-    p->pMemRepr  = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
-    memset( p->pMemRepr, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(pAig) );
-    p->vClasses     = Vec_PtrAlloc( 100 );
-    p->vClasses1    = Vec_PtrAlloc( 100 );
-    p->vClassesTemp = Vec_PtrAlloc( 100 );
-    p->vClassOld    = Vec_PtrAlloc( 100 );
-    p->vClassNew    = Vec_PtrAlloc( 100 );
-    p->pFuncNodeHash      = Fra_SmlNodeHash;
-    p->pFuncNodeIsConst   = Fra_SmlNodeIsConst;
-    p->pFuncNodesAreEqual = Fra_SmlNodesAreEqual;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stop representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClassesStop( Fra_Cla_t * p )
-{
-    ABC_FREE( p->pMemClasses );
-    ABC_FREE( p->pMemRepr );
-    if ( p->vClassesTemp ) Vec_PtrFree( p->vClassesTemp );
-    if ( p->vClassNew )    Vec_PtrFree( p->vClassNew );
-    if ( p->vClassOld )    Vec_PtrFree( p->vClassOld );
-    if ( p->vClasses1 )    Vec_PtrFree( p->vClasses1 );
-    if ( p->vClasses )     Vec_PtrFree( p->vClasses );
-    if ( p->vImps )        Vec_IntFree( p->vImps );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClassesCopyReprs( Fra_Cla_t * p, Vec_Ptr_t * vFailed )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManReprStart( p->pAig, Aig_ManObjNumMax(p->pAig) );
-    memmove( p->pAig->pReprs, p->pMemRepr, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p->pAig) );
-    if ( Vec_PtrSize(p->vClasses1) == 0 && Vec_PtrSize(p->vClasses) == 0 )
-    {
-        Aig_ManForEachObj( p->pAig, pObj, i )
-        {
-            if ( p->pAig->pReprs[i] != NULL )
-                printf( "Classes are not cleared!\n" );
-            assert( p->pAig->pReprs[i] == NULL );
-        }
-    }
-    if ( vFailed )
-        Vec_PtrForEachEntry( Aig_Obj_t *, vFailed, pObj, i )
-            p->pAig->pReprs[pObj->Id] = NULL;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints simulation classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClassCount( Aig_Obj_t ** pClass )
-{
-    Aig_Obj_t * pTemp;
-    int i;
-    for ( i = 0; (pTemp = pClass[i]); i++ );
-    return i;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Count the number of literals.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClassesCountLits( Fra_Cla_t * p )
-{
-    Aig_Obj_t ** pClass;
-    int i, nNodes, nLits = 0;
-    nLits = Vec_PtrSize( p->vClasses1 );
-    Vec_PtrForEachEntry( Aig_Obj_t **, p->vClasses, pClass, i )
-    {
-        nNodes = Fra_ClassCount( pClass );
-        assert( nNodes > 1 );
-        nLits += nNodes - 1;
-    }
-    return nLits;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Count the number of pairs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClassesCountPairs( Fra_Cla_t * p )
-{
-    Aig_Obj_t ** pClass;
-    int i, nNodes, nPairs = 0;
-    Vec_PtrForEachEntry( Aig_Obj_t **, p->vClasses, pClass, i )
-    {
-        nNodes = Fra_ClassCount( pClass );
-        assert( nNodes > 1 );
-        nPairs += nNodes * (nNodes - 1) / 2;
-    }
-    return nPairs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints simulation classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_PrintClass( Fra_Cla_t * p, Aig_Obj_t ** pClass )
-{
-    Aig_Obj_t * pTemp;
-    int i;
-    for ( i = 1; (pTemp = pClass[i]); i++ )
-        assert( Fra_ClassObjRepr(pTemp) == pClass[0] );
-    printf( "{ " );
-    for ( i = 0; (pTemp = pClass[i]); i++ )
-        printf( "%d(%d,%d) ", pTemp->Id, pTemp->Level, Aig_SupportSize(p->pAig,pTemp) );
-    printf( "}\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints simulation classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClassesPrint( Fra_Cla_t * p, int fVeryVerbose )
-{
-    Aig_Obj_t ** pClass;
-    Aig_Obj_t * pObj;
-    int i;
-
-    printf( "Const = %5d. Class = %5d. Lit = %5d. ", 
-        Vec_PtrSize(p->vClasses1), Vec_PtrSize(p->vClasses), Fra_ClassesCountLits(p) );
-    if ( p->vImps && Vec_IntSize(p->vImps) > 0 )
-        printf( "Imp = %5d. ", Vec_IntSize(p->vImps) );
-    printf( "\n" );
-
-    if ( fVeryVerbose )
-    {
-        Vec_PtrForEachEntry( Aig_Obj_t *, p->vClasses1, pObj, i )
-            assert( Fra_ClassObjRepr(pObj) == Aig_ManConst1(p->pAig) );
-        printf( "Constants { " );
-        Vec_PtrForEachEntry( Aig_Obj_t *, p->vClasses1, pObj, i )
-            printf( "%d(%d,%d) ", pObj->Id, pObj->Level, Aig_SupportSize(p->pAig,pObj) );
-        printf( "}\n" );
-        Vec_PtrForEachEntry( Aig_Obj_t **, p->vClasses, pClass, i )
-        {
-            printf( "%3d (%3d) : ", i, Fra_ClassCount(pClass) );
-            Fra_PrintClass( p, pClass );
-        }
-        printf( "\n" );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates initial simulation classes.]
-
-  Description [Assumes that simulation info is assigned.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClassesPrepare( Fra_Cla_t * p, int fLatchCorr, int nMaxLevs )
-{
-    Aig_Obj_t ** ppTable, ** ppNexts;
-    Aig_Obj_t * pObj, * pTemp;
-    int i, k, nTableSize, nEntries, nNodes, iEntry;
-
-    // allocate the hash table hashing simulation info into nodes
-    nTableSize = Aig_PrimeCudd( Aig_ManObjNumMax(p->pAig) );
-    ppTable = ABC_FALLOC( Aig_Obj_t *, nTableSize ); 
-    ppNexts = ABC_FALLOC( Aig_Obj_t *, nTableSize ); 
-    memset( ppTable, 0, sizeof(Aig_Obj_t *) * nTableSize );
-
-    // add all the nodes to the hash table
-    Vec_PtrClear( p->vClasses1 );
-    Aig_ManForEachObj( p->pAig, pObj, i )
-    {
-        if ( fLatchCorr )
-        {
-            if ( !Aig_ObjIsPi(pObj) )
-                continue;
-        }
-        else
-        {
-            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
-                continue;
-            // skip the node with more that the given number of levels
-            if ( nMaxLevs && (int)pObj->Level > nMaxLevs )
-                continue;
-        }
-        // hash the node by its simulation info
-        iEntry = p->pFuncNodeHash( pObj, nTableSize );
-        // check if the node belongs to the class of constant 1
-        if ( p->pFuncNodeIsConst( pObj ) )
-        {
-            Vec_PtrPush( p->vClasses1, pObj );
-            Fra_ClassObjSetRepr( pObj, Aig_ManConst1(p->pAig) );
-            continue;
-        }
-        // add the node to the class
-        if ( ppTable[iEntry] == NULL )
-        {
-            ppTable[iEntry] = pObj;
-            Fra_ObjSetNext( ppNexts, pObj, pObj );
-        }
-        else
-        {
-            Fra_ObjSetNext( ppNexts, pObj, Fra_ObjNext(ppNexts,ppTable[iEntry]) );
-            Fra_ObjSetNext( ppNexts, ppTable[iEntry], pObj );
-        }
-    }
-
-    // count the total number of nodes in the non-trivial classes
-    // mark the representative nodes of each equivalence class
-    nEntries = 0;
-    for ( i = 0; i < nTableSize; i++ )
-        if ( ppTable[i] && ppTable[i] != Fra_ObjNext(ppNexts, ppTable[i]) )
-        {
-            for ( pTemp = Fra_ObjNext(ppNexts, ppTable[i]), k = 1; 
-                  pTemp != ppTable[i]; 
-                  pTemp = Fra_ObjNext(ppNexts, pTemp), k++ );
-            assert( k > 1 );
-            nEntries += k;
-            // mark the node
-            assert( ppTable[i]->fMarkA == 0 );
-            ppTable[i]->fMarkA = 1;
-        }
-
-    // allocate room for classes
-    p->pMemClasses = ABC_ALLOC( Aig_Obj_t *, 2*(nEntries + Vec_PtrSize(p->vClasses1)) );
-    p->pMemClassesFree = p->pMemClasses + 2*nEntries;
- 
-    // copy the entries into storage in the topological order
-    Vec_PtrClear( p->vClasses );
-    nEntries = 0;
-    Aig_ManForEachObj( p->pAig, pObj, i )
-    {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
-            continue;
-        // skip the nodes that are not representatives of non-trivial classes
-        if ( pObj->fMarkA == 0 )
-            continue;
-        pObj->fMarkA = 0;
-        // add the class of nodes
-        Vec_PtrPush( p->vClasses, p->pMemClasses + 2*nEntries );
-        // count the number of entries in this class
-        for ( pTemp = Fra_ObjNext(ppNexts, pObj), k = 1; 
-              pTemp != pObj; 
-              pTemp = Fra_ObjNext(ppNexts, pTemp), k++ );
-        nNodes = k;
-        assert( nNodes > 1 );
-        // add the nodes to the class in the topological order
-        p->pMemClasses[2*nEntries] = pObj;
-        for ( pTemp = Fra_ObjNext(ppNexts, pObj), k = 1; 
-              pTemp != pObj; 
-              pTemp = Fra_ObjNext(ppNexts, pTemp), k++ )
-        {
-            p->pMemClasses[2*nEntries+nNodes-k] = pTemp;
-            Fra_ClassObjSetRepr( pTemp, pObj );
-        }
-        // add as many empty entries
-        p->pMemClasses[2*nEntries + nNodes] = NULL;
-        // increment the number of entries
-        nEntries += k;
-    }
-    ABC_FREE( ppTable );
-    ABC_FREE( ppNexts );
-    // now it is time to refine the classes
-    Fra_ClassesRefine( p );
-//    Fra_ClassesPrint( p, 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Refines one class using simulation info.]
-
-  Description [Returns the new class if refinement happened.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t ** Fra_RefineClassOne( Fra_Cla_t * p, Aig_Obj_t ** ppClass )
-{
-    Aig_Obj_t * pObj, ** ppThis;
-    int i;
-    assert( ppClass[0] != NULL && ppClass[1] != NULL );
-
-    // check if the class is going to be refined
-    for ( ppThis = ppClass + 1; (pObj = *ppThis); ppThis++ )        
-        if ( !p->pFuncNodesAreEqual(ppClass[0], pObj) )
-            break;
-    if ( pObj == NULL )
-        return NULL;
-    // split the class
-    Vec_PtrClear( p->vClassOld );
-    Vec_PtrClear( p->vClassNew );
-    Vec_PtrPush( p->vClassOld, ppClass[0] );
-    for ( ppThis = ppClass + 1; (pObj = *ppThis); ppThis++ )        
-        if ( p->pFuncNodesAreEqual(ppClass[0], pObj) )
-            Vec_PtrPush( p->vClassOld, pObj );
-        else
-            Vec_PtrPush( p->vClassNew, pObj );
-/*
-    printf( "Refining class (" );
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassOld, pObj, i )
-        printf( "%d,", pObj->Id );
-    printf( ") + (" );
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassNew, pObj, i )
-        printf( "%d,", pObj->Id );
-    printf( ")\n" );
-*/
-    // put the nodes back into the class memory
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassOld, pObj, i )
-    {
-        ppClass[i] = pObj;
-        ppClass[Vec_PtrSize(p->vClassOld)+i] = NULL;
-        Fra_ClassObjSetRepr( pObj, i? ppClass[0] : NULL );
-    }
-    ppClass += 2*Vec_PtrSize(p->vClassOld);
-    // put the new nodes into the class memory
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassNew, pObj, i )
-    {
-        ppClass[i] = pObj;
-        ppClass[Vec_PtrSize(p->vClassNew)+i] = NULL;
-        Fra_ClassObjSetRepr( pObj, i? ppClass[0] : NULL );
-    }
-    return ppClass;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Iteratively refines the classes after simulation.]
-
-  Description [Returns the number of refinements performed.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_RefineClassLastIter( Fra_Cla_t * p, Vec_Ptr_t * vClasses )
-{
-    Aig_Obj_t ** pClass, ** pClass2;
-    int nRefis;
-    pClass = (Aig_Obj_t **)Vec_PtrEntryLast( vClasses );
-    for ( nRefis = 0; (pClass2 = Fra_RefineClassOne( p, pClass )); nRefis++ )
-    {
-        // if the original class is trivial, remove it
-        if ( pClass[1] == NULL )
-            Vec_PtrPop( vClasses );
-        // if the new class is trivial, stop
-        if ( pClass2[1] == NULL )
-        {
-            nRefis++;
-            break;
-        }
-        // othewise, add the class and continue
-        assert( pClass2[0] != NULL );
-        Vec_PtrPush( vClasses, pClass2 );
-        pClass = pClass2;
-    }
-    return nRefis;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Refines the classes after simulation.]
-
-  Description [Assumes that simulation info is assigned. Returns the
-  number of classes refined.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClassesRefine( Fra_Cla_t * p )
-{
-    Vec_Ptr_t * vTemp;
-    Aig_Obj_t ** pClass;
-    int i, nRefis;
-    // refine the classes
-    nRefis = 0;
-    Vec_PtrClear( p->vClassesTemp );
-    Vec_PtrForEachEntry( Aig_Obj_t **, p->vClasses, pClass, i )
-    {
-        // add the class to the new array
-        assert( pClass[0] != NULL );
-        Vec_PtrPush( p->vClassesTemp, pClass );
-        // refine the class iteratively
-        nRefis += Fra_RefineClassLastIter( p, p->vClassesTemp );
-    }
-    // exchange the class representation
-    vTemp = p->vClassesTemp;
-    p->vClassesTemp = p->vClasses;
-    p->vClasses = vTemp;
-    return nRefis;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Refines constant 1 equivalence class.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClassesRefine1( Fra_Cla_t * p, int fRefineNewClass, int * pSkipped )
-{
-    Aig_Obj_t * pObj, ** ppClass;
-    int i, k, nRefis = 1;
-    // check if there is anything to refine
-    if ( Vec_PtrSize(p->vClasses1) == 0 )
-        return 0;
-    // make sure constant 1 class contains only non-constant nodes
-    assert( Vec_PtrEntry(p->vClasses1,0) != Aig_ManConst1(p->pAig) );
-    // collect all the nodes to be refined
-    k = 0;
-    Vec_PtrClear( p->vClassNew );
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClasses1, pObj, i )
-    {
-        if ( p->pFuncNodeIsConst( pObj ) )
-            Vec_PtrWriteEntry( p->vClasses1, k++, pObj );
-        else 
-            Vec_PtrPush( p->vClassNew, pObj );
-    }
-    Vec_PtrShrink( p->vClasses1, k );
-    if ( Vec_PtrSize(p->vClassNew) == 0 )
-        return 0;
-/*
-    printf( "Refined const-1 class: {" );
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassNew, pObj, i )
-        printf( " %d", pObj->Id );
-    printf( " }\n" );
-*/
-    if ( Vec_PtrSize(p->vClassNew) == 1 )
-    {
-        Fra_ClassObjSetRepr( (Aig_Obj_t *)Vec_PtrEntry(p->vClassNew,0), NULL );
-        return 1;
-    }
-    // create a new class composed of these nodes
-    ppClass = p->pMemClassesFree;
-    p->pMemClassesFree += 2 * Vec_PtrSize(p->vClassNew);
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassNew, pObj, i )
-    {
-        ppClass[i] = pObj;
-        ppClass[Vec_PtrSize(p->vClassNew)+i] = NULL;
-        Fra_ClassObjSetRepr( pObj, i? ppClass[0] : NULL );
-    }
-    assert( ppClass[0] != NULL );
-    Vec_PtrPush( p->vClasses, ppClass );
-    // iteratively refine this class
-    if ( fRefineNewClass )
-        nRefis += Fra_RefineClassLastIter( p, p->vClasses );
-    else if ( pSkipped )
-        (*pSkipped)++;
-    return nRefis;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts representation of equivalence classes with one class.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClassesTest( Fra_Cla_t * p, int Id1, int Id2 )
-{
-    Aig_Obj_t ** pClass;
-    p->pMemClasses = ABC_ALLOC( Aig_Obj_t *, 4 );
-    pClass = p->pMemClasses;
-    assert( Id1 < Id2 );
-    pClass[0] = Aig_ManObj( p->pAig, Id1 );
-    pClass[1] = Aig_ManObj( p->pAig, Id2 );
-    pClass[2] = NULL;
-    pClass[3] = NULL;
-    Fra_ClassObjSetRepr( pClass[1], pClass[0] );
-    Vec_PtrPush( p->vClasses, pClass );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates latch correspondence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClassesLatchCorr( Fra_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i, nEntries = 0;
-    Vec_PtrClear( p->pCla->vClasses1 );
-    Aig_ManForEachLoSeq( p->pManAig, pObj, i )
-    {
-        Vec_PtrPush( p->pCla->vClasses1, pObj );
-        Fra_ClassObjSetRepr( pObj, Aig_ManConst1(p->pManAig) );
-    }
-    // allocate room for classes
-    p->pCla->pMemClasses = ABC_ALLOC( Aig_Obj_t *, 2*(nEntries + Vec_PtrSize(p->pCla->vClasses1)) );
-    p->pCla->pMemClassesFree = p->pCla->pMemClasses + 2*nEntries;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Postprocesses the classes by removing half of the less useful.]
-
-  Description []
-               
-  SideEffects [] 
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClassesPostprocess( Fra_Cla_t * p )
-{
-    int Ratio = 2;
-    Fra_Sml_t * pComb;
-    Aig_Obj_t * pObj, * pRepr, ** ppClass;
-    int * pWeights, WeightMax = 0, i, k, c;
-    // perform combinational simulation
-    pComb = Fra_SmlSimulateComb( p->pAig, 32 );
-    // compute the weight of each node in the classes
-    pWeights = ABC_ALLOC( int, Aig_ManObjNumMax(p->pAig) );
-    memset( pWeights, 0, sizeof(int) * Aig_ManObjNumMax(p->pAig) );
-    Aig_ManForEachObj( p->pAig, pObj, i )
-    { 
-        pRepr = Fra_ClassObjRepr( pObj );
-        if ( pRepr == NULL )
-            continue;
-        pWeights[i] = Fra_SmlNodeNotEquWeight( pComb, pRepr->Id, pObj->Id );
-        WeightMax = ABC_MAX( WeightMax, pWeights[i] );
-    }
-    Fra_SmlStop( pComb );
-    printf( "Before: Const = %6d. Class = %6d.  ", Vec_PtrSize(p->vClasses1), Vec_PtrSize(p->vClasses) );
-    // remove nodes from classes whose weight is less than WeightMax/Ratio
-    k = 0;
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClasses1, pObj, i )
-    {
-        if ( pWeights[pObj->Id] >= WeightMax/Ratio )
-            Vec_PtrWriteEntry( p->vClasses1, k++, pObj );
-        else
-            Fra_ClassObjSetRepr( pObj, NULL );
-    }
-    Vec_PtrShrink( p->vClasses1, k );
-    // in each class, compact the nodes
-    Vec_PtrForEachEntry( Aig_Obj_t **, p->vClasses, ppClass, i )
-    {
-        k = 1;
-        for ( c = 1; ppClass[c]; c++ )
-        {
-            if ( pWeights[ppClass[c]->Id] >= WeightMax/Ratio )
-                ppClass[k++] = ppClass[c];
-            else
-                Fra_ClassObjSetRepr( ppClass[c], NULL );
-        }
-        ppClass[k] = NULL;
-    }
-    // remove classes with only repr
-    k = 0;
-    Vec_PtrForEachEntry( Aig_Obj_t **, p->vClasses, ppClass, i )
-        if ( ppClass[1] != NULL )
-            Vec_PtrWriteEntry( p->vClasses, k++, ppClass );
-    Vec_PtrShrink( p->vClasses, k );
-    printf( "After: Const = %6d. Class = %6d. \n", Vec_PtrSize(p->vClasses1), Vec_PtrSize(p->vClasses) );
-    ABC_FREE( pWeights );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Postprocesses the classes by selecting representative lowest in top order.]
-
-  Description []
-               
-  SideEffects [] 
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClassesSelectRepr( Fra_Cla_t * p )
-{
-    Aig_Obj_t ** pClass, * pNodeMin;
-    int i, c, cMinSupp, nSuppSizeMin, nSuppSizeCur;
-    // reassign representatives in each class
-    Vec_PtrForEachEntry( Aig_Obj_t **, p->vClasses, pClass, i )
-    {
-        // collect support sizes and find the min-support node
-        cMinSupp = -1;
-        pNodeMin = NULL;
-        nSuppSizeMin = ABC_INFINITY;
-        for ( c = 0; pClass[c]; c++ )
-        {
-            nSuppSizeCur = Aig_SupportSize( p->pAig, pClass[c] );
-//            nSuppSizeCur = 1;
-            if ( nSuppSizeMin > nSuppSizeCur || 
-                (nSuppSizeMin == nSuppSizeCur && pNodeMin->Level > pClass[c]->Level) )
-            {
-                nSuppSizeMin = nSuppSizeCur;
-                pNodeMin = pClass[c];
-                cMinSupp = c; 
-            }
-        }
-        // skip the case when the repr did not change
-        if ( cMinSupp == 0 )
-            continue;
-        // make the new node the representative of the class
-        pClass[cMinSupp] = pClass[0];
-        pClass[0] = pNodeMin;
-        // set the representative
-        for ( c = 0; pClass[c]; c++ )
-            Fra_ClassObjSetRepr( pClass[c], c? pClass[0] : NULL );
-    }
-}
-
-
-
-static inline Aig_Obj_t * Fra_ObjEqu( Aig_Obj_t ** ppEquivs, Aig_Obj_t * pObj )                       { return ppEquivs[pObj->Id];  }
-static inline void        Fra_ObjSetEqu( Aig_Obj_t ** ppEquivs, Aig_Obj_t * pObj, Aig_Obj_t * pNode ) { ppEquivs[pObj->Id] = pNode; }
-
-static inline Aig_Obj_t * Fra_ObjChild0Equ( Aig_Obj_t ** ppEquivs, Aig_Obj_t * pObj ) { return Aig_NotCond(Fra_ObjEqu(ppEquivs,Aig_ObjFanin0(pObj)), Aig_ObjFaninC0(pObj));  }
-static inline Aig_Obj_t * Fra_ObjChild1Equ( Aig_Obj_t ** ppEquivs, Aig_Obj_t * pObj ) { return Aig_NotCond(Fra_ObjEqu(ppEquivs,Aig_ObjFanin1(pObj)), Aig_ObjFaninC1(pObj));  }
-
-/**Function*************************************************************
-
-  Synopsis    [Add the node and its constraints to the new AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fra_ClassesDeriveNode( Aig_Man_t * pManFraig, Aig_Obj_t * pObj, Aig_Obj_t ** ppEquivs )
-{
-    Aig_Obj_t * pObjNew, * pObjRepr, * pObjReprNew, * pMiter;//, * pObjNew2;
-    // skip nodes without representative
-    if ( (pObjRepr = Fra_ClassObjRepr(pObj)) == NULL )
-        return;
-    assert( pObjRepr->Id < pObj->Id );
-    // get the new node 
-    pObjNew = Fra_ObjEqu( ppEquivs, pObj );
-    // get the new node of the representative
-    pObjReprNew = Fra_ObjEqu( ppEquivs, pObjRepr );
-    // if this is the same node, no need to add constraints
-    if ( Aig_Regular(pObjNew) == Aig_Regular(pObjReprNew) )
-        return;
-    // these are different nodes - perform speculative reduction
-//    pObjNew2 = Aig_NotCond( pObjReprNew, pObj->fPhase ^ pObjRepr->fPhase );
-    // set the new node
-//    Fra_ObjSetEqu( ppEquivs, pObj, pObjNew2 );
-    // add the constraint
-    pMiter = Aig_Exor( pManFraig, Aig_Regular(pObjNew), Aig_Regular(pObjReprNew) );
-    pMiter = Aig_NotCond( pMiter, Aig_Regular(pMiter)->fPhase ^ Aig_IsComplement(pMiter) );
-    pMiter = Aig_Not( pMiter );
-    Aig_ObjCreatePo( pManFraig, pMiter );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives AIG for the partitioned problem.]
-
-  Description []
-               
-  SideEffects [] 
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Fra_ClassesDeriveAig( Fra_Cla_t * p, int nFramesK )
-{
-    Aig_Man_t * pManFraig;
-    Aig_Obj_t * pObj, * pObjNew;
-    Aig_Obj_t ** pLatches, ** ppEquivs;
-    int i, k, f, nFramesAll = nFramesK + 1;
-    assert( Aig_ManRegNum(p->pAig) > 0 );
-    assert( Aig_ManRegNum(p->pAig) < Aig_ManPiNum(p->pAig) );
-    assert( nFramesK > 0 );
-    // start the fraig package
-    pManFraig = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * nFramesAll );
-    pManFraig->pName = Aig_UtilStrsav( p->pAig->pName );
-    pManFraig->pSpec = Aig_UtilStrsav( p->pAig->pSpec );
-    // allocate place for the node mapping
-    ppEquivs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAig) );
-    Fra_ObjSetEqu( ppEquivs, Aig_ManConst1(p->pAig), Aig_ManConst1(pManFraig) );
-    // create latches for the first frame
-    Aig_ManForEachLoSeq( p->pAig, pObj, i )
-        Fra_ObjSetEqu( ppEquivs, pObj, Aig_ObjCreatePi(pManFraig) );
-    // add timeframes
-    pLatches = ABC_ALLOC( Aig_Obj_t *, Aig_ManRegNum(p->pAig) );
-    for ( f = 0; f < nFramesAll; f++ )
-    {
-        // create PIs for this frame
-        Aig_ManForEachPiSeq( p->pAig, pObj, i )
-            Fra_ObjSetEqu( ppEquivs, pObj, Aig_ObjCreatePi(pManFraig) );
-        // set the constraints on the latch outputs
-        Aig_ManForEachLoSeq( p->pAig, pObj, i )
-            Fra_ClassesDeriveNode( pManFraig, pObj, ppEquivs );
-        // add internal nodes of this frame
-        Aig_ManForEachNode( p->pAig, pObj, i )
-        {
-            pObjNew = Aig_And( pManFraig, Fra_ObjChild0Equ(ppEquivs, pObj), Fra_ObjChild1Equ(ppEquivs, pObj) );
-            Fra_ObjSetEqu( ppEquivs, pObj, pObjNew );
-            Fra_ClassesDeriveNode( pManFraig, pObj, ppEquivs );
-        }
-        if ( f == nFramesAll - 1 )
-            break;
-        if ( f == nFramesAll - 2 )
-            pManFraig->nAsserts = Aig_ManPoNum(pManFraig);
-        // save the latch input values
-        k = 0;
-        Aig_ManForEachLiSeq( p->pAig, pObj, i )
-            pLatches[k++] = Fra_ObjChild0Equ( ppEquivs, pObj );
-        // insert them to the latch output values
-        k = 0;
-        Aig_ManForEachLoSeq( p->pAig, pObj, i )
-            Fra_ObjSetEqu( ppEquivs, pObj, pLatches[k++] );
-    }
-    ABC_FREE( pLatches );
-    ABC_FREE( ppEquivs );
-    // mark the asserts
-    assert( Aig_ManPoNum(pManFraig) % nFramesAll == 0 );
-printf( "Assert miters = %6d. Output miters = %6d.\n", 
-       pManFraig->nAsserts, Aig_ManPoNum(pManFraig) - pManFraig->nAsserts );
-    // remove dangling nodes
-    Aig_ManCleanup( pManFraig );
-    return pManFraig;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraClau.c b/src/aig/fra/fraClau.c
deleted file mode 100644
index 490c73ff..00000000
--- a/src/aig/fra/fraClau.c
+++ /dev/null
@@ -1,763 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraClau.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    [Induction with clause strengthening.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraClau.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-#include "cnf.h"
-#include "satSolver.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-/*
-    This code is inspired by the paper: Aaron Bradley and Zohar Manna, 
-    "Checking safety by inductive generalization of counterexamples to 
-    induction", FMCAD '07.
-*/
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Cla_Man_t_    Cla_Man_t;
-struct Cla_Man_t_
-{
-    // SAT solvers
-    sat_solver *     pSatMain;
-    sat_solver *     pSatTest;
-    sat_solver *     pSatBmc;
-    // CNF for the test solver
-//    Cnf_Dat_t *      pCnfTest;
-    // SAT variables
-    Vec_Int_t *      vSatVarsMainCs;
-    Vec_Int_t *      vSatVarsTestCs;
-    Vec_Int_t *      vSatVarsTestNs;
-    Vec_Int_t *      vSatVarsBmcNs;
-    // helper variables
-    int              nSatVarsTestBeg;
-    int              nSatVarsTestCur;
-    // counter-examples
-    Vec_Int_t *      vCexMain0;
-    Vec_Int_t *      vCexMain;
-    Vec_Int_t *      vCexTest;
-    Vec_Int_t *      vCexBase;
-    Vec_Int_t *      vCexAssm;
-    Vec_Int_t *      vCexBmc;
-    // mapping of CS into NS var numbers
-    int *            pMapCsMainToCsTest; 
-    int *            pMapCsTestToCsMain; 
-    int *            pMapCsTestToNsTest; 
-    int *            pMapCsTestToNsBmc;  
-};
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Saves variables corresponding to latch outputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Fra_ClauSaveLatchVars( Aig_Man_t * pMan, Cnf_Dat_t * pCnf, int fCsVars )
-{
-    Vec_Int_t * vVars;
-    Aig_Obj_t * pObjLo, * pObjLi;
-    int i;
-    vVars = Vec_IntAlloc( Aig_ManRegNum(pMan) );
-    Aig_ManForEachLiLoSeq( pMan, pObjLi, pObjLo, i )
-        Vec_IntPush( vVars, pCnf->pVarNums[fCsVars? pObjLo->Id : pObjLi->Id] );
-    return vVars;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Saves variables corresponding to latch outputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Fra_ClauSaveOutputVars( Aig_Man_t * pMan, Cnf_Dat_t * pCnf )
-{
-    Vec_Int_t * vVars;
-    Aig_Obj_t * pObj;
-    int i;
-    vVars = Vec_IntAlloc( Aig_ManPoNum(pMan) );
-    Aig_ManForEachPo( pMan, pObj, i )
-        Vec_IntPush( vVars, pCnf->pVarNums[pObj->Id] );
-    return vVars;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Saves variables corresponding to latch outputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Fra_ClauSaveInputVars( Aig_Man_t * pMan, Cnf_Dat_t * pCnf, int nStarting )
-{
-    Vec_Int_t * vVars;
-    Aig_Obj_t * pObj;
-    int i;
-    vVars = Vec_IntAlloc( Aig_ManPiNum(pMan) - nStarting );
-    Aig_ManForEachPi( pMan, pObj, i )
-    {
-        if ( i < nStarting )
-            continue;
-        Vec_IntPush( vVars, pCnf->pVarNums[pObj->Id] );
-    }
-    return vVars;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Saves variables corresponding to latch outputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int * Fra_ClauCreateMapping( Vec_Int_t * vSatVarsFrom, Vec_Int_t * vSatVarsTo, int nVarsMax )
-{
-    int * pMapping, Var, i;
-    assert( Vec_IntSize(vSatVarsFrom) == Vec_IntSize(vSatVarsTo) );
-    pMapping = ABC_ALLOC( int, nVarsMax );
-    for ( i = 0; i < nVarsMax; i++ )
-        pMapping[i] = -1;
-    Vec_IntForEachEntry( vSatVarsFrom, Var, i )
-        pMapping[Var] = Vec_IntEntry(vSatVarsTo,i);
-    return pMapping;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Deletes the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClauStop( Cla_Man_t * p )
-{
-    ABC_FREE( p->pMapCsMainToCsTest );
-    ABC_FREE( p->pMapCsTestToCsMain );
-    ABC_FREE( p->pMapCsTestToNsTest );
-    ABC_FREE( p->pMapCsTestToNsBmc  );
-    Vec_IntFree( p->vSatVarsMainCs );
-    Vec_IntFree( p->vSatVarsTestCs );
-    Vec_IntFree( p->vSatVarsTestNs );
-    Vec_IntFree( p->vSatVarsBmcNs );
-    Vec_IntFree( p->vCexMain0 );
-    Vec_IntFree( p->vCexMain );
-    Vec_IntFree( p->vCexTest );
-    Vec_IntFree( p->vCexBase );
-    Vec_IntFree( p->vCexAssm );
-    Vec_IntFree( p->vCexBmc  );
-    if ( p->pSatMain ) sat_solver_delete( p->pSatMain );
-    if ( p->pSatTest ) sat_solver_delete( p->pSatTest );
-    if ( p->pSatBmc )  sat_solver_delete( p->pSatBmc );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Takes the AIG with the single output to be checked.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Cla_Man_t * Fra_ClauStart( Aig_Man_t * pMan )
-{
-    Cla_Man_t * p;
-    Cnf_Dat_t * pCnfMain;
-    Cnf_Dat_t * pCnfTest;
-    Cnf_Dat_t * pCnfBmc;
-    Aig_Man_t * pFramesMain;
-    Aig_Man_t * pFramesTest;
-    Aig_Man_t * pFramesBmc;
-    assert( Aig_ManPoNum(pMan) - Aig_ManRegNum(pMan) == 1 );
-
-    // start the manager
-    p = ABC_ALLOC( Cla_Man_t, 1 );
-    memset( p, 0, sizeof(Cla_Man_t) );
-    p->vCexMain0 = Vec_IntAlloc( Aig_ManRegNum(pMan) );
-    p->vCexMain  = Vec_IntAlloc( Aig_ManRegNum(pMan) );
-    p->vCexTest  = Vec_IntAlloc( Aig_ManRegNum(pMan) );
-    p->vCexBase  = Vec_IntAlloc( Aig_ManRegNum(pMan) );
-    p->vCexAssm  = Vec_IntAlloc( Aig_ManRegNum(pMan) );
-    p->vCexBmc   = Vec_IntAlloc( Aig_ManRegNum(pMan) );
-
-    // derive two timeframes to be checked
-    pFramesMain = Aig_ManFrames( pMan, 2, 0, 1, 0, 0, NULL ); // nFrames, fInit, fOuts, fRegs
-//Aig_ManShow( pFramesMain, 0, NULL );
-    assert( Aig_ManPoNum(pFramesMain) == 2 );
-    Aig_ObjChild0Flip( Aig_ManPo(pFramesMain, 0) ); // complement the first output
-    pCnfMain = Cnf_DeriveSimple( pFramesMain, 0 );
-//Cnf_DataWriteIntoFile( pCnfMain, "temp.cnf", 1 );
-    p->pSatMain = (sat_solver *)Cnf_DataWriteIntoSolver( pCnfMain, 1, 0 );
-/*
-    {
-        int i;
-        Aig_Obj_t * pObj;
-        Aig_ManForEachObj( pFramesMain, pObj, i )
-            printf( "%d -> %d  \n", pObj->Id, pCnfMain->pVarNums[pObj->Id] );
-        printf( "\n" );
-    }
-*/
-
-    // derive one timeframe to be checked
-    pFramesTest = Aig_ManFrames( pMan, 1, 0, 0, 1, 0, NULL );
-    assert( Aig_ManPoNum(pFramesTest) == Aig_ManRegNum(pMan) );
-    pCnfTest = Cnf_DeriveSimple( pFramesTest, Aig_ManRegNum(pMan) );
-    p->pSatTest = (sat_solver *)Cnf_DataWriteIntoSolver( pCnfTest, 1, 0 );
-    p->nSatVarsTestBeg = p->nSatVarsTestCur = sat_solver_nvars( p->pSatTest );
-
-    // derive one timeframe to be checked for BMC
-    pFramesBmc = Aig_ManFrames( pMan, 1, 1, 0, 1, 0, NULL );
-//Aig_ManShow( pFramesBmc, 0, NULL );
-    assert( Aig_ManPoNum(pFramesBmc) == Aig_ManRegNum(pMan) );
-    pCnfBmc = Cnf_DeriveSimple( pFramesBmc, Aig_ManRegNum(pMan) );
-    p->pSatBmc = (sat_solver *)Cnf_DataWriteIntoSolver( pCnfBmc, 1, 0 );
-
-    // create variable sets
-    p->vSatVarsMainCs = Fra_ClauSaveInputVars( pFramesMain, pCnfMain, 2 * (Aig_ManPiNum(pMan)-Aig_ManRegNum(pMan)) );
-    p->vSatVarsTestCs = Fra_ClauSaveLatchVars( pFramesTest, pCnfTest, 1 );
-    p->vSatVarsTestNs = Fra_ClauSaveLatchVars( pFramesTest, pCnfTest, 0 );
-    p->vSatVarsBmcNs  = Fra_ClauSaveOutputVars( pFramesBmc, pCnfBmc );
-    assert( Vec_IntSize(p->vSatVarsTestCs) == Vec_IntSize(p->vSatVarsMainCs) );
-    assert( Vec_IntSize(p->vSatVarsTestCs) == Vec_IntSize(p->vSatVarsBmcNs) );
-
-    // create mapping of CS into NS vars
-    p->pMapCsMainToCsTest = Fra_ClauCreateMapping( p->vSatVarsMainCs, p->vSatVarsTestCs, Aig_ManObjNumMax(pFramesMain) );
-    p->pMapCsTestToCsMain = Fra_ClauCreateMapping( p->vSatVarsTestCs, p->vSatVarsMainCs, Aig_ManObjNumMax(pFramesTest) );
-    p->pMapCsTestToNsTest = Fra_ClauCreateMapping( p->vSatVarsTestCs, p->vSatVarsTestNs, Aig_ManObjNumMax(pFramesTest) );
-    p->pMapCsTestToNsBmc  = Fra_ClauCreateMapping( p->vSatVarsTestCs, p->vSatVarsBmcNs,  Aig_ManObjNumMax(pFramesTest) );
-
-    // cleanup
-    Cnf_DataFree( pCnfMain );
-    Cnf_DataFree( pCnfTest );
-    Cnf_DataFree( pCnfBmc );
-    Aig_ManStop( pFramesMain );
-    Aig_ManStop( pFramesTest );
-    Aig_ManStop( pFramesBmc );
-    if ( p->pSatMain == NULL || p->pSatTest == NULL || p->pSatBmc == NULL )
-    {
-        Fra_ClauStop( p );
-        return NULL;
-    }
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Splits off second half and returns it as a new vector.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static Vec_Int_t * Vec_IntSplitHalf( Vec_Int_t * vVec )
-{
-    Vec_Int_t * vPart;
-    int Entry, i;
-    assert( Vec_IntSize(vVec) > 1 );
-    vPart = Vec_IntAlloc( Vec_IntSize(vVec) / 2 + 1 );
-    Vec_IntForEachEntryStart( vVec, Entry, i, Vec_IntSize(vVec) / 2 )
-        Vec_IntPush( vPart, Entry );
-    Vec_IntShrink( vVec, Vec_IntSize(vVec) / 2 );
-    return vPart;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Appends the contents of the second vector.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static void Vec_IntAppend( Vec_Int_t * vVec1, Vec_Int_t * vVec2 )
-{
-    int Entry, i;
-    Vec_IntForEachEntry( vVec2, Entry, i )
-        Vec_IntPush( vVec1, Entry );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Complements all literals in the clause.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static void Vec_IntComplement( Vec_Int_t * vVec )
-{
-    int i;
-    for ( i = 0; i < Vec_IntSize(vVec); i++ )
-        vVec->pArray[i] = lit_neg( vVec->pArray[i] );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks if the property holds. Returns counter-example if not.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClauCheckProperty( Cla_Man_t * p, Vec_Int_t * vCex )
-{
-    int nBTLimit = 0;
-    int RetValue, iVar, i;
-    sat_solver_act_var_clear( p->pSatMain );
-    RetValue = sat_solver_solve( p->pSatMain, NULL, NULL, (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    Vec_IntClear( vCex );
-    if ( RetValue == l_False )
-        return 1;
-    assert( RetValue == l_True );
-    Vec_IntForEachEntry( p->vSatVarsMainCs, iVar, i )
-        Vec_IntPush( vCex, sat_solver_var_literal(p->pSatMain, iVar) );
-/*
-    {
-        int i;
-        for (i = 0; i < p->pSatMain->size; i++)
-            printf( "%d=%d ", i, p->pSatMain->model.ptr[i] == l_True );
-        printf( "\n" );
-    }
-*/
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks if the clause holds using BMC.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClauCheckBmc( Cla_Man_t * p, Vec_Int_t * vClause )
-{
-    int nBTLimit = 0;
-    int RetValue;
-    RetValue = sat_solver_solve( p->pSatBmc, Vec_IntArray(vClause), Vec_IntArray(vClause) + Vec_IntSize(vClause), 
-        (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    if ( RetValue == l_False )
-        return 1;
-    assert( RetValue == l_True );
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Lifts the clause to depend on NS variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClauRemapClause( int * pMap, Vec_Int_t * vClause, Vec_Int_t * vRemapped, int fInv )
-{
-    int iLit, i;
-    Vec_IntClear( vRemapped );
-    Vec_IntForEachEntry( vClause, iLit, i )
-    {
-        assert( pMap[lit_var(iLit)] >= 0 );
-        iLit = toLitCond( pMap[lit_var(iLit)], lit_sign(iLit) ^ fInv );
-        Vec_IntPush( vRemapped, iLit );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks if the clause holds. Returns counter example if not.]
-
-  Description [Uses test SAT solver.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClauCheckClause( Cla_Man_t * p, Vec_Int_t * vClause, Vec_Int_t * vCex )
-{
-    int nBTLimit = 0;
-    int RetValue, iVar, i;
-    // complement literals
-    Vec_IntPush( vClause, toLit( p->nSatVarsTestCur++ ) ); // helper positive
-    Vec_IntComplement( vClause ); // helper negative (the clause is C v h')
-    // add the clause
-    RetValue = sat_solver_addclause( p->pSatTest, Vec_IntArray(vClause), Vec_IntArray(vClause) + Vec_IntSize(vClause) );
-    assert( RetValue == 1 );
-    // complement all literals
-    Vec_IntPop( vClause );  // helper removed
-    Vec_IntComplement( vClause ); 
-    // create the assumption in terms of NS variables
-    Fra_ClauRemapClause( p->pMapCsTestToNsTest, vClause, p->vCexAssm, 0 );
-    // add helper literals
-    for ( i = p->nSatVarsTestBeg; i < p->nSatVarsTestCur - 1; i++ )
-        Vec_IntPush( p->vCexAssm, toLitCond(i,1) ); // other helpers negative
-    Vec_IntPush( p->vCexAssm, toLitCond(i,0) ); // positive helper
-    // try to solve
-    RetValue = sat_solver_solve( p->pSatTest, Vec_IntArray(p->vCexAssm), Vec_IntArray(p->vCexAssm) + Vec_IntSize(p->vCexAssm), 
-        (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    if ( vCex )
-        Vec_IntClear( vCex );
-    if ( RetValue == l_False )
-        return 1;
-    assert( RetValue == l_True );
-    if ( vCex )
-    {
-        Vec_IntForEachEntry( p->vSatVarsTestCs, iVar, i )
-            Vec_IntPush( vCex, sat_solver_var_literal(p->pSatTest, iVar) );
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reduces the counter-example by removing complemented literals.]
-
-  Description [Removes literals from vMain that differ from those in the  
-  counter-example (vNew). Relies on the fact that the PI variables are
-  assigned in the increasing order.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClauReduceClause( Vec_Int_t * vMain, Vec_Int_t * vNew )
-{
-    int LitM, LitN, VarM, VarN, i, j, k;
-    assert( Vec_IntSize(vMain) <= Vec_IntSize(vNew) );
-    for ( i = j = k = 0; i < Vec_IntSize(vMain) && j < Vec_IntSize(vNew); )
-    {
-        LitM = Vec_IntEntry( vMain, i );
-        LitN = Vec_IntEntry( vNew, j );
-        VarM = lit_var( LitM );
-        VarN = lit_var( LitN );
-        if ( VarM < VarN )
-        {
-            assert( 0 );
-        }
-        else if ( VarM > VarN )
-        {
-            j++;
-        }
-        else // if ( VarM == VarN )
-        {
-            i++;
-            j++;
-            if ( LitM == LitN )
-                Vec_IntWriteEntry( vMain, k++, LitM );
-        }
-    }
-    assert( i == Vec_IntSize(vMain) );
-    Vec_IntShrink( vMain, k );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the minimal invariant that holds.]
-
-  Description [On entrace, vBasis does not hold, vBasis+vExtra holds but
-  is not minimal. On exit, vBasis is unchanged, vBasis+vExtra is minimal.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClauMinimizeClause_rec( Cla_Man_t * p, Vec_Int_t * vBasis, Vec_Int_t * vExtra )
-{
-    Vec_Int_t * vExtra2;
-    int nSizeOld;
-    if ( Vec_IntSize(vExtra) == 1 )
-        return;
-    nSizeOld = Vec_IntSize( vBasis );
-    vExtra2 = Vec_IntSplitHalf( vExtra );
-
-    // try the first half
-    Vec_IntAppend( vBasis, vExtra );
-    if ( Fra_ClauCheckClause( p, vBasis, NULL ) )
-    {
-        Vec_IntShrink( vBasis, nSizeOld );
-        Fra_ClauMinimizeClause_rec( p, vBasis, vExtra );
-        return;
-    }
-    Vec_IntShrink( vBasis, nSizeOld );
-
-    // try the second half
-    Vec_IntAppend( vBasis, vExtra2 );
-    if ( Fra_ClauCheckClause( p, vBasis, NULL ) )
-    {
-        Vec_IntShrink( vBasis, nSizeOld );
-        Fra_ClauMinimizeClause_rec( p, vBasis, vExtra2 );
-        return;
-    }
-//    Vec_IntShrink( vBasis, nSizeOld );
-
-    // find the smallest with the second half added
-    Fra_ClauMinimizeClause_rec( p, vBasis, vExtra );
-    Vec_IntShrink( vBasis, nSizeOld );
-    Vec_IntAppend( vBasis, vExtra );
-    // find the smallest with the second half added
-    Fra_ClauMinimizeClause_rec( p, vBasis, vExtra2 );
-    Vec_IntShrink( vBasis, nSizeOld );
-    Vec_IntAppend( vExtra, vExtra2 );
-    Vec_IntFree( vExtra2 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Minimizes the clauses using a simple method.]
-
-  Description [The input and output clause are in vExtra.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClauMinimizeClause( Cla_Man_t * p, Vec_Int_t * vBasis, Vec_Int_t * vExtra )
-{
-    int iLit, iLit2, i, k;
-    Vec_IntForEachEntryReverse( vExtra, iLit, i )
-    {
-        // copy literals without the given one
-        Vec_IntClear( vBasis );
-        Vec_IntForEachEntry( vExtra, iLit2, k )
-            if ( k != i )
-                Vec_IntPush( vBasis, iLit2 );
-        // try whether it is inductive
-        if ( !Fra_ClauCheckClause( p, vBasis, NULL ) )
-            continue;
-        // the clause is inductive
-        // remove the literal
-        for ( k = i; k < Vec_IntSize(vExtra)-1; k++ )
-            Vec_IntWriteEntry( vExtra, k, Vec_IntEntry(vExtra,k+1) );
-        Vec_IntShrink( vExtra, Vec_IntSize(vExtra)-1 );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints the clause.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClauPrintClause( Vec_Int_t * vSatCsVars, Vec_Int_t * vCex )
-{
-    int LitM, VarM, VarN, i, j, k;
-    assert( Vec_IntSize(vCex) <= Vec_IntSize(vSatCsVars) );
-    for ( i = j = k = 0; i < Vec_IntSize(vCex) && j < Vec_IntSize(vSatCsVars); )
-    {
-        LitM = Vec_IntEntry( vCex, i );
-        VarM = lit_var( LitM );
-        VarN = Vec_IntEntry( vSatCsVars, j );
-        if ( VarM < VarN )
-        {
-            assert( 0 );
-        }
-        else if ( VarM > VarN )
-        {
-            j++;
-            printf( "-" );
-        }
-        else // if ( VarM == VarN )
-        {
-            i++;
-            j++;
-            printf( "%d", !lit_sign(LitM) );
-        }
-    }
-    assert( i == Vec_IntSize(vCex) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Takes the AIG with the single output to be checked.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_Clau( Aig_Man_t * pMan, int nIters, int fVerbose, int fVeryVerbose )
-{
-    Cla_Man_t * p;
-    int Iter, RetValue, fFailed, i;
-    assert( Aig_ManPoNum(pMan) - Aig_ManRegNum(pMan) == 1 );
-    // create the manager
-    p = Fra_ClauStart( pMan );
-    if ( p == NULL )
-    {
-        printf( "The property is trivially inductive.\n" );
-        return 1;
-    }
-    // generate counter-examples and expand them
-    for ( Iter = 0; !Fra_ClauCheckProperty( p, p->vCexMain0 ) && Iter < nIters; Iter++ )
-    {
-        if ( fVerbose )
-            printf( "%4d : ", Iter );
-        // remap clause into the test manager
-        Fra_ClauRemapClause( p->pMapCsMainToCsTest, p->vCexMain0, p->vCexMain, 0 );
-        if ( fVerbose && fVeryVerbose )
-            Fra_ClauPrintClause( p->vSatVarsTestCs, p->vCexMain );
-        // the main counter-example is in p->vCexMain
-        // intermediate counter-examples are in p->vCexTest
-        // generate the reduced counter-example to the inductive property
-        fFailed = 0;
-        for ( i = 0; !Fra_ClauCheckClause( p, p->vCexMain, p->vCexTest ); i++ )
-        {
-            Fra_ClauReduceClause( p->vCexMain, p->vCexTest );
-            Fra_ClauRemapClause( p->pMapCsTestToNsBmc, p->vCexMain, p->vCexBmc, 0 );
-
-//            if ( !Fra_ClauCheckBmc(p, p->vCexBmc) )
-            if ( Vec_IntSize(p->vCexMain) < 1 )
-            {
-                Vec_IntComplement( p->vCexMain0 ); 
-                RetValue = sat_solver_addclause( p->pSatMain, Vec_IntArray(p->vCexMain0), Vec_IntArray(p->vCexMain0) + Vec_IntSize(p->vCexMain0) );
-                if ( RetValue == 0 )
-                {
-                    printf( "\nProperty is proved after %d iterations.\n", Iter+1 );
-                    return 0;
-                }
-                fFailed = 1;
-                break;
-            }
-        }
-        if ( fFailed )
-        {
-            if ( fVerbose )
-                printf( " Reducing failed after %d iterations (BMC failed).\n", i );
-            continue;
-        }
-        if ( Vec_IntSize(p->vCexMain) == 0 )
-        {
-            if ( fVerbose )
-                printf( " Reducing failed after %d iterations (nothing left).\n", i );
-            continue;
-        }
-        if ( fVerbose )
-            printf( "  " );
-        if ( fVerbose && fVeryVerbose )
-            Fra_ClauPrintClause( p->vSatVarsTestCs, p->vCexMain );
-        if ( fVerbose )
-            printf( " LitsInd = %3d.  ", Vec_IntSize(p->vCexMain) );
-        // minimize the inductive property
-        Vec_IntClear( p->vCexBase );
-        if ( Vec_IntSize(p->vCexMain) > 1 )
-//        Fra_ClauMinimizeClause_rec( p, p->vCexBase, p->vCexMain );
-            Fra_ClauMinimizeClause( p, p->vCexBase, p->vCexMain );
-        assert( Vec_IntSize(p->vCexMain) > 0 );
-        if ( fVerbose && fVeryVerbose )
-            Fra_ClauPrintClause( p->vSatVarsTestCs, p->vCexMain );
-        if ( fVerbose )
-            printf( " LitsRed = %3d.  ", Vec_IntSize(p->vCexMain) );
-        if ( fVerbose )
-            printf( "\n" );
-        // add the clause to the solver
-        Fra_ClauRemapClause( p->pMapCsTestToCsMain, p->vCexMain, p->vCexAssm, 1 );
-        RetValue = sat_solver_addclause( p->pSatMain, Vec_IntArray(p->vCexAssm), Vec_IntArray(p->vCexAssm) + Vec_IntSize(p->vCexAssm) );
-        if ( RetValue == 0 )
-        {
-            Iter++;
-            break;
-        }
-        if ( p->pSatMain->qtail != p->pSatMain->qhead )
-        {
-            RetValue = sat_solver_simplify(p->pSatMain);
-            assert( RetValue != 0 );
-            assert( p->pSatMain->qtail == p->pSatMain->qhead );
-        }
-    }
-
-    // report the results
-    if ( Iter == nIters )
-    {
-        printf( "Property is not proved after %d iterations.\n", nIters );
-        return 0;
-    }
-    printf( "Property is proved after %d iterations.\n", Iter );
-    Fra_ClauStop( p );
-    return 1;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraClaus.c b/src/aig/fra/fraClaus.c
deleted file mode 100644
index 9548c166..00000000
--- a/src/aig/fra/fraClaus.c
+++ /dev/null
@@ -1,1875 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraClaus.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    [Induction with clause strengthening.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraClau.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-#include "cnf.h"
-#include "satSolver.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Clu_Man_t_    Clu_Man_t;
-struct Clu_Man_t_
-{
-    // parameters
-    int              nFrames;        // the K of the K-step induction
-    int              nPref;          // the number of timeframes to skip  
-    int              nClausesMax;    // the max number of 4-clauses to consider
-    int              nLutSize;       // the max cut size
-    int              nLevels;        // the number of levels for cut computation
-    int              nCutsMax;       // the maximum number of cuts to compute at a node
-    int              nBatches;       // the number of clause batches to use
-    int              fStepUp;        // increase cut size for each batch
-    int              fTarget;        // tries to prove the property
-    int              fVerbose;       
-    int              fVeryVerbose;
-    // internal parameters
-    int              nSimWords;      // the number of simulation words
-    int              nSimWordsPref;  // the number of simulation words in the prefix
-    int              nSimFrames;     // the number of frames to simulate 
-    int              nBTLimit;       // the largest number of backtracks (0 = infinite)
-    // the network 
-    Aig_Man_t *      pAig;
-    // SAT solvers
-    sat_solver *     pSatMain;
-    sat_solver *     pSatBmc;
-    // CNF for the test solver
-    Cnf_Dat_t *      pCnf;
-    int              fFail;
-    int              fFiltering; 
-    int              fNothingNew;
-    // clauses
-    Vec_Int_t *      vLits;
-    Vec_Int_t *      vClauses;
-    Vec_Int_t *      vCosts;
-    int              nClauses;
-    int              nCuts;
-    int              nOneHots;
-    int              nOneHotsProven;
-    // clauses proven
-    Vec_Int_t *      vLitsProven;
-    Vec_Int_t *      vClausesProven;
-    // counter-examples
-    Vec_Ptr_t *      vCexes;
-    int              nCexes;
-    int              nCexesAlloc;
-};
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Runs the SAT solver on the problem.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausRunBmc( Clu_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int Lits[2], nLitsTot, RetValue, i;
-    // set the output literals
-    nLitsTot = 2 * p->pCnf->nVars;
-    pObj = Aig_ManPo(p->pAig, 0);
-    for ( i = 0; i < p->nPref + p->nFrames; i++ )
-    {
-        Lits[0] = i * nLitsTot + toLitCond( p->pCnf->pVarNums[pObj->Id], 0 ); 
-        RetValue = sat_solver_solve( p->pSatBmc, Lits, Lits + 1, (ABC_INT64_T)p->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-        if ( RetValue != l_False )
-            return 0;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Runs the SAT solver on the problem.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausRunSat( Clu_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int * pLits;
-    int i, RetValue;
-    pLits = ABC_ALLOC( int, p->nFrames + 1 );
-    // set the output literals
-    pObj = Aig_ManPo(p->pAig, 0);
-    for ( i = 0; i <= p->nFrames; i++ )
-        pLits[i] = i * 2 * p->pCnf->nVars + toLitCond( p->pCnf->pVarNums[pObj->Id], i != p->nFrames ); 
-    // try to solve the problem
-    RetValue = sat_solver_solve( p->pSatMain, pLits, pLits + p->nFrames + 1, (ABC_INT64_T)p->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    ABC_FREE( pLits );
-    if ( RetValue == l_False )
-        return 1;
-    // get the counter-example
-    assert( RetValue == l_True );
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Runs the SAT solver on the problem.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausRunSat0( Clu_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int Lits[2], RetValue;
-    pObj = Aig_ManPo(p->pAig, 0);
-    Lits[0] = toLitCond( p->pCnf->pVarNums[pObj->Id], 0 ); 
-    RetValue = sat_solver_solve( p->pSatMain, Lits, Lits + 1, (ABC_INT64_T)p->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    if ( RetValue == l_False )
-        return 1;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Return combinations appearing in the cut.]
-
-  Description [This procedure is taken from "Hacker's Delight" by H.S.Warren.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void transpose32a( unsigned a[32] ) 
-{
-    int j, k;
-    unsigned long m, t;
-    for ( j = 16, m = 0x0000FFFF; j; j >>= 1, m ^= m << j ) 
-    {
-        for ( k = 0; k < 32; k = ((k | j) + 1) & ~j ) 
-        {
-            t = (a[k] ^ (a[k|j] >> j)) & m;
-            a[k] ^= t;
-            a[k|j] ^= (t << j);
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Return combinations appearing in the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausProcessClausesCut( Clu_Man_t * p, Fra_Sml_t * pSimMan, Dar_Cut_t * pCut, int * pScores )
-{
-    unsigned Matrix[32];
-    unsigned * pSims[16], uWord;
-    int nSeries, i, k, j;
-    int nWordsForSim = pSimMan->nWordsTotal - p->nSimWordsPref;
-    // compute parameters
-    assert( pCut->nLeaves > 1 && pCut->nLeaves < 5 );
-    assert( nWordsForSim % 8 == 0 );
-    // get parameters
-    for ( i = 0; i < (int)pCut->nLeaves; i++ )
-        pSims[i] = Fra_ObjSim( pSimMan, pCut->pLeaves[i] ) + p->nSimWordsPref;
-    // add combinational patterns
-    memset( pScores, 0, sizeof(int) * 16 );
-    nSeries = nWordsForSim / 8;
-    for ( i = 0; i < nSeries; i++ )
-    {
-        memset( Matrix, 0, sizeof(unsigned) * 32 );
-        for ( k = 0; k < 8; k++ )
-            for ( j = 0; j < (int)pCut->nLeaves; j++ )
-                Matrix[31-(k*4+j)] = pSims[j][i*8+k];
-        transpose32a( Matrix );
-        for ( k = 0; k < 32; k++ )
-            for ( j = 0, uWord = Matrix[k]; j < 8; j++, uWord >>= 4 )
-                pScores[uWord & 0xF]++;
-    }
-    // collect patterns
-    uWord = 0;
-    for ( i = 0; i < 16; i++ )
-        if ( pScores[i] )
-            uWord |= (1 << i);
-//    Extra_PrintBinary( stdout, &uWord, 16 ); printf( "\n" );
-    return (int)uWord;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Return combinations appearing in the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausProcessClausesCut2( Clu_Man_t * p, Fra_Sml_t * pSimMan, Dar_Cut_t * pCut, int * pScores )
-{
-    unsigned * pSims[16], uWord;
-    int iMint, i, k, b;
-    int nWordsForSim = pSimMan->nWordsTotal - p->nSimWordsPref;
-    // compute parameters
-    assert( pCut->nLeaves > 1 && pCut->nLeaves < 5 );
-    assert( nWordsForSim % 8 == 0 );
-    // get parameters
-    for ( i = 0; i < (int)pCut->nLeaves; i++ )
-        pSims[i] = Fra_ObjSim( pSimMan, pCut->pLeaves[i] ) + p->nSimWordsPref;
-    // add combinational patterns
-    memset( pScores, 0, sizeof(int) * 16 );
-    for ( i = 0; i < nWordsForSim; i++ )
-        for ( k = 0; k < 32; k++ )
-        {
-            iMint = 0;
-            for ( b = 0; b < (int)pCut->nLeaves; b++ )
-                if ( pSims[b][i] & (1 << k) )
-                    iMint |= (1 << b);
-            pScores[iMint]++;
-        }
-    // collect patterns
-    uWord = 0;
-    for ( i = 0; i < 16; i++ )
-        if ( pScores[i] )
-            uWord |= (1 << i);
-//    Extra_PrintBinary( stdout, &uWord, 16 ); printf( "\n" );
-    return (int)uWord;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Return the number of combinations appearing in the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClausProcessClausesCut3( Clu_Man_t * p, Fra_Sml_t * pSimMan, Aig_Cut_t * pCut, int * pScores )
-{
-    unsigned Matrix[32];
-    unsigned * pSims[16], uWord;
-    int iMint, i, j, k, b, nMints, nSeries;
-    int nWordsForSim = pSimMan->nWordsTotal - p->nSimWordsPref;
-
-    // compute parameters
-    assert( pCut->nFanins > 1 && pCut->nFanins < 17 );
-    assert( nWordsForSim % 8 == 0 );
-    // get parameters
-    for ( i = 0; i < (int)pCut->nFanins; i++ )
-        pSims[i] = Fra_ObjSim( pSimMan, pCut->pFanins[i] ) + p->nSimWordsPref;
-    // add combinational patterns
-    nMints = (1 << pCut->nFanins);
-    memset( pScores, 0, sizeof(int) * nMints );
-
-    if ( pCut->nLeafMax == 4 )
-    {
-        // convert the simulation patterns
-        nSeries = nWordsForSim / 8;
-        for ( i = 0; i < nSeries; i++ )
-        {
-            memset( Matrix, 0, sizeof(unsigned) * 32 );
-            for ( k = 0; k < 8; k++ )
-                for ( j = 0; j < (int)pCut->nFanins; j++ )
-                    Matrix[31-(k*4+j)] = pSims[j][i*8+k];
-            transpose32a( Matrix );
-            for ( k = 0; k < 32; k++ )
-                for ( j = 0, uWord = Matrix[k]; j < 8; j++, uWord >>= 4 )
-                    pScores[uWord & 0xF]++;
-        }
-    }
-    else
-    {
-        // go through the simulation patterns
-        for ( i = 0; i < nWordsForSim; i++ )
-            for ( k = 0; k < 32; k++ )
-            {
-                iMint = 0;
-                for ( b = 0; b < (int)pCut->nFanins; b++ )
-                    if ( pSims[b][i] & (1 << k) )
-                        iMint |= (1 << b);
-                pScores[iMint]++;
-            }
-    }
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the cut-off cost.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausSelectClauses( Clu_Man_t * p )
-{
-    int * pCostCount, nClauCount, Cost, CostMax, i, c;
-    assert( Vec_IntSize(p->vClauses) > p->nClausesMax );   
-    // count how many implications have each cost
-    CostMax = p->nSimWords * 32 + 1;
-    pCostCount = ABC_ALLOC( int, CostMax );
-    memset( pCostCount, 0, sizeof(int) * CostMax );
-    Vec_IntForEachEntry( p->vCosts, Cost, i )
-    {
-        if ( Cost == -1 )
-            continue;
-        assert( Cost < CostMax );
-        pCostCount[ Cost ]++;
-    }
-    assert( pCostCount[0] == 0 );
-    // select the bound on the cost (above this bound, implication will be included)
-    nClauCount = 0;
-    for ( c = CostMax - 1; c > 0; c-- )
-    {
-        assert( pCostCount[c] >= 0 );
-        nClauCount += pCostCount[c];
-        if ( nClauCount >= p->nClausesMax )
-            break;
-    }
-    // collect implications with the given costs
-    nClauCount = 0;
-    Vec_IntForEachEntry( p->vCosts, Cost, i )
-    {
-        if ( Cost >= c && nClauCount < p->nClausesMax )
-        {
-            nClauCount++;
-            continue;
-        }
-        Vec_IntWriteEntry( p->vCosts, i, -1 );
-    }
-    ABC_FREE( pCostCount );
-    p->nClauses = nClauCount;
-if ( p->fVerbose )
-printf( "Selected %d clauses. Cost range: [%d < %d < %d]\n", nClauCount, 1, c, CostMax );
-    return c;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Processes the clauses.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClausRecordClause( Clu_Man_t * p, Dar_Cut_t * pCut, int iMint, int Cost )
-{
-    int i;
-    for ( i = 0; i < (int)pCut->nLeaves; i++ )
-        Vec_IntPush( p->vLits, toLitCond( p->pCnf->pVarNums[pCut->pLeaves[i]], (iMint&(1<<i)) ) );
-    Vec_IntPush( p->vClauses, Vec_IntSize(p->vLits) );
-    Vec_IntPush( p->vCosts, Cost );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Processes the clauses.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClausRecordClause2( Clu_Man_t * p, Aig_Cut_t * pCut, int iMint, int Cost )
-{
-    int i;
-    for ( i = 0; i < (int)pCut->nFanins; i++ )
-        Vec_IntPush( p->vLits, toLitCond( p->pCnf->pVarNums[pCut->pFanins[i]], (iMint&(1<<i)) ) );
-    Vec_IntPush( p->vClauses, Vec_IntSize(p->vLits) );
-    Vec_IntPush( p->vCosts, Cost );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation info is composed of all zeros.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausSmlNodeIsConst( Fra_Sml_t * pSeq, Aig_Obj_t * pObj )
-{
-    unsigned * pSims;
-    int i;
-    pSims = Fra_ObjSim(pSeq, pObj->Id);
-    for ( i = pSeq->nWordsPref; i < pSeq->nWordsTotal; i++ )
-        if ( pSims[i] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if implications holds.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausSmlNodesAreImp( Fra_Sml_t * pSeq, Aig_Obj_t * pObj1, Aig_Obj_t * pObj2 )
-{
-    unsigned * pSimL, * pSimR;
-    int k;
-    pSimL = Fra_ObjSim(pSeq, pObj1->Id);
-    pSimR = Fra_ObjSim(pSeq, pObj2->Id);
-    for ( k = pSeq->nWordsPref; k < pSeq->nWordsTotal; k++ )
-        if ( pSimL[k] & ~pSimR[k] ) // !(Obj1 -> Obj2)
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if implications holds.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausSmlNodesAreImpC( Fra_Sml_t * pSeq, Aig_Obj_t * pObj1, Aig_Obj_t * pObj2 )
-{
-    unsigned * pSimL, * pSimR;
-    int k;
-    pSimL = Fra_ObjSim(pSeq, pObj1->Id);
-    pSimR = Fra_ObjSim(pSeq, pObj2->Id);
-    for ( k = pSeq->nWordsPref; k < pSeq->nWordsTotal; k++ )
-        if ( pSimL[k] & pSimR[k] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Processes the clauses.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausCollectLatchClauses( Clu_Man_t * p, Fra_Sml_t * pSeq )
-{
-    Aig_Obj_t * pObj1, * pObj2;
-    unsigned * pSims1, * pSims2;
-    int CostMax, i, k, nCountConst, nCountImps;
-
-    nCountConst = nCountImps = 0;
-    CostMax = p->nSimWords * 32;
-/*
-    // add the property
-    {
-        Aig_Obj_t * pObj;
-        int Lits[1];
-        pObj = Aig_ManPo( p->pAig, 0 );
-        Lits[0] = toLitCond( p->pCnf->pVarNums[pObj->Id], 1 ); 
-        Vec_IntPush( p->vLits, Lits[0] );
-        Vec_IntPush( p->vClauses, Vec_IntSize(p->vLits) );
-        Vec_IntPush( p->vCosts, CostMax );
-        nCountConst++;
-//        printf( "Added the target property to the set of clauses to be inductively checked.\n" );
-    }
-*/
-
-    pSeq->nWordsPref = p->nSimWordsPref;
-    Aig_ManForEachLoSeq( p->pAig, pObj1, i )
-    {
-        pSims1 = Fra_ObjSim( pSeq, pObj1->Id );
-        if ( Fra_ClausSmlNodeIsConst( pSeq, pObj1 ) )
-        {
-            Vec_IntPush( p->vLits, toLitCond( p->pCnf->pVarNums[pObj1->Id], 1 ) );
-            Vec_IntPush( p->vClauses, Vec_IntSize(p->vLits) );
-            Vec_IntPush( p->vCosts, CostMax );
-            nCountConst++;
-            continue;
-        }
-        Aig_ManForEachLoSeq( p->pAig, pObj2, k )
-        {
-            pSims2 = Fra_ObjSim( pSeq, pObj2->Id );
-            if ( Fra_ClausSmlNodesAreImp( pSeq, pObj1, pObj2 ) )
-            {
-                Vec_IntPush( p->vLits, toLitCond( p->pCnf->pVarNums[pObj1->Id], 1 ) );
-                Vec_IntPush( p->vLits, toLitCond( p->pCnf->pVarNums[pObj2->Id], 0 ) );
-                Vec_IntPush( p->vClauses, Vec_IntSize(p->vLits) );
-                Vec_IntPush( p->vCosts, CostMax );
-                nCountImps++;
-                continue;
-            }
-            if ( Fra_ClausSmlNodesAreImp( pSeq, pObj2, pObj1 ) )
-            {
-                Vec_IntPush( p->vLits, toLitCond( p->pCnf->pVarNums[pObj2->Id], 1 ) );
-                Vec_IntPush( p->vLits, toLitCond( p->pCnf->pVarNums[pObj1->Id], 0 ) );
-                Vec_IntPush( p->vClauses, Vec_IntSize(p->vLits) );
-                Vec_IntPush( p->vCosts, CostMax );
-                nCountImps++;
-                continue;
-            }
-            if ( Fra_ClausSmlNodesAreImpC( pSeq, pObj1, pObj2 ) )
-            {
-                Vec_IntPush( p->vLits, toLitCond( p->pCnf->pVarNums[pObj1->Id], 1 ) );
-                Vec_IntPush( p->vLits, toLitCond( p->pCnf->pVarNums[pObj2->Id], 1 ) );
-                Vec_IntPush( p->vClauses, Vec_IntSize(p->vLits) );
-                Vec_IntPush( p->vCosts, CostMax );
-                nCountImps++;
-                continue;
-            }
-        }
-        if ( nCountConst + nCountImps > p->nClausesMax / 2 )
-            break;
-    }
-    pSeq->nWordsPref = 0;
-    if ( p->fVerbose )
-    printf( "Collected %d register constants and %d one-hotness implications.\n", nCountConst, nCountImps );
-    p->nOneHots = nCountConst + nCountImps;
-    p->nOneHotsProven = 0;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Processes the clauses.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausProcessClauses( Clu_Man_t * p, int fRefs )
-{
-    Aig_MmFixed_t * pMemCuts;
-//    Aig_ManCut_t * pManCut;
-    Fra_Sml_t * pComb, * pSeq;
-    Aig_Obj_t * pObj;
-    Dar_Cut_t * pCut;
-    int Scores[16], uScores, i, k, j, clk, nCuts = 0;
-
-    // simulate the AIG
-clk = clock();
-//    srand( 0xAABBAABB );
-    Aig_ManRandom(1);
-    pSeq = Fra_SmlSimulateSeq( p->pAig, 0, p->nPref + p->nSimFrames, p->nSimWords/p->nSimFrames, 1 );
-    if ( p->fTarget && pSeq->fNonConstOut )
-    {
-        printf( "Property failed after sequential simulation!\n" );
-        Fra_SmlStop( pSeq );
-        return 0;
-    }
-if ( p->fVerbose )
-{
-ABC_PRT( "Sim-seq", clock() - clk );
-}
-
-
-clk = clock();
-    if ( fRefs )
-    {
-    Fra_ClausCollectLatchClauses( p, pSeq );
-if ( p->fVerbose )
-{
-ABC_PRT( "Lat-cla", clock() - clk );
-}
-    }
-
-
-    // generate cuts for all nodes, assign cost, and find best cuts
-clk = clock();
-    pMemCuts = Dar_ManComputeCuts( p->pAig, 10, 1 );
-//    pManCut = Aig_ComputeCuts( p->pAig, 10, 4, 0, 1 );
-if ( p->fVerbose )
-{
-ABC_PRT( "Cuts   ", clock() - clk );
-}
-
-    // collect sequential info for each cut
-clk = clock();
-    Aig_ManForEachNode( p->pAig, pObj, i )
-        Dar_ObjForEachCut( pObj, pCut, k )
-            if ( pCut->nLeaves > 1 )
-            {
-                pCut->uTruth = Fra_ClausProcessClausesCut( p, pSeq, pCut, Scores );
-//                uScores = Fra_ClausProcessClausesCut2( p, pSeq, pCut, Scores );
-//                if ( uScores != pCut->uTruth )
-//                {
-//                    int x = 0;
-//                }
-            }
-if ( p->fVerbose )
-{
-ABC_PRT( "Infoseq", clock() - clk );
-}
-    Fra_SmlStop( pSeq );
-
-    // perform combinational simulation
-clk = clock();
-//    srand( 0xAABBAABB );
-    Aig_ManRandom(1);
-    pComb = Fra_SmlSimulateComb( p->pAig, p->nSimWords + p->nSimWordsPref  );
-if ( p->fVerbose )
-{
-ABC_PRT( "Sim-cmb", clock() - clk );
-}
-
-    // collect combinational info for each cut
-clk = clock();
-    Aig_ManForEachNode( p->pAig, pObj, i )
-        Dar_ObjForEachCut( pObj, pCut, k )
-            if ( pCut->nLeaves > 1 )
-            {
-                nCuts++;
-                uScores = Fra_ClausProcessClausesCut( p, pComb, pCut, Scores );
-                uScores &= ~pCut->uTruth; pCut->uTruth = 0;
-                if ( uScores == 0 )
-                    continue;
-                // write the clauses
-                for ( j = 0; j < (1<<pCut->nLeaves); j++ )
-                    if ( uScores & (1 << j) )
-                        Fra_ClausRecordClause( p, pCut, j, Scores[j] );
-
-            }
-    Fra_SmlStop( pComb );
-    Aig_MmFixedStop( pMemCuts, 0 );
-//    Aig_ManCutStop( pManCut );
-if ( p->fVerbose )
-{
-ABC_PRT( "Infocmb", clock() - clk );
-}
-
-    if ( p->fVerbose )
-    printf( "Node = %5d. Non-triv cuts = %7d. Clauses = %6d. Clause per cut = %6.2f.\n", 
-        Aig_ManNodeNum(p->pAig), nCuts, Vec_IntSize(p->vClauses), 1.0*Vec_IntSize(p->vClauses)/nCuts );
-
-    if ( Vec_IntSize(p->vClauses) > p->nClausesMax )
-        Fra_ClausSelectClauses( p );
-    else
-        p->nClauses = Vec_IntSize( p->vClauses );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Processes the clauses.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausProcessClauses2( Clu_Man_t * p, int fRefs )
-{
-//    Aig_MmFixed_t * pMemCuts;
-    Aig_ManCut_t * pManCut;
-    Fra_Sml_t * pComb, * pSeq;
-    Aig_Obj_t * pObj;
-    Aig_Cut_t * pCut;
-    int i, k, j, clk, nCuts = 0;
-    int ScoresSeq[1<<12], ScoresComb[1<<12];
-    assert( p->nLutSize < 13 );
-
-    // simulate the AIG
-clk = clock();
-//    srand( 0xAABBAABB );
-    Aig_ManRandom(1);
-    pSeq = Fra_SmlSimulateSeq( p->pAig, 0, p->nPref + p->nSimFrames, p->nSimWords/p->nSimFrames, 1  );
-    if ( p->fTarget && pSeq->fNonConstOut )
-    {
-        printf( "Property failed after sequential simulation!\n" );
-        Fra_SmlStop( pSeq );
-        return 0;
-    }
-if ( p->fVerbose )
-{
-//ABC_PRT( "Sim-seq", clock() - clk );
-}
-
-    // perform combinational simulation
-clk = clock();
-//    srand( 0xAABBAABB );
-    Aig_ManRandom(1);
-    pComb = Fra_SmlSimulateComb( p->pAig, p->nSimWords + p->nSimWordsPref  );
-if ( p->fVerbose )
-{
-//ABC_PRT( "Sim-cmb", clock() - clk );
-}
-
-
-clk = clock();
-    if ( fRefs )
-    {
-    Fra_ClausCollectLatchClauses( p, pSeq );
-if ( p->fVerbose )
-{
-//ABC_PRT( "Lat-cla", clock() - clk );
-}
-    }
-
-
-    // generate cuts for all nodes, assign cost, and find best cuts
-clk = clock();
-//    pMemCuts = Dar_ManComputeCuts( p->pAig, 10, 1 );
-    pManCut = Aig_ComputeCuts( p->pAig, p->nCutsMax, p->nLutSize, 0, p->fVerbose );
-if ( p->fVerbose )
-{
-//ABC_PRT( "Cuts   ", clock() - clk );
-}
-
-    // collect combinational info for each cut
-clk = clock();
-    Aig_ManForEachNode( p->pAig, pObj, i )
-    {
-        if ( pObj->Level > (unsigned)p->nLevels )
-            continue;
-        Aig_ObjForEachCut( pManCut, pObj, pCut, k )
-            if ( pCut->nFanins > 1 )
-            {
-                nCuts++;
-                Fra_ClausProcessClausesCut3( p, pSeq, pCut, ScoresSeq );
-                Fra_ClausProcessClausesCut3( p, pComb, pCut, ScoresComb );
-                // write the clauses
-                for ( j = 0; j < (1<<pCut->nFanins); j++ )
-                    if ( ScoresComb[j] != 0 && ScoresSeq[j] == 0 )
-                        Fra_ClausRecordClause2( p, pCut, j, ScoresComb[j] );
-
-            }
-    }
-    Fra_SmlStop( pSeq );
-    Fra_SmlStop( pComb );
-    p->nCuts = nCuts;
-//    Aig_MmFixedStop( pMemCuts, 0 );
-    Aig_ManCutStop( pManCut );
-    p->pAig->pManCuts = NULL;
-
-    if ( p->fVerbose )
-    {
-    printf( "Node = %5d. Cuts = %7d. Clauses = %6d. Clause/cut = %6.2f.\n", 
-        Aig_ManNodeNum(p->pAig), nCuts, Vec_IntSize(p->vClauses), 1.0*Vec_IntSize(p->vClauses)/nCuts );
-    ABC_PRT( "Processing sim-info to find candidate clauses (unoptimized)", clock() - clk );
-    }
-
-    // filter out clauses that are contained in the already proven clauses
-    assert( p->nClauses == 0 );
-    p->nClauses = Vec_IntSize( p->vClauses );
-    if ( Vec_IntSize( p->vClausesProven ) > 0 )
-    {
-        int RetValue, k, Beg;
-        int End = -1; // Suppress "might be used uninitialized"
-        int * pStart;
-        // reset the solver
-        if ( p->pSatMain )  sat_solver_delete( p->pSatMain );
-        p->pSatMain = (sat_solver *)Cnf_DataWriteIntoSolver( p->pCnf, 1, 0 );
-        if ( p->pSatMain == NULL )
-        {
-            printf( "Error: Main solver is unsat.\n" );
-            return -1;
-        }  
-
-        // add the proven clauses
-        Beg = 0;
-        pStart = Vec_IntArray(p->vLitsProven);
-        Vec_IntForEachEntry( p->vClausesProven, End, i )
-        {
-            assert( End - Beg <= p->nLutSize );
-            // add the clause to all timeframes
-            RetValue = sat_solver_addclause( p->pSatMain, pStart + Beg, pStart + End );
-            if ( RetValue == 0 )
-            {
-                printf( "Error: Solver is UNSAT after adding assumption clauses.\n" );
-                return -1;
-            }
-            Beg = End;
-        }
-        assert( End == Vec_IntSize(p->vLitsProven) );
-
-        // check the clauses
-        Beg = 0;
-        pStart = Vec_IntArray(p->vLits);
-        Vec_IntForEachEntry( p->vClauses, End, i )
-        {
-            assert( Vec_IntEntry( p->vCosts, i ) >= 0 );
-            assert( End - Beg <= p->nLutSize );
-            // check the clause
-            for ( k = Beg; k < End; k++ )
-                pStart[k] = lit_neg( pStart[k] );
-            RetValue = sat_solver_solve( p->pSatMain, pStart + Beg, pStart + End, (ABC_INT64_T)p->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-            for ( k = Beg; k < End; k++ )
-                pStart[k] = lit_neg( pStart[k] );
-            // the clause holds
-            if ( RetValue == l_False )
-            {
-                Vec_IntWriteEntry( p->vCosts, i, -1 );
-                p->nClauses--;
-            }
-            Beg = End;
-        }
-        assert( End == Vec_IntSize(p->vLits) );
-        if ( p->fVerbose )
-        printf( "Already proved clauses filtered out %d candidate clauses (out of %d).\n", 
-            Vec_IntSize(p->vClauses) - p->nClauses, Vec_IntSize(p->vClauses) );
-    }
-
-    p->fFiltering = 0;
-    if ( p->nClauses > p->nClausesMax )
-    {
-        Fra_ClausSelectClauses( p );
-        p->fFiltering = 1;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Converts AIG into the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausBmcClauses( Clu_Man_t * p )
-{
-    int * pStart, nLitsTot, RetValue, Beg, End, Counter, i, k, f;
-/*
-    for ( i = 0; i < Vec_IntSize(p->vLits); i++ )
-        printf( "%d ", p->vLits->pArray[i] );
-    printf( "\n" );
-*/
-    // add the clauses
-    Counter = 0;
-    // skip through the prefix variables
-    if ( p->nPref )
-    {
-        nLitsTot = p->nPref * 2 * p->pCnf->nVars;
-        for ( i = 0; i < Vec_IntSize(p->vLits); i++ )
-            p->vLits->pArray[i] += nLitsTot;
-    }
-    // go through the timeframes
-    nLitsTot = 2 * p->pCnf->nVars;
-    pStart = Vec_IntArray(p->vLits);
-    for ( f = 0; f < p->nFrames; f++ )
-    {
-        Beg = 0;
-        Vec_IntForEachEntry( p->vClauses, End, i )
-        {
-            if ( Vec_IntEntry( p->vCosts, i ) == -1 )
-            {
-                Beg = End;
-                continue;
-            }
-            assert( Vec_IntEntry( p->vCosts, i ) > 0 );
-            assert( End - Beg <= p->nLutSize );
-
-            for ( k = Beg; k < End; k++ )
-                pStart[k] = lit_neg( pStart[k] );
-            RetValue = sat_solver_solve( p->pSatBmc, pStart + Beg, pStart + End, (ABC_INT64_T)p->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-            for ( k = Beg; k < End; k++ )
-                pStart[k] = lit_neg( pStart[k] );
-
-            if ( RetValue != l_False )
-            {
-                Beg = End;
-                Vec_IntWriteEntry( p->vCosts, i, -1 );
-                Counter++;
-                continue;
-            }
-/*
-            // add the clause
-            RetValue = sat_solver_addclause( p->pSatBmc, pStart + Beg, pStart + End );
-    //        assert( RetValue == 1 );
-            if ( RetValue == 0 )
-            {
-                printf( "Error: Solver is UNSAT after adding BMC clauses.\n" );
-                return -1;
-            }
-*/
-            Beg = End;
-
-            // simplify the solver
-            if ( p->pSatBmc->qtail != p->pSatBmc->qhead )
-            {
-                RetValue = sat_solver_simplify(p->pSatBmc);
-                assert( RetValue != 0 );
-                assert( p->pSatBmc->qtail == p->pSatBmc->qhead );
-            }
-        }
-        // increment literals
-        for ( i = 0; i < Vec_IntSize(p->vLits); i++ )
-            p->vLits->pArray[i] += nLitsTot;
-    }
-
-    // return clauses back to normal
-    nLitsTot = (p->nPref + p->nFrames) * nLitsTot;
-    for ( i = 0; i < Vec_IntSize(p->vLits); i++ )
-        p->vLits->pArray[i] -= nLitsTot;
-/*
-    for ( i = 0; i < Vec_IntSize(p->vLits); i++ )
-        printf( "%d ", p->vLits->pArray[i] );
-    printf( "\n" );
-*/
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Cleans simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClausSimInfoClean( Clu_Man_t * p )
-{
-    assert( p->pCnf->nVars <= Vec_PtrSize(p->vCexes) );
-    Vec_PtrCleanSimInfo( p->vCexes, 0, p->nCexesAlloc/32 );
-    p->nCexes = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reallocs simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClausSimInfoRealloc( Clu_Man_t * p )
-{
-    assert( p->nCexes == p->nCexesAlloc );
-    Vec_PtrReallocSimInfo( p->vCexes );
-    Vec_PtrCleanSimInfo( p->vCexes, p->nCexesAlloc/32, 2 * p->nCexesAlloc/32 );
-    p->nCexesAlloc *= 2;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Records simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClausSimInfoRecord( Clu_Man_t * p, int * pModel )
-{
-    int i;
-    if ( p->nCexes == p->nCexesAlloc )
-        Fra_ClausSimInfoRealloc( p );
-    assert( p->nCexes < p->nCexesAlloc );
-    for ( i = 0; i < p->pCnf->nVars; i++ )
-    {
-        if ( pModel[i] == l_True )
-        {
-            assert( Aig_InfoHasBit( (unsigned *)Vec_PtrEntry(p->vCexes, i), p->nCexes ) == 0 );
-            Aig_InfoSetBit( (unsigned *)Vec_PtrEntry(p->vCexes, i), p->nCexes );
-        }
-    }
-    p->nCexes++;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Uses the simulation info.]
-
-  Description [Returns 1 if the simulation info disproved the clause.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausSimInfoCheck( Clu_Man_t * p, int * pLits, int nLits )
-{
-    unsigned * pSims[16], uWord;
-    int nWords, iVar, i, w;
-    for ( i = 0; i < nLits; i++ )
-    {
-        iVar = lit_var(pLits[i]) - p->nFrames * p->pCnf->nVars;
-        assert( iVar > 0 && iVar < p->pCnf->nVars );
-        pSims[i] = (unsigned *)Vec_PtrEntry( p->vCexes, iVar );
-    }
-    nWords = p->nCexes / 32;
-    for ( w = 0; w < nWords; w++ )
-    {
-        uWord = ~(unsigned)0;
-        for ( i = 0; i < nLits; i++ )
-            uWord &= (lit_sign(pLits[i])? pSims[i][w] : ~pSims[i][w]);
-        if ( uWord )
-            return 1;
-    }
-    if ( p->nCexes % 32 )
-    {
-        uWord = ~(unsigned)0;
-        for ( i = 0; i < nLits; i++ )
-            uWord &= (lit_sign(pLits[i])? pSims[i][w] : ~pSims[i][w]);
-        if ( uWord & Aig_InfoMask( p->nCexes % 32 ) )
-            return 1;
-    }
-    return 0;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Converts AIG into the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ClausInductiveClauses( Clu_Man_t * p )
-{
-//    Aig_Obj_t * pObjLi, * pObjLo;
-    int * pStart, nLitsTot, RetValue, Beg, End, Counter, i, k, f, fFlag;//, Lits[2];
-    p->fFail = 0;
-
-    // reset the solver
-    if ( p->pSatMain )  sat_solver_delete( p->pSatMain );
-    p->pSatMain = (sat_solver *)Cnf_DataWriteIntoSolver( p->pCnf, p->nFrames+1, 0 );
-    if ( p->pSatMain == NULL )
-    {
-        printf( "Error: Main solver is unsat.\n" );
-        return -1;
-    }  
-    Fra_ClausSimInfoClean( p );
-
-/*
-    // check if the property holds
-    if ( Fra_ClausRunSat0( p ) )
-        printf( "Property holds without strengthening.\n" );
-    else
-        printf( "Property does not hold without strengthening.\n" );
-*/
-/*
-    // add constant registers
-    Aig_ManForEachLiLoSeq( p->pAig, pObjLi, pObjLo, i )  
-        if ( Aig_ObjFanin0(pObjLi) == Aig_ManConst1(p->pAig) )
-        {
-            for ( k = 0; k < p->nFrames; k++ )
-            {
-                Lits[0] = k * 2 * p->pCnf->nVars + toLitCond( p->pCnf->pVarNums[pObjLo->Id], Aig_ObjFaninC0(pObjLi) ); 
-                RetValue = sat_solver_addclause( p->pSatMain, Lits, Lits + 1 );
-                if ( RetValue == 0 )
-                {
-                    printf( "Error: Solver is UNSAT after adding constant-register clauses.\n" );
-                    return -1;
-                }
-            }
-        }
-*/
-
-
-    // add the proven clauses
-    nLitsTot = 2 * p->pCnf->nVars;
-    pStart = Vec_IntArray(p->vLitsProven);
-    for ( f = 0; f < p->nFrames; f++ )
-    {
-        Beg = 0;
-        Vec_IntForEachEntry( p->vClausesProven, End, i )
-        {
-            assert( End - Beg <= p->nLutSize );
-            // add the clause to all timeframes
-            RetValue = sat_solver_addclause( p->pSatMain, pStart + Beg, pStart + End );
-            if ( RetValue == 0 )
-            {
-                printf( "Error: Solver is UNSAT after adding assumption clauses.\n" );
-                return -1;
-            }
-            Beg = End;
-        }
-        // increment literals
-        for ( i = 0; i < Vec_IntSize(p->vLitsProven); i++ )
-            p->vLitsProven->pArray[i] += nLitsTot;
-    }
-    // return clauses back to normal
-    nLitsTot = (p->nFrames) * nLitsTot;
-    for ( i = 0; i < Vec_IntSize(p->vLitsProven); i++ )
-        p->vLitsProven->pArray[i] -= nLitsTot;
-
-/*
-    // add the proven clauses
-    nLitsTot = 2 * p->pCnf->nVars;
-    pStart = Vec_IntArray(p->vLitsProven);
-    Beg = 0;
-    Vec_IntForEachEntry( p->vClausesProven, End, i )
-    {
-        assert( End - Beg <= p->nLutSize );
-        // add the clause to all timeframes
-        RetValue = sat_solver_addclause( p->pSatMain, pStart + Beg, pStart + End );
-        if ( RetValue == 0 )
-        {
-            printf( "Error: Solver is UNSAT after adding assumption clauses.\n" );
-            return -1;
-        }
-        Beg = End;
-    }
-*/
-    
-    // add the clauses
-    nLitsTot = 2 * p->pCnf->nVars;
-    pStart = Vec_IntArray(p->vLits);
-    for ( f = 0; f < p->nFrames; f++ )
-    {
-        Beg = 0;
-        Vec_IntForEachEntry( p->vClauses, End, i )
-        {
-            if ( Vec_IntEntry( p->vCosts, i ) == -1 )
-            {
-                Beg = End;
-                continue;
-            }
-            assert( Vec_IntEntry( p->vCosts, i ) > 0 );
-            assert( End - Beg <= p->nLutSize );
-            // add the clause to all timeframes
-            RetValue = sat_solver_addclause( p->pSatMain, pStart + Beg, pStart + End );
-            if ( RetValue == 0 )
-            {
-                printf( "Error: Solver is UNSAT after adding assumption clauses.\n" );
-                return -1;
-            }
-            Beg = End;
-        }
-        // increment literals
-        for ( i = 0; i < Vec_IntSize(p->vLits); i++ )
-            p->vLits->pArray[i] += nLitsTot;
-    }
-
-    // simplify the solver
-    if ( p->pSatMain->qtail != p->pSatMain->qhead )
-    {
-        RetValue = sat_solver_simplify(p->pSatMain);
-        assert( RetValue != 0 );
-        assert( p->pSatMain->qtail == p->pSatMain->qhead );
-    }
-  
-    // check if the property holds
-    if ( p->fTarget )
-    {
-        if ( Fra_ClausRunSat0( p ) )
-        {
-            if ( p->fVerbose )
-            printf( " Property holds.  " );
-        }
-        else
-        {
-            if ( p->fVerbose )
-            printf( " Property fails.  " );
-    //        return -2;
-            p->fFail = 1;
-        }
-    }
-
-/*
-    // add the property for the first K frames
-    for ( i = 0; i < p->nFrames; i++ )
-    {
-        Aig_Obj_t * pObj;
-        int Lits[2];
-        // set the output literals
-        pObj = Aig_ManPo(p->pAig, 0);
-        Lits[0] = i * nLitsTot + toLitCond( p->pCnf->pVarNums[pObj->Id], 1 ); 
-        // add the clause
-        RetValue = sat_solver_addclause( p->pSatMain, Lits, Lits + 1 );
-//        assert( RetValue == 1 );
-        if ( RetValue == 0 )
-        {
-            printf( "Error: Solver is UNSAT after adding property for the first K frames.\n" );
-            return -1;
-        }
-    }
-*/
-
-    // simplify the solver
-    if ( p->pSatMain->qtail != p->pSatMain->qhead )
-    {
-        RetValue = sat_solver_simplify(p->pSatMain);
-        assert( RetValue != 0 );
-        assert( p->pSatMain->qtail == p->pSatMain->qhead );
-    }
-
-
-    // check the clause in the last timeframe
-    Beg = 0;
-    Counter = 0;
-    Vec_IntForEachEntry( p->vClauses, End, i )
-    {
-        if ( Vec_IntEntry( p->vCosts, i ) == -1 )
-        {
-            Beg = End;
-            continue;
-        }
-        assert( Vec_IntEntry( p->vCosts, i ) > 0 );
-        assert( End - Beg <= p->nLutSize );
-
-        if ( Fra_ClausSimInfoCheck(p, pStart + Beg, End - Beg) )
-        {
-            fFlag = 1;
-//            printf( "s-" );
-
-            Beg = End;
-            Vec_IntWriteEntry( p->vCosts, i, -1 );
-            Counter++;
-            continue;
-        }
-        else
-        {
-            fFlag = 0;
-//            printf( "s?" );
-        }
-
-        for ( k = Beg; k < End; k++ )
-            pStart[k] = lit_neg( pStart[k] );
-        RetValue = sat_solver_solve( p->pSatMain, pStart + Beg, pStart + End, (ABC_INT64_T)p->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-        for ( k = Beg; k < End; k++ )
-            pStart[k] = lit_neg( pStart[k] );
-
-        // the problem is not solved
-        if ( RetValue != l_False )
-        {
-//            printf( "S- " );
-//            Fra_ClausSimInfoRecord( p, (int*)p->pSatMain->model.ptr + p->nFrames * p->pCnf->nVars );
-            Fra_ClausSimInfoRecord( p, (int*)p->pSatMain->model + p->nFrames * p->pCnf->nVars );
-//            RetValue = Fra_ClausSimInfoCheck(p, pStart + Beg, End - Beg);
-//            assert( RetValue );
-
-            Beg = End;
-            Vec_IntWriteEntry( p->vCosts, i, -1 );
-            Counter++;
-            continue;
-        }
-//        printf( "S+ " );
-//        assert( !fFlag );
-
-/*
-        // add the clause
-        RetValue = sat_solver_addclause( p->pSatMain, pStart + Beg, pStart + End );
-//        assert( RetValue == 1 );
-        if ( RetValue == 0 )
-        {
-            printf( "Error: Solver is UNSAT after adding proved clauses.\n" );
-            return -1;
-        }
-*/
-        Beg = End;
-
-        // simplify the solver
-        if ( p->pSatMain->qtail != p->pSatMain->qhead )
-        {
-            RetValue = sat_solver_simplify(p->pSatMain);
-            assert( RetValue != 0 );
-            assert( p->pSatMain->qtail == p->pSatMain->qhead );
-        }
-    }
-
-    // return clauses back to normal
-    nLitsTot = p->nFrames * nLitsTot;
-    for ( i = 0; i < Vec_IntSize(p->vLits); i++ )
-        p->vLits->pArray[i] -= nLitsTot;
-
-//    if ( fFail )
-//        return -2;
-    return Counter;
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Converts AIG into the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Clu_Man_t * Fra_ClausAlloc( Aig_Man_t * pAig, int nFrames, int nPref, int nClausesMax, int nLutSize, int nLevels, int nCutsMax, int nBatches, int fStepUp, int fTarget, int fVerbose, int fVeryVerbose )
-{
-    Clu_Man_t * p;
-    p = ABC_ALLOC( Clu_Man_t, 1 );
-    memset( p, 0, sizeof(Clu_Man_t) );
-    p->pAig          = pAig;
-    p->nFrames       = nFrames;
-    p->nPref         = nPref;
-    p->nClausesMax   = nClausesMax;
-    p->nLutSize      = nLutSize;
-    p->nLevels       = nLevels;
-    p->nCutsMax      = nCutsMax;
-    p->nBatches      = nBatches;
-    p->fStepUp       = fStepUp;
-    p->fTarget       = fTarget;
-    p->fVerbose      = fVerbose;
-    p->fVeryVerbose  = fVeryVerbose;
-    p->nSimWords     = 512;//1024;//64;
-    p->nSimFrames    = 32;//8;//32;
-    p->nSimWordsPref = p->nPref*p->nSimWords/p->nSimFrames;
-
-    p->vLits         = Vec_IntAlloc( 1<<14 );
-    p->vClauses      = Vec_IntAlloc( 1<<12 );
-    p->vCosts        = Vec_IntAlloc( 1<<12 );
-
-    p->vLitsProven   = Vec_IntAlloc( 1<<14 );
-    p->vClausesProven= Vec_IntAlloc( 1<<12 );
-
-    p->nCexesAlloc   = 1024;
-    p->vCexes        = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p->pAig)+1, p->nCexesAlloc/32 );
-    Vec_PtrCleanSimInfo( p->vCexes, 0, p->nCexesAlloc/32 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Converts AIG into the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClausFree( Clu_Man_t * p )
-{
-    if ( p->vCexes )    Vec_PtrFree( p->vCexes );
-    if ( p->vLits )     Vec_IntFree( p->vLits );
-    if ( p->vClauses )  Vec_IntFree( p->vClauses );
-    if ( p->vLitsProven )     Vec_IntFree( p->vLitsProven );
-    if ( p->vClausesProven )  Vec_IntFree( p->vClausesProven );
-    if ( p->vCosts )    Vec_IntFree( p->vCosts );
-    if ( p->pCnf )      Cnf_DataFree( p->pCnf );
-    if ( p->pSatMain )  sat_solver_delete( p->pSatMain );
-    if ( p->pSatBmc )   sat_solver_delete( p->pSatBmc );
-    ABC_FREE( p );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Converts AIG into the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClausAddToStorage( Clu_Man_t * p )
-{
-    int * pStart; 
-    int Beg, End, Counter, i, k;
-    Beg = 0;
-    Counter = 0;
-    pStart = Vec_IntArray( p->vLits );
-    Vec_IntForEachEntry( p->vClauses, End, i )
-    {
-        if ( Vec_IntEntry( p->vCosts, i ) == -1 )
-        {
-            Beg = End;
-            continue;
-        }
-        assert( Vec_IntEntry( p->vCosts, i ) > 0 );
-        assert( End - Beg <= p->nLutSize );
-        for ( k = Beg; k < End; k++ )
-            Vec_IntPush( p->vLitsProven, pStart[k] );
-        Vec_IntPush( p->vClausesProven, Vec_IntSize(p->vLitsProven) );
-        Beg = End;
-        Counter++;
-
-        if ( i < p->nOneHots )
-            p->nOneHotsProven++;
-    }
-    if ( p->fVerbose )
-    printf( "Added to storage %d proved clauses (including %d one-hot clauses)\n", Counter, p->nOneHotsProven );
-
-    Vec_IntClear( p->vClauses );
-    Vec_IntClear( p->vLits );
-    Vec_IntClear( p->vCosts );
-    p->nClauses = 0;
-
-    p->fNothingNew = (int)(Counter == 0);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Converts AIG into the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClausPrintIndClauses( Clu_Man_t * p )
-{
-    int Counters[9] = {0};
-    int * pStart; 
-    int Beg, End, i;
-    Beg = 0;
-    pStart = Vec_IntArray( p->vLitsProven );
-    Vec_IntForEachEntry( p->vClausesProven, End, i )
-    {
-        if ( End - Beg >= 8 )
-            Counters[8]++;
-        else
-            Counters[End - Beg]++;
-//printf( "%d ", End-Beg );
-        Beg = End;
-    }
-    printf( "SUMMARY: Total proved clauses = %d. ", Vec_IntSize(p->vClausesProven) );
-    printf( "Clause per lit: " );
-    for ( i = 0; i < 8; i++ )
-        if ( Counters[i] )
-            printf( "%d=%d ", i, Counters[i] );
-    if ( Counters[8] )
-            printf( ">7=%d ", Counters[8] );
-    printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes the clauses into an AIGER file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Fra_ClausGetLiteral( Clu_Man_t * p, int * pVar2Id, int Lit )
-{
-    Aig_Obj_t * pLiteral;
-    int NodeId = pVar2Id[ lit_var(Lit) ];
-    assert( NodeId >= 0 );
-    pLiteral = (Aig_Obj_t *)Aig_ManObj( p->pAig, NodeId )->pData;
-    return Aig_NotCond( pLiteral, lit_sign(Lit) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes the clauses into an AIGER file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClausWriteIndClauses( Clu_Man_t * p )
-{ 
-    extern void Ioa_WriteAiger( Aig_Man_t * pMan, char * pFileName, int fWriteSymbols, int fCompact );
-    Aig_Man_t * pNew;
-    Aig_Obj_t * pClause, * pLiteral;
-    char * pName;
-    int * pStart, * pVar2Id; 
-    int Beg, End, i, k;
-    // create mapping from SAT vars to node IDs
-    pVar2Id = ABC_ALLOC( int, p->pCnf->nVars );
-    memset( pVar2Id, 0xFF, sizeof(int) * p->pCnf->nVars );
-    for ( i = 0; i < Aig_ManObjNumMax(p->pAig); i++ )
-        if ( p->pCnf->pVarNums[i] >= 0 )
-        {
-            assert( p->pCnf->pVarNums[i] < p->pCnf->nVars );
-            pVar2Id[ p->pCnf->pVarNums[i] ] = i;
-        }
-    // start the manager
-    pNew = Aig_ManDupWithoutPos( p->pAig );
-    // add the clauses
-    Beg = 0;
-    pStart = Vec_IntArray( p->vLitsProven );
-    Vec_IntForEachEntry( p->vClausesProven, End, i )
-    {
-        pClause = Fra_ClausGetLiteral( p, pVar2Id, pStart[Beg] );
-        for ( k = Beg + 1; k < End; k++ )
-        {
-            pLiteral = Fra_ClausGetLiteral( p, pVar2Id, pStart[k] );
-            pClause = Aig_Or( pNew, pClause, pLiteral );
-        }
-        Aig_ObjCreatePo( pNew, pClause );
-        Beg = End;
-    }
-    ABC_FREE( pVar2Id );
-    Aig_ManCleanup( pNew );
-    pName = Ioa_FileNameGenericAppend( p->pAig->pName, "_care.aig" );
-    printf( "Care one-hotness clauses will be written into file \"%s\".\n", pName );
-    Ioa_WriteAiger( pNew, pName, 0, 1 );
-    Aig_ManStop( pNew );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks if the clause holds using the given simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClausEstimateCoverageOne( Fra_Sml_t * pSim, int * pLits, int nLits, int * pVar2Id, unsigned * pResult )
-{
-    unsigned * pSims[16];
-    int iVar, i, w;
-    for ( i = 0; i < nLits; i++ )
-    {
-        iVar = lit_var(pLits[i]);
-        pSims[i] = Fra_ObjSim( pSim, pVar2Id[iVar] );
-    }
-    for ( w = 0; w < pSim->nWordsTotal; w++ )
-    {
-        pResult[w] = ~(unsigned)0;
-        for ( i = 0; i < nLits; i++ )
-            pResult[w] &= (lit_sign(pLits[i])? pSims[i][w] : ~pSims[i][w]);
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Estimates the coverage of state space by clauses.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClausEstimateCoverage( Clu_Man_t * p )
-{
-    int nCombSimWords = (1<<11);
-    Fra_Sml_t * pComb;
-    unsigned * pResultTot, * pResultOne;
-    int nCovered, Beg, End, i, w;
-    int * pStart, * pVar2Id; 
-    int clk = clock();
-    // simulate the circuit with nCombSimWords * 32 = 64K patterns
-//    srand( 0xAABBAABB );
-    Aig_ManRandom(1);
-    pComb = Fra_SmlSimulateComb( p->pAig, nCombSimWords );
-    // create mapping from SAT vars to node IDs
-    pVar2Id = ABC_ALLOC( int, p->pCnf->nVars );
-    memset( pVar2Id, 0, sizeof(int) * p->pCnf->nVars );
-    for ( i = 0; i < Aig_ManObjNumMax(p->pAig); i++ )
-        if ( p->pCnf->pVarNums[i] >= 0 )
-        {
-            assert( p->pCnf->pVarNums[i] < p->pCnf->nVars );
-            pVar2Id[ p->pCnf->pVarNums[i] ] = i;
-        }
-    // get storage for one assignment and all assignments
-    assert( Aig_ManPoNum(p->pAig) > 2 );
-    pResultOne = Fra_ObjSim( pComb, Aig_ManPo(p->pAig, 0)->Id );
-    pResultTot = Fra_ObjSim( pComb, Aig_ManPo(p->pAig, 1)->Id );
-    // start the OR of don't-cares
-    for ( w = 0; w < nCombSimWords; w++ )
-        pResultTot[w] = 0;
-    // check clauses
-    Beg = 0;
-    pStart = Vec_IntArray( p->vLitsProven );
-    Vec_IntForEachEntry( p->vClausesProven, End, i )
-    {
-        Fra_ClausEstimateCoverageOne( pComb, pStart + Beg, End-Beg, pVar2Id, pResultOne );
-        Beg = End;
-        for ( w = 0; w < nCombSimWords; w++ )
-            pResultTot[w] |= pResultOne[w];
-    }
-    // count the total number of patterns contained in the don't-care
-    nCovered = 0;
-    for ( w = 0; w < nCombSimWords; w++ )
-        nCovered += Aig_WordCountOnes( pResultTot[w] );
-    Fra_SmlStop( pComb );
-    ABC_FREE( pVar2Id );
-    // print the result
-    printf( "Care states ratio = %f. ", 1.0 * (nCombSimWords * 32 - nCovered) / (nCombSimWords * 32) );
-    printf( "(%d out of %d patterns)  ", nCombSimWords * 32 - nCovered, nCombSimWords * 32 );
-    ABC_PRT( "Time", clock() - clk );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Converts AIG into the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_Claus( Aig_Man_t * pAig, int nFrames, int nPref, int nClausesMax, int nLutSize, int nLevels, int nCutsMax, int nBatches, int fStepUp, int fBmc, int fRefs, int fTarget, int fVerbose, int fVeryVerbose )
-{
-    Clu_Man_t * p;
-    int clk, clkTotal = clock(), clkInd;
-    int b, Iter, Counter, nPrefOld;
-    int nClausesBeg = 0;
-
-    // create the manager
-    p = Fra_ClausAlloc( pAig, nFrames, nPref, nClausesMax, nLutSize, nLevels, nCutsMax, nBatches, fStepUp, fTarget, fVerbose, fVeryVerbose );
-if ( p->fVerbose )
-{
-    printf( "PARAMETERS: Frames = %d. Pref = %d. Clauses max = %d. Cut size = %d.\n", nFrames, nPref, nClausesMax, nLutSize );
-    printf( "Level max = %d. Cuts max = %d. Batches = %d. Increment cut size = %s.\n", nLevels, nCutsMax, nBatches, fStepUp? "yes":"no" );
-//ABC_PRT( "Sim-seq", clock() - clk );
-}
-
-    assert( !p->fTarget || Aig_ManPoNum(pAig) - Aig_ManRegNum(pAig) == 1 );
-
-clk = clock();
-    // derive CNF
-//    if ( p->fTarget )
-//        p->pAig->nRegs++;
-    p->pCnf = Cnf_DeriveSimple( p->pAig, Aig_ManPoNum(p->pAig) );
-//    if ( p->fTarget )
-//        p->pAig->nRegs--;
-if ( fVerbose )
-{
-//ABC_PRT( "CNF    ", clock() - clk );
-}
-
-    // check BMC
-clk = clock();
-    p->pSatBmc = (sat_solver *)Cnf_DataWriteIntoSolver( p->pCnf, p->nPref + p->nFrames, 1 );
-    if ( p->pSatBmc == NULL )
-    {
-        printf( "Error: BMC solver is unsat.\n" );
-        Fra_ClausFree( p );
-        return 1;
-    } 
-    if ( p->fTarget && !Fra_ClausRunBmc( p ) )
-    {
-        printf( "Problem fails the base case after %d frame expansion.\n", p->nPref + p->nFrames );
-        Fra_ClausFree( p );
-        return 1;
-    }
-if ( fVerbose )
-{
-//ABC_PRT( "SAT-bmc", clock() - clk );
-}
-
-    // start the SAT solver
-clk = clock();
-    p->pSatMain = (sat_solver *)Cnf_DataWriteIntoSolver( p->pCnf, p->nFrames+1, 0 );
-    if ( p->pSatMain == NULL )
-    {
-        printf( "Error: Main solver is unsat.\n" );
-        Fra_ClausFree( p );
-        return 1;
-    } 
-
-
-    for ( b = 0; b < p->nBatches; b++ )
-    {
-//        if ( fVerbose )
-        printf( "*** BATCH %d:  ", b+1 );
-        if ( b && p->nLutSize < 12 && (!p->fFiltering || p->fNothingNew || p->fStepUp) )
-            p->nLutSize++;
-        printf( "Using %d-cuts.\n", p->nLutSize );
-
-        // try solving without additional clauses
-        if ( p->fTarget && Fra_ClausRunSat( p ) )
-        {
-            printf( "Problem is inductive without strengthening.\n" );
-            Fra_ClausFree( p );
-            return 1;
-        }
-        if ( fVerbose )
-        {
-//        ABC_PRT( "SAT-ind", clock() - clk );
-        }
- 
-        // collect the candidate inductive clauses using 4-cuts
-        clk = clock();
-        nPrefOld = p->nPref; p->nPref = 0; p->nSimWordsPref = 0;
-    //    Fra_ClausProcessClauses( p, fRefs );
-        Fra_ClausProcessClauses2( p, fRefs );
-        p->nPref = nPrefOld;
-        p->nSimWordsPref = p->nPref*p->nSimWords/p->nSimFrames;
-        nClausesBeg = p->nClauses;
-
-    //ABC_PRT( "Clauses", clock() - clk );
-
-
-        // check clauses using BMC
-        if ( fBmc ) 
-        {
-            clk = clock();
-            Counter = Fra_ClausBmcClauses( p );
-            p->nClauses -= Counter;
-            if ( fVerbose )
-            {
-                printf( "BMC disproved %d clauses.  ", Counter );
-                ABC_PRT( "Time", clock() - clk );
-            }
-        }
-
-
-        // prove clauses inductively
-        clkInd = clk = clock();
-        Counter = 1;
-        for ( Iter = 0; Counter > 0; Iter++ )
-        {
-            if ( fVerbose )
-            printf( "Iter %3d : Begin = %5d. ", Iter, p->nClauses );
-            Counter = Fra_ClausInductiveClauses( p );
-            if ( Counter > 0 )
-               p->nClauses -= Counter;
-            if ( fVerbose )
-            {
-            printf( "End = %5d. Exs = %5d.  ", p->nClauses, p->nCexes );
-    //        printf( "\n" );
-            ABC_PRT( "Time", clock() - clk );
-            }
-            clk = clock();
-        }
-        // add proved clauses to storage
-        Fra_ClausAddToStorage( p );
-        // report the results
-        if ( p->fTarget )
-        {
-            if ( Counter == -1 )
-                printf( "Fra_Claus(): Internal error.  " );
-            else if ( p->fFail )
-                printf( "Property FAILS during refinement.  " );
-            else
-                printf( "Property HOLDS inductively after strengthening.  " );
-            ABC_PRT( "Time  ", clock() - clkTotal );
-            if ( !p->fFail )
-                break;
-        }
-        else
-        {
-            printf( "Finished proving inductive clauses. " );
-            ABC_PRT( "Time  ", clock() - clkTotal );
-        }
-    }
-
-    // verify the computed interpolant
-    Fra_InvariantVerify( pAig, nFrames, p->vClausesProven, p->vLitsProven );
-//    printf( "THIS COMMAND IS KNOWN TO HAVE A BUG!\n" );
-
-//    if ( !p->fTarget && p->fVerbose )
-    if ( p->fVerbose )
-    {
-        Fra_ClausPrintIndClauses( p );
-        Fra_ClausEstimateCoverage( p );
-    }
-
-    if ( !p->fTarget )
-    {
-        Fra_ClausWriteIndClauses( p );
-    }
-/*
-    // print the statistic into a file
-    {
-        FILE * pTable;
-        assert( p->nBatches == 1 );
-        pTable = fopen( "stats.txt", "a+" );
-        fprintf( pTable, "%s ",  pAig->pName );
-        fprintf( pTable, "%d ",  Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig) );
-        fprintf( pTable, "%d ",  Aig_ManPoNum(pAig)-Aig_ManRegNum(pAig) );
-        fprintf( pTable, "%d ",  Aig_ManRegNum(pAig) );
-        fprintf( pTable, "%d ",  Aig_ManNodeNum(pAig) );
-        fprintf( pTable, "%d ",  p->nCuts );
-        fprintf( pTable, "%d ",  nClausesBeg );
-        fprintf( pTable, "%d ",  p->nClauses );
-        fprintf( pTable, "%d ",  Iter );
-        fprintf( pTable, "%.2f ", (float)(clkInd-clkTotal)/(float)(CLOCKS_PER_SEC) );
-        fprintf( pTable, "%.2f ", (float)(clock()-clkInd)/(float)(CLOCKS_PER_SEC) );
-        fprintf( pTable, "%.2f ", (float)(clock()-clkTotal)/(float)(CLOCKS_PER_SEC) );
-        fprintf( pTable, "\n" );
-        fclose( pTable );
-    }
-*/
-    // clean the manager
-    Fra_ClausFree( p );
-    return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraCnf.c b/src/aig/fra/fraCnf.c
deleted file mode 100644
index 5021e750..00000000
--- a/src/aig/fra/fraCnf.c
+++ /dev/null
@@ -1,289 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraCnf.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraCnf.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-
-/**Function*************************************************************
-
-  Synopsis    [Addes clauses to the solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_AddClausesMux( Fra_Man_t * p, Aig_Obj_t * pNode )
-{
-    Aig_Obj_t * pNodeI, * pNodeT, * pNodeE;
-    int pLits[4], RetValue, VarF, VarI, VarT, VarE, fCompT, fCompE;
-
-    assert( !Aig_IsComplement( pNode ) );
-    assert( Aig_ObjIsMuxType( pNode ) );
-    // get nodes (I = if, T = then, E = else)
-    pNodeI = Aig_ObjRecognizeMux( pNode, &pNodeT, &pNodeE );
-    // get the variable numbers
-    VarF = Fra_ObjSatNum(pNode);
-    VarI = Fra_ObjSatNum(pNodeI);
-    VarT = Fra_ObjSatNum(Aig_Regular(pNodeT));
-    VarE = Fra_ObjSatNum(Aig_Regular(pNodeE));
-    // get the complementation flags
-    fCompT = Aig_IsComplement(pNodeT);
-    fCompE = Aig_IsComplement(pNodeE);
-
-    // f = ITE(i, t, e)
-
-    // i' + t' + f
-    // i' + t  + f'
-    // i  + e' + f
-    // i  + e  + f'
-
-    // create four clauses
-    pLits[0] = toLitCond(VarI, 1);
-    pLits[1] = toLitCond(VarT, 1^fCompT);
-    pLits[2] = toLitCond(VarF, 0);
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarI, 1);
-    pLits[1] = toLitCond(VarT, 0^fCompT);
-    pLits[2] = toLitCond(VarF, 1);
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarI, 0);
-    pLits[1] = toLitCond(VarE, 1^fCompE);
-    pLits[2] = toLitCond(VarF, 0);
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarI, 0);
-    pLits[1] = toLitCond(VarE, 0^fCompE);
-    pLits[2] = toLitCond(VarF, 1);
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-
-    // two additional clauses
-    // t' & e' -> f'
-    // t  & e  -> f 
-
-    // t  + e   + f'
-    // t' + e'  + f 
-
-    if ( VarT == VarE )
-    {
-//        assert( fCompT == !fCompE );
-        return;
-    }
-
-    pLits[0] = toLitCond(VarT, 0^fCompT);
-    pLits[1] = toLitCond(VarE, 0^fCompE);
-    pLits[2] = toLitCond(VarF, 1);
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarT, 1^fCompT);
-    pLits[1] = toLitCond(VarE, 1^fCompE);
-    pLits[2] = toLitCond(VarF, 0);
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Addes clauses to the solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_AddClausesSuper( Fra_Man_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSuper )
-{
-    Aig_Obj_t * pFanin;
-    int * pLits, nLits, RetValue, i;
-    assert( !Aig_IsComplement(pNode) );
-    assert( Aig_ObjIsNode( pNode ) );
-    // create storage for literals
-    nLits = Vec_PtrSize(vSuper) + 1;
-    pLits = ABC_ALLOC( int, nLits );
-    // suppose AND-gate is A & B = C
-    // add !A => !C   or   A + !C
-    Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pFanin, i )
-    {
-        pLits[0] = toLitCond(Fra_ObjSatNum(Aig_Regular(pFanin)), Aig_IsComplement(pFanin));
-        pLits[1] = toLitCond(Fra_ObjSatNum(pNode), 1);
-        RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-        assert( RetValue );
-    }
-    // add A & B => C   or   !A + !B + C
-    Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pFanin, i )
-        pLits[i] = toLitCond(Fra_ObjSatNum(Aig_Regular(pFanin)), !Aig_IsComplement(pFanin));
-    pLits[nLits-1] = toLitCond(Fra_ObjSatNum(pNode), 0);
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + nLits );
-    assert( RetValue );
-    ABC_FREE( pLits );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the supergate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_CollectSuper_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vSuper, int fFirst, int fUseMuxes )
-{
-    // if the new node is complemented or a PI, another gate begins
-    if ( Aig_IsComplement(pObj) || Aig_ObjIsPi(pObj) || (!fFirst && Aig_ObjRefs(pObj) > 1) || 
-         (fUseMuxes && Aig_ObjIsMuxType(pObj)) )
-    {
-        Vec_PtrPushUnique( vSuper, pObj );
-        return;
-    }
-    // go through the branches
-    Fra_CollectSuper_rec( Aig_ObjChild0(pObj), vSuper, 0, fUseMuxes );
-    Fra_CollectSuper_rec( Aig_ObjChild1(pObj), vSuper, 0, fUseMuxes );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the supergate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Fra_CollectSuper( Aig_Obj_t * pObj, int fUseMuxes )
-{
-    Vec_Ptr_t * vSuper;
-    assert( !Aig_IsComplement(pObj) );
-    assert( !Aig_ObjIsPi(pObj) );
-    vSuper = Vec_PtrAlloc( 4 );
-    Fra_CollectSuper_rec( pObj, vSuper, 1, fUseMuxes );
-    return vSuper;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the solver clause database.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ObjAddToFrontier( Fra_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vFrontier )
-{
-    assert( !Aig_IsComplement(pObj) );
-    if ( Fra_ObjSatNum(pObj) )
-        return;
-    assert( Fra_ObjSatNum(pObj) == 0 );
-    assert( Fra_ObjFaninVec(pObj) == NULL );
-    if ( Aig_ObjIsConst1(pObj) )
-        return;
-    Fra_ObjSetSatNum( pObj, p->nSatVars++ );
-    if ( Aig_ObjIsNode(pObj) )
-        Vec_PtrPush( vFrontier, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the solver clause database.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_CnfNodeAddToSolver( Fra_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew )
-{ 
-    Vec_Ptr_t * vFrontier, * vFanins;
-    Aig_Obj_t * pNode, * pFanin;
-    int i, k, fUseMuxes = 1;
-    assert( pOld || pNew );
-    // quit if CNF is ready
-    if ( (!pOld || Fra_ObjFaninVec(pOld)) && (!pNew || Fra_ObjFaninVec(pNew)) )
-        return;
-    // start the frontier
-    vFrontier = Vec_PtrAlloc( 100 );
-    if ( pOld ) Fra_ObjAddToFrontier( p, pOld, vFrontier );
-    if ( pNew ) Fra_ObjAddToFrontier( p, pNew, vFrontier );
-    // explore nodes in the frontier
-    Vec_PtrForEachEntry( Aig_Obj_t *, vFrontier, pNode, i )
-    {
-        // create the supergate
-        assert( Fra_ObjSatNum(pNode) );
-        assert( Fra_ObjFaninVec(pNode) == NULL );
-        if ( fUseMuxes && Aig_ObjIsMuxType(pNode) )
-        {
-            vFanins = Vec_PtrAlloc( 4 );
-            Vec_PtrPushUnique( vFanins, Aig_ObjFanin0( Aig_ObjFanin0(pNode) ) );
-            Vec_PtrPushUnique( vFanins, Aig_ObjFanin0( Aig_ObjFanin1(pNode) ) );
-            Vec_PtrPushUnique( vFanins, Aig_ObjFanin1( Aig_ObjFanin0(pNode) ) );
-            Vec_PtrPushUnique( vFanins, Aig_ObjFanin1( Aig_ObjFanin1(pNode) ) );
-            Vec_PtrForEachEntry( Aig_Obj_t *, vFanins, pFanin, k )
-                Fra_ObjAddToFrontier( p, Aig_Regular(pFanin), vFrontier );
-            Fra_AddClausesMux( p, pNode );
-        }
-        else
-        {
-            vFanins = Fra_CollectSuper( pNode, fUseMuxes );
-            Vec_PtrForEachEntry( Aig_Obj_t *, vFanins, pFanin, k )
-                Fra_ObjAddToFrontier( p, Aig_Regular(pFanin), vFrontier );
-            Fra_AddClausesSuper( p, pNode, vFanins );
-        }
-        assert( Vec_PtrSize(vFanins) > 1 );
-        Fra_ObjSetFaninVec( pNode, vFanins );
-    }
-    Vec_PtrFree( vFrontier );
-}
-
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraCore.c b/src/aig/fra/fraCore.c
deleted file mode 100644
index d3b60ab7..00000000
--- a/src/aig/fra/fraCore.c
+++ /dev/null
@@ -1,490 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraCore.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraCore.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-/* 
-    Speculating reduction in the sequential case leads to an interesting 
-    situation when a counter-ex may not refine any classes. This happens
-    for non-constant equivalence classes. In such cases the representative
-    of the class (proved by simulation to be non-constant) may be reduced 
-    to a constant during the speculative reduction. The fraig-representative 
-    of this representative node is a constant node, even though this is a 
-    non-constant class. Experiments have shown that this situation happens 
-    very often at the beginning of the refinement iteration when there are 
-    many spurious candidate equivalence classes (especially if heavy-duty 
-    simulatation of BMC was node used at the beginning). As a result, the 
-    SAT solver run may return a counter-ex that  distinguishes the given 
-    representative node from the constant-1 node but this counter-ex
-    does not distinguish the nodes in the non-costant class... This is why 
-    there is no check of refinement after a counter-ex in the sequential case.
-*/
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Reports the status of the miter.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_FraigMiterStatus( Aig_Man_t * p )
-{
-    Aig_Obj_t * pObj, * pChild;
-    int i, CountConst0 = 0, CountNonConst0 = 0, CountUndecided = 0;
-    if ( p->pData )
-        return 0;
-    Aig_ManForEachPoSeq( p, pObj, i )
-    {
-        pChild = Aig_ObjChild0(pObj);
-        // check if the output is constant 0
-        if ( pChild == Aig_ManConst0(p) )
-        {
-            CountConst0++;
-            continue;
-        }
-        // check if the output is constant 1
-        if ( pChild == Aig_ManConst1(p) )
-        {
-            CountNonConst0++;
-            continue;
-        }
-        // check if the output is a primary input
-        if ( Aig_ObjIsPi(Aig_Regular(pChild)) && Aig_ObjPioNum(Aig_Regular(pChild)) < p->nTruePis )
-        {
-            CountNonConst0++;
-            continue;
-        }
-        // check if the output can be not constant 0
-        if ( Aig_Regular(pChild)->fPhase != (unsigned)Aig_IsComplement(pChild) )
-        {
-            CountNonConst0++;
-            continue;
-        }
-        CountUndecided++;
-    }
-/*
-    if ( p->pParams->fVerbose )
-    {
-        printf( "Miter has %d outputs. ", Aig_ManPoNum(p->pManAig) );
-        printf( "Const0 = %d.  ", CountConst0 );
-        printf( "NonConst0 = %d.  ", CountNonConst0 );
-        printf( "Undecided = %d.  ", CountUndecided );
-        printf( "\n" );
-    }
-*/
-    if ( CountNonConst0 )
-        return 0;
-    if ( CountUndecided )
-        return -1;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reports the status of the miter.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_FraigMiterAssertedOutput( Aig_Man_t * p )
-{
-    Aig_Obj_t * pObj, * pChild;
-    int i;
-    Aig_ManForEachPoSeq( p, pObj, i )
-    {
-        pChild = Aig_ObjChild0(pObj);
-        // check if the output is constant 0
-        if ( pChild == Aig_ManConst0(p) )
-            continue;
-        // check if the output is constant 1
-        if ( pChild == Aig_ManConst1(p) )
-            return i;
-        // check if the output can be not constant 0
-        if ( Aig_Regular(pChild)->fPhase != (unsigned)Aig_IsComplement(pChild) )
-            return i;
-    }
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Write speculative miter for one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fra_FraigNodeSpeculate( Fra_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pObjFraig, Aig_Obj_t * pObjReprFraig )
-{ 
-    static int Counter = 0;
-    char FileName[20];
-    Aig_Man_t * pTemp;
-    Aig_Obj_t * pNode;
-    int i;
-    // create manager with the logic for these two nodes
-    pTemp = Aig_ManExtractMiter( p->pManFraig, pObjFraig, pObjReprFraig );
-    // dump the logic into a file
-    sprintf( FileName, "aig\\%03d.blif", ++Counter );
-    Aig_ManDumpBlif( pTemp, FileName, NULL, NULL );
-    printf( "Speculation cone with %d nodes was written into file \"%s\".\n", Aig_ManNodeNum(pTemp), FileName );
-    // clean up
-    Aig_ManStop( pTemp );
-    Aig_ManForEachObj( p->pManFraig, pNode, i )
-        pNode->pData = p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Verifies the generated counter-ex.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_FraigVerifyCounterEx( Fra_Man_t * p, Vec_Int_t * vCex )
-{
-    Aig_Obj_t * pObj, ** ppClass;
-    int i, c;
-    assert( Aig_ManPiNum(p->pManAig) == Vec_IntSize(vCex) );
-    // make sure the input pattern is not used
-    Aig_ManForEachObj( p->pManAig, pObj, i )
-        assert( !pObj->fMarkB );
-    // simulate the cex through the AIG
-    Aig_ManConst1(p->pManAig)->fMarkB = 1;
-    Aig_ManForEachPi( p->pManAig, pObj, i )
-        pObj->fMarkB = Vec_IntEntry(vCex, i);
-    Aig_ManForEachNode( p->pManAig, pObj, i )
-        pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) & 
-                       (Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj));
-    Aig_ManForEachPo( p->pManAig, pObj, i )
-        pObj->fMarkB = Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj);
-    // check if the classes hold
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->pCla->vClasses1, pObj, i )
-    {
-        if ( pObj->fPhase != pObj->fMarkB )
-            printf( "The node %d is not constant under cex!\n", pObj->Id );
-    }
-    Vec_PtrForEachEntry( Aig_Obj_t **, p->pCla->vClasses, ppClass, i )
-    {
-        for ( c = 1; ppClass[c]; c++ )
-            if ( (ppClass[0]->fPhase ^ ppClass[c]->fPhase) != (ppClass[0]->fMarkB ^ ppClass[c]->fMarkB) )
-                printf( "The nodes %d and %d are not equal under cex!\n", ppClass[0]->Id, ppClass[c]->Id );
-//        for ( c = 0; ppClass[c]; c++ )
-//            if ( Fra_ObjFraig(ppClass[c],p->pPars->nFramesK) == Aig_ManConst1(p->pManFraig) )
-//                printf( "A member of non-constant class has a constant repr!\n" );
-    }
-    // clean the simulation pattern
-    Aig_ManForEachObj( p->pManAig, pObj, i )
-        pObj->fMarkB = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fra_FraigNode( Fra_Man_t * p, Aig_Obj_t * pObj )
-{ 
-    Aig_Obj_t * pObjRepr, * pObjFraig, * pObjFraig2, * pObjReprFraig;
-    int RetValue;
-    assert( !Aig_IsComplement(pObj) );
-    // get representative of this class
-    pObjRepr = Fra_ClassObjRepr( pObj );
-    if ( pObjRepr == NULL || // this is a unique node
-       (!p->pPars->fDoSparse && pObjRepr == Aig_ManConst1(p->pManAig)) ) // this is a sparse node
-        return;
-    // get the fraiged node
-    pObjFraig = Fra_ObjFraig( pObj, p->pPars->nFramesK );
-    // get the fraiged representative
-    pObjReprFraig = Fra_ObjFraig( pObjRepr, p->pPars->nFramesK );
-    // if the fraiged nodes are the same, return
-    if ( Aig_Regular(pObjFraig) == Aig_Regular(pObjReprFraig) )
-    {
-        p->nSatCallsSkipped++;
-        return;
-    }
-    assert( p->pPars->nFramesK || Aig_Regular(pObjFraig) != Aig_ManConst1(p->pManFraig) );
-    // if they are proved different, the c-ex will be in p->pPatWords
-    RetValue = Fra_NodesAreEquiv( p, Aig_Regular(pObjReprFraig), Aig_Regular(pObjFraig) );
-    if ( RetValue == 1 )  // proved equivalent
-    {
-//        if ( p->pPars->fChoicing )
-//            Aig_ObjCreateRepr( p->pManFraig, Aig_Regular(pObjReprFraig), Aig_Regular(pObjFraig) );
-        // the nodes proved equal
-        pObjFraig2 = Aig_NotCond( pObjReprFraig, pObj->fPhase ^ pObjRepr->fPhase );
-        Fra_ObjSetFraig( pObj, p->pPars->nFramesK, pObjFraig2 );
-        return;
-    }
-    if ( RetValue == -1 ) // failed
-    {
-        if ( p->vTimeouts == NULL )
-            p->vTimeouts = Vec_PtrAlloc( 100 );
-        Vec_PtrPush( p->vTimeouts, pObj );
-        if ( !p->pPars->fSpeculate )
-            return;
-        assert( 0 );
-        // speculate
-        p->nSpeculs++;
-        pObjFraig2 = Aig_NotCond( pObjReprFraig, pObj->fPhase ^ pObjRepr->fPhase );
-        Fra_ObjSetFraig( pObj, p->pPars->nFramesK, pObjFraig2 );
-        Fra_FraigNodeSpeculate( p, pObj, Aig_Regular(pObjFraig), Aig_Regular(pObjReprFraig) );
-        return;
-    }
-    // disprove the nodes
-    p->pCla->fRefinement = 1;
-    // if we do not include the node into those disproved, we may end up 
-    // merging this node with another representative, for which proof has timed out
-    if ( p->vTimeouts )
-        Vec_PtrPush( p->vTimeouts, pObj );
-    // verify that the counter-example satisfies all the constraints
-//    if ( p->vCex )
-//        Fra_FraigVerifyCounterEx( p, p->vCex );
-    // simulate the counter-example and return the Fraig node
-    Fra_SmlResimulate( p );
-    if ( p->pManFraig->pData )
-        return;
-    if ( !p->pPars->nFramesK && Fra_ClassObjRepr(pObj) == pObjRepr )
-        printf( "Fra_FraigNode(): Error in class refinement!\n" );
-    assert( p->pPars->nFramesK || Fra_ClassObjRepr(pObj) != pObjRepr );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for the internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_FraigSweep( Fra_Man_t * p )
-{
-//    Bar_Progress_t * pProgress = NULL;
-    Aig_Obj_t * pObj, * pObjNew;
-    int i, Pos = 0;
-    int nBTracksOld;
-    // fraig latch outputs
-    Aig_ManForEachLoSeq( p->pManAig, pObj, i )
-    {
-        Fra_FraigNode( p, pObj );
-        if ( p->pPars->fUseImps )
-            Pos = Fra_ImpCheckForNode( p, p->pCla->vImps, pObj, Pos );
-    }
-    if ( p->pPars->fLatchCorr )
-        return;
-    // fraig internal nodes
-//    if ( !p->pPars->fDontShowBar )
-//        pProgress = Bar_ProgressStart( stdout, Aig_ManObjNumMax(p->pManAig) );
-    nBTracksOld = p->pPars->nBTLimitNode;
-    Aig_ManForEachNode( p->pManAig, pObj, i )
-    {
-//        if ( pProgress )
-//            Bar_ProgressUpdate( pProgress, i, NULL );
-        // derive and remember the new fraig node
-        pObjNew = Aig_And( p->pManFraig, Fra_ObjChild0Fra(pObj,p->pPars->nFramesK), Fra_ObjChild1Fra(pObj,p->pPars->nFramesK) );
-        Fra_ObjSetFraig( pObj, p->pPars->nFramesK, pObjNew );
-        Aig_Regular(pObjNew)->pData = p;
-        // quit if simulation detected a counter-example for a PO
-        if ( p->pManFraig->pData )
-            continue;
-//        if ( Aig_SupportSize(p->pManAig,pObj) > 16 )
-//            continue;
-        // perform fraiging
-        if ( p->pPars->nLevelMax && (int)pObj->Level > p->pPars->nLevelMax )
-            p->pPars->nBTLimitNode = 5;
-        Fra_FraigNode( p, pObj );
-        if ( p->pPars->nLevelMax && (int)pObj->Level > p->pPars->nLevelMax )
-            p->pPars->nBTLimitNode = nBTracksOld;
-        // check implications
-        if ( p->pPars->fUseImps )
-            Pos = Fra_ImpCheckForNode( p, p->pCla->vImps, pObj, Pos );
-    }
-//    if ( pProgress )
-//        Bar_ProgressStop( pProgress );
-    // try to prove the outputs of the miter
-    p->nNodesMiter = Aig_ManNodeNum(p->pManFraig);
-//    Fra_MiterStatus( p->pManFraig );
-//    if ( p->pPars->fProve && p->pManFraig->pData == NULL )
-//        Fra_MiterProve( p );
-    // compress implications after processing all of them
-    if ( p->pPars->fUseImps )
-        Fra_ImpCompactArray( p->pCla->vImps );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging of the AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Fra_FraigPerform( Aig_Man_t * pManAig, Fra_Par_t * pPars )
-{
-    Fra_Man_t * p;
-    Aig_Man_t * pManAigNew;
-    int clk;
-    if ( Aig_ManNodeNum(pManAig) == 0 )
-        return Aig_ManDupOrdered(pManAig);
-clk = clock();
-    p = Fra_ManStart( pManAig, pPars );
-    p->pManFraig = Fra_ManPrepareComb( p );
-    p->pSml = Fra_SmlStart( pManAig, 0, 1, pPars->nSimWords );
-    Fra_SmlSimulate( p, 0 );
-//    if ( p->pPars->fChoicing )
-//        Aig_ManReprStart( p->pManFraig, Aig_ManObjNumMax(p->pManAig) );
-    // collect initial states
-    p->nLitsBeg  = Fra_ClassesCountLits( p->pCla );
-    p->nNodesBeg = Aig_ManNodeNum(pManAig);
-    p->nRegsBeg  = Aig_ManRegNum(pManAig);
-    // perform fraig sweep
-if ( p->pPars->fVerbose )
-Fra_ClassesPrint( p->pCla, 1 );
-    Fra_FraigSweep( p );
-    // call back the procedure to check implications
-    if ( pManAig->pImpFunc )
-        pManAig->pImpFunc( p, pManAig->pImpData );
-    // no need to filter one-hot clauses because they satisfy base case by construction
-    // finalize the fraiged manager
-    Fra_ManFinalizeComb( p );
-    if ( p->pPars->fChoicing )
-    { 
-int clk2 = clock();
-        Fra_ClassesCopyReprs( p->pCla, p->vTimeouts );
-        pManAigNew = Aig_ManDupRepr( p->pManAig, 1 );
-        Aig_ManReprStart( pManAigNew, Aig_ManObjNumMax(pManAigNew) );
-        Aig_ManTransferRepr( pManAigNew, p->pManAig );
-        Aig_ManMarkValidChoices( pManAigNew );
-        Aig_ManStop( p->pManFraig );
-        p->pManFraig = NULL;
-p->timeTrav += clock() - clk2;
-    }
-    else
-    {
-        Fra_ClassesCopyReprs( p->pCla, p->vTimeouts );
-        Aig_ManCleanup( p->pManFraig );
-        pManAigNew = p->pManFraig;
-        p->pManFraig = NULL;
-    }
-p->timeTotal = clock() - clk;
-    // collect final stats
-    p->nLitsEnd  = Fra_ClassesCountLits( p->pCla );
-    p->nNodesEnd = Aig_ManNodeNum(pManAigNew);
-    p->nRegsEnd  = Aig_ManRegNum(pManAigNew);
-    Fra_ManStop( p );
-    return pManAigNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs choicing of the AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Fra_FraigChoice( Aig_Man_t * pManAig, int nConfMax, int nLevelMax )
-{
-    Fra_Par_t Pars, * pPars = &Pars; 
-    Fra_ParamsDefault( pPars );
-    pPars->nBTLimitNode = nConfMax;
-    pPars->fChoicing    = 1;
-    pPars->fDoSparse    = 1;
-    pPars->fSpeculate   = 0;
-    pPars->fProve       = 0;
-    pPars->fVerbose     = 0;
-    pPars->fDontShowBar = 1;
-    pPars->nLevelMax    = nLevelMax;
-    return Fra_FraigPerform( pManAig, pPars );
-}
- 
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Fra_FraigEquivence( Aig_Man_t * pManAig, int nConfMax, int fProve )
-{
-    Aig_Man_t * pFraig;
-    Fra_Par_t Pars, * pPars = &Pars; 
-    Fra_ParamsDefault( pPars );
-    pPars->nBTLimitNode = nConfMax;
-    pPars->fChoicing    = 0;
-    pPars->fDoSparse    = 1;
-    pPars->fSpeculate   = 0;
-    pPars->fProve       = fProve;
-    pPars->fVerbose     = 0;
-    pPars->fDontShowBar = 1;
-    pFraig = Fra_FraigPerform( pManAig, pPars );
-    return pFraig;
-} 
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraHot.c b/src/aig/fra/fraHot.c
deleted file mode 100644
index 29c9c33d..00000000
--- a/src/aig/fra/fraHot.c
+++ /dev/null
@@ -1,476 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraHot.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    [Computing and using one-hotness conditions.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraHot.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static inline int  Fra_RegToLit( int n, int c )   { return c? -n-1 : n+1;       }
-static inline int  Fra_LitReg( int n )            { return (n>0)? n-1 : -n-1;   }
-static inline int  Fra_LitSign( int n )           { return (n<0);               }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation info is composed of all zeros.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_OneHotNodeIsConst( Fra_Sml_t * pSeq, Aig_Obj_t * pObj )
-{
-    unsigned * pSims;
-    int i;
-    pSims = Fra_ObjSim(pSeq, pObj->Id);
-    for ( i = pSeq->nWordsPref; i < pSeq->nWordsTotal; i++ )
-        if ( pSims[i] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation infos are equal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_OneHotNodesAreEqual( Fra_Sml_t * pSeq, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
-{
-    unsigned * pSims0, * pSims1;
-    int i;
-    pSims0 = Fra_ObjSim(pSeq, pObj0->Id);
-    pSims1 = Fra_ObjSim(pSeq, pObj1->Id);
-    for ( i = pSeq->nWordsPref; i < pSeq->nWordsTotal; i++ )
-        if ( pSims0[i] != pSims1[i] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if implications holds.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_OneHotNodesAreClause( Fra_Sml_t * pSeq, Aig_Obj_t * pObj1, Aig_Obj_t * pObj2, int fCompl1, int fCompl2 )
-{
-    unsigned * pSim1, * pSim2;
-    int k;
-    pSim1 = Fra_ObjSim(pSeq, pObj1->Id);
-    pSim2 = Fra_ObjSim(pSeq, pObj2->Id);
-    if ( fCompl1 && fCompl2 )
-    {
-        for ( k = pSeq->nWordsPref; k < pSeq->nWordsTotal; k++ )
-            if ( pSim1[k] & pSim2[k] )
-                return 0;
-    }
-    else if ( fCompl1 )
-    {
-        for ( k = pSeq->nWordsPref; k < pSeq->nWordsTotal; k++ )
-            if ( pSim1[k] & ~pSim2[k] )
-                return 0;
-    }
-    else if ( fCompl2 )
-    {
-        for ( k = pSeq->nWordsPref; k < pSeq->nWordsTotal; k++ )
-            if ( ~pSim1[k] & pSim2[k] )
-                return 0;
-    }
-    else
-        assert( 0 );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes one-hot implications.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Fra_OneHotCompute( Fra_Man_t * p, Fra_Sml_t * pSim )
-{
-    int fSkipConstEqu = 1;
-    Vec_Int_t * vOneHots;
-    Aig_Obj_t * pObj1, * pObj2;
-    int i, k;
-    int nTruePis = Aig_ManPiNum(pSim->pAig) - Aig_ManRegNum(pSim->pAig);
-    assert( pSim->pAig == p->pManAig );
-    vOneHots = Vec_IntAlloc( 100 );
-    Aig_ManForEachLoSeq( pSim->pAig, pObj1, i )
-    {
-        if ( fSkipConstEqu && Fra_OneHotNodeIsConst(pSim, pObj1) )
-            continue;
-        assert( i-nTruePis >= 0 );
-//        Aig_ManForEachLoSeq( pSim->pAig, pObj2, k )
-//        Vec_PtrForEachEntryStart( Aig_Obj_t *, pSim->pAig->vPis, pObj2, k, Aig_ManPiNum(p)-Aig_ManRegNum(p) )
-        Vec_PtrForEachEntryStart( Aig_Obj_t *, pSim->pAig->vPis, pObj2, k, i+1 )
-        {
-            if ( fSkipConstEqu && Fra_OneHotNodeIsConst(pSim, pObj2) )
-                continue;
-            if ( fSkipConstEqu && Fra_OneHotNodesAreEqual( pSim, pObj1, pObj2 ) )
-                continue;
-            assert( k-nTruePis >= 0 );
-            if ( Fra_OneHotNodesAreClause( pSim, pObj1, pObj2, 1, 1 ) )
-            {
-                Vec_IntPush( vOneHots, Fra_RegToLit(i-nTruePis, 1) );
-                Vec_IntPush( vOneHots, Fra_RegToLit(k-nTruePis, 1) );
-                continue;
-            }
-            if ( Fra_OneHotNodesAreClause( pSim, pObj1, pObj2, 0, 1 ) )
-            {
-                Vec_IntPush( vOneHots, Fra_RegToLit(i-nTruePis, 0) );
-                Vec_IntPush( vOneHots, Fra_RegToLit(k-nTruePis, 1) );
-                continue;
-            }
-            if ( Fra_OneHotNodesAreClause( pSim, pObj1, pObj2, 1, 0 ) )
-            {
-                Vec_IntPush( vOneHots, Fra_RegToLit(i-nTruePis, 1) );
-                Vec_IntPush( vOneHots, Fra_RegToLit(k-nTruePis, 0) );
-                continue;
-            }
-        }
-    }
-    return vOneHots;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Assumes one-hot implications in the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-**********************************************************************/
-void Fra_OneHotAssume( Fra_Man_t * p, Vec_Int_t * vOneHots )
-{
-    Aig_Obj_t * pObj1, * pObj2;
-    int i, Out1, Out2, pLits[2];
-    int nPiNum = Aig_ManPiNum(p->pManFraig) - Aig_ManRegNum(p->pManFraig);
-    assert( p->pPars->nFramesK == 1 ); // add to only one frame
-    for ( i = 0; i < Vec_IntSize(vOneHots); i += 2 )
-    {
-        Out1 = Vec_IntEntry( vOneHots, i );
-        Out2 = Vec_IntEntry( vOneHots, i+1 );
-        if ( Out1 == 0 && Out2 == 0 )
-            continue;
-        pObj1 = Aig_ManPi( p->pManFraig, nPiNum + Fra_LitReg(Out1) );
-        pObj2 = Aig_ManPi( p->pManFraig, nPiNum + Fra_LitReg(Out2) );
-        pLits[0] = toLitCond( Fra_ObjSatNum(pObj1), Fra_LitSign(Out1) );
-        pLits[1] = toLitCond( Fra_ObjSatNum(pObj2), Fra_LitSign(Out2) );
-        // add constraint to solver
-        if ( !sat_solver_addclause( p->pSat, pLits, pLits + 2 ) )
-        {
-            printf( "Fra_OneHotAssume(): Adding clause makes SAT solver unsat.\n" );
-            sat_solver_delete( p->pSat );
-            p->pSat = NULL;
-            return;
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks one-hot implications.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-**********************************************************************/
-void Fra_OneHotCheck( Fra_Man_t * p, Vec_Int_t * vOneHots )
-{
-    Aig_Obj_t * pObj1, * pObj2;
-    int RetValue, i, Out1, Out2;
-    int nTruePos = Aig_ManPoNum(p->pManFraig) - Aig_ManRegNum(p->pManFraig);
-    for ( i = 0; i < Vec_IntSize(vOneHots); i += 2 )
-    {
-        Out1 = Vec_IntEntry( vOneHots, i );
-        Out2 = Vec_IntEntry( vOneHots, i+1 );
-        if ( Out1 == 0 && Out2 == 0 )
-            continue;
-        pObj1 = Aig_ManPo( p->pManFraig, nTruePos + Fra_LitReg(Out1) );
-        pObj2 = Aig_ManPo( p->pManFraig, nTruePos + Fra_LitReg(Out2) );
-        RetValue = Fra_NodesAreClause( p, pObj1, pObj2, Fra_LitSign(Out1), Fra_LitSign(Out2) );
-        if ( RetValue != 1 )
-        {
-            p->pCla->fRefinement = 1;
-            if ( RetValue == 0 )
-                Fra_SmlResimulate( p );
-            if ( Vec_IntEntry(vOneHots, i) != 0 )
-                printf( "Fra_OneHotCheck(): Clause is not refined!\n" );
-            assert( Vec_IntEntry(vOneHots, i) == 0 );
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes those implications that no longer hold.]
-
-  Description [Returns 1 if refinement has happened.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_OneHotRefineUsingCex( Fra_Man_t * p, Vec_Int_t * vOneHots )
-{
-    Aig_Obj_t * pObj1, * pObj2;
-    int i, Out1, Out2, RetValue = 0;
-    int nPiNum = Aig_ManPiNum(p->pManAig) - Aig_ManRegNum(p->pManAig);
-    assert( p->pSml->pAig == p->pManAig );
-    for ( i = 0; i < Vec_IntSize(vOneHots); i += 2 )
-    {
-        Out1 = Vec_IntEntry( vOneHots, i );
-        Out2 = Vec_IntEntry( vOneHots, i+1 );
-        if ( Out1 == 0 && Out2 == 0 )
-            continue;
-        // get the corresponding nodes
-        pObj1 = Aig_ManPi( p->pManAig, nPiNum + Fra_LitReg(Out1) );
-        pObj2 = Aig_ManPi( p->pManAig, nPiNum + Fra_LitReg(Out2) );
-        // check if implication holds using this simulation info
-        if ( !Fra_OneHotNodesAreClause( p->pSml, pObj1, pObj2, Fra_LitSign(Out1), Fra_LitSign(Out2) ) )
-        {
-            Vec_IntWriteEntry( vOneHots, i, 0 );
-            Vec_IntWriteEntry( vOneHots, i+1, 0 );
-            RetValue = 1;
-        }
-    }
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes those implications that no longer hold.]
-
-  Description [Returns 1 if refinement has happened.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_OneHotCount( Fra_Man_t * p, Vec_Int_t * vOneHots )
-{
-    int i, Out1, Out2, Counter = 0;
-    for ( i = 0; i < Vec_IntSize(vOneHots); i += 2 )
-    {
-        Out1 = Vec_IntEntry( vOneHots, i );
-        Out2 = Vec_IntEntry( vOneHots, i+1 );
-        if ( Out1 == 0 && Out2 == 0 )
-            continue;
-        Counter++;
-    }
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Estimates the coverage of state space by clauses.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_OneHotEstimateCoverage( Fra_Man_t * p, Vec_Int_t * vOneHots )
-{
-    int nSimWords = (1<<14);
-    int nRegs = Aig_ManRegNum(p->pManAig);
-    Vec_Ptr_t * vSimInfo;
-    unsigned * pSim1, * pSim2, * pSimTot;
-    int i, w, Out1, Out2, nCovered, Counter = 0;
-    int clk = clock();
-
-    // generate random sim-info at register outputs
-    vSimInfo = Vec_PtrAllocSimInfo( nRegs + 1, nSimWords );
-//    srand( 0xAABBAABB );
-    Aig_ManRandom(1);
-    for ( i = 0; i < nRegs; i++ )
-    {
-        pSim1 = (unsigned *)Vec_PtrEntry( vSimInfo, i );
-        for ( w = 0; w < nSimWords; w++ )
-            pSim1[w] = Fra_ObjRandomSim();
-    }
-    pSimTot = (unsigned *)Vec_PtrEntry( vSimInfo, nRegs );
-
-    // collect simulation info
-    memset( pSimTot, 0, sizeof(unsigned) * nSimWords );
-    for ( i = 0; i < Vec_IntSize(vOneHots); i += 2 )
-    {
-        Out1 = Vec_IntEntry( vOneHots, i );
-        Out2 = Vec_IntEntry( vOneHots, i+1 );
-        if ( Out1 == 0 && Out2 == 0 )
-            continue;
-//printf( "(%c%d,%c%d) ", 
-//Fra_LitSign(Out1)? '-': '+', Fra_LitReg(Out1), 
-//Fra_LitSign(Out2)? '-': '+', Fra_LitReg(Out2) ); 
-        Counter++;
-        pSim1 = (unsigned *)Vec_PtrEntry( vSimInfo, Fra_LitReg(Out1) );
-        pSim2 = (unsigned *)Vec_PtrEntry( vSimInfo, Fra_LitReg(Out2) );
-        if ( Fra_LitSign(Out1) && Fra_LitSign(Out2) )
-            for ( w = 0; w < nSimWords; w++ )
-                pSimTot[w] |=  pSim1[w] &  pSim2[w];
-        else if ( Fra_LitSign(Out1) )
-            for ( w = 0; w < nSimWords; w++ )
-                pSimTot[w] |=  pSim1[w] & ~pSim2[w];
-        else if ( Fra_LitSign(Out2) )
-            for ( w = 0; w < nSimWords; w++ )
-                pSimTot[w] |= ~pSim1[w] &  pSim2[w];
-        else
-            assert( 0 );
-    }
-//printf( "\n" );
-    // count the total number of patterns contained in the don't-care
-    nCovered = 0;
-    for ( w = 0; w < nSimWords; w++ )
-        nCovered += Aig_WordCountOnes( pSimTot[w] );
-    Vec_PtrFree( vSimInfo );
-    // print the result
-    printf( "Care states ratio = %f. ", 1.0 * (nSimWords * 32 - nCovered) / (nSimWords * 32) );
-    printf( "(%d out of %d patterns)  ", nSimWords * 32 - nCovered, nSimWords * 32 );
-    ABC_PRT( "Time", clock() - clk );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates one-hotness EXDC.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Fra_OneHotCreateExdc( Fra_Man_t * p, Vec_Int_t * vOneHots )
-{
-    Aig_Man_t * pNew;
-    Aig_Obj_t * pObj1, * pObj2, * pObj;
-    int i, Out1, Out2, nTruePis;
-    pNew = Aig_ManStart( Vec_IntSize(vOneHots)/2 );
-//    for ( i = 0; i < Aig_ManRegNum(p->pManAig); i++ )
-//        Aig_ObjCreatePi(pNew);
-    Aig_ManForEachPi( p->pManAig, pObj, i )
-        Aig_ObjCreatePi(pNew);
-    nTruePis = Aig_ManPiNum(p->pManAig) - Aig_ManRegNum(p->pManAig);
-    for ( i = 0; i < Vec_IntSize(vOneHots); i += 2 )
-    {
-        Out1 = Vec_IntEntry( vOneHots, i );
-        Out2 = Vec_IntEntry( vOneHots, i+1 );
-        if ( Out1 == 0 && Out2 == 0 )
-            continue;
-        pObj1 = Aig_ManPi( pNew, nTruePis + Fra_LitReg(Out1) );
-        pObj2 = Aig_ManPi( pNew, nTruePis + Fra_LitReg(Out2) );
-        pObj1 = Aig_NotCond( pObj1, Fra_LitSign(Out1) );
-        pObj2 = Aig_NotCond( pObj2, Fra_LitSign(Out2) );
-        pObj  = Aig_Or( pNew, pObj1, pObj2 );
-        Aig_ObjCreatePo( pNew, pObj );
-    }
-    Aig_ManCleanup(pNew);
-//    printf( "Created AIG with %d nodes and %d outputs.\n", Aig_ManNodeNum(pNew), Aig_ManPoNum(pNew) );
-    return pNew;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Assumes one-hot implications in the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-**********************************************************************/
-void Fra_OneHotAddKnownConstraint( Fra_Man_t * p, Vec_Ptr_t * vOnehots )
-{
-    Vec_Int_t * vGroup;
-    Aig_Obj_t * pObj1, * pObj2;
-    int k, i, j, Out1, Out2, pLits[2];
-    //
-    // these constrants should be added to different timeframes!
-    // (also note that PIs follow first - then registers)
-    //
-    Vec_PtrForEachEntry( Vec_Int_t *, vOnehots, vGroup, k )
-    {
-        Vec_IntForEachEntry( vGroup, Out1, i )
-        Vec_IntForEachEntryStart( vGroup, Out2, j, i+1 )
-        {
-            pObj1 = Aig_ManPi( p->pManFraig, Out1 );
-            pObj2 = Aig_ManPi( p->pManFraig, Out2 );
-            pLits[0] = toLitCond( Fra_ObjSatNum(pObj1), 1 );
-            pLits[1] = toLitCond( Fra_ObjSatNum(pObj2), 1 );
-            // add constraint to solver
-            if ( !sat_solver_addclause( p->pSat, pLits, pLits + 2 ) )
-            {
-                printf( "Fra_OneHotAddKnownConstraint(): Adding clause makes SAT solver unsat.\n" );
-                sat_solver_delete( p->pSat );
-                p->pSat = NULL;
-                return;
-            }
-        }
-    }
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraImp.c b/src/aig/fra/fraImp.c
deleted file mode 100644
index 34fa87e5..00000000
--- a/src/aig/fra/fraImp.c
+++ /dev/null
@@ -1,731 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraImp.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    [Detecting and proving implications.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraImp.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of 1s in each siminfo of each node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Fra_SmlCountOnesOne( Fra_Sml_t * p, int Node )
-{
-    unsigned * pSim;
-    int k, Counter = 0;
-    pSim = Fra_ObjSim( p, Node );
-    for ( k = p->nWordsPref; k < p->nWordsTotal; k++ )
-        Counter += Aig_WordCountOnes( pSim[k] );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of 1s in each siminfo of each node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int * Fra_SmlCountOnes( Fra_Sml_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i, * pnBits; 
-    pnBits = ABC_ALLOC( int, Aig_ManObjNumMax(p->pAig) );  
-    memset( pnBits, 0, sizeof(int) * Aig_ManObjNumMax(p->pAig) );
-    Aig_ManForEachObj( p->pAig, pObj, i )
-        pnBits[i] = Fra_SmlCountOnesOne( p, i );
-    return pnBits;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if implications holds.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Sml_NodeCheckImp( Fra_Sml_t * p, int Left, int Right )
-{
-    unsigned * pSimL, * pSimR;
-    int k;
-    pSimL = Fra_ObjSim( p, Left );
-    pSimR = Fra_ObjSim( p, Right );
-    for ( k = p->nWordsPref; k < p->nWordsTotal; k++ )
-        if ( pSimL[k] & ~pSimR[k] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of 1s in the complement of the implication.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Sml_NodeNotImpWeight( Fra_Sml_t * p, int Left, int Right )
-{
-    unsigned * pSimL, * pSimR;
-    int k, Counter = 0;
-    pSimL = Fra_ObjSim( p, Left );
-    pSimR = Fra_ObjSim( p, Right );
-    for ( k = p->nWordsPref; k < p->nWordsTotal; k++ )
-        Counter += Aig_WordCountOnes( pSimL[k] & ~pSimR[k] );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the complement of the implication.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Sml_NodeSaveNotImpPatterns( Fra_Sml_t * p, int Left, int Right, unsigned * pResult )
-{
-    unsigned * pSimL, * pSimR;
-    int k;
-    pSimL = Fra_ObjSim( p, Left );
-    pSimR = Fra_ObjSim( p, Right );
-    for ( k = p->nWordsPref; k < p->nWordsTotal; k++ )
-        pResult[k] |= pSimL[k] & ~pSimR[k];
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the array of nodes sorted by the number of 1s.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Fra_SmlSortUsingOnes( Fra_Sml_t * p, int fLatchCorr )
-{
-    Aig_Obj_t * pObj;
-    Vec_Ptr_t * vNodes;
-    int i, nNodes, nTotal, nBits, * pnNodes, * pnBits, * pMemory;
-    assert( p->nWordsTotal > 0 );
-    // count 1s in each node's siminfo
-    pnBits = Fra_SmlCountOnes( p );
-    // count number of nodes having that many 1s
-    nNodes = 0;
-    nBits = p->nWordsTotal * 32;
-    pnNodes = ABC_ALLOC( int, nBits + 1 );
-    memset( pnNodes, 0, sizeof(int) * (nBits + 1) );
-    Aig_ManForEachObj( p->pAig, pObj, i )
-    {
-        if ( i == 0 ) continue;
-        // skip non-PI and non-internal nodes
-        if ( fLatchCorr )
-        {
-            if ( !Aig_ObjIsPi(pObj) )
-                continue;
-        }
-        else
-        {
-            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
-                continue;
-        }
-        // skip nodes participating in the classes
-//        if ( Fra_ClassObjRepr(pObj) )
-//            continue;
-        assert( pnBits[i] <= nBits ); // "<" because of normalized info
-        pnNodes[pnBits[i]]++;
-        nNodes++;
-    }
-    // allocate memory for all the nodes
-    pMemory = ABC_ALLOC( int, nNodes + nBits + 1 );  
-    // markup the memory for each node
-    vNodes = Vec_PtrAlloc( nBits + 1 );
-    Vec_PtrPush( vNodes, pMemory );
-    for ( i = 1; i <= nBits; i++ )
-    {
-        pMemory += pnNodes[i-1] + 1;
-        Vec_PtrPush( vNodes, pMemory );
-    }
-    // add the nodes
-    memset( pnNodes, 0, sizeof(int) * (nBits + 1) );
-    Aig_ManForEachObj( p->pAig, pObj, i )
-    {
-        if ( i == 0 ) continue;
-        // skip non-PI and non-internal nodes
-        if ( fLatchCorr )
-        {
-            if ( !Aig_ObjIsPi(pObj) )
-                continue;
-        }
-        else
-        {
-            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
-                continue;
-        }
-        // skip nodes participating in the classes
-//        if ( Fra_ClassObjRepr(pObj) )
-//            continue;
-        pMemory = (int *)Vec_PtrEntry( vNodes, pnBits[i] );
-        pMemory[ pnNodes[pnBits[i]]++ ] = i;
-    }
-    // add 0s in the end
-    nTotal = 0;
-    Vec_PtrForEachEntry( int *, vNodes, pMemory, i )
-    {
-        pMemory[ pnNodes[i]++ ] = 0;
-        nTotal += pnNodes[i];
-    }
-    assert( nTotal == nNodes + nBits + 1 );
-    ABC_FREE( pnNodes );
-    ABC_FREE( pnBits );
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the array of implications with the highest cost.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Fra_SmlSelectMaxCost( Vec_Int_t * vImps, int * pCosts, int nCostMax, int nImpLimit, int * pCostRange )
-{
-    Vec_Int_t * vImpsNew;
-    int * pCostCount, nImpCount, Imp, i, c;
-    assert( Vec_IntSize(vImps) >= nImpLimit );
-    // count how many implications have each cost
-    pCostCount = ABC_ALLOC( int, nCostMax + 1 );
-    memset( pCostCount, 0, sizeof(int) * (nCostMax + 1) );
-    for ( i = 0; i < Vec_IntSize(vImps); i++ )
-    {
-        assert( pCosts[i] <= nCostMax );
-        pCostCount[ pCosts[i] ]++;
-    }
-    assert( pCostCount[0] == 0 );
-    // select the bound on the cost (above this bound, implication will be included)
-    nImpCount = 0;
-    for ( c = nCostMax; c > 0; c-- )
-    {
-        nImpCount += pCostCount[c];
-        if ( nImpCount >= nImpLimit )
-            break;
-    }
-//    printf( "Cost range >= %d.\n", c );
-    // collect implications with the given costs
-    vImpsNew = Vec_IntAlloc( nImpLimit );
-    Vec_IntForEachEntry( vImps, Imp, i )
-    {
-        if ( pCosts[i] < c )
-            continue;
-        Vec_IntPush( vImpsNew, Imp );
-        if ( Vec_IntSize( vImpsNew ) == nImpLimit )
-            break;
-    }
-    ABC_FREE( pCostCount );
-    if ( pCostRange )
-        *pCostRange = c;
-    return vImpsNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compares two implications using their largest ID.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Sml_CompareMaxId( unsigned short * pImp1, unsigned short * pImp2 )
-{
-    int Max1 = ABC_MAX( pImp1[0], pImp1[1] );
-    int Max2 = ABC_MAX( pImp2[0], pImp2[1] );
-    if ( Max1 < Max2 )
-        return -1;
-    if ( Max1 > Max2  )
-        return 1;
-    return 0; 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives implication candidates.]
-
-  Description [Implication candidates have the property that 
-  (1) they hold using sequential simulation information
-  (2) they do not hold using combinational simulation information
-  (3) they have as high expressive power as possible (heuristically)
-      that is, they are easy to disprove combinationally
-      meaning they cover relatively larger sequential subspace.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Fra_ImpDerive( Fra_Man_t * p, int nImpMaxLimit, int nImpUseLimit, int fLatchCorr )
-{
-    int nSimWords = 64;
-    Fra_Sml_t * pSeq, * pComb;
-    Vec_Int_t * vImps, * vTemp;
-    Vec_Ptr_t * vNodes;
-    int * pImpCosts, * pNodesI, * pNodesK;
-    int nImpsTotal = 0, nImpsTried = 0, nImpsNonSeq = 0, nImpsComb = 0, nImpsCollected = 0;
-    int CostMin = ABC_INFINITY, CostMax = 0;
-    int i, k, Imp, CostRange, clk = clock();
-    assert( Aig_ManObjNumMax(p->pManAig) < (1 << 15) );
-    assert( nImpMaxLimit > 0 && nImpUseLimit > 0 && nImpUseLimit <= nImpMaxLimit );
-    // normalize both managers
-    pComb = Fra_SmlSimulateComb( p->pManAig, nSimWords );
-    pSeq = Fra_SmlSimulateSeq( p->pManAig, p->pPars->nFramesP, nSimWords, 1, 1  );
-    // get the nodes sorted by the number of 1s
-    vNodes = Fra_SmlSortUsingOnes( pSeq, fLatchCorr );
-    // count the total number of implications
-    for ( k = nSimWords * 32; k > 0; k-- )
-    for ( i = k - 1; i > 0; i-- )
-    for ( pNodesI = (int *)Vec_PtrEntry( vNodes, i ); *pNodesI; pNodesI++ )
-    for ( pNodesK = (int *)Vec_PtrEntry( vNodes, k ); *pNodesK; pNodesK++ )
-        nImpsTotal++;
-
-    // compute implications and their costs
-    pImpCosts = ABC_ALLOC( int, nImpMaxLimit );
-    vImps = Vec_IntAlloc( nImpMaxLimit );
-    for ( k = pSeq->nWordsTotal * 32; k > 0; k-- )
-        for ( i = k - 1; i > 0; i-- )
-        {
-            // HERE WE ARE MISSING SOME POTENTIAL IMPLICATIONS (with complement!)
-
-            for ( pNodesI = (int *)Vec_PtrEntry( vNodes, i ); *pNodesI; pNodesI++ )
-            for ( pNodesK = (int *)Vec_PtrEntry( vNodes, k ); *pNodesK; pNodesK++ )
-            {
-                nImpsTried++;
-                if ( !Sml_NodeCheckImp(pSeq, *pNodesI, *pNodesK) )
-                {
-                    nImpsNonSeq++;
-                    continue;
-                }
-                if ( Sml_NodeCheckImp(pComb, *pNodesI, *pNodesK) )
-                {
-                    nImpsComb++;
-                    continue;
-                }
-                nImpsCollected++;
-                Imp = Fra_ImpCreate( *pNodesI, *pNodesK );
-                pImpCosts[ Vec_IntSize(vImps) ] = Sml_NodeNotImpWeight(pComb, *pNodesI, *pNodesK);
-                CostMin = ABC_MIN( CostMin, pImpCosts[ Vec_IntSize(vImps) ] );
-                CostMax = ABC_MAX( CostMax, pImpCosts[ Vec_IntSize(vImps) ] );
-                Vec_IntPush( vImps, Imp );
-                if ( Vec_IntSize(vImps) == nImpMaxLimit )
-                    goto finish;
-            } 
-        }
-finish:
-    Fra_SmlStop( pComb );
-    Fra_SmlStop( pSeq );
-
-    // select implications with the highest cost
-    CostRange = CostMin;
-    if ( Vec_IntSize(vImps) > nImpUseLimit )
-    {
-        vImps = Fra_SmlSelectMaxCost( vTemp = vImps, pImpCosts, nSimWords * 32, nImpUseLimit, &CostRange );
-        Vec_IntFree( vTemp );  
-    }
-
-    // dealloc
-    ABC_FREE( pImpCosts ); 
-    {
-    void * pTemp = Vec_PtrEntry(vNodes, 0);
-    ABC_FREE( pTemp );
-    }
-    Vec_PtrFree( vNodes );
-    // reorder implications topologically
-    qsort( (void *)Vec_IntArray(vImps), Vec_IntSize(vImps), sizeof(int), 
-            (int (*)(const void *, const void *)) Sml_CompareMaxId );
-if ( p->pPars->fVerbose )
-{
-printf( "Implications: All = %d. Try = %d. NonSeq = %d. Comb = %d. Res = %d.\n", 
-    nImpsTotal, nImpsTried, nImpsNonSeq, nImpsComb, nImpsCollected );
-printf( "Implication weight: Min = %d. Pivot = %d. Max = %d.   ", 
-       CostMin, CostRange, CostMax );
-ABC_PRT( "Time", clock() - clk );
-}
-    return vImps;
-}
-
-
-// the following three procedures are called to 
-// - add implications to the SAT solver
-// - check implications using the SAT solver
-// - refine implications using after a cex is generated
-
-/**Function*************************************************************
-
-  Synopsis    [Add implication clauses to the SAT solver.]
-
-  Description [Note that implications should be checked in the first frame!]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ImpAddToSolver( Fra_Man_t * p, Vec_Int_t * vImps, int * pSatVarNums )
-{
-    sat_solver * pSat = p->pSat;
-    Aig_Obj_t * pLeft, * pRight;
-    Aig_Obj_t * pLeftF, * pRightF;
-    int pLits[2], Imp, Left, Right, i, f, status;
-    int fComplL, fComplR;
-    Vec_IntForEachEntry( vImps, Imp, i )
-    {
-        // get the corresponding nodes
-        pLeft = Aig_ManObj( p->pManAig, Fra_ImpLeft(Imp) );
-        pRight = Aig_ManObj( p->pManAig, Fra_ImpRight(Imp) );
-        // check if all the nodes are present
-        for ( f = 0; f < p->pPars->nFramesK; f++ )
-        {
-            // map these info fraig
-            pLeftF = Fra_ObjFraig( pLeft, f );
-            pRightF = Fra_ObjFraig( pRight, f );
-            if ( Aig_ObjIsNone(Aig_Regular(pLeftF)) || Aig_ObjIsNone(Aig_Regular(pRightF)) )
-            {
-                Vec_IntWriteEntry( vImps, i, 0 );
-                break;
-            }
-        } 
-        if ( f < p->pPars->nFramesK )
-            continue;
-        // add constraints in each timeframe
-        for ( f = 0; f < p->pPars->nFramesK; f++ )
-        {
-            // map these info fraig
-            pLeftF = Fra_ObjFraig( pLeft, f );
-            pRightF = Fra_ObjFraig( pRight, f );
-            // get the corresponding SAT numbers
-            Left = pSatVarNums[ Aig_Regular(pLeftF)->Id ];
-            Right = pSatVarNums[ Aig_Regular(pRightF)->Id ];
-            assert( Left > 0  && Left < p->nSatVars );
-            assert( Right > 0 && Right < p->nSatVars );
-            // get the complemented attributes
-            fComplL = pLeft->fPhase ^ Aig_IsComplement(pLeftF);
-            fComplR = pRight->fPhase ^ Aig_IsComplement(pRightF);
-            // get the constraint
-            // L => R      L' v R     (complement = L & R')
-            pLits[0] = 2 * Left  + !fComplL;
-            pLits[1] = 2 * Right +  fComplR;
-            // add constraint to solver
-            if ( !sat_solver_addclause( pSat, pLits, pLits + 2 ) )
-            {
-                sat_solver_delete( pSat );
-                p->pSat = NULL;
-                return;
-            }
-        }
-    }
-    status = sat_solver_simplify(pSat);
-    if ( status == 0 )
-    {
-        sat_solver_delete( pSat );
-        p->pSat = NULL;
-    }
-//    printf( "Total imps = %d. ", Vec_IntSize(vImps) );
-    Fra_ImpCompactArray( vImps );
-//    printf( "Valid imps = %d. \n", Vec_IntSize(vImps) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Check implications for the node (if they are present).]
-
-  Description [Returns the new position in the array.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ImpCheckForNode( Fra_Man_t * p, Vec_Int_t * vImps, Aig_Obj_t * pNode, int Pos )
-{
-    Aig_Obj_t * pLeft, * pRight;
-    Aig_Obj_t * pLeftF, * pRightF;
-    int i, Imp, Left, Right, Max, RetValue;
-    int fComplL, fComplR;
-    Vec_IntForEachEntryStart( vImps, Imp, i, Pos )
-    {
-        if ( Imp == 0 )
-            continue;
-        Left = Fra_ImpLeft(Imp);
-        Right = Fra_ImpRight(Imp);
-        Max = ABC_MAX( Left, Right );
-        assert( Max >= pNode->Id );
-        if ( Max > pNode->Id )
-            return i;
-        // get the corresponding nodes
-        pLeft  = Aig_ManObj( p->pManAig, Left );
-        pRight = Aig_ManObj( p->pManAig, Right );
-        // get the corresponding FRAIG nodes
-        pLeftF  = Fra_ObjFraig( pLeft, p->pPars->nFramesK );
-        pRightF = Fra_ObjFraig( pRight, p->pPars->nFramesK );
-        // get the complemented attributes
-        fComplL = pLeft->fPhase ^ Aig_IsComplement(pLeftF);
-        fComplR = pRight->fPhase ^ Aig_IsComplement(pRightF);
-        // check equality
-        if ( Aig_Regular(pLeftF) == Aig_Regular(pRightF) )
-        {
-            if ( fComplL == fComplR ) // x => x  - always true
-                continue;
-            assert( fComplL != fComplR );
-            // consider 4 possibilities:
-            // NOT(1) => 1    or   0 => 1  - always true
-            // 1 => NOT(1)    or   1 => 0  - never true
-            // NOT(x) => x    or   x       - not always true
-            // x => NOT(x)    or   NOT(x)  - not always true
-            if ( Aig_ObjIsConst1(Aig_Regular(pLeftF)) && fComplL ) // proved implication
-                continue;
-            // disproved implication
-            p->pCla->fRefinement = 1;
-            Vec_IntWriteEntry( vImps, i, 0 );
-            continue;
-        }
-        // check the implication 
-        // - if true, a clause is added
-        // - if false, a cex is simulated
-        // make sure the implication is refined
-        RetValue = Fra_NodesAreImp( p, Aig_Regular(pLeftF), Aig_Regular(pRightF), fComplL, fComplR );
-        if ( RetValue != 1 )
-        {
-            p->pCla->fRefinement = 1;
-            if ( RetValue == 0 )
-                Fra_SmlResimulate( p );
-            if ( Vec_IntEntry(vImps, i) != 0 )
-                printf( "Fra_ImpCheckForNode(): Implication is not refined!\n" );
-            assert( Vec_IntEntry(vImps, i) == 0 );
-        }
-    }
-    return i;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes those implications that no longer hold.]
-
-  Description [Returns 1 if refinement has happened.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ImpRefineUsingCex( Fra_Man_t * p, Vec_Int_t * vImps )
-{
-    Aig_Obj_t * pLeft, * pRight;
-    int Imp, i, RetValue = 0;
-    Vec_IntForEachEntry( vImps, Imp, i )
-    {
-        if ( Imp == 0 )
-            continue;
-        // get the corresponding nodes
-        pLeft = Aig_ManObj( p->pManAig, Fra_ImpLeft(Imp) );
-        pRight = Aig_ManObj( p->pManAig, Fra_ImpRight(Imp) );
-        // check if implication holds using this simulation info
-        if ( !Sml_NodeCheckImp(p->pSml, pLeft->Id, pRight->Id) )
-        {
-            Vec_IntWriteEntry( vImps, i, 0 );
-            RetValue = 1;
-        }
-    }
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes empty implications.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ImpCompactArray( Vec_Int_t * vImps )
-{
-    int i, k, Imp;
-    k = 0;
-    Vec_IntForEachEntry( vImps, Imp, i )
-        if ( Imp )
-            Vec_IntWriteEntry( vImps, k++, Imp );
-    Vec_IntShrink( vImps, k );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Determines the ratio of the state space by computed implications.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-double Fra_ImpComputeStateSpaceRatio( Fra_Man_t * p )
-{
-    int nSimWords = 64;
-    Fra_Sml_t * pComb;
-    unsigned * pResult;
-    double Ratio = 0.0;
-    int Left, Right, Imp, i;
-    if ( p->pCla->vImps == NULL || Vec_IntSize(p->pCla->vImps) == 0 )
-        return Ratio;
-    // simulate the AIG manager with combinational patterns
-    pComb = Fra_SmlSimulateComb( p->pManAig, nSimWords );
-    // go through the implications and collect where they do not hold
-    pResult = Fra_ObjSim( pComb, 0 );
-    assert( pResult[0] == 0 );
-    Vec_IntForEachEntry( p->pCla->vImps, Imp, i )
-    {
-        Left = Fra_ImpLeft(Imp);
-        Right = Fra_ImpRight(Imp);
-        Sml_NodeSaveNotImpPatterns( pComb, Left, Right, pResult );
-    }
-    // count the number of ones in this area
-    Ratio = 100.0 * Fra_SmlCountOnesOne( pComb, 0 ) / (32*(pComb->nWordsTotal-pComb->nWordsPref));
-    Fra_SmlStop( pComb );
-    return Ratio;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of failed implications.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_ImpVerifyUsingSimulation( Fra_Man_t * p )
-{
-    int nFrames = 2000;
-    int nSimWords = 8;
-    Fra_Sml_t * pSeq;
-    char * pfFails;
-    int Left, Right, Imp, i, Counter;
-    if ( p->pCla->vImps == NULL || Vec_IntSize(p->pCla->vImps) == 0 )
-        return 0;
-    // simulate the AIG manager with combinational patterns
-    pSeq = Fra_SmlSimulateSeq( p->pManAig, p->pPars->nFramesP, nFrames, nSimWords, 1  );
-    // go through the implications and check how many of them do not hold
-    pfFails = ABC_ALLOC( char, Vec_IntSize(p->pCla->vImps) );
-    memset( pfFails, 0, sizeof(char) * Vec_IntSize(p->pCla->vImps) );
-    Vec_IntForEachEntry( p->pCla->vImps, Imp, i )
-    {
-        Left = Fra_ImpLeft(Imp);
-        Right = Fra_ImpRight(Imp);
-        pfFails[i] = !Sml_NodeCheckImp( pSeq, Left, Right );
-    }
-    // count how many has failed
-    Counter = 0;
-    for ( i = 0; i < Vec_IntSize(p->pCla->vImps); i++ )
-        Counter += pfFails[i];
-    ABC_FREE( pfFails );
-    Fra_SmlStop( pSeq );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Record proven implications in the AIG manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ImpRecordInManager( Fra_Man_t * p, Aig_Man_t * pNew )
-{
-    Aig_Obj_t * pLeft, * pRight, * pMiter;
-    int nPosOld, Imp, i;
-    if ( p->pCla->vImps == NULL || Vec_IntSize(p->pCla->vImps) == 0 )
-        return;
-    // go through the implication
-    nPosOld = Aig_ManPoNum(pNew);
-    Vec_IntForEachEntry( p->pCla->vImps, Imp, i )
-    {
-        pLeft = Aig_ManObj( p->pManAig, Fra_ImpLeft(Imp) );
-        pRight = Aig_ManObj( p->pManAig, Fra_ImpRight(Imp) );
-        // record the implication: L' + R
-        pMiter = Aig_Or( pNew, 
-            Aig_NotCond((Aig_Obj_t *)pLeft->pData, !pLeft->fPhase), 
-            Aig_NotCond((Aig_Obj_t *)pRight->pData, pRight->fPhase) ); 
-        Aig_ObjCreatePo( pNew, pMiter );
-    }
-    pNew->nAsserts = Aig_ManPoNum(pNew) - nPosOld;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraInd.c b/src/aig/fra/fraInd.c
deleted file mode 100644
index 2f2d8f2d..00000000
--- a/src/aig/fra/fraInd.c
+++ /dev/null
@@ -1,709 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraInd.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    [Inductive prover.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraInd.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-#include "cnf.h"
-#include "dar.h"
-#include "saig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Performs AIG rewriting on the constraint manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_FraigInductionRewrite( Fra_Man_t * p )
-{
-    Aig_Man_t * pTemp;
-    Aig_Obj_t * pObj, * pObjPo;
-    int nTruePis, k, i, clk = clock();
-    // perform AIG rewriting on the speculated frames
-//    pTemp = Dar_ManRwsat( pTemp, 1, 0 );
-    pTemp = Dar_ManRewriteDefault( p->pManFraig );
-//    printf( "Before = %6d.  After = %6d.\n", Aig_ManNodeNum(p->pManFraig), Aig_ManNodeNum(pTemp) ); 
-//Aig_ManDumpBlif( p->pManFraig, "1.blif", NULL, NULL );
-//Aig_ManDumpBlif( pTemp, "2.blif", NULL, NULL );
-//    Fra_FramesWriteCone( pTemp );
-//    Aig_ManStop( pTemp );
-    // transfer PI/register pointers
-    assert( p->pManFraig->nRegs == pTemp->nRegs );
-    assert( p->pManFraig->nAsserts == pTemp->nAsserts );
-    nTruePis = Aig_ManPiNum(p->pManAig) - Aig_ManRegNum(p->pManAig);
-    memset( p->pMemFraig, 0, sizeof(Aig_Obj_t *) * p->nSizeAlloc * p->nFramesAll );
-    Fra_ObjSetFraig( Aig_ManConst1(p->pManAig), p->pPars->nFramesK, Aig_ManConst1(pTemp) );
-    Aig_ManForEachPiSeq( p->pManAig, pObj, i )
-        Fra_ObjSetFraig( pObj, p->pPars->nFramesK, Aig_ManPi(pTemp,nTruePis*p->pPars->nFramesK+i) );
-    k = 0;
-    assert( Aig_ManRegNum(p->pManAig) == Aig_ManPoNum(pTemp) - pTemp->nAsserts );
-    Aig_ManForEachLoSeq( p->pManAig, pObj, i )
-    {
-        pObjPo = Aig_ManPo(pTemp, pTemp->nAsserts + k++);
-        Fra_ObjSetFraig( pObj, p->pPars->nFramesK, Aig_ObjChild0(pObjPo) );
-    }
-    // exchange
-    Aig_ManStop( p->pManFraig );
-    p->pManFraig = pTemp;
-p->timeRwr += clock() - clk;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs speculative reduction for one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fra_FramesConstrainNode( Aig_Man_t * pManFraig, Aig_Obj_t * pObj, int iFrame )
-{
-    Aig_Obj_t * pObjNew, * pObjNew2, * pObjRepr, * pObjReprNew, * pMiter;
-    // skip nodes without representative
-    if ( (pObjRepr = Fra_ClassObjRepr(pObj)) == NULL )
-        return;
-    assert( pObjRepr->Id < pObj->Id );
-    // get the new node 
-    pObjNew = Fra_ObjFraig( pObj, iFrame );
-    // get the new node of the representative
-    pObjReprNew = Fra_ObjFraig( pObjRepr, iFrame );
-    // if this is the same node, no need to add constraints
-    if ( Aig_Regular(pObjNew) == Aig_Regular(pObjReprNew) )
-        return;
-    // these are different nodes - perform speculative reduction
-    pObjNew2 = Aig_NotCond( pObjReprNew, pObj->fPhase ^ pObjRepr->fPhase );
-    // set the new node
-    Fra_ObjSetFraig( pObj, iFrame, pObjNew2 );
-    // add the constraint
-    pMiter = Aig_Exor( pManFraig, pObjNew, pObjReprNew );
-    pMiter = Aig_NotCond( pMiter, !Aig_ObjPhaseReal(pMiter) );
-    assert( Aig_ObjPhaseReal(pMiter) == 1 );
-    Aig_ObjCreatePo( pManFraig, pMiter );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares the inductive case with speculative reduction.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Fra_FramesWithClasses( Fra_Man_t * p )
-{
-    Aig_Man_t * pManFraig;
-    Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pObjNew;
-    int i, k, f;
-    assert( p->pManFraig == NULL );
-    assert( Aig_ManRegNum(p->pManAig) > 0 );
-    assert( Aig_ManRegNum(p->pManAig) < Aig_ManPiNum(p->pManAig) );
-
-    // start the fraig package
-    pManFraig = Aig_ManStart( Aig_ManObjNumMax(p->pManAig) * p->nFramesAll );
-    pManFraig->pName = Aig_UtilStrsav( p->pManAig->pName );
-    pManFraig->pSpec = Aig_UtilStrsav( p->pManAig->pSpec );
-    pManFraig->nRegs = p->pManAig->nRegs;
-    // create PI nodes for the frames
-    for ( f = 0; f < p->nFramesAll; f++ )
-        Fra_ObjSetFraig( Aig_ManConst1(p->pManAig), f, Aig_ManConst1(pManFraig) );
-    for ( f = 0; f < p->nFramesAll; f++ )
-        Aig_ManForEachPiSeq( p->pManAig, pObj, i )
-            Fra_ObjSetFraig( pObj, f, Aig_ObjCreatePi(pManFraig) );
-    // create latches for the first frame
-    Aig_ManForEachLoSeq( p->pManAig, pObj, i )
-        Fra_ObjSetFraig( pObj, 0, Aig_ObjCreatePi(pManFraig) );
-
-    // add timeframes
-//    pManFraig->fAddStrash = 1;
-    for ( f = 0; f < p->nFramesAll - 1; f++ )
-    {
-        // set the constraints on the latch outputs
-        Aig_ManForEachLoSeq( p->pManAig, pObj, i )
-            Fra_FramesConstrainNode( pManFraig, pObj, f );
-        // add internal nodes of this frame
-        Aig_ManForEachNode( p->pManAig, pObj, i )
-        {
-            pObjNew = Aig_And( pManFraig, Fra_ObjChild0Fra(pObj,f), Fra_ObjChild1Fra(pObj,f) );
-            Fra_ObjSetFraig( pObj, f, pObjNew );
-            Fra_FramesConstrainNode( pManFraig, pObj, f );
-        }
-        // transfer latch input to the latch outputs 
-        Aig_ManForEachLiLoSeq( p->pManAig, pObjLi, pObjLo, k )
-            Fra_ObjSetFraig( pObjLo, f+1, Fra_ObjChild0Fra(pObjLi,f) );
-    }
-//    pManFraig->fAddStrash = 0;
-    // mark the asserts
-    pManFraig->nAsserts = Aig_ManPoNum(pManFraig);
-    // add the POs for the latch outputs of the last frame
-    Aig_ManForEachLoSeq( p->pManAig, pObj, i )
-        Aig_ObjCreatePo( pManFraig, Fra_ObjFraig(pObj,p->nFramesAll-1) );
-
-    // remove dangling nodes
-    Aig_ManCleanup( pManFraig );
-    // make sure the satisfying assignment is node assigned
-    assert( pManFraig->pData == NULL );
-    return pManFraig;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares the inductive case with speculative reduction.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_FramesAddMore( Aig_Man_t * p, int nFrames )
-{
-    Aig_Obj_t * pObj, ** pLatches;
-    int i, k, f, nNodesOld;
-    // set copy pointer of each object to point to itself
-    Aig_ManForEachObj( p, pObj, i )
-        pObj->pData = pObj;
-    // iterate and add objects
-    nNodesOld = Aig_ManObjNumMax(p);
-    pLatches = ABC_ALLOC( Aig_Obj_t *, Aig_ManRegNum(p) );
-    for ( f = 0; f < nFrames; f++ )
-    {
-        // clean latch inputs and outputs
-        Aig_ManForEachLiSeq( p, pObj, i )
-            pObj->pData = NULL;
-        Aig_ManForEachLoSeq( p, pObj, i )
-            pObj->pData = NULL;
-        // save the latch input values
-        k = 0;
-        Aig_ManForEachLiSeq( p, pObj, i )
-        {
-            if ( Aig_ObjFanin0(pObj)->pData )
-                pLatches[k++] = Aig_ObjChild0Copy(pObj);
-            else
-                pLatches[k++] = NULL;
-        }
-        // insert them as the latch output values
-        k = 0;
-        Aig_ManForEachLoSeq( p, pObj, i )
-            pObj->pData = pLatches[k++];
-        // create the next time frame of nodes
-        Aig_ManForEachNode( p, pObj, i )
-        {
-            if ( i > nNodesOld )
-                break;
-            if ( Aig_ObjFanin0(pObj)->pData && Aig_ObjFanin1(pObj)->pData )
-                pObj->pData = Aig_And( p, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-            else
-                pObj->pData = NULL;
-        }
-    }
-    ABC_FREE( pLatches );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs partitioned sequential SAT sweepingG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Fra_FraigInductionPart( Aig_Man_t * pAig, Fra_Ssw_t * pPars )
-{
-    int fPrintParts = 0;
-    char Buffer[100];
-    Aig_Man_t * pTemp, * pNew;
-    Vec_Ptr_t * vResult;
-    Vec_Int_t * vPart;
-    int * pMapBack;
-    int i, nCountPis, nCountRegs;
-    int nClasses, nPartSize, fVerbose;
-    int clk = clock();
-
-    // save parameters
-    nPartSize = pPars->nPartSize; pPars->nPartSize = 0;
-    fVerbose  = pPars->fVerbose;  pPars->fVerbose = 0;
-    // generate partitions
-    if ( pAig->vClockDoms )
-    {
-        // divide large clock domains into separate partitions
-        vResult = Vec_PtrAlloc( 100 );
-        Vec_PtrForEachEntry( Vec_Int_t *, (Vec_Ptr_t *)pAig->vClockDoms, vPart, i )
-        {
-            if ( nPartSize && Vec_IntSize(vPart) > nPartSize )
-                Aig_ManPartDivide( vResult, vPart, nPartSize, pPars->nOverSize );
-            else
-                Vec_PtrPush( vResult, Vec_IntDup(vPart) );
-        }
-    }
-    else
-        vResult = Aig_ManRegPartitionSimple( pAig, nPartSize, pPars->nOverSize );
-//    vResult = Aig_ManPartitionSmartRegisters( pAig, nPartSize, 0 ); 
-//    vResult = Aig_ManRegPartitionSmart( pAig, nPartSize );
-    if ( fPrintParts )
-    {
-        // print partitions
-        printf( "Simple partitioning. %d partitions are saved:\n", Vec_PtrSize(vResult) );
-        Vec_PtrForEachEntry( Vec_Int_t *, vResult, vPart, i )
-        {
-            sprintf( Buffer, "part%03d.aig", i );
-            pTemp = Aig_ManRegCreatePart( pAig, vPart, &nCountPis, &nCountRegs, NULL );
-            Ioa_WriteAiger( pTemp, Buffer, 0, 0 );
-            printf( "part%03d.aig : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d.\n", 
-                i, Vec_IntSize(vPart), Aig_ManPiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp) );
-            Aig_ManStop( pTemp );
-        }
-    }
-
-    // perform SSW with partitions
-    Aig_ManReprStart( pAig, Aig_ManObjNumMax(pAig) );
-    Vec_PtrForEachEntry( Vec_Int_t *, vResult, vPart, i )
-    {
-        pTemp = Aig_ManRegCreatePart( pAig, vPart, &nCountPis, &nCountRegs, &pMapBack );
-        // create the projection of 1-hot registers
-        if ( pAig->vOnehots )
-            pTemp->vOnehots = Aig_ManRegProjectOnehots( pAig, pTemp, pAig->vOnehots, fVerbose );
-        // run SSW
-        pNew = Fra_FraigInduction( pTemp, pPars );
-        nClasses = Aig_TransferMappedClasses( pAig, pTemp, pMapBack );
-        if ( fVerbose )
-            printf( "%3d : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d. It = %3d. Cl = %5d.\n", 
-                i, Vec_IntSize(vPart), Aig_ManPiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp), pPars->nIters, nClasses );
-        Aig_ManStop( pNew );
-        Aig_ManStop( pTemp );
-        ABC_FREE( pMapBack );
-    }
-    // remap the AIG
-    pNew = Aig_ManDupRepr( pAig, 0 );
-    Aig_ManSeqCleanup( pNew );
-//    Aig_ManPrintStats( pAig );
-//    Aig_ManPrintStats( pNew );
-    Vec_VecFree( (Vec_Vec_t *)vResult );
-    pPars->nPartSize = nPartSize;
-    pPars->fVerbose = fVerbose;
-    if ( fVerbose )
-    {
-        ABC_PRT( "Total time", clock() - clk );
-    }
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs sequential SAT sweeping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Fra_FraigInduction( Aig_Man_t * pManAig, Fra_Ssw_t * pParams )
-{
-    int fUseSimpleCnf = 0;
-    int fUseOldSimulation = 0;
-    // other paramaters affecting performance
-    // - presence of FRAIGing in Abc_NtkDarSeqSweep()
-    // - using distance-1 patterns in Fra_SmlAssignDist1()
-    // - the number of simulation patterns
-    // - the number of BMC frames
-
-    Fra_Man_t * p;
-    Fra_Par_t Pars, * pPars = &Pars; 
-    Aig_Obj_t * pObj;
-    Cnf_Dat_t * pCnf;
-    Aig_Man_t * pManAigNew = NULL;
-    int nNodesBeg, nRegsBeg;
-    int nIter = -1; // Suppress "might be used uninitialized"
-    int i, clk = clock(), clk2;
-    int TimeToStop = (pParams->TimeLimit == 0.0)? 0 : clock() + (int)(pParams->TimeLimit * CLOCKS_PER_SEC);
-
-    if ( Aig_ManNodeNum(pManAig) == 0 )
-    {
-        pParams->nIters = 0;
-        // Ntl_ManFinalize() needs the following to satisfy an assertion
-        Aig_ManReprStart(pManAig,Aig_ManObjNumMax(pManAig));
-        return Aig_ManDupOrdered(pManAig);
-    }
-    assert( Aig_ManRegNum(pManAig) > 0 );
-    assert( pParams->nFramesK > 0 );
-//Aig_ManShow( pManAig, 0, NULL );
-
-    if ( pParams->fWriteImps && pParams->nPartSize > 0 )
-    {
-        pParams->nPartSize = 0;
-        printf( "Partitioning was disabled to allow implication writing.\n" );
-    }
-    // perform partitioning
-    if ( (pParams->nPartSize > 0 && pParams->nPartSize < Aig_ManRegNum(pManAig))
-         || (pManAig->vClockDoms && Vec_VecSize(pManAig->vClockDoms) > 0)  )
-        return Fra_FraigInductionPart( pManAig, pParams );
- 
-    nNodesBeg = Aig_ManNodeNum(pManAig);
-    nRegsBeg  = Aig_ManRegNum(pManAig);
-
-    // enhance the AIG by adding timeframes
-//    Fra_FramesAddMore( pManAig, 3 );
-
-    // get parameters
-    Fra_ParamsDefaultSeq( pPars );
-    pPars->nFramesP   = pParams->nFramesP;
-    pPars->nFramesK   = pParams->nFramesK;
-    pPars->nMaxImps   = pParams->nMaxImps;
-    pPars->nMaxLevs   = pParams->nMaxLevs;
-    pPars->fVerbose   = pParams->fVerbose;
-    pPars->fRewrite   = pParams->fRewrite;
-    pPars->fLatchCorr = pParams->fLatchCorr;
-    pPars->fUseImps   = pParams->fUseImps;
-    pPars->fWriteImps = pParams->fWriteImps;
-    pPars->fUse1Hot   = pParams->fUse1Hot;
-
-    assert( !(pPars->nFramesP > 0 && pPars->fUse1Hot) );
-    assert( !(pPars->nFramesK > 1 && pPars->fUse1Hot) );
- 
-    // start the fraig manager for this run
-    p = Fra_ManStart( pManAig, pPars );
-    p->pPars->nBTLimitNode = 0;
-    // derive and refine e-classes using K initialized frames
-    if ( fUseOldSimulation )
-    {
-        if ( pPars->nFramesP > 0 )
-        {
-            pPars->nFramesP = 0;
-            printf( "Fra_FraigInduction(): Prefix cannot be used.\n" );
-        }
-        p->pSml = Fra_SmlStart( pManAig, 0, pPars->nFramesK + 1, pPars->nSimWords );
-        Fra_SmlSimulate( p, 1 );
-    }
-    else
-    {
-        // bug:  r iscas/blif/s5378.blif    ; st; ssw -v
-        // bug:  r iscas/blif/s1238.blif    ; st; ssw -v
-        // refine the classes with more simulation rounds
-if ( pPars->fVerbose )
-printf( "Simulating %d AIG nodes for %d cycles ... ", Aig_ManNodeNum(pManAig), pPars->nFramesP + 32 );
-        p->pSml = Fra_SmlSimulateSeq( pManAig, pPars->nFramesP, 32, 1, 1  ); //pPars->nFramesK + 1, 1 );  
-if ( pPars->fVerbose ) 
-{
-ABC_PRT( "Time", clock() - clk );
-}
-        Fra_ClassesPrepare( p->pCla, p->pPars->fLatchCorr, p->pPars->nMaxLevs );
-//        Fra_ClassesPostprocess( p->pCla );
-        // compute one-hotness conditions
-        if ( p->pPars->fUse1Hot )
-            p->vOneHots = Fra_OneHotCompute( p, p->pSml );
-        // allocate new simulation manager for simulating counter-examples
-        Fra_SmlStop( p->pSml );
-        p->pSml = Fra_SmlStart( pManAig, 0, pPars->nFramesK + 1, pPars->nSimWords );
-    }
-
-    // select the most expressive implications
-    if ( pPars->fUseImps )
-        p->pCla->vImps = Fra_ImpDerive( p, 5000000, pPars->nMaxImps, pPars->fLatchCorr );
-
-    if ( pParams->TimeLimit != 0.0 && clock() > TimeToStop )
-    {
-        if ( !pParams->fSilent )
-            printf( "Fra_FraigInduction(): Runtime limit exceeded.\n" );
-        goto finish;
-    }
-
-    // perform BMC (for the min number of frames)
-    Fra_BmcPerform( p, pPars->nFramesP, pPars->nFramesK+1 ); // +1 is needed to prevent non-refinement
-//Fra_ClassesPrint( p->pCla, 1 );
-//    if ( p->vCex == NULL )
-//        p->vCex = Vec_IntAlloc( 1000 );
-
-    p->nLitsBeg  = Fra_ClassesCountLits( p->pCla );
-    p->nNodesBeg = nNodesBeg; // Aig_ManNodeNum(pManAig);
-    p->nRegsBeg  = nRegsBeg; // Aig_ManRegNum(pManAig);
-
-    // dump AIG of the timeframes
-//    pManAigNew = Fra_ClassesDeriveAig( p->pCla, pPars->nFramesK );
-//    Aig_ManDumpBlif( pManAigNew, "frame_aig.blif", NULL, NULL );
-//    Fra_ManPartitionTest2( pManAigNew );
-//    Aig_ManStop( pManAigNew );
- 
-    // iterate the inductive case
-    p->pCla->fRefinement = 1;
-    for ( nIter = 0; p->pCla->fRefinement; nIter++ )
-    {
-        int nLitsOld = Fra_ClassesCountLits(p->pCla);
-        int nImpsOld = p->pCla->vImps? Vec_IntSize(p->pCla->vImps) : 0;
-        int nHotsOld = p->vOneHots? Fra_OneHotCount(p, p->vOneHots) : 0;
-        int clk3 = clock();
-
-        if ( pParams->TimeLimit != 0.0 && clock() > TimeToStop )
-        {
-            if ( !pParams->fSilent )
-                printf( "Fra_FraigInduction(): Runtime limit exceeded.\n" );
-            goto finish;
-        }
-
-        // mark the classes as non-refined
-        p->pCla->fRefinement = 0;
-        // derive non-init K-timeframes while implementing e-classes
-clk2 = clock();
-        p->pManFraig = Fra_FramesWithClasses( p );
-p->timeTrav += clock() - clk2;
-//Aig_ManDumpBlif( p->pManFraig, "testaig.blif", NULL, NULL );
-
-        // perform AIG rewriting
-        if ( p->pPars->fRewrite )
-            Fra_FraigInductionRewrite( p );
-
-        // convert the manager to SAT solver (the last nLatches outputs are inputs)
-        if ( fUseSimpleCnf || pPars->fUseImps )
-            pCnf = Cnf_DeriveSimple( p->pManFraig, Aig_ManRegNum(p->pManFraig) );
-        else
-            pCnf = Cnf_Derive( p->pManFraig, Aig_ManRegNum(p->pManFraig) );
-//        Cnf_DataTranformPolarity( pCnf, 0 );
-//Cnf_DataWriteIntoFile( pCnf, "temp.cnf", 1 );
-
-        p->pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
-        p->nSatVars = pCnf->nVars;
-        assert( p->pSat != NULL );
-        if ( p->pSat == NULL )
-            printf( "Fra_FraigInduction(): Computed CNF is not valid.\n" );
-        if ( pPars->fUseImps )
-        {
-            Fra_ImpAddToSolver( p, p->pCla->vImps, pCnf->pVarNums );
-            if ( p->pSat == NULL )
-                printf( "Fra_FraigInduction(): Adding implicationsn to CNF led to a conflict.\n" );
-        }
-
-        // set the pointers to the manager
-        Aig_ManForEachObj( p->pManFraig, pObj, i )
-            pObj->pData = p;
-
-        // prepare solver for fraiging the last timeframe
-        Fra_ManClean( p, Aig_ManObjNumMax(p->pManFraig) + Aig_ManNodeNum(p->pManAig) );
-
-        // transfer PI/LO variable numbers
-        Aig_ManForEachObj( p->pManFraig, pObj, i )
-        {
-            if ( pCnf->pVarNums[pObj->Id] == -1 )
-                continue;
-            Fra_ObjSetSatNum( pObj, pCnf->pVarNums[pObj->Id] );
-            Fra_ObjSetFaninVec( pObj, (Vec_Ptr_t *)1 );
-        }
-        Cnf_DataFree( pCnf );
-
-        // add one-hotness clauses
-        if ( p->pPars->fUse1Hot )
-            Fra_OneHotAssume( p, p->vOneHots );
-//        if ( p->pManAig->vOnehots )
-//            Fra_OneHotAddKnownConstraint( p, p->pManAig->vOnehots );
- 
-        // report the intermediate results
-        if ( pPars->fVerbose )
-        {
-            printf( "%3d : C = %6d. Cl = %6d.  L = %6d. LR = %6d.  ", 
-                nIter, Vec_PtrSize(p->pCla->vClasses1), Vec_PtrSize(p->pCla->vClasses), 
-                Fra_ClassesCountLits(p->pCla), p->pManFraig->nAsserts );
-            if ( p->pCla->vImps )
-                printf( "I = %6d. ", Vec_IntSize(p->pCla->vImps) );
-            if ( p->pPars->fUse1Hot )
-                printf( "1h = %6d. ", Fra_OneHotCount(p, p->vOneHots) );
-            printf( "NR = %6d. ", Aig_ManNodeNum(p->pManFraig) );
-//            printf( "\n" );
-        } 
-
-        // perform sweeping
-        p->nSatCallsRecent = 0;
-        p->nSatCallsSkipped = 0;
-clk2 = clock();
-        if ( p->pPars->fUse1Hot )
-            Fra_OneHotCheck( p, p->vOneHots );
-        Fra_FraigSweep( p );
-        if ( pPars->fVerbose )
-        {
-            ABC_PRT( "T", clock() - clk3 );
-        } 
-
-//        Sat_SolverPrintStats( stdout, p->pSat );
-        // remove FRAIG and SAT solver
-        Aig_ManStop( p->pManFraig );   p->pManFraig = NULL;
-//        printf( "Vars = %d. Clauses = %d. Learnts = %d.\n", p->pSat->size, p->pSat->clauses.size, p->pSat->learnts.size );
-        sat_solver_delete( p->pSat );  p->pSat = NULL; 
-        memset( p->pMemFraig, 0, sizeof(Aig_Obj_t *) * p->nSizeAlloc * p->nFramesAll );
-//        printf( "Recent SAT called = %d. Skipped = %d.\n", p->nSatCallsRecent, p->nSatCallsSkipped );
-        assert( p->vTimeouts == NULL );
-        if ( p->vTimeouts )
-           printf( "Fra_FraigInduction(): SAT solver timed out!\n" );
-        // check if refinement has happened
-//        p->pCla->fRefinement = (int)(nLitsOld != Fra_ClassesCountLits(p->pCla));
-        if ( p->pCla->fRefinement && 
-            nLitsOld == Fra_ClassesCountLits(p->pCla) && 
-            nImpsOld == (p->pCla->vImps? Vec_IntSize(p->pCla->vImps) : 0) && 
-            nHotsOld == (p->vOneHots? Fra_OneHotCount(p, p->vOneHots) : 0) )
-        {
-            printf( "Fra_FraigInduction(): Internal error. The result may not verify.\n" );
-            break;
-        }
-    }
-/*
-    // verify implications using simulation
-    if ( p->pCla->vImps && Vec_IntSize(p->pCla->vImps) )
-    {
-        int Temp, clk = clock();
-        if ( Temp = Fra_ImpVerifyUsingSimulation( p ) )
-            printf( "Implications failing the simulation test = %d (out of %d).  ", Temp, Vec_IntSize(p->pCla->vImps) );
-        else
-            printf( "All %d implications have passed the simulation test.  ", Vec_IntSize(p->pCla->vImps) );
-        ABC_PRT( "Time", clock() - clk );
-    }
-*/
-
-    // move the classes into representatives and reduce AIG
-clk2 = clock();
-    if ( p->pPars->fWriteImps && p->vOneHots && Fra_OneHotCount(p, p->vOneHots) )
-    {
-        extern void Ioa_WriteAiger( Aig_Man_t * pMan, char * pFileName, int fWriteSymbols, int fCompact );
-        Aig_Man_t * pNew;
-        char * pFileName = Ioa_FileNameGenericAppend( p->pManAig->pName, "_care.aig" );
-        printf( "Care one-hotness clauses will be written into file \"%s\".\n", pFileName );
-        pManAigNew = Aig_ManDupOrdered( pManAig );
-        pNew = Fra_OneHotCreateExdc( p, p->vOneHots );
-        Ioa_WriteAiger( pNew, pFileName, 0, 1 );
-        Aig_ManStop( pNew );
-    }
-    else 
-    {
-    //    Fra_ClassesPrint( p->pCla, 1 );
-        Fra_ClassesSelectRepr( p->pCla );
-        Fra_ClassesCopyReprs( p->pCla, p->vTimeouts );
-        pManAigNew = Aig_ManDupRepr( pManAig, 0 );
-    }
-    // add implications to the manager
-//    if ( fWriteImps && p->pCla->vImps && Vec_IntSize(p->pCla->vImps) )
-//        Fra_ImpRecordInManager( p, pManAigNew );
-    // cleanup the new manager
-    Aig_ManSeqCleanup( pManAigNew );
-    // remove pointers to the dead nodes
-//    Aig_ManForEachObj( pManAig, pObj, i )
-//        if ( pObj->pData && Aig_ObjIsNone(pObj->pData) )
-//            pObj->pData = NULL;
-//    Aig_ManCountMergeRegs( pManAigNew );
-p->timeTrav += clock() - clk2;
-p->timeTotal = clock() - clk;
-    // get the final stats
-    p->nLitsEnd  = Fra_ClassesCountLits( p->pCla );
-    p->nNodesEnd = Aig_ManNodeNum(pManAigNew);
-    p->nRegsEnd  = Aig_ManRegNum(pManAigNew);
-    // free the manager
-finish:
-    Fra_ManStop( p );
-    // check the output
-//    if ( Aig_ManPoNum(pManAigNew) - Aig_ManRegNum(pManAigNew) == 1 )
-//        if ( Aig_ObjChild0( Aig_ManPo(pManAigNew,0) ) == Aig_ManConst0(pManAigNew) )
-//            printf( "Proved output constant 0.\n" );
-    pParams->nIters = nIter;
-    return pManAigNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Outputs a set of pairs of equivalent nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_FraigInductionTest( char * pFileName, Fra_Ssw_t * pParams )
-{
-    FILE * pFile;
-    char * pFilePairs;
-    Aig_Man_t * pMan, * pNew;
-    Aig_Obj_t * pObj, * pRepr;
-    int * pNum2Id;
-    int i, Counter = 0;
-    pMan = Saig_ManReadBlif( pFileName );
-    if ( pMan == NULL )
-        return 0;
-    // perform seq SAT sweeping
-    pNew = Fra_FraigInduction( pMan, pParams );
-    if ( pNew == NULL )
-    {
-        Aig_ManStop( pMan );
-        return 0;
-    }
-    if ( pParams->fVerbose )
-    {
-        printf( "Original AIG: " );
-        Aig_ManPrintStats( pMan );
-        printf( "Reduced  AIG: " );
-        Aig_ManPrintStats( pNew );
-    }
-    Aig_ManStop( pNew );
-    pNum2Id = (int *)pMan->pData;
-    // write the output file
-    pFilePairs = Aig_FileNameGenericAppend( pFileName, ".pairs" );
-    pFile = fopen( pFilePairs, "w" );
-    Aig_ManForEachObj( pMan, pObj, i )
-        if ( (pRepr = pMan->pReprs[pObj->Id]) )
-        {
-            fprintf( pFile, "%d %d %c\n", pNum2Id[pObj->Id], pNum2Id[pRepr->Id], (Aig_ObjPhase(pObj) ^ Aig_ObjPhase(pRepr))? '-' : '+' );
-            Counter++;
-        }
-    fclose( pFile );
-    if ( pParams->fVerbose )
-    {
-        printf( "Result: %d pairs of seq equiv nodes are written into file \"%s\".\n", Counter, pFilePairs );
-    }
-    Aig_ManStop( pMan );
-    return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraIndVer.c b/src/aig/fra/fraIndVer.c
deleted file mode 100644
index 32069cfb..00000000
--- a/src/aig/fra/fraIndVer.c
+++ /dev/null
@@ -1,166 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraIndVer.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    [Verification of the inductive invariant.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraIndVer.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-#include "cnf.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Verifies the inductive invariant.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_InvariantVerify( Aig_Man_t * pAig, int nFrames, Vec_Int_t * vClauses, Vec_Int_t * vLits )
-{
-    Cnf_Dat_t * pCnf;
-    sat_solver * pSat;
-    int * pStart;
-    int RetValue, Beg, End, i, k;
-    int CounterBase = 0, CounterInd = 0;
-    int clk = clock();
-
-    if ( nFrames != 1 )
-    {
-        printf( "Invariant verification: Can only verify for K = 1\n" );
-        return 1;
-    }
-
-    // derive CNF
-    pCnf = Cnf_DeriveSimple( pAig, Aig_ManPoNum(pAig) );
-/*
-    // add the property
-    {
-        Aig_Obj_t * pObj;
-        int Lits[1];
-
-        pObj = Aig_ManPo( pAig, 0 );
-        Lits[0] = toLitCond( pCnf->pVarNums[pObj->Id], 1 ); 
-
-        Vec_IntPush( vLits, Lits[0] );
-        Vec_IntPush( vClauses, Vec_IntSize(vLits) );
-        printf( "Added the target property to the set of clauses to be inductively checked.\n" );
-    }
-*/
-    // derive initialized frames for the base case
-    pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, nFrames, 1 );
-    // check clauses in the base case
-    Beg = 0;
-    pStart = Vec_IntArray( vLits );
-    Vec_IntForEachEntry( vClauses, End, i )
-    {
-        // complement the literals
-        for ( k = Beg; k < End; k++ )
-            pStart[k] = lit_neg(pStart[k]);
-        RetValue = sat_solver_solve( pSat, pStart + Beg, pStart + End, 0, 0, 0, 0 );
-        for ( k = Beg; k < End; k++ )
-            pStart[k] = lit_neg(pStart[k]);
-        Beg = End;
-        if ( RetValue == l_False )
-            continue;
-//        printf( "Clause %d failed the base case.\n", i );
-        CounterBase++;
-    }
-    sat_solver_delete( pSat );
-
-    // derive initialized frames for the base case
-    pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, nFrames + 1, 0 );
-    assert( pSat->size == 2 * pCnf->nVars );
-    // add clauses to the first frame
-    Beg = 0;
-    pStart = Vec_IntArray( vLits );
-    Vec_IntForEachEntry( vClauses, End, i )
-    {
-        RetValue = sat_solver_addclause( pSat, pStart + Beg, pStart + End );
-        Beg = End;
-        if ( RetValue == 0 )
-        {
-            Cnf_DataFree( pCnf );
-            sat_solver_delete( pSat );
-            printf( "Invariant verification: SAT solver is unsat after adding a clause.\n" );
-            return 0;
-        }
-    }
-    // simplify the solver
-    if ( pSat->qtail != pSat->qhead )
-    {
-        RetValue = sat_solver_simplify(pSat);
-        assert( RetValue != 0 );
-        assert( pSat->qtail == pSat->qhead );
-    }
-
-    // check clauses in the base case
-    Beg = 0;
-    pStart = Vec_IntArray( vLits );
-    Vec_IntForEachEntry( vClauses, End, i )
-    {
-        // complement the literals
-        for ( k = Beg; k < End; k++ )
-        {
-            pStart[k] += 2 * pCnf->nVars;
-            pStart[k] = lit_neg(pStart[k]);
-        }
-        RetValue = sat_solver_solve( pSat, pStart + Beg, pStart + End, 0, 0, 0, 0 );
-        for ( k = Beg; k < End; k++ )
-        {
-            pStart[k] = lit_neg(pStart[k]);
-            pStart[k] -= 2 * pCnf->nVars;
-        }
-        Beg = End;
-        if ( RetValue == l_False )
-            continue;
-//        printf( "Clause %d failed the inductive case.\n", i );
-        CounterInd++;
-    }
-    sat_solver_delete( pSat );
-    Cnf_DataFree( pCnf );
-    if ( CounterBase )
-        printf( "Invariant verification: %d clauses (out of %d) FAILED the base case.\n", CounterBase, Vec_IntSize(vClauses) );
-    if ( CounterInd )
-        printf( "Invariant verification: %d clauses (out of %d) FAILED the inductive case.\n", CounterInd, Vec_IntSize(vClauses) );
-    if ( CounterBase || CounterInd )
-        return 0;
-    printf( "Invariant verification: %d clauses verified correctly.  ", Vec_IntSize(vClauses) );
-    ABC_PRT( "Time", clock() - clk );
-    return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraLcr.c b/src/aig/fra/fraLcr.c
deleted file mode 100644
index b18a8fcd..00000000
--- a/src/aig/fra/fraLcr.c
+++ /dev/null
@@ -1,709 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraLcorr.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    [Latch correspondence computation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraLcorr.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Fra_Lcr_t_    Fra_Lcr_t;
-struct Fra_Lcr_t_
-{
-    // original AIG
-    Aig_Man_t *      pAig;
-    // equivalence class representation
-    Fra_Cla_t *      pCla;       
-    // partitioning information
-    Vec_Ptr_t *      vParts;        // output partitions
-    int *            pInToOutPart;  // mapping of PI num into PO partition num
-    int *            pInToOutNum;   // mapping of PI num into the num of this PO in the partition
-    // AIGs for the partitions
-    Vec_Ptr_t *      vFraigs;
-    // other variables
-    int              fRefining; 
-    // parameters
-    int              nFramesP;
-    int              fVerbose;
-    // statistics
-    int              nIters;
-    int              nLitsBeg;
-    int              nLitsEnd;
-    int              nNodesBeg;
-    int              nNodesEnd;
-    int              nRegsBeg;
-    int              nRegsEnd;
-    // runtime
-    int              timeSim;
-    int              timePart;
-    int              timeTrav;
-    int              timeFraig;
-    int              timeUpdate;
-    int              timeTotal;
-};
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates the retiming manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Fra_Lcr_t * Lcr_ManAlloc( Aig_Man_t * pAig )
-{
-    Fra_Lcr_t * p;
-    p = ABC_ALLOC( Fra_Lcr_t, 1 );
-    memset( p, 0, sizeof(Fra_Lcr_t) );
-    p->pAig = pAig;
-    p->pInToOutPart = ABC_ALLOC( int, Aig_ManPiNum(pAig) );
-    memset( p->pInToOutPart, 0, sizeof(int) * Aig_ManPiNum(pAig) );
-    p->pInToOutNum = ABC_ALLOC( int, Aig_ManPiNum(pAig) );
-    memset( p->pInToOutNum, 0, sizeof(int) * Aig_ManPiNum(pAig) );
-    p->vFraigs = Vec_PtrAlloc( 1000 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints stats for the fraiging manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Lcr_ManPrint( Fra_Lcr_t * p )
-{
-    printf( "Iterations = %d.  LitBeg = %d.  LitEnd = %d. (%6.2f %%).\n", 
-        p->nIters, p->nLitsBeg, p->nLitsEnd, 100.0*p->nLitsEnd/p->nLitsBeg );
-    printf( "NBeg = %d. NEnd = %d. (Gain = %6.2f %%).  RBeg = %d. REnd = %d. (Gain = %6.2f %%).\n", 
-        p->nNodesBeg, p->nNodesEnd, 100.0*(p->nNodesBeg-p->nNodesEnd)/p->nNodesBeg, 
-        p->nRegsBeg, p->nRegsEnd, 100.0*(p->nRegsBeg-p->nRegsEnd)/p->nRegsBeg );
-    ABC_PRT( "AIG simulation  ", p->timeSim  );
-    ABC_PRT( "AIG partitioning", p->timePart );
-    ABC_PRT( "AIG rebuiding   ", p->timeTrav );
-    ABC_PRT( "FRAIGing        ", p->timeFraig );
-    ABC_PRT( "AIG updating    ", p->timeUpdate );
-    ABC_PRT( "TOTAL RUNTIME   ", p->timeTotal );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocates the retiming manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Lcr_ManFree( Fra_Lcr_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    if ( p->fVerbose )
-        Lcr_ManPrint( p );
-    Aig_ManForEachPi( p->pAig, pObj, i )
-        pObj->pNext = NULL;
-    Vec_PtrFree( p->vFraigs );
-    if ( p->pCla  )     Fra_ClassesStop( p->pCla );
-    if ( p->vParts  )   Vec_VecFree( (Vec_Vec_t *)p->vParts );
-    ABC_FREE( p->pInToOutPart );
-    ABC_FREE( p->pInToOutNum );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepare the AIG for class computation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Fra_Man_t * Fra_LcrAigPrepare( Aig_Man_t * pAig )
-{
-    Fra_Man_t * p;
-    Aig_Obj_t * pObj;
-    int i;
-    p = ABC_ALLOC( Fra_Man_t, 1 );
-    memset( p, 0, sizeof(Fra_Man_t) );
-//    Aig_ManForEachPi( pAig, pObj, i )
-    Aig_ManForEachObj( pAig, pObj, i )
-        pObj->pData = p;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepare the AIG for class computation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_LcrAigPrepareTwo( Aig_Man_t * pAig, Fra_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManForEachPi( pAig, pObj, i )
-        pObj->pData = p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compares two nodes for equivalence after partitioned fraiging.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_LcrNodesAreEqual( Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
-{
-    Fra_Man_t * pTemp = (Fra_Man_t *)pObj0->pData;
-    Fra_Lcr_t * pLcr = (Fra_Lcr_t *)pTemp->pBmc;
-    Aig_Man_t * pFraig;
-    Aig_Obj_t * pOut0, * pOut1;
-    int nPart0, nPart1;
-    assert( Aig_ObjIsPi(pObj0) );
-    assert( Aig_ObjIsPi(pObj1) );
-    // find the partition to which these nodes belong
-    nPart0 = pLcr->pInToOutPart[(long)pObj0->pNext];
-    nPart1 = pLcr->pInToOutPart[(long)pObj1->pNext];
-    // if this is the result of refinement of the class created const-1 nodes
-    // the nodes may end up in different partions - we assume them equivalent
-    if ( nPart0 != nPart1 )
-    {
-        assert( 0 );
-        return 1;
-    }
-    assert( nPart0 == nPart1 );
-    pFraig = (Aig_Man_t *)Vec_PtrEntry( pLcr->vFraigs, nPart0 );
-    // get the fraig outputs
-    pOut0 = Aig_ManPo( pFraig, pLcr->pInToOutNum[(long)pObj0->pNext] );
-    pOut1 = Aig_ManPo( pFraig, pLcr->pInToOutNum[(long)pObj1->pNext] );
-    return Aig_ObjFanin0(pOut0) == Aig_ObjFanin0(pOut1);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compares the node with a constant after partioned fraiging.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_LcrNodeIsConst( Aig_Obj_t * pObj )
-{
-    Fra_Man_t * pTemp = (Fra_Man_t *)pObj->pData;
-    Fra_Lcr_t * pLcr = (Fra_Lcr_t *)pTemp->pBmc;
-    Aig_Man_t * pFraig;
-    Aig_Obj_t * pOut;
-    int nPart;
-    assert( Aig_ObjIsPi(pObj) );
-    // find the partition to which these nodes belong
-    nPart = pLcr->pInToOutPart[(long)pObj->pNext];
-    pFraig = (Aig_Man_t *)Vec_PtrEntry( pLcr->vFraigs, nPart );
-    // get the fraig outputs
-    pOut = Aig_ManPo( pFraig, pLcr->pInToOutNum[(long)pObj->pNext] );
-    return Aig_ObjFanin0(pOut) == Aig_ManConst1(pFraig);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates the AIG manager recursively.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Fra_LcrManDup_rec( Aig_Man_t * pNew, Aig_Man_t * p, Aig_Obj_t * pObj )
-{
-    Aig_Obj_t * pObjNew;
-    if ( pObj->pData )
-        return (Aig_Obj_t *)pObj->pData;
-    Fra_LcrManDup_rec( pNew, p, Aig_ObjFanin0(pObj) );
-    if ( Aig_ObjIsBuf(pObj) )
-        return (Aig_Obj_t *)(pObj->pData = Aig_ObjChild0Copy(pObj));
-    Fra_LcrManDup_rec( pNew, p, Aig_ObjFanin1(pObj) );
-    pObjNew = Aig_Oper( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj), Aig_ObjType(pObj) );
-    Aig_Regular(pObjNew)->pHaig = pObj->pHaig;
-    return (Aig_Obj_t *)(pObj->pData = pObjNew);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Give the AIG and classes, reduces AIG for partitioning.]
-
-  Description [Ignores registers that are not in the classes. 
-  Places candidate equivalent classes of registers into single outputs 
-  (for ease of partitioning). The resulting combinational AIG contains 
-  outputs in the same order as equivalence classes of registers, 
-  followed by constant-1 registers. Preserves the set of all inputs.
-  Complemented attributes of the outputs do not matter because we need 
-  then only for collecting the structural info.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Fra_LcrDeriveAigForPartitioning( Fra_Lcr_t * pLcr )
-{
-    Aig_Man_t * pNew;
-    Aig_Obj_t * pObj, * pObjPo, * pObjNew, ** ppClass, * pMiter;
-    int i, c, Offset;
-    // remember the numbers of the inputs of the original AIG
-    Aig_ManForEachPi( pLcr->pAig, pObj, i )
-    {
-        pObj->pData = pLcr;
-        pObj->pNext = (Aig_Obj_t *)(long)i;
-    }
-    // compute the LO/LI offset
-    Offset = Aig_ManPoNum(pLcr->pAig) - Aig_ManPiNum(pLcr->pAig);
-    // create the PIs
-    Aig_ManCleanData( pLcr->pAig );
-    pNew = Aig_ManStartFrom( pLcr->pAig );
-    // go over the equivalence classes
-    Vec_PtrForEachEntry( Aig_Obj_t **, pLcr->pCla->vClasses, ppClass, i )
-    {
-        pMiter = Aig_ManConst0(pNew);
-        for ( c = 0; ppClass[c]; c++ )
-        {
-            assert( Aig_ObjIsPi(ppClass[c]) );
-            pObjPo  = Aig_ManPo( pLcr->pAig, Offset+(long)ppClass[c]->pNext );
-            pObjNew = Fra_LcrManDup_rec( pNew, pLcr->pAig, Aig_ObjFanin0(pObjPo) );
-            pMiter  = Aig_Exor( pNew, pMiter, pObjNew );
-        }
-        Aig_ObjCreatePo( pNew, pMiter );
-    }
-    // go over the constant candidates
-    Vec_PtrForEachEntry( Aig_Obj_t *, pLcr->pCla->vClasses1, pObj, i )
-    {
-        assert( Aig_ObjIsPi(pObj) );
-        pObjPo = Aig_ManPo( pLcr->pAig, Offset+(long)pObj->pNext );
-        pMiter = Fra_LcrManDup_rec( pNew, pLcr->pAig, Aig_ObjFanin0(pObjPo) );
-        Aig_ObjCreatePo( pNew, pMiter );
-    }
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Remaps partitions into the inputs of original AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_LcrRemapPartitions( Vec_Ptr_t * vParts, Fra_Cla_t * pCla, int * pInToOutPart, int * pInToOutNum )
-{
-    Vec_Int_t * vOne, * vOneNew;
-    Aig_Obj_t ** ppClass, * pObjPi;
-    int Out, Offset, i, k, c;
-    // compute the LO/LI offset
-    Offset = Aig_ManPoNum(pCla->pAig) - Aig_ManPiNum(pCla->pAig);
-    Vec_PtrForEachEntry( Vec_Int_t *, vParts, vOne, i )
-    {
-        vOneNew = Vec_IntAlloc( Vec_IntSize(vOne) );
-        Vec_IntForEachEntry( vOne, Out, k )
-        {
-            if ( Out < Vec_PtrSize(pCla->vClasses) )
-            {
-                ppClass = (Aig_Obj_t **)Vec_PtrEntry( pCla->vClasses, Out );
-                for ( c = 0; ppClass[c]; c++ )
-                {
-                    pInToOutPart[(long)ppClass[c]->pNext] = i;
-                    pInToOutNum[(long)ppClass[c]->pNext] = Vec_IntSize(vOneNew);
-                    Vec_IntPush( vOneNew, Offset+(long)ppClass[c]->pNext );
-                }
-            }
-            else
-            {
-                pObjPi = (Aig_Obj_t *)Vec_PtrEntry( pCla->vClasses1, Out - Vec_PtrSize(pCla->vClasses) );
-                pInToOutPart[(long)pObjPi->pNext] = i;
-                pInToOutNum[(long)pObjPi->pNext] = Vec_IntSize(vOneNew);
-                Vec_IntPush( vOneNew, Offset+(long)pObjPi->pNext );
-            }
-        }
-        // replace the class
-        Vec_PtrWriteEntry( vParts, i, vOneNew );
-        Vec_IntFree( vOne );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates AIG of one partition with speculative reduction.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Fra_LcrCreatePart_rec( Fra_Cla_t * pCla, Aig_Man_t * pNew, Aig_Man_t * p, Aig_Obj_t * pObj )
-{
-    assert( !Aig_IsComplement(pObj) );
-    if ( Aig_ObjIsTravIdCurrent(p, pObj) )
-        return (Aig_Obj_t *)pObj->pData;
-    Aig_ObjSetTravIdCurrent(p, pObj);
-    if ( Aig_ObjIsPi(pObj) )
-    {
-//        Aig_Obj_t * pRepr = Fra_ClassObjRepr(pObj);
-        Aig_Obj_t * pRepr = pCla->pMemRepr[pObj->Id];
-        if ( pRepr == NULL )
-            pObj->pData = Aig_ObjCreatePi( pNew );
-        else
-        {
-            pObj->pData = Fra_LcrCreatePart_rec( pCla, pNew, p, pRepr );
-            pObj->pData = Aig_NotCond( (Aig_Obj_t *)pObj->pData, pRepr->fPhase ^ pObj->fPhase );
-        }
-        return (Aig_Obj_t *)pObj->pData;
-    }
-    Fra_LcrCreatePart_rec( pCla, pNew, p, Aig_ObjFanin0(pObj) );
-    Fra_LcrCreatePart_rec( pCla, pNew, p, Aig_ObjFanin1(pObj) );
-    return (Aig_Obj_t *)(pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) ));
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates AIG of one partition with speculative reduction.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Fra_LcrCreatePart( Fra_Lcr_t * p, Vec_Int_t * vPart )
-{
-    Aig_Man_t * pNew;
-    Aig_Obj_t * pObj, * pObjNew;
-    int Out, i;
-    // create new AIG for this partition
-    pNew = Aig_ManStartFrom( p->pAig );
-    Aig_ManIncrementTravId( p->pAig );
-    Aig_ObjSetTravIdCurrent( p->pAig, Aig_ManConst1(p->pAig) );
-    Aig_ManConst1(p->pAig)->pData = Aig_ManConst1(pNew);
-    Vec_IntForEachEntry( vPart, Out, i )
-    {
-        pObj = Aig_ManPo( p->pAig, Out );
-        if ( pObj->fMarkA )
-        {
-            pObjNew = Fra_LcrCreatePart_rec( p->pCla, pNew, p->pAig, Aig_ObjFanin0(pObj) );
-            pObjNew = Aig_NotCond( pObjNew, Aig_ObjFaninC0(pObj) );
-        }
-        else
-            pObjNew = Aig_ManConst1( pNew );
-        Aig_ObjCreatePo( pNew, pObjNew ); 
-    }
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Marks the nodes belonging to the equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClassNodesMark( Fra_Lcr_t * p )
-{
-    Aig_Obj_t * pObj, ** ppClass;
-    int i, c, Offset;
-    // compute the LO/LI offset
-    Offset = Aig_ManPoNum(p->pCla->pAig) - Aig_ManPiNum(p->pCla->pAig);
-    // mark the nodes remaining in the classes
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->pCla->vClasses1, pObj, i )
-    {
-        pObj = Aig_ManPo( p->pCla->pAig, Offset+(long)pObj->pNext );
-        pObj->fMarkA = 1;
-    }
-    Vec_PtrForEachEntry( Aig_Obj_t **, p->pCla->vClasses, ppClass, i )
-    {
-        for ( c = 0; ppClass[c]; c++ )
-        {
-            pObj = Aig_ManPo( p->pCla->pAig, Offset+(long)ppClass[c]->pNext );
-            pObj->fMarkA = 1;
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Unmarks the nodes belonging to the equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ClassNodesUnmark( Fra_Lcr_t * p )
-{
-    Aig_Obj_t * pObj, ** ppClass;
-    int i, c, Offset;
-    // compute the LO/LI offset
-    Offset = Aig_ManPoNum(p->pCla->pAig) - Aig_ManPiNum(p->pCla->pAig);
-    // mark the nodes remaining in the classes
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->pCla->vClasses1, pObj, i )
-    {
-        pObj = Aig_ManPo( p->pCla->pAig, Offset+(long)pObj->pNext );
-        pObj->fMarkA = 0;
-    }
-    Vec_PtrForEachEntry( Aig_Obj_t **, p->pCla->vClasses, ppClass, i )
-    {
-        for ( c = 0; ppClass[c]; c++ )
-        {
-            pObj = Aig_ManPo( p->pCla->pAig, Offset+(long)ppClass[c]->pNext );
-            pObj->fMarkA = 0;
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs choicing of the AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Fra_FraigLatchCorrespondence( Aig_Man_t * pAig, int nFramesP, int nConfMax, int fProve, int fVerbose, int * pnIter, float TimeLimit )
-{
-    int nPartSize    = 200;
-    int fReprSelect  = 0;
-    Fra_Lcr_t * p;
-    Fra_Sml_t * pSml;
-    Fra_Man_t * pTemp;
-    Aig_Man_t * pAigPart, * pAigTemp, * pAigNew = NULL;
-    Vec_Int_t * vPart;
-    int i, nIter, timeSim, clk = clock(), clk2, clk3;
-    int TimeToStop = (TimeLimit == 0.0)? 0 : clock() + (int)(TimeLimit * CLOCKS_PER_SEC);
-    if ( Aig_ManNodeNum(pAig) == 0 )
-    {
-        if ( pnIter ) *pnIter = 0;
-        // Ntl_ManFinalize() requires the following to satisfy an assertion.
-        Aig_ManReprStart(pAig,Aig_ManObjNumMax(pAig));
-        return Aig_ManDupOrdered(pAig);
-    }
-    assert( Aig_ManRegNum(pAig) > 0 ); 
-
-    // simulate the AIG 
-clk2 = clock();
-if ( fVerbose )
-printf( "Simulating AIG with %d nodes for %d cycles ...  ", Aig_ManNodeNum(pAig), nFramesP + 32 );
-    pSml = Fra_SmlSimulateSeq( pAig, nFramesP, 32, 1, 1  ); 
-if ( fVerbose ) 
-{
-ABC_PRT( "Time", clock() - clk2 );
-}
-timeSim = clock() - clk2;
-
-    // check if simulation discovered non-constant-0 POs
-    if ( fProve && pSml->fNonConstOut )
-    {
-        pAig->pSeqModel = Fra_SmlGetCounterExample( pSml );
-        Fra_SmlStop( pSml );
-        return NULL;
-    }
-
-    // start the manager
-    p = Lcr_ManAlloc( pAig );
-    p->nFramesP = nFramesP;
-    p->fVerbose = fVerbose;
-    p->timeSim += timeSim;
-
-    pTemp = Fra_LcrAigPrepare( pAig );
-    pTemp->pBmc = (Fra_Bmc_t *)p;
-    pTemp->pSml = pSml;
-
-    // get preliminary info about equivalence classes
-    pTemp->pCla = p->pCla = Fra_ClassesStart( p->pAig );
-    Fra_ClassesPrepare( p->pCla, 1, 0 );
-    p->pCla->pFuncNodeIsConst   = Fra_LcrNodeIsConst;
-    p->pCla->pFuncNodesAreEqual = Fra_LcrNodesAreEqual;
-    Fra_SmlStop( pTemp->pSml );
-
-    // partition the AIG for latch correspondence computation
-clk2 = clock();
-if ( fVerbose )
-printf( "Partitioning AIG ...  " );
-    pAigPart = Fra_LcrDeriveAigForPartitioning( p );
-    p->vParts = (Vec_Ptr_t *)Aig_ManPartitionSmart( pAigPart, nPartSize, 0, NULL );
-    Fra_LcrRemapPartitions( p->vParts, p->pCla, p->pInToOutPart, p->pInToOutNum );
-    Aig_ManStop( pAigPart );
-if ( fVerbose ) 
-{
-ABC_PRT( "Time", clock() - clk2 );
-p->timePart += clock() - clk2;
-}
-
-    // get the initial stats
-    p->nLitsBeg  = Fra_ClassesCountLits( p->pCla );
-    p->nNodesBeg = Aig_ManNodeNum(p->pAig);
-    p->nRegsBeg  = Aig_ManRegNum(p->pAig);
-
-    // perforn interative reduction of the partitions
-    p->fRefining = 1;
-    for ( nIter = 0; p->fRefining; nIter++ )
-    {
-        p->fRefining = 0;
-        clk3 = clock();
-        // derive AIGs for each partition
-        Fra_ClassNodesMark( p );
-        Vec_PtrClear( p->vFraigs );
-        Vec_PtrForEachEntry( Vec_Int_t *, p->vParts, vPart, i )
-        {
-            int clk3 = clock();
-            if ( TimeLimit != 0.0 && clock() > TimeToStop )
-            {
-                Vec_PtrForEachEntry( Aig_Man_t *, p->vFraigs, pAigPart, i )
-                    Aig_ManStop( pAigPart );
-                Aig_ManCleanMarkA( pAig );
-                Aig_ManCleanMarkB( pAig );
-                printf( "Fra_FraigLatchCorrespondence(): Runtime limit exceeded.\n" );
-                goto finish;
-            }
-clk2 = clock();
-            pAigPart = Fra_LcrCreatePart( p, vPart );
-p->timeTrav += clock() - clk2;
-clk2 = clock();
-            pAigTemp  = Fra_FraigEquivence( pAigPart, nConfMax, 0 );
-p->timeFraig += clock() - clk2;
-            Vec_PtrPush( p->vFraigs, pAigTemp );
-/*
-            {
-                char Name[1000];
-                sprintf( Name, "part%04d.blif", i );
-                Aig_ManDumpBlif( pAigPart, Name, NULL, NULL );
-            }
-printf( "Finished part %4d (out of %4d).  ", i, Vec_PtrSize(p->vParts) );
-ABC_PRT( "Time", clock() - clk3 );
-*/
-
-            Aig_ManStop( pAigPart );
-        }
-        Fra_ClassNodesUnmark( p );
-        // report the intermediate results
-        if ( fVerbose )
-        {
-            printf( "%3d : Const = %6d. Class = %6d.  L = %6d. Part = %3d.  ", 
-                nIter, Vec_PtrSize(p->pCla->vClasses1), Vec_PtrSize(p->pCla->vClasses), 
-                Fra_ClassesCountLits(p->pCla), Vec_PtrSize(p->vParts) );
-            ABC_PRT( "T", clock() - clk3 );
-        }
-        // refine the classes
-        Fra_LcrAigPrepareTwo( p->pAig, pTemp );
-        if ( Fra_ClassesRefine( p->pCla ) )
-            p->fRefining = 1;
-        if ( Fra_ClassesRefine1( p->pCla, 0, NULL ) )
-            p->fRefining = 1;
-        // clean the fraigs
-        Vec_PtrForEachEntry( Aig_Man_t *, p->vFraigs, pAigPart, i )
-            Aig_ManStop( pAigPart );
-
-        // repartition if needed
-        if ( 1 )
-        {
-clk2 = clock();
-            Vec_VecFree( (Vec_Vec_t *)p->vParts );
-            pAigPart = Fra_LcrDeriveAigForPartitioning( p );
-            p->vParts = (Vec_Ptr_t *)Aig_ManPartitionSmart( pAigPart, nPartSize, 0, NULL );
-            Fra_LcrRemapPartitions( p->vParts, p->pCla, p->pInToOutPart, p->pInToOutNum );
-            Aig_ManStop( pAigPart );
-p->timePart += clock() - clk2;
-        }
-    }
-    p->nIters = nIter;
-
-    // move the classes into representatives and reduce AIG
-clk2 = clock();
-//    Fra_ClassesPrint( p->pCla, 1 );
-    if ( fReprSelect )
-        Fra_ClassesSelectRepr( p->pCla );
-    Fra_ClassesCopyReprs( p->pCla, NULL );
-    pAigNew = Aig_ManDupRepr( p->pAig, 0 );
-    Aig_ManSeqCleanup( pAigNew );
-//    Aig_ManCountMergeRegs( pAigNew );
-p->timeUpdate += clock() - clk2;
-p->timeTotal = clock() - clk;
-    // get the final stats
-    p->nLitsEnd  = Fra_ClassesCountLits( p->pCla );
-    p->nNodesEnd = Aig_ManNodeNum(pAigNew);
-    p->nRegsEnd  = Aig_ManRegNum(pAigNew);
-finish:
-    ABC_FREE( pTemp );
-    Lcr_ManFree( p );
-    if ( pnIter ) *pnIter = nIter;
-    return pAigNew;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraMan.c b/src/aig/fra/fraMan.c
deleted file mode 100644
index 7e427e72..00000000
--- a/src/aig/fra/fraMan.c
+++ /dev/null
@@ -1,314 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    [Starts the FRAIG manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraMan.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Sets the default solving parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ParamsDefault( Fra_Par_t * pPars )
-{
-    memset( pPars, 0, sizeof(Fra_Par_t) );
-    pPars->nSimWords        =       32;  // the number of words in the simulation info
-    pPars->dSimSatur        =    0.005;  // the ratio of refined classes when saturation is reached
-    pPars->fPatScores       =        0;  // enables simulation pattern scoring
-    pPars->MaxScore         =       25;  // max score after which resimulation is used
-    pPars->fDoSparse        =        1;  // skips sparse functions
-//    pPars->dActConeRatio    =     0.05;  // the ratio of cone to be bumped
-//    pPars->dActConeBumpMax  =      5.0;  // the largest bump of activity
-    pPars->dActConeRatio    =      0.3;  // the ratio of cone to be bumped
-    pPars->dActConeBumpMax  =     10.0;  // the largest bump of activity
-    pPars->nBTLimitNode     =      100;  // conflict limit at a node
-    pPars->nBTLimitMiter    =   500000;  // conflict limit at an output
-    pPars->nFramesK         =        0;  // the number of timeframes to unroll
-    pPars->fConeBias        =        1;
-    pPars->fRewrite         =        0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sets the default solving parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ParamsDefaultSeq( Fra_Par_t * pPars )
-{
-    memset( pPars, 0, sizeof(Fra_Par_t) );
-    pPars->nSimWords        =        1;  // the number of words in the simulation info
-    pPars->dSimSatur        =    0.005;  // the ratio of refined classes when saturation is reached
-    pPars->fPatScores       =        0;  // enables simulation pattern scoring
-    pPars->MaxScore         =       25;  // max score after which resimulation is used
-    pPars->fDoSparse        =        1;  // skips sparse functions
-    pPars->dActConeRatio    =      0.3;  // the ratio of cone to be bumped
-    pPars->dActConeBumpMax  =     10.0;  // the largest bump of activity
-    pPars->nBTLimitNode     = 10000000;  // conflict limit at a node
-    pPars->nBTLimitMiter    =   500000;  // conflict limit at an output
-    pPars->nFramesK         =        1;  // the number of timeframes to unroll
-    pPars->fConeBias        =        0;
-    pPars->fRewrite         =        0;
-    pPars->fLatchCorr       =        0;
-} 
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the fraiging manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Fra_Man_t * Fra_ManStart( Aig_Man_t * pManAig, Fra_Par_t * pPars )
-{
-    Fra_Man_t * p;
-    Aig_Obj_t * pObj;
-    int i;
-    // allocate the fraiging manager
-    p = ABC_ALLOC( Fra_Man_t, 1 );
-    memset( p, 0, sizeof(Fra_Man_t) );
-    p->pPars      = pPars;
-    p->pManAig    = pManAig;
-    p->nSizeAlloc = Aig_ManObjNumMax( pManAig );
-    p->nFramesAll = pPars->nFramesK + 1;
-    // allocate storage for sim pattern
-    p->nPatWords  = Aig_BitWordNum( (Aig_ManPiNum(pManAig) - Aig_ManRegNum(pManAig)) * p->nFramesAll + Aig_ManRegNum(pManAig) );
-    p->pPatWords  = ABC_ALLOC( unsigned, p->nPatWords ); 
-    p->vPiVars    = Vec_PtrAlloc( 100 );
-    // equivalence classes
-    p->pCla       = Fra_ClassesStart( pManAig );
-    // allocate other members
-    p->pMemFraig  = ABC_ALLOC( Aig_Obj_t *, p->nSizeAlloc * p->nFramesAll );
-    memset( p->pMemFraig, 0, sizeof(Aig_Obj_t *) * p->nSizeAlloc * p->nFramesAll );
-    // set random number generator
-//    srand( 0xABCABC );
-    Aig_ManRandom(1);
-    // set the pointer to the manager
-    Aig_ManForEachObj( p->pManAig, pObj, i )
-        pObj->pData = p;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the fraiging manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ManClean( Fra_Man_t * p, int nNodesMax )
-{
-    int i;
-    // remove old arrays
-    for ( i = 0; i < p->nMemAlloc; i++ )
-        if ( p->pMemFanins[i] && p->pMemFanins[i] != (void *)1 )
-            Vec_PtrFree( p->pMemFanins[i] );
-    // realloc for the new size
-    if ( p->nMemAlloc < nNodesMax )
-    {
-        int nMemAllocNew = nNodesMax + 5000;
-        p->pMemFanins = ABC_REALLOC( Vec_Ptr_t *, p->pMemFanins, nMemAllocNew );
-        p->pMemSatNums = ABC_REALLOC( int, p->pMemSatNums, nMemAllocNew );
-        p->nMemAlloc = nMemAllocNew;
-    }
-    // prepare for the new run
-    memset( p->pMemFanins, 0, sizeof(Vec_Ptr_t *) * p->nMemAlloc );
-    memset( p->pMemSatNums, 0, sizeof(int) * p->nMemAlloc );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares the new manager to begin fraiging.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Fra_ManPrepareComb( Fra_Man_t * p )
-{
-    Aig_Man_t * pManFraig;
-    Aig_Obj_t * pObj;
-    int i;
-    assert( p->pManFraig == NULL );
-    // start the fraig package
-    pManFraig = Aig_ManStart( Aig_ManObjNumMax(p->pManAig) );
-    pManFraig->pName = Aig_UtilStrsav( p->pManAig->pName );
-    pManFraig->pSpec = Aig_UtilStrsav( p->pManAig->pSpec );
-    pManFraig->nRegs    = p->pManAig->nRegs;
-    pManFraig->nAsserts = p->pManAig->nAsserts;
-    // set the pointers to the available fraig nodes
-    Fra_ObjSetFraig( Aig_ManConst1(p->pManAig), 0, Aig_ManConst1(pManFraig) );
-    Aig_ManForEachPi( p->pManAig, pObj, i )
-        Fra_ObjSetFraig( pObj, 0, Aig_ObjCreatePi(pManFraig) );
-    // set the pointers to the manager
-    Aig_ManForEachObj( pManFraig, pObj, i )
-        pObj->pData = p;
-    // allocate memory for mapping FRAIG nodes into SAT numbers and fanins
-    p->nMemAlloc = p->nSizeAlloc;
-    p->pMemFanins = ABC_ALLOC( Vec_Ptr_t *, p->nMemAlloc );
-    memset( p->pMemFanins, 0, sizeof(Vec_Ptr_t *) * p->nMemAlloc );
-    p->pMemSatNums = ABC_ALLOC( int, p->nMemAlloc );
-    memset( p->pMemSatNums, 0, sizeof(int) * p->nMemAlloc );
-    // make sure the satisfying assignment is node assigned
-    assert( pManFraig->pData == NULL );
-    return pManFraig;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finalizes the combinational miter after fraiging.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ManFinalizeComb( Fra_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    // add the POs
-    Aig_ManForEachPo( p->pManAig, pObj, i )
-        Aig_ObjCreatePo( p->pManFraig, Fra_ObjChild0Fra(pObj,0) );
-    // postprocess
-    Aig_ManCleanMarkB( p->pManFraig );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the fraiging manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ManStop( Fra_Man_t * p )
-{
-    if ( p->pPars->fVerbose )
-        Fra_ManPrint( p );
-    // save mapping from original nodes into FRAIG nodes
-    if ( p->pManAig )
-    {
-        if ( p->pManAig->pObjCopies )
-            ABC_FREE( p->pManAig->pObjCopies );
-        p->pManAig->pObjCopies = p->pMemFraig;
-        p->pMemFraig = NULL;
-    }
-    Fra_ManClean( p, 0 );
-    if ( p->vTimeouts ) Vec_PtrFree( p->vTimeouts );
-    if ( p->vPiVars )   Vec_PtrFree( p->vPiVars );
-    if ( p->pSat )      sat_solver_delete( p->pSat );
-    if ( p->pCla  )     Fra_ClassesStop( p->pCla );
-    if ( p->pSml )      Fra_SmlStop( p->pSml );
-    if ( p->vCex )      Vec_IntFree( p->vCex );
-    if ( p->vOneHots )  Vec_IntFree( p->vOneHots );
-    ABC_FREE( p->pMemFraig );
-    ABC_FREE( p->pMemFanins );
-    ABC_FREE( p->pMemSatNums );
-    ABC_FREE( p->pPatWords );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints stats for the fraiging manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ManPrint( Fra_Man_t * p )
-{
-    double nMemory = 1.0*Aig_ManObjNumMax(p->pManAig)*(p->pSml->nWordsTotal*sizeof(unsigned)+6*sizeof(void*))/(1<<20);
-    printf( "SimWord = %d. Round = %d.  Mem = %0.2f Mb.  LitBeg = %d.  LitEnd = %d. (%6.2f %%).\n", 
-        p->pPars->nSimWords, p->pSml->nSimRounds, nMemory, p->nLitsBeg, p->nLitsEnd, 100.0*p->nLitsEnd/(p->nLitsBeg?p->nLitsBeg:1) );
-    printf( "Proof = %d. Cex = %d. Fail = %d. FailReal = %d. C-lim = %d. ImpRatio = %6.2f %%\n", 
-        p->nSatProof, p->nSatCallsSat, p->nSatFails, p->nSatFailsReal, p->pPars->nBTLimitNode, Fra_ImpComputeStateSpaceRatio(p) );
-    printf( "NBeg = %d. NEnd = %d. (Gain = %6.2f %%).  RBeg = %d. REnd = %d. (Gain = %6.2f %%).\n", 
-        p->nNodesBeg, p->nNodesEnd, 100.0*(p->nNodesBeg-p->nNodesEnd)/(p->nNodesBeg?p->nNodesBeg:1), 
-        p->nRegsBeg, p->nRegsEnd, 100.0*(p->nRegsBeg-p->nRegsEnd)/(p->nRegsBeg?p->nRegsBeg:1) );
-    if ( p->pSat )             Sat_SolverPrintStats( stdout, p->pSat );
-    if ( p->pPars->fUse1Hot )  Fra_OneHotEstimateCoverage( p, p->vOneHots );
-    ABC_PRT( "AIG simulation  ", p->pSml->timeSim  );
-    ABC_PRT( "AIG traversal   ", p->timeTrav );
-    if ( p->timeRwr )
-    {
-    ABC_PRT( "AIG rewriting   ", p->timeRwr  );
-    }
-    ABC_PRT( "SAT solving     ", p->timeSat  );
-    ABC_PRT( "    Unsat       ", p->timeSatUnsat );
-    ABC_PRT( "    Sat         ", p->timeSatSat   );
-    ABC_PRT( "    Fail        ", p->timeSatFail  );
-    ABC_PRT( "Class refining  ", p->timeRef   );
-    ABC_PRT( "TOTAL RUNTIME   ", p->timeTotal );
-    if ( p->time1 ) { ABC_PRT( "time1           ", p->time1 ); }
-    if ( p->nSpeculs )
-    printf( "Speculations = %d.\n", p->nSpeculs );
-    fflush( stdout );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraPart.c b/src/aig/fra/fraPart.c
deleted file mode 100644
index e9739f97..00000000
--- a/src/aig/fra/fraPart.c
+++ /dev/null
@@ -1,268 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraPart.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    [Partitioning for induction.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraPart.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ManPartitionTest( Aig_Man_t * p, int nComLim )
-{
-//    Bar_Progress_t * pProgress;
-    Vec_Vec_t * vSupps, * vSuppsIn;
-    Vec_Ptr_t * vSuppsNew;
-    Vec_Int_t * vSupNew, * vSup, * vSup2, * vTemp;//, * vSupIn;
-    Vec_Int_t * vOverNew, * vQuantNew;
-    Aig_Obj_t * pObj;
-    int i, k, nCommon, CountOver, CountQuant;
-    int nTotalSupp, nTotalSupp2, Entry, Largest;//, iVar;
-    double Ratio, R;
-    int clk;
-
-    nTotalSupp = 0;
-    nTotalSupp2 = 0;
-    Ratio = 0.0;
- 
-    // compute supports
-clk = clock();
-    vSupps = (Vec_Vec_t *)Aig_ManSupports( p );
-ABC_PRT( "Supports", clock() - clk );
-    // remove last entry
-    Aig_ManForEachPo( p, pObj, i )
-    {
-        vSup = Vec_VecEntryInt( vSupps, i );
-        Vec_IntPop( vSup );
-        // remember support
-//        pObj->pNext = (Aig_Obj_t *)vSup;
-    }
-
-    // create reverse supports
-clk = clock();
-    vSuppsIn = Vec_VecStart( Aig_ManPiNum(p) );
-    Aig_ManForEachPo( p, pObj, i )
-    {
-        vSup = Vec_VecEntryInt( vSupps, i );
-        Vec_IntForEachEntry( vSup, Entry, k )
-            Vec_VecPush( vSuppsIn, Entry, (void *)(ABC_PTRUINT_T)i );
-    }
-ABC_PRT( "Inverse ", clock() - clk );
-
-clk = clock();
-    // compute extended supports
-    Largest = 0;
-    vSuppsNew = Vec_PtrAlloc( Aig_ManPoNum(p) );
-    vOverNew  = Vec_IntAlloc( Aig_ManPoNum(p) );
-    vQuantNew = Vec_IntAlloc( Aig_ManPoNum(p) );
-//    pProgress = Bar_ProgressStart( stdout, Aig_ManPoNum(p) );
-    Aig_ManForEachPo( p, pObj, i )
-    {
-//        Bar_ProgressUpdate( pProgress, i, NULL );
-        // get old supports
-        vSup = Vec_VecEntryInt( vSupps, i );
-        if ( Vec_IntSize(vSup) < 2 )
-            continue;
-        // compute new supports
-        CountOver = CountQuant = 0;
-        vSupNew = Vec_IntDup( vSup );
-        // go through the nodes where the first var appears
-        Aig_ManForEachPo( p, pObj, k )
-//        iVar = Vec_IntEntry( vSup, 0 );
-//        vSupIn = Vec_VecEntry( vSuppsIn, iVar );
-//        Vec_IntForEachEntry( vSupIn, Entry, k )
-        {
-//            pObj = Aig_ManObj( p, Entry );
-            // get support of this output
-//            vSup2 = (Vec_Int_t *)pObj->pNext;
-            vSup2 = Vec_VecEntryInt( vSupps, k );
-            // count the number of common vars
-            nCommon = Vec_IntTwoCountCommon(vSup, vSup2);
-            if ( nCommon < 2 )
-                continue;
-            if ( nCommon > nComLim )
-            {
-                vSupNew = Vec_IntTwoMerge( vTemp = vSupNew, vSup2 );
-                Vec_IntFree( vTemp );
-                CountOver++;
-            }
-            else
-                CountQuant++;
-        }
-        // save the results
-        Vec_PtrPush( vSuppsNew, vSupNew );
-        Vec_IntPush( vOverNew, CountOver );
-        Vec_IntPush( vQuantNew, CountQuant );
-
-        if ( Largest < Vec_IntSize(vSupNew) )
-            Largest = Vec_IntSize(vSupNew);
-
-        nTotalSupp  += Vec_IntSize(vSup);
-        nTotalSupp2 += Vec_IntSize(vSupNew);
-        if ( Vec_IntSize(vSup) )
-            R = Vec_IntSize(vSupNew) / Vec_IntSize(vSup);
-        else
-            R = 0;
-        Ratio += R;
-
-        if ( R < 5.0 )
-            continue;
-
-        printf( "%6d : ", i );
-        printf( "S = %5d. ", Vec_IntSize(vSup) );
-        printf( "SNew = %5d. ", Vec_IntSize(vSupNew) );
-        printf( "R = %7.2f. ", R );
-        printf( "Over = %5d. ", CountOver );
-        printf( "Quant = %5d. ", CountQuant );
-        printf( "\n" );
-/*
-        Vec_IntForEachEntry( vSupNew, Entry, k )
-            printf( "%d ", Entry );
-        printf( "\n" );
-*/
-    }
-//    Bar_ProgressStop( pProgress );
-ABC_PRT( "Scanning", clock() - clk );
-
-    // print cumulative statistics
-    printf( "PIs = %6d. POs = %6d. Lim = %3d.   AveS = %3d. SN = %3d. R = %4.2f Max = %5d.\n",
-        Aig_ManPiNum(p), Aig_ManPoNum(p), nComLim,
-        nTotalSupp/Aig_ManPoNum(p), nTotalSupp2/Aig_ManPoNum(p),
-        Ratio/Aig_ManPoNum(p), Largest );
-
-    Vec_VecFree( vSupps );
-    Vec_VecFree( vSuppsIn );
-    Vec_VecFree( (Vec_Vec_t *)vSuppsNew );
-    Vec_IntFree( vOverNew );
-    Vec_IntFree( vQuantNew );
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_ManPartitionTest2( Aig_Man_t * p )
-{
-    Vec_Vec_t * vSupps, * vSuppsIn;
-    Vec_Int_t * vSup, * vSup2, * vSup3;
-    Aig_Obj_t * pObj;
-    int Entry, Entry2, Entry3, Counter;
-    int i, k, m, n, clk;
-    char * pSupp;
- 
-    // compute supports
-clk = clock();
-    vSupps = (Vec_Vec_t *)Aig_ManSupports( p );
-ABC_PRT( "Supports", clock() - clk );
-    // remove last entry
-    Aig_ManForEachPo( p, pObj, i )
-    {
-        vSup = Vec_VecEntryInt( vSupps, i );
-        Vec_IntPop( vSup );
-        // remember support
-//        pObj->pNext = (Aig_Obj_t *)vSup;
-    }
-
-    // create reverse supports
-clk = clock();
-    vSuppsIn = Vec_VecStart( Aig_ManPiNum(p) );
-    Aig_ManForEachPo( p, pObj, i )
-    {
-        if ( i == p->nAsserts )
-            break;
-        vSup = Vec_VecEntryInt( vSupps, i );
-        Vec_IntForEachEntry( vSup, Entry, k )
-            Vec_VecPush( vSuppsIn, Entry, (void *)(ABC_PTRUINT_T)i );
-    }
-ABC_PRT( "Inverse ", clock() - clk );
-
-    // create affective supports
-clk = clock();
-    pSupp = ABC_ALLOC( char, Aig_ManPiNum(p) );
-    Aig_ManForEachPo( p, pObj, i )
-    {
-        if ( i % 50 != 0 )
-            continue;
-        vSup = Vec_VecEntryInt( vSupps, i );
-        memset( pSupp, 0, sizeof(char) * Aig_ManPiNum(p) );
-        // go through each input of this output
-        Vec_IntForEachEntry( vSup, Entry, k )
-        {
-            pSupp[Entry] = 1;
-            vSup2 = Vec_VecEntryInt( vSuppsIn, Entry );
-            // go though each assert of this input
-            Vec_IntForEachEntry( vSup2, Entry2, m )
-            {
-                vSup3 = Vec_VecEntryInt( vSupps, Entry2 );
-                // go through each input of this assert
-                Vec_IntForEachEntry( vSup3, Entry3, n )
-                {
-                    pSupp[Entry3] = 1;
-                }
-            }
-        }
-        // count the entries
-        Counter = 0;
-        for ( m = 0; m < Aig_ManPiNum(p); m++ )
-            Counter += pSupp[m];
-        printf( "%d(%d) ", Vec_IntSize(vSup), Counter );
-    }
-    printf( "\n" );
-ABC_PRT( "Extension ", clock() - clk );
-
-    ABC_FREE( pSupp );
-    Vec_VecFree( vSupps );
-    Vec_VecFree( vSuppsIn );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraSat.c b/src/aig/fra/fraSat.c
deleted file mode 100644
index 78d25c37..00000000
--- a/src/aig/fra/fraSat.c
+++ /dev/null
@@ -1,566 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraSat.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraSat.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include <math.h>
-#include "fra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static int Fra_SetActivityFactors( Fra_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Runs equivalence test for the two nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_NodesAreEquiv( Fra_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew )
-{
-    int pLits[4], RetValue, RetValue1, nBTLimit, clk;//, clk2 = clock();
-    int status;
-
-    // make sure the nodes are not complemented
-    assert( !Aig_IsComplement(pNew) );
-    assert( !Aig_IsComplement(pOld) );
-    assert( pNew != pOld );
-
-    // if at least one of the nodes is a failed node, perform adjustments:
-    // if the backtrack limit is small, simply skip this node
-    // if the backtrack limit is > 10, take the quare root of the limit
-    nBTLimit = p->pPars->nBTLimitNode;
-    if ( !p->pPars->fSpeculate && p->pPars->nFramesK == 0 && (nBTLimit > 0 && (pOld->fMarkB || pNew->fMarkB)) )
-    {
-        p->nSatFails++;
-        // fail immediately
-//        return -1;
-        if ( nBTLimit <= 10 )
-            return -1;
-        nBTLimit = (int)pow(nBTLimit, 0.7);
-    }
-
-    p->nSatCalls++;
-    p->nSatCallsRecent++;
-
-    // make sure the solver is allocated and has enough variables
-    if ( p->pSat == NULL )
-    {
-        p->pSat = sat_solver_new();
-        p->nSatVars = 1;
-        sat_solver_setnvars( p->pSat, 1000 );
-        // var 0 is reserved for const1 node - add the clause
-        pLits[0] = toLit( 0 );
-        sat_solver_addclause( p->pSat, pLits, pLits + 1 );
-    }
-
-    // if the nodes do not have SAT variables, allocate them
-    Fra_CnfNodeAddToSolver( p, pOld, pNew );
-
-    if ( p->pSat->qtail != p->pSat->qhead )
-    {
-        status = sat_solver_simplify(p->pSat);
-        assert( status != 0 );
-        assert( p->pSat->qtail == p->pSat->qhead );
-    }
-
-    // prepare variable activity
-    if ( p->pPars->fConeBias )
-        Fra_SetActivityFactors( p, pOld, pNew ); 
-
-    // solve under assumptions
-    // A = 1; B = 0     OR     A = 1; B = 1 
-clk = clock();
-    pLits[0] = toLitCond( Fra_ObjSatNum(pOld), 0 );
-    pLits[1] = toLitCond( Fra_ObjSatNum(pNew), pOld->fPhase == pNew->fPhase );
-//Sat_SolverWriteDimacs( p->pSat, "temp.cnf", pLits, pLits + 2, 1 );
-    RetValue1 = sat_solver_solve( p->pSat, pLits, pLits + 2, 
-        (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, 
-        p->nBTLimitGlobal, p->nInsLimitGlobal );
-p->timeSat += clock() - clk;
-    if ( RetValue1 == l_False )
-    {
-p->timeSatUnsat += clock() - clk;
-        pLits[0] = lit_neg( pLits[0] );
-        pLits[1] = lit_neg( pLits[1] );
-        RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-        assert( RetValue );
-        // continue solving the other implication
-        p->nSatCallsUnsat++;
-    }
-    else if ( RetValue1 == l_True )
-    {
-p->timeSatSat += clock() - clk;
-        Fra_SmlSavePattern( p );
-        p->nSatCallsSat++;
-        return 0;
-    }
-    else // if ( RetValue1 == l_Undef )
-    {
-p->timeSatFail += clock() - clk;
-        // mark the node as the failed node
-        if ( pOld != p->pManFraig->pConst1 ) 
-            pOld->fMarkB = 1;
-        pNew->fMarkB = 1;
-        p->nSatFailsReal++;
-        return -1;
-    }
-
-    // if the old node was constant 0, we already know the answer
-    if ( pOld == p->pManFraig->pConst1 )
-    {
-        p->nSatProof++;
-        return 1;
-    }
-
-    // solve under assumptions
-    // A = 0; B = 1     OR     A = 0; B = 0 
-clk = clock();
-    pLits[0] = toLitCond( Fra_ObjSatNum(pOld), 1 );
-    pLits[1] = toLitCond( Fra_ObjSatNum(pNew), pOld->fPhase ^ pNew->fPhase );
-    RetValue1 = sat_solver_solve( p->pSat, pLits, pLits + 2, 
-        (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, 
-        p->nBTLimitGlobal, p->nInsLimitGlobal );
-p->timeSat += clock() - clk;
-    if ( RetValue1 == l_False )
-    {
-p->timeSatUnsat += clock() - clk;
-        pLits[0] = lit_neg( pLits[0] );
-        pLits[1] = lit_neg( pLits[1] );
-        RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-        assert( RetValue );
-        p->nSatCallsUnsat++;
-    }
-    else if ( RetValue1 == l_True )
-    {
-p->timeSatSat += clock() - clk;
-        Fra_SmlSavePattern( p );
-        p->nSatCallsSat++;
-        return 0;
-    }
-    else // if ( RetValue1 == l_Undef )
-    {
-p->timeSatFail += clock() - clk;
-        // mark the node as the failed node
-        pOld->fMarkB = 1;
-        pNew->fMarkB = 1;
-        p->nSatFailsReal++;
-        return -1;
-    }
-/*
-    // check BDD proof
-    {
-        int RetVal;
-        ABC_PRT( "Sat", clock() - clk2 );
-        clk2 = clock();
-        RetVal = Fra_NodesAreEquivBdd( pOld, pNew );
-//        printf( "%d ", RetVal );
-        assert( RetVal );
-        ABC_PRT( "Bdd", clock() - clk2 );
-        printf( "\n" );
-    }
-*/
-    // return SAT proof
-    p->nSatProof++;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Runs the result of test for pObj => pNew.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_NodesAreImp( Fra_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew, int fComplL, int fComplR )
-{
-    int pLits[4], RetValue, RetValue1, nBTLimit, clk;//, clk2 = clock();
-    int status;
-
-    // make sure the nodes are not complemented
-    assert( !Aig_IsComplement(pNew) );
-    assert( !Aig_IsComplement(pOld) );
-    assert( pNew != pOld );
-
-    // if at least one of the nodes is a failed node, perform adjustments:
-    // if the backtrack limit is small, simply skip this node
-    // if the backtrack limit is > 10, take the quare root of the limit
-    nBTLimit = p->pPars->nBTLimitNode;
-/*
-    if ( !p->pPars->fSpeculate && p->pPars->nFramesK == 0 && (nBTLimit > 0 && (pOld->fMarkB || pNew->fMarkB)) )
-    {
-        p->nSatFails++;
-        // fail immediately
-//        return -1;
-        if ( nBTLimit <= 10 )
-            return -1;
-        nBTLimit = (int)pow(nBTLimit, 0.7);
-    }
-*/
-    p->nSatCalls++;
-
-    // make sure the solver is allocated and has enough variables
-    if ( p->pSat == NULL )
-    {
-        p->pSat = sat_solver_new();
-        p->nSatVars = 1;
-        sat_solver_setnvars( p->pSat, 1000 );
-        // var 0 is reserved for const1 node - add the clause
-        pLits[0] = toLit( 0 );
-        sat_solver_addclause( p->pSat, pLits, pLits + 1 );
-    }
-
-    // if the nodes do not have SAT variables, allocate them
-    Fra_CnfNodeAddToSolver( p, pOld, pNew );
-
-    if ( p->pSat->qtail != p->pSat->qhead )
-    {
-        status = sat_solver_simplify(p->pSat);
-        assert( status != 0 );
-        assert( p->pSat->qtail == p->pSat->qhead );
-    }
-
-    // prepare variable activity
-    if ( p->pPars->fConeBias )
-        Fra_SetActivityFactors( p, pOld, pNew ); 
-
-    // solve under assumptions
-    // A = 1; B = 0     OR     A = 1; B = 1 
-clk = clock();
-//    pLits[0] = toLitCond( Fra_ObjSatNum(pOld), 0 );
-//    pLits[1] = toLitCond( Fra_ObjSatNum(pNew), pOld->fPhase == pNew->fPhase );
-    pLits[0] = toLitCond( Fra_ObjSatNum(pOld),  fComplL );
-    pLits[1] = toLitCond( Fra_ObjSatNum(pNew), !fComplR );
-//Sat_SolverWriteDimacs( p->pSat, "temp.cnf", pLits, pLits + 2, 1 );
-    RetValue1 = sat_solver_solve( p->pSat, pLits, pLits + 2, 
-        (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, 
-        p->nBTLimitGlobal, p->nInsLimitGlobal );
-p->timeSat += clock() - clk;
-    if ( RetValue1 == l_False )
-    {
-p->timeSatUnsat += clock() - clk;
-        pLits[0] = lit_neg( pLits[0] );
-        pLits[1] = lit_neg( pLits[1] );
-        RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-        assert( RetValue );
-        // continue solving the other implication
-        p->nSatCallsUnsat++;
-    }
-    else if ( RetValue1 == l_True )
-    {
-p->timeSatSat += clock() - clk;
-        Fra_SmlSavePattern( p );
-        p->nSatCallsSat++;
-        return 0;
-    }
-    else // if ( RetValue1 == l_Undef )
-    {
-p->timeSatFail += clock() - clk;
-        // mark the node as the failed node
-        if ( pOld != p->pManFraig->pConst1 ) 
-            pOld->fMarkB = 1;
-        pNew->fMarkB = 1;
-        p->nSatFailsReal++;
-        return -1;
-    }
-    // return SAT proof
-    p->nSatProof++;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Runs the result of test for pObj => pNew.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_NodesAreClause( Fra_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew, int fComplL, int fComplR )
-{
-    int pLits[4], RetValue, RetValue1, nBTLimit, clk;//, clk2 = clock();
-    int status;
-
-    // make sure the nodes are not complemented
-    assert( !Aig_IsComplement(pNew) );
-    assert( !Aig_IsComplement(pOld) );
-    assert( pNew != pOld );
-
-    // if at least one of the nodes is a failed node, perform adjustments:
-    // if the backtrack limit is small, simply skip this node
-    // if the backtrack limit is > 10, take the quare root of the limit
-    nBTLimit = p->pPars->nBTLimitNode;
-/*
-    if ( !p->pPars->fSpeculate && p->pPars->nFramesK == 0 && (nBTLimit > 0 && (pOld->fMarkB || pNew->fMarkB)) )
-    {
-        p->nSatFails++;
-        // fail immediately
-//        return -1;
-        if ( nBTLimit <= 10 )
-            return -1;
-        nBTLimit = (int)pow(nBTLimit, 0.7);
-    }
-*/
-    p->nSatCalls++;
-
-    // make sure the solver is allocated and has enough variables
-    if ( p->pSat == NULL )
-    {
-        p->pSat = sat_solver_new();
-        p->nSatVars = 1;
-        sat_solver_setnvars( p->pSat, 1000 );
-        // var 0 is reserved for const1 node - add the clause
-        pLits[0] = toLit( 0 );
-        sat_solver_addclause( p->pSat, pLits, pLits + 1 );
-    }
-
-    // if the nodes do not have SAT variables, allocate them
-    Fra_CnfNodeAddToSolver( p, pOld, pNew );
-
-    if ( p->pSat->qtail != p->pSat->qhead )
-    {
-        status = sat_solver_simplify(p->pSat);
-        assert( status != 0 );
-        assert( p->pSat->qtail == p->pSat->qhead );
-    }
-
-    // prepare variable activity
-    if ( p->pPars->fConeBias )
-        Fra_SetActivityFactors( p, pOld, pNew ); 
-
-    // solve under assumptions
-    // A = 1; B = 0     OR     A = 1; B = 1 
-clk = clock();
-//    pLits[0] = toLitCond( Fra_ObjSatNum(pOld), 0 );
-//    pLits[1] = toLitCond( Fra_ObjSatNum(pNew), pOld->fPhase == pNew->fPhase );
-    pLits[0] = toLitCond( Fra_ObjSatNum(pOld), !fComplL );
-    pLits[1] = toLitCond( Fra_ObjSatNum(pNew), !fComplR );
-//Sat_SolverWriteDimacs( p->pSat, "temp.cnf", pLits, pLits + 2, 1 );
-    RetValue1 = sat_solver_solve( p->pSat, pLits, pLits + 2, 
-        (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, 
-        p->nBTLimitGlobal, p->nInsLimitGlobal );
-p->timeSat += clock() - clk;
-    if ( RetValue1 == l_False )
-    {
-p->timeSatUnsat += clock() - clk;
-        pLits[0] = lit_neg( pLits[0] );
-        pLits[1] = lit_neg( pLits[1] );
-        RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-        assert( RetValue );
-        // continue solving the other implication
-        p->nSatCallsUnsat++;
-    }
-    else if ( RetValue1 == l_True )
-    {
-p->timeSatSat += clock() - clk;
-        Fra_SmlSavePattern( p );
-        p->nSatCallsSat++;
-        return 0;
-    }
-    else // if ( RetValue1 == l_Undef )
-    {
-p->timeSatFail += clock() - clk;
-        // mark the node as the failed node
-        if ( pOld != p->pManFraig->pConst1 ) 
-            pOld->fMarkB = 1;
-        pNew->fMarkB = 1;
-        p->nSatFailsReal++;
-        return -1;
-    }
-    // return SAT proof
-    p->nSatProof++;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Runs equivalence test for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_NodeIsConst( Fra_Man_t * p, Aig_Obj_t * pNew )
-{
-    int pLits[2], RetValue1, RetValue, clk;
-
-    // make sure the nodes are not complemented
-    assert( !Aig_IsComplement(pNew) );
-    assert( pNew != p->pManFraig->pConst1 );
-    p->nSatCalls++;
-
-    // make sure the solver is allocated and has enough variables
-    if ( p->pSat == NULL )
-    {
-        p->pSat = sat_solver_new();
-        p->nSatVars = 1;
-        sat_solver_setnvars( p->pSat, 1000 );
-        // var 0 is reserved for const1 node - add the clause
-        pLits[0] = toLit( 0 );
-        sat_solver_addclause( p->pSat, pLits, pLits + 1 );
-    }
-
-    // if the nodes do not have SAT variables, allocate them
-    Fra_CnfNodeAddToSolver( p, NULL, pNew );
-
-    // prepare variable activity
-    if ( p->pPars->fConeBias )
-        Fra_SetActivityFactors( p, NULL, pNew ); 
-
-    // solve under assumptions
-clk = clock();
-    pLits[0] = toLitCond( Fra_ObjSatNum(pNew), pNew->fPhase );
-    RetValue1 = sat_solver_solve( p->pSat, pLits, pLits + 1, 
-        (ABC_INT64_T)p->pPars->nBTLimitMiter, (ABC_INT64_T)0, 
-        p->nBTLimitGlobal, p->nInsLimitGlobal );
-p->timeSat += clock() - clk;
-    if ( RetValue1 == l_False )
-    {
-p->timeSatUnsat += clock() - clk;
-        pLits[0] = lit_neg( pLits[0] );
-        RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 1 );
-        assert( RetValue );
-        // continue solving the other implication
-        p->nSatCallsUnsat++;
-    }
-    else if ( RetValue1 == l_True )
-    {
-p->timeSatSat += clock() - clk;
-        if ( p->pPatWords )
-            Fra_SmlSavePattern( p );
-        p->nSatCallsSat++;
-        return 0;
-    }
-    else // if ( RetValue1 == l_Undef )
-    {
-p->timeSatFail += clock() - clk;
-        // mark the node as the failed node
-        pNew->fMarkB = 1;
-        p->nSatFailsReal++;
-        return -1;
-    }
-
-    // return SAT proof
-    p->nSatProof++;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sets variable activities in the cone.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_SetActivityFactors_rec( Fra_Man_t * p, Aig_Obj_t * pObj, int LevelMin, int LevelMax )
-{
-    Vec_Ptr_t * vFanins;
-    Aig_Obj_t * pFanin;
-    int i, Counter = 0;
-    assert( !Aig_IsComplement(pObj) );
-    assert( Fra_ObjSatNum(pObj) );
-    // skip visited variables
-    if ( Aig_ObjIsTravIdCurrent(p->pManFraig, pObj) )
-        return 0;
-    Aig_ObjSetTravIdCurrent(p->pManFraig, pObj);
-    // add the PI to the list
-    if ( pObj->Level <= (unsigned)LevelMin || Aig_ObjIsPi(pObj) )
-        return 0;
-    // set the factor of this variable
-    // (LevelMax-LevelMin) / (pObj->Level-LevelMin) = p->pPars->dActConeBumpMax / ThisBump
-    if ( p->pSat->factors == NULL )
-        p->pSat->factors = ABC_CALLOC( double, p->pSat->size );
-    p->pSat->factors[Fra_ObjSatNum(pObj)] = p->pPars->dActConeBumpMax * (pObj->Level - LevelMin)/(LevelMax - LevelMin);
-    veci_push(&p->pSat->act_vars, Fra_ObjSatNum(pObj));
-    // explore the fanins
-    vFanins = Fra_ObjFaninVec( pObj );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vFanins, pFanin, i )
-        Counter += Fra_SetActivityFactors_rec( p, Aig_Regular(pFanin), LevelMin, LevelMax );
-    return 1 + Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sets variable activities in the cone.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_SetActivityFactors( Fra_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew )
-{
-    int clk, LevelMin, LevelMax;
-    assert( pOld || pNew );
-clk = clock(); 
-    // reset the active variables
-    veci_resize(&p->pSat->act_vars, 0);
-    // prepare for traversal
-    Aig_ManIncrementTravId( p->pManFraig );
-    // determine the min and max level to visit
-    assert( p->pPars->dActConeRatio > 0 && p->pPars->dActConeRatio < 1 );
-    LevelMax = ABC_MAX( (pNew ? pNew->Level : 0), (pOld ? pOld->Level : 0) );
-    LevelMin = (int)(LevelMax * (1.0 - p->pPars->dActConeRatio));
-    // traverse
-    if ( pOld && !Aig_ObjIsConst1(pOld) )
-        Fra_SetActivityFactors_rec( p, pOld, LevelMin, LevelMax );
-    if ( pNew && !Aig_ObjIsConst1(pNew) )
-        Fra_SetActivityFactors_rec( p, pNew, LevelMin, LevelMax );
-//Fra_PrintActivity( p );
-p->timeTrav += clock() - clk;
-    return 1;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraSec.c b/src/aig/fra/fraSec.c
deleted file mode 100644
index 3b28936d..00000000
--- a/src/aig/fra/fraSec.c
+++ /dev/null
@@ -1,696 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraSec.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    [Performs SEC based on seq sweeping.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraSec.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-#include "ioa.h"
-#include "int.h"
-#include "ssw.h"
-#include "saig.h"
-#include "bbr.h"
-#include "pdr.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SecSetDefaultParams( Fra_Sec_t * p )
-{
-    memset( p, 0, sizeof(Fra_Sec_t) );
-    p->fTryComb          =       1;  // try CEC call as a preprocessing step
-    p->fTryBmc           =       1;  // try BMC call as a preprocessing step 
-    p->nFramesMax        =       4;  // the max number of frames used for induction
-    p->nBTLimit          =    1000;  // conflict limit at a node during induction 
-    p->nBTLimitGlobal    = 5000000;  // global conflict limit during induction
-    p->nBTLimitInter     =   10000;  // conflict limit during interpolation
-    p->nBddVarsMax       =     150;  // the limit on the number of registers in BDD reachability
-    p->nBddMax           =   50000;  // the limit on the number of BDD nodes 
-    p->nBddIterMax       = 1000000;  // the limit on the number of BDD iterations
-    p->fPhaseAbstract    =       0;  // enables phase abstraction
-    p->fRetimeFirst      =       1;  // enables most-forward retiming at the beginning
-    p->fRetimeRegs       =       1;  // enables min-register retiming at the beginning
-    p->fFraiging         =       1;  // enables fraiging at the beginning
-    p->fInduction        =       1;  // enables the use of induction (signal correspondence)
-    p->fInterpolation    =       1;  // enables interpolation
-    p->fInterSeparate    =       0;  // enables interpolation for each outputs separately
-    p->fReachability     =       1;  // enables BDD based reachability
-    p->fReorderImage     =       1;  // enables variable reordering during image computation
-    p->fStopOnFirstFail  =       1;  // enables stopping after first output of a miter has failed to prove
-    p->fUseNewProver     =       0;  // enables new prover
-    p->fUsePdr           =       1;  // enables PDR
-    p->nPdrTimeout       =      60;  // enabled PDR timeout
-    p->fSilent           =       0;  // disables all output
-    p->fVerbose          =       0;  // enables verbose reporting of statistics
-    p->fVeryVerbose      =       0;  // enables very verbose reporting  
-    p->TimeLimit         =       0;  // enables the timeout
-    // internal parameters
-    p->fReportSolution   =       0;  // enables specialized format for reporting solution
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_FraigSec( Aig_Man_t * p, Fra_Sec_t * pParSec, Aig_Man_t ** ppResult )
-{
-    Ssw_Pars_t Pars2, * pPars2 = &Pars2;
-    Fra_Ssw_t Pars, * pPars = &Pars;
-    Fra_Sml_t * pSml;
-    Aig_Man_t * pNew, * pTemp;
-    int nFrames, RetValue, nIter, clk, clkTotal = clock();
-    int TimeOut = 0;
-    int fLatchCorr = 0;
-    float TimeLeft = 0.0;
-    pParSec->nSMnumber = -1;
-
-    // try the miter before solving
-    pNew = Aig_ManDupSimple( p );
-    RetValue = Fra_FraigMiterStatus( pNew );
-    if ( RetValue >= 0 )
-        goto finish;
-
-    // prepare parameters
-    memset( pPars, 0, sizeof(Fra_Ssw_t) );
-    pPars->fLatchCorr  = fLatchCorr;
-    pPars->fVerbose = pParSec->fVeryVerbose;
-    if ( pParSec->fVerbose )
-    {
-        printf( "Original miter:       Latches = %5d. Nodes = %6d.\n", 
-            Aig_ManRegNum(pNew), Aig_ManNodeNum(pNew) );
-    }
-//Aig_ManDumpBlif( pNew, "after.blif", NULL, NULL );
-
-    // perform sequential cleanup
-clk = clock();
-    if ( pNew->nRegs )
-    pNew = Aig_ManReduceLaches( pNew, 0 );
-    if ( pNew->nRegs )
-    pNew = Aig_ManConstReduce( pNew, 0, -1, -1, 0, 0 );
-    if ( pParSec->fVerbose )
-    {
-        printf( "Sequential cleanup:   Latches = %5d. Nodes = %6d. ", 
-            Aig_ManRegNum(pNew), Aig_ManNodeNum(pNew) );
-ABC_PRT( "Time", clock() - clk );
-    }
-    RetValue = Fra_FraigMiterStatus( pNew );
-    if ( RetValue >= 0 )
-        goto finish;
-
-    // perform phase abstraction
-clk = clock();
-    if ( pParSec->fPhaseAbstract )
-    {
-        extern Aig_Man_t * Saig_ManPhaseAbstractAuto( Aig_Man_t * p, int fVerbose );
-        pNew->nTruePis = Aig_ManPiNum(pNew) - Aig_ManRegNum(pNew); 
-        pNew->nTruePos = Aig_ManPoNum(pNew) - Aig_ManRegNum(pNew); 
-        pNew = Saig_ManPhaseAbstractAuto( pTemp = pNew, 0 );
-        Aig_ManStop( pTemp );
-        if ( pParSec->fVerbose )
-        {
-            printf( "Phase abstraction:    Latches = %5d. Nodes = %6d. ", 
-                Aig_ManRegNum(pNew), Aig_ManNodeNum(pNew) );
-ABC_PRT( "Time", clock() - clk );
-        }
-    }
-
-    // perform forward retiming
-    if ( pParSec->fRetimeFirst && pNew->nRegs )
-    {
-clk = clock();
-//    pNew = Rtm_ManRetime( pTemp = pNew, 1, 1000, 0 );
-    pNew = Saig_ManRetimeForward( pTemp = pNew, 100, 0 );
-    Aig_ManStop( pTemp );
-    if ( pParSec->fVerbose )
-    {
-        printf( "Forward retiming:     Latches = %5d. Nodes = %6d. ", 
-            Aig_ManRegNum(pNew), Aig_ManNodeNum(pNew) );
-ABC_PRT( "Time", clock() - clk );
-    }
-    }
-     
-    // run latch correspondence
-clk = clock();
-    if ( pNew->nRegs )
-    {
-    pNew = Aig_ManDupOrdered( pTemp = pNew );
-//    pNew = Aig_ManDupDfs( pTemp = pNew );
-    Aig_ManStop( pTemp );
-/*
-    if ( RetValue == -1 && pParSec->TimeLimit )
-    {
-        TimeLeft = (float)pParSec->TimeLimit - ((float)(clock()-clkTotal)/(float)(CLOCKS_PER_SEC));
-        TimeLeft = ABC_MAX( TimeLeft, 0.0 );
-        if ( TimeLeft == 0.0 )
-        {
-            if ( !pParSec->fSilent )
-                printf( "Runtime limit exceeded.\n" );
-            RetValue = -1;
-            TimeOut = 1;
-            goto finish;
-        }
-    }
-*/
-
-//    pNew = Fra_FraigLatchCorrespondence( pTemp = pNew, 0, 1000, 1, pParSec->fVeryVerbose, &nIter, TimeLeft );
-//Aig_ManDumpBlif( pNew, "ex.blif", NULL, NULL );
-    Ssw_ManSetDefaultParamsLcorr( pPars2 );
-    pNew = Ssw_LatchCorrespondence( pTemp = pNew, pPars2 );
-    nIter = pPars2->nIters;
-
-    // prepare parameters for scorr
-    Ssw_ManSetDefaultParams( pPars2 );
-
-    if ( pTemp->pSeqModel )
-    {
-        if ( !Saig_ManVerifyCex( pTemp, pTemp->pSeqModel ) )
-            printf( "Fra_FraigSec(): Counter-example verification has FAILED.\n" );
-        if ( Saig_ManPiNum(p) != Saig_ManPiNum(pTemp) )
-            printf( "The counter-example is invalid because of phase abstraction.\n" );
-        else
-        {
-        ABC_FREE( p->pSeqModel );
-        p->pSeqModel = Abc_CexDup( pTemp->pSeqModel, Aig_ManRegNum(p) );
-        ABC_FREE( pTemp->pSeqModel );
-        }
-    }
-    if ( pNew == NULL )
-    {
-        if ( p->pSeqModel )
-        {
-            RetValue = 0;
-            if ( !pParSec->fSilent )
-            {
-                printf( "Networks are NOT EQUIVALENT after simulation.   " );
-ABC_PRT( "Time", clock() - clkTotal );
-            }
-            if ( pParSec->fReportSolution && !pParSec->fRecursive )
-            {
-            printf( "SOLUTION: FAIL       " );
-ABC_PRT( "Time", clock() - clkTotal );
-            }
-            Aig_ManStop( pTemp );
-            return RetValue;
-        }
-        pNew = pTemp;
-        RetValue = -1;
-        TimeOut = 1;
-        goto finish;
-    }
-    Aig_ManStop( pTemp );
-
-    if ( pParSec->fVerbose )
-    {
-        printf( "Latch-corr (I=%3d):   Latches = %5d. Nodes = %6d. ", 
-            nIter, Aig_ManRegNum(pNew), Aig_ManNodeNum(pNew) );
-ABC_PRT( "Time", clock() - clk );
-    }
-    }
-/*
-    if ( RetValue == -1 && pParSec->TimeLimit )
-    {
-        TimeLeft = (float)pParSec->TimeLimit - ((float)(clock()-clkTotal)/(float)(CLOCKS_PER_SEC));
-        TimeLeft = ABC_MAX( TimeLeft, 0.0 );
-        if ( TimeLeft == 0.0 )
-        {
-            if ( !pParSec->fSilent )
-                printf( "Runtime limit exceeded.\n" );
-            RetValue = -1;
-            TimeOut = 1;
-            goto finish;
-        }
-    }
-*/
-    // perform fraiging
-    if ( pParSec->fFraiging )
-    {
-clk = clock();
-    pNew = Fra_FraigEquivence( pTemp = pNew, 100, 0 );
-    Aig_ManStop( pTemp );
-    if ( pParSec->fVerbose )
-    {
-        printf( "Fraiging:             Latches = %5d. Nodes = %6d. ", 
-            Aig_ManRegNum(pNew), Aig_ManNodeNum(pNew) );
-ABC_PRT( "Time", clock() - clk );
-    }
-    }
-
-    if ( pNew->nRegs == 0 )
-        RetValue = Fra_FraigCec( &pNew, 100000, 0 );
-
-    RetValue = Fra_FraigMiterStatus( pNew );
-    if ( RetValue >= 0 )
-        goto finish;
-/*
-    if ( RetValue == -1 && pParSec->TimeLimit )
-    {
-        TimeLeft = (float)pParSec->TimeLimit - ((float)(clock()-clkTotal)/(float)(CLOCKS_PER_SEC));
-        TimeLeft = ABC_MAX( TimeLeft, 0.0 );
-        if ( TimeLeft == 0.0 )
-        {
-            if ( !pParSec->fSilent )
-                printf( "Runtime limit exceeded.\n" );
-            RetValue = -1;
-            TimeOut = 1;
-            goto finish;
-        }
-    }
-*/
-    // perform min-area retiming
-    if ( pParSec->fRetimeRegs && pNew->nRegs )
-    {
-//    extern Aig_Man_t * Saig_ManRetimeMinArea( Aig_Man_t * p, int nMaxIters, int fForwardOnly, int fBackwardOnly, int fInitial, int fVerbose );
-clk = clock();
-    pNew->nTruePis = Aig_ManPiNum(pNew) - Aig_ManRegNum(pNew); 
-    pNew->nTruePos = Aig_ManPoNum(pNew) - Aig_ManRegNum(pNew); 
-//        pNew = Rtm_ManRetime( pTemp = pNew, 1, 1000, 0 );
-    pNew = Saig_ManRetimeMinArea( pTemp = pNew, 1000, 0, 0, 1, 0 );
-    Aig_ManStop( pTemp );
-    pNew = Aig_ManDupOrdered( pTemp = pNew );
-    Aig_ManStop( pTemp );
-    if ( pParSec->fVerbose )
-    {
-    printf( "Min-reg retiming:     Latches = %5d. Nodes = %6d. ", 
-        Aig_ManRegNum(pNew), Aig_ManNodeNum(pNew) );
-ABC_PRT( "Time", clock() - clk );
-    }
-    }
-
-    // perform seq sweeping while increasing the number of frames
-    RetValue = Fra_FraigMiterStatus( pNew );
-    if ( RetValue == -1 && pParSec->fInduction )
-    for ( nFrames = 1; nFrames <= pParSec->nFramesMax; nFrames *= 2 )
-    {
-/*
-        if ( RetValue == -1 && pParSec->TimeLimit )
-        {
-            TimeLeft = (float)pParSec->TimeLimit - ((float)(clock()-clkTotal)/(float)(CLOCKS_PER_SEC));
-            TimeLeft = ABC_MAX( TimeLeft, 0.0 );
-            if ( TimeLeft == 0.0 )
-            {
-                if ( !pParSec->fSilent )
-                    printf( "Runtime limit exceeded.\n" );
-                RetValue = -1;
-                TimeOut = 1;
-                goto finish;
-            }
-        }
-*/ 
-
-clk = clock();
-        pPars->nFramesK = nFrames;
-        pPars->TimeLimit = TimeLeft;
-        pPars->fSilent = pParSec->fSilent;
-//        pNew = Fra_FraigInduction( pTemp = pNew, pPars );
-
-        pPars2->nFramesK = nFrames;
-        pPars2->nBTLimit = pParSec->nBTLimit;
-        pPars2->nBTLimitGlobal = pParSec->nBTLimitGlobal;
-//        pPars2->nBTLimit = 1000 * nFrames;
-
-        if ( RetValue == -1 && pPars2->nConflicts > pPars2->nBTLimitGlobal )
-        {
-            if ( !pParSec->fSilent )
-                printf( "Global conflict limit (%d) exceeded.\n", pPars2->nBTLimitGlobal );
-            RetValue = -1;
-            TimeOut = 1;
-            goto finish;
-        }
-
-        Aig_ManSetRegNum( pNew, pNew->nRegs );
-//        pNew = Ssw_SignalCorrespondence( pTemp = pNew, pPars2 );
-        if ( Aig_ManRegNum(pNew) > 0 )
-            pNew = Ssw_SignalCorrespondence( pTemp = pNew, pPars2 );
-        else
-            pNew = Aig_ManDupSimpleDfs( pTemp = pNew );
-
-        if ( pNew == NULL )
-        {
-            pNew = pTemp;
-            RetValue = -1;
-            TimeOut = 1;
-            goto finish;
-        }
-
-//        printf( "Total conflicts = %d.\n", pPars2->nConflicts );
-
-        Aig_ManStop( pTemp );
-        RetValue = Fra_FraigMiterStatus( pNew );
-        if ( pParSec->fVerbose )
-        { 
-            printf( "K-step (K=%2d,I=%3d):  Latches = %5d. Nodes = %6d. ", 
-                nFrames, pPars2->nIters, Aig_ManRegNum(pNew), Aig_ManNodeNum(pNew) );
-ABC_PRT( "Time", clock() - clk );
-        }
-        if ( RetValue != -1 )
-            break;
-
-        // perform retiming
-//        if ( pParSec->fRetimeFirst && pNew->nRegs )
-        if ( pNew->nRegs )
-        {
-//        extern Aig_Man_t * Saig_ManRetimeMinArea( Aig_Man_t * p, int nMaxIters, int fForwardOnly, int fBackwardOnly, int fInitial, int fVerbose );
-clk = clock();
-        pNew->nTruePis = Aig_ManPiNum(pNew) - Aig_ManRegNum(pNew); 
-        pNew->nTruePos = Aig_ManPoNum(pNew) - Aig_ManRegNum(pNew); 
-//        pNew = Rtm_ManRetime( pTemp = pNew, 1, 1000, 0 );
-        pNew = Saig_ManRetimeMinArea( pTemp = pNew, 1000, 0, 0, 1, 0 );
-        Aig_ManStop( pTemp );
-        pNew = Aig_ManDupOrdered( pTemp = pNew );
-        Aig_ManStop( pTemp );
-        if ( pParSec->fVerbose )
-        {
-            printf( "Min-reg retiming:     Latches = %5d. Nodes = %6d. ", 
-                Aig_ManRegNum(pNew), Aig_ManNodeNum(pNew) );
-ABC_PRT( "Time", clock() - clk );
-        }
-        }  
-
-        if ( pNew->nRegs )
-            pNew = Aig_ManConstReduce( pNew, 0, -1, -1, 0, 0 );
-
-        // perform rewriting
-clk = clock();
-        pNew = Aig_ManDupOrdered( pTemp = pNew );
-        Aig_ManStop( pTemp );
-//        pNew = Dar_ManRewriteDefault( pTemp = pNew );
-        pNew = Dar_ManCompress2( pTemp = pNew, 1, 0, 1, 0, 0 ); 
-        Aig_ManStop( pTemp );
-        if ( pParSec->fVerbose )
-        {
-            printf( "Rewriting:            Latches = %5d. Nodes = %6d. ", 
-                Aig_ManRegNum(pNew), Aig_ManNodeNum(pNew) );
-ABC_PRT( "Time", clock() - clk );
-        } 
-
-        // perform sequential simulation
-        if ( pNew->nRegs )
-        {
-clk = clock();
-        pSml = Fra_SmlSimulateSeq( pNew, 0, 128 * nFrames, 1 + 16/(1+Aig_ManNodeNum(pNew)/1000), 1  ); 
-        if ( pParSec->fVerbose )
-        {
-            printf( "Seq simulation  :     Latches = %5d. Nodes = %6d. ", 
-                Aig_ManRegNum(pNew), Aig_ManNodeNum(pNew) );
-ABC_PRT( "Time", clock() - clk );
-        }
-        if ( pSml->fNonConstOut )
-        {
-            pNew->pSeqModel = Fra_SmlGetCounterExample( pSml );
-            // transfer to the original manager
-            if ( Saig_ManPiNum(p) != Saig_ManPiNum(pNew) )
-                printf( "The counter-example is invalid because of phase abstraction.\n" );
-            else
-            {
-            ABC_FREE( p->pSeqModel );
-            p->pSeqModel = Abc_CexDup( pNew->pSeqModel, Aig_ManRegNum(p) );
-            ABC_FREE( pNew->pSeqModel );
-            }
-
-            Fra_SmlStop( pSml );
-            Aig_ManStop( pNew );
-            RetValue = 0;
-            if ( !pParSec->fSilent )
-            {
-                printf( "Networks are NOT EQUIVALENT after simulation.   " );
-ABC_PRT( "Time", clock() - clkTotal );
-            }
-            if ( pParSec->fReportSolution && !pParSec->fRecursive )
-            {
-            printf( "SOLUTION: FAIL       " );
-ABC_PRT( "Time", clock() - clkTotal );
-            }
-            return RetValue;
-        }
-        Fra_SmlStop( pSml );
-        }
-    }
-
-    // get the miter status
-    RetValue = Fra_FraigMiterStatus( pNew );
-
-    // try interplation
-clk = clock();
-    Aig_ManSetRegNum( pNew, Aig_ManRegNum(pNew) );
-    if ( pParSec->fInterpolation && RetValue == -1 && Aig_ManRegNum(pNew) > 0 )
-    {
-        Inter_ManParams_t Pars, * pPars = &Pars;
-        int Depth;
-        ABC_FREE( pNew->pSeqModel );
-        Inter_ManSetDefaultParams( pPars );
-//        pPars->nBTLimit = 100;
-        pPars->nBTLimit = pParSec->nBTLimitInter;
-        pPars->fVerbose = pParSec->fVeryVerbose;
-        if ( Saig_ManPoNum(pNew) == 1 )
-        {
-            RetValue = Inter_ManPerformInterpolation( pNew, pPars, &Depth );
-        }
-        else if ( pParSec->fInterSeparate )
-        {
-            Abc_Cex_t * pCex = NULL;
-            Aig_Man_t * pTemp, * pAux;
-            Aig_Obj_t * pObjPo;
-            int i, Counter = 0;
-            Saig_ManForEachPo( pNew, pObjPo, i )
-            { 
-                if ( Aig_ObjFanin0(pObjPo) == Aig_ManConst1(pNew) )
-                    continue;
-                if ( pPars->fVerbose )
-                    printf( "Solving output %2d (out of %2d):\n", i, Saig_ManPoNum(pNew) );
-                pTemp = Aig_ManDupOneOutput( pNew, i, 1 );
-                pTemp = Aig_ManScl( pAux = pTemp, 1, 1, 0, -1, -1, 0, 0 );
-                Aig_ManStop( pAux );
-                if ( Saig_ManRegNum(pTemp) > 0 )
-                {
-                    RetValue = Inter_ManPerformInterpolation( pTemp, pPars, &Depth );
-                    if ( pTemp->pSeqModel )
-                    {
-                        pCex = p->pSeqModel = Abc_CexDup( pTemp->pSeqModel, Aig_ManRegNum(p) );
-                        pCex->iPo = i;
-                        Aig_ManStop( pTemp );
-                        break;
-                    }
-                    // if solved, remove the output
-                    if ( RetValue == 1 )
-                    {
-                        Aig_ObjPatchFanin0( pNew, pObjPo, Aig_ManConst0(pNew) );
-    //                    printf( "Output %3d : Solved ", i );
-                    }
-                    else
-                    {
-                        Counter++;
-    //                    printf( "Output %3d : Undec  ", i );
-                    }
-                }
-                else
-                    Counter++;
-//                Aig_ManPrintStats( pTemp );
-                Aig_ManStop( pTemp );
-                printf( "Solving output %3d (out of %3d) using interpolation.\r", i, Saig_ManPoNum(pNew) );
-            }
-            Aig_ManCleanup( pNew );
-            if ( pCex == NULL )
-            {
-                printf( "Interpolation left %d (out of %d) outputs unsolved              \n", Counter, Saig_ManPoNum(pNew) );
-                if ( Counter )
-                    RetValue = -1;
-            }
-            pNew = Aig_ManDupUnsolvedOutputs( pTemp = pNew, 1 );
-            Aig_ManStop( pTemp );
-            pNew = Aig_ManScl( pTemp = pNew, 1, 1, 0, -1, -1, 0, 0 );
-            Aig_ManStop( pTemp );
-        }
-        else
-        {
-            Aig_Man_t * pNewOrpos = Saig_ManDupOrpos( pNew );
-            RetValue = Inter_ManPerformInterpolation( pNewOrpos, pPars, &Depth );
-            if ( pNewOrpos->pSeqModel )
-            {
-                Abc_Cex_t * pCex;
-                pCex = pNew->pSeqModel = pNewOrpos->pSeqModel; pNewOrpos->pSeqModel = NULL;
-                pCex->iPo = Saig_ManFindFailedPoCex( pNew, pNew->pSeqModel );
-            }
-            Aig_ManStop( pNewOrpos );
-        }
-
-        if ( pParSec->fVerbose )
-        {
-        if ( RetValue == 1 )
-            printf( "Property proved using interpolation.  " );
-        else if ( RetValue == 0 )
-            printf( "Property DISPROVED in frame %d using interpolation.  ", Depth );
-        else if ( RetValue == -1 )
-            printf( "Property UNDECIDED after interpolation.  " );
-        else
-            assert( 0 ); 
-ABC_PRT( "Time", clock() - clk );
-        }
-    }
-
-    // try reachability analysis
-    if ( pParSec->fReachability && RetValue == -1 && Aig_ManRegNum(pNew) > 0 && Aig_ManRegNum(pNew) < pParSec->nBddVarsMax )
-    {
-        Saig_ParBbr_t Pars, * pPars = &Pars;
-        Bbr_ManSetDefaultParams( pPars );
-        pPars->TimeLimit     = 0;
-        pPars->nBddMax       = pParSec->nBddMax;
-        pPars->nIterMax      = pParSec->nBddIterMax;
-        pPars->fPartition    = 1;
-        pPars->fReorder      = 1;
-        pPars->fReorderImage = 1;
-        pPars->fVerbose      = 0;
-        pPars->fSilent       = pParSec->fSilent;
-        pNew->nTruePis = Aig_ManPiNum(pNew) - Aig_ManRegNum(pNew); 
-        pNew->nTruePos = Aig_ManPoNum(pNew) - Aig_ManRegNum(pNew); 
-        RetValue = Aig_ManVerifyUsingBdds( pNew, pPars );
-    }
-
-    // try PDR
-    if ( pParSec->fUsePdr && RetValue == -1 && Aig_ManRegNum(pNew) > 0 )
-    {
-        Abc_Cex_t * pCex = NULL;
-        Aig_Man_t * pNewOrpos = Saig_ManDupOrpos( pNew );
-        Pdr_Par_t Pars, * pPars = &Pars;
-        Pdr_ManSetDefaultParams( pPars );
-        pPars->nTimeOut = pParSec->nPdrTimeout;
-        pPars->fVerbose = pParSec->fVerbose;
-        if ( pParSec->fVerbose )
-            printf( "Running property directed reachability...\n" );
-        RetValue = Pdr_ManSolve( pNewOrpos, pPars, &pCex );
-        if ( pCex )
-            pCex->iPo = Saig_ManFindFailedPoCex( pNew, pCex );
-        Aig_ManStop( pNewOrpos );
-        pNew->pSeqModel = pCex;
-    }
-
-finish:
-    // report the miter
-    if ( RetValue == 1 )
-    {
-        if ( !pParSec->fSilent )
-        {
-            printf( "Networks are equivalent.   " );
-ABC_PRT( "Time", clock() - clkTotal );
-        }
-        if ( pParSec->fReportSolution && !pParSec->fRecursive )
-        {
-        printf( "SOLUTION: PASS       " );
-ABC_PRT( "Time", clock() - clkTotal );
-        }
-    }
-    else if ( RetValue == 0 )
-    {
-        if ( pNew->pSeqModel == NULL )
-        {
-            int i;
-            // if the CEX is not derives, it is because tricial CEX should be assumed
-            pNew->pSeqModel = Abc_CexAlloc( Aig_ManRegNum(pNew), pNew->nTruePis, 1 );
-            // if the CEX does not work, we need to change PIs to 1 because 
-            // the only way it can happen is when a PO is equal to a PI...
-            if ( Saig_ManFindFailedPoCex( pNew, pNew->pSeqModel ) == -1 )
-                for ( i = 0; i < pNew->nTruePis; i++ )
-                    Aig_InfoSetBit( pNew->pSeqModel->pData, i );
-        }
-        if ( !pParSec->fSilent )
-        {
-            printf( "Networks are NOT EQUIVALENT.   " );
-ABC_PRT( "Time", clock() - clkTotal );
-        }
-        if ( pParSec->fReportSolution && !pParSec->fRecursive )
-        {
-        printf( "SOLUTION: FAIL       " );
-ABC_PRT( "Time", clock() - clkTotal );
-        }
-    }
-    else 
-    {
-        ///////////////////////////////////
-        // save intermediate result
-        extern void Abc_FrameSetSave1( void * pAig );
-        Abc_FrameSetSave1( Aig_ManDupSimple(pNew) );
-        ///////////////////////////////////
-        if ( !pParSec->fSilent )
-        {
-            printf( "Networks are UNDECIDED.   " );
-ABC_PRT( "Time", clock() - clkTotal );
-        }
-        if ( pParSec->fReportSolution && !pParSec->fRecursive )
-        {
-        printf( "SOLUTION: UNDECIDED  " );
-ABC_PRT( "Time", clock() - clkTotal );
-        }
-        if ( !TimeOut && !pParSec->fSilent )
-        {
-            static int Counter = 1;
-            char pFileName[1000];
-            pParSec->nSMnumber = Counter;
-            sprintf( pFileName, "sm%02d.aig", Counter++ );
-            Ioa_WriteAiger( pNew, pFileName, 0, 0 );
-            printf( "The unsolved reduced miter is written into file \"%s\".\n", pFileName );
-        }
-    }
-    if ( pNew->pSeqModel )
-    {
-        if ( Saig_ManPiNum(p) != Saig_ManPiNum(pNew) )
-            printf( "The counter-example is invalid because of phase abstraction.\n" );
-        else
-        {
-        ABC_FREE( p->pSeqModel );
-        p->pSeqModel = Abc_CexDup( pNew->pSeqModel, Aig_ManRegNum(p) );
-        ABC_FREE( pNew->pSeqModel );
-        }
-    }
-    if ( ppResult != NULL )
-        *ppResult = Aig_ManDupSimpleDfs( pNew );
-    if ( pNew )
-        Aig_ManStop( pNew );
-    return RetValue;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fraSim.c b/src/aig/fra/fraSim.c
deleted file mode 100644
index 8f912915..00000000
--- a/src/aig/fra/fraSim.c
+++ /dev/null
@@ -1,1023 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fraSim.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fraSim.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-#include "saig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Computes hash value of the node using its simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_SmlNodeHash( Aig_Obj_t * pObj, int nTableSize )
-{
-    Fra_Man_t * p = (Fra_Man_t *)pObj->pData;
-    static int s_FPrimes[128] = { 
-        1009, 1049, 1093, 1151, 1201, 1249, 1297, 1361, 1427, 1459, 
-        1499, 1559, 1607, 1657, 1709, 1759, 1823, 1877, 1933, 1997, 
-        2039, 2089, 2141, 2213, 2269, 2311, 2371, 2411, 2467, 2543, 
-        2609, 2663, 2699, 2741, 2797, 2851, 2909, 2969, 3037, 3089, 
-        3169, 3221, 3299, 3331, 3389, 3461, 3517, 3557, 3613, 3671, 
-        3719, 3779, 3847, 3907, 3943, 4013, 4073, 4129, 4201, 4243, 
-        4289, 4363, 4441, 4493, 4549, 4621, 4663, 4729, 4793, 4871, 
-        4933, 4973, 5021, 5087, 5153, 5227, 5281, 5351, 5417, 5471, 
-        5519, 5573, 5651, 5693, 5749, 5821, 5861, 5923, 6011, 6073, 
-        6131, 6199, 6257, 6301, 6353, 6397, 6481, 6563, 6619, 6689, 
-        6737, 6803, 6863, 6917, 6977, 7027, 7109, 7187, 7237, 7309, 
-        7393, 7477, 7523, 7561, 7607, 7681, 7727, 7817, 7877, 7933, 
-        8011, 8039, 8059, 8081, 8093, 8111, 8123, 8147
-    };
-    unsigned * pSims;
-    unsigned uHash;
-    int i;
-//    assert( p->pSml->nWordsTotal <= 128 );
-    uHash = 0;
-    pSims = Fra_ObjSim(p->pSml, pObj->Id);
-    for ( i = p->pSml->nWordsPref; i < p->pSml->nWordsTotal; i++ )
-        uHash ^= pSims[i] * s_FPrimes[i & 0x7F];
-    return uHash % nTableSize;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation info is composed of all zeros.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_SmlNodeIsConst( Aig_Obj_t * pObj )
-{
-    Fra_Man_t * p = (Fra_Man_t *)pObj->pData;
-    unsigned * pSims;
-    int i;
-    pSims = Fra_ObjSim(p->pSml, pObj->Id);
-    for ( i = p->pSml->nWordsPref; i < p->pSml->nWordsTotal; i++ )
-        if ( pSims[i] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation infos are equal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_SmlNodesAreEqual( Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
-{
-    Fra_Man_t * p = (Fra_Man_t *)pObj0->pData;
-    unsigned * pSims0, * pSims1;
-    int i;
-    pSims0 = Fra_ObjSim(p->pSml, pObj0->Id);
-    pSims1 = Fra_ObjSim(p->pSml, pObj1->Id);
-    for ( i = p->pSml->nWordsPref; i < p->pSml->nWordsTotal; i++ )
-        if ( pSims0[i] != pSims1[i] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of 1s in the XOR of simulation data.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_SmlNodeNotEquWeight( Fra_Sml_t * p, int Left, int Right )
-{
-    unsigned * pSimL, * pSimR;
-    int k, Counter = 0;
-    pSimL = Fra_ObjSim( p, Left );
-    pSimR = Fra_ObjSim( p, Right );
-    for ( k = p->nWordsPref; k < p->nWordsTotal; k++ )
-        Counter += Aig_WordCountOnes( pSimL[k] ^ pSimR[k] );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation info is composed of all zeros.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_SmlNodeIsZero( Fra_Sml_t * p, Aig_Obj_t * pObj )
-{
-    unsigned * pSims;
-    int i;
-    pSims = Fra_ObjSim(p, pObj->Id);
-    for ( i = p->nWordsPref; i < p->nWordsTotal; i++ )
-        if ( pSims[i] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of one's in the patten of the output.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_SmlNodeCountOnes( Fra_Sml_t * p, Aig_Obj_t * pObj )
-{
-    unsigned * pSims;
-    int i, Counter = 0;
-    pSims = Fra_ObjSim(p, pObj->Id);
-    for ( i = 0; i < p->nWordsTotal; i++ )
-        Counter += Aig_WordCountOnes( pSims[i] );
-    return Counter;
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Generated const 0 pattern.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlSavePattern0( Fra_Man_t * p, int fInit )
-{
-    memset( p->pPatWords, 0, sizeof(unsigned) * p->nPatWords );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [[Generated const 1 pattern.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlSavePattern1( Fra_Man_t * p, int fInit )
-{
-    Aig_Obj_t * pObj;
-    int i, k, nTruePis;
-    memset( p->pPatWords, 0xff, sizeof(unsigned) * p->nPatWords );
-    if ( !fInit )
-        return;
-    // clear the state bits to correspond to all-0 initial state
-    nTruePis = Aig_ManPiNum(p->pManAig) - Aig_ManRegNum(p->pManAig);
-    k = 0;
-    Aig_ManForEachLoSeq( p->pManAig, pObj, i )
-        Aig_InfoXorBit( p->pPatWords, nTruePis * p->nFramesAll + k++ );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Copy pattern from the solver into the internal storage.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlSavePattern( Fra_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    memset( p->pPatWords, 0, sizeof(unsigned) * p->nPatWords );
-    Aig_ManForEachPi( p->pManFraig, pObj, i )
-//        if ( p->pSat->model.ptr[Fra_ObjSatNum(pObj)] == l_True )
-        if ( sat_solver_var_value(p->pSat, Fra_ObjSatNum(pObj)) )
-            Aig_InfoSetBit( p->pPatWords, i );
-
-    if ( p->vCex )
-    {
-        Vec_IntClear( p->vCex );
-        for ( i = 0; i < Aig_ManPiNum(p->pManAig) - Aig_ManRegNum(p->pManAig); i++ )
-            Vec_IntPush( p->vCex, Aig_InfoHasBit( p->pPatWords, i ) );
-        for ( i = Aig_ManPiNum(p->pManFraig) - Aig_ManRegNum(p->pManFraig); i < Aig_ManPiNum(p->pManFraig); i++ )
-            Vec_IntPush( p->vCex, Aig_InfoHasBit( p->pPatWords, i ) );
-    }
-
-/*
-    printf( "Pattern: " );
-    Aig_ManForEachPi( p->pManFraig, pObj, i )
-        printf( "%d", Aig_InfoHasBit( p->pPatWords, i ) );
-    printf( "\n" );
-*/
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the counter-example from the successful pattern.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlCheckOutputSavePattern( Fra_Man_t * p, Aig_Obj_t * pObjPo )
-{ 
-    Aig_Obj_t * pFanin, * pObjPi;
-    unsigned * pSims;
-    int i, k, BestPat, * pModel;
-    // find the word of the pattern
-    pFanin = Aig_ObjFanin0(pObjPo);
-    pSims = Fra_ObjSim(p->pSml, pFanin->Id);
-    for ( i = 0; i < p->pSml->nWordsTotal; i++ )
-        if ( pSims[i] )
-            break;
-    assert( i < p->pSml->nWordsTotal );
-    // find the bit of the pattern
-    for ( k = 0; k < 32; k++ )
-        if ( pSims[i] & (1 << k) )
-            break;
-    assert( k < 32 );
-    // determine the best pattern
-    BestPat = i * 32 + k;
-    // fill in the counter-example data
-    pModel = ABC_ALLOC( int, Aig_ManPiNum(p->pManFraig)+1 );
-    Aig_ManForEachPi( p->pManAig, pObjPi, i )
-    {
-        pModel[i] = Aig_InfoHasBit(Fra_ObjSim(p->pSml, pObjPi->Id), BestPat);
-//        printf( "%d", pModel[i] );
-    }
-    pModel[Aig_ManPiNum(p->pManAig)] = pObjPo->Id;
-//    printf( "\n" );
-    // set the model
-    assert( p->pManFraig->pData == NULL );
-    p->pManFraig->pData = pModel;
-    return;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the one of the output is already non-constant 0.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_SmlCheckOutput( Fra_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    // make sure the reference simulation pattern does not detect the bug
-    pObj = Aig_ManPo( p->pManAig, 0 );
-    assert( Aig_ObjFanin0(pObj)->fPhase == (unsigned)Aig_ObjFaninC0(pObj) ); 
-    Aig_ManForEachPo( p->pManAig, pObj, i )
-    {
-        if ( !Fra_SmlNodeIsConst( Aig_ObjFanin0(pObj) ) )
-        {
-            // create the counter-example from this pattern
-            Fra_SmlCheckOutputSavePattern( p, pObj );
-            return 1;
-        }
-    }
-    return 0;
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Assigns random patterns to the PI node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlAssignRandom( Fra_Sml_t * p, Aig_Obj_t * pObj )
-{
-    unsigned * pSims;
-    int i;
-    assert( Aig_ObjIsPi(pObj) );
-    pSims = Fra_ObjSim( p, pObj->Id );
-    for ( i = 0; i < p->nWordsTotal; i++ )
-        pSims[i] = Fra_ObjRandomSim();
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Assigns constant patterns to the PI node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlAssignConst( Fra_Sml_t * p, Aig_Obj_t * pObj, int fConst1, int iFrame )
-{
-    unsigned * pSims;
-    int i;
-    assert( Aig_ObjIsPi(pObj) );
-    pSims = Fra_ObjSim( p, pObj->Id ) + p->nWordsFrame * iFrame;
-    for ( i = 0; i < p->nWordsFrame; i++ )
-        pSims[i] = fConst1? ~(unsigned)0 : 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Assings random simulation info for the PIs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlInitialize( Fra_Sml_t * p, int fInit )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    if ( fInit )
-    {
-        assert( Aig_ManRegNum(p->pAig) > 0 );
-        assert( Aig_ManRegNum(p->pAig) < Aig_ManPiNum(p->pAig) );
-        // assign random info for primary inputs
-        Aig_ManForEachPiSeq( p->pAig, pObj, i )
-            Fra_SmlAssignRandom( p, pObj );
-        // assign the initial state for the latches
-        Aig_ManForEachLoSeq( p->pAig, pObj, i )
-            Fra_SmlAssignConst( p, pObj, 0, 0 );
-    }
-    else
-    {
-        Aig_ManForEachPi( p->pAig, pObj, i )
-            Fra_SmlAssignRandom( p, pObj );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Assings distance-1 simulation info for the PIs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlAssignDist1( Fra_Sml_t * p, unsigned * pPat )
-{
-    Aig_Obj_t * pObj;
-    int f, i, k, Limit, nTruePis;
-    assert( p->nFrames > 0 );
-    if ( p->nFrames == 1 )
-    {
-        // copy the PI info 
-        Aig_ManForEachPi( p->pAig, pObj, i )
-            Fra_SmlAssignConst( p, pObj, Aig_InfoHasBit(pPat, i), 0 );
-        // flip one bit
-        Limit = ABC_MIN( Aig_ManPiNum(p->pAig), p->nWordsTotal * 32 - 1 );
-        for ( i = 0; i < Limit; i++ )
-            Aig_InfoXorBit( Fra_ObjSim( p, Aig_ManPi(p->pAig,i)->Id ), i+1 );
-    }
-    else
-    {
-        int fUseDist1 = 0;
-
-        // copy the PI info for each frame
-        nTruePis = Aig_ManPiNum(p->pAig) - Aig_ManRegNum(p->pAig);
-        for ( f = 0; f < p->nFrames; f++ )
-            Aig_ManForEachPiSeq( p->pAig, pObj, i )
-                Fra_SmlAssignConst( p, pObj, Aig_InfoHasBit(pPat, nTruePis * f + i), f );
-        // copy the latch info 
-        k = 0;
-        Aig_ManForEachLoSeq( p->pAig, pObj, i )
-            Fra_SmlAssignConst( p, pObj, Aig_InfoHasBit(pPat, nTruePis * p->nFrames + k++), 0 );
-//        assert( p->pManFraig == NULL || nTruePis * p->nFrames + k == Aig_ManPiNum(p->pManFraig) );
-
-        // flip one bit of the last frame
-        if ( fUseDist1 ) //&& p->nFrames == 2 )
-        {
-            Limit = ABC_MIN( nTruePis, p->nWordsFrame * 32 - 1 );
-            for ( i = 0; i < Limit; i++ )
-                Aig_InfoXorBit( Fra_ObjSim( p, Aig_ManPi(p->pAig, i)->Id ) + p->nWordsFrame*(p->nFrames-1), i+1 );
-        }
-    }
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlNodeSimulate( Fra_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
-{
-    unsigned * pSims, * pSims0, * pSims1;
-    int fCompl, fCompl0, fCompl1, i;
-    assert( !Aig_IsComplement(pObj) );
-    assert( Aig_ObjIsNode(pObj) );
-    assert( iFrame == 0 || p->nWordsFrame < p->nWordsTotal );
-    // get hold of the simulation information
-    pSims  = Fra_ObjSim(p, pObj->Id) + p->nWordsFrame * iFrame;
-    pSims0 = Fra_ObjSim(p, Aig_ObjFanin0(pObj)->Id) + p->nWordsFrame * iFrame;
-    pSims1 = Fra_ObjSim(p, Aig_ObjFanin1(pObj)->Id) + p->nWordsFrame * iFrame;
-    // get complemented attributes of the children using their random info
-    fCompl  = pObj->fPhase;
-    fCompl0 = Aig_ObjPhaseReal(Aig_ObjChild0(pObj));
-    fCompl1 = Aig_ObjPhaseReal(Aig_ObjChild1(pObj));
-    // simulate
-    if ( fCompl0 && fCompl1 )
-    {
-        if ( fCompl )
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = (pSims0[i] | pSims1[i]);
-        else
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = ~(pSims0[i] | pSims1[i]);
-    }
-    else if ( fCompl0 && !fCompl1 )
-    {
-        if ( fCompl )
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = (pSims0[i] | ~pSims1[i]);
-        else
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = (~pSims0[i] & pSims1[i]);
-    }
-    else if ( !fCompl0 && fCompl1 )
-    {
-        if ( fCompl )
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = (~pSims0[i] | pSims1[i]);
-        else
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = (pSims0[i] & ~pSims1[i]);
-    }
-    else // if ( !fCompl0 && !fCompl1 )
-    {
-        if ( fCompl )
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = ~(pSims0[i] & pSims1[i]);
-        else
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = (pSims0[i] & pSims1[i]);
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_SmlNodesCompareInFrame( Fra_Sml_t * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1, int iFrame0, int iFrame1 )
-{
-    unsigned * pSims0, * pSims1;
-    int i;
-    assert( !Aig_IsComplement(pObj0) );
-    assert( !Aig_IsComplement(pObj1) );
-    assert( iFrame0 == 0 || p->nWordsFrame < p->nWordsTotal );
-    assert( iFrame1 == 0 || p->nWordsFrame < p->nWordsTotal );
-    // get hold of the simulation information
-    pSims0  = Fra_ObjSim(p, pObj0->Id) + p->nWordsFrame * iFrame0;
-    pSims1  = Fra_ObjSim(p, pObj1->Id) + p->nWordsFrame * iFrame1;
-    // compare
-    for ( i = 0; i < p->nWordsFrame; i++ )
-        if ( pSims0[i] != pSims1[i] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlNodeCopyFanin( Fra_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
-{
-    unsigned * pSims, * pSims0;
-    int fCompl, fCompl0, i;
-    assert( !Aig_IsComplement(pObj) );
-    assert( Aig_ObjIsPo(pObj) );
-    assert( iFrame == 0 || p->nWordsFrame < p->nWordsTotal );
-    // get hold of the simulation information
-    pSims  = Fra_ObjSim(p, pObj->Id) + p->nWordsFrame * iFrame;
-    pSims0 = Fra_ObjSim(p, Aig_ObjFanin0(pObj)->Id) + p->nWordsFrame * iFrame;
-    // get complemented attributes of the children using their random info
-    fCompl  = pObj->fPhase;
-    fCompl0 = Aig_ObjPhaseReal(Aig_ObjChild0(pObj));
-    // copy information as it is
-    if ( fCompl0 )
-        for ( i = 0; i < p->nWordsFrame; i++ )
-            pSims[i] = ~pSims0[i];
-    else
-        for ( i = 0; i < p->nWordsFrame; i++ )
-            pSims[i] = pSims0[i];
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlNodeTransferNext( Fra_Sml_t * p, Aig_Obj_t * pOut, Aig_Obj_t * pIn, int iFrame )
-{
-    unsigned * pSims0, * pSims1;
-    int i;
-    assert( !Aig_IsComplement(pOut) );
-    assert( !Aig_IsComplement(pIn) );
-    assert( Aig_ObjIsPo(pOut) );
-    assert( Aig_ObjIsPi(pIn) );
-    assert( iFrame == 0 || p->nWordsFrame < p->nWordsTotal );
-    // get hold of the simulation information
-    pSims0 = Fra_ObjSim(p, pOut->Id) + p->nWordsFrame * iFrame;
-    pSims1 = Fra_ObjSim(p, pIn->Id) + p->nWordsFrame * (iFrame+1);
-    // copy information as it is
-    for ( i = 0; i < p->nWordsFrame; i++ )
-        pSims1[i] = pSims0[i];
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Check if any of the POs becomes non-constant.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fra_SmlCheckNonConstOutputs( Fra_Sml_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManForEachPoSeq( p->pAig, pObj, i )
-        if ( !Fra_SmlNodeIsZero(p, pObj) )
-            return 1;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates AIG manager.]
-
-  Description [Assumes that the PI simulation info is attached.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlSimulateOne( Fra_Sml_t * p )
-{
-    Aig_Obj_t * pObj, * pObjLi, * pObjLo;
-    int f, i, clk;
-clk = clock();
-    for ( f = 0; f < p->nFrames; f++ )
-    {
-        // simulate the nodes
-        Aig_ManForEachNode( p->pAig, pObj, i )
-            Fra_SmlNodeSimulate( p, pObj, f );
-        // copy simulation info into outputs
-        Aig_ManForEachPoSeq( p->pAig, pObj, i )
-            Fra_SmlNodeCopyFanin( p, pObj, f );
-        // quit if this is the last timeframe
-        if ( f == p->nFrames - 1 )
-            break;
-        // copy simulation info into outputs
-        Aig_ManForEachLiSeq( p->pAig, pObj, i )
-            Fra_SmlNodeCopyFanin( p, pObj, f );
-        // copy simulation info into the inputs
-        Aig_ManForEachLiLoSeq( p->pAig, pObjLi, pObjLo, i )
-            Fra_SmlNodeTransferNext( p, pObjLi, pObjLo, f );
-    }
-p->timeSim += clock() - clk;
-p->nSimRounds++;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Resimulates fraiging manager after finding a counter-example.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlResimulate( Fra_Man_t * p )
-{
-    int nChanges, clk;
-    Fra_SmlAssignDist1( p->pSml, p->pPatWords );
-    Fra_SmlSimulateOne( p->pSml );
-//    if ( p->pPars->fPatScores )
-//        Fra_CleanPatScores( p );
-    if ( p->pPars->fProve && Fra_SmlCheckOutput(p) )
-        return;
-clk = clock();
-    nChanges = Fra_ClassesRefine( p->pCla );
-    nChanges += Fra_ClassesRefine1( p->pCla, 1, NULL );
-    if ( p->pCla->vImps )
-        nChanges += Fra_ImpRefineUsingCex( p, p->pCla->vImps );
-    if ( p->vOneHots )
-        nChanges += Fra_OneHotRefineUsingCex( p, p->vOneHots );
-p->timeRef += clock() - clk;
-    if ( !p->pPars->nFramesK && nChanges < 1 )
-        printf( "Error: A counter-example did not refine classes!\n" );
-//    assert( nChanges >= 1 );
-//printf( "Refined classes = %5d.   Changes = %4d.\n", Vec_PtrSize(p->vClasses), nChanges );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs simulation of the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlSimulate( Fra_Man_t * p, int fInit )
-{
-    int fVerbose = 0;
-    int nChanges, nClasses, clk;
-    assert( !fInit || Aig_ManRegNum(p->pManAig) );
-    // start the classes
-    Fra_SmlInitialize( p->pSml, fInit );
-    Fra_SmlSimulateOne( p->pSml );
-    if ( p->pPars->fProve && Fra_SmlCheckOutput(p) )
-        return;
-    Fra_ClassesPrepare( p->pCla, p->pPars->fLatchCorr, 0 );
-//    Fra_ClassesPrint( p->pCla, 0 );
-if ( fVerbose )
-printf( "Starting classes = %5d.   Lits = %6d.\n", Vec_PtrSize(p->pCla->vClasses), Fra_ClassesCountLits(p->pCla) );
-
-//return;
-
-    // refine classes by walking 0/1 patterns
-    Fra_SmlSavePattern0( p, fInit );
-    Fra_SmlAssignDist1( p->pSml, p->pPatWords );
-    Fra_SmlSimulateOne( p->pSml );
-    if ( p->pPars->fProve && Fra_SmlCheckOutput(p) )
-        return;
-clk = clock();
-    nChanges = Fra_ClassesRefine( p->pCla );
-    nChanges += Fra_ClassesRefine1( p->pCla, 1, NULL );
-p->timeRef += clock() - clk;
-if ( fVerbose )
-printf( "Refined classes  = %5d.   Changes = %4d.   Lits = %6d.\n", Vec_PtrSize(p->pCla->vClasses), nChanges, Fra_ClassesCountLits(p->pCla) );
-    Fra_SmlSavePattern1( p, fInit );
-    Fra_SmlAssignDist1( p->pSml, p->pPatWords );
-    Fra_SmlSimulateOne( p->pSml );
-    if ( p->pPars->fProve && Fra_SmlCheckOutput(p) )
-        return;
-clk = clock();
-    nChanges = Fra_ClassesRefine( p->pCla );
-    nChanges += Fra_ClassesRefine1( p->pCla, 1, NULL );
-p->timeRef += clock() - clk;
-
-if ( fVerbose )
-printf( "Refined classes  = %5d.   Changes = %4d.   Lits = %6d.\n", Vec_PtrSize(p->pCla->vClasses), nChanges, Fra_ClassesCountLits(p->pCla) );
-    // refine classes by random simulation
-    do {
-        Fra_SmlInitialize( p->pSml, fInit );
-        Fra_SmlSimulateOne( p->pSml );
-        nClasses = Vec_PtrSize(p->pCla->vClasses);
-        if ( p->pPars->fProve && Fra_SmlCheckOutput(p) )
-            return;
-clk = clock();
-        nChanges = Fra_ClassesRefine( p->pCla );
-        nChanges += Fra_ClassesRefine1( p->pCla, 1, NULL );
-p->timeRef += clock() - clk;
-if ( fVerbose )
-printf( "Refined classes  = %5d.   Changes = %4d.   Lits = %6d.\n", Vec_PtrSize(p->pCla->vClasses), nChanges, Fra_ClassesCountLits(p->pCla) );
-    } while ( (double)nChanges / nClasses > p->pPars->dSimSatur );
-
-//    if ( p->pPars->fVerbose )
-//    printf( "Consts = %6d. Classes = %6d. Literals = %6d.\n", 
-//        Vec_PtrSize(p->pCla->vClasses1), Vec_PtrSize(p->pCla->vClasses), Fra_ClassesCountLits(p->pCla) );
-//    Fra_ClassesPrint( p->pCla, 0 );
-}
- 
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates simulation manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Fra_Sml_t * Fra_SmlStart( Aig_Man_t * pAig, int nPref, int nFrames, int nWordsFrame )
-{
-    Fra_Sml_t * p;
-    p = (Fra_Sml_t *)ABC_ALLOC( char, sizeof(Fra_Sml_t) + sizeof(unsigned) * Aig_ManObjNumMax(pAig) * (nPref + nFrames) * nWordsFrame );
-    memset( p, 0, sizeof(Fra_Sml_t) + sizeof(unsigned) * (nPref + nFrames) * nWordsFrame );
-    p->pAig        = pAig;
-    p->nPref       = nPref;
-    p->nFrames     = nPref + nFrames;
-    p->nWordsFrame = nWordsFrame;
-    p->nWordsTotal = (nPref + nFrames) * nWordsFrame;
-    p->nWordsPref  = nPref * nWordsFrame;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocates simulation manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fra_SmlStop( Fra_Sml_t * p )
-{
-    ABC_FREE( p );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs simulation of the uninitialized circuit.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Fra_Sml_t * Fra_SmlSimulateComb( Aig_Man_t * pAig, int nWords )
-{
-    Fra_Sml_t * p;
-    p = Fra_SmlStart( pAig, 0, 1, nWords );
-    Fra_SmlInitialize( p, 0 );
-    Fra_SmlSimulateOne( p );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs simulation of the initialized circuit.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Fra_Sml_t * Fra_SmlSimulateSeq( Aig_Man_t * pAig, int nPref, int nFrames, int nWords, int fCheckMiter )
-{
-    Fra_Sml_t * p;
-    p = Fra_SmlStart( pAig, nPref, nFrames, nWords );
-    Fra_SmlInitialize( p, 1 );
-    Fra_SmlSimulateOne( p );
-    if ( fCheckMiter )
-    p->fNonConstOut = Fra_SmlCheckNonConstOutputs( p );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates sequential counter-example from the simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Abc_Cex_t * Fra_SmlGetCounterExample( Fra_Sml_t * p )
-{
-    Abc_Cex_t * pCex;
-    Aig_Obj_t * pObj;
-    unsigned * pSims;
-    int iPo, iFrame, iBit, i, k;
-
-    // make sure the simulation manager has it
-    assert( p->fNonConstOut );
-
-    // find the first output that failed
-    iPo = -1;
-    iBit = -1;
-    iFrame = -1;
-    Aig_ManForEachPoSeq( p->pAig, pObj, iPo )
-    {
-        if ( Fra_SmlNodeIsZero(p, pObj) )
-            continue;
-        pSims = Fra_ObjSim( p, pObj->Id );
-        for ( i = p->nWordsPref; i < p->nWordsTotal; i++ )
-            if ( pSims[i] )
-            {
-                iFrame = i / p->nWordsFrame;
-                iBit = 32 * (i % p->nWordsFrame) + Aig_WordFindFirstBit( pSims[i] );
-                break;
-            }
-        break;
-    }
-    assert( iPo < Aig_ManPoNum(p->pAig)-Aig_ManRegNum(p->pAig) );
-    assert( iFrame < p->nFrames );
-    assert( iBit < 32 * p->nWordsFrame );
-
-    // allocate the counter example
-    pCex = Abc_CexAlloc( Aig_ManRegNum(p->pAig), Aig_ManPiNum(p->pAig) - Aig_ManRegNum(p->pAig), iFrame + 1 );
-    pCex->iPo    = iPo;
-    pCex->iFrame = iFrame;
-
-    // copy the bit data
-    Aig_ManForEachLoSeq( p->pAig, pObj, k )
-    {
-        pSims = Fra_ObjSim( p, pObj->Id );
-        if ( Aig_InfoHasBit( pSims, iBit ) )
-            Aig_InfoSetBit( pCex->pData, k );
-    }
-    for ( i = 0; i <= iFrame; i++ )
-    {
-        Aig_ManForEachPiSeq( p->pAig, pObj, k )
-        {
-            pSims = Fra_ObjSim( p, pObj->Id );
-            if ( Aig_InfoHasBit( pSims, 32 * p->nWordsFrame * i + iBit ) )
-                Aig_InfoSetBit( pCex->pData, pCex->nRegs + pCex->nPis * i + k );
-        }
-    }
-    // verify the counter example
-    if ( !Saig_ManVerifyCex( p->pAig, pCex ) )
-    {
-        printf( "Fra_SmlGetCounterExample(): Counter-example is invalid.\n" );
-        Abc_CexFree( pCex );
-        pCex = NULL;
-    }
-    return pCex;
-}
- 
-/**Function*************************************************************
-
-  Synopsis    [Generates seq counter-example from the combinational one.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Abc_Cex_t * Fra_SmlCopyCounterExample( Aig_Man_t * pAig, Aig_Man_t * pFrames, int * pModel )
-{
-    Abc_Cex_t * pCex;
-    Aig_Obj_t * pObj;
-    int i, nFrames, nTruePis, nTruePos, iPo, iFrame;
-    // get the number of frames
-    assert( Aig_ManRegNum(pAig) > 0 );
-    assert( Aig_ManRegNum(pFrames) == 0 );
-    nTruePis = Aig_ManPiNum(pAig)-Aig_ManRegNum(pAig);
-    nTruePos = Aig_ManPoNum(pAig)-Aig_ManRegNum(pAig);
-    nFrames = Aig_ManPiNum(pFrames) / nTruePis;
-    assert( nTruePis * nFrames == Aig_ManPiNum(pFrames) );
-    assert( nTruePos * nFrames == Aig_ManPoNum(pFrames) );
-    // find the PO that failed
-    iPo = -1;
-    iFrame = -1;
-    Aig_ManForEachPo( pFrames, pObj, i )
-        if ( pObj->Id == pModel[Aig_ManPiNum(pFrames)] )
-        {
-            iPo = i % nTruePos;
-            iFrame = i / nTruePos;
-            break;
-        }
-    assert( iPo >= 0 );
-    // allocate the counter example
-    pCex = Abc_CexAlloc( Aig_ManRegNum(pAig), nTruePis, iFrame + 1 );
-    pCex->iPo    = iPo;
-    pCex->iFrame = iFrame;
-
-    // copy the bit data
-    for ( i = 0; i < Aig_ManPiNum(pFrames); i++ )
-    {
-        if ( pModel[i] )
-            Aig_InfoSetBit( pCex->pData, pCex->nRegs + i );
-        if ( pCex->nRegs + i == pCex->nBits - 1 )
-            break;
-    }
-
-    // verify the counter example
-    if ( !Saig_ManVerifyCex( pAig, pCex ) )
-    {
-        printf( "Fra_SmlGetCounterExample(): Counter-example is invalid.\n" );
-        Abc_CexFree( pCex );
-        pCex = NULL;
-    }
-    return pCex;
-
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/fra_.c b/src/aig/fra/fra_.c
deleted file mode 100644
index 8e5785ec..00000000
--- a/src/aig/fra/fra_.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fra_.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [New FRAIG package.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 30, 2007.]
-
-  Revision    [$Id: fra_.c,v 1.00 2007/06/30 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fra/module.make b/src/aig/fra/module.make
deleted file mode 100644
index e3a88aae..00000000
--- a/src/aig/fra/module.make
+++ /dev/null
@@ -1,17 +0,0 @@
-SRC +=    src/aig/fra/fraBmc.c \
-    src/aig/fra/fraCec.c \
-    src/aig/fra/fraClass.c \
-    src/aig/fra/fraClau.c \
-    src/aig/fra/fraClaus.c \
-    src/aig/fra/fraCnf.c \
-    src/aig/fra/fraCore.c \
-    src/aig/fra/fraHot.c \
-    src/aig/fra/fraImp.c \
-    src/aig/fra/fraInd.c \
-    src/aig/fra/fraIndVer.c \
-    src/aig/fra/fraLcr.c \
-    src/aig/fra/fraMan.c \
-    src/aig/fra/fraPart.c \
-    src/aig/fra/fraSat.c \
-    src/aig/fra/fraSec.c \
-    src/aig/fra/fraSim.c
diff --git a/src/aig/fsim/fsim.h b/src/aig/fsim/fsim.h
deleted file mode 100644
index fabc5254..00000000
--- a/src/aig/fsim/fsim.h
+++ /dev/null
@@ -1,101 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fsim.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Fast sequential AIG simulator.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: fsim.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __FSIM_H__
-#define __FSIM_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Fsim_Man_t_ Fsim_Man_t;
-
-// simulation parameters
-typedef struct Fsim_ParSim_t_ Fsim_ParSim_t;
-struct Fsim_ParSim_t_
-{
-    // user-controlled parameters
-    int             nWords;       // the number of machine words
-    int             nIters;       // the number of timeframes
-    int             TimeLimit;    // time limit in seconds
-    int             fCheckMiter;  // check if miter outputs are non-zero
-    int             fVerbose;     // enables verbose output
-    // internal parameters
-    int             fCompressAig; // compresses internal data
-};
-
-// switching estimation parameters
-typedef struct Fsim_ParSwitch_t_ Fsim_ParSwitch_t;
-struct Fsim_ParSwitch_t_
-{
-    // user-controlled parameters
-    int             nWords;       // the number of machine words
-    int             nIters;       // the number of timeframes
-    int             nPref;        // the number of first timeframes to skip
-    int             nRandPiNum;   // PI trans prob (0=1/2; 1=1/4; 2=1/8, etc)
-    int             fProbOne;     // collect probability of one
-    int             fProbTrans;   // collect probatility of switching
-    int             fVerbose;     // enables verbose output
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== fsimCore.c ==========================================================*/
-extern void           Fsim_ManSetDefaultParamsSim( Fsim_ParSim_t * p );
-extern void           Fsim_ManSetDefaultParamsSwitch( Fsim_ParSwitch_t * p );
-/*=== fsimSim.c ==========================================================*/
-extern int            Fsim_ManSimulate( Aig_Man_t * pAig, Fsim_ParSim_t * pPars );
-/*=== fsimSwitch.c ==========================================================*/
-extern Vec_Int_t *    Fsim_ManSwitchSimulate( Aig_Man_t * pAig, Fsim_ParSwitch_t * pPars );
-/*=== fsimTsim.c ==========================================================*/
-extern Vec_Ptr_t *    Fsim_ManTerSimulate( Aig_Man_t * pAig, int fVerbose );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/fsim/fsimCore.c b/src/aig/fsim/fsimCore.c
deleted file mode 100644
index 9516f09e..00000000
--- a/src/aig/fsim/fsimCore.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fsimCore.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Fast sequential AIG simulator.]
-
-  Synopsis    [Core procedures.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: fsimCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fsimInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fsim_ManSetDefaultParamsSim( Fsim_ParSim_t * p )
-{
-    memset( p, 0, sizeof(Fsim_ParSim_t) );
-    // user-controlled parameters
-    p->nWords       =   8;    // the number of machine words
-    p->nIters       =  32;    // the number of timeframes
-    p->TimeLimit    =  60;    // time limit in seconds
-    p->fCheckMiter  =   0;    // check if miter outputs are non-zero 
-    p->fVerbose     =   1;    // enables verbose output
-    // internal parameters
-    p->fCompressAig =   0;    // compresses internal data
-}
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fsim_ManSetDefaultParamsSwitch( Fsim_ParSwitch_t * p )
-{
-    memset( p, 0, sizeof(Fsim_ParSwitch_t) );
-    // user-controlled parameters
-    p->nWords       =   1;    // the number of machine words
-    p->nIters       =  48;    // the number of timeframes
-    p->nPref        =  16;    // the number of first timeframes to skip
-    p->nRandPiNum   =   0;    // PI trans prob (0=1/2; 1=1/4; 2=1/8, etc)
-    p->fProbOne     =   1;    // collect probability of one
-    p->fProbTrans   =   1;    // collect probatility of switching
-    p->fVerbose     =   1;    // enables verbose output
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fsim/fsimFront.c b/src/aig/fsim/fsimFront.c
deleted file mode 100644
index 6169543c..00000000
--- a/src/aig/fsim/fsimFront.c
+++ /dev/null
@@ -1,369 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fsimFront.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Fast sequential AIG simulator.]
-
-  Synopsis    [Simulation frontier.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: fsimFront.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fsimInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManStoreNum( Fsim_Man_t * p, int Num )
-{
-    unsigned x = (unsigned)Num;
-    assert( Num >= 0 );
-    while ( x & ~0x7f )
-    {
-        *p->pDataCur++ = (x & 0x7f) | 0x80;
-        x >>= 7;
-    }
-    *p->pDataCur++ = x;
-    assert( p->pDataCur - p->pDataAig < p->nDataAig );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Fsim_ManRestoreNum( Fsim_Man_t * p )
-{
-    int ch, i, x = 0;
-    for ( i = 0; (ch = *p->pDataCur++) & 0x80; i++ )
-        x |= (ch & 0x7f) << (7 * i);
-    assert( p->pDataCur - p->pDataAig < p->nDataAig );
-    return x | (ch << (7 * i));
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManStoreObj( Fsim_Man_t * p, Fsim_Obj_t * pObj )
-{
-    if ( p->pDataAig2 )
-    {
-        *p->pDataCur2++ = pObj->iNode;
-        *p->pDataCur2++ = pObj->iFan0;
-        *p->pDataCur2++ = pObj->iFan1;
-        return;
-    }
-    if ( pObj->iFan0 && pObj->iFan1 ) // and
-    {
-        assert( pObj->iNode );
-        assert( pObj->iNode >= p->iNodePrev );
-        assert( (pObj->iNode << 1) > pObj->iFan0 );
-        assert( pObj->iFan0 > pObj->iFan1 );
-        Fsim_ManStoreNum( p, ((pObj->iNode - p->iNodePrev) << 2) | 3 );
-        Fsim_ManStoreNum( p, (pObj->iNode << 1) - pObj->iFan0 );
-        Fsim_ManStoreNum( p, pObj->iFan0 - pObj->iFan1 );
-        p->iNodePrev = pObj->iNode;
-    }
-    else if ( !pObj->iFan0 && !pObj->iFan1 ) // ci
-    {
-        assert( pObj->iNode );
-        assert( pObj->iNode >= p->iNodePrev );
-        Fsim_ManStoreNum( p, ((pObj->iNode - p->iNodePrev) << 2) | 1 );
-        p->iNodePrev = pObj->iNode;
-    }
-    else // if ( !pObj->iFan0 && pObj->iFan1 ) // co
-    {
-        assert( pObj->iNode == 0 );
-        assert( pObj->iFan0 != 0 );
-        assert( pObj->iFan1 == 0 );
-        assert( ((p->iNodePrev << 1) | 1) >= pObj->iFan0 );
-        Fsim_ManStoreNum( p, (((p->iNodePrev << 1) | 1) - pObj->iFan0) << 1 );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Fsim_ManRestoreObj( Fsim_Man_t * p, Fsim_Obj_t * pObj )
-{
-    int iValue = Fsim_ManRestoreNum( p );
-    if ( (iValue & 3) == 3 ) // and
-    {
-        pObj->iNode = (iValue >> 2) + p->iNodePrev;
-        pObj->iFan0 = (pObj->iNode << 1) - Fsim_ManRestoreNum( p );
-        pObj->iFan1 = pObj->iFan0 - Fsim_ManRestoreNum( p );
-        p->iNodePrev = pObj->iNode;
-    }
-    else if ( (iValue & 3) == 1 ) // ci
-    {
-        pObj->iNode = (iValue >> 2) + p->iNodePrev;
-        pObj->iFan0 = 0;
-        pObj->iFan1 = 0;
-        p->iNodePrev = pObj->iNode;
-    }
-    else // if ( (iValue & 1) == 0 ) // co
-    {
-        pObj->iNode = 0;
-        pObj->iFan0 = ((p->iNodePrev << 1) | 1) - (iValue >> 1);
-        pObj->iFan1 = 0;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Determine the frontier.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Fsim_ManFrontFindNext( Fsim_Man_t * p, char * pFront )
-{
-    assert( p->iNumber < (1 << 30) - p->nFront );
-    while ( 1 )
-    {
-        if ( p->iNumber % p->nFront == 0 )
-            p->iNumber++;
-        if ( pFront[p->iNumber % p->nFront] == 0 )
-        {
-            pFront[p->iNumber % p->nFront] = 1;
-            return p->iNumber;
-        }
-        p->iNumber++;
-    }
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Verifies the frontier.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fsim_ManVerifyFront( Fsim_Man_t * p )
-{
-    Fsim_Obj_t * pObj;
-    int * pFans0, * pFans1;  // representation of fanins
-    int * pFrontToId;        // mapping of nodes into frontier variables
-    int i, iVar0, iVar1;
-    pFans0 = ABC_ALLOC( int, p->nObjs );
-    pFans1 = ABC_ALLOC( int, p->nObjs );
-    pFans0[0] = pFans1[0] = 0;
-    pFans0[1] = pFans1[1] = 0;
-    pFrontToId = ABC_CALLOC( int, p->nFront );
-    if ( Aig_ObjRefs(Aig_ManConst1(p->pAig)) )
-        pFrontToId[1] = 1;
-    Fsim_ManForEachObj( p, pObj, i )
-    {
-        if ( pObj->iNode )
-            pFrontToId[pObj->iNode % p->nFront] = i;
-        iVar0 = Fsim_Lit2Var(pObj->iFan0);
-        iVar1 = Fsim_Lit2Var(pObj->iFan1);
-        pFans0[i] = Fsim_Var2Lit(pFrontToId[iVar0 % p->nFront], Fsim_LitIsCompl(pObj->iFan0));
-        pFans1[i] = Fsim_Var2Lit(pFrontToId[iVar1 % p->nFront], Fsim_LitIsCompl(pObj->iFan1));
-    }
-    for ( i = 0; i < p->nObjs; i++ )
-    {
-        assert( pFans0[i] == p->pFans0[i] );
-        assert( pFans1[i] == p->pFans1[i] );
-    }
-    ABC_FREE( pFrontToId );
-    ABC_FREE( pFans0 );
-    ABC_FREE( pFans1 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Determine the frontier.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fsim_ManFront( Fsim_Man_t * p, int fCompressAig )
-{
-    Fsim_Obj_t Obj, * pObj = &Obj;
-    char * pFront;    // places used for the frontier
-    int * pIdToFront; // mapping of nodes into frontier places
-    int i, iVar0, iVar1, nCrossCut = 0, nCrossCutMax = 0;
-    // start the frontier
-    pFront = ABC_CALLOC( char, p->nFront );
-    pIdToFront = ABC_ALLOC( int, p->nObjs );
-    pIdToFront[0] = -1;
-    pIdToFront[1] = -1;
-    // add constant node
-    p->iNumber = 1;
-    if ( p->pRefs[1] )
-    {
-        pIdToFront[1] = Fsim_ManFrontFindNext( p, pFront );
-        nCrossCut = 1;
-    }
-    // allocate room for data
-    if ( fCompressAig )
-    {
-        p->nDataAig = p->nObjs * 6;
-        p->pDataAig = ABC_ALLOC( unsigned char, p->nDataAig );
-        p->pDataCur = p->pDataAig;
-        p->iNodePrev = 0;
-    }
-    else
-    {
-        p->pDataAig2 = ABC_ALLOC( int, 3 * p->nObjs );
-        p->pDataCur2 = p->pDataAig2 + 6;
-    }
-    // iterate through the objects
-    for ( i = 2; i < p->nObjs; i++ )
-    {
-        if ( p->pFans0[i] == 0 ) // ci
-        {
-            // store node
-            pIdToFront[i] = Fsim_ManFrontFindNext( p, pFront );
-            pObj->iNode = pIdToFront[i];
-            pObj->iFan0 = 0;
-            pObj->iFan1 = 0;
-            Fsim_ManStoreObj( p, pObj );
-            // handle CIs without fanout
-            if ( p->pRefs[i] == 0 )
-            {
-                pFront[pIdToFront[i] % p->nFront] = 0;
-                pIdToFront[i] = -1;
-            }
-        }
-        else if ( p->pFans1[i] == 0 ) // co
-        {
-            assert( p->pRefs[i] == 0 );
-            // get the fanin
-            iVar0 = Fsim_Lit2Var(p->pFans0[i]);
-            assert( pIdToFront[iVar0] > 0 );
-            // store node
-            pObj->iNode = 0;
-            pObj->iFan0 = Fsim_Var2Lit(pIdToFront[iVar0], Fsim_LitIsCompl(p->pFans0[i]));
-            pObj->iFan1 = 0;
-            Fsim_ManStoreObj( p, pObj );
-            // deref the fanin
-            if ( --p->pRefs[iVar0] == 0 )
-            {
-                pFront[pIdToFront[iVar0] % p->nFront] = 0;
-                pIdToFront[iVar0] = -1;
-                nCrossCut--;
-            }
-        }
-        else
-        {
-            // get the fanins
-            iVar0 = Fsim_Lit2Var(p->pFans0[i]);
-            assert( pIdToFront[iVar0] > 0 );
-            iVar1 = Fsim_Lit2Var(p->pFans1[i]);
-            assert( pIdToFront[iVar1] > 0 );
-            // store node
-            pIdToFront[i] = Fsim_ManFrontFindNext( p, pFront );
-            pObj->iNode = pIdToFront[i];
-            pObj->iFan0 = Fsim_Var2Lit(pIdToFront[iVar0], Fsim_LitIsCompl(p->pFans0[i]));
-            pObj->iFan1 = Fsim_Var2Lit(pIdToFront[iVar1], Fsim_LitIsCompl(p->pFans1[i]));
-            Fsim_ManStoreObj( p, pObj );
-            // deref the fanins
-            if ( --p->pRefs[iVar0] == 0 )
-            {
-                pFront[pIdToFront[iVar0] % p->nFront] = 0;
-                pIdToFront[iVar0] = -1;
-                nCrossCut--;
-            }
-            if ( --p->pRefs[iVar1] == 0 )
-            {
-                pFront[pIdToFront[iVar1] % p->nFront] = 0;
-                pIdToFront[iVar1] = -1;
-                nCrossCut--;
-            }
-            // handle nodes without fanout (choice nodes)
-            if ( p->pRefs[i] == 0 )
-            {
-                pFront[pIdToFront[i] % p->nFront] = 0;
-                pIdToFront[i] = -1;
-            }
-        }
-        if ( p->pRefs[i] )
-            if ( nCrossCutMax < ++nCrossCut )
-                nCrossCutMax = nCrossCut;
-    }
-    assert( p->pDataAig2 == NULL || p->pDataCur2 - p->pDataAig2 == (3 * p->nObjs) );
-    assert( nCrossCut == 0 );
-    assert( nCrossCutMax == p->nCrossCutMax );
-    for ( i = 0; i < p->nFront; i++ )
-        assert( pFront[i] == 0 );
-    ABC_FREE( pFront );
-    ABC_FREE( pIdToFront );
-//    Fsim_ManVerifyFront( p );
-    ABC_FREE( p->pFans0 );
-    ABC_FREE( p->pFans1 );
-    ABC_FREE( p->pRefs );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fsim/fsimInt.h b/src/aig/fsim/fsimInt.h
deleted file mode 100644
index f5dee298..00000000
--- a/src/aig/fsim/fsimInt.h
+++ /dev/null
@@ -1,138 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fsimInt.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Fast sequential AIG simulator.]
-
-  Synopsis    [Internal declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: fsimInt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __FSIM_INT_H__
-#define __FSIM_INT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include "saig.h"
-#include "fsim.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-// simulation object
-typedef struct Fsim_Obj_t_ Fsim_Obj_t;
-struct Fsim_Obj_t_
-{
-    int             iNode;        // the node ID
-    int             iFan0;        // the first fanin
-    int             iFan1;        // the second fanin
-};
-
-// fast sequential simulation manager
-struct Fsim_Man_t_
-{
-    // parameters
-    Aig_Man_t *     pAig;         // the AIG to be used for simulation
-    int             nWords;       // the number of simulation words
-    // AIG representation
-    int             nPis;         // the number of primary inputs
-    int             nPos;         // the number of primary outputs
-    int             nCis;         // the number of combinational inputs
-    int             nCos;         // the number of combinational outputs
-    int             nNodes;       // the number of internal nodes
-    int             nObjs;        // nCis + nNodes + nCos + 2
-    int *           pFans0;       // fanin0 for all objects
-    int *           pFans1;       // fanin1 for all objects
-    int *           pRefs;        // reference counter for each node
-    int *           pRefsCopy;    // reference counter for each node
-    Vec_Int_t *     vCis2Ids;     // mapping of CIs into their PI ids
-    Vec_Int_t *     vLos;         // register outputs
-    Vec_Int_t *     vLis;         // register inputs
-    // cross-cut representation
-    int             nCrossCut;    // temporary cross-cut variable 
-    int             nCrossCutMax; // maximum cross-cut variable
-    int             nFront;       // the size of frontier
-    // derived AIG representation
-    int             nDataAig;     // the length of allocated data
-    unsigned char * pDataAig;     // AIG representation
-    unsigned char * pDataCur;     // AIG representation (current position)
-    int             iNodePrev;    // previous extracted value
-    int             iNumber;      // the number of the last object
-    Fsim_Obj_t      Obj;          // current object
-    // temporary AIG representation
-    int *           pDataAig2;    // temporary representation
-    int *           pDataCur2;    // AIG representation (current position)
-    // simulation information
-    unsigned *      pDataSim;     // simulation data
-    unsigned *      pDataSimCis;  // simulation data for CIs
-    unsigned *      pDataSimCos;  // simulation data for COs
-    // other information
-    int *           pData1;
-    int *           pData2;
-};
-
-static inline unsigned * Fsim_SimData( Fsim_Man_t * p, int i )    { return p->pDataSim + i * p->nWords;    }
-static inline unsigned * Fsim_SimDataCi( Fsim_Man_t * p, int i )  { return p->pDataSimCis + i * p->nWords; }
-static inline unsigned * Fsim_SimDataCo( Fsim_Man_t * p, int i )  { return p->pDataSimCos + i * p->nWords; }
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-static inline int  Fsim_Var2Lit( int Var, int fCompl )  { return Var + Var + fCompl; }
-static inline int  Fsim_Lit2Var( int Lit )              { return Lit >> 1;           }
-static inline int  Fsim_LitIsCompl( int Lit )           { return Lit & 1;            }
-static inline int  Fsim_LitNot( int Lit )               { return Lit ^ 1;            }
-static inline int  Fsim_LitNotCond( int Lit, int c )    { return Lit ^ (int)(c > 0); }
-static inline int  Fsim_LitRegular( int Lit )           { return Lit & ~01;          }
-
-#define Fsim_ManForEachObj( p, pObj, i )\
-    for ( i = 2, p->pDataCur = p->pDataAig, p->iNodePrev = 0, pObj = &p->Obj;\
-        i < p->nObjs && Fsim_ManRestoreObj( p, pObj ); i++ )
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== fsimFront.c ========================================================*/
-extern void                Fsim_ManFront( Fsim_Man_t * p, int fCompressAig );
-/*=== fsimMan.c ==========================================================*/
-extern Fsim_Man_t *        Fsim_ManCreate( Aig_Man_t * pAig );
-extern void                Fsim_ManDelete( Fsim_Man_t * p );
-extern void                Fsim_ManTest( Aig_Man_t * pAig );
- 
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/fsim/fsimMan.c b/src/aig/fsim/fsimMan.c
deleted file mode 100644
index ea0cab43..00000000
--- a/src/aig/fsim/fsimMan.c
+++ /dev/null
@@ -1,212 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fsimMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Fast sequential AIG simulator.]
-
-  Synopsis    [Simulation manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: fsimMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fsimInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates fast simulation manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fsim_ManCreate_rec( Fsim_Man_t * p, Aig_Obj_t * pObj )
-{
-    int iFan0, iFan1, iTemp;
-    assert( !Aig_IsComplement(pObj) );
-    if ( pObj->iData )
-        return pObj->iData;
-    assert( !Aig_ObjIsConst1(pObj) );
-    if ( Aig_ObjIsNode(pObj) )
-    {
-        iFan0 = Fsim_ManCreate_rec( p, Aig_ObjFanin0(pObj) );
-        iFan1 = Fsim_ManCreate_rec( p, Aig_ObjFanin1(pObj) );
-        assert( iFan0 != iFan1 );
-        if ( --p->pRefs[iFan0] == 0 )
-            p->nCrossCut--;
-        iFan0 = Fsim_Var2Lit( iFan0, Aig_ObjFaninC0(pObj) );
-        if ( --p->pRefs[iFan1] == 0 )
-            p->nCrossCut--;
-        iFan1 = Fsim_Var2Lit( iFan1, Aig_ObjFaninC1(pObj) );
-        if ( p->pAig->pEquivs )
-            Fsim_ManCreate_rec( p, Aig_ObjEquiv(p->pAig, pObj) );
-    }
-    else if ( Aig_ObjIsPo(pObj) )
-    {
-        assert( Aig_ObjRefs(pObj) == 0 );
-        iFan0 = Fsim_ManCreate_rec( p, Aig_ObjFanin0(pObj) );
-        if ( --p->pRefs[iFan0] == 0 )
-            p->nCrossCut--;
-        iFan0 = Fsim_Var2Lit( iFan0, Aig_ObjFaninC0(pObj) );
-        iFan1 = 0;
-    }
-    else
-    {
-        iFan0 = iFan1 = 0;
-        Vec_IntPush( p->vCis2Ids, Aig_ObjPioNum(pObj) );
-    }
-    if ( iFan0 < iFan1 )
-        iTemp = iFan0, iFan0 = iFan1, iFan1 = iTemp;
-    p->pFans0[p->nObjs] = iFan0;
-    p->pFans1[p->nObjs] = iFan1;
-    p->pRefs[p->nObjs]  = Aig_ObjRefs(pObj);
-    if ( p->pRefs[p->nObjs] )
-        if ( p->nCrossCutMax < ++p->nCrossCut ) 
-            p->nCrossCutMax = p->nCrossCut;
-    return pObj->iData = p->nObjs++;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates fast simulation manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Fsim_Man_t * Fsim_ManCreate( Aig_Man_t * pAig )
-{
-    Fsim_Man_t * p;
-    Aig_Obj_t * pObj;
-    int i, nObjs;
-    Aig_ManCleanData( pAig );
-    p = (Fsim_Man_t *)ABC_ALLOC( Fsim_Man_t, 1 );
-    memset( p, 0, sizeof(Fsim_Man_t) );
-    p->pAig = pAig;
-    p->nPis = Saig_ManPiNum(pAig);
-    p->nPos = Saig_ManPoNum(pAig);
-    p->nCis = Aig_ManPiNum(pAig);
-    p->nCos = Aig_ManPoNum(pAig);
-    p->nNodes = Aig_ManNodeNum(pAig);
-    nObjs = p->nCis + p->nCos + p->nNodes + 2;
-    p->pFans0 = ABC_ALLOC( int, nObjs );
-    p->pFans1 = ABC_ALLOC( int, nObjs );
-    p->pRefs  = ABC_ALLOC( int, nObjs );
-    p->vCis2Ids = Vec_IntAlloc( Aig_ManPiNum(pAig) );
-    // add objects (0=unused; 1=const1)
-    p->pFans0[0] = p->pFans1[0] = 0;
-    p->pFans0[1] = p->pFans1[1] = 0;
-    p->pRefs[0] = 0;
-    p->nObjs = 2;
-    pObj = Aig_ManConst1( pAig );
-    pObj->iData = 1;
-    p->pRefs[1] = Aig_ObjRefs(pObj);
-    if ( p->pRefs[1] )
-        p->nCrossCut = 1;
-    Aig_ManForEachPi( pAig, pObj, i )
-        if ( Aig_ObjRefs(pObj) == 0 )
-            Fsim_ManCreate_rec( p, pObj );
-    Aig_ManForEachPo( pAig, pObj, i )
-        Fsim_ManCreate_rec( p, pObj );
-    assert( Vec_IntSize(p->vCis2Ids) == Aig_ManPiNum(pAig) );
-    assert( p->nObjs == nObjs );
-    // check references
-    assert( p->nCrossCut == 0 );
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        assert( p->pRefs[pObj->iData] == 0 );
-        p->pRefs[pObj->iData] = Aig_ObjRefs(pObj);
-    }
-    // collect flop outputs
-    p->vLos = Vec_IntAlloc( Aig_ManRegNum(pAig) );
-    Saig_ManForEachLo( pAig, pObj, i )
-        Vec_IntPush( p->vLos, pObj->iData );
-    // collect flop inputs
-    p->vLis = Vec_IntAlloc( Aig_ManRegNum(pAig) );
-    Saig_ManForEachLi( pAig, pObj, i )
-        Vec_IntPush( p->vLis, pObj->iData );
-    // determine the frontier size
-    p->nFront = 1 + (int)(1.1 * p->nCrossCutMax); 
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deletes fast simulation manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fsim_ManDelete( Fsim_Man_t * p )
-{
-    Vec_IntFree( p->vCis2Ids );
-    Vec_IntFree( p->vLos );
-    Vec_IntFree( p->vLis );
-    ABC_FREE( p->pDataAig2 );
-    ABC_FREE( p->pDataAig );
-    ABC_FREE( p->pFans0 );
-    ABC_FREE( p->pFans1 );
-    ABC_FREE( p->pRefs );
-    ABC_FREE( p->pDataSim );
-    ABC_FREE( p->pDataSimCis );
-    ABC_FREE( p->pDataSimCos );
-    ABC_FREE( p->pData1 );
-    ABC_FREE( p->pData2 );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Testing procedure.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fsim_ManTest( Aig_Man_t * pAig )
-{
-    Fsim_Man_t * p;
-    p = Fsim_ManCreate( pAig );
-    Fsim_ManFront( p, 0 );
-    Fsim_ManDelete( p );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fsim/fsimSim.c b/src/aig/fsim/fsimSim.c
deleted file mode 100644
index 56aeab2f..00000000
--- a/src/aig/fsim/fsimSim.c
+++ /dev/null
@@ -1,567 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fsimSim.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Fast sequential AIG simulator.]
-
-  Synopsis    [Simulation procedures.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: fsimSim.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fsimInt.h"
-#include "ssw.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManSimInfoRandom( Fsim_Man_t * p, unsigned * pInfo )
-{
-    int w;
-    for ( w = p->nWords-1; w >= 0; w-- )
-        pInfo[w] = Aig_ManRandom( 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManSimInfoZero( Fsim_Man_t * p, unsigned * pInfo )
-{
-    int w;
-    for ( w = p->nWords-1; w >= 0; w-- )
-        pInfo[w] = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns index of the first pattern that failed.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Fsim_ManSimInfoIsZero( Fsim_Man_t * p, unsigned * pInfo )
-{
-    int w;
-    for ( w = p->nWords-1; w >= 0; w-- )
-        if ( pInfo[w] )
-            return 32*(w-1) + Aig_WordFindFirstBit( pInfo[w] );
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManSimInfoOne( Fsim_Man_t * p, unsigned * pInfo )
-{
-    int w;
-    for ( w = p->nWords-1; w >= 0; w-- )
-        pInfo[w] = ~0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManSimInfoCopy( Fsim_Man_t * p, unsigned * pInfo, unsigned * pInfo0 )
-{
-    int w;
-    for ( w = p->nWords-1; w >= 0; w-- )
-        pInfo[w] = pInfo0[w];
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManSimulateCi( Fsim_Man_t * p, int iNode, int iCi )
-{
-    unsigned * pInfo  = Fsim_SimData( p, iNode % p->nFront );
-    unsigned * pInfo0 = Fsim_SimDataCi( p, iCi );
-    int w;
-    for ( w = p->nWords-1; w >= 0; w-- )
-        pInfo[w] = pInfo0[w];
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManSimulateCo( Fsim_Man_t * p, int iCo, int iFan0 )
-{
-    unsigned * pInfo  = Fsim_SimDataCo( p, iCo );
-    unsigned * pInfo0 = Fsim_SimData( p, Fsim_Lit2Var(iFan0) % p->nFront );
-    int w;
-    if ( Fsim_LitIsCompl(iFan0) )
-        for ( w = p->nWords-1; w >= 0; w-- )
-            pInfo[w] = ~pInfo0[w];
-    else //if ( !Fsim_LitIsCompl(iFan0) )
-        for ( w = p->nWords-1; w >= 0; w-- )
-            pInfo[w] = pInfo0[w];
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManSimulateNode( Fsim_Man_t * p, int iNode, int iFan0, int iFan1 )
-{
-    unsigned * pInfo  = Fsim_SimData( p, iNode % p->nFront );
-    unsigned * pInfo0 = Fsim_SimData( p, Fsim_Lit2Var(iFan0) % p->nFront );
-    unsigned * pInfo1 = Fsim_SimData( p, Fsim_Lit2Var(iFan1) % p->nFront );
-    int w;
-    if ( Fsim_LitIsCompl(iFan0) && Fsim_LitIsCompl(iFan1) )
-        for ( w = p->nWords-1; w >= 0; w-- )
-            pInfo[w] = ~(pInfo0[w] | pInfo1[w]);
-    else if ( Fsim_LitIsCompl(iFan0) && !Fsim_LitIsCompl(iFan1) )
-        for ( w = p->nWords-1; w >= 0; w-- )
-            pInfo[w] = ~pInfo0[w] & pInfo1[w];
-    else if ( !Fsim_LitIsCompl(iFan0) && Fsim_LitIsCompl(iFan1) )
-        for ( w = p->nWords-1; w >= 0; w-- )
-            pInfo[w] = pInfo0[w] & ~pInfo1[w];
-    else //if ( !Fsim_LitIsCompl(iFan0) && !Fsim_LitIsCompl(iFan1) )
-        for ( w = p->nWords-1; w >= 0; w-- )
-            pInfo[w] = pInfo0[w] & pInfo1[w];
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManSimInfoInit( Fsim_Man_t * p )
-{
-    int iPioNum, i;
-    Vec_IntForEachEntry( p->vCis2Ids, iPioNum, i )
-    {
-        if ( iPioNum < p->nPis )
-            Fsim_ManSimInfoRandom( p, Fsim_SimDataCi(p, i) );
-        else
-            Fsim_ManSimInfoZero( p, Fsim_SimDataCi(p, i) );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManSimInfoTransfer( Fsim_Man_t * p )
-{
-    int iPioNum, i;
-    Vec_IntForEachEntry( p->vCis2Ids, iPioNum, i )
-    {
-        if ( iPioNum < p->nPis )
-            Fsim_ManSimInfoRandom( p, Fsim_SimDataCi(p, i) );
-        else
-            Fsim_ManSimInfoCopy( p, Fsim_SimDataCi(p, i), Fsim_SimDataCo(p, p->nPos+iPioNum-p->nPis) );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Fsim_ManRestoreNum( Fsim_Man_t * p )
-{
-    int ch, i, x = 0;
-    for ( i = 0; (ch = *p->pDataCur++) & 0x80; i++ )
-        x |= (ch & 0x7f) << (7 * i);
-    assert( p->pDataCur - p->pDataAig < p->nDataAig );
-    return x | (ch << (7 * i));
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Fsim_ManRestoreObj( Fsim_Man_t * p, Fsim_Obj_t * pObj )
-{
-    int iValue = Fsim_ManRestoreNum( p );
-    if ( (iValue & 3) == 3 ) // and
-    {
-        pObj->iNode = (iValue >> 2) + p->iNodePrev;
-        pObj->iFan0 = (pObj->iNode << 1) - Fsim_ManRestoreNum( p );
-        pObj->iFan1 = pObj->iFan0 - Fsim_ManRestoreNum( p );
-        p->iNodePrev = pObj->iNode;
-    }
-    else if ( (iValue & 3) == 1 ) // ci
-    {
-        pObj->iNode = (iValue >> 2) + p->iNodePrev;
-        pObj->iFan0 = 0;
-        pObj->iFan1 = 0;
-        p->iNodePrev = pObj->iNode;
-    }
-    else // if ( (iValue & 1) == 0 ) // co
-    {
-        pObj->iNode = 0;
-        pObj->iFan0 = ((p->iNodePrev << 1) | 1) - (iValue >> 1);
-        pObj->iFan1 = 0;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManSimulateRound2( Fsim_Man_t * p )
-{
-    Fsim_Obj_t * pObj;
-    int i, iCis = 0, iCos = 0;
-    if ( Aig_ObjRefs(Aig_ManConst1(p->pAig)) )
-        Fsim_ManSimInfoOne( p, Fsim_SimData(p, 1) );
-    Fsim_ManForEachObj( p, pObj, i )
-    {
-        if ( pObj->iFan0 == 0 )
-            Fsim_ManSimulateCi( p, pObj->iNode, iCis++ );
-        else if ( pObj->iFan1 == 0 )
-            Fsim_ManSimulateCo( p, iCos++, pObj->iFan0 );
-        else
-            Fsim_ManSimulateNode( p, pObj->iNode, pObj->iFan0, pObj->iFan1 );
-    }
-    assert( iCis == p->nCis );
-    assert( iCos == p->nCos );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManSimulateRound( Fsim_Man_t * p )
-{
-    int * pCur, * pEnd;
-    int iCis = 0, iCos = 0;
-    if ( p->pDataAig2 == NULL )
-    {
-        Fsim_ManSimulateRound2( p );
-        return;
-    }
-    if ( Aig_ObjRefs(Aig_ManConst1(p->pAig)) )
-        Fsim_ManSimInfoOne( p, Fsim_SimData(p, 1) );
-    pCur = p->pDataAig2 + 6;
-    pEnd = p->pDataAig2 + 3 * p->nObjs;
-    while ( pCur < pEnd )
-    {
-        if ( pCur[1] == 0 )
-            Fsim_ManSimulateCi( p, pCur[0], iCis++ );
-        else if ( pCur[2] == 0 )
-            Fsim_ManSimulateCo( p, iCos++, pCur[1] );
-        else
-            Fsim_ManSimulateNode( p, pCur[0], pCur[1], pCur[2] );
-        pCur += 3;
-    }
-    assert( iCis == p->nCis );
-    assert( iCos == p->nCos );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fsim_ManSimulateRoundTest( Fsim_Man_t * p )
-{
-    Fsim_Obj_t * pObj;
-    int i, clk = clock();
-    Fsim_ManForEachObj( p, pObj, i )
-    {
-    }
-//    ABC_PRT( "Unpacking time", p->pPars->nIters * (clock() - clk) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns index of the PO and pattern that failed it.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Fsim_ManCheckPos( Fsim_Man_t * p, int * piPo, int * piPat )
-{
-    int i, iPat;
-    for ( i = 0; i < p->nPos; i++ )
-    {
-        iPat = Fsim_ManSimInfoIsZero( p, Fsim_SimDataCo(p, i) );
-        if ( iPat >= 0 )
-        {
-            *piPo = i;
-            *piPat = iPat;
-            return 1;
-        }
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the counter-example.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Abc_Cex_t * Fsim_ManGenerateCounter( Aig_Man_t * pAig, int iFrame, int iOut, int nWords, int iPat, Vec_Int_t * vCis2Ids )
-{
-    Abc_Cex_t * p;
-    unsigned * pData;
-    int f, i, w, iPioId, Counter;
-    p = Abc_CexAlloc( Aig_ManRegNum(pAig), Saig_ManPiNum(pAig), iFrame+1 );
-    p->iFrame = iFrame;
-    p->iPo = iOut;
-    // fill in the binary data
-    Aig_ManRandom( 1 );
-    Counter = p->nRegs;
-    pData = ABC_ALLOC( unsigned, nWords );
-    for ( f = 0; f <= iFrame; f++, Counter += p->nPis )
-    for ( i = 0; i < Aig_ManPiNum(pAig); i++ )
-    {
-        iPioId = Vec_IntEntry( vCis2Ids, i );
-        if ( iPioId >= p->nPis )
-            continue;
-        for ( w = nWords-1; w >= 0; w-- )
-            pData[w] = Aig_ManRandom( 0 );
-        if ( Aig_InfoHasBit( pData, iPat ) )
-            Aig_InfoSetBit( p->pData, Counter + iPioId );
-    }
-    ABC_FREE( pData );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fsim_ManSimulate( Aig_Man_t * pAig, Fsim_ParSim_t * pPars )
-{
-    Fsim_Man_t * p;
-    Sec_MtrStatus_t Status;
-    int i, iOut, iPat, clk, clkTotal = clock(), clk2, clk2Total = 0;
-    assert( Aig_ManRegNum(pAig) > 0 );
-    if ( pPars->fCheckMiter )
-    {
-        Status = Sec_MiterStatus( pAig );
-        if ( Status.nSat > 0 )
-        {
-            printf( "Miter is trivially satisfiable (output %d).\n", Status.iOut );
-            return 1;
-        }
-        if ( Status.nUndec == 0 )
-        {
-            printf( "Miter is trivially unsatisfiable.\n" );
-            return 0;
-        }
-    }
-    // create manager
-    clk = clock();
-    p = Fsim_ManCreate( pAig );
-    p->nWords = pPars->nWords;
-    if ( pPars->fVerbose )
-    {
-        printf( "Obj = %8d (%8d). Cut = %6d. Front = %6d.  FrtMem = %7.2f Mb. ", 
-            p->nObjs, p->nCis + p->nNodes, p->nCrossCutMax, p->nFront, 
-            4.0*p->nWords*(p->nFront)/(1<<20) );
-        ABC_PRT( "Time", clock() - clk );
-    }
-    // create simulation frontier
-    clk = clock();
-    Fsim_ManFront( p, pPars->fCompressAig );
-    if ( pPars->fVerbose )
-    {
-        printf( "Max ID = %8d. Log max ID = %2d.  AigMem = %7.2f Mb (%5.2f byte/obj).  ", 
-            p->iNumber, Aig_Base2Log(p->iNumber), 
-            1.0*(p->pDataCur-p->pDataAig)/(1<<20), 
-            1.0*(p->pDataCur-p->pDataAig)/p->nObjs ); 
-        ABC_PRT( "Time", clock() - clk );
-    }
-    // perform simulation
-    Aig_ManRandom( 1 );
-    assert( p->pDataSim == NULL );
-    p->pDataSim = ABC_ALLOC( unsigned, p->nWords * p->nFront );
-    p->pDataSimCis = ABC_ALLOC( unsigned, p->nWords * p->nCis );
-    p->pDataSimCos = ABC_ALLOC( unsigned, p->nWords * p->nCos );
-    Fsim_ManSimInfoInit( p );
-    for ( i = 0; i < pPars->nIters; i++ )
-    { 
-        Fsim_ManSimulateRound( p );
-        if ( pPars->fVerbose )
-        {
-            printf( "Frame %4d out of %4d and timeout %3d sec. ", i+1, pPars->nIters, pPars->TimeLimit );
-            printf( "Time = %7.2f sec\r", (1.0*clock()-clkTotal)/CLOCKS_PER_SEC );
-        }
-        if ( pPars->fCheckMiter && Fsim_ManCheckPos( p, &iOut, &iPat ) )
-        {
-            assert( pAig->pSeqModel == NULL );
-            pAig->pSeqModel = Fsim_ManGenerateCounter( pAig, i, iOut, p->nWords, iPat, p->vCis2Ids );
-            if ( pPars->fVerbose )
-            printf( "Miter is satisfiable after simulation (output %d).\n", iOut );
-            break;
-        }
-        if ( (clock() - clkTotal)/CLOCKS_PER_SEC >= pPars->TimeLimit )
-            break;
-        clk2 = clock();
-        if ( i < pPars->nIters - 1 )
-            Fsim_ManSimInfoTransfer( p );
-        clk2Total += clock() - clk2;
-    }
-    if ( pAig->pSeqModel == NULL )
-        printf( "No bug detected after %d frames with time limit %d seconds.\n", i+1, pPars->TimeLimit );
-    if ( pPars->fVerbose )
-    {
-        printf( "Maxcut = %8d.  AigMem = %7.2f Mb.  SimMem = %7.2f Mb.  ", 
-            p->nCrossCutMax, 
-            p->pDataAig2? 12.0*p->nObjs/(1<<20) : 1.0*(p->pDataCur-p->pDataAig)/(1<<20), 
-            4.0*p->nWords*(p->nFront+p->nCis+p->nCos)/(1<<20) );
-        ABC_PRT( "Sim time", clock() - clkTotal );
-
-//        ABC_PRT( "Additional time", clk2Total );
-//        Fsim_ManSimulateRoundTest( p );
-//        Fsim_ManSimulateRoundTest2( p );
-    }
-    Fsim_ManDelete( p );
-    return pAig->pSeqModel != NULL;
-
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fsim/fsimSwitch.c b/src/aig/fsim/fsimSwitch.c
deleted file mode 100644
index 3eef2d4c..00000000
--- a/src/aig/fsim/fsimSwitch.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fsimSwitch.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Fast sequential AIG simulator.]
-
-  Synopsis    [Computing switching activity.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: fsimSwitch.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fsimInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fsim/fsimTsim.c b/src/aig/fsim/fsimTsim.c
deleted file mode 100644
index e05e6409..00000000
--- a/src/aig/fsim/fsimTsim.c
+++ /dev/null
@@ -1,415 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [fsimTsim.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Fast sequential AIG simulator.]
-
-  Synopsis    [Varius utilities.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: fsimTsim.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "fsimInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-#define FSIM_ZER 1
-#define FSIM_ONE 2
-#define FSIM_UND 3
-
-static inline int Aig_XsimNotCond( int Value, int fCompl )   
-{ 
-    if ( Value == FSIM_UND )
-        return FSIM_UND;
-    if ( Value == FSIM_ZER + fCompl )
-        return FSIM_ZER;
-    return FSIM_ONE;
-}
-static inline int Aig_XsimAndCond( int Value0, int fCompl0, int Value1, int fCompl1 )   
-{ 
-    if ( Value0 == FSIM_UND || Value1 == FSIM_UND )
-        return FSIM_UND;
-    if ( Value0 == FSIM_ZER + fCompl0 || Value1 == FSIM_ZER + fCompl1 )
-        return FSIM_ZER;
-    return FSIM_ONE;
-}
-
-static inline int Fsim_ManTerSimInfoGet( unsigned * pInfo, int i )
-{
-    return 3 & (pInfo[i >> 4] >> ((i & 15) << 1));
-}
-static inline void Fsim_ManTerSimInfoSet( unsigned * pInfo, int i, int Value )
-{
-    assert( Value >= FSIM_ZER && Value <= FSIM_UND );
-    Value ^= Fsim_ManTerSimInfoGet( pInfo, i );
-    pInfo[i >> 4] ^= (Value << ((i & 15) << 1));
-}
-
-static inline unsigned * Fsim_ManTerStateNext( unsigned * pState, int nWords )                      { return *((unsigned **)(pState + nWords));  }
-static inline void       Fsim_ManTerStateSetNext( unsigned * pState, int nWords, unsigned * pNext ) { *((unsigned **)(pState + nWords)) = pNext; }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManTerSimulateCi( Fsim_Man_t * p, int iNode, int iCi )
-{
-    Fsim_ManTerSimInfoSet( p->pDataSim, iNode, Fsim_ManTerSimInfoGet(p->pDataSimCis, iCi) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManTerSimulateCo( Fsim_Man_t * p, int iCo, int iFan0 )
-{
-    int Value = Fsim_ManTerSimInfoGet( p->pDataSim, Fsim_Lit2Var(iFan0) );
-    Fsim_ManTerSimInfoSet( p->pDataSimCos, iCo, Aig_XsimNotCond( Value, Fsim_LitIsCompl(iFan0) ) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManTerSimulateNode( Fsim_Man_t * p, int iNode, int iFan0, int iFan1 )
-{
-    int Value0 = Fsim_ManTerSimInfoGet( p->pDataSim, Fsim_Lit2Var(iFan0) );
-    int Value1 = Fsim_ManTerSimInfoGet( p->pDataSim, Fsim_Lit2Var(iFan1) );
-    Fsim_ManTerSimInfoSet( p->pDataSim, iNode, Aig_XsimAndCond( Value0, Fsim_LitIsCompl(iFan0), Value1, Fsim_LitIsCompl(iFan1) ) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManTerSimInfoInit( Fsim_Man_t * p )
-{
-    int iPioNum, i;
-    Vec_IntForEachEntry( p->vCis2Ids, iPioNum, i )
-    {
-        if ( iPioNum < p->nPis )
-            Fsim_ManTerSimInfoSet( p->pDataSimCis, i, FSIM_UND );
-        else
-            Fsim_ManTerSimInfoSet( p->pDataSimCis, i, FSIM_ZER );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManTerSimInfoTransfer( Fsim_Man_t * p )
-{
-    int iPioNum, i;
-    Vec_IntForEachEntry( p->vCis2Ids, iPioNum, i )
-    {
-        if ( iPioNum < p->nPis )
-            Fsim_ManTerSimInfoSet( p->pDataSimCis, i, FSIM_UND );
-        else
-            Fsim_ManTerSimInfoSet( p->pDataSimCis, i, Fsim_ManTerSimInfoGet( p->pDataSimCos, p->nPos+iPioNum-p->nPis ) );
-    }
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Computes hash value of the node using its simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fsim_ManTerStateHash( unsigned * pState, int nWords, int nTableSize )
-{
-    static int s_FPrimes[128] = { 
-        1009, 1049, 1093, 1151, 1201, 1249, 1297, 1361, 1427, 1459, 
-        1499, 1559, 1607, 1657, 1709, 1759, 1823, 1877, 1933, 1997, 
-        2039, 2089, 2141, 2213, 2269, 2311, 2371, 2411, 2467, 2543, 
-        2609, 2663, 2699, 2741, 2797, 2851, 2909, 2969, 3037, 3089, 
-        3169, 3221, 3299, 3331, 3389, 3461, 3517, 3557, 3613, 3671, 
-        3719, 3779, 3847, 3907, 3943, 4013, 4073, 4129, 4201, 4243, 
-        4289, 4363, 4441, 4493, 4549, 4621, 4663, 4729, 4793, 4871, 
-        4933, 4973, 5021, 5087, 5153, 5227, 5281, 5351, 5417, 5471, 
-        5519, 5573, 5651, 5693, 5749, 5821, 5861, 5923, 6011, 6073, 
-        6131, 6199, 6257, 6301, 6353, 6397, 6481, 6563, 6619, 6689, 
-        6737, 6803, 6863, 6917, 6977, 7027, 7109, 7187, 7237, 7309, 
-        7393, 7477, 7523, 7561, 7607, 7681, 7727, 7817, 7877, 7933, 
-        8011, 8039, 8059, 8081, 8093, 8111, 8123, 8147
-    };
-    unsigned uHash;
-    int i;
-    uHash = 0;
-    for ( i = 0; i < nWords; i++ )
-        uHash ^= pState[i] * s_FPrimes[i & 0x7F];
-    return uHash % nTableSize;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts value into the table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Fsim_ManTerStateLookup( unsigned * pState, int nWords, unsigned ** pBins, int nBins )
-{
-    unsigned * pEntry;
-    int Hash;
-    Hash = Fsim_ManTerStateHash( pState, nWords, nBins );
-    for ( pEntry = pBins[Hash]; pEntry; pEntry = Fsim_ManTerStateNext(pEntry, nWords) )
-        if ( !memcmp( pEntry, pState, sizeof(unsigned) * nWords ) )
-            return 1;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts value into the table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fsim_ManTerStateInsert( unsigned * pState, int nWords, unsigned ** pBins, int nBins )
-{
-    int Hash = Fsim_ManTerStateHash( pState, nWords, nBins );
-    assert( !Fsim_ManTerStateLookup( pState, nWords, pBins, nBins ) );
-    Fsim_ManTerStateSetNext( pState, nWords, pBins[Hash] );
-    pBins[Hash] = pState;    
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts value into the table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Fsim_ManTerStateCreate( unsigned * pInfo, int nPis, int nCis, int nWords )
-{
-    unsigned * pRes;
-    int i;
-    pRes = (unsigned *)ABC_CALLOC( char, sizeof(unsigned) * nWords + sizeof(unsigned *) );
-    for ( i = nPis; i < nCis; i++ )
-        Fsim_ManTerSimInfoSet( pRes, i-nPis, Fsim_ManTerSimInfoGet(pInfo, i) );
-    return pRes;    
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts value into the table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Fsim_ManTerStatePrint( unsigned * pState, int nRegs )
-{
-    int i, Value, nZeros = 0, nOnes = 0, nDcs = 0;
-    for ( i = 0; i < nRegs; i++ )
-    {
-        Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
-        if ( Value == 1 )
-            printf( "0" ), nZeros++;
-        else if ( Value == 2 )
-            printf( "1" ), nOnes++;
-        else if ( Value == 3 )
-            printf( "x" ), nDcs++;
-        else
-            assert( 0 );
-    }
-    printf( " (0=%5d, 1=%5d, x=%5d)\n", nZeros, nOnes, nDcs );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Fsim_ManTerSimulateRound( Fsim_Man_t * p )
-{
-    int * pCur, * pEnd;
-    int iCis = 0, iCos = 0;
-    if ( Aig_ObjRefs(Aig_ManConst1(p->pAig)) )
-        Fsim_ManTerSimInfoSet( p->pDataSimCis, 1, FSIM_ONE );
-    pCur = p->pDataAig2 + 6;
-    pEnd = p->pDataAig2 + 3 * p->nObjs;
-    while ( pCur < pEnd )
-    {
-        if ( pCur[1] == 0 )
-            Fsim_ManTerSimulateCi( p, pCur[0], iCis++ );
-        else if ( pCur[2] == 0 )
-            Fsim_ManTerSimulateCo( p, iCos++, pCur[1] );
-        else
-            Fsim_ManTerSimulateNode( p, pCur[0], pCur[1], pCur[2] );
-        pCur += 3;
-    }
-    assert( iCis == p->nCis );
-    assert( iCos == p->nCos );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Fsim_ManTerSimulate( Aig_Man_t * pAig, int fVerbose )
-{
-    Fsim_Man_t * p;
-    Vec_Ptr_t * vStates;
-    unsigned ** pBins, * pState;
-    int i, nWords, nBins, clk, clkTotal = clock();
-    assert( Aig_ManRegNum(pAig) > 0 );
-    // create manager
-    clk = clock();
-    p = Fsim_ManCreate( pAig );
-    if ( fVerbose )
-    {
-        printf( "Obj = %8d (%8d). Cut = %6d. Front = %6d.  FrtMem = %7.2f Mb. ", 
-            p->nObjs, p->nCis + p->nNodes, p->nCrossCutMax, p->nFront, 
-            4.0*Aig_BitWordNum(2 * p->nFront)/(1<<20) );
-        ABC_PRT( "Time", clock() - clk );
-    }
-    // create simulation frontier
-    clk = clock();
-    Fsim_ManFront( p, 0 );
-    if ( fVerbose )
-    {
-        printf( "Max ID = %8d. Log max ID = %2d.  AigMem = %7.2f Mb (%5.2f byte/obj).  ", 
-            p->iNumber, Aig_Base2Log(p->iNumber), 
-            1.0*(p->pDataCur-p->pDataAig)/(1<<20), 
-            1.0*(p->pDataCur-p->pDataAig)/p->nObjs ); 
-        ABC_PRT( "Time", clock() - clk );
-    }
-    // allocate storage for terminary states
-    nWords  = Aig_BitWordNum( 2*Aig_ManRegNum(pAig) );
-    vStates = Vec_PtrAlloc( 1000 );
-    nBins   = Aig_PrimeCudd( 500 );
-    pBins   = ABC_ALLOC( unsigned *, nBins );
-    memset( pBins, 0, sizeof(unsigned *) * nBins );
-    // perform simulation
-    assert( p->pDataSim == NULL );
-    p->pDataSim = ABC_ALLOC( unsigned, Aig_BitWordNum(2 * p->nFront) * sizeof(unsigned) );
-    p->pDataSimCis = ABC_ALLOC( unsigned, Aig_BitWordNum(2 * p->nCis) * sizeof(unsigned) );
-    p->pDataSimCos = ABC_ALLOC( unsigned, Aig_BitWordNum(2 * p->nCos) * sizeof(unsigned) );
-    Fsim_ManTerSimInfoInit( p );
-    // hash the first state
-    pState = Fsim_ManTerStateCreate( p->pDataSimCis, p->nPis, p->nCis, nWords );
-    Vec_PtrPush( vStates, pState );
-    Fsim_ManTerStateInsert( pState, nWords, pBins, nBins );
-    // perform simuluation till convergence
-    for ( i = 0; ; i++ )
-    {
-        Fsim_ManTerSimulateRound( p );
-        Fsim_ManTerSimInfoTransfer( p );
-        // hash the first state
-        pState = Fsim_ManTerStateCreate( p->pDataSimCis, p->nPis, p->nCis, nWords );
-        Vec_PtrPush( vStates, pState );
-        if ( Fsim_ManTerStateLookup(pState, nWords, pBins, nBins) )
-            break;
-        Fsim_ManTerStateInsert( pState, nWords, pBins, nBins );
-    }
-    if ( fVerbose )
-    {
-        printf( "Maxcut = %8d.  AigMem = %7.2f Mb.  SimMem = %7.2f Mb.  ", 
-            p->nCrossCutMax, 
-            p->pDataAig2? 12.0*p->nObjs/(1<<20) : 1.0*(p->pDataCur-p->pDataAig)/(1<<20), 
-            4.0*(Aig_BitWordNum(2 * p->nFront)+Aig_BitWordNum(2 * p->nCis)+Aig_BitWordNum(2 * p->nCos))/(1<<20) );
-        ABC_PRT( "Sim time", clock() - clkTotal );
-    }
-    ABC_FREE( pBins );
-    Fsim_ManDelete( p );
-    return vStates;
-
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/fsim/module.make b/src/aig/fsim/module.make
deleted file mode 100644
index 91c733c3..00000000
--- a/src/aig/fsim/module.make
+++ /dev/null
@@ -1,6 +0,0 @@
-SRC +=    src/aig/fsim/fsimCore.c \
-    src/aig/fsim/fsimFront.c \
-    src/aig/fsim/fsimMan.c \
-    src/aig/fsim/fsimSim.c \
-    src/aig/fsim/fsimSwitch.c \
-    src/aig/fsim/fsimTsim.c
diff --git a/src/aig/gia/gia.h b/src/aig/gia/gia.h
index 14fd4d6e..a784ab92 100644
--- a/src/aig/gia/gia.h
+++ b/src/aig/gia/gia.h
@@ -18,8 +18,8 @@
 
 ***********************************************************************/
  
-#ifndef __GIA_H__
-#define __GIA_H__
+#ifndef ABC__aig__gia__gia_h
+#define ABC__aig__gia__gia_h
 
 
 ////////////////////////////////////////////////////////////////////////
@@ -32,8 +32,8 @@
 #include <assert.h>
 #include <time.h>
 
-#include "vec.h"
-#include "utilCex.h"
+#include "src/misc/vec/vec.h"
+#include "src/misc/util/utilCex.h"
 #include "giaAbs.h"
 
 ////////////////////////////////////////////////////////////////////////
@@ -210,19 +210,6 @@ struct Gia_ParVta_t_
     int            iFrame;        // the number of frames covered 
 };
 
-static inline int          Gia_IntAbs( int n )                    { return (n < 0)? -n : n;                                     }
-static inline int          Gia_Float2Int( float Val )             { union { int x; float y; } v; v.y = Val; return v.x;         }
-static inline float        Gia_Int2Float( int Num )               { union { int x; float y; } v; v.x = Num; return v.y;         }
-static inline int          Gia_Base2Log( unsigned n )             { int r; if ( n < 2 ) return n; for ( r = 0, n--; n; n >>= 1, r++ ); return r; }
-static inline int          Gia_Base10Log( unsigned n )            { int r; if ( n < 2 ) return n; for ( r = 0, n--; n; n /= 10, r++ ); return r; }
-static inline int          Gia_Base16Log( unsigned n )            { int r; if ( n < 2 ) return n; for ( r = 0, n--; n; n /= 16, r++ ); return r; }
-static inline char *       Gia_UtilStrsav( char * s )             { return s ? strcpy(ABC_ALLOC(char, strlen(s)+1), s) : NULL;  }
-static inline int          Gia_BitWordNum( int nBits )            { return (nBits>>5) + ((nBits&31) > 0);                       }
-static inline int          Gia_TruthWordNum( int nVars )          { return nVars <= 5 ? 1 : (1 << (nVars - 5));                 }
-static inline int          Gia_InfoHasBit( unsigned * p, int i )  { return (p[(i)>>5] & (1<<((i) & 31))) > 0;                   }
-static inline void         Gia_InfoSetBit( unsigned * p, int i )  { p[(i)>>5] |= (1<<((i) & 31));                               }
-static inline void         Gia_InfoXorBit( unsigned * p, int i )  { p[(i)>>5] ^= (1<<((i) & 31));                               }
-static inline unsigned     Gia_InfoMask( int nVar )               { return (~(unsigned)0) >> (32-nVar);                         }
 static inline unsigned     Gia_ObjCutSign( unsigned ObjId )       { return (1 << (ObjId & 31));                                 }
 static inline int          Gia_WordHasOneBit( unsigned uWord )    { return (uWord & (uWord-1)) == 0;                            }
 static inline int          Gia_WordHasOnePair( unsigned uWord )   { return Gia_WordHasOneBit(uWord & (uWord>>1) & 0x55555555);  }
@@ -246,7 +233,7 @@ static inline int Gia_WordFindFirstBit( unsigned uWord )
 static inline int Gia_ManTruthIsConst0( unsigned * pIn, int nVars )
 {
     int w;
-    for ( w = Gia_TruthWordNum(nVars)-1; w >= 0; w-- )
+    for ( w = Abc_TruthWordNum(nVars)-1; w >= 0; w-- )
         if ( pIn[w] )
             return 0;
     return 1;
@@ -254,7 +241,7 @@ static inline int Gia_ManTruthIsConst0( unsigned * pIn, int nVars )
 static inline int Gia_ManTruthIsConst1( unsigned * pIn, int nVars )
 {
     int w;
-    for ( w = Gia_TruthWordNum(nVars)-1; w >= 0; w-- )
+    for ( w = Abc_TruthWordNum(nVars)-1; w >= 0; w-- )
         if ( pIn[w] != ~(unsigned)0 )
             return 0;
     return 1;
@@ -262,35 +249,28 @@ static inline int Gia_ManTruthIsConst1( unsigned * pIn, int nVars )
 static inline void Gia_ManTruthCopy( unsigned * pOut, unsigned * pIn, int nVars )
 {
     int w;
-    for ( w = Gia_TruthWordNum(nVars)-1; w >= 0; w-- )
+    for ( w = Abc_TruthWordNum(nVars)-1; w >= 0; w-- )
         pOut[w] = pIn[w];
 }
 static inline void Gia_ManTruthClear( unsigned * pOut, int nVars )
 {
     int w;
-    for ( w = Gia_TruthWordNum(nVars)-1; w >= 0; w-- )
+    for ( w = Abc_TruthWordNum(nVars)-1; w >= 0; w-- )
         pOut[w] = 0;
 }
 static inline void Gia_ManTruthFill( unsigned * pOut, int nVars )
 {
     int w;
-    for ( w = Gia_TruthWordNum(nVars)-1; w >= 0; w-- )
+    for ( w = Abc_TruthWordNum(nVars)-1; w >= 0; w-- )
         pOut[w] = ~(unsigned)0;
 }
 static inline void Gia_ManTruthNot( unsigned * pOut, unsigned * pIn, int nVars )
 {
     int w;
-    for ( w = Gia_TruthWordNum(nVars)-1; w >= 0; w-- )
+    for ( w = Abc_TruthWordNum(nVars)-1; w >= 0; w-- )
         pOut[w] = ~pIn[w];
 }
 
-static inline int          Gia_Var2Lit( int Var, int fCompl )  { return Var + Var + fCompl; }
-static inline int          Gia_Lit2Var( int Lit )              { return Lit >> 1;           }
-static inline int          Gia_LitIsCompl( int Lit )           { return Lit & 1;            }
-static inline int          Gia_LitNot( int Lit )               { return Lit ^ 1;            }
-static inline int          Gia_LitNotCond( int Lit, int c )    { return Lit ^ (int)(c > 0); }
-static inline int          Gia_LitRegular( int Lit )           { return Lit & ~01;          }
-
 static inline Gia_Obj_t *  Gia_Regular( Gia_Obj_t * p )        { return (Gia_Obj_t *)((ABC_PTRUINT_T)(p) & ~01); }
 static inline Gia_Obj_t *  Gia_Not( Gia_Obj_t * p )            { return (Gia_Obj_t *)((ABC_PTRUINT_T)(p) ^  01); }
 static inline Gia_Obj_t *  Gia_NotCond( Gia_Obj_t * p, int c ) { return (Gia_Obj_t *)((ABC_PTRUINT_T)(p) ^ (c)); }
@@ -358,33 +338,33 @@ static inline int          Gia_ObjFaninId0( Gia_Obj_t * pObj, int ObjId )      {
 static inline int          Gia_ObjFaninId1( Gia_Obj_t * pObj, int ObjId )      { return ObjId - pObj->iDiff1;    }
 static inline int          Gia_ObjFaninId0p( Gia_Man_t * p, Gia_Obj_t * pObj ) { return Gia_ObjFaninId0( pObj, Gia_ObjId(p, pObj) );              }
 static inline int          Gia_ObjFaninId1p( Gia_Man_t * p, Gia_Obj_t * pObj ) { return Gia_ObjFaninId1( pObj, Gia_ObjId(p, pObj) );              }
-static inline int          Gia_ObjFaninLit0( Gia_Obj_t * pObj, int ObjId )     { return Gia_Var2Lit( Gia_ObjFaninId0(pObj, ObjId), Gia_ObjFaninC0(pObj) ); }
-static inline int          Gia_ObjFaninLit1( Gia_Obj_t * pObj, int ObjId )     { return Gia_Var2Lit( Gia_ObjFaninId1(pObj, ObjId), Gia_ObjFaninC1(pObj) ); }
-static inline int          Gia_ObjFaninLit0p( Gia_Man_t * p, Gia_Obj_t * pObj) { return Gia_Var2Lit( Gia_ObjFaninId0p(p, pObj), Gia_ObjFaninC0(pObj) );    }
-static inline int          Gia_ObjFaninLit1p( Gia_Man_t * p, Gia_Obj_t * pObj) { return Gia_Var2Lit( Gia_ObjFaninId1p(p, pObj), Gia_ObjFaninC1(pObj) );    }
+static inline int          Gia_ObjFaninLit0( Gia_Obj_t * pObj, int ObjId )     { return Abc_Var2Lit( Gia_ObjFaninId0(pObj, ObjId), Gia_ObjFaninC0(pObj) ); }
+static inline int          Gia_ObjFaninLit1( Gia_Obj_t * pObj, int ObjId )     { return Abc_Var2Lit( Gia_ObjFaninId1(pObj, ObjId), Gia_ObjFaninC1(pObj) ); }
+static inline int          Gia_ObjFaninLit0p( Gia_Man_t * p, Gia_Obj_t * pObj) { return Abc_Var2Lit( Gia_ObjFaninId0p(p, pObj), Gia_ObjFaninC0(pObj) );    }
+static inline int          Gia_ObjFaninLit1p( Gia_Man_t * p, Gia_Obj_t * pObj) { return Abc_Var2Lit( Gia_ObjFaninId1p(p, pObj), Gia_ObjFaninC1(pObj) );    }
 static inline void         Gia_ObjFlipFaninC0( Gia_Obj_t * pObj )              { assert( Gia_ObjIsCo(pObj) ); pObj->fCompl0 ^= 1;          }
 static inline int          Gia_ObjWhatFanin( Gia_Obj_t * pObj, Gia_Obj_t * pFanin )  { return Gia_ObjFanin0(pObj) == pFanin ? 0 : (Gia_ObjFanin1(pObj) == pFanin ? 1 : -1); }
 
-static inline Gia_Obj_t *  Gia_ObjCopy( Gia_Man_t * p, Gia_Obj_t * pObj )      { return Gia_ManObj( p, Gia_Lit2Var(pObj->Value) );                              }
+static inline Gia_Obj_t *  Gia_ObjCopy( Gia_Man_t * p, Gia_Obj_t * pObj )      { return Gia_ManObj( p, Abc_Lit2Var(pObj->Value) );                              }
 
-static inline int          Gia_ObjFanin0Copy( Gia_Obj_t * pObj )               { return Gia_LitNotCond( Gia_ObjFanin0(pObj)->Value, Gia_ObjFaninC0(pObj) );     }
-static inline int          Gia_ObjFanin1Copy( Gia_Obj_t * pObj )               { return Gia_LitNotCond( Gia_ObjFanin1(pObj)->Value, Gia_ObjFaninC1(pObj) );     }
+static inline int          Gia_ObjFanin0Copy( Gia_Obj_t * pObj )               { return Abc_LitNotCond( Gia_ObjFanin0(pObj)->Value, Gia_ObjFaninC0(pObj) );     }
+static inline int          Gia_ObjFanin1Copy( Gia_Obj_t * pObj )               { return Abc_LitNotCond( Gia_ObjFanin1(pObj)->Value, Gia_ObjFaninC1(pObj) );     }
 
 static inline int          Gia_ObjCopyF( Gia_Man_t * p, int f, Gia_Obj_t * pObj )               { return p->pCopies[Gia_ManObjNum(p) * f + Gia_ObjId(p,pObj)];  }
 static inline void         Gia_ObjSetCopyF( Gia_Man_t * p, int f, Gia_Obj_t * pObj, int iLit )  { p->pCopies[Gia_ManObjNum(p) * f + Gia_ObjId(p,pObj)] = iLit;  }
 
-static inline int          Gia_ObjFanin0CopyF( Gia_Man_t * p, int f, Gia_Obj_t * pObj )         { return Gia_LitNotCond(Gia_ObjCopyF(p, f, Gia_ObjFanin0(pObj)), Gia_ObjFaninC0(pObj));  }
-static inline int          Gia_ObjFanin1CopyF( Gia_Man_t * p, int f, Gia_Obj_t * pObj )         { return Gia_LitNotCond(Gia_ObjCopyF(p, f, Gia_ObjFanin1(pObj)), Gia_ObjFaninC1(pObj));  }
+static inline int          Gia_ObjFanin0CopyF( Gia_Man_t * p, int f, Gia_Obj_t * pObj )         { return Abc_LitNotCond(Gia_ObjCopyF(p, f, Gia_ObjFanin0(pObj)), Gia_ObjFaninC0(pObj));  }
+static inline int          Gia_ObjFanin1CopyF( Gia_Man_t * p, int f, Gia_Obj_t * pObj )         { return Abc_LitNotCond(Gia_ObjCopyF(p, f, Gia_ObjFanin1(pObj)), Gia_ObjFaninC1(pObj));  }
 
-static inline Gia_Obj_t *  Gia_ObjFromLit( Gia_Man_t * p, int iLit )           { return Gia_NotCond( Gia_ManObj(p, Gia_Lit2Var(iLit)), Gia_LitIsCompl(iLit) );  }
-static inline int          Gia_ObjToLit( Gia_Man_t * p, Gia_Obj_t * pObj )     { return Gia_Var2Lit( Gia_ObjId(p, Gia_Regular(pObj)), Gia_IsComplement(pObj) ); }
+static inline Gia_Obj_t *  Gia_ObjFromLit( Gia_Man_t * p, int iLit )           { return Gia_NotCond( Gia_ManObj(p, Abc_Lit2Var(iLit)), Abc_LitIsCompl(iLit) );  }
+static inline int          Gia_ObjToLit( Gia_Man_t * p, Gia_Obj_t * pObj )     { return Abc_Var2Lit( Gia_ObjId(p, Gia_Regular(pObj)), Gia_IsComplement(pObj) ); }
 static inline int          Gia_ObjPhaseRealLit( Gia_Man_t * p, int iLit )      { return Gia_ObjPhaseReal( Gia_ObjFromLit(p, iLit) );        }
 
 static inline int          Gia_ObjLevel( Gia_Man_t * p, Gia_Obj_t * pObj )     { return Vec_IntGetEntry(p->vLevels, Gia_ObjId(p,pObj));     }
 static inline int          Gia_ObjLevelId( Gia_Man_t * p, int Id )             { return Vec_IntGetEntry(p->vLevels, Id);                    }
 static inline void         Gia_ObjSetLevel( Gia_Man_t * p, Gia_Obj_t * pObj, int l )  { Vec_IntSetEntry(p->vLevels, Gia_ObjId(p,pObj), l);  }
 static inline void         Gia_ObjSetCoLevel( Gia_Man_t * p, Gia_Obj_t * pObj )  { assert( Gia_ObjIsCo(pObj)  ); Gia_ObjSetLevel( p, pObj, Gia_ObjLevel(p,Gia_ObjFanin0(pObj)) );                                                }
-static inline void         Gia_ObjSetAndLevel( Gia_Man_t * p, Gia_Obj_t * pObj ) { assert( Gia_ObjIsAnd(pObj) ); Gia_ObjSetLevel( p, pObj, 1+ABC_MAX(Gia_ObjLevel(p,Gia_ObjFanin0(pObj)),Gia_ObjLevel(p,Gia_ObjFanin1(pObj))) ); }
+static inline void         Gia_ObjSetAndLevel( Gia_Man_t * p, Gia_Obj_t * pObj ) { assert( Gia_ObjIsAnd(pObj) ); Gia_ObjSetLevel( p, pObj, 1+Abc_MaxInt(Gia_ObjLevel(p,Gia_ObjFanin0(pObj)),Gia_ObjLevel(p,Gia_ObjFanin1(pObj))) ); }
 
 static inline int          Gia_ObjRefs( Gia_Man_t * p, Gia_Obj_t * pObj )      { assert( p->pRefs); return p->pRefs[Gia_ObjId(p, pObj)];    }
 static inline int          Gia_ObjRefsId( Gia_Man_t * p, int Id )              { assert( p->pRefs); return p->pRefs[Id];                    }
@@ -457,17 +437,17 @@ static inline int Gia_ManAppendAnd( Gia_Man_t * p, int iLit0, int iLit1 )
     assert( iLit0 != iLit1 );
     if ( iLit0 < iLit1 )
     {
-        pObj->iDiff0  = Gia_ObjId(p, pObj) - Gia_Lit2Var(iLit0);
-        pObj->fCompl0 = Gia_LitIsCompl(iLit0);
-        pObj->iDiff1  = Gia_ObjId(p, pObj) - Gia_Lit2Var(iLit1);
-        pObj->fCompl1 = Gia_LitIsCompl(iLit1);
+        pObj->iDiff0  = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit0);
+        pObj->fCompl0 = Abc_LitIsCompl(iLit0);
+        pObj->iDiff1  = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit1);
+        pObj->fCompl1 = Abc_LitIsCompl(iLit1);
     }
     else
     {
-        pObj->iDiff1  = Gia_ObjId(p, pObj) - Gia_Lit2Var(iLit0);
-        pObj->fCompl1 = Gia_LitIsCompl(iLit0);
-        pObj->iDiff0  = Gia_ObjId(p, pObj) - Gia_Lit2Var(iLit1);
-        pObj->fCompl0 = Gia_LitIsCompl(iLit1);
+        pObj->iDiff1  = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit0);
+        pObj->fCompl1 = Abc_LitIsCompl(iLit0);
+        pObj->iDiff0  = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit1);
+        pObj->fCompl0 = Abc_LitIsCompl(iLit1);
     }
     if ( p->pFanData )
     {
@@ -480,8 +460,8 @@ static inline int Gia_ManAppendCo( Gia_Man_t * p, int iLit0 )
 { 
     Gia_Obj_t * pObj = Gia_ManAppendObj( p );
     pObj->fTerm = 1;
-    pObj->iDiff0  = Gia_ObjId(p, pObj) - Gia_Lit2Var(iLit0);
-    pObj->fCompl0 = Gia_LitIsCompl(iLit0);
+    pObj->iDiff0  = Gia_ObjId(p, pObj) - Abc_Lit2Var(iLit0);
+    pObj->fCompl0 = Abc_LitIsCompl(iLit0);
     pObj->iDiff1  = Vec_IntSize( p->vCos );
     Vec_IntPush( p->vCos, Gia_ObjId(p, pObj) );
     if ( p->pFanData )
@@ -490,9 +470,9 @@ static inline int Gia_ManAppendCo( Gia_Man_t * p, int iLit0 )
 }
 static inline int Gia_ManAppendMux( Gia_Man_t * p, int iCtrl, int iData1, int iData0 )  
 { 
-    int iTemp0 = Gia_ManAppendAnd( p, Gia_LitNot(iCtrl), iData0 );
+    int iTemp0 = Gia_ManAppendAnd( p, Abc_LitNot(iCtrl), iData0 );
     int iTemp1 = Gia_ManAppendAnd( p, iCtrl, iData1 );
-    return Gia_LitNotCond( Gia_ManAppendAnd( p, Gia_LitNot(iTemp0), Gia_LitNot(iTemp1) ), 1 );
+    return Abc_LitNotCond( Gia_ManAppendAnd( p, Abc_LitNot(iTemp0), Abc_LitNot(iTemp1) ), 1 );
 }
 
 #define GIA_ZER 1
@@ -587,7 +567,7 @@ static inline int         Gia_ObjLutFanin( Gia_Man_t * p, int Id, int i )   { re
 #define Gia_ManForEachObjVec( vVec, p, pObj, i )                        \
     for ( i = 0; (i < Vec_IntSize(vVec)) && ((pObj) = Gia_ManObj(p, Vec_IntEntry(vVec,i))); i++ )
 #define Gia_ManForEachObjVecLit( vVec, p, pObj, fCompl, i )             \
-    for ( i = 0; (i < Vec_IntSize(vVec)) && ((pObj) = Gia_ManObj(p, Gia_Lit2Var(Vec_IntEntry(vVec,i)))) && (((fCompl) = Gia_LitIsCompl(Vec_IntEntry(vVec,i))),1); i++ )
+    for ( i = 0; (i < Vec_IntSize(vVec)) && ((pObj) = Gia_ManObj(p, Abc_Lit2Var(Vec_IntEntry(vVec,i)))) && (((fCompl) = Abc_LitIsCompl(Vec_IntEntry(vVec,i))),1); i++ )
 #define Gia_ManForEachObjReverse( p, pObj, i )                          \
     for ( i = p->nObjs - 1; (i > 0) && ((pObj) = Gia_ManObj(p, i)); i-- )
 #define Gia_ManForEachAnd( p, pObj, i )                                 \
@@ -817,7 +797,6 @@ extern Gia_Man_t *         Gia_ManReduceConst( Gia_Man_t * pAig, int fVerbose );
 /*=== giaUtil.c ===========================================================*/
 extern unsigned            Gia_ManRandom( int fReset );
 extern void                Gia_ManRandomInfo( Vec_Ptr_t * vInfo, int iInputStart, int iWordStart, int iWordStop );
-extern unsigned int        Gia_PrimeCudd( unsigned int p );
 extern char *              Gia_TimeStamp();
 extern char *              Gia_FileNameGenericAppend( char * pBase, char * pSuffix );
 extern void                Gia_ManIncrementTravId( Gia_Man_t * p );
diff --git a/src/aig/gia/giaAbs.c b/src/aig/gia/giaAbs.c
index e9861977..e25ff7fb 100644
--- a/src/aig/gia/giaAbs.c
+++ b/src/aig/gia/giaAbs.c
@@ -20,7 +20,7 @@
  
 #include "gia.h"
 #include "giaAig.h"
-#include "saig.h"
+#include "src/aig/saig/saig.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -472,7 +472,7 @@ int Gia_ManGlaPbaPerform( Gia_Man_t * pGia, void * pPars, int fNewSolver )
             // this obj was abstracted before
             assert( Gia_ObjIsAnd(pObj) || Gia_ObjIsRo(pGia, pObj) );
             // if corresponding AIG object is not abstracted, remove abstraction
-            if ( !Vec_IntEntry(vGateClasses, Gia_Lit2Var(pObj->Value)) )
+            if ( !Vec_IntEntry(vGateClasses, Abc_Lit2Var(pObj->Value)) )
             {
                 Vec_IntWriteEntry( pGia->vGateClasses, i, 0 );
                 Counter++;
diff --git a/src/aig/gia/giaAbs.h b/src/aig/gia/giaAbs.h
index 090d5dca..366a4d8a 100644
--- a/src/aig/gia/giaAbs.h
+++ b/src/aig/gia/giaAbs.h
@@ -18,8 +18,8 @@
 
 ***********************************************************************/
  
-#ifndef __GIA_ABS_H__
-#define __GIA_ABS_H__
+#ifndef ABC__aig__gia__giaAbs_h
+#define ABC__aig__gia__giaAbs_h
 
 
 ////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/gia/giaAbsVta.c b/src/aig/gia/giaAbsVta.c
index fe30d0f0..3e7f2a01 100644
--- a/src/aig/gia/giaAbsVta.c
+++ b/src/aig/gia/giaAbsVta.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "gia.h"
-#include "satSolver2.h"
+#include "src/sat/bsat/satSolver2.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -210,7 +210,7 @@ Vec_Int_t * Gia_VtaConvertToGla( Gia_Man_t * p, Vec_Int_t * vAbs )
     int i, Entry, nFrames = Vec_IntEntry( vAbs, 0 );
     assert( Vec_IntEntry(vAbs, nFrames+1) == Vec_IntSize(vAbs) );
     // get the bitmask
-    nObjMask = (1 << Gia_Base2Log(nObjs)) - 1;
+    nObjMask = (1 << Abc_Base2Log(nObjs)) - 1;
     assert( nObjs <= nObjMask );
     // go through objects
     vPresent = Vec_IntStart( nObjs );
@@ -248,7 +248,7 @@ static inline int Vta_ManReadFrameStart( Vec_Int_t * p, int nWords )
             pTotal[w] |= pThis[i];
     }
     for ( i = nWords * 32 - 1; i >= 0; i-- )
-        if ( Gia_InfoHasBit(pTotal, i) )
+        if ( Abc_InfoHasBit(pTotal, i) )
         {
             ABC_FREE( pTotal );
             return i+1;
@@ -716,7 +716,7 @@ Abc_Cex_t * Vta_ManRefineAbstraction( Vta_Man_t * p )
             if ( Gia_ObjIsRo(p->pGia, pObj) )
                 assert( pThis->iFrame == 0 && pThis->Value == VTA_VAR0 );
             else if ( Gia_ObjIsPi(p->pGia, pObj) && pThis->Value == VTA_VAR1 )
-                Gia_InfoSetBit( pCex->pData, pCex->nRegs + pThis->iFrame * pCex->nPis + Gia_ObjCioId(pObj) );
+                Abc_InfoSetBit( pCex->pData, pCex->nRegs + pThis->iFrame * pCex->nPis + Gia_ObjCioId(pObj) );
         }
     }
     // perform refinement
@@ -776,7 +776,7 @@ Vta_Man_t * Vga_ManStart( Gia_Man_t * pGia, Gia_ParVta_t * pPars )
     p->pBins       = ABC_CALLOC( int, p->nBins );
     p->vOrder      = Vec_IntAlloc( 1013 );
     // abstraction
-    p->nObjBits    = Gia_Base2Log( Gia_ManObjNum(pGia) );
+    p->nObjBits    = Abc_Base2Log( Gia_ManObjNum(pGia) );
     p->nObjMask    = (1 << p->nObjBits) - 1;
     assert( Gia_ManObjNum(pGia) <= (int)p->nObjMask );
     p->nWords      = 1;
@@ -922,7 +922,8 @@ Vec_Int_t * Vta_ManUnsatCore( int iLit, Vec_Int_t * vCla2Var, sat_solver2 * pSat
 ***********************************************************************/
 void Vta_ManAbsPrintFrame( Vta_Man_t * p, Vec_Int_t * vCore, int nFrames )
 {
-    unsigned * pInfo, * pCountAll, * pCountUni;
+    unsigned * pInfo;
+    int * pCountAll, * pCountUni;
     int i, k, iFrame, iObj, Entry;
     // print info about frames
     pCountAll = ABC_CALLOC( int, nFrames + 1 );
@@ -933,9 +934,9 @@ void Vta_ManAbsPrintFrame( Vta_Man_t * p, Vec_Int_t * vCore, int nFrames )
         iFrame = (Entry >> p->nObjBits);
         assert( iFrame < nFrames );
         pInfo  = (unsigned *)Vec_IntEntryP( p->vSeens, p->nWords * iObj );
-        if ( Gia_InfoHasBit(pInfo, iFrame) == 0 )
+        if ( Abc_InfoHasBit(pInfo, iFrame) == 0 )
         {
-            Gia_InfoSetBit( pInfo, iFrame );
+            Abc_InfoSetBit( pInfo, iFrame );
             pCountUni[iFrame+1]++;
             pCountUni[0]++;
         }
@@ -1062,7 +1063,7 @@ static inline int Vga_ManGetOutLit( Vta_Man_t * p, int f )
     Gia_Obj_t * pObj = Gia_ManPo(p->pGia, 0);
     Vta_Obj_t * pThis = Vga_ManFind( p, Gia_ObjFaninId0p(p->pGia, pObj), f );
     assert( pThis != NULL && pThis->fAdded );
-    return Gia_Var2Lit( Vta_ObjId(p, pThis), Gia_ObjFaninC0(pObj) );
+    return Abc_Var2Lit( Vta_ObjId(p, pThis), Gia_ObjFaninC0(pObj) );
 }
 
 /**Function*************************************************************
@@ -1105,7 +1106,7 @@ int Gia_VtaPerform( Gia_Man_t * pAig, Gia_ParVta_t * pPars )
         if ( f < p->pPars->nFramesStart )
         {
             // load this timeframe
-            Vga_ManLoadSlice( p, Vec_PtrEntry(p->vFrames, f), 0 );
+            Vga_ManLoadSlice( p, (Vec_Int_t *)Vec_PtrEntry(p->vFrames, f), 0 );
             // run SAT solver
             vCore = Vta_ManUnsatCore( Vga_ManGetOutLit(p, f), p->vCla2Var, p->pSat, pPars->nConfLimit, p->pPars->fVerbose, &Status );
             assert( (vCore != NULL) == (Status == 1) );
@@ -1123,7 +1124,7 @@ int Gia_VtaPerform( Gia_Man_t * pAig, Gia_ParVta_t * pPars )
                 {
                     pObj = Gia_ManObj( p->pGia, pThis->iObj );
                     if ( Gia_ObjIsPi(p->pGia, pObj) && sat_solver2_var_value(p->pSat, Vta_ObjId(p, pThis)) )
-                        Gia_InfoSetBit( pCex->pData, pCex->nRegs + pThis->iFrame * pCex->nPis + Gia_ObjCioId(pObj) );
+                        Abc_InfoSetBit( pCex->pData, pCex->nRegs + pThis->iFrame * pCex->nPis + Gia_ObjCioId(pObj) );
                 }
             }
         }
@@ -1133,7 +1134,7 @@ int Gia_VtaPerform( Gia_Man_t * pAig, Gia_ParVta_t * pPars )
             // load the time frame
             int Limit = Abc_MinInt(5, p->pPars->nFramesStart);
             for ( i = 1; i <= Limit; i++ )
-                Vga_ManLoadSlice( p, Vec_PtrEntry(p->vCores, f-i), i );
+                Vga_ManLoadSlice( p, (Vec_Int_t *)Vec_PtrEntry(p->vCores, f-i), i );
             // iterate as long as there are counter-examples
             do {
                 vCore = Vta_ManUnsatCore( Vga_ManGetOutLit(p, f), p->vCla2Var, p->pSat, pPars->nConfLimit, pPars->fVerbose, &Status );
diff --git a/src/aig/gia/giaAig.c b/src/aig/gia/giaAig.c
index 00148451..6da633e0 100644
--- a/src/aig/gia/giaAig.c
+++ b/src/aig/gia/giaAig.c
@@ -19,9 +19,9 @@
 ***********************************************************************/
 
 #include "giaAig.h"
-#include "fra.h"
-#include "dch.h"
-#include "dar.h"
+#include "src/proof/fra/fra.h"
+#include "src/proof/dch/dch.h"
+#include "src/opt/dar/dar.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -30,8 +30,8 @@ ABC_NAMESPACE_IMPL_START
 ///                        DECLARATIONS                              ///
 ////////////////////////////////////////////////////////////////////////
 
-static inline int Gia_ObjChild0Copy( Aig_Obj_t * pObj )  { return Gia_LitNotCond( Aig_ObjFanin0(pObj)->iData, Aig_ObjFaninC0(pObj) ); }
-static inline int Gia_ObjChild1Copy( Aig_Obj_t * pObj )  { return Gia_LitNotCond( Aig_ObjFanin1(pObj)->iData, Aig_ObjFaninC1(pObj) ); }
+static inline int Gia_ObjChild0Copy( Aig_Obj_t * pObj )  { return Abc_LitNotCond( Aig_ObjFanin0(pObj)->iData, Aig_ObjFaninC0(pObj) ); }
+static inline int Gia_ObjChild1Copy( Aig_Obj_t * pObj )  { return Abc_LitNotCond( Aig_ObjFanin1(pObj)->iData, Aig_ObjFaninC1(pObj) ); }
 
 static inline Aig_Obj_t * Gia_ObjChild0Copy2( Aig_Obj_t ** ppNodes, Gia_Obj_t * pObj, int Id )  { return Aig_NotCond( ppNodes[Gia_ObjFaninId0(pObj, Id)], Gia_ObjFaninC0(pObj) ); }
 static inline Aig_Obj_t * Gia_ObjChild1Copy2( Aig_Obj_t ** ppNodes, Gia_Obj_t * pObj, int Id )  { return Aig_NotCond( ppNodes[Gia_ObjFaninId1(pObj, Id)], Gia_ObjFaninC1(pObj) ); }
@@ -64,8 +64,8 @@ void Gia_ManFromAig_rec( Gia_Man_t * pNew, Aig_Man_t * p, Aig_Obj_t * pObj )
     {
         int iObjNew, iNextNew;
         Gia_ManFromAig_rec( pNew, p, pNext );
-        iObjNew  = Gia_Lit2Var(pObj->iData);
-        iNextNew = Gia_Lit2Var(pNext->iData);
+        iObjNew  = Abc_Lit2Var(pObj->iData);
+        iNextNew = Abc_Lit2Var(pNext->iData);
         if ( pNew->pNexts )
             pNew->pNexts[iObjNew] = iNextNew;        
     }
@@ -89,7 +89,7 @@ Gia_Man_t * Gia_ManFromAig( Aig_Man_t * p )
     int i;
     // create the new manager
     pNew = Gia_ManStart( Aig_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->nConstrs = p->nConstrs;
     // create room to store equivalences
     if ( p->pEquivs )
@@ -128,7 +128,7 @@ Gia_Man_t * Gia_ManFromAigSimple( Aig_Man_t * p )
     int i;
     // create the new manager
     pNew = Gia_ManStart( Aig_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->nConstrs = p->nConstrs;
     // create the PIs
     Aig_ManCleanData( p );
@@ -167,7 +167,7 @@ Gia_Man_t * Gia_ManFromAigSwitch( Aig_Man_t * p )
     int i;
     // create the new manager
     pNew = Gia_ManStart( Aig_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->nConstrs = p->nConstrs;
     // create the PIs
     Aig_ManCleanData( p );
@@ -246,9 +246,9 @@ Aig_Man_t * Gia_ManToAig( Gia_Man_t * p, int fChoices )
     assert( !fChoices || (p->pNexts && p->pReprs) );
     // create the new manager
     pNew = Aig_ManStart( Gia_ManAndNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->nConstrs = p->nConstrs;
-//    pNew->pSpec = Gia_UtilStrsav( p->pName );
+//    pNew->pSpec = Abc_UtilStrsav( p->pName );
     // duplicate representation of choice nodes
     if ( fChoices )
         pNew->pEquivs = ABC_CALLOC( Aig_Obj_t *, Gia_ManObjNum(p) );
@@ -293,9 +293,9 @@ Aig_Man_t * Gia_ManToAigSkip( Gia_Man_t * p, int nOutDelta )
     assert( nOutDelta > 0 && Gia_ManCoNum(p) % nOutDelta == 0 );
     // create the new manager
     pNew = Aig_ManStart( Gia_ManAndNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->nConstrs = p->nConstrs;
-//    pNew->pSpec = Gia_UtilStrsav( p->pName );
+//    pNew->pSpec = Abc_UtilStrsav( p->pName );
     // create the PIs
     ppNodes = ABC_CALLOC( Aig_Obj_t *, Gia_ManObjNum(p) );
     ppNodes[0] = Aig_ManConst0(pNew);
@@ -334,7 +334,7 @@ Aig_Man_t * Gia_ManToAigSimple( Gia_Man_t * p )
     ppNodes = ABC_FALLOC( Aig_Obj_t *, Gia_ManObjNum(p) );
     // create the new manager
     pNew = Aig_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->nConstrs = p->nConstrs;
     // create the PIs
     Gia_ManForEachObj( p, pObj, i )
@@ -349,7 +349,7 @@ Aig_Man_t * Gia_ManToAigSimple( Gia_Man_t * p )
             ppNodes[i] = Aig_ManConst0(pNew);
         else
             assert( 0 );
-        pObj->Value = Gia_Var2Lit( Aig_ObjId(Aig_Regular(ppNodes[i])), Aig_IsComplement(ppNodes[i]) );
+        pObj->Value = Abc_Var2Lit( Aig_ObjId(Aig_Regular(ppNodes[i])), Aig_IsComplement(ppNodes[i]) );
         assert( i == 0 || Aig_ObjId(ppNodes[i]) == i );
     }
     Aig_ManSetRegNum( pNew, Gia_ManRegNum(p) );
@@ -402,8 +402,8 @@ void Gia_ManReprToAigRepr( Aig_Man_t * pAig, Gia_Man_t * pGia )
     // move pointers from AIG to GIA
     Aig_ManForEachObj( pAig, pObj, i )
     {
-        assert( i == 0 || !Gia_LitIsCompl(pObj->iData) );
-        pGiaObj = Gia_ManObj( pGia, Gia_Lit2Var(pObj->iData) );
+        assert( i == 0 || !Abc_LitIsCompl(pObj->iData) );
+        pGiaObj = Gia_ManObj( pGia, Abc_Lit2Var(pObj->iData) );
         pGiaObj->Value = i;
     }
     // set the pointers to the nodes in AIG
@@ -441,7 +441,7 @@ void Gia_ManReprToAigRepr2( Aig_Man_t * pAig, Gia_Man_t * pGia )
         pGiaRepr = Gia_ObjReprObj( pGia, i );
         if ( pGiaRepr == NULL )
             continue;
-        Aig_ObjCreateRepr( pAig, Aig_ManObj(pAig, Gia_Lit2Var(pGiaRepr->Value)), Aig_ManObj(pAig, Gia_Lit2Var(pGiaObj->Value)) );
+        Aig_ObjCreateRepr( pAig, Aig_ManObj(pAig, Abc_Lit2Var(pGiaRepr->Value)), Aig_ManObj(pAig, Abc_Lit2Var(pGiaObj->Value)) );
     }
 }
 
@@ -472,8 +472,8 @@ void Gia_ManReprFromAigRepr( Aig_Man_t * pAig, Gia_Man_t * pGia )
 //        Abc_Print( 1, "%d -> %d %d\n", i, Gia_ObjValue(pObjGia), Gia_ObjValue(pObjGia)/2 );
         if ( Gia_ObjIsCo(pObjGia) )
             continue;
-        assert( i == 0 || !Gia_LitIsCompl(Gia_ObjValue(pObjGia)) );
-        pObjAig  = Aig_ManObj( pAig, Gia_Lit2Var(Gia_ObjValue(pObjGia)) );
+        assert( i == 0 || !Abc_LitIsCompl(Gia_ObjValue(pObjGia)) );
+        pObjAig  = Aig_ManObj( pAig, Abc_Lit2Var(Gia_ObjValue(pObjGia)) );
         pObjAig->iData = i;
     }
     Aig_ManForEachObj( pAig, pObjAig, i )
diff --git a/src/aig/gia/giaAig.h b/src/aig/gia/giaAig.h
index 1c0a24d5..6522a5bc 100644
--- a/src/aig/gia/giaAig.h
+++ b/src/aig/gia/giaAig.h
@@ -18,15 +18,15 @@
 
 ***********************************************************************/
  
-#ifndef __GIA_AIG_H__
-#define __GIA_AIG_H__
+#ifndef ABC__aig__gia__giaAig_h
+#define ABC__aig__gia__giaAig_h
 
 
 ////////////////////////////////////////////////////////////////////////
 ///                          INCLUDES                                ///
 ////////////////////////////////////////////////////////////////////////
 
-#include "aig.h"
+#include "src/aig/aig/aig.h"
 #include "gia.h"
 
 ABC_NAMESPACE_HEADER_START
diff --git a/src/aig/gia/giaAiger.c b/src/aig/gia/giaAiger.c
index db194c69..2ae070d3 100644
--- a/src/aig/gia/giaAiger.c
+++ b/src/aig/gia/giaAiger.c
@@ -146,7 +146,7 @@ int Gia_FileSize( char * pFileName )
 char * Gia_FileNameGeneric( char * FileName )
 {
     char * pDot, * pRes;
-    pRes = Gia_UtilStrsav( FileName );
+    pRes = Abc_UtilStrsav( FileName );
     if ( (pDot = strrchr( pRes, '.' )) )
         *pDot = 0;
     return pRes;
@@ -445,8 +445,8 @@ Gia_Man_t * Gia_ReadAiger2( char * pFileName, int fCheck )
     // allocate the empty AIG
     pNew = Gia_ManStart( nTotal + nLatches + nOutputs + 1 );
     pName = Gia_FileNameGeneric( pFileName );
-    pNew->pName = Gia_UtilStrsav( pName );
-//    pNew->pSpec = Gia_UtilStrsav( pFileName );
+    pNew->pName = Abc_UtilStrsav( pName );
+//    pNew->pSpec = Abc_UtilStrsav( pFileName );
     ABC_FREE( pName );
     pNew->nConstrs = nConstr;
 
@@ -482,8 +482,8 @@ Gia_Man_t * Gia_ReadAiger2( char * pFileName, int fCheck )
         uLit1 = uLit  - Gia_ReadAigerDecode( &pCur );
         uLit0 = uLit1 - Gia_ReadAigerDecode( &pCur );
 //        assert( uLit1 > uLit0 );
-        iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), uLit0 & 1 );
-        iNode1 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit1 >> 1), uLit1 & 1 );
+        iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), uLit0 & 1 );
+        iNode1 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit1 >> 1), uLit1 & 1 );
         assert( Vec_IntSize(vNodes) == i + 1 + nInputs + nLatches );
 //        Vec_IntPush( vNodes, Gia_And(pNew, iNode0, iNode1) );
         Vec_IntPush( vNodes, Gia_ManAppendAnd(pNew, iNode0, iNode1) );
@@ -500,14 +500,14 @@ Gia_Man_t * Gia_ReadAiger2( char * pFileName, int fCheck )
         for ( i = 0; i < nLatches; i++ )
         {
             uLit0 = atoi( (char *)pCur );  while ( *pCur++ != '\n' );
-            iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+            iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
             Vec_IntPush( vDrivers, iNode0 );
         }
         // read the PO driver literals
         for ( i = 0; i < nOutputs; i++ )
         {
             uLit0 = atoi( (char *)pCur );  while ( *pCur++ != '\n' );
-            iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+            iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
             Vec_IntPush( vDrivers, iNode0 );
         }
 
@@ -518,14 +518,14 @@ Gia_Man_t * Gia_ReadAiger2( char * pFileName, int fCheck )
         for ( i = 0; i < nLatches; i++ )
         {
             uLit0 = Vec_IntEntry( vLits, i );
-            iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+            iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
             Vec_IntPush( vDrivers, iNode0 );
         }
         // read the PO driver literals
         for ( i = 0; i < nOutputs; i++ )
         {
             uLit0 = Vec_IntEntry( vLits, i+nLatches );
-            iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+            iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
             Vec_IntPush( vDrivers, iNode0 );
         }
         Vec_IntFree( vLits );
@@ -604,7 +604,7 @@ Gia_Man_t * Gia_ReadAiger2( char * pFileName, int fCheck )
             pCur++;
             // read model name
             ABC_FREE( pNew->pName );
-            pNew->pName = Gia_UtilStrsav( (char *)pCur );
+            pNew->pName = Abc_UtilStrsav( (char *)pCur );
         }
     }
     Vec_IntFree( vNodes );
@@ -753,8 +753,8 @@ Gia_Man_t * Gia_ReadAigerFromMemory( char * pContents, int nFileSize, int fCheck
         uLit1 = uLit  - Gia_ReadAigerDecode( &pCur );
         uLit0 = uLit1 - Gia_ReadAigerDecode( &pCur );
 //        assert( uLit1 > uLit0 );
-        iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), uLit0 & 1 );
-        iNode1 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit1 >> 1), uLit1 & 1 );
+        iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), uLit0 & 1 );
+        iNode1 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit1 >> 1), uLit1 & 1 );
         assert( Vec_IntSize(vNodes) == i + 1 + nInputs + nLatches );
 //        Vec_IntPush( vNodes, Gia_And(pNew, iNode0, iNode1) );
         Vec_IntPush( vNodes, Gia_ManHashAnd(pNew, iNode0, iNode1) );
@@ -772,14 +772,14 @@ Gia_Man_t * Gia_ReadAigerFromMemory( char * pContents, int nFileSize, int fCheck
         for ( i = 0; i < nLatches; i++ )
         {
             uLit0 = atoi( (char *)pCur );  while ( *pCur++ != '\n' );
-            iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+            iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
             Vec_IntPush( vDrivers, iNode0 );
         }
         // read the PO driver literals
         for ( i = 0; i < nOutputs; i++ )
         {
             uLit0 = atoi( (char *)pCur );  while ( *pCur++ != '\n' );
-            iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+            iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
             Vec_IntPush( vDrivers, iNode0 );
         }
 
@@ -790,14 +790,14 @@ Gia_Man_t * Gia_ReadAigerFromMemory( char * pContents, int nFileSize, int fCheck
         for ( i = 0; i < nLatches; i++ )
         {
             uLit0 = Vec_IntEntry( vLits, i );
-            iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+            iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
             Vec_IntPush( vDrivers, iNode0 );
         }
         // read the PO driver literals
         for ( i = 0; i < nOutputs; i++ )
         {
             uLit0 = Vec_IntEntry( vLits, i+nLatches );
-            iNode0 = Gia_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
+            iNode0 = Abc_LitNotCond( Vec_IntEntry(vNodes, uLit0 >> 1), (uLit0 & 1) );
             Vec_IntPush( vDrivers, iNode0 );
         }
         Vec_IntFree( vLits );
@@ -877,7 +877,7 @@ Gia_Man_t * Gia_ReadAigerFromMemory( char * pContents, int nFileSize, int fCheck
             pCur++;
             // read model name
             ABC_FREE( pNew->pName );
-            pNew->pName = Gia_UtilStrsav( (char *)pCur );
+            pNew->pName = Abc_UtilStrsav( (char *)pCur );
         }
     }
 
@@ -1094,7 +1094,7 @@ Gia_Man_t * Gia_ReadAiger( char * pFileName, int fCheck )
     {
         ABC_FREE( pNew->pName );
         pName = Gia_FileNameGeneric( pFileName );
-        pNew->pName = Gia_UtilStrsav( pName );
+        pNew->pName = Abc_UtilStrsav( pName );
 //        pNew->pSpec = Ioa_UtilStrsav( pFileName );
         ABC_FREE( pName );
     }
@@ -1246,30 +1246,30 @@ unsigned char * Gia_WriteEquivClasses( Gia_Man_t * p, int * pEquivSize )
     }
     pBuffer = ABC_ALLOC( unsigned char, sizeof(int) * (nItems + 1) );
     // write constant class
-    iPos = Gia_WriteAigerEncode( pBuffer, 4, Gia_Var2Lit(0, 1) );
+    iPos = Gia_WriteAigerEncode( pBuffer, 4, Abc_Var2Lit(0, 1) );
 //printf( "\nRepr = %d ", 0 );
     iPrevNode = 0;
     for ( iNode = 1; iNode < Gia_ManObjNum(p); iNode++ )
         if ( Gia_ObjIsConst(p, iNode) )
         {
 //printf( "Node = %d ", iNode );
-            iLit = Gia_Var2Lit( iNode - iPrevNode, Gia_ObjProved(p, iNode) );
+            iLit = Abc_Var2Lit( iNode - iPrevNode, Gia_ObjProved(p, iNode) );
             iPrevNode = iNode;
-            iPos = Gia_WriteAigerEncode( pBuffer, iPos, Gia_Var2Lit(iLit, 0) );
+            iPos = Gia_WriteAigerEncode( pBuffer, iPos, Abc_Var2Lit(iLit, 0) );
         }
     // write non-constant classes
     iPrevRepr = 0;
     Gia_ManForEachClass( p, iRepr )
     {
 //printf( "\nRepr = %d ", iRepr );
-        iPos = Gia_WriteAigerEncode( pBuffer, iPos, Gia_Var2Lit(iRepr - iPrevRepr, 1) );
+        iPos = Gia_WriteAigerEncode( pBuffer, iPos, Abc_Var2Lit(iRepr - iPrevRepr, 1) );
         iPrevRepr = iPrevNode = iRepr;
         Gia_ClassForEachObj1( p, iRepr, iNode )
         {
 //printf( "Node = %d ", iNode );
-            iLit = Gia_Var2Lit( iNode - iPrevNode, Gia_ObjProved(p, iNode) );
+            iLit = Abc_Var2Lit( iNode - iPrevNode, Gia_ObjProved(p, iNode) );
             iPrevNode = iNode;
-            iPos = Gia_WriteAigerEncode( pBuffer, iPos, Gia_Var2Lit(iLit, 0) );
+            iPos = Gia_WriteAigerEncode( pBuffer, iPos, Abc_Var2Lit(iLit, 0) );
         }
     }
     Gia_WriteInt( pBuffer, iPos );
@@ -1291,8 +1291,8 @@ unsigned char * Gia_WriteEquivClasses( Gia_Man_t * p, int * pEquivSize )
 int Gia_WriteDiffValue( unsigned char * pPos, int iPos, int iPrev, int iThis )
 {
     if ( iPrev < iThis )
-        return Gia_WriteAigerEncode( pPos, iPos, Gia_Var2Lit(iThis - iPrev, 1) );
-    return Gia_WriteAigerEncode( pPos, iPos, Gia_Var2Lit(iPrev - iThis, 0) );
+        return Gia_WriteAigerEncode( pPos, iPos, Abc_Var2Lit(iThis - iPrev, 1) );
+    return Gia_WriteAigerEncode( pPos, iPos, Abc_Var2Lit(iPrev - iThis, 0) );
 }
 
 /**Function*************************************************************
@@ -1420,7 +1420,7 @@ void Gia_WriteAiger( Gia_Man_t * pInit, char * pFileName, int fWriteSymbols, int
     pBuffer = ABC_ALLOC( unsigned char, nBufferSize );
     Gia_ManForEachAnd( p, pObj, i )
     {
-        uLit  = Gia_Var2Lit( i, 0 );
+        uLit  = Abc_Var2Lit( i, 0 );
         uLit0 = Gia_ObjFaninLit0( pObj, i );
         uLit1 = Gia_ObjFaninLit1( pObj, i );
         assert( uLit0 < uLit1 );
diff --git a/src/aig/gia/giaBidec.c b/src/aig/gia/giaBidec.c
index fc17b582..54f98afd 100644
--- a/src/aig/gia/giaBidec.c
+++ b/src/aig/gia/giaBidec.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "gia.h"
-#include "bdc.h"
+#include "src/bool/bdc/bdc.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -28,7 +28,7 @@ ABC_NAMESPACE_IMPL_START
 ///                        DECLARATIONS                              ///
 ////////////////////////////////////////////////////////////////////////
 
-static inline int Bdc_FunObjCopy( Bdc_Fun_t * pObj )     { return Gia_LitNotCond( Bdc_FuncCopyInt(Bdc_Regular(pObj)), Bdc_IsComplement(pObj) );  }
+static inline int Bdc_FunObjCopy( Bdc_Fun_t * pObj )     { return Abc_LitNotCond( Bdc_FuncCopyInt(Bdc_Regular(pObj)), Bdc_IsComplement(pObj) );  }
 static inline int Bdc_FunFanin0Copy( Bdc_Fun_t * pObj )  { return Bdc_FunObjCopy( Bdc_FuncFanin0(pObj) );                                        }
 static inline int Bdc_FunFanin1Copy( Bdc_Fun_t * pObj )  { return Bdc_FunObjCopy( Bdc_FuncFanin1(pObj) );                                        }
 
@@ -109,7 +109,7 @@ unsigned * Gia_ManConvertAigToTruth( Gia_Man_t * p, Gia_Obj_t * pRoot, Vec_Int_t
     int i, nWords, nVars;
     // get the number of variables and words
     nVars  = Vec_IntSize( vLeaves );
-    nWords = Gia_TruthWordNum( nVars );
+    nWords = Abc_TruthWordNum( nVars );
     // check the case of a constant
     if ( Gia_ObjIsConst0( Gia_Regular(pRoot) ) )
     {
@@ -263,7 +263,7 @@ Gia_Man_t * Gia_ManPerformBidec( Gia_Man_t * p, int fVerbose )
     Gia_ManConst0(p)->Value = 0;
     // start the new manager
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManHashAlloc( pNew );
 //    Gia_ManCleanLevels( pNew, Gia_ManObjNum(p) );
     pManDec = Bdc_ManAlloc( pPars );
diff --git a/src/aig/gia/giaCCof.c b/src/aig/gia/giaCCof.c
index 38e5ccdf..b04d5953 100644
--- a/src/aig/gia/giaCCof.c
+++ b/src/aig/gia/giaCCof.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "gia.h"
-#include "satSolver.h"
+#include "src/sat/bsat/satSolver.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -134,10 +134,10 @@ void Gia_ManCofExtendSolver( Ccf_Man_t * p )
 }
 
 static inline int Gia_Obj0Copy( Vec_Int_t * vCopies, int Fan0, int fCompl0 )  
-{ return Gia_LitNotCond( Vec_IntEntry(vCopies, Fan0), fCompl0 ); }
+{ return Abc_LitNotCond( Vec_IntEntry(vCopies, Fan0), fCompl0 ); }
 
 static inline int Gia_Obj1Copy( Vec_Int_t * vCopies, int Fan1, int fCompl1 )  
-{ return Gia_LitNotCond( Vec_IntEntry(vCopies, Fan1), fCompl1 ); }
+{ return Abc_LitNotCond( Vec_IntEntry(vCopies, Fan1), fCompl1 ); }
  
 /**Function*************************************************************
 
@@ -173,7 +173,7 @@ void Gia_ManCofOneDerive_rec( Ccf_Man_t * p, int Id )
     else if ( Gia_ObjCioId(pObj) >= Gia_ManRegNum(p->pGia) ) // PI
         Res = sat_solver_var_value( p->pSat, Id );
     else
-        Res = Gia_Var2Lit( Id, 0 );
+        Res = Abc_Var2Lit( Id, 0 );
     Vec_IntWriteEntry( p->vCopies, Id, Res );
 }
 
@@ -193,15 +193,15 @@ int Gia_ManCofOneDerive( Ccf_Man_t * p, int LitProp )
     int LitOut;
     // derive the cofactor of the property node
     Vec_IntFill( p->vCopies, Gia_ManObjNum(p->pFrames), -1 );
-    Gia_ManCofOneDerive_rec( p, Gia_Lit2Var(LitProp) );
-    LitOut = Vec_IntEntry( p->vCopies, Gia_Lit2Var(LitProp) );
-    LitOut = Gia_LitNotCond( LitOut, Gia_LitIsCompl(LitProp) );
+    Gia_ManCofOneDerive_rec( p, Abc_Lit2Var(LitProp) );
+    LitOut = Vec_IntEntry( p->vCopies, Abc_Lit2Var(LitProp) );
+    LitOut = Abc_LitNotCond( LitOut, Abc_LitIsCompl(LitProp) );
     // add new PO for the cofactor
     Gia_ManAppendCo( p->pFrames, LitOut );
     // add SAT clauses
     Gia_ManCofExtendSolver( p );
     // return negative literal of the cofactor
-    return Gia_LitNot(LitOut);
+    return Abc_LitNot(LitOut);
 } 
 
 /**Function*************************************************************
diff --git a/src/aig/gia/giaCSat.c b/src/aig/gia/giaCSat.c
index 745b19ba..d83f79e9 100644
--- a/src/aig/gia/giaCSat.c
+++ b/src/aig/gia/giaCSat.c
@@ -238,8 +238,8 @@ static inline void Cbs_ManSaveModel( Cbs_Man_t * p, Vec_Int_t * vCex )
     p->pProp.iHead = 0;
     Cbs_QueForEachEntry( p->pProp, pVar, i )
         if ( Gia_ObjIsCi(pVar) )
-//            Vec_IntPush( vCex, Gia_Var2Lit(Gia_ObjId(p->pAig,pVar), !Cbs_VarValue(pVar)) );
-            Vec_IntPush( vCex, Gia_Var2Lit(Gia_ObjCioId(pVar), !Cbs_VarValue(pVar)) );
+//            Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjId(p->pAig,pVar), !Cbs_VarValue(pVar)) );
+            Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjCioId(pVar), !Cbs_VarValue(pVar)) );
 } 
 
 /**Function*************************************************************
@@ -377,7 +377,7 @@ static inline int Cbs_VarFaninFanoutMax( Cbs_Man_t * p, Gia_Obj_t * pObj )
     assert( Gia_ObjIsAnd(pObj) );
     Count0 = Gia_ObjRefs( p->pAig, Gia_ObjFanin0(pObj) );
     Count1 = Gia_ObjRefs( p->pAig, Gia_ObjFanin1(pObj) );
-    return ABC_MAX( Count0, Count1 );
+    return Abc_MaxInt( Count0, Count1 );
 }
 
 /**Function*************************************************************
@@ -504,7 +504,7 @@ static inline void Cbs_ManAssign( Cbs_Man_t * p, Gia_Obj_t * pObj, int Level, Gi
     Vec_IntPush( p->vLevReas, pRes1 ? pRes1-pObjR : 0 );
     assert( Vec_IntSize(p->vLevReas) == 3 * p->pProp.iTail );
 //    s_Counter++;
-//    s_Counter = Abc_MaxInt( s_Counter, Vec_IntSize(p->vLevReas)/3 );
+//    s_Counter = Abc_MaxIntInt( s_Counter, Vec_IntSize(p->vLevReas)/3 );
 }
 
 
@@ -872,7 +872,7 @@ int Cbs_ManSolve_rec( Cbs_Man_t * p, int Level )
     if ( Cbs_QueIsEmpty(&p->pJust) )
         return 0;
     // quit using resource limits
-    p->Pars.nJustThis = ABC_MAX( p->Pars.nJustThis, p->pJust.iTail - p->pJust.iHead );
+    p->Pars.nJustThis = Abc_MaxInt( p->Pars.nJustThis, p->pJust.iTail - p->pJust.iHead );
     if ( Cbs_ManCheckLimits( p ) )
         return 0;
     // remember the state before branching
@@ -946,7 +946,7 @@ int Cbs_ManSolve( Cbs_Man_t * p, Gia_Obj_t * pObj )
     p->pJust.iHead = p->pJust.iTail = 0;
     p->pClauses.iHead = p->pClauses.iTail = 1;
     p->Pars.nBTTotal += p->Pars.nBTThis;
-    p->Pars.nJustTotal = ABC_MAX( p->Pars.nJustTotal, p->Pars.nJustThis );
+    p->Pars.nJustTotal = Abc_MaxInt( p->Pars.nJustTotal, p->Pars.nJustThis );
     if ( Cbs_ManCheckLimits( p ) )
         RetValue = -1;
 
diff --git a/src/aig/gia/giaCSatOld.c b/src/aig/gia/giaCSatOld.c
index 983081f0..8198c17f 100644
--- a/src/aig/gia/giaCSatOld.c
+++ b/src/aig/gia/giaCSatOld.c
@@ -213,8 +213,8 @@ static inline void Cbs0_ManSaveModel( Cbs0_Man_t * p, Vec_Int_t * vCex )
     p->pProp.iHead = 0;
     Cbs0_QueForEachEntry( p->pProp, pVar, i )
         if ( Gia_ObjIsCi(pVar) )
-//            Vec_IntPush( vCex, Gia_Var2Lit(Gia_ObjId(p->pAig,pVar), !Cbs0_VarValue(pVar)) );
-            Vec_IntPush( vCex, Gia_Var2Lit(Gia_ObjCioId(pVar), !Cbs0_VarValue(pVar)) );
+//            Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjId(p->pAig,pVar), !Cbs0_VarValue(pVar)) );
+            Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjCioId(pVar), !Cbs0_VarValue(pVar)) );
 } 
 
 /**Function*************************************************************
@@ -332,7 +332,7 @@ static inline int Cbs0_VarFaninFanoutMax( Cbs0_Man_t * p, Gia_Obj_t * pObj )
     assert( Gia_ObjIsAnd(pObj) );
     Count0 = Gia_ObjRefs( p->pAig, Gia_ObjFanin0(pObj) );
     Count1 = Gia_ObjRefs( p->pAig, Gia_ObjFanin1(pObj) );
-    return ABC_MAX( Count0, Count1 );
+    return Abc_MaxInt( Count0, Count1 );
 }
 
 /**Function*************************************************************
@@ -596,7 +596,7 @@ int Cbs0_ManSolve_rec( Cbs0_Man_t * p )
     if ( Cbs0_QueIsEmpty(&p->pJust) )
         return 0;
     // quit using resource limits
-    p->Pars.nJustThis = ABC_MAX( p->Pars.nJustThis, p->pJust.iTail - p->pJust.iHead );
+    p->Pars.nJustThis = Abc_MaxInt( p->Pars.nJustThis, p->pJust.iTail - p->pJust.iHead );
     if ( Cbs0_ManCheckLimits( p ) )
         return 0;
     // remember the state before branching
@@ -656,7 +656,7 @@ int Cbs0_ManSolve( Cbs0_Man_t * p, Gia_Obj_t * pObj )
     Cbs0_ManCancelUntil( p, 0 );
     p->pJust.iHead = p->pJust.iTail = 0;
     p->Pars.nBTTotal += p->Pars.nBTThis;
-    p->Pars.nJustTotal = ABC_MAX( p->Pars.nJustTotal, p->Pars.nJustThis );
+    p->Pars.nJustTotal = Abc_MaxInt( p->Pars.nJustTotal, p->Pars.nJustThis );
     if ( Cbs0_ManCheckLimits( p ) )
         RetValue = -1;
 //    printf( "Outcome = %2d.  Confs = %6d.  Decision level max = %3d.\n", 
diff --git a/src/aig/gia/giaCTas.c b/src/aig/gia/giaCTas.c
index c6aa3fec..7cfdac74 100644
--- a/src/aig/gia/giaCTas.c
+++ b/src/aig/gia/giaCTas.c
@@ -122,8 +122,8 @@ static inline void  Tas_VarSetValue( Gia_Obj_t * pVar, int v ) { assert(pVar->fM
 static inline int   Tas_VarIsJust( Gia_Obj_t * pVar )          { return Gia_ObjIsAnd(pVar) && !Tas_VarIsAssigned(Gia_ObjFanin0(pVar)) && !Tas_VarIsAssigned(Gia_ObjFanin1(pVar)); } 
 static inline int   Tas_VarFanin0Value( Gia_Obj_t * pVar )     { return !Tas_VarIsAssigned(Gia_ObjFanin0(pVar)) ? 2 : (Tas_VarValue(Gia_ObjFanin0(pVar)) ^ Gia_ObjFaninC0(pVar)); }
 static inline int   Tas_VarFanin1Value( Gia_Obj_t * pVar )     { return !Tas_VarIsAssigned(Gia_ObjFanin1(pVar)) ? 2 : (Tas_VarValue(Gia_ObjFanin1(pVar)) ^ Gia_ObjFaninC1(pVar)); }
-static inline int   Tas_VarToLit( Tas_Man_t * p, Gia_Obj_t * pObj ) { assert( Tas_VarIsAssigned(pObj) ); return Gia_Var2Lit( Gia_ObjId(p->pAig, pObj), !Tas_VarValue(pObj) );     }
-static inline int   Tas_LitIsTrue( Gia_Obj_t * pObj, int Lit ) { assert( Tas_VarIsAssigned(pObj) ); return Tas_VarValue(pObj) != Gia_LitIsCompl(Lit);                             }
+static inline int   Tas_VarToLit( Tas_Man_t * p, Gia_Obj_t * pObj ) { assert( Tas_VarIsAssigned(pObj) ); return Abc_Var2Lit( Gia_ObjId(p->pAig, pObj), !Tas_VarValue(pObj) );     }
+static inline int   Tas_LitIsTrue( Gia_Obj_t * pObj, int Lit ) { assert( Tas_VarIsAssigned(pObj) ); return Tas_VarValue(pObj) != Abc_LitIsCompl(Lit);                             }
 
 static inline int         Tas_ClsHandle( Tas_Man_t * p, Tas_Cls_t * pClause ) { return ((int *)pClause) - p->pStore.pData;   }
 static inline Tas_Cls_t * Tas_ClsFromHandle( Tas_Man_t * p, int h )           { return (Tas_Cls_t *)(p->pStore.pData + h);   }
@@ -292,8 +292,8 @@ static inline void Tas_ManSaveModel( Tas_Man_t * p, Vec_Int_t * vCex )
     Tas_QueForEachEntry( p->pProp, pVar, i )
     {
         if ( Gia_ObjIsCi(pVar) )
-//            Vec_IntPush( vCex, Gia_Var2Lit(Gia_ObjId(p->pAig,pVar), !Tas_VarValue(pVar)) );
-            Vec_IntPush( vCex, Gia_Var2Lit(Gia_ObjCioId(pVar), !Tas_VarValue(pVar)) );
+//            Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjId(p->pAig,pVar), !Tas_VarValue(pVar)) );
+            Vec_IntPush( vCex, Abc_Var2Lit(Gia_ObjCioId(pVar), !Tas_VarValue(pVar)) );
 /*
         printf( "%5d(%d) = ", Gia_ObjId(p->pAig, pVar), Tas_VarValue(pVar) );
         if ( Gia_ObjIsCi(pVar) )
@@ -443,7 +443,7 @@ static inline int Tas_VarFaninFanoutMax( Tas_Man_t * p, Gia_Obj_t * pObj )
     assert( Gia_ObjIsAnd(pObj) );
     Count0 = Gia_ObjRefs( p->pAig, Gia_ObjFanin0(pObj) );
     Count1 = Gia_ObjRefs( p->pAig, Gia_ObjFanin1(pObj) );
-    return ABC_MAX( Count0, Count1 );
+    return Abc_MaxInt( Count0, Count1 );
 }
 
 
@@ -793,11 +793,11 @@ static inline void Tas_ManDeriveReason( Tas_Man_t * p, int Level )
         if ( Tas_VarHasReasonCls( p, pObj ) )
         {
             Tas_Cls_t * pCls = Tas_VarReasonCls( p, pObj );
-            pReason = Gia_ManObj( p->pAig, Gia_Lit2Var(pCls->pLits[0]) );
+            pReason = Gia_ManObj( p->pAig, Abc_Lit2Var(pCls->pLits[0]) );
             assert( pReason == pObj );
             for ( j = 1; j < pCls->nLits; j++ )
             {
-                pReason = Gia_ManObj( p->pAig, Gia_Lit2Var(pCls->pLits[j]) );
+                pReason = Gia_ManObj( p->pAig, Abc_Lit2Var(pCls->pLits[j]) );
                 iLitLevel2 = Tas_VarDecLevel( p, pReason );
                 assert( Tas_VarIsAssigned( pReason ) );
                 assert( !Tas_LitIsTrue( pReason, pCls->pLits[j] ) );
@@ -953,16 +953,16 @@ static inline Tas_Cls_t * Tas_ManAllocCls( Tas_Man_t * p, int nSize )
 ***********************************************************************/
 static inline void Tas_ManWatchClause( Tas_Man_t * p, Tas_Cls_t * pClause, int Lit )
 {
-    assert( Gia_Lit2Var(Lit) < Gia_ManObjNum(p->pAig) );
+    assert( Abc_Lit2Var(Lit) < Gia_ManObjNum(p->pAig) );
     assert( pClause->nLits >= 2 );
     assert( pClause->pLits[0] == Lit || pClause->pLits[1] == Lit );
     if ( pClause->pLits[0] == Lit )
-        pClause->iNext[0] = p->pWatches[Gia_LitNot(Lit)];  
+        pClause->iNext[0] = p->pWatches[Abc_LitNot(Lit)];  
     else
-        pClause->iNext[1] = p->pWatches[Gia_LitNot(Lit)];  
-    if ( p->pWatches[Gia_LitNot(Lit)] == 0 )
-        Vec_IntPush( p->vWatchLits, Gia_LitNot(Lit) );
-    p->pWatches[Gia_LitNot(Lit)] = Tas_ClsHandle( p, pClause );
+        pClause->iNext[1] = p->pWatches[Abc_LitNot(Lit)];  
+    if ( p->pWatches[Abc_LitNot(Lit)] == 0 )
+        Vec_IntPush( p->vWatchLits, Abc_LitNot(Lit) );
+    p->pWatches[Abc_LitNot(Lit)] = Tas_ClsHandle( p, pClause );
 }
 
 /**Function*************************************************************
@@ -994,7 +994,7 @@ static inline Tas_Cls_t * Tas_ManCreateCls( Tas_Man_t * p, int hClause )
     for ( i = hClause; (pObj = pQue->pData[i]); i++ )
     {
         assert( Tas_VarIsAssigned( pObj ) );
-        pClause->pLits[i-hClause] = Gia_LitNot( Tas_VarToLit(p, pObj) );
+        pClause->pLits[i-hClause] = Abc_LitNot( Tas_VarToLit(p, pObj) );
     }
     // add the clause as watched one
     if ( nLits >= 2 )
@@ -1027,7 +1027,7 @@ static inline int Tas_ManCreateFromCls( Tas_Man_t * p, Tas_Cls_t * pCls, int Lev
     Tas_QuePush( pQue, NULL );
     for ( i = 0; i < pCls->nLits; i++ )
     {
-        pObj = Gia_ManObj( p->pAig, Gia_Lit2Var(pCls->pLits[i]) );
+        pObj = Gia_ManObj( p->pAig, Abc_Lit2Var(pCls->pLits[i]) );
         assert( Tas_VarIsAssigned(pObj) );
         assert( !Tas_LitIsTrue( pObj, pCls->pLits[i] ) );
         Tas_QuePush( pQue, pObj );
@@ -1052,7 +1052,7 @@ static inline int Tas_ManPropagateWatch( Tas_Man_t * p, int Level, int Lit )
     Gia_Obj_t * pObj;
     Tas_Cls_t * pCur;
     int * piPrev, iCur, iTemp;
-    int i, LitF = Gia_LitNot(Lit);
+    int i, LitF = Abc_LitNot(Lit);
     // iterate through the clauses
     piPrev = p->pWatches + Lit;
     for ( iCur = p->pWatches[Lit]; iCur; iCur = *piPrev )
@@ -1070,8 +1070,8 @@ static inline int Tas_ManPropagateWatch( Tas_Man_t * p, int Level, int Lit )
         assert( pCur->pLits[1] == LitF );
 
         // if the first literal is true, the clause is satisfied
-//        if ( pCur->pLits[0] == p->pAssigns[Gia_Lit2Var(pCur->pLits[0])] )
-        pObj = Gia_ManObj( p->pAig, Gia_Lit2Var(pCur->pLits[0]) );
+//        if ( pCur->pLits[0] == p->pAssigns[Abc_Lit2Var(pCur->pLits[0])] )
+        pObj = Gia_ManObj( p->pAig, Abc_Lit2Var(pCur->pLits[0]) );
         if ( Tas_VarIsAssigned(pObj) && Tas_LitIsTrue( pObj, pCur->pLits[0] ) )
         {
             piPrev = &pCur->iNext[1];
@@ -1082,8 +1082,8 @@ static inline int Tas_ManPropagateWatch( Tas_Man_t * p, int Level, int Lit )
         for ( i = 2; i < (int)pCur->nLits; i++ )
         {
             // skip the case when the literal is false
-//            if ( Gia_LitNot(pCur->pLits[i]) == p->pAssigns[Gia_Lit2Var(pCur->pLits[i])] )
-            pObj = Gia_ManObj( p->pAig, Gia_Lit2Var(pCur->pLits[i]) );
+//            if ( Abc_LitNot(pCur->pLits[i]) == p->pAssigns[Abc_Lit2Var(pCur->pLits[i])] )
+            pObj = Gia_ManObj( p->pAig, Abc_Lit2Var(pCur->pLits[i]) );
             if ( Tas_VarIsAssigned(pObj) && !Tas_LitIsTrue( pObj, pCur->pLits[i] ) )
                 continue;
             // the literal is either true or unassigned - watch it
@@ -1099,7 +1099,7 @@ static inline int Tas_ManPropagateWatch( Tas_Man_t * p, int Level, int Lit )
             continue;
 
         // clause is unit - enqueue new implication
-        pObj = Gia_ManObj( p->pAig, Gia_Lit2Var(pCur->pLits[0]) );
+        pObj = Gia_ManObj( p->pAig, Abc_Lit2Var(pCur->pLits[0]) );
         if ( !Tas_VarIsAssigned(pObj) )
         {
 /*
@@ -1107,7 +1107,7 @@ static inline int Tas_ManPropagateWatch( Tas_Man_t * p, int Level, int Lit )
                 int iLitLevel, iPlace;
                 for ( i = 1; i < (int)pCur->nLits; i++ )
                 {
-                    pObj = Gia_ManObj( p->pAig, Gia_Lit2Var(pCur->pLits[i]) );
+                    pObj = Gia_ManObj( p->pAig, Abc_Lit2Var(pCur->pLits[i]) );
                     iLitLevel = Tas_VarDecLevel( p, pObj );
                     iPlace = pObj->Value;
                     printf( "Lit = %d. Level = %d. Place = %d.\n", pCur->pLits[i], iLitLevel, iPlace );
@@ -1300,7 +1300,7 @@ int Tas_ManSolve_rec( Tas_Man_t * p, int Level )
     if ( Tas_QueIsEmpty(&p->pJust) )
         return 0;
     // quit using resource limits
-    p->Pars.nJustThis = ABC_MAX( p->Pars.nJustThis, p->pJust.iTail - p->pJust.iHead );
+    p->Pars.nJustThis = Abc_MaxInt( p->Pars.nJustThis, p->pJust.iTail - p->pJust.iHead );
     if ( Tas_ManCheckLimits( p ) )
         return 0;
     // remember the state before branching
@@ -1401,7 +1401,7 @@ int Tas_ManSolve( Tas_Man_t * p, Gia_Obj_t * pObj, Gia_Obj_t * pObj2 )
     Vec_IntClear( p->vActiveVars );
     // statistics
     p->Pars.nBTTotal += p->Pars.nBTThis;
-    p->Pars.nJustTotal = ABC_MAX( p->Pars.nJustTotal, p->Pars.nJustThis );
+    p->Pars.nJustTotal = Abc_MaxInt( p->Pars.nJustTotal, p->Pars.nJustThis );
     if ( Tas_ManCheckLimits( p ) )
         RetValue = -1;
     return RetValue;
@@ -1460,7 +1460,7 @@ int Tas_ManSolveArray( Tas_Man_t * p, Vec_Ptr_t * vObjs )
     Vec_IntClear( p->vActiveVars );
     // statistics
     p->Pars.nBTTotal += p->Pars.nBTThis;
-    p->Pars.nJustTotal = ABC_MAX( p->Pars.nJustTotal, p->Pars.nJustThis );
+    p->Pars.nJustTotal = Abc_MaxInt( p->Pars.nJustTotal, p->Pars.nJustThis );
     if ( Tas_ManCheckLimits( p ) )
         RetValue = -1;
 
@@ -1644,19 +1644,19 @@ int Tas_StorePatternTry( Vec_Ptr_t * vInfo, Vec_Ptr_t * vPres, int iBit, int * p
     int i;
     for ( i = 0; i < nLits; i++ )
     {
-        pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
-        pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
-        if ( Gia_InfoHasBit( pPres, iBit ) && 
-             Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
+        pInfo = (unsigned *)Vec_PtrEntry(vInfo, Abc_Lit2Var(pLits[i]));
+        pPres = (unsigned *)Vec_PtrEntry(vPres, Abc_Lit2Var(pLits[i]));
+        if ( Abc_InfoHasBit( pPres, iBit ) && 
+             Abc_InfoHasBit( pInfo, iBit ) == Abc_LitIsCompl(pLits[i]) )
              return 0;
     }
     for ( i = 0; i < nLits; i++ )
     {
-        pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
-        pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
-        Gia_InfoSetBit( pPres, iBit );
-        if ( Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
-            Gia_InfoXorBit( pInfo, iBit );
+        pInfo = (unsigned *)Vec_PtrEntry(vInfo, Abc_Lit2Var(pLits[i]));
+        pPres = (unsigned *)Vec_PtrEntry(vPres, Abc_Lit2Var(pLits[i]));
+        Abc_InfoSetBit( pPres, iBit );
+        if ( Abc_InfoHasBit( pInfo, iBit ) == Abc_LitIsCompl(pLits[i]) )
+            Abc_InfoXorBit( pInfo, iBit );
     }
     return 1;
 }
diff --git a/src/aig/gia/giaCof.c b/src/aig/gia/giaCof.c
index 5a04d9d3..60dcf3af 100644
--- a/src/aig/gia/giaCof.c
+++ b/src/aig/gia/giaCof.c
@@ -457,7 +457,7 @@ int Cof_ManCountRemoved( Cof_Man_t * p, Cof_Obj_t * pRoot, int fConst1 )
     pRoot->iNext = 0;
     p->pLevels[LevelStart] = Cof_ObjHandle( p, pRoot );
     // set the new literal
-    pRoot->iLit = Gia_Var2Lit( 0, fConst1 );
+    pRoot->iLit = Abc_Var2Lit( 0, fConst1 );
     // process nodes in the levelized order
     for ( i = LevelStart; i < p->nLevels; i++ )
     {
@@ -465,7 +465,7 @@ int Cof_ManCountRemoved( Cof_Man_t * p, Cof_Obj_t * pRoot, int fConst1 )
               iHandle && (pTemp = Cof_ManObj(p, iHandle)); 
               iHandle = pTemp->iNext )
         {
-            assert( pTemp->Id != Gia_Lit2Var(pTemp->iLit) );
+            assert( pTemp->Id != Abc_Lit2Var(pTemp->iLit) );
             Cof_ObjForEachFanout( pTemp, pNext, k )
             {
                 if ( Cof_ObjIsCo(pNext) )
@@ -477,11 +477,11 @@ int Cof_ManCountRemoved( Cof_Man_t * p, Cof_Obj_t * pRoot, int fConst1 )
                 assert( pFanin0 == pTemp || pFanin1 == pTemp );
                 pNextGia = Gia_ManObj( p->pGia, pNext->Id );
                 if ( Cof_ObjIsTravIdCurrent(p, pFanin0) )
-                    iLit0 = Gia_LitNotCond( pFanin0->iLit, Gia_ObjFaninC0(pNextGia) );
+                    iLit0 = Abc_LitNotCond( pFanin0->iLit, Gia_ObjFaninC0(pNextGia) );
                 else
                     iLit0 = Gia_ObjFaninLit0( pNextGia, pNext->Id );
                 if ( Cof_ObjIsTravIdCurrent(p, pFanin1) )
-                    iLit1 = Gia_LitNotCond( pFanin1->iLit, Gia_ObjFaninC1(pNextGia) );
+                    iLit1 = Abc_LitNotCond( pFanin1->iLit, Gia_ObjFaninC1(pNextGia) );
                 else
                     iLit1 = Gia_ObjFaninLit1( pNextGia, pNext->Id );
                 iNextNew = Gia_ManHashAndTry( p->pGia, iLit0, iLit1 );
@@ -578,12 +578,12 @@ void Cof_ManPrintFanio( Cof_Man_t * p )
         nFanouts = Cof_ObjFanoutNum(pNode);
         nFaninsAll  += nFanins;
         nFanoutsAll += nFanouts;
-        nFaninsMax   = ABC_MAX( nFaninsMax, nFanins );
-        nFanoutsMax  = ABC_MAX( nFanoutsMax, nFanouts );
+        nFaninsMax   = Abc_MaxInt( nFaninsMax, nFanins );
+        nFanoutsMax  = Abc_MaxInt( nFanoutsMax, nFanouts );
     }
 
     // allocate storage for fanin/fanout numbers
-    nSizeMax = ABC_MAX( 10 * (Gia_Base10Log(nFaninsMax) + 1), 10 * (Gia_Base10Log(nFanoutsMax) + 1) );
+    nSizeMax = Abc_MaxInt( 10 * (Abc_Base10Log(nFaninsMax) + 1), 10 * (Abc_Base10Log(nFanoutsMax) + 1) );
     vFanins  = Vec_IntStart( nSizeMax );
     vFanouts = Vec_IntStart( nSizeMax );
 
@@ -717,7 +717,7 @@ Gia_Man_t * Gia_ManDupCofInt( Gia_Man_t * p, int iVar )
         return NULL;
     }
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManHashAlloc( pNew );
     Gia_ManFillValue( p );
     Gia_ManConst0(p)->Value = 0;
@@ -728,7 +728,7 @@ Gia_Man_t * Gia_ManDupCofInt( Gia_Man_t * p, int iVar )
         if ( pObj == pPivot )
         {
             iCofVar = pObj->Value;
-            pObj->Value = Gia_Var2Lit( 0, 0 );
+            pObj->Value = Abc_Var2Lit( 0, 0 );
         }
     }
     Gia_ManForEachAnd( p, pObj, i )
@@ -737,7 +737,7 @@ Gia_Man_t * Gia_ManDupCofInt( Gia_Man_t * p, int iVar )
         if ( pObj == pPivot )
         {
             iCofVar = pObj->Value;
-            pObj->Value = Gia_Var2Lit( 0, 0 );
+            pObj->Value = Abc_Var2Lit( 0, 0 );
         }
     }
     Gia_ManForEachCo( p, pObj, i )
@@ -745,15 +745,15 @@ Gia_Man_t * Gia_ManDupCofInt( Gia_Man_t * p, int iVar )
     // compute the positive cofactor
     Gia_ManForEachCi( p, pObj, i )
     {
-        pObj->Value = Gia_Var2Lit( Gia_ObjId(pNew, Gia_ManCi(pNew, i)), 0 );
+        pObj->Value = Abc_Var2Lit( Gia_ObjId(pNew, Gia_ManCi(pNew, i)), 0 );
         if ( pObj == pPivot )
-            pObj->Value = Gia_Var2Lit( 0, 1 );
+            pObj->Value = Abc_Var2Lit( 0, 1 );
     }
     Gia_ManForEachAnd( p, pObj, i )
     {
         pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
         if ( pObj == pPivot )
-            pObj->Value = Gia_Var2Lit( 0, 1 );
+            pObj->Value = Abc_Var2Lit( 0, 1 );
     }
     // create MUXes
     assert( iCofVar > 0 );
@@ -836,9 +836,9 @@ Vec_Int_t * Gia_ManTransfer( Gia_Man_t * pAig, Gia_Man_t * pCof, Gia_Man_t * pNe
     Gia_ManForEachObjVec( vSigs, pAig, pObj, i )
     {
         assert( Gia_ObjIsCand(pObj) );
-        pObjF = Gia_ManObj( pCof, Gia_Lit2Var(pObj->Value) );
+        pObjF = Gia_ManObj( pCof, Abc_Lit2Var(pObj->Value) );
         if ( pObjF->Value && ~pObjF->Value )
-            Vec_IntPushUnique( vSigsNew, Gia_Lit2Var(pObjF->Value) );
+            Vec_IntPushUnique( vSigsNew, Abc_Lit2Var(pObjF->Value) );
     }
     return vSigsNew;    
 }
diff --git a/src/aig/gia/giaDup.c b/src/aig/gia/giaDup.c
index 258687fe..b3c04acb 100644
--- a/src/aig/gia/giaDup.c
+++ b/src/aig/gia/giaDup.c
@@ -55,14 +55,14 @@ void Gia_ManDupRemapEquiv( Gia_Man_t * pNew, Gia_Man_t * p )
         Gia_ObjSetRepr( pNew, i, GIA_VOID );
     // iterate over constant candidates
     Gia_ManForEachConst( p, i )
-        Gia_ObjSetRepr( pNew, Gia_Lit2Var(Gia_ManObj(p, i)->Value), 0 );
+        Gia_ObjSetRepr( pNew, Abc_Lit2Var(Gia_ManObj(p, i)->Value), 0 );
     // iterate over class candidates
     vClass = Vec_IntAlloc( 100 );
     Gia_ManForEachClass( p, i )
     {
         Vec_IntClear( vClass );
         Gia_ClassForEachObj( p, i, k )
-            Vec_IntPushUnique( vClass, Gia_Lit2Var(Gia_ManObj(p, k)->Value) );
+            Vec_IntPushUnique( vClass, Abc_Lit2Var(Gia_ManObj(p, k)->Value) );
         assert( Vec_IntSize( vClass ) > 1 );
         Vec_IntSort( vClass, 0 );
         iRepr = iPrev = Vec_IntEntry( vClass, 0 );
@@ -173,7 +173,7 @@ Gia_Man_t * Gia_ManDupOrderDfs( Gia_Man_t * p )
     int i;
     Gia_ManFillValue( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCo( p, pObj, i )
         Gia_ManDupOrderDfs_rec( pNew, p, pObj );
@@ -205,7 +205,7 @@ Gia_Man_t * Gia_ManDupOutputGroup( Gia_Man_t * p, int iOutStart, int iOutStop )
     int i;
     Gia_ManFillValue( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     for ( i = iOutStart; i < iOutStop; i++ )
     {
@@ -240,8 +240,8 @@ void Gia_ManDupOrderDfsChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t *
     pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
     if ( pNext )
     {
-        pNew->pNexts[Gia_Lit2Var(pObj->Value)] = Gia_Lit2Var( Gia_Lit2Var(pNext->Value) );
-        assert( Gia_Lit2Var(pObj->Value) > Gia_Lit2Var(pNext->Value) );
+        pNew->pNexts[Abc_Lit2Var(pObj->Value)] = Abc_Lit2Var( Abc_Lit2Var(pNext->Value) );
+        assert( Abc_Lit2Var(pObj->Value) > Abc_Lit2Var(pNext->Value) );
     }
 } 
 
@@ -264,7 +264,7 @@ Gia_Man_t * Gia_ManDupOrderDfsChoices( Gia_Man_t * p )
     assert( p->pReprs && p->pNexts );
     Gia_ManFillValue( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pNexts = ABC_CALLOC( int, Gia_ManObjNum(p) );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
@@ -297,7 +297,7 @@ Gia_Man_t * Gia_ManDupOrderDfsReverse( Gia_Man_t * p )
     int i;
     Gia_ManFillValue( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCoReverse( p, pObj, i )
         Gia_ManDupOrderDfs_rec( pNew, p, pObj );
@@ -329,7 +329,7 @@ Gia_Man_t * Gia_ManDupOrderAiger( Gia_Man_t * p )
     Gia_Obj_t * pObj;
     int i;
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
         pObj->Value = Gia_ManAppendCi(pNew);
@@ -361,7 +361,7 @@ Gia_Man_t * Gia_ManDupFlip( Gia_Man_t * p, int * pInitState )
     Gia_Obj_t * pObj;
     int i;
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachObj1( p, pObj, i )
     {
@@ -371,13 +371,13 @@ Gia_Man_t * Gia_ManDupFlip( Gia_Man_t * p, int * pInitState )
         {
             pObj->Value = Gia_ManAppendCi( pNew );
             if ( Gia_ObjCioId(pObj) >= Gia_ManPiNum(p) )
-                pObj->Value = Gia_LitNotCond( pObj->Value, Gia_InfoHasBit((unsigned *)pInitState, Gia_ObjCioId(pObj) - Gia_ManPiNum(p)) );
+                pObj->Value = Abc_LitNotCond( pObj->Value, Abc_InfoHasBit((unsigned *)pInitState, Gia_ObjCioId(pObj) - Gia_ManPiNum(p)) );
         }
         else if ( Gia_ObjIsCo(pObj) )
         {
             pObj->Value = Gia_ObjFanin0Copy(pObj);
             if ( Gia_ObjCioId(pObj) >= Gia_ManPoNum(p) )
-                pObj->Value = Gia_LitNotCond( pObj->Value, Gia_InfoHasBit((unsigned *)pInitState, Gia_ObjCioId(pObj) - Gia_ManPoNum(p)) );
+                pObj->Value = Abc_LitNotCond( pObj->Value, Abc_InfoHasBit((unsigned *)pInitState, Gia_ObjCioId(pObj) - Gia_ManPoNum(p)) );
             pObj->Value = Gia_ManAppendCo( pNew, pObj->Value );
         }
     }
@@ -403,7 +403,7 @@ Gia_Man_t * Gia_ManDup( Gia_Man_t * p )
     Gia_Obj_t * pObj;
     int i;
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachObj1( p, pObj, i )
     {
@@ -437,7 +437,7 @@ Gia_Man_t * Gia_ManDupSelf( Gia_Man_t * p )
     Gia_Obj_t * pObj;
     int i, iCtrl;
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManHashAlloc( pNew );
     Gia_ManFillValue( p );
     Gia_ManConst0(p)->Value = 0;
@@ -477,7 +477,7 @@ Gia_Man_t * Gia_ManDupFlopClass( Gia_Man_t * p, int iClass )
     int i, Counter1 = 0, Counter2 = 0;
     assert( p->vFlopClasses != NULL );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManFillValue( p );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachPi( p, pObj, i )
@@ -522,7 +522,7 @@ Gia_Man_t * Gia_ManDupMarked( Gia_Man_t * p )
     Gia_ManFillValue( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
     pNew->nConstrs = p->nConstrs;
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachObj1( p, pObj, i )
     {
@@ -561,8 +561,8 @@ Gia_Man_t * Gia_ManDupMarked( Gia_Man_t * p )
 //            assert( ~pRepr->Value );
             if ( !~pRepr->Value )
                 continue;
-            if ( Gia_Lit2Var(pObj->Value) != Gia_Lit2Var(pRepr->Value) )
-                Gia_ObjSetRepr( pNew, Gia_Lit2Var(pObj->Value), Gia_Lit2Var(pRepr->Value) ); 
+            if ( Abc_Lit2Var(pObj->Value) != Abc_Lit2Var(pRepr->Value) )
+                Gia_ObjSetRepr( pNew, Abc_Lit2Var(pObj->Value), Abc_Lit2Var(pRepr->Value) ); 
         }
         pNew->pNexts = Gia_ManDeriveNexts( pNew );
     }
@@ -588,7 +588,7 @@ Gia_Man_t * Gia_ManDupTimes( Gia_Man_t * p, int nTimes )
     int i, t, Entry;
     assert( nTimes > 0 );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     vPis = Vec_IntAlloc( Gia_ManPiNum(p) * nTimes );
     vPos = Vec_IntAlloc( Gia_ManPoNum(p) * nTimes );
@@ -604,17 +604,17 @@ Gia_Man_t * Gia_ManDupTimes( Gia_Man_t * p, int nTimes )
             {
                 pObj->Value = Gia_ManAppendCi( pNew );
                 if ( Gia_ObjIsPi(p, pObj) )
-                    Vec_IntPush( vPis, Gia_Lit2Var(pObj->Value) );
+                    Vec_IntPush( vPis, Abc_Lit2Var(pObj->Value) );
                 else
-                    Vec_IntPush( vRos, Gia_Lit2Var(pObj->Value) );
+                    Vec_IntPush( vRos, Abc_Lit2Var(pObj->Value) );
             }
             else if ( Gia_ObjIsCo(pObj) )
             {
                 pObj->Value = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
                 if ( Gia_ObjIsPo(p, pObj) )
-                    Vec_IntPush( vPos, Gia_Lit2Var(pObj->Value) );
+                    Vec_IntPush( vPos, Abc_Lit2Var(pObj->Value) );
                 else
-                    Vec_IntPush( vRis, Gia_Lit2Var(pObj->Value) );
+                    Vec_IntPush( vRis, Abc_Lit2Var(pObj->Value) );
             }
         }
     }
@@ -667,7 +667,7 @@ int Gia_ManDupDfs2_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj )
     {
         Gia_Obj_t * pRepr = Gia_ManObj( p, p->pReprsOld[Gia_ObjId(p, pObj)] );
         pRepr->Value = Gia_ManDupDfs2_rec( pNew, p, pRepr );
-        return pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+        return pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
     }
     if ( Gia_ObjIsCi(pObj) )
         return pObj->Value = Gia_ManAppendCi(pNew);
@@ -698,7 +698,7 @@ Gia_Man_t * Gia_ManDupDfs2( Gia_Man_t * p )
     int i;
     Gia_ManFillValue( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCo( p, pObj, i )
         Gia_ManDupDfs2_rec( pNew, p, pObj );
@@ -756,7 +756,7 @@ Gia_Man_t * Gia_ManDupDfs( Gia_Man_t * p )
     Gia_Obj_t * pObj;
     int i;
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManFillValue( p );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
@@ -789,7 +789,7 @@ Gia_Man_t * Gia_ManDupDfsSkip( Gia_Man_t * p )
     int i;
     Gia_ManFillValue( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
         pObj->Value = Gia_ManAppendCi(pNew);
@@ -819,7 +819,7 @@ Gia_Man_t * Gia_ManDupDfsCone( Gia_Man_t * p, Gia_Obj_t * pRoot )
     assert( Gia_ObjIsCo(pRoot) );
     Gia_ManFillValue( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
         pObj->Value = Gia_ManAppendCi(pNew);
@@ -847,14 +847,14 @@ Gia_Man_t * Gia_ManDupDfsLitArray( Gia_Man_t * p, Vec_Int_t * vLits )
     int i, iLit, iLitRes;
     Gia_ManFillValue( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
         pObj->Value = Gia_ManAppendCi(pNew);
     Vec_IntForEachEntry( vLits, iLit, i )
     {
-        iLitRes = Gia_ManDupDfs2_rec( pNew, p, Gia_ManObj(p, Gia_Lit2Var(iLit)) );
-        Gia_ManAppendCo( pNew, Gia_LitNotCond( iLitRes, Gia_LitIsCompl(iLit)) );
+        iLitRes = Gia_ManDupDfs2_rec( pNew, p, Gia_ManObj(p, Abc_Lit2Var(iLit)) );
+        Gia_ManAppendCo( pNew, Abc_LitNotCond( iLitRes, Abc_LitIsCompl(iLit)) );
     }
     Gia_ManSetRegNum( pNew, 0 );
     return pNew;
@@ -877,7 +877,7 @@ Gia_Man_t * Gia_ManDupNormalized( Gia_Man_t * p )
     Gia_Obj_t * pObj;
     int i;
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
         pObj->Value = Gia_ManAppendCi(pNew);
@@ -908,7 +908,7 @@ Gia_Man_t * Gia_ManDupTrimmed( Gia_Man_t * p, int fTrimCis, int fTrimCos )
     int i;
     Gia_ManFillValue( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManSetRefs( p );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
@@ -943,7 +943,7 @@ Gia_Man_t * Gia_ManDupOntop( Gia_Man_t * p, Gia_Man_t * p2 )
     assert( Gia_ManRegNum(p) == 0 );
     assert( Gia_ManRegNum(p2) == 0 );
     pNew = Gia_ManStart( Gia_ManObjNum(p)+Gia_ManObjNum(p2) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManHashAlloc( pNew );
     // dup first AIG
     Gia_ManConst0(p)->Value = 0;
@@ -1005,13 +1005,13 @@ Gia_Man_t * Gia_ManDupDfsCiMap( Gia_Man_t * p, int * pCi2Lit, Vec_Int_t * vLits
     int i;
     Gia_ManFillValue( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
     {
         pObj->Value = Gia_ManAppendCi(pNew);
         if ( ~pCi2Lit[i] )
-            pObj->Value = Gia_LitNotCond( Gia_ManObj(p, Gia_Lit2Var(pCi2Lit[i]))->Value, Gia_LitIsCompl(pCi2Lit[i]) );
+            pObj->Value = Abc_LitNotCond( Gia_ManObj(p, Abc_Lit2Var(pCi2Lit[i]))->Value, Abc_LitIsCompl(pCi2Lit[i]) );
     }
     Gia_ManHashAlloc( pNew );
     if ( vLits )
@@ -1019,8 +1019,8 @@ Gia_Man_t * Gia_ManDupDfsCiMap( Gia_Man_t * p, int * pCi2Lit, Vec_Int_t * vLits
         int iLit, iLitRes;
         Vec_IntForEachEntry( vLits, iLit, i )
         {
-            iLitRes = Gia_ManDupDfs2_rec( pNew, p, Gia_ManObj(p, Gia_Lit2Var(iLit)) );
-            Gia_ManAppendCo( pNew, Gia_LitNotCond( iLitRes, Gia_LitIsCompl(iLit)) );
+            iLitRes = Gia_ManDupDfs2_rec( pNew, p, Gia_ManObj(p, Abc_Lit2Var(iLit)) );
+            Gia_ManAppendCo( pNew, Abc_LitNotCond( iLitRes, Abc_LitIsCompl(iLit)) );
         }
     }
     else
@@ -1055,7 +1055,7 @@ Gia_Man_t * Gia_ManDupDfsClasses( Gia_Man_t * p )
     assert( p->pReprsOld != NULL );
     Gia_ManFillValue( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
         pObj->Value = Gia_ManAppendCi(pNew);
@@ -1112,7 +1112,7 @@ Gia_Man_t * Gia_ManDupTopAnd_iter( Gia_Man_t * p, int fVerbose )
     {
         if ( Gia_ObjIsCi(pObj) )
         {
-            Vec_IntPush( vLeaves, Gia_Var2Lit( Gia_ObjId(p, pObj), 0 ) );
+            Vec_IntPush( vLeaves, Abc_Var2Lit( Gia_ObjId(p, pObj), 0 ) );
             continue;
         }
         assert( Gia_ObjIsAnd(pObj) );
@@ -1132,16 +1132,16 @@ Gia_Man_t * Gia_ManDupTopAnd_iter( Gia_Man_t * p, int fVerbose )
     pVar2Val = ABC_FALLOC( char, Gia_ManObjNum(p) );
     Vec_IntForEachEntry( vLeaves, iLit, i )
     {
-        iObjId = Gia_Lit2Var(iLit);
+        iObjId = Abc_Lit2Var(iLit);
         pObj = Gia_ManObj(p, iObjId);
         if ( Gia_ObjIsCi(pObj) )
         {
-            pCi2Lit[Gia_ObjCioId(pObj)] = !Gia_LitIsCompl(iLit);
+            pCi2Lit[Gia_ObjCioId(pObj)] = !Abc_LitIsCompl(iLit);
             nCiLits++;
         }
         if ( pVar2Val[iObjId] != 0 && pVar2Val[iObjId] != 1 )
-            pVar2Val[iObjId] = Gia_LitIsCompl(iLit);
-        else if ( pVar2Val[iObjId] != Gia_LitIsCompl(iLit) )
+            pVar2Val[iObjId] = Abc_LitIsCompl(iLit);
+        else if ( pVar2Val[iObjId] != Abc_LitIsCompl(iLit) )
             break;
     }
     if ( i < Vec_IntSize(vLeaves) )
@@ -1156,7 +1156,7 @@ Gia_Man_t * Gia_ManDupTopAnd_iter( Gia_Man_t * p, int fVerbose )
     Vec_IntClear( vLeaves );
     Gia_ManForEachObj( p, pObj, i )
         if ( !Gia_ObjIsCi(pObj) && (pVar2Val[i] == 0 || pVar2Val[i] == 1) )
-            Vec_IntPush( vLeaves, Gia_Var2Lit(i, pVar2Val[i]) );
+            Vec_IntPush( vLeaves, Abc_Var2Lit(i, pVar2Val[i]) );
     if ( fVerbose )
         printf( "Detected %6d AND leaves and %6d CI leaves.\n", Vec_IntSize(vLeaves), nCiLits );
     // create the input map
@@ -1272,7 +1272,7 @@ Gia_Man_t * Gia_ManMiter( Gia_Man_t * p0, Gia_Man_t * p1, int fDualOut, int fSeq
     }
     // start the manager
     pNew = Gia_ManStart( Gia_ManObjNum(p0) + Gia_ManObjNum(p1) );
-    pNew->pName = Gia_UtilStrsav( "miter" );
+    pNew->pName = Abc_UtilStrsav( "miter" );
     // map combinational inputs
     Gia_ManFillValue( p0 );
     Gia_ManFillValue( p1 );
@@ -1372,7 +1372,7 @@ Gia_Man_t * Gia_ManTransformMiter( Gia_Man_t * p )
     int i, iLit;
     assert( (Gia_ManPoNum(p) & 1) == 0 );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManHashAlloc( pNew );
     Gia_ManForEachCi( p, pObj, i )
@@ -1444,7 +1444,7 @@ Gia_Man_t * Gia_ManChoiceMiter( Vec_Ptr_t * vGias )
     }
     // start the new manager
     pNew = Gia_ManStart( Vec_PtrSize(vGias) * Gia_ManObjNum(pGia0) );
-    pNew->pName = Gia_UtilStrsav( pGia0->pName );
+    pNew->pName = Abc_UtilStrsav( pGia0->pName );
     // create new CIs and assign them to the old manager CIs
     for ( k = 0; k < Gia_ManCiNum(pGia0); k++ )
     {
@@ -1485,7 +1485,7 @@ Gia_Man_t * Gia_ManDupWithConstraints( Gia_Man_t * p, Vec_Int_t * vPoTypes )
     Gia_Obj_t * pObj;
     int i, nConstr = 0;
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
         pObj->Value = Gia_ManAppendCi(pNew);
@@ -1546,7 +1546,7 @@ Gia_Man_t * Gia_ManDupAbsFlops( Gia_Man_t * p, Vec_Int_t * vFlopClasses )
     Gia_ManFillValue( p );
     // start the new manager
     pNew = Gia_ManStart( 5000 );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     // create PIs
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachPi( p, pObj, i )
@@ -1647,7 +1647,7 @@ Gia_Man_t * Gia_ManDupAbsGates( Gia_Man_t * p, Vec_Int_t * vGateClasses )
 
     // start the new manager
     pNew = Gia_ManStart( 5000 );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     // create constant
     Gia_ManFillValue( p );
     Gia_ManConst0(p)->Value = 0;
@@ -1681,7 +1681,7 @@ Gia_Man_t * Gia_ManDupAbsGates( Gia_Man_t * p, Vec_Int_t * vGateClasses )
         {
             if ( !~pObj->Value )
                 continue;
-            assert( !Gia_LitIsCompl(pObj->Value) );
+            assert( !Abc_LitIsCompl(pObj->Value) );
             pCopy = Gia_ObjCopy( pTemp, pObj );
             if ( !~pCopy->Value )
             {
@@ -1689,7 +1689,7 @@ Gia_Man_t * Gia_ManDupAbsGates( Gia_Man_t * p, Vec_Int_t * vGateClasses )
                 pObj->Value = ~0;
                 continue;
             }
-            assert( !Gia_LitIsCompl(pCopy->Value) );
+            assert( !Abc_LitIsCompl(pCopy->Value) );
             pObj->Value = pCopy->Value;
         }
     }
diff --git a/src/aig/gia/giaEmbed.c b/src/aig/gia/giaEmbed.c
index 5c7092a3..1daf52a1 100644
--- a/src/aig/gia/giaEmbed.c
+++ b/src/aig/gia/giaEmbed.c
@@ -20,7 +20,7 @@
 
 #include <math.h>
 #include "gia.h"
-#include "ioa.h"
+#include "src/aig/ioa/ioa.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -690,12 +690,12 @@ void Emb_ManPrintFanio( Emb_Man_t * p )
         nFanouts = Emb_ObjFanoutNum(pNode);
         nFaninsAll  += nFanins;
         nFanoutsAll += nFanouts;
-        nFaninsMax   = ABC_MAX( nFaninsMax, nFanins );
-        nFanoutsMax  = ABC_MAX( nFanoutsMax, nFanouts );
+        nFaninsMax   = Abc_MaxInt( nFaninsMax, nFanins );
+        nFanoutsMax  = Abc_MaxInt( nFanoutsMax, nFanouts );
     }
 
     // allocate storage for fanin/fanout numbers
-    nSizeMax = ABC_MAX( 10 * (Gia_Base10Log(nFaninsMax) + 1), 10 * (Gia_Base10Log(nFanoutsMax) + 1) );
+    nSizeMax = Abc_MaxInt( 10 * (Abc_Base10Log(nFaninsMax) + 1), 10 * (Abc_Base10Log(nFanoutsMax) + 1) );
     vFanins  = Vec_IntStart( nSizeMax );
     vFanouts = Vec_IntStart( nSizeMax );
 
@@ -1436,8 +1436,8 @@ void Emb_ManDerivePlacement( Emb_Man_t * p, int nSols )
     pY0 = Emb_ManSol( p, 0 );
     for ( k = 0; k < p->nObjs; k++ )
     {
-        Min0 = ABC_MIN( Min0, pY0[k] );
-        Max0 = ABC_MAX( Max0, pY0[k] );
+        Min0 = Abc_MinInt( Min0, pY0[k] );
+        Max0 = Abc_MaxInt( Max0, pY0[k] );
     }
     Str0 = 1.0*GIA_PLACE_SIZE/(Max0 - Min0);
     // update the coordinates
@@ -1450,8 +1450,8 @@ void Emb_ManDerivePlacement( Emb_Man_t * p, int nSols )
     pY1 = Emb_ManSol( p, 1 );
     for ( k = 0; k < p->nObjs; k++ )
     {
-        Min1 = ABC_MIN( Min1, pY1[k] );
-        Max1 = ABC_MAX( Max1, pY1[k] );
+        Min1 = Abc_MinInt( Min1, pY1[k] );
+        Max1 = Abc_MaxInt( Max1, pY1[k] );
     }
     Str1 = 1.0*GIA_PLACE_SIZE/(Max1 - Min1);
     // update the coordinates
@@ -1498,10 +1498,10 @@ double Emb_ManComputeHPWL( Emb_Man_t * p )
         iMinY = iMaxY = p->pPlacement[2*pThis->Value+1];
         Emb_ObjForEachFanout( pThis, pNext, k )
         {
-            iMinX = ABC_MIN( iMinX, p->pPlacement[2*pNext->Value+0] );
-            iMaxX = ABC_MAX( iMaxX, p->pPlacement[2*pNext->Value+0] );
-            iMinY = ABC_MIN( iMinY, p->pPlacement[2*pNext->Value+1] );
-            iMaxY = ABC_MAX( iMaxY, p->pPlacement[2*pNext->Value+1] );
+            iMinX = Abc_MinInt( iMinX, p->pPlacement[2*pNext->Value+0] );
+            iMaxX = Abc_MaxInt( iMaxX, p->pPlacement[2*pNext->Value+0] );
+            iMinY = Abc_MinInt( iMinY, p->pPlacement[2*pNext->Value+1] );
+            iMaxY = Abc_MaxInt( iMaxY, p->pPlacement[2*pNext->Value+1] );
         }
         Result += (iMaxX - iMinX) + (iMaxY - iMinY);
     }
@@ -1548,10 +1548,10 @@ void Emb_ManPlacementRefine( Emb_Man_t * p, int nIters, int fVerbose )
             iMinY = iMaxY = p->pPlacement[2*pThis->Value+1];
             Emb_ObjForEachFanout( pThis, pNext, k )
             {
-                iMinX = ABC_MIN( iMinX, p->pPlacement[2*pNext->Value+0] );
-                iMaxX = ABC_MAX( iMaxX, p->pPlacement[2*pNext->Value+0] );
-                iMinY = ABC_MIN( iMinY, p->pPlacement[2*pNext->Value+1] );
-                iMaxY = ABC_MAX( iMaxY, p->pPlacement[2*pNext->Value+1] );
+                iMinX = Abc_MinInt( iMinX, p->pPlacement[2*pNext->Value+0] );
+                iMaxX = Abc_MaxInt( iMaxX, p->pPlacement[2*pNext->Value+0] );
+                iMinY = Abc_MinInt( iMinY, p->pPlacement[2*pNext->Value+1] );
+                iMaxY = Abc_MaxInt( iMaxY, p->pPlacement[2*pNext->Value+1] );
             }
             pEdgeX[pThis->Value] = 0.5 * (iMaxX + iMinX);
             pEdgeY[pThis->Value] = 0.5 * (iMaxY + iMinY);
diff --git a/src/aig/gia/giaEnable.c b/src/aig/gia/giaEnable.c
index 37f0c94f..d23c0c3d 100644
--- a/src/aig/gia/giaEnable.c
+++ b/src/aig/gia/giaEnable.c
@@ -338,9 +338,9 @@ Vec_Int_t * Gia_ManTransferFrames( Gia_Man_t * pAig, Gia_Man_t * pFrames, int nF
         assert( Gia_ObjIsCand(pObj) );
         for ( f = 0; f < nFrames; f++ )
         {
-            pObjF = Gia_ManObj( pFrames, Gia_Lit2Var(Gia_ObjCopyF( pAig, f, pObj )) );
+            pObjF = Gia_ManObj( pFrames, Abc_Lit2Var(Gia_ObjCopyF( pAig, f, pObj )) );
             if ( pObjF->Value && ~pObjF->Value )
-                Vec_IntPushUnique( vSigsNew, Gia_Lit2Var(pObjF->Value) );
+                Vec_IntPushUnique( vSigsNew, Abc_Lit2Var(pObjF->Value) );
         }
     }
     return vSigsNew;    
@@ -365,7 +365,7 @@ Gia_Man_t * Gia_ManUnrollInit( Gia_Man_t * p, int nFrames )
     ABC_FREE( p->pCopies );
     p->pCopies = ABC_FALLOC( int, nFrames * Gia_ManObjNum(p) );
     pNew = Gia_ManStart( nFrames * Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManHashAlloc( pNew );
     Gia_ManForEachRo( p, pObj, i )
         Gia_ObjSetCopyF( p, 0, pObj, 0 );
@@ -440,7 +440,7 @@ Gia_Man_t * Gia_ManRemoveEnables2( Gia_Man_t * p )
     Gia_Obj_t * pThis, * pNode;
     int i;
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManHashAlloc( pNew );
     Gia_ManFillValue( p );
     Gia_ManConst0(p)->Value = 0;
@@ -481,13 +481,13 @@ Gia_Man_t * Gia_ManRemoveEnables2( Gia_Man_t * p )
         {
 //            printf( "FlopIn compl = %d. FlopOut is d0. Complement = %d.\n", 
 //                Gia_ObjFaninC0(pFlopIn), Gia_IsComplement(pObj0) );
-            pFlopIn->Value = Gia_LitNotCond(Gia_Regular(pObj1)->Value, !Gia_IsComplement(pObj1));
+            pFlopIn->Value = Abc_LitNotCond(Gia_Regular(pObj1)->Value, !Gia_IsComplement(pObj1));
         }
         else if ( Gia_Regular(pObj1) == pFlopOut )
         {
 //            printf( "FlopIn compl = %d. FlopOut is d1. Complement = %d.\n", 
 //                Gia_ObjFaninC0(pFlopIn), Gia_IsComplement(pObj1) );
-            pFlopIn->Value = Gia_LitNotCond(Gia_Regular(pObj0)->Value, !Gia_IsComplement(pObj0));
+            pFlopIn->Value = Abc_LitNotCond(Gia_Regular(pObj0)->Value, !Gia_IsComplement(pObj0));
         }
     }
     Gia_ManForEachCo( p, pThis, i )
@@ -610,7 +610,7 @@ Gia_Man_t * Gia_ManRemoveEnables( Gia_Man_t * p )
     
 
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachObj1( p, pObj, i )
     {
@@ -627,7 +627,7 @@ Gia_Man_t * Gia_ManRemoveEnables( Gia_Man_t * p )
         if ( pData == NULL )
             pObj->Value = Gia_ManAppendCo( pNew, Gia_ObjFanin0Copy(pObj) );
         else
-            pObj->Value = Gia_ManAppendCo( pNew, Gia_LitNotCond(Gia_Regular(pData)->Value, Gia_IsComplement(pData)) );
+            pObj->Value = Gia_ManAppendCo( pNew, Abc_LitNotCond(Gia_Regular(pData)->Value, Gia_IsComplement(pData)) );
     }
     Gia_ManSetRegNum( pNew, Gia_ManRegNum(p) );
     Vec_PtrFree( vDatas );
diff --git a/src/aig/gia/giaEquiv.c b/src/aig/gia/giaEquiv.c
index c93da86e..43724871 100644
--- a/src/aig/gia/giaEquiv.c
+++ b/src/aig/gia/giaEquiv.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "gia.h"
-#include "cec.h"
+#include "src/proof/cec/cec.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -417,7 +417,7 @@ void Gia_ManEquivReduce_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj,
     if ( (pRepr = Gia_ManEquivRepr(p, pObj, fUseAll, fDualOut)) )
     {
         Gia_ManEquivReduce_rec( pNew, p, pRepr, fUseAll, fDualOut );
-        pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+        pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
         return;
     }
     if ( ~pObj->Value )
@@ -474,7 +474,7 @@ Gia_Man_t * Gia_ManEquivReduce( Gia_Man_t * p, int fUseAll, int fDualOut, int fV
     if ( fDualOut )
         Gia_ManEquivSetColors( p, fVerbose );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManFillValue( p );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
@@ -536,7 +536,7 @@ void Gia_ManEquivUpdatePointers( Gia_Man_t * p, Gia_Man_t * pNew )
     {
         if ( !~pObj->Value )
             continue;
-        pObjNew = Gia_ManObj( pNew, Gia_Lit2Var(pObj->Value) );
+        pObjNew = Gia_ManObj( pNew, Abc_Lit2Var(pObj->Value) );
         if ( pObjNew->fMark0 )
             pObj->Value = ~0;
     }
@@ -568,10 +568,10 @@ void Gia_ManEquivDeriveReprs( Gia_Man_t * p, Gia_Man_t * pNew, Gia_Man_t * pFina
         pObj = Gia_ManObj( p, i );
         if ( !~pObj->Value )
             continue;
-        pObjNew = Gia_ManObj( pNew, Gia_Lit2Var(pObj->Value) );
-        if ( Gia_Lit2Var(pObjNew->Value) == 0 )
+        pObjNew = Gia_ManObj( pNew, Abc_Lit2Var(pObj->Value) );
+        if ( Abc_Lit2Var(pObjNew->Value) == 0 )
             continue;
-        Gia_ObjSetRepr( pFinal, Gia_Lit2Var(pObjNew->Value), 0 );
+        Gia_ObjSetRepr( pFinal, Abc_Lit2Var(pObjNew->Value), 0 );
     }
     // iterate over class candidates
     vClass = Vec_IntAlloc( 100 );
@@ -583,8 +583,8 @@ void Gia_ManEquivDeriveReprs( Gia_Man_t * p, Gia_Man_t * pNew, Gia_Man_t * pFina
             pObj = Gia_ManObj( p, k );
             if ( !~pObj->Value )
                 continue;
-            pObjNew = Gia_ManObj( pNew, Gia_Lit2Var(pObj->Value) );
-            Vec_IntPushUnique( vClass, Gia_Lit2Var(pObjNew->Value) );
+            pObjNew = Gia_ManObj( pNew, Abc_Lit2Var(pObj->Value) );
+            Vec_IntPushUnique( vClass, Abc_Lit2Var(pObjNew->Value) );
         }
         if ( Vec_IntSize( vClass ) < 2 )
             continue;
@@ -624,14 +624,14 @@ Gia_Man_t * Gia_ManEquivRemapDfs( Gia_Man_t * p )
         Gia_ObjSetRepr( pNew, i, GIA_VOID );
     // iterate over constant candidates
     Gia_ManForEachConst( p, i )
-        Gia_ObjSetRepr( pNew, Gia_Lit2Var(Gia_ManObj(p, i)->Value), 0 );
+        Gia_ObjSetRepr( pNew, Abc_Lit2Var(Gia_ManObj(p, i)->Value), 0 );
     // iterate over class candidates
     vClass = Vec_IntAlloc( 100 );
     Gia_ManForEachClass( p, i )
     {
         Vec_IntClear( vClass );
         Gia_ClassForEachObj( p, i, k )
-            Vec_IntPushUnique( vClass, Gia_Lit2Var(Gia_ManObj(p, k)->Value) );
+            Vec_IntPushUnique( vClass, Abc_Lit2Var(Gia_ManObj(p, k)->Value) );
         assert( Vec_IntSize( vClass ) > 1 );
         Vec_IntSort( vClass, 0 );
         iRepr = iPrev = Vec_IntEntry( vClass, 0 );
@@ -758,7 +758,7 @@ static inline void Gia_ManSpecBuild( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t
 //    if ( fDualOut && !Gia_ObjDiffColors( p, Gia_ObjId(p, pObj), Gia_ObjId(p, pRepr) ) )
     if ( fDualOut && !Gia_ObjDiffColors2( p, Gia_ObjId(p, pObj), Gia_ObjId(p, pRepr) ) )
         return;
-    iLitNew = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+    iLitNew = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
     if ( pObj->Value != iLitNew && !Gia_ObjProved(p, Gia_ObjId(p,pObj)) )
     {
         if ( vTrace ) 
@@ -847,7 +847,7 @@ Gia_Man_t * Gia_ManSpecReduceTrace( Gia_Man_t * p, Vec_Int_t * vTrace )
     Gia_ManSetPhase( p );
     Gia_ManFillValue( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManHashAlloc( pNew );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
@@ -917,7 +917,7 @@ Gia_Man_t * Gia_ManSpecReduce( Gia_Man_t * p, int fDualOut, int fSynthesis, int
     if ( fDualOut )
         Gia_ManEquivSetColors( p, fVerbose );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManHashAlloc( pNew );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
@@ -983,7 +983,7 @@ void Gia_ManSpecBuildInit( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj, Ve
 //    if ( fDualOut && !Gia_ObjDiffColors( p, Gia_ObjId(p, pObj), Gia_ObjId(p, pRepr) ) )
     if ( fDualOut && !Gia_ObjDiffColors2( p, Gia_ObjId(p, pObj), Gia_ObjId(p, pRepr) ) )
         return;
-    iLitNew = Gia_LitNotCond( Gia_ObjCopyF(p, f, pRepr), Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+    iLitNew = Abc_LitNotCond( Gia_ObjCopyF(p, f, pRepr), Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
     if ( Gia_ObjCopyF(p, f, pObj) != iLitNew && !Gia_ObjProved(p, Gia_ObjId(p,pObj)) )
         Vec_IntPush( vXorLits, Gia_ManHashXor(pNew, Gia_ObjCopyF(p, f, pObj), iLitNew) );
     Gia_ObjSetCopyF( p, f, pObj, iLitNew );
@@ -1063,10 +1063,10 @@ Gia_Man_t * Gia_ManSpecReduceInit( Gia_Man_t * p, Abc_Cex_t * pInit, int nFrames
     if ( fDualOut )
         Gia_ManEquivSetColors( p, 0 );
     pNew = Gia_ManStart( nFrames * Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManHashAlloc( pNew );
     Gia_ManForEachRo( p, pObj, i )
-        Gia_ObjSetCopyF( p, 0, pObj, Gia_InfoHasBit(pInit->pData, i) );
+        Gia_ObjSetCopyF( p, 0, pObj, Abc_InfoHasBit(pInit->pData, i) );
     for ( f = 0; f < nFrames; f++ )
     {
         Gia_ObjSetCopyF( p, f, Gia_ManConst0(p), 0 );
@@ -1463,7 +1463,7 @@ void Gia_ManEquivToChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
     {
         if ( Gia_ObjIsConst0(pRepr) )
         {
-            pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+            pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
             return;
         }
         Gia_ManEquivToChoices_rec( pNew, p, pRepr );
@@ -1471,22 +1471,22 @@ void Gia_ManEquivToChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
         Gia_ManEquivToChoices_rec( pNew, p, Gia_ObjFanin0(pObj) );
         Gia_ManEquivToChoices_rec( pNew, p, Gia_ObjFanin1(pObj) );
         pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
-        if ( Gia_LitRegular(pObj->Value) == Gia_LitRegular(pRepr->Value) )
+        if ( Abc_LitRegular(pObj->Value) == Abc_LitRegular(pRepr->Value) )
         {
-            assert( (int)pObj->Value == Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) ) );
+            assert( (int)pObj->Value == Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) ) );
             return;
         }
         if ( pRepr->Value > pObj->Value ) // should never happen with high resource limit
             return;
         assert( pRepr->Value < pObj->Value );
-        pReprNew = Gia_ManObj( pNew, Gia_Lit2Var(pRepr->Value) );
-        pObjNew  = Gia_ManObj( pNew, Gia_Lit2Var(pObj->Value) );
+        pReprNew = Gia_ManObj( pNew, Abc_Lit2Var(pRepr->Value) );
+        pObjNew  = Gia_ManObj( pNew, Abc_Lit2Var(pObj->Value) );
         if ( Gia_ObjReprObj( pNew, Gia_ObjId(pNew, pObjNew) ) )
         {
 //            assert( Gia_ObjReprObj( pNew, Gia_ObjId(pNew, pObjNew) ) == pReprNew );
             if ( Gia_ObjReprObj( pNew, Gia_ObjId(pNew, pObjNew) ) != pReprNew )
                 return;
-            pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+            pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
             return;
         }
         if ( !Gia_ObjCheckTfi( pNew, pReprNew, pObjNew ) )
@@ -1495,7 +1495,7 @@ void Gia_ManEquivToChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
             Gia_ObjSetRepr( pNew, Gia_ObjId(pNew, pObjNew), Gia_ObjId(pNew, pReprNew) );
             Gia_ManAddNextEntry_rec( pNew, pReprNew, pObjNew ); 
         }
-        pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+        pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
         return;
     }
     assert( Gia_ObjIsAnd(pObj) );
@@ -1573,7 +1573,7 @@ Gia_Man_t * Gia_ManEquivToChoices( Gia_Man_t * p, int nSnapshots )
     assert( (Gia_ManCoNum(p) % nSnapshots) == 0 );
     Gia_ManSetPhase( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pReprs = ABC_CALLOC( Gia_Rpr_t, Gia_ManObjNum(p) );
     pNew->pNexts = ABC_CALLOC( int, Gia_ManObjNum(p) );
     for ( i = 0; i < Gia_ManObjNum(p); i++ )
@@ -1654,9 +1654,9 @@ int Gia_ManCountChoices( Gia_Man_t * p )
 
 ABC_NAMESPACE_IMPL_END
 
-#include "aig.h"
-#include "saig.h"
-#include "cec.h"
+#include "src/aig/aig/aig.h"
+#include "src/aig/saig/saig.h"
+#include "src/proof/cec/cec.h"
 #include "giaAig.h"
 
 ABC_NAMESPACE_IMPL_START
@@ -1826,7 +1826,7 @@ int Gia_ManFilterEquivsForSpeculation( Gia_Man_t * pGia, char * pName1, char * p
     {
         if ( pObj1->Value == ~0 )
             continue;
-        pObjM = Gia_ManObj( pMiter, Gia_Lit2Var(pObj1->Value) );
+        pObjM = Gia_ManObj( pMiter, Abc_Lit2Var(pObj1->Value) );
         pObj = Gia_ManObj( pGia, Gia_ObjId(pMiter, pObjM) );
         pObj->fMark0 = 1;
     }
@@ -1835,7 +1835,7 @@ int Gia_ManFilterEquivsForSpeculation( Gia_Man_t * pGia, char * pName1, char * p
     {
         if ( pObj2->Value == ~0 )
             continue;
-        pObjM = Gia_ManObj( pMiter, Gia_Lit2Var(pObj2->Value) );
+        pObjM = Gia_ManObj( pMiter, Abc_Lit2Var(pObj2->Value) );
         pObj = Gia_ManObj( pGia, Gia_ObjId(pMiter, pObjM) );
         pObj->fMark1 = 1;
     }
@@ -1965,7 +1965,7 @@ int Gia_ManFilterEquivsUsingParts( Gia_Man_t * pGia, char * pName1, char * pName
     {
         if ( pObj1->Value == ~0 )
             continue;
-        pObjM = Gia_ManObj( pMiter, Gia_Lit2Var(pObj1->Value) );
+        pObjM = Gia_ManObj( pMiter, Abc_Lit2Var(pObj1->Value) );
         pObj = Gia_ManObj( pGia, Gia_ObjId(pMiter, pObjM) );
         pObj->fMark0 = 1;
     }
@@ -1974,7 +1974,7 @@ int Gia_ManFilterEquivsUsingParts( Gia_Man_t * pGia, char * pName1, char * pName
     {
         if ( pObj2->Value == ~0 )
             continue;
-        pObjM = Gia_ManObj( pMiter, Gia_Lit2Var(pObj2->Value) );
+        pObjM = Gia_ManObj( pMiter, Abc_Lit2Var(pObj2->Value) );
         pObj = Gia_ManObj( pGia, Gia_ObjId(pMiter, pObjM) );
         pObj->fMark1 = 1;
     }
diff --git a/src/aig/gia/giaEra.c b/src/aig/gia/giaEra.c
index ec3e1b1b..672149bc 100644
--- a/src/aig/gia/giaEra.c
+++ b/src/aig/gia/giaEra.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "gia.h"
-#include "mem.h"
+#include "src/misc/mem/mem.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -45,7 +45,7 @@ struct Gia_ManEra_t_
 {
     Gia_Man_t *    pAig;         // user's AIG manager
     int            nWordsSim;       // 2^(PInum)
-    int            nWordsDat;   // Gia_BitWordNum
+    int            nWordsDat;   // Abc_BitWordNum
     unsigned *     pDataSim;     // simulation data
     Mem_Fixed_t *  pMemory;      // memory manager
     Vec_Ptr_t *    vStates;      // reached states
@@ -83,12 +83,12 @@ Gia_ManEra_t * Gia_ManEraCreate( Gia_Man_t * pAig )
     int i;
     p = ABC_CALLOC( Gia_ManEra_t, 1 );
     p->pAig      = pAig;
-    p->nWordsSim = Gia_TruthWordNum( Gia_ManPiNum(pAig) );
-    p->nWordsDat = Gia_BitWordNum( Gia_ManRegNum(pAig) );
+    p->nWordsSim = Abc_TruthWordNum( Gia_ManPiNum(pAig) );
+    p->nWordsDat = Abc_BitWordNum( Gia_ManRegNum(pAig) );
     p->pDataSim  = ABC_ALLOC( unsigned, p->nWordsSim*Gia_ManObjNum(pAig) );
     p->pMemory   = Mem_FixedStart( sizeof(Gia_ObjEra_t) + sizeof(unsigned) * p->nWordsDat );
     p->vStates   = Vec_PtrAlloc( 100000 );
-    p->nBins     = Gia_PrimeCudd( 100000 );
+    p->nBins     = Abc_PrimeCudd( 100000 );
     p->pBins     = ABC_CALLOC( unsigned, p->nBins );
     Vec_PtrPush( p->vStates, NULL );
     // assign primary input values
@@ -226,7 +226,7 @@ void Gia_ManEraHashResize( Gia_ManEra_t * p )
     // replace the table
     pBinsOld = p->pBins;
     nBinsOld = p->nBins;
-    p->nBins = Gia_PrimeCudd( 3 * p->nBins ); 
+    p->nBins = Abc_PrimeCudd( 3 * p->nBins ); 
     p->pBins = ABC_CALLOC( unsigned, p->nBins );
     // rehash the entries from the old table
     Counter = 0;
@@ -266,7 +266,7 @@ void Gia_ManInsertState( Gia_ManEra_t * p, Gia_ObjEra_t * pState )
     Gia_ManForEachRo( p->pAig, pObj, i )
     {
         pSimInfo = Gia_ManEraData( p, Gia_ObjId(p->pAig, pObj) );
-        if ( Gia_InfoHasBit(pState->pData, i) )
+        if ( Abc_InfoHasBit(pState->pData, i) )
             memset( pSimInfo, 0xff, sizeof(unsigned) * p->nWordsSim );
         else
             memset( pSimInfo, 0, sizeof(unsigned) * p->nWordsSim );
@@ -465,8 +465,8 @@ int Gia_ManAnalyzeResult( Gia_ManEra_t * p, Gia_ObjEra_t * pState, int fMiter )
         Gia_ManForEachRi( p->pAig, pObj, i )
         {
             pSimInfo = Gia_ManEraData( p, Gia_ObjId(p->pAig, pObj) );
-            if ( Gia_InfoHasBit(p->pStateNew->pData, i) != Gia_InfoHasBit(pSimInfo, k) )
-                Gia_InfoXorBit( p->pStateNew->pData, i );
+            if ( Abc_InfoHasBit(p->pStateNew->pData, i) != Abc_InfoHasBit(pSimInfo, k) )
+                Abc_InfoXorBit( p->pStateNew->pData, i );
         }
         piPlace = Gia_ManEraHashFind( p, p->pStateNew );
         if ( piPlace == NULL )
diff --git a/src/aig/gia/giaEra2.c b/src/aig/gia/giaEra2.c
index b3e516eb..265335e2 100644
--- a/src/aig/gia/giaEra2.c
+++ b/src/aig/gia/giaEra2.c
@@ -136,11 +136,11 @@ static inline Gia_ObjAre_t *  Gia_ObjNextObj0( Gia_ManAre_t * p, Gia_ObjAre_t *
 static inline Gia_ObjAre_t *  Gia_ObjNextObj1( Gia_ManAre_t * p, Gia_ObjAre_t * q )   { return Gia_ManAreObj( p, q->F[1] );                      }
 static inline Gia_ObjAre_t *  Gia_ObjNextObj2( Gia_ManAre_t * p, Gia_ObjAre_t * q )   { return Gia_ManAreObj( p, q->F[2] );                      }
 
-static inline int             Gia_StaHasValue0( Gia_StaAre_t * p, int iReg )          { return Gia_InfoHasBit( p->pData,  iReg << 1 );           }
-static inline int             Gia_StaHasValue1( Gia_StaAre_t * p, int iReg )          { return Gia_InfoHasBit( p->pData, (iReg << 1) + 1 );      }
+static inline int             Gia_StaHasValue0( Gia_StaAre_t * p, int iReg )          { return Abc_InfoHasBit( p->pData,  iReg << 1 );           }
+static inline int             Gia_StaHasValue1( Gia_StaAre_t * p, int iReg )          { return Abc_InfoHasBit( p->pData, (iReg << 1) + 1 );      }
 
-static inline void            Gia_StaSetValue0( Gia_StaAre_t * p, int iReg )          { Gia_InfoSetBit( p->pData,  iReg << 1 );                  }
-static inline void            Gia_StaSetValue1( Gia_StaAre_t * p, int iReg )          { Gia_InfoSetBit( p->pData, (iReg << 1) + 1 );             }
+static inline void            Gia_StaSetValue0( Gia_StaAre_t * p, int iReg )          { Abc_InfoSetBit( p->pData,  iReg << 1 );                  }
+static inline void            Gia_StaSetValue1( Gia_StaAre_t * p, int iReg )          { Abc_InfoSetBit( p->pData, (iReg << 1) + 1 );             }
 
 static inline Gia_StaAre_t *  Gia_StaPrev( Gia_ManAre_t * p, Gia_StaAre_t * pS )      { return Gia_ManAreSta(p, pS->iPrev);                      }
 static inline Gia_StaAre_t *  Gia_StaNext( Gia_ManAre_t * p, Gia_StaAre_t * pS )      { return Gia_ManAreSta(p, pS->iNext);                      }
@@ -198,7 +198,7 @@ void Gia_ManCountMintermsInCube( Gia_StaAre_t * pCube, int nVars, unsigned * pSt
         for ( i = 0; i < nVars; i++ )
             if ( m & (1 << i) )
                 Mint |= (1 << Dashes[i]);
-        Gia_InfoSetBit( pStore, Mint );
+        Abc_InfoSetBit( pStore, Mint );
     }
 }
 
@@ -220,7 +220,7 @@ int Gia_ManCountMinterms( Gia_ManAre_t * p )
     int i, nMemSize, Counter = 0;
     if ( Gia_ManRegNum(p->pAig) > 30 )
         return -1;
-    nMemSize = Gia_BitWordNum( 1 << Gia_ManRegNum(p->pAig) );
+    nMemSize = Abc_BitWordNum( 1 << Gia_ManRegNum(p->pAig) );
     pMemory  = ABC_CALLOC( unsigned, nMemSize );
     Gia_ManAreForEachCubeStore( p, pCube, i )
         if ( Gia_StaIsUsed(pCube) )
@@ -477,7 +477,7 @@ Gia_ManAre_t * Gia_ManAreCreate( Gia_Man_t * pAig )
     assert( sizeof(Gia_ObjAre_t) == 16 );
     p = ABC_CALLOC( Gia_ManAre_t, 1 );
     p->pAig       = pAig;
-    p->nWords     = Gia_BitWordNum( 2 * Gia_ManRegNum(pAig) );
+    p->nWords     = Abc_BitWordNum( 2 * Gia_ManRegNum(pAig) );
     p->nSize      = sizeof(Gia_StaAre_t)/4 + p->nWords;
     p->ppObjs     = ABC_CALLOC( unsigned *, MAX_PAGE_NUM );
     p->ppStas     = ABC_CALLOC( unsigned *, MAX_PAGE_NUM );
@@ -1421,7 +1421,7 @@ static inline Gia_Obj_t * Gia_ManAreMostUsedPi( Gia_ManAre_t * p )
         if ( pObj->Value <= 1 )
             continue;
         Gia_ManIncrementTravId( p->pNew );
-        Gia_ManAreMostUsedPi_rec( p->pNew, Gia_ManObj(p->pNew, Gia_Lit2Var(pObj->Value)) );
+        Gia_ManAreMostUsedPi_rec( p->pNew, Gia_ManObj(p->pNew, Abc_Lit2Var(pObj->Value)) );
     }
     // check the CI counters
     Gia_ManForEachCi( p->pNew, pObj, i )
@@ -1471,7 +1471,7 @@ static inline int Gia_ManCheckPOs( Gia_ManAre_t * p )
     int i, CountCur, CountMax = 0;
     Gia_ManForEachPo( p->pAig, pObj, i )
     {
-        pObjNew = Gia_ManObj( p->pNew, Gia_Lit2Var(pObj->Value) );
+        pObjNew = Gia_ManObj( p->pNew, Abc_Lit2Var(pObj->Value) );
         if ( Gia_ObjIsConst0(pObjNew) )
             CountCur = 0;
         else 
@@ -1479,7 +1479,7 @@ static inline int Gia_ManCheckPOs( Gia_ManAre_t * p )
             Gia_ManIncrementTravId( p->pNew );
             CountCur = Gia_ManCheckPOs_rec( p->pNew, pObjNew );
         }
-        CountMax = ABC_MAX( CountMax, CountCur );
+        CountMax = Abc_MaxInt( CountMax, CountCur );
     }
     return CountMax;
 }
@@ -1501,10 +1501,10 @@ static inline int Gia_ManCheckPOstatus( Gia_ManAre_t * p )
     int i;
     Gia_ManForEachPo( p->pAig, pObj, i )
     {
-        pObjNew = Gia_ManObj( p->pNew, Gia_Lit2Var(pObj->Value) );
+        pObjNew = Gia_ManObj( p->pNew, Abc_Lit2Var(pObj->Value) );
         if ( Gia_ObjIsConst0(pObjNew) )
         {
-            if ( Gia_LitIsCompl(pObj->Value) )
+            if ( Abc_LitIsCompl(pObj->Value) )
             {
                 p->iOutFail = i;
                 return 1;
@@ -1638,7 +1638,7 @@ int Gia_ManAreDeriveNexts( Gia_ManAre_t * p, Gia_PtrAre_t Sta )
         else if ( Gia_StaHasValue1( pSta, i ) )
             pObj->Value = 1;
         else // don't-care literal
-            pObj->Value = Gia_Var2Lit( Gia_ObjId( p->pNew, Gia_ManCi(p->pNew, Gia_ObjCioId(pObj)) ), 0 );
+            pObj->Value = Abc_Var2Lit( Gia_ObjId( p->pNew, Gia_ManCi(p->pNew, Gia_ObjCioId(pObj)) ), 0 );
     }
     Gia_ManForEachAnd( p->pAig, pObj, i )
         pObj->Value = Gia_ManHashAnd( p->pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
@@ -1770,8 +1770,8 @@ int Gia_ManArePerform( Gia_Man_t * pAig, int nStatesMax, int fMiter, int fVerbos
 ABC_NAMESPACE_IMPL_END
 
 #include "giaAig.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -1848,22 +1848,22 @@ void Gia_ManAreDeriveCexSat( Gia_ManAre_t * p, Gia_StaAre_t * pCur, Gia_StaAre_t
     for ( i = 0; i < Gia_ManRegNum(p->pAig); i++ )
     {
         if ( Gia_StaHasValue0(pCur, i) )
-            Vec_IntPush( p->vAssumps, Gia_Var2Lit( Vec_IntEntry(p->vSatNumCis, Gia_ManPiNum(p->pAig)+i), 1 ) );
+            Vec_IntPush( p->vAssumps, Abc_Var2Lit( Vec_IntEntry(p->vSatNumCis, Gia_ManPiNum(p->pAig)+i), 1 ) );
         else if ( Gia_StaHasValue1(pCur, i) )
-            Vec_IntPush( p->vAssumps, Gia_Var2Lit( Vec_IntEntry(p->vSatNumCis, Gia_ManPiNum(p->pAig)+i), 0 ) );
+            Vec_IntPush( p->vAssumps, Abc_Var2Lit( Vec_IntEntry(p->vSatNumCis, Gia_ManPiNum(p->pAig)+i), 0 ) );
     }
     if ( pNext )
     for ( i = 0; i < Gia_ManRegNum(p->pAig); i++ )
     {
         if ( Gia_StaHasValue0(pNext, i) )
-            Vec_IntPush( p->vAssumps, Gia_Var2Lit( Vec_IntEntry(p->vSatNumCos, Gia_ManPoNum(p->pAig)+i), 1 ) );
+            Vec_IntPush( p->vAssumps, Abc_Var2Lit( Vec_IntEntry(p->vSatNumCos, Gia_ManPoNum(p->pAig)+i), 1 ) );
         else if ( Gia_StaHasValue1(pNext, i) )
-            Vec_IntPush( p->vAssumps, Gia_Var2Lit( Vec_IntEntry(p->vSatNumCos, Gia_ManPoNum(p->pAig)+i), 0 ) );
+            Vec_IntPush( p->vAssumps, Abc_Var2Lit( Vec_IntEntry(p->vSatNumCos, Gia_ManPoNum(p->pAig)+i), 0 ) );
     }
     if ( iOutFailed >= 0 )
     {
         assert( iOutFailed < Gia_ManPoNum(p->pAig) );
-        Vec_IntPush( p->vAssumps, Gia_Var2Lit( Vec_IntEntry(p->vSatNumCos, iOutFailed), 0 ) );
+        Vec_IntPush( p->vAssumps, Abc_Var2Lit( Vec_IntEntry(p->vSatNumCos, iOutFailed), 0 ) );
     }
     // solve SAT
     status = sat_solver_solve( (sat_solver *)p->pSat, (int *)Vec_IntArray(p->vAssumps), (int *)Vec_IntArray(p->vAssumps) + Vec_IntSize(p->vAssumps), 
@@ -1935,7 +1935,7 @@ Abc_Cex_t * Gia_ManAreDeriveCex( Gia_ManAre_t * p, Gia_StaAre_t * pLast )
         Vec_IntForEachEntry( p->vCofVars, Var, v )
         {
             assert( Var < Gia_ManPiNum(p->pAig) );
-            Gia_InfoSetBit( pCex->pData, Gia_ManRegNum(p->pAig) + (Vec_PtrSize(vStates)-1-i) * Gia_ManPiNum(p->pAig) + Var );
+            Abc_InfoSetBit( pCex->pData, Gia_ManRegNum(p->pAig) + (Vec_PtrSize(vStates)-1-i) * Gia_ManPiNum(p->pAig) + Var );
         }
     }
     // free temporary things
diff --git a/src/aig/gia/giaFanout.c b/src/aig/gia/giaFanout.c
index c3e39405..412594ad 100644
--- a/src/aig/gia/giaFanout.c
+++ b/src/aig/gia/giaFanout.c
@@ -120,7 +120,7 @@ void Gia_ObjAddFanout( Gia_Man_t * p, Gia_Obj_t * pObj, Gia_Obj_t * pFanout )
     assert( Gia_ObjId(p, pFanout) > 0 );
     if ( Gia_ObjId(p, pObj) >= p->nFansAlloc || Gia_ObjId(p, pFanout) >= p->nFansAlloc )
     {
-        int nFansAlloc = 2 * ABC_MAX( Gia_ObjId(p, pObj), Gia_ObjId(p, pFanout) ); 
+        int nFansAlloc = 2 * Abc_MaxInt( Gia_ObjId(p, pObj), Gia_ObjId(p, pFanout) ); 
         p->pFanData = ABC_REALLOC( int, p->pFanData, 5 * nFansAlloc );
         memset( p->pFanData + 5 * p->nFansAlloc, 0, sizeof(int) * 5 * (nFansAlloc - p->nFansAlloc) );
         p->nFansAlloc = nFansAlloc;
diff --git a/src/aig/gia/giaForce.c b/src/aig/gia/giaForce.c
index b9135404..6927266b 100644
--- a/src/aig/gia/giaForce.c
+++ b/src/aig/gia/giaForce.c
@@ -609,7 +609,7 @@ int Frc_ManCrossCut_rec( Frc_Man_t * p, Frc_Obj_t * pObj )
         Frc_Obj_t * pFanin;
         int i;
         p->nCutCur++;
-        p->nCutMax = ABC_MAX( p->nCutMax, p->nCutCur );
+        p->nCutMax = Abc_MaxInt( p->nCutMax, p->nCutCur );
         if ( !Frc_ObjIsCi(pObj) )
             Frc_ObjForEachFanin( pObj, pFanin, i )
                 p->nCutCur -= Frc_ManCrossCut_rec( p, pFanin );
@@ -636,7 +636,7 @@ int Frc_ManCrossCut2_rec( Frc_Man_t * p, Frc_Obj_t * pObj )
         Frc_Obj_t * pFanin;
         int i;
         p->nCutCur++;
-        p->nCutMax = ABC_MAX( p->nCutMax, p->nCutCur );
+        p->nCutMax = Abc_MaxInt( p->nCutMax, p->nCutCur );
         if ( !Frc_ObjIsCi(pObj) )
             Frc_ObjForEachFaninReverse( pObj, pFanin, i )
                 p->nCutCur -= Frc_ManCrossCut2_rec( p, pFanin );
@@ -912,8 +912,8 @@ void Frc_ManPlacementRefine( Frc_Man_t * p, int nIters, int fVerbose )
             iMinX = iMaxX = pThis->pPlace;
             Frc_ObjForEachFanout( pThis, pNext, k )
             {
-                iMinX = ABC_MIN( iMinX, pNext->pPlace );
-                iMaxX = ABC_MAX( iMaxX, pNext->pPlace );
+                iMinX = Abc_MinInt( iMinX, pNext->pPlace );
+                iMaxX = Abc_MaxInt( iMaxX, pNext->pPlace );
             }
             pThis->fEdgeCenter = 0.5 * (iMaxX + iMinX);
             CostThis += (iMaxX - iMinX);
diff --git a/src/aig/gia/giaFrames.c b/src/aig/gia/giaFrames.c
index 480326bd..237e6c5c 100644
--- a/src/aig/gia/giaFrames.c
+++ b/src/aig/gia/giaFrames.c
@@ -90,7 +90,7 @@ void Gia_ManUnrollDup_rec( Gia_Man_t * pNew, Gia_Obj_t * pObj, int Id )
         pObj->Value = Gia_ManAppendAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
     }
     else assert( 0 );
-    Gia_ManObj(pNew, Gia_Lit2Var(pObj->Value))->Value = Id;
+    Gia_ManObj(pNew, Abc_Lit2Var(pObj->Value))->Value = Id;
 }
 
 /**Function*************************************************************
@@ -111,7 +111,7 @@ Gia_Man_t * Gia_ManUnrollDup( Gia_Man_t * p, Vec_Int_t * vLimit )
     int i;
     assert( Vec_IntSize(vLimit) == 0 );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
 
     // save constant class
     Gia_ManFillValue( p );
@@ -161,7 +161,7 @@ Vec_Ptr_t * Gia_ManUnrollAbs( Gia_Man_t * p, int nFrames )
     int nObjBits, nObjMask;
     int f, fMax, k, Entry, Prev, iStart, iStop, Size;
     // get the bitmasks
-    nObjBits = Gia_Base2Log( Gia_ManObjNum(p) );
+    nObjBits = Abc_Base2Log( Gia_ManObjNum(p) );
     nObjMask = (1 << nObjBits) - 1;
     assert( Gia_ManObjNum(p) <= nObjMask );
     // derive the tents
@@ -349,12 +349,12 @@ static inline int Gia_ObjUnrRead( Gia_ManUnr_t * p, int Id, int Degree )
 static inline int Gia_ObjUnrReadCopy0( Gia_ManUnr_t * p, Gia_Obj_t * pObj, int Id )  
 {
     int Lit = Gia_ObjUnrRead(p, Gia_ObjFaninId0(pObj, Id), Vec_IntEntry(p->vDegDiff, 2*Id));
-    return Gia_LitNotCond( Lit, Gia_ObjFaninC0(pObj) );
+    return Abc_LitNotCond( Lit, Gia_ObjFaninC0(pObj) );
 }
 static inline int Gia_ObjUnrReadCopy1( Gia_ManUnr_t * p, Gia_Obj_t * pObj, int Id )  
 {
     int Lit = Gia_ObjUnrRead(p, Gia_ObjFaninId1(pObj, Id), Vec_IntEntry(p->vDegDiff, 2*Id+1));
-    return Gia_LitNotCond( Lit, Gia_ObjFaninC1(pObj) );
+    return Abc_LitNotCond( Lit, Gia_ObjFaninC1(pObj) );
 }
 static inline int Gia_ObjUnrReadCi( Gia_ManUnr_t * p, int Id, int f, Gia_Man_t * pNew )  
 {
@@ -367,7 +367,7 @@ static inline int Gia_ObjUnrReadCi( Gia_ManUnr_t * p, int Id, int f, Gia_Man_t *
             pObj = Gia_ManPi( pNew, Gia_ManPiNum(p->pAig) * f + Gia_ObjCioId(pObjReal) );
         else
             pObj = Gia_ManPi( pNew, Gia_ManRegNum(p->pAig) + Gia_ManPiNum(p->pAig) * f + Gia_ObjCioId(pObjReal) );
-        return Gia_Var2Lit( Gia_ObjId(pNew, pObj), 0 );
+        return Abc_Var2Lit( Gia_ObjId(pNew, pObj), 0 );
     }
     if ( f == 0 ) // initialize!
     {
@@ -378,9 +378,9 @@ static inline int Gia_ObjUnrReadCi( Gia_ManUnr_t * p, int Id, int f, Gia_Man_t *
             pObj = Gia_ManPi( pNew, Gia_ManPiNum(p->pAig) * p->pPars->nFrames + Gia_ObjCioId(pObjReal)-Gia_ManPiNum(p->pAig) );
         else
             pObj = Gia_ManPi( pNew, Gia_ObjCioId(pObjReal)-Gia_ManPiNum(p->pAig) );
-        return Gia_Var2Lit( Gia_ObjId(pNew, pObj), 0 );
+        return Abc_Var2Lit( Gia_ObjId(pNew, pObj), 0 );
     }
-    pObj = Gia_ManObj( p->pOrder, Gia_Lit2Var(Gia_ObjRoToRi(p->pAig, pObjReal)->Value) );
+    pObj = Gia_ManObj( p->pOrder, Abc_Lit2Var(Gia_ObjRoToRi(p->pAig, pObjReal)->Value) );
     assert( Gia_ObjIsCo(pObj) );
     return Gia_ObjUnrRead( p, Gia_ObjId(p->pOrder, pObj), 0 );
 }
@@ -405,7 +405,7 @@ void * Gia_ManUnrollStart( Gia_Man_t * pAig, Gia_ParFra_t * pPars )
     // start timeframes
     assert( p->pNew == NULL );
     p->pNew = Gia_ManStart( 10000 );
-    p->pNew->pName = Gia_UtilStrsav( p->pAig->pName );
+    p->pNew->pName = Abc_UtilStrsav( p->pAig->pName );
     Gia_ManHashAlloc( p->pNew );
     // create combinational inputs
     if ( !p->pPars->fSaveLastLit ) // only in the case when unrolling depth is known
@@ -541,7 +541,7 @@ Gia_Man_t * Gia_ManUnroll( Gia_ManUnr_t * p )
     int fMax, f, i, Lit, Beg, End;
     // start timeframes
     pNew = Gia_ManStart( 10000 );
-    pNew->pName = Gia_UtilStrsav( p->pAig->pName );
+    pNew->pName = Abc_UtilStrsav( p->pAig->pName );
     Gia_ManHashAlloc( pNew );
     // create combinational inputs
     for ( f = 0; f < p->pPars->nFrames; f++ )
@@ -754,7 +754,7 @@ Gia_Man_t * Gia_ManFramesInit( Gia_Man_t * pAig, Gia_ParFra_t * pPars )
     Gia_ManFraSupports( p );
     pFrames = Gia_ManStart( Vec_VecSizeSize((Vec_Vec_t*)p->vIns)+
         Vec_VecSizeSize((Vec_Vec_t*)p->vAnds)+Vec_VecSizeSize((Vec_Vec_t*)p->vOuts) );
-    pFrames->pName = Gia_UtilStrsav( pAig->pName );
+    pFrames->pName = Abc_UtilStrsav( pAig->pName );
     Gia_ManHashAlloc( pFrames );
     Gia_ManConst0(pAig)->Value = 0;
     for ( f = 0; f < pPars->nFrames; f++ )
@@ -864,7 +864,7 @@ Gia_Man_t * Gia_ManFrames( Gia_Man_t * pAig, Gia_ParFra_t * pPars )
     if ( pPars->fInit )
         return Gia_ManFramesInit( pAig, pPars );
     pFrames = Gia_ManStart( pPars->nFrames * Gia_ManObjNum(pAig) );
-    pFrames->pName = Gia_UtilStrsav( pAig->pName );
+    pFrames->pName = Abc_UtilStrsav( pAig->pName );
     Gia_ManHashAlloc( pFrames );
     Gia_ManConst0(pAig)->Value = 0;
     for ( f = 0; f < pPars->nFrames; f++ )
diff --git a/src/aig/gia/giaFront.c b/src/aig/gia/giaFront.c
index 6eb20635..903a66e7 100644
--- a/src/aig/gia/giaFront.c
+++ b/src/aig/gia/giaFront.c
@@ -115,7 +115,7 @@ Gia_Man_t * Gia_ManFront( Gia_Man_t * p )
     Gia_ManSetRefs( p );
     // start the new manager
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->nFront = 1 + (int)((float)1.1 * nCrossCutMaxInit); 
     // start the frontier
     pFront = ABC_CALLOC( char, pNew->nFront );
@@ -134,7 +134,7 @@ Gia_Man_t * Gia_ManFront( Gia_Man_t * p )
                 nCrossCutMax = nCrossCut;
             // create new node
             iLit = Gia_ManAppendCi( pNew );
-            pObjNew = Gia_ManObj( pNew, Gia_Lit2Var(iLit) );
+            pObjNew = Gia_ManObj( pNew, Abc_Lit2Var(iLit) );
             assert( Gia_ObjId(pNew, pObjNew) == Gia_ObjId(p, pObj) );
             pObjNew->Value = iFront = Gia_ManFrontFindNext( pFront, pNew->nFront, iFront );
             // handle CIs without fanout
@@ -147,7 +147,7 @@ Gia_Man_t * Gia_ManFront( Gia_Man_t * p )
             assert( Gia_ObjValue(pObj) == 0 );
             // create new node
             iLit = Gia_ManAppendCo( pNew, 0 );
-            pObjNew = Gia_ManObj( pNew, Gia_Lit2Var(iLit) );
+            pObjNew = Gia_ManObj( pNew, Abc_Lit2Var(iLit) );
             assert( Gia_ObjId(pNew, pObjNew) == Gia_ObjId(p, pObj) );
             // get the fanin
             pFanin0New = Gia_ManObj( pNew, Gia_ObjFaninId0(pObj, i) );
diff --git a/src/aig/gia/giaGiarf.c b/src/aig/gia/giaGiarf.c
index 501f9bb3..2f18c16d 100644
--- a/src/aig/gia/giaGiarf.c
+++ b/src/aig/gia/giaGiarf.c
@@ -301,7 +301,7 @@ int Hcd_ManHashKey( unsigned * pSim, int nWords, int nTableSize )
 void Hcd_ManClassesRehash( Hcd_Man_t * p, Vec_Int_t * vRefined )
 {
     int * pTable, nTableSize, Key, i, k;
-    nTableSize = Gia_PrimeCudd( 100 + Vec_IntSize(vRefined) / 5 );
+    nTableSize = Abc_PrimeCudd( 100 + Vec_IntSize(vRefined) / 5 );
     pTable = ABC_CALLOC( int, nTableSize );
     Vec_IntForEachEntry( vRefined, i, k )
     {
@@ -538,7 +538,7 @@ Gia_Man_t * Gia_GenerateReducedLevel( Gia_Man_t * p, int Level, Vec_Ptr_t ** pvR
     vRoots = Vec_PtrAlloc( 100 );
     // copy unmarked nodes
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachCi( p, pObj, i )
         pObj->Value = Gia_ManAppendCi(pNew);
@@ -553,7 +553,7 @@ Gia_Man_t * Gia_GenerateReducedLevel( Gia_Man_t * p, int Level, Vec_Ptr_t ** pvR
         {
 //            printf( "Substituting %d <--- %d\n", Gia_ObjId(p, pRepr), Gia_ObjId(p, pObj) ); 
             assert( pRepr < pObj );
-            pObj->Value  = Gia_LitNotCond( pRepr->Value, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
+            pObj->Value  = Abc_LitNotCond( pRepr->Value, Gia_ObjPhase(pRepr) ^ Gia_ObjPhase(pObj) );
             continue;
         }
         pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
@@ -644,19 +644,19 @@ int Gia_GiarfStorePatternTry( Vec_Ptr_t * vInfo, Vec_Ptr_t * vPres, int iBit, in
     int i;
     for ( i = 0; i < nLits; i++ )
     {
-        pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
-        pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
-        if ( Gia_InfoHasBit( pPres, iBit ) && 
-             Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
+        pInfo = (unsigned *)Vec_PtrEntry(vInfo, Abc_Lit2Var(pLits[i]));
+        pPres = (unsigned *)Vec_PtrEntry(vPres, Abc_Lit2Var(pLits[i]));
+        if ( Abc_InfoHasBit( pPres, iBit ) && 
+             Abc_InfoHasBit( pInfo, iBit ) == Abc_LitIsCompl(pLits[i]) )
              return 0;
     }
     for ( i = 0; i < nLits; i++ )
     {
-        pInfo = (unsigned *)Vec_PtrEntry(vInfo, Gia_Lit2Var(pLits[i]));
-        pPres = (unsigned *)Vec_PtrEntry(vPres, Gia_Lit2Var(pLits[i]));
-        Gia_InfoSetBit( pPres, iBit );
-        if ( Gia_InfoHasBit( pInfo, iBit ) == Gia_LitIsCompl(pLits[i]) )
-            Gia_InfoXorBit( pInfo, iBit );
+        pInfo = (unsigned *)Vec_PtrEntry(vInfo, Abc_Lit2Var(pLits[i]));
+        pPres = (unsigned *)Vec_PtrEntry(vPres, Abc_Lit2Var(pLits[i]));
+        Abc_InfoSetBit( pPres, iBit );
+        if ( Abc_InfoHasBit( pInfo, iBit ) == Abc_LitIsCompl(pLits[i]) )
+            Abc_InfoXorBit( pInfo, iBit );
     }
     return 1;
 }
@@ -699,10 +699,10 @@ void Gia_GiarfInsertPattern( Hcd_Man_t * p, Vec_Int_t * vCex, int k )
     int Lit, i;
     Vec_IntForEachEntry( vCex, Lit, i )
     {
-        pObj = Gia_ManCi( p->pGia, Gia_Lit2Var(Lit) );
+        pObj = Gia_ManCi( p->pGia, Abc_Lit2Var(Lit) );
         pInfo = Hcd_ObjSimP( p, Gia_ObjId( p->pGia, pObj ) );
-        if ( Gia_InfoHasBit( pInfo, k ) == Gia_LitIsCompl(Lit) )
-            Gia_InfoXorBit( pInfo, k );
+        if ( Abc_InfoHasBit( pInfo, k ) == Abc_LitIsCompl(Lit) )
+            Abc_InfoXorBit( pInfo, k );
     }
 }
 
@@ -737,7 +737,7 @@ void Gia_GiarfPrintClasses( Gia_Man_t * pGia )
 
 ABC_NAMESPACE_IMPL_END
 
-#include "cecInt.h"
+#include "src/proof/cec/cecInt.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -785,7 +785,7 @@ int Gia_ComputeEquivalencesLevel( Hcd_Man_t * p, Gia_Man_t * pGiaLev, Vec_Ptr_t
         iRoot = Gia_ObjId( p->pGia, pRoot );
         if ( !Gia_ObjIsConst( p->pGia, iRoot ) )
             continue;
-        iRootNew = Gia_LitNotCond( pRoot->Value, pRoot->fPhase );
+        iRootNew = Abc_LitNotCond( pRoot->Value, pRoot->fPhase );
         assert( iRootNew != 1 );
         if ( fUse2Solver )
         {
@@ -880,8 +880,8 @@ int Gia_ComputeEquivalencesLevel( Hcd_Man_t * p, Gia_Man_t * pGiaLev, Vec_Ptr_t
             pMemberPrev = (Gia_Obj_t *)Vec_PtrEntryLast( vMembers );
             Vec_PtrForEachEntry( Gia_Obj_t *, vMembers, pMember, k )
             {
-                iMemberPrev = Gia_LitNotCond( pMemberPrev->Value,  pMemberPrev->fPhase ); 
-                iMember     = Gia_LitNotCond( pMember->Value,     !pMember->fPhase ); 
+                iMemberPrev = Abc_LitNotCond( pMemberPrev->Value,  pMemberPrev->fPhase ); 
+                iMember     = Abc_LitNotCond( pMember->Value,     !pMember->fPhase ); 
                 assert( iMemberPrev != iMember );
                 if ( fUse2Solver )
                 {
diff --git a/src/aig/gia/giaGlitch.c b/src/aig/gia/giaGlitch.c
index a6e5315a..35d076e5 100644
--- a/src/aig/gia/giaGlitch.c
+++ b/src/aig/gia/giaGlitch.c
@@ -333,7 +333,7 @@ static inline int Gli_NodeComputeValue( Gli_Obj_t * pNode )
     int i, Phase = 0;
     for ( i = 0; i < (int)pNode->nFanins; i++ )
         Phase |= (Gli_ObjFanin(pNode, i)->fPhase << i);
-    return Gia_InfoHasBit( pNode->uTruth, Phase );
+    return Abc_InfoHasBit( pNode->uTruth, Phase );
 }
 
 /**Function*************************************************************
@@ -352,7 +352,7 @@ static inline int Gli_NodeComputeValue2( Gli_Obj_t * pNode )
     int i, Phase = 0;
     for ( i = 0; i < (int)pNode->nFanins; i++ )
         Phase |= (Gli_ObjFanin(pNode, i)->fPhase2 << i);
-    return Gia_InfoHasBit( pNode->uTruth, Phase );
+    return Abc_InfoHasBit( pNode->uTruth, Phase );
 }
 
 /**Function*************************************************************
@@ -593,7 +593,7 @@ unsigned Gli_ManSimulateSeqNode( Gli_Man_t * p, Gli_Obj_t * pNode )
         for ( k = 0; k < nFanins; k++ )
             if ( (pSimInfos[k] >> i) & 1 )
                 Phase |= (1 << k);
-        if ( Gia_InfoHasBit( pNode->uTruth, Phase ) )
+        if ( Abc_InfoHasBit( pNode->uTruth, Phase ) )
             Result |= (1 << i);
     }
     return Result;
@@ -755,7 +755,7 @@ void Gli_ManSwitchesAndGlitches( Gli_Man_t * p, int nPatterns, float PiTransProb
     }
     else 
     {
-        int nIters = Gia_BitWordNum(nPatterns);
+        int nIters = Abc_BitWordNum(nPatterns);
         Gli_ManSimulateSeqPref( p, 16 );
         for ( i = 0; i < 32; i++ )
         {
diff --git a/src/aig/gia/giaHash.c b/src/aig/gia/giaHash.c
index f346a310..41092cc7 100644
--- a/src/aig/gia/giaHash.c
+++ b/src/aig/gia/giaHash.c
@@ -46,10 +46,10 @@ static inline int Gia_ManHashOne( int iLit0, int iLit1, int TableSize )
 {
     unsigned Key = 0;
     assert( iLit0 < iLit1 );
-    Key ^= Gia_Lit2Var(iLit0) * 7937;
-    Key ^= Gia_Lit2Var(iLit1) * 2971;
-    Key ^= Gia_LitIsCompl(iLit0) * 911;
-    Key ^= Gia_LitIsCompl(iLit1) * 353;
+    Key ^= Abc_Lit2Var(iLit0) * 7937;
+    Key ^= Abc_Lit2Var(iLit1) * 2971;
+    Key ^= Abc_LitIsCompl(iLit0) * 911;
+    Key ^= Abc_LitIsCompl(iLit1) * 353;
     return (int)(Key % TableSize);
 }
 
@@ -68,8 +68,8 @@ static inline int * Gia_ManHashFind( Gia_Man_t * p, int iLit0, int iLit1 )
 {
     Gia_Obj_t * pThis;
     int * pPlace = p->pHTable + Gia_ManHashOne( iLit0, iLit1, p->nHTable );
-    for ( pThis = (*pPlace)? Gia_ManObj(p, Gia_Lit2Var(*pPlace)) : NULL; pThis; 
-          pPlace = (int *)&pThis->Value, pThis = (*pPlace)? Gia_ManObj(p, Gia_Lit2Var(*pPlace)) : NULL )
+    for ( pThis = (*pPlace)? Gia_ManObj(p, Abc_Lit2Var(*pPlace)) : NULL; pThis; 
+          pPlace = (int *)&pThis->Value, pThis = (*pPlace)? Gia_ManObj(p, Abc_Lit2Var(*pPlace)) : NULL )
               if ( Gia_ObjFaninLit0p(p, pThis) == iLit0 && Gia_ObjFaninLit1p(p, pThis) == iLit1 )
                   break;
     return pPlace;
@@ -109,7 +109,7 @@ int Gia_ManHashLookup( Gia_Man_t * p, Gia_Obj_t * p0, Gia_Obj_t * p1 )
 void Gia_ManHashAlloc( Gia_Man_t * p )  
 {
     assert( p->pHTable == NULL );
-    p->nHTable = Gia_PrimeCudd( p->nObjsAlloc );
+    p->nHTable = Abc_PrimeCudd( p->nObjsAlloc );
     p->pHTable = ABC_CALLOC( int, p->nHTable );
 }
 
@@ -134,7 +134,7 @@ void Gia_ManHashStart( Gia_Man_t * p )
     {
         pPlace = Gia_ManHashFind( p, Gia_ObjFaninLit0(pObj, i), Gia_ObjFaninLit1(pObj, i) );
         assert( *pPlace == 0 );
-        *pPlace = Gia_Var2Lit( i, 0 );
+        *pPlace = Abc_Var2Lit( i, 0 );
     }
 }
 
@@ -175,20 +175,20 @@ void Gia_ManHashResize( Gia_Man_t * p )
     // replace the table
     pHTableOld = p->pHTable;
     nHTableOld = p->nHTable;
-    p->nHTable = Gia_PrimeCudd( 2 * Gia_ManAndNum(p) ); 
+    p->nHTable = Abc_PrimeCudd( 2 * Gia_ManAndNum(p) ); 
     p->pHTable = ABC_CALLOC( int, p->nHTable );
     // rehash the entries from the old table
     Counter = 0;
     for ( i = 0; i < nHTableOld; i++ )
-    for ( pThis = (pHTableOld[i]? Gia_ManObj(p, Gia_Lit2Var(pHTableOld[i])) : NULL),
+    for ( pThis = (pHTableOld[i]? Gia_ManObj(p, Abc_Lit2Var(pHTableOld[i])) : NULL),
           iNext = (pThis? pThis->Value : 0);  
-          pThis;  pThis = (iNext? Gia_ManObj(p, Gia_Lit2Var(iNext)) : NULL),   
+          pThis;  pThis = (iNext? Gia_ManObj(p, Abc_Lit2Var(iNext)) : NULL),   
           iNext = (pThis? pThis->Value : 0)  )
     {
         pThis->Value = 0;
         pPlace = Gia_ManHashFind( p, Gia_ObjFaninLit0p(p, pThis), Gia_ObjFaninLit1p(p, pThis) );
         assert( *pPlace == 0 ); // should not be there
-        *pPlace = Gia_Var2Lit( Gia_ObjId(p, pThis), 0 );
+        *pPlace = Abc_Var2Lit( Gia_ObjId(p, pThis), 0 );
         assert( *pPlace != 0 );
         Counter++;
     }
@@ -220,9 +220,9 @@ void Gia_ManHashProfile( Gia_Man_t * p )
     for ( i = 0; i < Limit; i++ )
     {
         Counter = 0;
-        for ( pEntry = (p->pHTable[i]? Gia_ManObj(p, Gia_Lit2Var(p->pHTable[i])) : NULL); 
+        for ( pEntry = (p->pHTable[i]? Gia_ManObj(p, Abc_Lit2Var(p->pHTable[i])) : NULL); 
               pEntry; 
-              pEntry = (pEntry->Value? Gia_ManObj(p, Gia_Lit2Var(pEntry->Value)) : NULL) )
+              pEntry = (pEntry->Value? Gia_ManObj(p, Abc_Lit2Var(pEntry->Value)) : NULL) )
             Counter++;
         if ( Counter ) 
             printf( "%d ", Counter );
@@ -480,7 +480,7 @@ int Gia_ManHashAnd( Gia_Man_t * p, int iLit0, int iLit1 )
         return iLit1 ? iLit0 : 0;
     if ( iLit0 == iLit1 )
         return iLit1;
-    if ( iLit0 == Gia_LitNot(iLit1) )
+    if ( iLit0 == Abc_LitNot(iLit1) )
         return 0;
     if ( (p->nObjs & 0xFF) == 0 && 2 * p->nHTable < Gia_ManAndNum(p) )
         Gia_ManHashResize( p );
@@ -531,7 +531,7 @@ int Gia_ManHashAndTry( Gia_Man_t * p, int iLit0, int iLit1 )
         return iLit1 ? iLit0 : 0;
     if ( iLit0 == iLit1 )
         return iLit1;
-    if ( iLit0 == Gia_LitNot(iLit1) )
+    if ( iLit0 == Abc_LitNot(iLit1) )
         return 0;
     if ( iLit0 > iLit1 )
         iLit0 ^= iLit1, iLit1 ^= iLit0, iLit0 ^= iLit1;
@@ -556,10 +556,10 @@ int Gia_ManHashAndTry( Gia_Man_t * p, int iLit0, int iLit1 )
 ***********************************************************************/
 int Gia_ManHashXor( Gia_Man_t * p, int iLit0, int iLit1 )  
 { 
-    int fCompl = Gia_LitIsCompl(iLit0) ^ Gia_LitIsCompl(iLit1);
-    int iTemp0 = Gia_ManHashAnd( p, Gia_LitRegular(iLit0), Gia_LitNot(Gia_LitRegular(iLit1)) );
-    int iTemp1 = Gia_ManHashAnd( p, Gia_LitRegular(iLit1), Gia_LitNot(Gia_LitRegular(iLit0)) );
-    return Gia_LitNotCond( Gia_ManHashAnd( p, Gia_LitNot(iTemp0), Gia_LitNot(iTemp1) ), !fCompl );
+    int fCompl = Abc_LitIsCompl(iLit0) ^ Abc_LitIsCompl(iLit1);
+    int iTemp0 = Gia_ManHashAnd( p, Abc_LitRegular(iLit0), Abc_LitNot(Abc_LitRegular(iLit1)) );
+    int iTemp1 = Gia_ManHashAnd( p, Abc_LitRegular(iLit1), Abc_LitNot(Abc_LitRegular(iLit0)) );
+    return Abc_LitNotCond( Gia_ManHashAnd( p, Abc_LitNot(iTemp0), Abc_LitNot(iTemp1) ), !fCompl );
 }
 
 /**Function*************************************************************
@@ -575,9 +575,9 @@ int Gia_ManHashXor( Gia_Man_t * p, int iLit0, int iLit1 )
 ***********************************************************************/
 int Gia_ManHashMux( Gia_Man_t * p, int iCtrl, int iData1, int iData0 )  
 { 
-    int iTemp0 = Gia_ManHashAnd( p, Gia_LitNot(iCtrl), iData0 );
+    int iTemp0 = Gia_ManHashAnd( p, Abc_LitNot(iCtrl), iData0 );
     int iTemp1 = Gia_ManHashAnd( p, iCtrl, iData1 );
-    return Gia_LitNotCond( Gia_ManHashAnd( p, Gia_LitNot(iTemp0), Gia_LitNot(iTemp1) ), 1 );
+    return Abc_LitNotCond( Gia_ManHashAnd( p, Abc_LitNot(iTemp0), Abc_LitNot(iTemp1) ), 1 );
 }
 
 /**Function*************************************************************
@@ -597,7 +597,7 @@ Gia_Man_t * Gia_ManRehash( Gia_Man_t * p, int fAddStrash )
     Gia_Obj_t * pObj;
     int i;
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->fAddStrash = fAddStrash;
     Gia_ManHashAlloc( pNew );
     Gia_ManConst0(p)->Value = 0;
diff --git a/src/aig/gia/giaHcd.c b/src/aig/gia/giaHcd.c
index 454785b9..3f37e724 100644
--- a/src/aig/gia/giaHcd.c
+++ b/src/aig/gia/giaHcd.c
@@ -20,8 +20,8 @@
 
 #include "gia.h"
 #include "giaAig.h"
-#include "aig.h"
-#include "dar.h"
+#include "src/aig/aig/aig.h"
+#include "src/opt/dar/dar.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -332,7 +332,7 @@ Gia_Man_t * Hcd_ManChoiceMiter( Vec_Ptr_t * vGias )
     }
     // start the new manager
     pNew = Gia_ManStart( Vec_PtrSize(vGias) * Gia_ManObjNum(pGia0) );
-    pNew->pName = Gia_UtilStrsav( pGia0->pName );
+    pNew->pName = Abc_UtilStrsav( pGia0->pName );
     // create new CIs and assign them to the old manager CIs
     for ( k = 0; k < Gia_ManCiNum(pGia0); k++ )
     {
@@ -457,7 +457,7 @@ void Hcd_ManEquivToChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
     {
         if ( Gia_ObjIsConst0(pRepr) )
         {
-            pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+            pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
             return;
         }
         Hcd_ManEquivToChoices_rec( pNew, p, pRepr );
@@ -465,20 +465,20 @@ void Hcd_ManEquivToChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
         Hcd_ManEquivToChoices_rec( pNew, p, Gia_ObjFanin0(pObj) );
         Hcd_ManEquivToChoices_rec( pNew, p, Gia_ObjFanin1(pObj) );
         pObj->Value = Gia_ManHashAnd( pNew, Gia_ObjFanin0Copy(pObj), Gia_ObjFanin1Copy(pObj) );
-        if ( Gia_LitRegular(pObj->Value) == Gia_LitRegular(pRepr->Value) )
+        if ( Abc_LitRegular(pObj->Value) == Abc_LitRegular(pRepr->Value) )
         {
-            assert( (int)pObj->Value == Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) ) );
+            assert( (int)pObj->Value == Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) ) );
             return;
         }
         if ( pRepr->Value > pObj->Value ) // should never happen with high resource limit
             return;
         assert( pRepr->Value < pObj->Value );
-        pReprNew = Gia_ManObj( pNew, Gia_Lit2Var(pRepr->Value) );
-        pObjNew  = Gia_ManObj( pNew, Gia_Lit2Var(pObj->Value) );
+        pReprNew = Gia_ManObj( pNew, Abc_Lit2Var(pRepr->Value) );
+        pObjNew  = Gia_ManObj( pNew, Abc_Lit2Var(pObj->Value) );
         if ( Gia_ObjReprObj( pNew, Gia_ObjId(pNew, pObjNew) ) )
         {
             assert( Gia_ObjReprObj( pNew, Gia_ObjId(pNew, pObjNew) ) == pReprNew );
-            pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+            pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
             return;
         }
         if ( !Hcd_ObjCheckTfi( pNew, pReprNew, pObjNew ) )
@@ -487,7 +487,7 @@ void Hcd_ManEquivToChoices_rec( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pOb
             Gia_ObjSetRepr( pNew, Gia_ObjId(pNew, pObjNew), Gia_ObjId(pNew, pReprNew) );
             Hcd_ManAddNextEntry_rec( pNew, pReprNew, pObjNew ); 
         }
-        pObj->Value = Gia_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
+        pObj->Value = Abc_LitNotCond( pRepr->Value, Gia_ObjPhaseReal(pRepr) ^ Gia_ObjPhaseReal(pObj) );
         return;
     }
     assert( Gia_ObjIsAnd(pObj) );
@@ -563,7 +563,7 @@ Gia_Man_t * Hcd_ManEquivToChoices( Gia_Man_t * p, int nSnapshots )
     assert( (Gia_ManCoNum(p) % nSnapshots) == 0 );
     Gia_ManSetPhase( p );
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->pReprs = ABC_CALLOC( Gia_Rpr_t, Gia_ManObjNum(p) );
     pNew->pNexts = ABC_CALLOC( int, Gia_ManObjNum(p) );
     for ( i = 0; i < Gia_ManObjNum(p); i++ )
diff --git a/src/aig/gia/giaIf.c b/src/aig/gia/giaIf.c
index 787aa090..e03439d0 100644
--- a/src/aig/gia/giaIf.c
+++ b/src/aig/gia/giaIf.c
@@ -19,9 +19,9 @@
 ***********************************************************************/
 
 #include "gia.h"
-#include "aig.h"
-#include "if.h"
-#include "dar.h"
+#include "src/aig/aig/aig.h"
+#include "src/map/if/if.h"
+#include "src/opt/dar/dar.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -306,11 +306,11 @@ void Gia_ManPrintMappingStats( Gia_Man_t * p )
     {
         nLuts++;
         nFanins += Gia_ObjLutSize(p, i);
-        nLutSize = ABC_MAX( nLutSize, Gia_ObjLutSize(p, i) );
+        nLutSize = Abc_MaxInt( nLutSize, Gia_ObjLutSize(p, i) );
         Gia_LutForEachFanin( p, i, iFan, k )
-            pLevels[i] = ABC_MAX( pLevels[i], pLevels[iFan] );
+            pLevels[i] = Abc_MaxInt( pLevels[i], pLevels[iFan] );
         pLevels[i]++;
-        LevelMax = ABC_MAX( LevelMax, pLevels[i] );
+        LevelMax = Abc_MaxInt( LevelMax, pLevels[i] );
     }
     ABC_FREE( pLevels );
     Abc_Print( 1, "mapping (K=%d)  :  ", nLutSize );
@@ -355,7 +355,7 @@ int Gia_ManLutSizeMax( Gia_Man_t * p )
 {
     int i, nSizeMax = -1;
     Gia_ManForEachLut( p, i )
-        nSizeMax = ABC_MAX( nSizeMax, Gia_ObjLutSize(p, i) );
+        nSizeMax = Abc_MaxInt( nSizeMax, Gia_ObjLutSize(p, i) );
     return nSizeMax;
 }
 
diff --git a/src/aig/gia/giaMan.c b/src/aig/gia/giaMan.c
index 39b0059d..972958bb 100644
--- a/src/aig/gia/giaMan.c
+++ b/src/aig/gia/giaMan.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "gia.h"
-#include "tim.h"
+#include "src/misc/tim/tim.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -262,7 +262,8 @@ void Gia_ManPrintObjClasses( Gia_Man_t * p )
     Vec_Int_t * vAbs = p->vObjClasses;
     int i, k, Entry, iStart, iStop, nFrames;
     int nObjBits, nObjMask, iObj, iFrame, nWords;
-    unsigned * pInfo, * pCountAll, * pCountUni;
+    unsigned * pInfo;
+    int * pCountAll, * pCountUni;
     if ( vAbs == NULL )
         return;
     nFrames = Vec_IntEntry( vAbs, 0 );
@@ -270,10 +271,10 @@ void Gia_ManPrintObjClasses( Gia_Man_t * p )
     pCountAll = ABC_ALLOC( int, nFrames + 1 );
     pCountUni = ABC_ALLOC( int, nFrames + 1 );
     // start storage for seen objects
-    nWords = Gia_BitWordNum( nFrames );
+    nWords = Abc_BitWordNum( nFrames );
     vSeens = Vec_IntStart( Gia_ManObjNum(p) * nWords );
     // get the bitmasks
-    nObjBits = Gia_Base2Log( Gia_ManObjNum(p) );
+    nObjBits = Abc_Base2Log( Gia_ManObjNum(p) );
     nObjMask = (1 << nObjBits) - 1;
     assert( Gia_ManObjNum(p) <= nObjMask );
     // print info about frames
@@ -289,16 +290,16 @@ void Gia_ManPrintObjClasses( Gia_Man_t * p )
             iObj   = (Entry &  nObjMask);
             iFrame = (Entry >> nObjBits);
             pInfo  = (unsigned *)Vec_IntEntryP( vSeens, nWords * iObj );
-            if ( Gia_InfoHasBit(pInfo, iFrame) == 0 )
+            if ( Abc_InfoHasBit(pInfo, iFrame) == 0 )
             {
-                Gia_InfoSetBit( pInfo, iFrame );
+                Abc_InfoSetBit( pInfo, iFrame );
                 pCountUni[iFrame+1]++;
                 pCountUni[0]++;
             }
             pCountAll[iFrame+1]++;
             pCountAll[0]++;
         }
-        assert( pCountAll[0] == (unsigned)(iStop - iStart) );
+        assert( pCountAll[0] == (iStop - iStart) );
 //        printf( "%5d%5d  ", pCountAll[0], pCountUni[0] ); 
         printf( "%3d :", i );
         printf( "%6d", pCountAll[0] ); 
diff --git a/src/aig/gia/giaPat.c b/src/aig/gia/giaPat.c
index 643ae6b7..124f5e0b 100644
--- a/src/aig/gia/giaPat.c
+++ b/src/aig/gia/giaPat.c
@@ -100,8 +100,8 @@ void Gia_SatVerifyPattern( Gia_Man_t * p, Gia_Obj_t * pRoot, Vec_Int_t * vCex, V
     Gia_SatCollectCone( p, Gia_ObjFanin0(pRoot), vVisit );
     // set binary values to nodes in the counter-example
     Vec_IntForEachEntry( vCex, Entry, i )
-//        Sat_ObjSetXValue( Gia_ManObj(p, Gia_Lit2Var(Entry)), Gia_LitIsCompl(Entry)? GIA_ZER : GIA_ONE );
-        Sat_ObjSetXValue( Gia_ManCi(p, Gia_Lit2Var(Entry)), Gia_LitIsCompl(Entry)? GIA_ZER : GIA_ONE );
+//        Sat_ObjSetXValue( Gia_ManObj(p, Abc_Lit2Var(Entry)), Abc_LitIsCompl(Entry)? GIA_ZER : GIA_ONE );
+        Sat_ObjSetXValue( Gia_ManCi(p, Abc_Lit2Var(Entry)), Abc_LitIsCompl(Entry)? GIA_ZER : GIA_ONE );
     // simulate
     Gia_ManForEachObjVec( vVisit, p, pObj, i )
     {
diff --git a/src/aig/gia/giaReparam.c b/src/aig/gia/giaReparam.c
index 5210f998..10294671 100644
--- a/src/aig/gia/giaReparam.c
+++ b/src/aig/gia/giaReparam.c
@@ -20,7 +20,7 @@
 
 #include "gia.h"
 #include "giaAig.h"
-#include "saig.h"
+#include "src/aig/saig/saig.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -52,7 +52,7 @@ Gia_Man_t * Gia_ManDupIn2Ff( Gia_Man_t * p )
     int i;
     vPiOuts = Vec_IntAlloc( Gia_ManPiNum(p) );
     pNew = Gia_ManStart( Gia_ManObjNum(p) + 2 * Gia_ManPiNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManFillValue( p );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachPi( p, pObj, i )
@@ -112,7 +112,7 @@ Gia_Man_t * Gia_ManDupFf2In( Gia_Man_t * p, int nFlopsOld )
     Gia_Obj_t * pObj;
     int i;
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManFillValue( p );
     Gia_ManConst0(p)->Value = 0;
     Gia_ManForEachRo( p, pObj, i )
diff --git a/src/aig/gia/giaRetime.c b/src/aig/gia/giaRetime.c
index 58029b66..0b9a6bfb 100644
--- a/src/aig/gia/giaRetime.c
+++ b/src/aig/gia/giaRetime.c
@@ -125,7 +125,7 @@ Gia_Man_t * Gia_ManRetimeDupForward( Gia_Man_t * p, Vec_Ptr_t * vCut )
     int i;
     // create the new manager
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManHashAlloc( pNew );
     // create the true PIs
     Gia_ManFillValue( p );
@@ -135,7 +135,7 @@ Gia_Man_t * Gia_ManRetimeDupForward( Gia_Man_t * p, Vec_Ptr_t * vCut )
         pObj->Value = Gia_ManAppendCi( pNew );
     // create the registers
     Vec_PtrForEachEntry( Gia_Obj_t *, vCut, pObj, i )
-        pObj->Value = Gia_LitNotCond( Gia_ManAppendCi(pNew), pObj->fPhase );
+        pObj->Value = Abc_LitNotCond( Gia_ManAppendCi(pNew), pObj->fPhase );
     // duplicate logic above the cut
     Gia_ManForEachCo( p, pObj, i )
         Gia_ManRetimeDup_rec( pNew, Gia_ObjFanin0(pObj) );
@@ -156,7 +156,7 @@ Gia_Man_t * Gia_ManRetimeDupForward( Gia_Man_t * p, Vec_Ptr_t * vCut )
     Vec_PtrForEachEntry( Gia_Obj_t *, vCut, pObj, i )
     {
         Gia_ManRetimeDup_rec( pNew, pObj );
-        Gia_ManAppendCo( pNew, Gia_LitNotCond( pObj->Value, pObj->fPhase ) );
+        Gia_ManAppendCo( pNew, Abc_LitNotCond( pObj->Value, pObj->fPhase ) );
     }
     Gia_ManHashStop( pNew );
     Gia_ManSetRegNum( pNew, Vec_PtrSize(vCut) );
diff --git a/src/aig/gia/giaSat.c b/src/aig/gia/giaSat.c
index c2d70795..cb410dd7 100644
--- a/src/aig/gia/giaSat.c
+++ b/src/aig/gia/giaSat.c
@@ -265,7 +265,7 @@ int Gia_ManSatPartCount( Gia_Man_t * p, Gia_Obj_t * pObj, int * pnLeaves, int *
         (*pnLeaves)++;
     else
         Level1 = Gia_ManSatPartCount(p, pFanin, pnLeaves, pnNodes) + Gia_ObjFaninC1(pObj);
-    return ABC_MAX( Level0, Level1 );
+    return Abc_MaxInt( Level0, Level1 );
 }
 
 /**Function*************************************************************
diff --git a/src/aig/gia/giaScl.c b/src/aig/gia/giaScl.c
index a482d024..0ec67c93 100644
--- a/src/aig/gia/giaScl.c
+++ b/src/aig/gia/giaScl.c
@@ -199,7 +199,7 @@ Gia_Man_t * Gia_ManReduceEquiv( Gia_Man_t * p, int fVerbose )
         else if ( ~pMaps[iLit] ) // in this case, ID(pObj) > ID(pRepr) 
             pCi2Lit[Gia_ManPiNum(p)+i] = pMaps[iLit], Counter++; 
         else
-            pMaps[iLit] = Gia_Var2Lit( Gia_ObjId(p, pObjRo), 0 );
+            pMaps[iLit] = Abc_Var2Lit( Gia_ObjId(p, pObjRo), 0 );
     }
 /*
     Gia_ManForEachCi( p, pObjRo, i )
diff --git a/src/aig/gia/giaShrink.c b/src/aig/gia/giaShrink.c
index fc9e80d6..07119daf 100644
--- a/src/aig/gia/giaShrink.c
+++ b/src/aig/gia/giaShrink.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "gia.h"
-#include "aig.h"
-#include "dar.h"
+#include "src/aig/aig/aig.h"
+#include "src/opt/dar/dar.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -75,7 +75,7 @@ Gia_Man_t * Gia_ManPerformMapShrink( Gia_Man_t * p, int fKeepLevel, int fVerbose
     Gia_ManConst0(p)->Value = 0;
     // start the new manager
     pNew = Gia_ManStart( Gia_ManObjNum(p) );
-    pNew->pName = Gia_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Gia_ManHashAlloc( pNew );
     Gia_ManCleanLevels( pNew, Gia_ManObjNum(p) );
     Gia_ManForEachObj1( p, pObj, i )
@@ -114,7 +114,7 @@ Gia_Man_t * Gia_ManPerformMapShrink( Gia_Man_t * p, int fKeepLevel, int fVerbose
             else
             {
                 pObj->Value = Dar_LibEvalBuild( pNew, vLeaves, 0xffff & *pTruth, fKeepLevel, vLeavesBest );
-                pObj->Value = Gia_LitNotCond( pObj->Value, Gia_ObjPhaseRealLit(pNew, pObj->Value) ^ pObj->fPhase );
+                pObj->Value = Abc_LitNotCond( pObj->Value, Gia_ObjPhaseRealLit(pNew, pObj->Value) ^ pObj->fPhase );
             }
         }
     }
diff --git a/src/aig/gia/giaSim.c b/src/aig/gia/giaSim.c
index 4be740cd..817fc2e2 100644
--- a/src/aig/gia/giaSim.c
+++ b/src/aig/gia/giaSim.c
@@ -133,18 +133,18 @@ Vec_Int_t * Gia_ManSimDeriveResets( Gia_Man_t * pGia )
     {
         if ( Count < nImpLimit )
             continue;
-        pObj = Gia_ManObj( pGia, Gia_Lit2Var(Lit) );
-        if ( Gia_LitIsCompl(Lit) ) // const 0
+        pObj = Gia_ManObj( pGia, Abc_Lit2Var(Lit) );
+        if ( Abc_LitIsCompl(Lit) ) // const 0
         {
 //            Ssm_ObjSetLogic0( pObj );
-            Vec_IntWriteEntry( vResult, Gia_Lit2Var(Lit), 0 );
+            Vec_IntWriteEntry( vResult, Abc_Lit2Var(Lit), 0 );
             CounterPi0 += Gia_ObjIsPi(pGia, pObj);
             Counter0++;
         }
         else
         {
 //            Ssm_ObjSetLogic1( pObj );
-            Vec_IntWriteEntry( vResult, Gia_Lit2Var(Lit), 1 );
+            Vec_IntWriteEntry( vResult, Abc_Lit2Var(Lit), 1 );
             CounterPi1 += Gia_ObjIsPi(pGia, pObj);
             Counter1++;
         }
@@ -568,8 +568,8 @@ Abc_Cex_t * Gia_ManGenerateCounter( Gia_Man_t * pAig, int iFrame, int iOut, int
             continue;
         for ( w = nWords-1; w >= 0; w-- )
             pData[w] = Gia_ManRandom( 0 );
-        if ( Gia_InfoHasBit( pData, iPat ) )
-            Gia_InfoSetBit( p->pData, Counter + iPioId );
+        if ( Abc_InfoHasBit( pData, iPat ) )
+            Abc_InfoSetBit( p->pData, Counter + iPioId );
     }
     ABC_FREE( pData );
     return p;
diff --git a/src/aig/gia/giaSim2.c b/src/aig/gia/giaSim2.c
index 27945704..74a34d1b 100644
--- a/src/aig/gia/giaSim2.c
+++ b/src/aig/gia/giaSim2.c
@@ -471,7 +471,7 @@ void Gia_Sim2ProcessRefined( Gia_Sim2_t * p, Vec_Int_t * vRefined )
     int * pTable, nTableSize, i, k, Key;
     if ( Vec_IntSize(vRefined) == 0 )
         return;
-    nTableSize = Gia_PrimeCudd( 1000 + Vec_IntSize(vRefined) / 3 );
+    nTableSize = Abc_PrimeCudd( 1000 + Vec_IntSize(vRefined) / 3 );
     pTable = ABC_CALLOC( int, nTableSize );
     Vec_IntForEachEntry( vRefined, i, k )
     {
@@ -617,8 +617,8 @@ Abc_Cex_t * Gia_Sim2GenerateCounter( Gia_Man_t * pAig, int iFrame, int iOut, int
     {
         for ( w = nWords-1; w >= 0; w-- )
             pData[w] = Gia_ManRandom( 0 );
-        if ( Gia_InfoHasBit( pData, iPat ) )
-            Gia_InfoSetBit( p->pData, Counter + i );
+        if ( Abc_InfoHasBit( pData, iPat ) )
+            Abc_InfoSetBit( p->pData, Counter + i );
     }
     ABC_FREE( pData );
     return p;
diff --git a/src/aig/gia/giaSpeedup.c b/src/aig/gia/giaSpeedup.c
index cce0b68d..d20fe1a4 100644
--- a/src/aig/gia/giaSpeedup.c
+++ b/src/aig/gia/giaSpeedup.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "gia.h"
-#include "if.h"
+#include "src/map/if/if.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -597,7 +597,7 @@ void Gia_ManSpeedupObj( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj, Vec_I
     for ( i = 0; i < nCofs; i++ )
     {
         Gia_ManForEachObjVec( vLeaves, p, pTemp, k )
-            pTemp->Value = Gia_Var2Lit( Gia_ObjId(p, pTemp), 0 );
+            pTemp->Value = Abc_Var2Lit( Gia_ObjId(p, pTemp), 0 );
         Gia_ManForEachObjVec( vTimes, p, pTemp, k )
             pTemp->Value = ((i & (1<<k)) != 0);
         Gia_ManForEachObjVec( vNodes, p, pTemp, k )
@@ -611,7 +611,7 @@ void Gia_ManSpeedupObj( Gia_Man_t * pNew, Gia_Man_t * p, Gia_Obj_t * pObj, Vec_I
             pCofs[i] = Gia_ManHashMux( pNew, Gia_ObjToLit(p,pTemp), pCofs[i+nSkip], pCofs[i] );
     // create choice node  (pObj is repr and ppCofs[0] is new)
     iObj    = Gia_ObjId( p, pObj );
-    iResult = Gia_Lit2Var( pCofs[0] );
+    iResult = Abc_Lit2Var( pCofs[0] );
     if ( iResult <= iObj )
         return;
     Gia_ObjSetRepr( pNew, iResult, iObj );
diff --git a/src/aig/gia/giaSupMin.c b/src/aig/gia/giaSupMin.c
index 4abaab0f..90c30c71 100644
--- a/src/aig/gia/giaSupMin.c
+++ b/src/aig/gia/giaSupMin.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "gia.h"
-#include "kit.h"
+#include "src/bool/kit/kit.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/gia/giaSwitch.c b/src/aig/gia/giaSwitch.c
index bc2f0f67..848bd646 100644
--- a/src/aig/gia/giaSwitch.c
+++ b/src/aig/gia/giaSwitch.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "giaAig.h"
-#include "main.h"
+#include "src/base/main/main.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -569,7 +569,7 @@ Vec_Int_t * Gia_ManSwiSimulate( Gia_Man_t * pAig, Gia_ParSwi_t * pPars )
     {
         printf( "Obj = %8d (%8d). F = %6d. ", 
             pAig->nObjs, Gia_ManCiNum(pAig) + Gia_ManAndNum(pAig), p->pAig->nFront, 
-            4.0*Gia_BitWordNum(2 * p->pAig->nFront)/(1<<20) );
+            4.0*Abc_BitWordNum(2 * p->pAig->nFront)/(1<<20) );
         printf( "AIG = %7.2f Mb. F-mem = %7.2f Mb. Other = %7.2f Mb.  ", 
             12.0*Gia_ManObjNum(p->pAig)/(1<<20), 
             4.0*p->nWords*p->pAig->nFront/(1<<20), 
@@ -691,8 +691,8 @@ Vec_Int_t * Saig_ManComputeSwitchProbs( Aig_Man_t * pAig, int nFrames, int nPref
     Aig_ManForEachObj( pAig, pObj, i )
     {
 //        if ( Aig_ObjIsPo(pObj) )
-//            printf( "%d=%f\n", i, Aig_Int2Float( Vec_IntEntry(vSwitching, Gia_Lit2Var(pObj->iData)) ) );
-        Vec_IntWriteEntry( vResult, i, Vec_IntEntry(vSwitching, Gia_Lit2Var(pObj->iData)) );
+//            printf( "%d=%f\n", i, Abc_Int2Float( Vec_IntEntry(vSwitching, Abc_Lit2Var(pObj->iData)) ) );
+        Vec_IntWriteEntry( vResult, i, Vec_IntEntry(vSwitching, Abc_Lit2Var(pObj->iData)) );
     }
     // delete intermediate results
     Vec_IntFree( vSwitching );
diff --git a/src/aig/gia/giaTsim.c b/src/aig/gia/giaTsim.c
index e829ff5b..c4fb7f26 100644
--- a/src/aig/gia/giaTsim.c
+++ b/src/aig/gia/giaTsim.c
@@ -84,15 +84,15 @@ Gia_ManTer_t * Gia_ManTerCreate( Gia_Man_t * pAig )
     p = ABC_CALLOC( Gia_ManTer_t, 1 );
     p->pAig   = Gia_ManFront( pAig );
     p->nIters = 300;
-    p->pDataSim    = ABC_ALLOC( unsigned, Gia_BitWordNum(2*p->pAig->nFront) );
-    p->pDataSimCis = ABC_ALLOC( unsigned, Gia_BitWordNum(2*Gia_ManCiNum(p->pAig)) );
-    p->pDataSimCos = ABC_ALLOC( unsigned, Gia_BitWordNum(2*Gia_ManCoNum(p->pAig)) );
+    p->pDataSim    = ABC_ALLOC( unsigned, Abc_BitWordNum(2*p->pAig->nFront) );
+    p->pDataSimCis = ABC_ALLOC( unsigned, Abc_BitWordNum(2*Gia_ManCiNum(p->pAig)) );
+    p->pDataSimCos = ABC_ALLOC( unsigned, Abc_BitWordNum(2*Gia_ManCoNum(p->pAig)) );
     // allocate storage for terminary states
-    p->nStateWords = Gia_BitWordNum( 2*Gia_ManRegNum(pAig) );
+    p->nStateWords = Abc_BitWordNum( 2*Gia_ManRegNum(pAig) );
     p->vStates  = Vec_PtrAlloc( 1000 );
     p->pCount0  = ABC_CALLOC( int, Gia_ManRegNum(pAig) );
     p->pCountX  = ABC_CALLOC( int, Gia_ManRegNum(pAig) );
-    p->nBins    = Gia_PrimeCudd( 500 );
+    p->nBins    = Abc_PrimeCudd( 500 );
     p->pBins    = ABC_CALLOC( unsigned *, p->nBins );
     p->vRetired = Vec_IntAlloc( 100 );
     p->pRetired = ABC_CALLOC( char, Gia_ManRegNum(pAig) );
@@ -511,7 +511,7 @@ void Gia_ManTerAnalyze2( Vec_Ptr_t * vStates, int nRegs )
     unsigned * pTemp, * pStates = (unsigned *)Vec_PtrPop( vStates );
     int i, w, nZeros, nConsts, nStateWords;
     // detect constant zero registers
-    nStateWords = Gia_BitWordNum( 2*nRegs );
+    nStateWords = Abc_BitWordNum( 2*nRegs );
     memset( pStates, 0, sizeof(int) * nStateWords );
     Vec_PtrForEachEntry( unsigned *, vStates, pTemp, i )
         for ( w = 0; w < nStateWords; w++ )
@@ -579,7 +579,7 @@ Vec_Ptr_t * Gia_ManTerTranspose( Gia_ManTer_t * p )
     unsigned * pState, * pFlop;
     int i, k, nFlopWords;
     vFlops = Vec_PtrAlloc( 100 );
-    nFlopWords = Gia_BitWordNum( 2*Vec_PtrSize(p->vStates) );
+    nFlopWords = Abc_BitWordNum( 2*Vec_PtrSize(p->vStates) );
     for ( i = 0; i < Gia_ManRegNum(p->pAig); i++ )
     {
         if ( p->pCount0[i] == Vec_PtrSize(p->vStates) ) 
@@ -634,7 +634,7 @@ int * Gia_ManTerCreateMap( Gia_ManTer_t * p, int fVerbose )
     Gia_Obj_t * pObj;
     Vec_Int_t * vMapKtoI;
     int i, iRepr, nFlopWords, Counter0 = 0, CounterE = 0;
-    nFlopWords = Gia_BitWordNum( 2*Vec_PtrSize(p->vStates) );
+    nFlopWords = Abc_BitWordNum( 2*Vec_PtrSize(p->vStates) );
     p->vFlops = Gia_ManTerTranspose( p );
     pCi2Lit = ABC_FALLOC( int, Gia_ManCiNum(p->pAig) );
     vMapKtoI = Vec_IntAlloc( 100 );
@@ -648,7 +648,7 @@ int * Gia_ManTerCreateMap( Gia_ManTer_t * p, int fVerbose )
             if ( iRepr < 0 )
                 continue;
             pObj = Gia_ManCi( p->pAig, Gia_ManPiNum(p->pAig)+Vec_IntEntry(vMapKtoI, iRepr) );
-            pCi2Lit[Gia_ManPiNum(p->pAig)+i] = Gia_Var2Lit( Gia_ObjId( p->pAig, pObj ), 0 );
+            pCi2Lit[Gia_ManPiNum(p->pAig)+i] = Abc_Var2Lit( Gia_ObjId( p->pAig, pObj ), 0 );
             CounterE++;
         }
     Vec_IntFree( vMapKtoI );
@@ -684,8 +684,8 @@ Gia_ManTer_t * Gia_ManTerSimulate( Gia_Man_t * pAig, int fVerbose )
             pAig->nObjs, Gia_ManCiNum(pAig) + Gia_ManAndNum(pAig), p->pAig->nFront );
         printf( "AIG = %7.2f Mb. F-mem = %7.2f Mb. Other = %7.2f Mb.  ", 
             12.0*Gia_ManObjNum(p->pAig)/(1<<20), 
-            4.0*Gia_BitWordNum(2 * p->pAig->nFront)/(1<<20), 
-            4.0*Gia_BitWordNum(2 * (Gia_ManCiNum(pAig) + Gia_ManCoNum(pAig)))/(1<<20) );
+            4.0*Abc_BitWordNum(2 * p->pAig->nFront)/(1<<20), 
+            4.0*Abc_BitWordNum(2 * (Gia_ManCiNum(pAig) + Gia_ManCoNum(pAig)))/(1<<20) );
         ABC_PRT( "Time", clock() - clk );
     }
     // perform simulation
diff --git a/src/aig/gia/giaUtil.c b/src/aig/gia/giaUtil.c
index f19f0602..e56f6ea9 100644
--- a/src/aig/gia/giaUtil.c
+++ b/src/aig/gia/giaUtil.c
@@ -80,42 +80,6 @@ void Gia_ManRandomInfo( Vec_Ptr_t * vInfo, int iInputStart, int iWordStart, int
             pInfo[w] = Gia_ManRandom(0);
 }
 
-/**Function********************************************************************
-
-  Synopsis    [Returns the next prime >= p.]
-
-  Description [Copied from CUDD, for stand-aloneness.]
-
-  SideEffects [None]
-
-  SeeAlso     []
-
-******************************************************************************/
-unsigned int Gia_PrimeCudd( unsigned int p )
-{
-    int i,pn;
-
-    p--;
-    do {
-        p++;
-        if (p&1) {
-        pn = 1;
-        i = 3;
-        while ((unsigned) (i * i) <= p) {
-        if (p % i == 0) {
-            pn = 0;
-            break;
-        }
-        i += 2;
-        }
-    } else {
-        pn = 0;
-    }
-    } while (!pn);
-    return(p);
-
-} /* end of Cudd_Prime */
-
 
 /**Function*************************************************************
 
@@ -483,7 +447,7 @@ int Gia_ManLevelNum( Gia_Man_t * p )
         else if ( Gia_ObjIsCo(pObj) )
         {
             Gia_ObjSetCoLevel( p, pObj );
-            p->nLevels = ABC_MAX( p->nLevels, Gia_ObjLevel(p, pObj) );
+            p->nLevels = Abc_MaxInt( p->nLevels, Gia_ObjLevel(p, pObj) );
         }
         else
             Gia_ObjSetLevel( p, pObj, 0 );
@@ -1150,11 +1114,11 @@ int Gia_ManVerifyCex( Gia_Man_t * pAig, Abc_Cex_t * p, int fDualOut )
     int RetValue, i, k, iBit = 0;
     Gia_ManCleanMark0(pAig);
     Gia_ManForEachRo( pAig, pObj, i )
-        pObj->fMark0 = Gia_InfoHasBit(p->pData, iBit++);
+        pObj->fMark0 = Abc_InfoHasBit(p->pData, iBit++);
     for ( i = 0; i <= p->iFrame; i++ )
     {
         Gia_ManForEachPi( pAig, pObj, k )
-            pObj->fMark0 = Gia_InfoHasBit(p->pData, iBit++);
+            pObj->fMark0 = Abc_InfoHasBit(p->pData, iBit++);
         Gia_ManForEachAnd( pAig, pObj, k )
             pObj->fMark0 = (Gia_ObjFanin0(pObj)->fMark0 ^ Gia_ObjFaninC0(pObj)) & 
                            (Gia_ObjFanin1(pObj)->fMark0 ^ Gia_ObjFaninC1(pObj));
@@ -1194,12 +1158,12 @@ int Gia_ManFindFailedPoCex( Gia_Man_t * pAig, Abc_Cex_t * p, int nOutputs )
     assert( Gia_ManPiNum(pAig) == p->nPis );
     Gia_ManCleanMark0(pAig);
 //    Gia_ManForEachRo( pAig, pObj, i )
-//       pObj->fMark0 = Gia_InfoHasBit(p->pData, iBit++);
+//       pObj->fMark0 = Abc_InfoHasBit(p->pData, iBit++);
     iBit = p->nRegs;
     for ( i = 0; i <= p->iFrame; i++ )
     {
         Gia_ManForEachPi( pAig, pObj, k )
-            pObj->fMark0 = Gia_InfoHasBit(p->pData, iBit++);
+            pObj->fMark0 = Abc_InfoHasBit(p->pData, iBit++);
         Gia_ManForEachAnd( pAig, pObj, k )
             pObj->fMark0 = (Gia_ObjFanin0(pObj)->fMark0 ^ Gia_ObjFaninC0(pObj)) & 
                            (Gia_ObjFanin1(pObj)->fMark0 ^ Gia_ObjFaninC1(pObj));
diff --git a/src/aig/hop/cudd2.c b/src/aig/hop/cudd2.c
index 3ad44e4c..57a85dc8 100644
--- a/src/aig/hop/cudd2.c
+++ b/src/aig/hop/cudd2.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "hop.h"
-#include "st.h"
+#include "misc/st/st.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/hop/cudd2.h b/src/aig/hop/cudd2.h
index 2382b22f..e38118f4 100644
--- a/src/aig/hop/cudd2.h
+++ b/src/aig/hop/cudd2.h
@@ -18,8 +18,8 @@
 
 ***********************************************************************/
 
-#ifndef __CUDD2_H__
-#define __CUDD2_H__
+#ifndef ABC__aig__hop__cudd2_h
+#define ABC__aig__hop__cudd2_h
 
 
 // HA: Added for printing messages
diff --git a/src/aig/hop/hop.h b/src/aig/hop/hop.h
index a634f136..eff904fd 100644
--- a/src/aig/hop/hop.h
+++ b/src/aig/hop/hop.h
@@ -18,8 +18,8 @@
 
 ***********************************************************************/
 
-#ifndef __HOP_H__
-#define __HOP_H__
+#ifndef ABC__aig__hop__hop_h
+#define ABC__aig__hop__hop_h
 
 
 ////////////////////////////////////////////////////////////////////////
@@ -32,7 +32,7 @@
 #include <assert.h>
 #include <time.h>
 
-#include "vec.h"
+#include "src/misc/vec/vec.h"
 
 ////////////////////////////////////////////////////////////////////////
 ///                         PARAMETERS                               ///
@@ -186,7 +186,7 @@ static inline Hop_Obj_t *  Hop_ObjChild1( Hop_Obj_t * pObj )      { return pObj-
 static inline Hop_Obj_t *  Hop_ObjChild0Copy( Hop_Obj_t * pObj ) { assert( !Hop_IsComplement(pObj) ); return Hop_ObjFanin0(pObj)? Hop_NotCond((Hop_Obj_t *)Hop_ObjFanin0(pObj)->pData, Hop_ObjFaninC0(pObj)) : NULL;  }
 static inline Hop_Obj_t *  Hop_ObjChild1Copy( Hop_Obj_t * pObj ) { assert( !Hop_IsComplement(pObj) ); return Hop_ObjFanin1(pObj)? Hop_NotCond((Hop_Obj_t *)Hop_ObjFanin1(pObj)->pData, Hop_ObjFaninC1(pObj)) : NULL;  }
 static inline int          Hop_ObjLevel( Hop_Obj_t * pObj )       { return pObj->nRefs;                            }
-static inline int          Hop_ObjLevelNew( Hop_Obj_t * pObj )    { return 1 + Hop_ObjIsExor(pObj) + ABC_MAX(Hop_ObjFanin0(pObj)->nRefs, Hop_ObjFanin1(pObj)->nRefs);       }
+static inline int          Hop_ObjLevelNew( Hop_Obj_t * pObj )    { return 1 + Hop_ObjIsExor(pObj) + Abc_MaxInt(Hop_ObjFanin0(pObj)->nRefs, Hop_ObjFanin1(pObj)->nRefs);       }
 static inline int          Hop_ObjPhaseCompl( Hop_Obj_t * pObj )  { return Hop_IsComplement(pObj)? !Hop_Regular(pObj)->fPhase : pObj->fPhase; }
 static inline void         Hop_ObjClean( Hop_Obj_t * pObj )       { memset( pObj, 0, sizeof(Hop_Obj_t) ); }
 static inline int          Hop_ObjWhatFanin( Hop_Obj_t * pObj, Hop_Obj_t * pFanin )    
diff --git a/src/aig/hop/hopDfs.c b/src/aig/hop/hopDfs.c
index be1e6c0b..f6f8c507 100644
--- a/src/aig/hop/hopDfs.c
+++ b/src/aig/hop/hopDfs.c
@@ -128,13 +128,13 @@ int Hop_ManCountLevels( Hop_Man_t * p )
     {
         Level0 = (int)(ABC_PTRUINT_T)Hop_ObjFanin0(pObj)->pData;
         Level1 = (int)(ABC_PTRUINT_T)Hop_ObjFanin1(pObj)->pData;
-        pObj->pData = (void *)(ABC_PTRUINT_T)(1 + Hop_ObjIsExor(pObj) + ABC_MAX(Level0, Level1));
+        pObj->pData = (void *)(ABC_PTRUINT_T)(1 + Hop_ObjIsExor(pObj) + Abc_MaxInt(Level0, Level1));
     }
     Vec_PtrFree( vNodes );
     // get levels of the POs
     LevelsMax = 0;
     Hop_ManForEachPo( p, pObj, i )
-        LevelsMax = ABC_MAX( LevelsMax, (int)(ABC_PTRUINT_T)Hop_ObjFanin0(pObj)->pData );
+        LevelsMax = Abc_MaxInt( LevelsMax, (int)(ABC_PTRUINT_T)Hop_ObjFanin0(pObj)->pData );
     return LevelsMax;
 }
 
diff --git a/src/aig/hop/hopTable.c b/src/aig/hop/hopTable.c
index 8148a125..7db93f62 100644
--- a/src/aig/hop/hopTable.c
+++ b/src/aig/hop/hopTable.c
@@ -52,7 +52,6 @@ static Hop_Obj_t ** Hop_TableFind( Hop_Man_t * p, Hop_Obj_t * pObj )
 }
 
 static void         Hop_TableResize( Hop_Man_t * p );
-static unsigned int Cudd_PrimeAig( unsigned int  p );
 
 ////////////////////////////////////////////////////////////////////////
 ///                     FUNCTION DEFINITIONS                         ///
@@ -174,7 +173,7 @@ clk = clock();
     pTableOld = p->pTable;
     nTableSizeOld = p->nTableSize;
     // get the new table
-    p->nTableSize = Cudd_PrimeAig( 2 * Hop_ManNodeNum(p) ); 
+    p->nTableSize = Abc_PrimeCudd( 2 * Hop_ManNodeNum(p) ); 
     p->pTable = ABC_ALLOC( Hop_Obj_t *, p->nTableSize );
     memset( p->pTable, 0, sizeof(Hop_Obj_t *) * p->nTableSize );
     // rehash the entries from the old table
@@ -223,41 +222,6 @@ void Hop_TableProfile( Hop_Man_t * p )
     }
 }
 
-/**Function********************************************************************
-
-  Synopsis    [Returns the next prime &gt;= p.]
-
-  Description [Copied from CUDD, for stand-aloneness.]
-
-  SideEffects [None]
-
-  SeeAlso     []
-
-******************************************************************************/
-unsigned int Cudd_PrimeAig( unsigned int  p)
-{
-    int i,pn;
-    p--;
-    do {
-        p++;
-        if (p&1) {
-        pn = 1;
-        i = 3;
-        while ((unsigned) (i * i) <= p) {
-        if (p % i == 0) {
-            pn = 0;
-            break;
-        }
-        i += 2;
-        }
-    } else {
-        pn = 0;
-    }
-    } while (!pn);
-    return(p);
-
-} /* end of Cudd_Prime */
-
 ////////////////////////////////////////////////////////////////////////
 ///                       END OF FILE                                ///
 ////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/int/int.h b/src/aig/int/int.h
deleted file mode 100644
index 4b8d78bb..00000000
--- a/src/aig/int/int.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [int.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Interpolation engine.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 24, 2008.]
-
-  Revision    [$Id: int.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __INT_H__
-#define __INT_H__
-
-
-/* 
-    The interpolation algorithm implemented here was introduced in the paper:
-    K. L. McMillan. Interpolation and SAT-based model checking. CAV’03, pp. 1-13.
-*/
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-// simulation manager
-typedef struct Inter_ManParams_t_ Inter_ManParams_t;
-struct Inter_ManParams_t_
-{
-    int  nBTLimit;      // limit on the number of conflicts
-    int  nFramesMax;    // the max number timeframes to unroll
-    int  nSecLimit;     // time limit in seconds
-    int  nFramesK;      // the number of timeframes to use in induction
-    int  fRewrite;      // use additional rewriting to simplify timeframes
-    int  fTransLoop;    // add transition into the init state under new PI var
-    int  fUsePudlak;    // use Pudluk interpolation procedure
-    int  fUseOther;     // use other undisclosed option
-    int  fUseMiniSat;   // use MiniSat-1.14p instead of internal proof engine
-    int  fCheckKstep;   // check using K-step induction
-    int  fUseBias;      // bias decisions to global variables
-    int  fUseBackward;  // perform backward interpolation
-    int  fUseSeparate;  // solve each output separately
-    int  fDropSatOuts;  // replace by 1 the solved outputs
-    int  fDropInvar;    // dump inductive invariant into file
-    int  fVerbose;      // print verbose statistics
-    int  iFrameMax;     // the time frame reached
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== intCore.c ==========================================================*/
-extern void       Inter_ManSetDefaultParams( Inter_ManParams_t * p );
-extern int        Inter_ManPerformInterpolation( Aig_Man_t * pAig, Inter_ManParams_t * pPars, int * piFrame );
-
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/int/intCheck.c b/src/aig/int/intCheck.c
deleted file mode 100644
index 6b36fe30..00000000
--- a/src/aig/int/intCheck.c
+++ /dev/null
@@ -1,305 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [intCheck.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Interpolation engine.]
-
-  Synopsis    [Procedures to perform incremental inductive check.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 24, 2008.]
-
-  Revision    [$Id: intCheck.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "intInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// checking manager
-struct Inter_Check_t_
-{
-    int           nFramesK;     // the number of timeframes (K=1 for simple induction)
-    int           nVars;        // the current number of variables in the solver
-    Aig_Man_t *   pFrames;      // unrolled timeframes
-    Cnf_Dat_t *   pCnf;         // CNF of unrolled timeframes 
-    sat_solver *  pSat;         // SAT solver 
-    Vec_Int_t *   vOrLits;      // OR vars in each time frame (total number is the number nFrames)
-    Vec_Int_t *   vAndLits;     // AND vars in the last timeframe (total number is the number of interpolants)
-    Vec_Int_t *   vAssLits;     // assumptions (the union of the two)
-};
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Create timeframes of the manager for interpolation.]
-
-  Description [The resulting manager is combinational. The primary inputs
-  corresponding to register outputs are ordered first.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Inter_ManUnrollFrames( Aig_Man_t * pAig, int nFrames )
-{
-    Aig_Man_t * pFrames;
-    Aig_Obj_t * pObj, * pObjLi, * pObjLo;
-    int i, f;
-    assert( Saig_ManRegNum(pAig) > 0 );
-    pFrames = Aig_ManStart( Aig_ManNodeNum(pAig) * nFrames );
-    // map the constant node
-    Aig_ManConst1(pAig)->pData = Aig_ManConst1( pFrames );
-    // create variables for register outputs
-    Saig_ManForEachLo( pAig, pObj, i )
-        pObj->pData = Aig_ObjCreatePi( pFrames );
-    // add timeframes
-    for ( f = 0; f < nFrames; f++ )
-    {
-        // create PI nodes for this frame
-        Saig_ManForEachPi( pAig, pObj, i )
-            pObj->pData = Aig_ObjCreatePi( pFrames );
-        // add internal nodes of this frame
-        Aig_ManForEachNode( pAig, pObj, i )
-            pObj->pData = Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-        // save register inputs
-        Saig_ManForEachLi( pAig, pObj, i )
-            pObj->pData = Aig_ObjChild0Copy(pObj);
-        // transfer to register outputs
-        Saig_ManForEachLiLo(  pAig, pObjLi, pObjLo, i )
-        {
-            pObjLo->pData = pObjLi->pData;
-            Aig_ObjCreatePo( pFrames, (Aig_Obj_t *)pObjLo->pData );
-        }
-    }
-    Aig_ManCleanup( pFrames );
-    return pFrames;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default values of interpolation parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Inter_Check_t * Inter_CheckStart( Aig_Man_t * pTrans, int nFramesK )
-{
-    Inter_Check_t * p;
-    // create solver
-    p = ABC_CALLOC( Inter_Check_t, 1 );
-    p->vOrLits  = Vec_IntAlloc( 100 );
-    p->vAndLits = Vec_IntAlloc( 100 );
-    p->vAssLits = Vec_IntAlloc( 100 );
-    // generate the timeframes 
-    p->pFrames = Inter_ManUnrollFrames( pTrans, nFramesK );
-    assert( Aig_ManPiNum(p->pFrames) == nFramesK * Saig_ManPiNum(pTrans) + Saig_ManRegNum(pTrans) );
-    assert( Aig_ManPoNum(p->pFrames) == nFramesK * Saig_ManRegNum(pTrans) );
-    // convert to CNF
-    p->pCnf = Cnf_Derive( p->pFrames, Aig_ManPoNum(p->pFrames) ); 
-    p->pSat = (sat_solver *)Cnf_DataWriteIntoSolver( p->pCnf, 1, 0 );
-    // assign parameters
-    p->nFramesK = nFramesK;
-    p->nVars    = p->pCnf->nVars;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default values of interpolation parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Inter_CheckStop( Inter_Check_t * p )
-{
-    if ( p == NULL )
-        return;
-    Vec_IntFree( p->vOrLits );
-    Vec_IntFree( p->vAndLits );
-    Vec_IntFree( p->vAssLits );
-    Cnf_DataFree( p->pCnf );
-    Aig_ManStop( p->pFrames );
-    sat_solver_delete( p->pSat );
-    ABC_FREE( p );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Creates one OR-gate: A + B = C.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Inter_CheckAddOrGate( Inter_Check_t * p, int iVarA, int iVarB, int iVarC )
-{
-    int RetValue, pLits[3];
-    // add A => C   or   !A + C
-    pLits[0] = toLitCond(iVarA, 1);
-    pLits[1] = toLitCond(iVarC, 0);
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-    assert( RetValue );
-    // add B => C   or   !B + C
-    pLits[0] = toLitCond(iVarB, 1);
-    pLits[1] = toLitCond(iVarC, 0);
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-    assert( RetValue );
-    // add !A & !B => !C  or A + B + !C
-    pLits[0] = toLitCond(iVarA, 0);
-    pLits[1] = toLitCond(iVarB, 0);
-    pLits[2] = toLitCond(iVarC, 1);
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates equality: A = B.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Inter_CheckAddEqual( Inter_Check_t * p, int iVarA, int iVarB )
-{
-    int RetValue, pLits[3];
-    // add A => B   or   !A + B
-    pLits[0] = toLitCond(iVarA, 1);
-    pLits[1] = toLitCond(iVarB, 0);
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-    assert( RetValue );
-    // add B => A   or   !B + A
-    pLits[0] = toLitCond(iVarB, 1);
-    pLits[1] = toLitCond(iVarA, 0);
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-    assert( RetValue );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Perform the checking.]
-
-  Description [Returns 1 if the check has passed.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Inter_CheckPerform( Inter_Check_t * p, Cnf_Dat_t * pCnfInt, int nTimeNewOut )
-{
-    Aig_Obj_t * pObj, * pObj2;
-    int i, f, VarA, VarB, RetValue, Entry, status;
-    int nRegs = Aig_ManPiNum(pCnfInt->pMan);
-    assert( Aig_ManPoNum(p->pCnf->pMan) == p->nFramesK * nRegs );
-    assert( Aig_ManPoNum(pCnfInt->pMan) == 1 );
-
-    // set runtime limit
-    if ( nTimeNewOut )
-        sat_solver_set_runtime_limit( p->pSat, nTimeNewOut );
-
-    // add clauses to the SAT solver
-    Cnf_DataLift( pCnfInt, p->nVars );
-    for ( f = 0; f <= p->nFramesK; f++ )
-    {
-        // add clauses to the solver
-        for ( i = 0; i < pCnfInt->nClauses; i++ )
-        {
-            RetValue = sat_solver_addclause( p->pSat, pCnfInt->pClauses[i], pCnfInt->pClauses[i+1] );
-            assert( RetValue );
-        }
-        // add equality clauses for the flop variables
-        Aig_ManForEachPi( pCnfInt->pMan, pObj, i )
-        {
-            pObj2 = f ? Aig_ManPo(p->pFrames, i + (f-1) * nRegs) : Aig_ManPi(p->pFrames, i);
-            Inter_CheckAddEqual( p, pCnfInt->pVarNums[pObj->Id], p->pCnf->pVarNums[pObj2->Id] );
-        }
-        // add final clauses
-        if ( f < p->nFramesK )
-        {
-            if ( f == Vec_IntSize(p->vOrLits) ) // find time here
-            {
-                // add literal to this frame
-                VarB = pCnfInt->pVarNums[ Aig_ManPo(pCnfInt->pMan, 0)->Id ];
-                Vec_IntPush( p->vOrLits, VarB );
-            }
-            else
-            {
-                // add OR gate for this frame
-                VarA = Vec_IntEntry( p->vOrLits, f );
-                VarB = pCnfInt->pVarNums[ Aig_ManPo(pCnfInt->pMan, 0)->Id ];
-                Inter_CheckAddOrGate( p, VarA, VarB, p->nVars + pCnfInt->nVars );
-                Vec_IntWriteEntry( p->vOrLits, f, p->nVars + pCnfInt->nVars ); // using var ID!
-            }
-        }
-        else
-        {
-            // add AND gate for this frame
-            VarB = pCnfInt->pVarNums[ Aig_ManPo(pCnfInt->pMan, 0)->Id ];
-            Vec_IntPush( p->vAndLits, VarB );
-        }
-        // update variable IDs
-        Cnf_DataLift( pCnfInt, pCnfInt->nVars + 1 );
-        p->nVars += pCnfInt->nVars + 1;
-    }
-    Cnf_DataLift( pCnfInt, -p->nVars );
-    assert( Vec_IntSize(p->vOrLits) == p->nFramesK );
-
-    // collect the assumption literals
-    Vec_IntClear( p->vAssLits );
-    Vec_IntForEachEntry( p->vOrLits, Entry, i )
-        Vec_IntPush( p->vAssLits, toLitCond(Entry, 0) );
-    Vec_IntForEachEntry( p->vAndLits, Entry, i )
-        Vec_IntPush( p->vAssLits, toLitCond(Entry, 1) );
-/*
-    if ( pCnfInt->nLiterals == 3635 )
-    {
-        int s = 0;
-    }
-*/
-    // call the SAT solver
-    status = sat_solver_solve( p->pSat, Vec_IntArray(p->vAssLits), 
-        Vec_IntArray(p->vAssLits) + Vec_IntSize(p->vAssLits), 
-        (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-
-    return status == l_False;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/int/intContain.c b/src/aig/int/intContain.c
deleted file mode 100644
index 77b057a7..00000000
--- a/src/aig/int/intContain.c
+++ /dev/null
@@ -1,341 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [intContain.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Interpolation engine.]
-
-  Synopsis    [Interpolant containment checking.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 24, 2008.]
-
-  Revision    [$Id: intContain.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "intInt.h"
-#include "fra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-extern int Inter_ManCheckUniqueness( Aig_Man_t * p, sat_solver * pSat, Cnf_Dat_t * pCnf, int nFrames );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Checks constainment of two interpolants.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Inter_ManCheckContainment( Aig_Man_t * pNew, Aig_Man_t * pOld )
-{
-    Aig_Man_t * pMiter, * pAigTemp;
-    int RetValue;
-    pMiter = Aig_ManCreateMiter( pNew, pOld, 1 );
-//    pMiter = Dar_ManRwsat( pAigTemp = pMiter, 1, 0 );
-//    Aig_ManStop( pAigTemp );
-    RetValue = Fra_FraigMiterStatus( pMiter );
-    if ( RetValue == -1 )
-    {
-        pAigTemp = Fra_FraigEquivence( pMiter, 1000000, 1 );
-        RetValue = Fra_FraigMiterStatus( pAigTemp );
-        Aig_ManStop( pAigTemp );
-//        RetValue = Fra_FraigSat( pMiter, 1000000, 0, 0, 0, 0 );
-    }
-    assert( RetValue != -1 );
-    Aig_ManStop( pMiter );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks constainment of two interpolants.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Inter_ManCheckEquivalence( Aig_Man_t * pNew, Aig_Man_t * pOld )
-{
-    Aig_Man_t * pMiter, * pAigTemp;
-    int RetValue;
-    pMiter = Aig_ManCreateMiter( pNew, pOld, 0 );
-//    pMiter = Dar_ManRwsat( pAigTemp = pMiter, 1, 0 );
-//    Aig_ManStop( pAigTemp );
-    RetValue = Fra_FraigMiterStatus( pMiter );
-    if ( RetValue == -1 )
-    {
-        pAigTemp = Fra_FraigEquivence( pMiter, 1000000, 1 );
-        RetValue = Fra_FraigMiterStatus( pAigTemp );
-        Aig_ManStop( pAigTemp );
-//        RetValue = Fra_FraigSat( pMiter, 1000000, 0, 0, 0, 0 );
-    }
-    assert( RetValue != -1 );
-    Aig_ManStop( pMiter );
-    return RetValue;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Create timeframes of the manager for interpolation.]
-
-  Description [The resulting manager is combinational. The primary inputs
-  corresponding to register outputs are ordered first.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Inter_ManFramesLatches( Aig_Man_t * pAig, int nFrames, Vec_Ptr_t ** pvMapReg )
-{
-    Aig_Man_t * pFrames;
-    Aig_Obj_t * pObj, * pObjLi, * pObjLo;
-    int i, f;
-    assert( Saig_ManRegNum(pAig) > 0 );
-    pFrames = Aig_ManStart( Aig_ManNodeNum(pAig) * nFrames );
-    // map the constant node
-    Aig_ManConst1(pAig)->pData = Aig_ManConst1( pFrames );
-    // create variables for register outputs
-    *pvMapReg = Vec_PtrAlloc( (nFrames+1) * Saig_ManRegNum(pAig) );
-    Saig_ManForEachLo( pAig, pObj, i )
-    {
-        pObj->pData = Aig_ObjCreatePi( pFrames );
-        Vec_PtrPush( *pvMapReg, pObj->pData );
-    }
-    // add timeframes
-    for ( f = 0; f < nFrames; f++ )
-    {
-        // create PI nodes for this frame
-        Saig_ManForEachPi( pAig, pObj, i )
-            pObj->pData = Aig_ObjCreatePi( pFrames );
-        // add internal nodes of this frame
-        Aig_ManForEachNode( pAig, pObj, i )
-            pObj->pData = Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-        // save register inputs
-        Saig_ManForEachLi( pAig, pObj, i )
-            pObj->pData = Aig_ObjChild0Copy(pObj);
-        // transfer to register outputs
-        Saig_ManForEachLiLo(  pAig, pObjLi, pObjLo, i )
-        {
-            pObjLo->pData = pObjLi->pData;
-            Vec_PtrPush( *pvMapReg, pObjLo->pData );
-        }
-    }
-    return pFrames;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates AIG while mapping PIs into the given array.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Inter_ManAppendCone( Aig_Man_t * pOld, Aig_Man_t * pNew, Aig_Obj_t ** ppNewPis, int fCompl )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    assert( Aig_ManPoNum(pOld) == 1 );
-    // create the PIs
-    Aig_ManCleanData( pOld );
-    Aig_ManConst1(pOld)->pData = Aig_ManConst1(pNew);
-    Aig_ManForEachPi( pOld, pObj, i )
-        pObj->pData = ppNewPis[i];
-    // duplicate internal nodes
-    Aig_ManForEachNode( pOld, pObj, i )
-        pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-    // add one PO to new
-    pObj = Aig_ManPo( pOld, 0 );
-    Aig_ObjCreatePo( pNew, Aig_NotCond( Aig_ObjChild0Copy(pObj), fCompl ) );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Checks constainment of two interpolants inductively.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Inter_ManCheckInductiveContainment( Aig_Man_t * pTrans, Aig_Man_t * pInter, int nSteps, int fBackward )
-{
-    Aig_Man_t * pFrames;
-    Aig_Obj_t ** ppNodes;
-    Vec_Ptr_t * vMapRegs;
-    Cnf_Dat_t * pCnf;
-    sat_solver * pSat;
-    int f, nRegs, status;
-    nRegs = Saig_ManRegNum(pTrans);
-    assert( nRegs > 0 );
-    // generate the timeframes 
-    pFrames = Inter_ManFramesLatches( pTrans, nSteps, &vMapRegs );
-    assert( Vec_PtrSize(vMapRegs) == (nSteps + 1) * nRegs );
-    // add main constraints to the timeframes
-    ppNodes = (Aig_Obj_t **)Vec_PtrArray(vMapRegs);
-    if ( !fBackward )
-    { 
-        // forward inductive check: p -> p -> ... -> !p
-        for ( f = 0; f < nSteps; f++ )
-            Inter_ManAppendCone( pInter, pFrames, ppNodes + f * nRegs, 0 );
-        Inter_ManAppendCone( pInter, pFrames, ppNodes + f * nRegs, 1 );
-    }
-    else
-    {
-        // backward inductive check: p -> !p -> ... -> !p
-        Inter_ManAppendCone( pInter, pFrames, ppNodes + 0 * nRegs, 1 );
-        for ( f = 1; f <= nSteps; f++ )
-            Inter_ManAppendCone( pInter, pFrames, ppNodes + f * nRegs, 0 );
-    }
-    Vec_PtrFree( vMapRegs );
-    Aig_ManCleanup( pFrames );
-
-    // convert to CNF
-    pCnf = Cnf_Derive( pFrames, 0 ); 
-    pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
-//    Cnf_DataFree( pCnf );
-//    Aig_ManStop( pFrames );
-
-    if ( pSat == NULL )
-    {
-        Cnf_DataFree( pCnf );
-        Aig_ManStop( pFrames );
-        return 1;
-    }
-
-     // solve the problem
-    status = sat_solver_solve( pSat, NULL, NULL, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-
-//    Inter_ManCheckUniqueness( pTrans, pSat, pCnf, nSteps );
-
-    Cnf_DataFree( pCnf );
-    Aig_ManStop( pFrames );
-
-    sat_solver_delete( pSat );
-    return status == l_False;
-}
-ABC_NAMESPACE_IMPL_END
-
-#include "fra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-/**Function*************************************************************
-
-  Synopsis    [Check if cex satisfies uniqueness constraints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Inter_ManCheckUniqueness( Aig_Man_t * p, sat_solver * pSat, Cnf_Dat_t * pCnf, int nFrames )
-{
-    extern int Fra_SmlNodesCompareInFrame( Fra_Sml_t * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1, int iFrame0, int iFrame1 );
-    extern void Fra_SmlAssignConst( Fra_Sml_t * p, Aig_Obj_t * pObj, int fConst1, int iFrame );
-    extern void Fra_SmlSimulateOne( Fra_Sml_t * p );
-
-    Fra_Sml_t * pSml;
-    Vec_Int_t * vPis;
-    Aig_Obj_t * pObj, * pObj0;
-    int i, k, v, iBit, * pCounterEx;
-    int Counter;
-    if ( nFrames == 1 )
-        return 1;
-//    if ( pSat->model.size == 0 )
-    
-    // possible consequences here!!!
-    assert( 0 );
-
-    if ( sat_solver_nvars(pSat) == 0 )
-        return 1;
-//    assert( Saig_ManPoNum(p) == 1 );
-    assert( Aig_ManRegNum(p) > 0 );
-    assert( Aig_ManRegNum(p) < Aig_ManPiNum(p) );
-
-    // get the counter-example
-    vPis = Vec_IntAlloc( 100 );
-    Aig_ManForEachPi( pCnf->pMan, pObj, k )
-        Vec_IntPush( vPis, pCnf->pVarNums[Aig_ObjId(pObj)] );
-    assert( Vec_IntSize(vPis) == Aig_ManRegNum(p) + nFrames * Saig_ManPiNum(p) );
-    pCounterEx = Sat_SolverGetModel( pSat, vPis->pArray, vPis->nSize );
-    Vec_IntFree( vPis );
-
-    // start a new sequential simulator
-    pSml = Fra_SmlStart( p, 0, nFrames, 1 );
-    // assign simulation info for the registers
-    iBit = 0;
-    Aig_ManForEachLoSeq( p, pObj, i )
-        Fra_SmlAssignConst( pSml, pObj, pCounterEx[iBit++], 0 );
-    // assign simulation info for the primary inputs
-    for ( i = 0; i < nFrames; i++ )
-        Aig_ManForEachPiSeq( p, pObj, k )
-            Fra_SmlAssignConst( pSml, pObj, pCounterEx[iBit++], i );
-    assert( iBit == Aig_ManPiNum(pCnf->pMan) );
-    // run simulation
-    Fra_SmlSimulateOne( pSml );
-
-    // check if the given output has failed
-//    RetValue = !Fra_SmlNodeIsZero( pSml, Aig_ManPo(pAig, 0) );
-//    assert( RetValue );
-
-    // check values at the internal nodes
-    Counter = 0;
-    for ( i = 0; i < nFrames; i++ )
-    for ( k = i+1; k < nFrames; k++ )
-    {
-        for ( v = 0; v < Aig_ManRegNum(p); v++ )
-        {
-            pObj0 = Aig_ManLo(p, v);
-            if ( !Fra_SmlNodesCompareInFrame( pSml, pObj0, pObj0, i, k ) )
-                break;
-        }
-        if ( v == Aig_ManRegNum(p) )
-            Counter++;
-    }
-    printf( "Uniquness does not hold in %d frames.\n", Counter );
-
-    Fra_SmlStop( pSml );
-    ABC_FREE( pCounterEx );
-    return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/int/intCore.c b/src/aig/int/intCore.c
deleted file mode 100644
index 3bd111be..00000000
--- a/src/aig/int/intCore.c
+++ /dev/null
@@ -1,389 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [intCore.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Interpolation engine.]
-
-  Synopsis    [Core procedures.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 24, 2008.]
-
-  Revision    [$Id: intCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "intInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default values of interpolation parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Inter_ManSetDefaultParams( Inter_ManParams_t * p )
-{ 
-    memset( p, 0, sizeof(Inter_ManParams_t) );
-    p->nBTLimit     = 10000; // limit on the number of conflicts
-    p->nFramesMax   = 40;    // the max number timeframes to unroll
-    p->nSecLimit    = 0;     // time limit in seconds
-    p->nFramesK     = 1;     // the number of timeframes to use in induction
-    p->fRewrite     = 0;     // use additional rewriting to simplify timeframes
-    p->fTransLoop   = 0;     // add transition into the init state under new PI var
-    p->fUsePudlak   = 0;     // use Pudluk interpolation procedure
-    p->fUseOther    = 0;     // use other undisclosed option
-    p->fUseMiniSat  = 0;     // use MiniSat-1.14p instead of internal proof engine
-    p->fCheckKstep  = 1;     // check using K-step induction
-    p->fUseBias     = 0;     // bias decisions to global variables
-    p->fUseBackward = 0;     // perform backward interpolation
-    p->fUseSeparate = 0;     // solve each output separately
-    p->fDropSatOuts = 0;     // replace by 1 the solved outputs
-    p->fVerbose     = 0;     // print verbose statistics
-    p->iFrameMax    =-1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Interplates while the number of conflicts is not exceeded.]
-
-  Description [Returns 1 if proven. 0 if failed. -1 if undecided.]
-               
-  SideEffects [Does not check the property in 0-th frame.]
-
-  SeeAlso     []
-
-***********************************************************************/
-int Inter_ManPerformInterpolation( Aig_Man_t * pAig, Inter_ManParams_t * pPars, int * piFrame )
-{
-    extern int Inter_ManCheckInductiveContainment( Aig_Man_t * pTrans, Aig_Man_t * pInter, int nSteps, int fBackward );
-    Inter_Man_t * p;
-    Inter_Check_t * pCheck = NULL;
-    Aig_Man_t * pAigTemp;
-    int s, i, RetValue, Status, clk, clk2, clkTotal = clock(), timeTemp;
-    int nTimeNewOut = pPars->nSecLimit ? time(NULL) + pPars->nSecLimit : 0;
-
-    // sanity checks
-    assert( Saig_ManRegNum(pAig) > 0 );
-    assert( Saig_ManPiNum(pAig) > 0 );
-    assert( Saig_ManPoNum(pAig)-Saig_ManConstrNum(pAig) == 1 );
-    if ( pPars->fVerbose && Saig_ManConstrNum(pAig) )
-        printf( "Performing interpolation with %d constraints...\n", Saig_ManConstrNum(pAig) );
-
-    if ( Inter_ManCheckInitialState(pAig) )
-    {
-        *piFrame = 0;
-        printf( "Property trivially fails in the initial state.\n" );
-        return 0;
-    }
-/*
-    if ( Inter_ManCheckAllStates(pAig) )
-    {
-        printf( "Property trivially holds in all states.\n" );
-        return 1;
-    }
-*/
-    // create interpolation manager
-    // can perform SAT sweeping and/or rewriting of this AIG...
-    p = Inter_ManCreate( pAig, pPars );
-    if ( pPars->fTransLoop )
-        p->pAigTrans = Inter_ManStartOneOutput( pAig, 0 );
-    else
-        p->pAigTrans = Inter_ManStartDuplicated( pAig );
-    // derive CNF for the transformed AIG
-clk = clock();
-    p->pCnfAig = Cnf_Derive( p->pAigTrans, Aig_ManRegNum(p->pAigTrans) ); 
-p->timeCnf += clock() - clk;    
-    if ( pPars->fVerbose )
-    { 
-        printf( "AIG: PI/PO/Reg = %d/%d/%d. And = %d. Lev = %d.  CNF: Var/Cla = %d/%d.\n",
-            Saig_ManPiNum(pAig), Saig_ManPoNum(pAig), Saig_ManRegNum(pAig), 
-            Aig_ManAndNum(pAig), Aig_ManLevelNum(pAig),
-            p->pCnfAig->nVars, p->pCnfAig->nClauses );
-    }
- 
-    // derive interpolant
-    *piFrame = -1;
-    p->nFrames = 1;
-    for ( s = 0; ; s++ )
-    {
-        Cnf_Dat_t * pCnfInter2;
-
-clk2 = clock();
-        // initial state
-        if ( pPars->fUseBackward )
-            p->pInter = Inter_ManStartOneOutput( pAig, 1 );
-        else
-            p->pInter = Inter_ManStartInitState( Aig_ManRegNum(pAig) );
-        assert( Aig_ManPoNum(p->pInter) == 1 );
-clk = clock();
-        p->pCnfInter = Cnf_Derive( p->pInter, 0 );  
-p->timeCnf += clock() - clk;    
-        // timeframes
-        p->pFrames = Inter_ManFramesInter( pAig, p->nFrames, pPars->fUseBackward );
-clk = clock();
-        if ( pPars->fRewrite )
-        {
-            p->pFrames = Dar_ManRwsat( pAigTemp = p->pFrames, 1, 0 );
-            Aig_ManStop( pAigTemp );
-//        p->pFrames = Fra_FraigEquivence( pAigTemp = p->pFrames, 100, 0 );
-//        Aig_ManStop( pAigTemp );
-        }
-p->timeRwr += clock() - clk;
-        // can also do SAT sweeping on the timeframes...
-clk = clock();
-        if ( pPars->fUseBackward )
-            p->pCnfFrames = Cnf_Derive( p->pFrames, Aig_ManPoNum(p->pFrames) );  
-        else
-//            p->pCnfFrames = Cnf_Derive( p->pFrames, 0 );  
-            p->pCnfFrames = Cnf_DeriveSimple( p->pFrames, 0 );  
-p->timeCnf += clock() - clk;    
-        // report statistics
-        if ( pPars->fVerbose )
-        {
-            printf( "Step = %2d. Frames = 1 + %d. And = %5d. Lev = %5d.  ", 
-                s+1, p->nFrames, Aig_ManNodeNum(p->pFrames), Aig_ManLevelNum(p->pFrames) );
-            ABC_PRT( "Time", clock() - clk2 );
-        }
-
-
-        //////////////////////////////////////////
-        // start containment checking
-        if ( !(pPars->fTransLoop || pPars->fUseBackward) )
-        {
-            pCheck = Inter_CheckStart( p->pAigTrans, pPars->nFramesK );
-            // try new containment check for the initial state
-clk = clock();
-            pCnfInter2 = Cnf_Derive( p->pInter, 1 );  
-p->timeCnf += clock() - clk;    
-            RetValue = Inter_CheckPerform( pCheck, pCnfInter2, nTimeNewOut );
-//            assert( RetValue == 0 );
-            Cnf_DataFree( pCnfInter2 );
-            if ( p->vInters )
-                Vec_PtrPush( p->vInters, Aig_ManDupSimple(p->pInter) );
-        }
-        //////////////////////////////////////////
-
-        // iterate the interpolation procedure
-        for ( i = 0; ; i++ )
-        {
-            if ( p->nFrames + i >= pPars->nFramesMax )
-            { 
-                if ( pPars->fVerbose )
-                    printf( "Reached limit (%d) on the number of timeframes.\n", pPars->nFramesMax );
-                p->timeTotal = clock() - clkTotal;
-                Inter_ManStop( p, 0 );
-                Inter_CheckStop( pCheck );
-                return -1;
-            }
-
-            // perform interpolation
-            clk = clock();
-#ifdef ABC_USE_LIBRARIES
-            if ( pPars->fUseMiniSat )
-            {
-                assert( !pPars->fUseBackward );
-                RetValue = Inter_ManPerformOneStepM114p( p, pPars->fUsePudlak, pPars->fUseOther );
-            }
-            else 
-#endif
-                RetValue = Inter_ManPerformOneStep( p, pPars->fUseBias, pPars->fUseBackward, nTimeNewOut );
-
-            if ( pPars->fVerbose )
-            {
-                printf( "   I = %2d. Bmc =%3d. IntAnd =%6d. IntLev =%5d. Conf =%6d.  ", 
-                    i+1, i + 1 + p->nFrames, Aig_ManNodeNum(p->pInter), Aig_ManLevelNum(p->pInter), p->nConfCur );
-                ABC_PRT( "Time", clock() - clk );
-            }
-            // remember the number of timeframes completed
-            pPars->iFrameMax = i + 1 + p->nFrames;
-            if ( RetValue == 0 ) // found a (spurious?) counter-example
-            {
-                if ( i == 0 ) // real counterexample
-                {
-                    if ( pPars->fVerbose )
-                        printf( "Found a real counterexample in frame %d.\n", p->nFrames );
-                    p->timeTotal = clock() - clkTotal;
-                    *piFrame = p->nFrames;
-//                    pAig->pSeqModel = (Abc_Cex_t *)Inter_ManGetCounterExample( pAig, p->nFrames+1, pPars->fVerbose );
-                    {
-                        int RetValue;
-                        Saig_ParBmc_t ParsBmc, * pParsBmc = &ParsBmc;
-                        Saig_ParBmcSetDefaultParams( pParsBmc );
-                        pParsBmc->nConfLimit = 100000000;
-                        pParsBmc->nStart     = p->nFrames;
-                        pParsBmc->fVerbose   = pPars->fVerbose;
-                        RetValue = Saig_ManBmcScalable( pAig, pParsBmc );
-                        if ( RetValue == 1 )
-                            printf( "Error: The problem should be SAT but it is UNSAT.\n" );
-                        else if ( RetValue == -1 )
-                            printf( "Error: The problem timed out.\n" );
-                    }
-                    Inter_ManStop( p, 0 );
-                    Inter_CheckStop( pCheck );
-                    return 0;
-                }
-                // likely spurious counter-example
-                p->nFrames += i;
-                Inter_ManClean( p ); 
-                break;
-            }
-            else if ( RetValue == -1 ) 
-            {
-                if ( pPars->nSecLimit && time(NULL) > nTimeNewOut ) // timed out
-                {
-                    if ( pPars->fVerbose )
-                        printf( "Reached timeout (%d seconds).\n",  pPars->nSecLimit );
-                }
-                else
-                {
-                    assert( p->nConfCur >= p->nConfLimit );
-                    if ( pPars->fVerbose )
-                        printf( "Reached limit (%d) on the number of conflicts.\n", p->nConfLimit );
-                }
-                p->timeTotal = clock() - clkTotal;
-                Inter_ManStop( p, 0 );
-                Inter_CheckStop( pCheck );
-                return -1;
-            }
-            assert( RetValue == 1 ); // found new interpolant
-            // compress the interpolant
-clk = clock();
-            if ( p->pInterNew )
-            {
-//                Ioa_WriteAiger( p->pInterNew, "interpol.aig", 0, 0 );
-                p->pInterNew = Dar_ManRwsat( pAigTemp = p->pInterNew, 1, 0 );
-//                p->pInterNew = Dar_ManRwsat( pAigTemp = p->pInterNew, 0, 0 );
-                Aig_ManStop( pAigTemp );
-            }
-p->timeRwr += clock() - clk;
-
-            // check if interpolant is trivial
-            if ( p->pInterNew == NULL || Aig_ObjChild0(Aig_ManPo(p->pInterNew,0)) == Aig_ManConst0(p->pInterNew) )
-            { 
-//                printf( "interpolant is constant 0\n" );
-                if ( pPars->fVerbose )
-                    printf( "The problem is trivially true for all states.\n" );
-                p->timeTotal = clock() - clkTotal;
-                Inter_ManStop( p, 1 );
-                Inter_CheckStop( pCheck );
-                return 1;
-            }
-
-            // check containment of interpolants
-clk = clock();
-            if ( pPars->fCheckKstep ) // k-step unique-state induction
-            {
-                if ( Aig_ManPiNum(p->pInterNew) == Aig_ManPiNum(p->pInter) )
-                {
-                    if ( pPars->fTransLoop || pPars->fUseBackward )
-                        Status = Inter_ManCheckInductiveContainment( p->pAigTrans, p->pInterNew, pPars->nFramesK, pPars->fUseBackward );
-                    else
-                    {   // new containment check
-clk2 = clock();
-                        pCnfInter2 = Cnf_Derive( p->pInterNew, 1 );  
-p->timeCnf += clock() - clk2;
-timeTemp = clock() - clk2;
-            
-                        Status = Inter_CheckPerform( pCheck, pCnfInter2, nTimeNewOut );
-                        Cnf_DataFree( pCnfInter2 );
-                        if ( p->vInters )
-                            Vec_PtrPush( p->vInters, Aig_ManDupSimple(p->pInterNew) );
-                    }
-                }
-                else
-                    Status = 0;
-            }
-            else // combinational containment
-            {
-                if ( Aig_ManPiNum(p->pInterNew) == Aig_ManPiNum(p->pInter) )
-                    Status = Inter_ManCheckContainment( p->pInterNew, p->pInter );
-                else
-                    Status = 0;
-            }
-p->timeEqu += clock() - clk - timeTemp;
-            if ( Status ) // contained
-            {
-                if ( pPars->fVerbose )
-                    printf( "Proved containment of interpolants.\n" );
-                p->timeTotal = clock() - clkTotal;
-                Inter_ManStop( p, 1 );
-                Inter_CheckStop( pCheck );
-                return 1;
-            }
-            if ( pPars->nSecLimit && time(NULL) > nTimeNewOut )
-            {
-                printf( "Reached timeout (%d seconds).\n",  pPars->nSecLimit );
-                p->timeTotal = clock() - clkTotal;
-                Inter_ManStop( p, 1 );
-                Inter_CheckStop( pCheck );
-                return -1;
-            }
-            // save interpolant and convert it into CNF
-            if ( pPars->fTransLoop )
-            {
-                Aig_ManStop( p->pInter );
-                p->pInter = p->pInterNew; 
-            }
-            else
-            {
-                if ( pPars->fUseBackward )
-                {
-                    p->pInter = Aig_ManCreateMiter( pAigTemp = p->pInter, p->pInterNew, 2 );
-                    Aig_ManStop( pAigTemp );
-                    Aig_ManStop( p->pInterNew );
-                    // compress the interpolant
-clk = clock();
-                    p->pInter = Dar_ManRwsat( pAigTemp = p->pInter, 1, 0 );
-                    Aig_ManStop( pAigTemp );
-p->timeRwr += clock() - clk;
-                }
-                else // forward with the new containment checking (using only the frontier)
-                {
-                    Aig_ManStop( p->pInter );
-                    p->pInter = p->pInterNew; 
-                }
-            }
-            p->pInterNew = NULL;
-            Cnf_DataFree( p->pCnfInter );
-clk = clock();
-            p->pCnfInter = Cnf_Derive( p->pInter, 0 );  
-p->timeCnf += clock() - clk;
-        }
-
-        // start containment checking
-        Inter_CheckStop( pCheck );
-    }
-    assert( 0 );
-    return RetValue;
-}
-
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/int/intCtrex.c b/src/aig/int/intCtrex.c
deleted file mode 100644
index 0aa60040..00000000
--- a/src/aig/int/intCtrex.c
+++ /dev/null
@@ -1,167 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [intCtrex.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Interpolation engine.]
-
-  Synopsis    [Counter-example generation after disproving the property.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 24, 2008.]
-
-  Revision    [$Id: intCtrex.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "intInt.h"
-#include "ssw.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Unroll the circuit the given number of timeframes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Inter_ManFramesBmc( Aig_Man_t * pAig, int nFrames )
-{
-    Aig_Man_t * pFrames;
-    Aig_Obj_t * pObj, * pObjLi, * pObjLo;
-    int i, f;
-    assert( Saig_ManRegNum(pAig) > 0 );
-    assert( Saig_ManPoNum(pAig) == 1 );
-    pFrames = Aig_ManStart( Aig_ManNodeNum(pAig) * nFrames );
-    // map the constant node
-    Aig_ManConst1(pAig)->pData = Aig_ManConst1( pFrames );
-    // create variables for register outputs
-    Saig_ManForEachLo( pAig, pObj, i )
-        pObj->pData = Aig_ManConst0( pFrames );
-    // add timeframes
-    for ( f = 0; f < nFrames; f++ )
-    {
-        // create PI nodes for this frame
-        Saig_ManForEachPi( pAig, pObj, i )
-            pObj->pData = Aig_ObjCreatePi( pFrames );
-        // add internal nodes of this frame
-        Aig_ManForEachNode( pAig, pObj, i )
-            pObj->pData = Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-        if ( f == nFrames - 1 )
-            break;
-        // transfer to register outputs
-        Saig_ManForEachLiLo(  pAig, pObjLi, pObjLo, i )
-            pObjLi->pData = Aig_ObjChild0Copy(pObjLi);
-        // transfer to register outputs
-        Saig_ManForEachLiLo(  pAig, pObjLi, pObjLo, i )
-            pObjLo->pData = pObjLi->pData;
-    }
-    // create POs for the output of the last frame
-    pObj = Aig_ManPo( pAig, 0 );
-    Aig_ObjCreatePo( pFrames, Aig_ObjChild0Copy(pObj) );
-    Aig_ManCleanup( pFrames );
-    return pFrames;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Run the SAT solver on the unrolled instance.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void * Inter_ManGetCounterExample( Aig_Man_t * pAig, int nFrames, int fVerbose )
-{
-    int nConfLimit = 1000000;
-    Abc_Cex_t * pCtrex = NULL;
-    Aig_Man_t * pFrames;
-    sat_solver * pSat;
-    Cnf_Dat_t * pCnf;
-    int status, clk = clock();
-    Vec_Int_t * vCiIds;
-    // create timeframes
-    assert( Saig_ManPoNum(pAig) == 1 );
-    pFrames = Inter_ManFramesBmc( pAig, nFrames );
-    // derive CNF
-    pCnf = Cnf_Derive( pFrames, 0 );
-    Cnf_DataTranformPolarity( pCnf, 0 );
-    vCiIds = Cnf_DataCollectPiSatNums( pCnf, pFrames );
-    Aig_ManStop( pFrames );
-    // convert into SAT solver
-    pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
-    Cnf_DataFree( pCnf );
-    if ( pSat == NULL )
-    {
-        printf( "Counter-example generation in command \"int\" has failed.\n" );
-        printf( "Use command \"bmc2\" to produce a valid counter-example.\n" );
-        Vec_IntFree( vCiIds );
-        return NULL;
-    }
-    // simplify the problem
-    status = sat_solver_simplify(pSat);
-    if ( status == 0 )
-    {
-        Vec_IntFree( vCiIds );
-        sat_solver_delete( pSat );
-        return NULL;
-    }
-    // solve the miter
-    status = sat_solver_solve( pSat, NULL, NULL, (ABC_INT64_T)nConfLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    // if the problem is SAT, get the counterexample
-    if ( status == l_True )
-    {
-        int i, * pModel = Sat_SolverGetModel( pSat, vCiIds->pArray, vCiIds->nSize );
-        pCtrex = Abc_CexAlloc( Saig_ManRegNum(pAig), Saig_ManPiNum(pAig), nFrames );
-        pCtrex->iFrame = nFrames - 1;
-        pCtrex->iPo = 0;
-        for ( i = 0; i < Vec_IntSize(vCiIds); i++ )
-            if ( pModel[i] )
-                Aig_InfoSetBit( pCtrex->pData, Saig_ManRegNum(pAig) + i );
-        ABC_FREE( pModel );
-    }
-    // free the sat_solver
-    sat_solver_delete( pSat );
-    Vec_IntFree( vCiIds );
-    // verify counter-example
-    status = Saig_ManVerifyCex( pAig, pCtrex );
-    if ( status == 0 )
-        printf( "Inter_ManGetCounterExample(): Counter-example verification has FAILED.\n" );
-    // report the results
-    if ( fVerbose )
-    {
-        ABC_PRT( "Total ctrex generation time", clock() - clk );
-    }
-    return pCtrex;
-
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/int/intDup.c b/src/aig/int/intDup.c
deleted file mode 100644
index 800375a9..00000000
--- a/src/aig/int/intDup.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [intDup.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Interpolation engine.]
-
-  Synopsis    [Specialized AIG duplication procedures.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 24, 2008.]
-
-  Revision    [$Id: intDup.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "intInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Create trivial AIG manager for the init state.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Inter_ManStartInitState( int nRegs )
-{
-    Aig_Man_t * p;
-    Aig_Obj_t * pRes;
-    Aig_Obj_t ** ppInputs;
-    int i;
-    assert( nRegs > 0 );
-    ppInputs = ABC_ALLOC( Aig_Obj_t *, nRegs );
-    p = Aig_ManStart( nRegs );
-    for ( i = 0; i < nRegs; i++ )
-        ppInputs[i] = Aig_Not( Aig_ObjCreatePi(p) );
-    pRes = Aig_Multi( p, ppInputs, nRegs, AIG_OBJ_AND );
-    Aig_ObjCreatePo( p, pRes );
-    ABC_FREE( ppInputs );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicate the AIG w/o POs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Inter_ManStartDuplicated( Aig_Man_t * p )
-{
-    Aig_Man_t * pNew;
-    Aig_Obj_t * pObj;
-    int i;
-    assert( Aig_ManRegNum(p) > 0 );
-    // create the new manager
-    pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
-    // create the PIs
-    Aig_ManCleanData( p );
-    Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
-    Aig_ManForEachPi( p, pObj, i )
-        pObj->pData = Aig_ObjCreatePi( pNew );
-    // set registers
-    pNew->nTruePis = p->nTruePis;
-    pNew->nTruePos = Saig_ManConstrNum(p);
-    pNew->nRegs    = p->nRegs;
-    // duplicate internal nodes
-    Aig_ManForEachNode( p, pObj, i )
-        pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-
-    // create constraint outputs
-    Saig_ManForEachPo( p, pObj, i )
-    {
-        if ( i < Saig_ManPoNum(p)-Saig_ManConstrNum(p) )
-            continue;
-        Aig_ObjCreatePo( pNew, Aig_Not( Aig_ObjChild0Copy(pObj) ) );
-    }
-
-    // create register inputs with MUXes
-    Saig_ManForEachLi( p, pObj, i )
-        Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
-    Aig_ManCleanup( pNew );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicate the AIG w/o POs and transforms to transit into init state.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Inter_ManStartOneOutput( Aig_Man_t * p, int fAddFirstPo )
-{
-    Aig_Man_t * pNew;
-    Aig_Obj_t * pObj, * pObjLi, * pObjLo;
-    Aig_Obj_t * pCtrl = NULL; // Suppress "might be used uninitialized"
-    int i;
-    assert( Aig_ManRegNum(p) > 0 );
-    // create the new manager
-    pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
-    // create the PIs
-    Aig_ManCleanData( p );
-    Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
-    Aig_ManForEachPi( p, pObj, i )
-    {
-        if ( i == Saig_ManPiNum(p) )
-            pCtrl = Aig_ObjCreatePi( pNew );
-        pObj->pData = Aig_ObjCreatePi( pNew );
-    }
-    // set registers
-    pNew->nRegs    = fAddFirstPo? 0 : p->nRegs;
-    pNew->nTruePis = fAddFirstPo? Aig_ManPiNum(p) + 1 : p->nTruePis + 1;
-    pNew->nTruePos = fAddFirstPo + Saig_ManConstrNum(p);
-    // duplicate internal nodes
-    Aig_ManForEachNode( p, pObj, i )
-        pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-
-    // create constraint outputs
-    Saig_ManForEachPo( p, pObj, i )
-    {
-        if ( i < Saig_ManPoNum(p)-Saig_ManConstrNum(p) )
-            continue;
-        Aig_ObjCreatePo( pNew, Aig_Not( Aig_ObjChild0Copy(pObj) ) );
-    }
-
-    // add the PO
-    if ( fAddFirstPo )
-    {
-        pObj = Aig_ManPo( p, 0 );
-        Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
-    }
-    else
-    {
-        // create register inputs with MUXes
-        Saig_ManForEachLiLo( p, pObjLi, pObjLo, i )
-        {
-            pObj = Aig_Mux( pNew, pCtrl, (Aig_Obj_t *)pObjLo->pData, Aig_ObjChild0Copy(pObjLi) );
-    //        pObj = Aig_Mux( pNew, pCtrl, Aig_ManConst0(pNew), Aig_ObjChild0Copy(pObjLi) );
-            Aig_ObjCreatePo( pNew, pObj );
-        }
-    }
-    Aig_ManCleanup( pNew );
-    return pNew;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/int/intFrames.c b/src/aig/int/intFrames.c
deleted file mode 100644
index 0fbab6cb..00000000
--- a/src/aig/int/intFrames.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [intFrames.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Interpolation engine.]
-
-  Synopsis    [Sequential AIG unrolling for interpolation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 24, 2008.]
-
-  Revision    [$Id: intFrames.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "intInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Create timeframes of the manager for interpolation.]
-
-  Description [The resulting manager is combinational. The primary inputs
-  corresponding to register outputs are ordered first. The only POs of the 
-  manager is the property output of the last timeframe.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Inter_ManFramesInter( Aig_Man_t * pAig, int nFrames, int fAddRegOuts )
-{
-    Aig_Man_t * pFrames;
-    Aig_Obj_t * pObj, * pObjLi, * pObjLo;
-    int i, f;
-    assert( Saig_ManRegNum(pAig) > 0 );
-    assert( Saig_ManPoNum(pAig)-Saig_ManConstrNum(pAig) == 1 );
-    pFrames = Aig_ManStart( Aig_ManNodeNum(pAig) * nFrames );
-    // map the constant node
-    Aig_ManConst1(pAig)->pData = Aig_ManConst1( pFrames );
-    // create variables for register outputs
-    if ( fAddRegOuts )
-    {
-        Saig_ManForEachLo( pAig, pObj, i )
-            pObj->pData = Aig_ManConst0( pFrames );
-    }
-    else
-    {
-        Saig_ManForEachLo( pAig, pObj, i )
-            pObj->pData = Aig_ObjCreatePi( pFrames );
-    }
-    // add timeframes
-    for ( f = 0; f < nFrames; f++ )
-    {
-        // create PI nodes for this frame
-        Saig_ManForEachPi( pAig, pObj, i )
-            pObj->pData = Aig_ObjCreatePi( pFrames );
-        // add internal nodes of this frame
-        Aig_ManForEachNode( pAig, pObj, i )
-            pObj->pData = Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-        // add outputs for constraints
-        Saig_ManForEachPo( pAig, pObj, i )
-        {
-            if ( i < Saig_ManPoNum(pAig)-Saig_ManConstrNum(pAig) )
-                continue;
-            Aig_ObjCreatePo( pFrames, Aig_Not( Aig_ObjChild0Copy(pObj) ) );
-        }
-        if ( f == nFrames - 1 )
-            break;
-        // save register inputs
-        Saig_ManForEachLi( pAig, pObj, i )
-            pObj->pData = Aig_ObjChild0Copy(pObj);
-        // transfer to register outputs
-        Saig_ManForEachLiLo(  pAig, pObjLi, pObjLo, i )
-            pObjLo->pData = pObjLi->pData;
-    }
-    // create POs for each register output
-    if ( fAddRegOuts )
-    {
-        Saig_ManForEachLi( pAig, pObj, i )
-            Aig_ObjCreatePo( pFrames, Aig_ObjChild0Copy(pObj) );
-    }
-    // create the only PO of the manager
-    else
-    {
-        pObj = Aig_ManPo( pAig, 0 );
-        Aig_ObjCreatePo( pFrames, Aig_ObjChild0Copy(pObj) );
-    }
-    Aig_ManCleanup( pFrames );
-    return pFrames;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/int/intInt.h b/src/aig/int/intInt.h
deleted file mode 100644
index 66ff9578..00000000
--- a/src/aig/int/intInt.h
+++ /dev/null
@@ -1,142 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [intInt.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Interpolation engine.]
-
-  Synopsis    [Internal declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 24, 2008.]
-
-  Revision    [$Id: intInt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __INT_INT_H__
-#define __INT_INT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
-#include "satStore.h"
-#include "int.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-// interpolation manager
-typedef struct Inter_Man_t_ Inter_Man_t;
-struct Inter_Man_t_
-{
-    // AIG manager
-    Aig_Man_t *      pAig;         // the original AIG manager
-    Aig_Man_t *      pAigTrans;    // the transformed original AIG manager
-    Cnf_Dat_t *      pCnfAig;      // CNF for the original manager
-    // interpolant
-    Aig_Man_t *      pInter;       // the current interpolant
-    Cnf_Dat_t *      pCnfInter;    // CNF for the current interplant
-    // timeframes
-    Aig_Man_t *      pFrames;      // the timeframes      
-    Cnf_Dat_t *      pCnfFrames;   // CNF for the timeframes 
-    // other data
-    Vec_Int_t *      vVarsAB;      // the variables participating in 
-    // temporary place for the new interpolant
-    Aig_Man_t *      pInterNew;
-    Vec_Ptr_t *      vInters;
-    // parameters
-    int              nFrames;      // the number of timeframes
-    int              nConfCur;     // the current number of conflicts
-    int              nConfLimit;   // the limit on the number of conflicts
-    int              fVerbose;     // the verbosiness flag
-    // runtime
-    int              timeRwr;
-    int              timeCnf;
-    int              timeSat;
-    int              timeInt;
-    int              timeEqu;
-    int              timeOther;
-    int              timeTotal;
-};
-
-// containment checking manager
-typedef struct Inter_Check_t_ Inter_Check_t;
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== intCheck.c ============================================================*/
-extern Inter_Check_t * Inter_CheckStart( Aig_Man_t * pTrans, int nFramesK );
-extern void            Inter_CheckStop( Inter_Check_t * p );
-extern int             Inter_CheckPerform( Inter_Check_t * p, Cnf_Dat_t * pCnf, int nTimeNewOut );
-
-/*=== intContain.c ============================================================*/
-extern int             Inter_ManCheckContainment( Aig_Man_t * pNew, Aig_Man_t * pOld );
-extern int             Inter_ManCheckEquivalence( Aig_Man_t * pNew, Aig_Man_t * pOld );
-extern int             Inter_ManCheckInductiveContainment( Aig_Man_t * pTrans, Aig_Man_t * pInter, int nSteps, int fBackward );
-
-/*=== intCtrex.c ============================================================*/
-extern void *          Inter_ManGetCounterExample( Aig_Man_t * pAig, int nFrames, int fVerbose );
-
-/*=== intDup.c ============================================================*/
-extern Aig_Man_t *     Inter_ManStartInitState( int nRegs );
-extern Aig_Man_t *     Inter_ManStartDuplicated( Aig_Man_t * p );
-extern Aig_Man_t *     Inter_ManStartOneOutput( Aig_Man_t * p, int fAddFirstPo );
-
-/*=== intFrames.c ============================================================*/
-extern Aig_Man_t *     Inter_ManFramesInter( Aig_Man_t * pAig, int nFrames, int fAddRegOuts );
-
-/*=== intMan.c ============================================================*/
-extern Inter_Man_t *   Inter_ManCreate( Aig_Man_t * pAig, Inter_ManParams_t * pPars );
-extern void            Inter_ManClean( Inter_Man_t * p );
-extern void            Inter_ManStop( Inter_Man_t * p, int fProved );
-
-/*=== intM114.c ============================================================*/
-extern int             Inter_ManPerformOneStep( Inter_Man_t * p, int fUseBias, int fUseBackward, int nTimeNewOut );
-
-/*=== intM114p.c ============================================================*/
-#ifdef ABC_USE_LIBRARIES
-extern int             Inter_ManPerformOneStepM114p( Inter_Man_t * p, int fUsePudlak, int fUseOther );
-#endif
-
-/*=== intUtil.c ============================================================*/
-extern int             Inter_ManCheckInitialState( Aig_Man_t * p );
-extern int             Inter_ManCheckAllStates( Aig_Man_t * p );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/int/intInter.c b/src/aig/int/intInter.c
deleted file mode 100644
index ef32294b..00000000
--- a/src/aig/int/intInter.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [intInter.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Interpolation engine.]
-
-  Synopsis    [Experimental procedures to derive and compare interpolants.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 24, 2008.]
-
-  Revision    [$Id: intInter.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "intInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Inter_ManDupExpand( Aig_Man_t * pInter, Aig_Man_t * pOther )
-{
-    Aig_Man_t * pInterC;
-    assert( Aig_ManPiNum(pInter) <= Aig_ManPiNum(pOther) );
-    pInterC = Aig_ManDupSimple( pInter );
-    Aig_IthVar( pInterC, Aig_ManPiNum(pOther)-1 );
-    assert( Aig_ManPiNum(pInterC) == Aig_ManPiNum(pOther) );
-    return pInterC;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Inter_ManVerifyInterpolant1( Inta_Man_t * pMan, Sto_Man_t * pCnf, Aig_Man_t * pInter )
-{
-    extern Aig_Man_t * Inta_ManDeriveClauses( Inta_Man_t * pMan, Sto_Man_t * pCnf, int fClausesA );
-    Aig_Man_t * pLower, * pUpper, * pInterC;
-    int RetValue1, RetValue2;
-
-    pLower = Inta_ManDeriveClauses( pMan, pCnf, 1 );
-    pUpper = Inta_ManDeriveClauses( pMan, pCnf, 0 );
-    Aig_ManFlipFirstPo( pUpper );
-
-    pInterC = Inter_ManDupExpand( pInter, pLower );
-    RetValue1 = Inter_ManCheckContainment( pLower, pInterC );
-    Aig_ManStop( pInterC );
-
-    pInterC = Inter_ManDupExpand( pInter, pUpper );
-    RetValue2 = Inter_ManCheckContainment( pInterC, pUpper );
-    Aig_ManStop( pInterC );
-    
-    if ( RetValue1 && RetValue2 )
-        printf( "Im is correct.\n" );
-    if ( !RetValue1 )
-        printf( "Property A => Im fails.\n" );
-    if ( !RetValue2 )
-        printf( "Property Im => !B fails.\n" );
-
-    Aig_ManStop( pLower );
-    Aig_ManStop( pUpper );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Inter_ManVerifyInterpolant2( Intb_Man_t * pMan, Sto_Man_t * pCnf, Aig_Man_t * pInter )
-{
-    extern Aig_Man_t * Intb_ManDeriveClauses( Intb_Man_t * pMan, Sto_Man_t * pCnf, int fClausesA );
-    Aig_Man_t * pLower, * pUpper, * pInterC;
-    int RetValue1, RetValue2;
-
-    pLower = Intb_ManDeriveClauses( pMan, pCnf, 1 );
-    pUpper = Intb_ManDeriveClauses( pMan, pCnf, 0 );
-    Aig_ManFlipFirstPo( pUpper );
-
-    pInterC = Inter_ManDupExpand( pInter, pLower );
-//Aig_ManPrintStats( pLower );
-//Aig_ManPrintStats( pUpper );
-//Aig_ManPrintStats( pInterC );
-//Aig_ManDumpBlif( pInterC, "inter_c.blif", NULL, NULL );
-    RetValue1 = Inter_ManCheckContainment( pLower, pInterC );
-    Aig_ManStop( pInterC );
-
-    pInterC = Inter_ManDupExpand( pInter, pUpper );
-    RetValue2 = Inter_ManCheckContainment( pInterC, pUpper );
-    Aig_ManStop( pInterC );
-    
-    if ( RetValue1 && RetValue2 )
-        printf( "Ip is correct.\n" );
-    if ( !RetValue1 )
-        printf( "Property A => Ip fails.\n" );
-    if ( !RetValue2 )
-        printf( "Property Ip => !B fails.\n" );
-
-    Aig_ManStop( pLower );
-    Aig_ManStop( pUpper );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/int/intM114.c b/src/aig/int/intM114.c
deleted file mode 100644
index 139c9bbd..00000000
--- a/src/aig/int/intM114.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [intM114.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Interpolation engine.]
-
-  Synopsis    [Intepolation using ABC's proof generator added to MiniSat-1.14c.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 24, 2008.]
-
-  Revision    [$Id: intM114.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "intInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the SAT solver for one interpolation run.]
-
-  Description [pInter is the previous interpolant. pAig is one time frame.
-  pFrames is the unrolled time frames.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-sat_solver * Inter_ManDeriveSatSolver( 
-    Aig_Man_t * pInter, Cnf_Dat_t * pCnfInter, 
-    Aig_Man_t * pAig, Cnf_Dat_t * pCnfAig, 
-    Aig_Man_t * pFrames, Cnf_Dat_t * pCnfFrames, 
-    Vec_Int_t * vVarsAB, int fUseBackward )
-{
-    sat_solver * pSat;
-    Aig_Obj_t * pObj, * pObj2;
-    int i, Lits[2];
-
-//Aig_ManDumpBlif( pInter,  "out_inter.blif", NULL, NULL );
-//Aig_ManDumpBlif( pAig,    "out_aig.blif", NULL, NULL );
-//Aig_ManDumpBlif( pFrames, "out_frames.blif", NULL, NULL );
-
-    // sanity checks
-    assert( Aig_ManRegNum(pInter) == 0 );
-    assert( Aig_ManRegNum(pAig) > 0 );
-    assert( Aig_ManRegNum(pFrames) == 0 );
-    assert( Aig_ManPoNum(pInter) == 1 );
-    assert( Aig_ManPoNum(pFrames) == fUseBackward? Saig_ManRegNum(pAig) : 1 );
-    assert( fUseBackward || Aig_ManPiNum(pInter) == Aig_ManRegNum(pAig) );
-//    assert( (Aig_ManPiNum(pFrames) - Aig_ManRegNum(pAig)) % Saig_ManPiNum(pAig) == 0 );
-
-    // prepare CNFs
-    Cnf_DataLift( pCnfAig,   pCnfFrames->nVars );
-    Cnf_DataLift( pCnfInter, pCnfFrames->nVars + pCnfAig->nVars );
-
-    // start the solver
-    pSat = sat_solver_new();
-    sat_solver_store_alloc( pSat );
-    sat_solver_setnvars( pSat, pCnfInter->nVars + pCnfAig->nVars + pCnfFrames->nVars );
-
-    // add clauses of A
-    // interpolant
-    for ( i = 0; i < pCnfInter->nClauses; i++ )
-    {
-        if ( !sat_solver_addclause( pSat, pCnfInter->pClauses[i], pCnfInter->pClauses[i+1] ) )
-        {
-            sat_solver_delete( pSat );
-            // return clauses to the original state
-            Cnf_DataLift( pCnfAig, -pCnfFrames->nVars );
-            Cnf_DataLift( pCnfInter, -pCnfFrames->nVars -pCnfAig->nVars );
-            return NULL;
-        }
-    }
-    // connector clauses
-    if ( fUseBackward )
-    {
-        Saig_ManForEachLi( pAig, pObj2, i )
-        {
-            if ( Saig_ManRegNum(pAig) == Aig_ManPiNum(pInter) )
-                pObj = Aig_ManPi( pInter, i );
-            else
-            {
-                assert( Aig_ManPiNum(pAig) == Aig_ManPiNum(pInter) );
-                pObj = Aig_ManPi( pInter, Aig_ManPiNum(pAig)-Saig_ManRegNum(pAig) + i );
-            }
-
-            Lits[0] = toLitCond( pCnfInter->pVarNums[pObj->Id], 0 );
-            Lits[1] = toLitCond( pCnfAig->pVarNums[pObj2->Id], 1 );
-            if ( !sat_solver_addclause( pSat, Lits, Lits+2 ) )
-                assert( 0 );
-            Lits[0] = toLitCond( pCnfInter->pVarNums[pObj->Id], 1 );
-            Lits[1] = toLitCond( pCnfAig->pVarNums[pObj2->Id], 0 );
-            if ( !sat_solver_addclause( pSat, Lits, Lits+2 ) )
-                assert( 0 );
-        }
-    }
-    else
-    {
-        Aig_ManForEachPi( pInter, pObj, i )
-        {
-            pObj2 = Saig_ManLo( pAig, i );
-
-            Lits[0] = toLitCond( pCnfInter->pVarNums[pObj->Id], 0 );
-            Lits[1] = toLitCond( pCnfAig->pVarNums[pObj2->Id], 1 );
-            if ( !sat_solver_addclause( pSat, Lits, Lits+2 ) )
-                assert( 0 );
-            Lits[0] = toLitCond( pCnfInter->pVarNums[pObj->Id], 1 );
-            Lits[1] = toLitCond( pCnfAig->pVarNums[pObj2->Id], 0 );
-            if ( !sat_solver_addclause( pSat, Lits, Lits+2 ) )
-                assert( 0 );
-        }
-    }
-    // one timeframe
-    for ( i = 0; i < pCnfAig->nClauses; i++ )
-    {
-        if ( !sat_solver_addclause( pSat, pCnfAig->pClauses[i], pCnfAig->pClauses[i+1] ) )
-            assert( 0 );
-    }
-    // connector clauses
-    Vec_IntClear( vVarsAB );
-    if ( fUseBackward )
-    {
-        Aig_ManForEachPo( pFrames, pObj, i )
-        {
-            assert( pCnfFrames->pVarNums[pObj->Id] >= 0 );
-            Vec_IntPush( vVarsAB, pCnfFrames->pVarNums[pObj->Id] );
-
-            pObj2 = Saig_ManLo( pAig, i );
-            Lits[0] = toLitCond( pCnfFrames->pVarNums[pObj->Id], 0 );
-            Lits[1] = toLitCond( pCnfAig->pVarNums[pObj2->Id], 1 );
-            if ( !sat_solver_addclause( pSat, Lits, Lits+2 ) )
-                assert( 0 );
-            Lits[0] = toLitCond( pCnfFrames->pVarNums[pObj->Id], 1 );
-            Lits[1] = toLitCond( pCnfAig->pVarNums[pObj2->Id], 0 );
-            if ( !sat_solver_addclause( pSat, Lits, Lits+2 ) )
-                assert( 0 );
-        }
-    }
-    else
-    {
-        Aig_ManForEachPi( pFrames, pObj, i )
-        {
-            if ( i == Aig_ManRegNum(pAig) )
-                break;
-            Vec_IntPush( vVarsAB, pCnfFrames->pVarNums[pObj->Id] );
-
-            pObj2 = Saig_ManLi( pAig, i );
-            Lits[0] = toLitCond( pCnfFrames->pVarNums[pObj->Id], 0 );
-            Lits[1] = toLitCond( pCnfAig->pVarNums[pObj2->Id], 1 );
-            if ( !sat_solver_addclause( pSat, Lits, Lits+2 ) )
-                assert( 0 );
-            Lits[0] = toLitCond( pCnfFrames->pVarNums[pObj->Id], 1 );
-            Lits[1] = toLitCond( pCnfAig->pVarNums[pObj2->Id], 0 );
-            if ( !sat_solver_addclause( pSat, Lits, Lits+2 ) )
-                assert( 0 );
-        }
-    }
-    // add clauses of B
-    sat_solver_store_mark_clauses_a( pSat );
-    for ( i = 0; i < pCnfFrames->nClauses; i++ )
-    {
-        if ( !sat_solver_addclause( pSat, pCnfFrames->pClauses[i], pCnfFrames->pClauses[i+1] ) )
-        {
-            pSat->fSolved = 1;
-            break;
-        }
-    }
-    sat_solver_store_mark_roots( pSat );
-    // return clauses to the original state
-    Cnf_DataLift( pCnfAig, -pCnfFrames->nVars );
-    Cnf_DataLift( pCnfInter, -pCnfFrames->nVars -pCnfAig->nVars );
-    return pSat;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one SAT run with interpolation.]
-
-  Description [Returns 1 if proven. 0 if failed. -1 if undecided.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Inter_ManPerformOneStep( Inter_Man_t * p, int fUseBias, int fUseBackward, int nTimeNewOut )
-{
-    sat_solver * pSat;
-    void * pSatCnf = NULL;
-    Inta_Man_t * pManInterA; 
-//    Intb_Man_t * pManInterB; 
-    int * pGlobalVars;
-    int clk, status, RetValue;
-    int i, Var;
-//    assert( p->pInterNew == NULL );
-
-    // derive the SAT solver
-    pSat = Inter_ManDeriveSatSolver( p->pInter, p->pCnfInter, p->pAigTrans, p->pCnfAig, p->pFrames, p->pCnfFrames, p->vVarsAB, fUseBackward );
-    if ( pSat == NULL )
-    {
-        p->pInterNew = NULL;
-        return 1;
-    }
-
-    // set runtime limit
-    if ( nTimeNewOut )
-        sat_solver_set_runtime_limit( pSat, nTimeNewOut );
-
-    // collect global variables
-    pGlobalVars = ABC_CALLOC( int, sat_solver_nvars(pSat) );
-    Vec_IntForEachEntry( p->vVarsAB, Var, i )
-        pGlobalVars[Var] = 1;
-    pSat->pGlobalVars = fUseBias? pGlobalVars : NULL;
-
-    // solve the problem
-clk = clock();
-    status = sat_solver_solve( pSat, NULL, NULL, (ABC_INT64_T)p->nConfLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    p->nConfCur = pSat->stats.conflicts;
-p->timeSat += clock() - clk;
-
-    pSat->pGlobalVars = NULL;
-    ABC_FREE( pGlobalVars );
-    if ( status == l_False )
-    {
-        pSatCnf = sat_solver_store_release( pSat );
-        RetValue = 1;
-    }
-    else if ( status == l_True )
-    {
-        RetValue = 0;
-    } 
-    else
-    {
-        RetValue = -1;
-    }
-    sat_solver_delete( pSat );
-    if ( pSatCnf == NULL )
-        return RetValue;
-
-    // create the resulting manager
-clk = clock();
-/*
-    if ( !fUseIp )
-    {
-        pManInterA = Inta_ManAlloc();
-        p->pInterNew = Inta_ManInterpolate( pManInterA, pSatCnf, p->vVarsAB, 0 );
-        Inta_ManFree( pManInterA );
-    }
-    else
-    {
-        Aig_Man_t * pInterNew2;
-        int RetValue;
-
-        pManInterA = Inta_ManAlloc();
-        p->pInterNew = Inta_ManInterpolate( pManInterA, pSatCnf, p->vVarsAB, 0 );
-//        Inter_ManVerifyInterpolant1( pManInterA, pSatCnf, p->pInterNew );
-        Inta_ManFree( pManInterA );
-
-        pManInterB = Intb_ManAlloc();
-        pInterNew2 = Intb_ManInterpolate( pManInterB, pSatCnf, p->vVarsAB, 0 );
-        Inter_ManVerifyInterpolant2( pManInterB, pSatCnf, pInterNew2 );
-        Intb_ManFree( pManInterB );
-
-        // check relationship
-        RetValue = Inter_ManCheckEquivalence( pInterNew2, p->pInterNew );
-        if ( RetValue )
-            printf( "Equivalence \"Ip == Im\" holds\n" );
-        else
-        {
-//            printf( "Equivalence \"Ip == Im\" does not hold\n" );
-            RetValue = Inter_ManCheckContainment( pInterNew2, p->pInterNew );
-            if ( RetValue )
-                printf( "Containment \"Ip -> Im\" holds\n" );
-            else
-                printf( "Containment \"Ip -> Im\" does not hold\n" );
-
-            RetValue = Inter_ManCheckContainment( p->pInterNew, pInterNew2 );
-            if ( RetValue )
-                printf( "Containment \"Im -> Ip\" holds\n" );
-            else
-                printf( "Containment \"Im -> Ip\" does not hold\n" );
-        }
-
-        Aig_ManStop( pInterNew2 );
-    }
-*/
-
-    pManInterA = Inta_ManAlloc();
-    p->pInterNew = (Aig_Man_t *)Inta_ManInterpolate( pManInterA, (Sto_Man_t *)pSatCnf, p->vVarsAB, 0 );
-    Inta_ManFree( pManInterA );
-
-p->timeInt += clock() - clk;
-    Sto_ManFree( (Sto_Man_t *)pSatCnf );
-    return RetValue;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/int/intM114p.c b/src/aig/int/intM114p.c
deleted file mode 100644
index 0ad0552f..00000000
--- a/src/aig/int/intM114p.c
+++ /dev/null
@@ -1,442 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [intM114p.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Interpolation engine.]
-
-  Synopsis    [Intepolation using interfaced to MiniSat-1.14p.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 24, 2008.]
-
-  Revision    [$Id: intM114p.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "intInt.h"
-#include "m114p.h"
-
-#ifdef ABC_USE_LIBRARIES
-
-ABC_NAMESPACE_IMPL_START
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the SAT solver for one interpolation run.]
-
-  Description [pInter is the previous interpolant. pAig is one time frame.
-  pFrames is the unrolled time frames.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-M114p_Solver_t Inter_ManDeriveSatSolverM114p( 
-    Aig_Man_t * pInter, Cnf_Dat_t * pCnfInter, 
-    Aig_Man_t * pAig, Cnf_Dat_t * pCnfAig, 
-    Aig_Man_t * pFrames, Cnf_Dat_t * pCnfFrames, 
-    Vec_Int_t ** pvMapRoots, Vec_Int_t ** pvMapVars )
-{
-    M114p_Solver_t pSat;
-    Aig_Obj_t * pObj, * pObj2;
-    int i, Lits[2];
-
-    // sanity checks
-    assert( Aig_ManRegNum(pInter) == 0 );
-    assert( Aig_ManRegNum(pAig) > 0 );
-    assert( Aig_ManRegNum(pFrames) == 0 );
-    assert( Aig_ManPoNum(pInter) == 1 );
-    assert( Aig_ManPoNum(pFrames) == 1 );
-    assert( Aig_ManPiNum(pInter) == Aig_ManRegNum(pAig) );
-//    assert( (Aig_ManPiNum(pFrames) - Aig_ManRegNum(pAig)) % Saig_ManPiNum(pAig) == 0 );
-
-    // prepare CNFs
-    Cnf_DataLift( pCnfAig,   pCnfFrames->nVars );
-    Cnf_DataLift( pCnfInter, pCnfFrames->nVars + pCnfAig->nVars );
-
-    *pvMapRoots = Vec_IntAlloc( 10000 );
-    *pvMapVars = Vec_IntAlloc( 0 );
-    Vec_IntFill( *pvMapVars, pCnfInter->nVars + pCnfAig->nVars + pCnfFrames->nVars, -1 );
-    for ( i = 0; i < pCnfFrames->nVars; i++ )
-        Vec_IntWriteEntry( *pvMapVars, i, -2 );
-
-    // start the solver
-    pSat = M114p_SolverNew( 1 );
-    M114p_SolverSetVarNum( pSat, pCnfInter->nVars + pCnfAig->nVars + pCnfFrames->nVars );
-
-    // add clauses of A
-    // interpolant
-    for ( i = 0; i < pCnfInter->nClauses; i++ )
-    {
-        Vec_IntPush( *pvMapRoots, 0 );
-        if ( !M114p_SolverAddClause( pSat, pCnfInter->pClauses[i], pCnfInter->pClauses[i+1] ) )
-            assert( 0 );
-    }
-    // connector clauses
-    Aig_ManForEachPi( pInter, pObj, i )
-    {
-        pObj2 = Saig_ManLo( pAig, i );
-        Lits[0] = toLitCond( pCnfInter->pVarNums[pObj->Id], 0 );
-        Lits[1] = toLitCond( pCnfAig->pVarNums[pObj2->Id], 1 );
-        Vec_IntPush( *pvMapRoots, 0 );
-        if ( !M114p_SolverAddClause( pSat, Lits, Lits+2 ) )
-            assert( 0 );
-        Lits[0] = toLitCond( pCnfInter->pVarNums[pObj->Id], 1 );
-        Lits[1] = toLitCond( pCnfAig->pVarNums[pObj2->Id], 0 );
-        Vec_IntPush( *pvMapRoots, 0 );
-        if ( !M114p_SolverAddClause( pSat, Lits, Lits+2 ) )
-            assert( 0 );
-    }
-    // one timeframe
-    for ( i = 0; i < pCnfAig->nClauses; i++ )
-    {
-        Vec_IntPush( *pvMapRoots, 0 );
-        if ( !M114p_SolverAddClause( pSat, pCnfAig->pClauses[i], pCnfAig->pClauses[i+1] ) )
-            assert( 0 );
-    }
-    // connector clauses
-    Aig_ManForEachPi( pFrames, pObj, i )
-    { 
-        if ( i == Aig_ManRegNum(pAig) )
-            break;
-//        Vec_IntPush( vVarsAB, pCnfFrames->pVarNums[pObj->Id] );
-        Vec_IntWriteEntry( *pvMapVars, pCnfFrames->pVarNums[pObj->Id], i );
-
-        pObj2 = Saig_ManLi( pAig, i );
-        Lits[0] = toLitCond( pCnfFrames->pVarNums[pObj->Id], 0 );
-        Lits[1] = toLitCond( pCnfAig->pVarNums[pObj2->Id], 1 );
-        Vec_IntPush( *pvMapRoots, 0 );
-        if ( !M114p_SolverAddClause( pSat, Lits, Lits+2 ) )
-            assert( 0 );
-        Lits[0] = toLitCond( pCnfFrames->pVarNums[pObj->Id], 1 );
-        Lits[1] = toLitCond( pCnfAig->pVarNums[pObj2->Id], 0 );
-        Vec_IntPush( *pvMapRoots, 0 );
-        if ( !M114p_SolverAddClause( pSat, Lits, Lits+2 ) )
-            assert( 0 );
-    }
-    // add clauses of B
-    for ( i = 0; i < pCnfFrames->nClauses; i++ )
-    {
-        Vec_IntPush( *pvMapRoots, 1 );
-        if ( !M114p_SolverAddClause( pSat, pCnfFrames->pClauses[i], pCnfFrames->pClauses[i+1] ) )
-        {
-//            assert( 0 );
-            break;
-        }
-    }
-    // return clauses to the original state
-    Cnf_DataLift( pCnfAig, -pCnfFrames->nVars );
-    Cnf_DataLift( pCnfInter, -pCnfFrames->nVars -pCnfAig->nVars );
-    return pSat;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one resolution step.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Inter_ManResolveM114p( Vec_Int_t * vResolvent, int * pLits, int nLits, int iVar )
-{
-    int i, k, iLit = -1, fFound = 0;
-    // find the variable in the clause
-    for ( i = 0; i < vResolvent->nSize; i++ )
-        if ( lit_var(vResolvent->pArray[i]) == iVar )
-        {
-            iLit = vResolvent->pArray[i];
-            vResolvent->pArray[i] = vResolvent->pArray[--vResolvent->nSize];
-            break;
-        }
-    assert( iLit != -1 );
-    // add other variables
-    for ( i = 0; i < nLits; i++ )
-    {
-        if ( lit_var(pLits[i]) == iVar )
-        {
-            assert( iLit == lit_neg(pLits[i]) );
-            fFound = 1;
-            continue;
-        }
-        // check if this literal appears
-        for ( k = 0; k < vResolvent->nSize; k++ )
-            if ( vResolvent->pArray[k] == pLits[i] )
-                break;
-        if ( k < vResolvent->nSize )
-            continue;
-        // add this literal
-        Vec_IntPush( vResolvent, pLits[i] );
-    }
-    assert( fFound );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes interpolant using MiniSat-1.14p.]
-
-  Description [Assumes that the solver returned UNSAT and proof
-  logging was enabled. Array vMapRoots maps number of each root clause 
-  into 0 (clause of A) or 1 (clause of B). Array vMapVars maps each SAT
-  solver variable into -1 (var of A), -2 (var of B), and <num> (var of C),
-  where <num> is the var's 0-based number in the ordering of C variables.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Inter_ManInterpolateM114pPudlak( M114p_Solver_t s, Vec_Int_t * vMapRoots, Vec_Int_t * vMapVars )
-{
-    Aig_Man_t * p;
-    Aig_Obj_t * pInter, * pInter2, * pVar;
-    Vec_Ptr_t * vInters;
-    Vec_Int_t * vLiterals, * vClauses, * vResolvent;
-    int * pLitsNext, nLitsNext, nOffset, iLit;
-    int * pLits, * pClauses, * pVars;
-    int nLits, nVars, i, k, v, iVar;
-    assert( M114p_SolverProofIsReady(s) );
-    vInters = Vec_PtrAlloc( 1000 );
-
-    vLiterals = Vec_IntAlloc( 10000 );
-    vClauses = Vec_IntAlloc( 1000 );
-    vResolvent = Vec_IntAlloc( 100 );
-
-    // create elementary variables
-    p = Aig_ManStart( 10000 );
-    Vec_IntForEachEntry( vMapVars, iVar, i )
-        if ( iVar >= 0 )
-            Aig_IthVar(p, iVar);
-    // process root clauses
-    M114p_SolverForEachRoot( s, &pLits, nLits, i )
-    {
-        if ( Vec_IntEntry(vMapRoots, i) == 1 ) // clause of B
-            pInter = Aig_ManConst1(p);
-        else // clause of A
-            pInter = Aig_ManConst0(p);
-        Vec_PtrPush( vInters, pInter );
-
-        // save the root clause
-        Vec_IntPush( vClauses, Vec_IntSize(vLiterals) );
-        Vec_IntPush( vLiterals, nLits );
-        for ( v = 0; v < nLits; v++ )
-            Vec_IntPush( vLiterals, pLits[v] );
-    }
-    assert( Vec_PtrSize(vInters) == Vec_IntSize(vMapRoots) );
-
-    // process learned clauses
-    M114p_SolverForEachChain( s, &pClauses, &pVars, nVars, i )
-    {
-        pInter = Vec_PtrEntry( vInters, pClauses[0] );
-
-        // initialize the resolvent
-        nOffset = Vec_IntEntry( vClauses, pClauses[0] );
-        nLitsNext = Vec_IntEntry( vLiterals, nOffset );
-        pLitsNext = Vec_IntArray(vLiterals) + nOffset + 1;
-        Vec_IntClear( vResolvent );
-        for ( v = 0; v < nLitsNext; v++ )
-            Vec_IntPush( vResolvent, pLitsNext[v] );
-
-        for ( k = 0; k < nVars; k++ )
-        {
-            iVar = Vec_IntEntry( vMapVars, pVars[k] );
-            pInter2 = Vec_PtrEntry( vInters, pClauses[k+1] );
-
-            // resolve it with the next clause
-            nOffset = Vec_IntEntry( vClauses, pClauses[k+1] );
-            nLitsNext = Vec_IntEntry( vLiterals, nOffset );
-            pLitsNext = Vec_IntArray(vLiterals) + nOffset + 1;
-            Inter_ManResolveM114p( vResolvent, pLitsNext, nLitsNext, pVars[k] );
-
-            if ( iVar == -1 ) // var of A
-                pInter = Aig_Or( p, pInter, pInter2 );
-            else if ( iVar == -2 ) // var of B
-                pInter = Aig_And( p, pInter, pInter2 );
-            else // var of C
-            {
-                // check polarity of the pivot variable in the clause
-                for ( v = 0; v < nLitsNext; v++ )
-                    if ( lit_var(pLitsNext[v]) == pVars[k] )
-                        break;
-                assert( v < nLitsNext );
-                pVar = Aig_NotCond( Aig_IthVar(p, iVar), lit_sign(pLitsNext[v]) );
-                pInter = Aig_Mux( p, pVar, pInter, pInter2 );
-            }
-        }
-        Vec_PtrPush( vInters, pInter );
-
-        // store the resulting clause
-        Vec_IntPush( vClauses, Vec_IntSize(vLiterals) );
-        Vec_IntPush( vLiterals, Vec_IntSize(vResolvent) );
-        Vec_IntForEachEntry( vResolvent, iLit, v )
-            Vec_IntPush( vLiterals, iLit );
-    }
-    assert( Vec_PtrSize(vInters) == M114p_SolverProofClauseNum(s) );
-    assert( Vec_IntSize(vResolvent) == 0 ); // the empty clause
-    Vec_PtrFree( vInters );
-    Vec_IntFree( vLiterals );
-    Vec_IntFree( vClauses );
-    Vec_IntFree( vResolvent );
-    Aig_ObjCreatePo( p, pInter );
-    Aig_ManCleanup( p );
-    return p;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Computes interpolant using MiniSat-1.14p.]
-
-  Description [Assumes that the solver returned UNSAT and proof
-  logging was enabled. Array vMapRoots maps number of each root clause 
-  into 0 (clause of A) or 1 (clause of B). Array vMapVars maps each SAT
-  solver variable into -1 (var of A), -2 (var of B), and <num> (var of C),
-  where <num> is the var's 0-based number in the ordering of C variables.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Inter_ManpInterpolateM114( M114p_Solver_t s, Vec_Int_t * vMapRoots, Vec_Int_t * vMapVars )
-{
-    Aig_Man_t * p;
-    Aig_Obj_t * pInter, * pInter2, * pVar;
-    Vec_Ptr_t * vInters;
-    int * pLits, * pClauses, * pVars;
-    int nLits, nVars, i, k, iVar;
-    int nClauses;
-
-    nClauses = M114p_SolverProofClauseNum(s);
-
-    assert( M114p_SolverProofIsReady(s) );
-
-    vInters = Vec_PtrAlloc( 1000 );
-    // process root clauses
-    p = Aig_ManStart( 10000 );
-    M114p_SolverForEachRoot( s, &pLits, nLits, i )
-    {
-        if ( Vec_IntEntry(vMapRoots, i) == 1 ) // clause of B
-            pInter = Aig_ManConst1(p);
-        else // clause of A
-        {
-            pInter = Aig_ManConst0(p);
-            for ( k = 0; k < nLits; k++ )
-            {
-                iVar = Vec_IntEntry( vMapVars, lit_var(pLits[k]) );
-                if ( iVar < 0 ) // var of A or B
-                    continue;
-                // this is a variable of C
-                pVar = Aig_NotCond( Aig_IthVar(p, iVar), lit_sign(pLits[k]) );
-                pInter = Aig_Or( p, pInter, pVar );
-            }
-        }
-        Vec_PtrPush( vInters, pInter );
-    } 
-//    assert( Vec_PtrSize(vInters) == Vec_IntSize(vMapRoots) );
-
-    // process learned clauses
-    M114p_SolverForEachChain( s, &pClauses, &pVars, nVars, i )
-    {
-        pInter = Vec_PtrEntry( vInters, pClauses[0] );
-        for ( k = 0; k < nVars; k++ )
-        {
-            iVar = Vec_IntEntry( vMapVars, pVars[k] );
-            pInter2 = Vec_PtrEntry( vInters, pClauses[k+1] );
-            if ( iVar == -1 ) // var of A
-                pInter = Aig_Or( p, pInter, pInter2 );
-            else // var of B or C
-                pInter = Aig_And( p, pInter, pInter2 );
-        }
-        Vec_PtrPush( vInters, pInter );
-    }
-
-    assert( Vec_PtrSize(vInters) == M114p_SolverProofClauseNum(s) );
-    Vec_PtrFree( vInters );
-    Aig_ObjCreatePo( p, pInter );
-    Aig_ManCleanup( p );
-    assert( Aig_ManCheck(p) );
-    return p;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one SAT run with interpolation.]
-
-  Description [Returns 1 if proven. 0 if failed. -1 if undecided.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Inter_ManPerformOneStepM114p( Inter_Man_t * p, int fUsePudlak, int fUseOther )
-{
-    M114p_Solver_t pSat;
-    Vec_Int_t * vMapRoots, * vMapVars;
-    int clk, status, RetValue;
-    assert( p->pInterNew == NULL );
-    // derive the SAT solver
-    pSat = Inter_ManDeriveSatSolverM114p( p->pInter, p->pCnfInter, 
-        p->pAigTrans, p->pCnfAig, p->pFrames, p->pCnfFrames, 
-        &vMapRoots, &vMapVars );
-    // solve the problem
-clk = clock();
-    status = M114p_SolverSolve( pSat, NULL, NULL, 0 );
-    p->nConfCur = M114p_SolverGetConflictNum( pSat );
-p->timeSat += clock() - clk;
-    if ( status == 0 )
-    {
-        RetValue = 1;
-//        Inter_ManpInterpolateM114Report( pSat, vMapRoots, vMapVars );
-
-clk = clock();
-        if ( fUsePudlak )
-            p->pInterNew = Inter_ManInterpolateM114pPudlak( pSat, vMapRoots, vMapVars );
-        else
-            p->pInterNew = Inter_ManpInterpolateM114( pSat, vMapRoots, vMapVars );
-p->timeInt += clock() - clk;
-    }
-    else if ( status == 1 )
-    {
-        RetValue = 0;
-    }
-    else
-    {
-        RetValue = -1;
-    }
-    M114p_SolverDelete( pSat );
-    Vec_IntFree( vMapRoots );
-    Vec_IntFree( vMapVars );
-    return RetValue;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-ABC_NAMESPACE_IMPL_END
-
-#endif
-
-
diff --git a/src/aig/int/intMan.c b/src/aig/int/intMan.c
deleted file mode 100644
index d6219f6b..00000000
--- a/src/aig/int/intMan.c
+++ /dev/null
@@ -1,163 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [intMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Interpolation engine.]
-
-  Synopsis    [Interpolation manager procedures.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 24, 2008.]
-
-  Revision    [$Id: intMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "intInt.h"
-#include "ioa.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the interpolation manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Inter_Man_t * Inter_ManCreate( Aig_Man_t * pAig, Inter_ManParams_t * pPars )
-{
-    Inter_Man_t * p;
-    // create interpolation manager
-    p = ABC_ALLOC( Inter_Man_t, 1 );
-    memset( p, 0, sizeof(Inter_Man_t) );
-    p->vVarsAB = Vec_IntAlloc( Aig_ManRegNum(pAig) );
-    p->nConfLimit = pPars->nBTLimit;
-    p->fVerbose = pPars->fVerbose;
-    p->pAig = pAig;
-    if ( pPars->fDropInvar )
-        p->vInters = Vec_PtrAlloc( 100 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Cleans the interpolation manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Inter_ManClean( Inter_Man_t * p )
-{
-    if ( p->vInters )
-    {
-        Aig_Man_t * pMan;
-        int i;
-        Vec_PtrForEachEntry( Aig_Man_t *, p->vInters, pMan, i )
-            Aig_ManStop( pMan );
-        Vec_PtrClear( p->vInters );
-    }
-    if ( p->pCnfInter )
-        Cnf_DataFree( p->pCnfInter );
-    if ( p->pCnfFrames )
-        Cnf_DataFree( p->pCnfFrames );
-    if ( p->pInter )
-        Aig_ManStop( p->pInter );
-    if ( p->pFrames )
-        Aig_ManStop( p->pFrames );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes interpolant into a file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Inter_ManInterDump( Inter_Man_t * p, int fProved )
-{
-    Aig_Man_t * pMan;
-    pMan = Aig_ManDupArray( p->vInters );
-    Ioa_WriteAiger( pMan, "invar.aig", 0, 0 );
-    Aig_ManStop( pMan );
-    if ( fProved )
-        printf( "Inductive invariant is dumped into file \"invar.aig\".\n" );
-    else
-        printf( "Interpolants are dumped into file \"inter.aig\".\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Frees the interpolation manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Inter_ManStop( Inter_Man_t * p, int fProved )
-{
-    if ( p->fVerbose )
-    {
-        p->timeOther = p->timeTotal-p->timeRwr-p->timeCnf-p->timeSat-p->timeInt-p->timeEqu;
-        printf( "Runtime statistics:\n" );
-        ABC_PRTP( "Rewriting  ", p->timeRwr,   p->timeTotal );
-        ABC_PRTP( "CNF mapping", p->timeCnf,   p->timeTotal );
-        ABC_PRTP( "SAT solving", p->timeSat,   p->timeTotal );
-        ABC_PRTP( "Interpol   ", p->timeInt,   p->timeTotal );
-        ABC_PRTP( "Containment", p->timeEqu,   p->timeTotal );
-        ABC_PRTP( "Other      ", p->timeOther, p->timeTotal );
-        ABC_PRTP( "TOTAL      ", p->timeTotal, p->timeTotal );
-    }
-
-    if ( p->vInters )
-        Inter_ManInterDump( p, fProved );
-
-    if ( p->pCnfAig )
-        Cnf_DataFree( p->pCnfAig );
-    if ( p->pAigTrans )
-        Aig_ManStop( p->pAigTrans );
-    if ( p->pInterNew )
-        Aig_ManStop( p->pInterNew );
-    Inter_ManClean( p );
-    Vec_PtrFreeP( &p->vInters );
-    Vec_IntFreeP( &p->vVarsAB );
-    ABC_FREE( p );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/int/intUtil.c b/src/aig/int/intUtil.c
deleted file mode 100644
index ce48c37d..00000000
--- a/src/aig/int/intUtil.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [intUtil.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Interpolation engine.]
-
-  Synopsis    [Various interpolation utilities.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 24, 2008.]
-
-  Revision    [$Id: intUtil.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "intInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the property fails in the initial state.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Inter_ManCheckInitialState( Aig_Man_t * p )
-{
-    Cnf_Dat_t * pCnf;
-    Aig_Obj_t * pObj;
-    sat_solver * pSat;
-    int i, status;
-    int clk = clock();
-    pCnf = Cnf_Derive( p, Saig_ManRegNum(p) ); 
-    pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, 1, 1 );
-    if ( pSat == NULL )
-    {
-        Cnf_DataFree( pCnf );
-        return 0;
-    }
-    status = sat_solver_solve( pSat, NULL, NULL, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    ABC_PRT( "Time", clock() - clk );
-    if ( status == l_True )
-    {
-        p->pSeqModel = Abc_CexAlloc( Aig_ManRegNum(p), Saig_ManPiNum(p), 1 );
-        Saig_ManForEachPi( p, pObj, i )
-            if ( sat_solver_var_value( pSat, pCnf->pVarNums[Aig_ObjId(pObj)] ) )
-                Aig_InfoSetBit( p->pSeqModel->pData, Aig_ManRegNum(p) + i );
-    }
-    Cnf_DataFree( pCnf );
-    sat_solver_delete( pSat );
-    return status == l_True;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the property holds in all states.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Inter_ManCheckAllStates( Aig_Man_t * p )
-{
-    Cnf_Dat_t * pCnf;
-    sat_solver * pSat;
-    int status;
-    int clk = clock();
-    pCnf = Cnf_Derive( p, Saig_ManRegNum(p) ); 
-    pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
-    Cnf_DataFree( pCnf );
-    if ( pSat == NULL )
-        return 1;
-    status = sat_solver_solve( pSat, NULL, NULL, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    sat_solver_delete( pSat );
-    ABC_PRT( "Time", clock() - clk );
-    return status == l_False;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/int/module.make b/src/aig/int/module.make
deleted file mode 100644
index 8e0e4319..00000000
--- a/src/aig/int/module.make
+++ /dev/null
@@ -1,11 +0,0 @@
-SRC +=    src/aig/int/intCheck.c \
-    src/aig/int/intContain.c \
-    src/aig/int/intCore.c \
-    src/aig/int/intCtrex.c \
-    src/aig/int/intDup.c \
-    src/aig/int/intFrames.c \
-    src/aig/int/intInter.c \
-    src/aig/int/intM114.c \
-    src/aig/int/intM114p.c \
-    src/aig/int/intMan.c \
-    src/aig/int/intUtil.c
diff --git a/src/aig/ioa/ioa.h b/src/aig/ioa/ioa.h
index 46dbda09..b86bc13a 100644
--- a/src/aig/ioa/ioa.h
+++ b/src/aig/ioa/ioa.h
@@ -18,8 +18,8 @@
 
 ***********************************************************************/
 
-#ifndef __IOA_H__
-#define __IOA_H__
+#ifndef ABC__aig__ioa__ioa_h
+#define ABC__aig__ioa__ioa_h
 
 
 ////////////////////////////////////////////////////////////////////////
@@ -32,9 +32,9 @@
 #include <assert.h>
 #include <time.h>
 
-#include "vec.h"
+#include "src/misc/vec/vec.h"
 //#include "bar.h"
-#include "aig.h"
+#include "src/aig/aig/aig.h"
 
 ////////////////////////////////////////////////////////////////////////
 ///                         PARAMETERS                               ///
diff --git a/src/aig/ioa/ioaReadAig.c b/src/aig/ioa/ioaReadAig.c
index 17c93e58..a1f09edf 100644
--- a/src/aig/ioa/ioaReadAig.c
+++ b/src/aig/ioa/ioaReadAig.c
@@ -392,7 +392,7 @@ Aig_Man_t * Ioa_ReadAigerFromMemory( char * pContents, int nFileSize, int fCheck
             pCur++;
             // read model name
             ABC_FREE( pNew->pName );
-            pNew->pName = Aig_UtilStrsav( pCur );
+            pNew->pName = Abc_UtilStrsav( pCur );
         }
     }
 
@@ -447,7 +447,7 @@ Aig_Man_t * Ioa_ReadAiger( char * pFileName, int fCheck )
     if ( pNew )
     {
         pName = Ioa_FileNameGeneric( pFileName );
-        pNew->pName = Aig_UtilStrsav( pName );
+        pNew->pName = Abc_UtilStrsav( pName );
 //        pNew->pSpec = Ioa_UtilStrsav( pFileName );
         ABC_FREE( pName );
     }
diff --git a/src/aig/ioa/ioaUtil.c b/src/aig/ioa/ioaUtil.c
index 06034956..a2748382 100644
--- a/src/aig/ioa/ioaUtil.c
+++ b/src/aig/ioa/ioaUtil.c
@@ -73,7 +73,7 @@ int Ioa_FileSize( char * pFileName )
 char * Ioa_FileNameGeneric( char * FileName )
 {
     char * pDot, * pRes;
-    pRes = Aig_UtilStrsav( FileName );
+    pRes = Abc_UtilStrsav( FileName );
     if ( (pDot = strrchr( pRes, '.' )) )
         *pDot = 0;
     return pRes;
diff --git a/src/aig/ivy/attr.h b/src/aig/ivy/attr.h
index b65906cf..07586832 100644
--- a/src/aig/ivy/attr.h
+++ b/src/aig/ivy/attr.h
@@ -18,15 +18,15 @@
 
 ***********************************************************************/
  
-#ifndef __ATTR_H__
-#define __ATTR_H__
+#ifndef ABC__aig__ivy__attr_h
+#define ABC__aig__ivy__attr_h
 
 
 ////////////////////////////////////////////////////////////////////////
 ///                          INCLUDES                                ///
 ////////////////////////////////////////////////////////////////////////
 
-#include "extra.h"
+#include "misc/extra/extra.h"
 
 ////////////////////////////////////////////////////////////////////////
 ///                         PARAMETERS                               ///
diff --git a/src/aig/ivy/ivy.h b/src/aig/ivy/ivy.h
index 870c0906..8d062134 100644
--- a/src/aig/ivy/ivy.h
+++ b/src/aig/ivy/ivy.h
@@ -18,8 +18,8 @@
 
 ***********************************************************************/
 
-#ifndef __IVY_H__
-#define __IVY_H__
+#ifndef ABC__aig__ivy__ivy_h
+#define ABC__aig__ivy__ivy_h
 
 
 ////////////////////////////////////////////////////////////////////////
@@ -27,8 +27,8 @@
 ////////////////////////////////////////////////////////////////////////
 
 #include <stdio.h>
-#include "extra.h"
-#include "vec.h"
+#include "src/misc/extra/extra.h"
+#include "src/misc/vec/vec.h"
 
 ////////////////////////////////////////////////////////////////////////
 ///                         PARAMETERS                               ///
diff --git a/src/aig/ivy/ivyFraig.c b/src/aig/ivy/ivyFraig.c
index 7cf97132..2bc6f0de 100644
--- a/src/aig/ivy/ivyFraig.c
+++ b/src/aig/ivy/ivyFraig.c
@@ -18,8 +18,10 @@
 
 ***********************************************************************/
 
-#include "satSolver.h"
-#include "extra.h"
+#include <math.h>
+
+#include "src/sat/bsat/satSolver.h"
+#include "src/misc/extra/extra.h"
 #include "ivy.h"
 
 ABC_NAMESPACE_IMPL_START
@@ -2649,7 +2651,7 @@ p->timeTrav += clock() - clk;
 
 ABC_NAMESPACE_IMPL_END
 
-#include "cuddInt.h"
+#include "src/bdd/cudd/cuddInt.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -2807,7 +2809,7 @@ int Ivy_FraigNodesAreEquivBdd( Ivy_Obj_t * pObj1, Ivy_Obj_t * pObj2 )
 
 ABC_NAMESPACE_IMPL_END
 
-#include "aig.h"
+#include "src/aig/aig/aig.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/ivy/ivyRwr.c b/src/aig/ivy/ivyRwr.c
index 4e79e87f..39131210 100644
--- a/src/aig/ivy/ivyRwr.c
+++ b/src/aig/ivy/ivyRwr.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "ivy.h"
-#include "deco.h"
-#include "rwt.h"
+#include "src/bool/deco/deco.h"
+#include "src/opt/rwt/rwt.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/ivy/ivySeq.c b/src/aig/ivy/ivySeq.c
index 7f9674ac..283bf9fe 100644
--- a/src/aig/ivy/ivySeq.c
+++ b/src/aig/ivy/ivySeq.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "ivy.h"
-#include "deco.h"
-#include "rwt.h"
+#include "src/bool/deco/deco.h"
+#include "src/opt/rwt/rwt.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/ivy/ivyTable.c b/src/aig/ivy/ivyTable.c
index 0fe5c7ba..d2c1ab9a 100644
--- a/src/aig/ivy/ivyTable.c
+++ b/src/aig/ivy/ivyTable.c
@@ -212,7 +212,7 @@ clk = clock();
     pTableOld = p->pTable;
     nTableSizeOld = p->nTableSize;
     // get the new table
-    p->nTableSize = Cudd_PrimeAig( 5 * Ivy_ManHashObjNum(p) ); 
+    p->nTableSize = Abc_PrimeCudd( 5 * Ivy_ManHashObjNum(p) ); 
     p->pTable = ABC_ALLOC( int, p->nTableSize );
     memset( p->pTable, 0, sizeof(int) * p->nTableSize );
     // rehash the entries from the old table
@@ -261,41 +261,6 @@ void Ivy_TableProfile( Ivy_Man_t * p )
     }
 }
 
-/**Function********************************************************************
-
-  Synopsis    [Returns the next prime &gt;= p.]
-
-  Description [Copied from CUDD, for stand-aloneness.]
-
-  SideEffects [None]
-
-  SeeAlso     []
-
-******************************************************************************/
-unsigned int Cudd_PrimeAig( unsigned int  p)
-{
-    int i,pn;
-
-    p--;
-    do {
-        p++;
-        if (p&1) {
-        pn = 1;
-        i = 3;
-        while ((unsigned) (i * i) <= p) {
-        if (p % i == 0) {
-            pn = 0;
-            break;
-        }
-        i += 2;
-        }
-    } else {
-        pn = 0;
-    }
-    } while (!pn);
-    return(p);
-
-} /* end of Cudd_Prime */
 
 ////////////////////////////////////////////////////////////////////////
 ///                       END OF FILE                                ///
diff --git a/src/aig/kit/cloud.c b/src/aig/kit/cloud.c
deleted file mode 100644
index fd372970..00000000
--- a/src/aig/kit/cloud.c
+++ /dev/null
@@ -1,992 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cloudCore.c]
-
-  PackageName [Fast application-specific BDD package.]
-
-  Synopsis    [The package core.]
-
-  Author      [Alan Mishchenko <alanmi@ece.pdx.edu>]
-  
-  Affiliation [ECE Department. Portland State University, Portland, Oregon.]
-
-  Date        [Ver. 1.0. Started - June 10, 2002.]
-
-  Revision    [$Id: cloudCore.c,v 1.0 2002/06/10 03:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "cloud.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-// the number of operators using cache
-static int CacheOperNum = 4;
-
-// the ratio of cache size to the unique table size for each operator
-static int CacheLogRatioDefault[4] = {
-    2, // CLOUD_OPER_AND, 
-    8, // CLOUD_OPER_XOR, 
-    8, // CLOUD_OPER_BDIFF, 
-    8  // CLOUD_OPER_LEQ 
-};
-
-// the ratio of cache size to the unique table size for each operator
-static int CacheSize[4] = {
-    2, // CLOUD_OPER_AND, 
-    2, // CLOUD_OPER_XOR, 
-    2, // CLOUD_OPER_BDIFF, 
-    2  // CLOUD_OPER_LEQ 
-};
-
-////////////////////////////////////////////////////////////////////////
-///                       FUNCTION DECLARATIONS                      ///
-////////////////////////////////////////////////////////////////////////
-
-// static functions
-static CloudNode * cloudMakeNode( CloudManager * dd, CloudVar v, CloudNode * t, CloudNode * e );
-static void        cloudCacheAllocate( CloudManager * dd, CloudOper oper );
-
-////////////////////////////////////////////////////////////////////////
-///                       FUNCTION DEFINITIONS                       ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function********************************************************************
-
-  Synopsis    [Starts the cloud manager.]
-
-  Description [The first arguments is the number of elementary variables used.
-  The second arguments is the number of bits of the unsigned integer used to 
-  represent nodes in the unique table. If the second argument is 0, the package 
-  assumes 23 to represent nodes, which is equivalent to 2^23 = 8,388,608 nodes.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-CloudManager * Cloud_Init( int nVars, int nBits )
-{
-    CloudManager * dd;
-    int i;
-    int clk1, clk2;
-
-    assert( nVars <= 100000 );
-    assert( nBits < 32 );
-
-    // assign the defaults
-    if ( nBits == 0 )
-        nBits = CLOUD_NODE_BITS;
-
-    // start the manager
-    dd = ABC_CALLOC( CloudManager, 1 );
-    dd->nMemUsed          += sizeof(CloudManager);
-
-    // variables
-    dd->nVars             = nVars;              // the number of variables allocated
-    // bits
-    dd->bitsNode          = nBits;              // the number of bits used for the node
-    for ( i = 0; i < CacheOperNum; i++ )
-        dd->bitsCache[i]  = nBits - CacheLogRatioDefault[i];
-    // shifts
-    dd->shiftUnique       = 8*sizeof(unsigned) - (nBits + 1); // gets node index in the hash table
-    for ( i = 0; i < CacheOperNum; i++ )
-        dd->shiftCache[i] = 8*sizeof(unsigned) - dd->bitsCache[i];
-    // nodes
-    dd->nNodesAlloc       = (1 << (nBits + 1)); // 2 ^ (nBits + 1)
-    dd->nNodesLimit       = (1 << nBits);       // 2 ^  nBits
-
-    // unique table
-clk1 = clock();
-    dd->tUnique           = ABC_CALLOC( CloudNode, dd->nNodesAlloc );
-    dd->nMemUsed         += sizeof(CloudNode) * dd->nNodesAlloc;
-clk2 = clock();
-//ABC_PRT( "calloc() time", clk2 - clk1 ); 
-
-    // set up the constant node (the only node that is not in the hash table)
-    dd->nSignCur          = 1;
-    dd->tUnique[0].s      = dd->nSignCur;
-    dd->tUnique[0].v      = CLOUD_CONST_INDEX;
-    dd->tUnique[0].e      = NULL;
-    dd->tUnique[0].t      = NULL;
-    dd->one               = dd->tUnique;
-    dd->zero              = Cloud_Not(dd->one);
-    dd->nNodesCur         = 1;
-
-    // special nodes
-    dd->pNodeStart        = dd->tUnique + 1;
-    dd->pNodeEnd          = dd->tUnique + dd->nNodesAlloc;
-
-    // set up the elementary variables
-    dd->vars              = ABC_ALLOC( CloudNode *, dd->nVars );
-    dd->nMemUsed         += sizeof(CloudNode *) * dd->nVars;
-    for ( i = 0; i < dd->nVars; i++ )
-        dd->vars[i]   = cloudMakeNode( dd, i, dd->one, dd->zero );
-
-    return dd;
-};
-
-/**Function********************************************************************
-
-  Synopsis    [Stops the cloud manager.]
-
-  Description [The first arguments tells show many elementary variables are used.
-  The second arguments tells how many bits of the unsigned integer are used
-  to represent regular nodes in the unique table.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-void Cloud_Quit( CloudManager * dd )
-{
-    int i;
-    ABC_FREE( dd->ppNodes );
-    ABC_FREE( dd->tUnique ); 
-    ABC_FREE( dd->vars ); 
-    for ( i = 0; i < 4; i++ )
-        ABC_FREE( dd->tCaches[i] );
-    ABC_FREE( dd ); 
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Prepares the manager for another run.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-void Cloud_Restart( CloudManager * dd )
-{
-    int i;
-    assert( dd->one->s == dd->nSignCur );
-    dd->nSignCur++;
-    dd->one->s++;
-    for ( i = 0; i < dd->nVars; i++ )
-        dd->vars[i]->s++;
-    dd->nNodesCur = 1 + dd->nVars;
-}
-
-/**Function********************************************************************
-
-  Synopsis    [This optional function allocates operation cache of the given size.]
-
-  Description [Cache for each operation is allocated independently when the first 
-  operation of the given type is performed. The user can allocate cache of his/her 
-  preferred size by calling Cloud_CacheAllocate before the first operation of the 
-  given type is performed, but this call is optional. Argument "logratio" gives
-  the binary logarithm of the ratio of the size of the unique table to that of cache.
-  For example, if "logratio" is equal to 3, and the unique table will be 2^3=8 times
-  larger than cache; so, if unique table is 2^23 = 8,388,608 nodes, the cache size 
-  will be 2^3=8 times smaller and equal to 2^20 = 1,048,576 entries.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-void Cloud_CacheAllocate( CloudManager * dd, CloudOper oper, int logratio )
-{
-    assert( logratio > 0 );            // cache cannot be larger than the unique table 
-    assert( logratio < dd->bitsNode ); // cache cannot be smaller than 2 entries
-
-    if ( logratio )
-    {
-        dd->bitsCache[oper]  = dd->bitsNode - logratio;
-        dd->shiftCache[oper] = 8*sizeof(unsigned) - dd->bitsCache[oper];
-    }
-    cloudCacheAllocate( dd, oper );
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Internal cache allocation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-void cloudCacheAllocate( CloudManager * dd, CloudOper oper )
-{
-    int nCacheEntries = (1 << dd->bitsCache[oper]);
-
-    if ( CacheSize[oper] == 1 )
-    {
-        dd->tCaches[oper] = (CloudCacheEntry2 *)ABC_CALLOC( CloudCacheEntry1, nCacheEntries );
-        dd->nMemUsed     += sizeof(CloudCacheEntry1) * nCacheEntries;
-    }
-    else if ( CacheSize[oper] == 2 )
-    {
-        dd->tCaches[oper] = (CloudCacheEntry2 *)ABC_CALLOC( CloudCacheEntry2, nCacheEntries );
-        dd->nMemUsed     += sizeof(CloudCacheEntry2) * nCacheEntries;
-    }
-    else if ( CacheSize[oper] == 3 )
-    {
-        dd->tCaches[oper] = (CloudCacheEntry2 *)ABC_CALLOC( CloudCacheEntry3, nCacheEntries );
-        dd->nMemUsed     += sizeof(CloudCacheEntry3) * nCacheEntries;
-    }
-}
-
-
-
-/**Function********************************************************************
-
-  Synopsis    [Returns or creates a new node]
-
-  Description [Checks the unique table for the existance of the node. If the node is 
-  present, returns the node. If the node is absent, creates a new node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-CloudNode * Cloud_MakeNode( CloudManager * dd, CloudVar v, CloudNode * t, CloudNode * e )
-{
-    CloudNode * pRes;
-    CLOUD_ASSERT(t); 
-    CLOUD_ASSERT(e);
-    assert( v < Cloud_V(t) && v < Cloud_V(e) );       // variable should be above in the order
-    if ( Cloud_IsComplement(t) )
-    {
-        pRes = cloudMakeNode( dd, v, Cloud_Not(t), Cloud_Not(e) );
-        if ( pRes != NULL )
-            pRes = Cloud_Not(pRes);            
-    }
-    else
-        pRes = cloudMakeNode( dd, v, t, e );
-    return pRes;
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Returns or creates a new node]
-
-  Description [Checks the unique table for the existance of the node. If the node is 
-  present, returns the node. If the node is absent, creates a new node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-CloudNode * cloudMakeNode( CloudManager * dd, CloudVar v, CloudNode * t, CloudNode * e )
-{
-    CloudNode * entryUnique;
-
-    CLOUD_ASSERT(t); 
-    CLOUD_ASSERT(e);
-
-    assert( ((int)v) >= 0 && ((int)v) < dd->nVars );  // the variable must be in the range
-    assert( v < Cloud_V(t) && v < Cloud_V(e) );       // variable should be above in the order
-    assert( !Cloud_IsComplement(t) );                 // the THEN edge must not be complemented
-
-    // make sure we are not searching for the constant node
-    assert( t && e );
-
-    // get the unique entry
-    entryUnique = dd->tUnique + cloudHashCudd3(v, t, e, dd->shiftUnique);
-    while ( entryUnique->s == dd->nSignCur )
-    {
-        // compare the node
-        if ( entryUnique->v == v && entryUnique->t == t && entryUnique->e == e )
-        { // the node is found
-            dd->nUniqueHits++;
-            return entryUnique;  // returns the node
-        }
-        // increment the hash value modulus the hash table size
-        if ( ++entryUnique - dd->tUnique == dd->nNodesAlloc )
-            entryUnique = dd->tUnique + 1;
-        // increment the number of steps through the table
-        dd->nUniqueSteps++;
-    }
-    dd->nUniqueMisses++;
-
-    // check if the new node can be created
-    if ( ++dd->nNodesCur == dd->nNodesLimit ) 
-    { // initiate the restart
-        printf( "Cloud needs restart!\n" );
-//        fflush( stdout );
-//        exit(1);
-        return NULL;
-    }
-    // create the node
-    entryUnique->s   = dd->nSignCur;
-    entryUnique->v   = v;
-    entryUnique->t   = t;
-    entryUnique->e   = e;
-    return entryUnique;  // returns the node
-}
-
-
-/**Function********************************************************************
-
-  Synopsis    [Performs the AND or two BDDs]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-CloudNode * cloudBddAnd( CloudManager * dd, CloudNode * f, CloudNode * g )
-{
-    CloudNode * F, * G, * r;
-    CloudCacheEntry2 * cacheEntry;
-    CloudNode * fv, * fnv, * gv, * gnv, * t, * e;
-    CloudVar  var;
-
-    assert( f <= g );
-
-    // terminal cases
-    F = Cloud_Regular(f);
-    G = Cloud_Regular(g);
-    if ( F == G )
-    {
-        if ( f == g )
-            return f;
-        else
-            return dd->zero;
-    }
-    if ( F == dd->one )
-    {
-        if ( f == dd->one )
-            return g;
-        else
-            return f;
-    }
-
-    // check cache
-    cacheEntry = dd->tCaches[CLOUD_OPER_AND] + cloudHashCudd2(f, g, dd->shiftCache[CLOUD_OPER_AND]);
-//    cacheEntry = dd->tCaches[CLOUD_OPER_AND] + cloudHashBuddy2(f, g, dd->shiftCache[CLOUD_OPER_AND]);
-    r = cloudCacheLookup2( cacheEntry, dd->nSignCur, f, g );
-    if ( r != NULL )
-    {
-        dd->nCacheHits++;
-        return r;
-    }
-    dd->nCacheMisses++;
-
-
-    // compute cofactors
-    if ( cloudV(F) <= cloudV(G) )
-    {
-        var = cloudV(F);
-        if ( Cloud_IsComplement(f) )
-        {
-            fnv = Cloud_Not(cloudE(F));
-            fv  = Cloud_Not(cloudT(F));
-        }
-        else
-        {
-            fnv = cloudE(F);
-            fv  = cloudT(F);
-        }
-    }
-    else
-    {
-        var = cloudV(G);
-        fv  = fnv = f;
-    }
-
-    if ( cloudV(G) <= cloudV(F) )
-    {
-        if ( Cloud_IsComplement(g) )
-        {
-            gnv = Cloud_Not(cloudE(G));
-            gv  = Cloud_Not(cloudT(G));
-        }
-        else
-        {
-            gnv = cloudE(G);
-            gv  = cloudT(G);
-        }
-    }
-    else
-    {
-        gv = gnv = g;
-    }
-
-    if ( fv <= gv )
-        t = cloudBddAnd( dd, fv, gv );
-    else
-        t = cloudBddAnd( dd, gv, fv );
-
-    if ( t == NULL )
-        return NULL;
-
-    if ( fnv <= gnv )
-        e = cloudBddAnd( dd, fnv, gnv );
-    else
-        e = cloudBddAnd( dd, gnv, fnv );
-
-    if ( e == NULL )
-        return NULL;
-
-    if ( t == e )
-        r = t;
-    else
-    {
-        if ( Cloud_IsComplement(t) )
-        {
-            r = cloudMakeNode( dd, var, Cloud_Not(t), Cloud_Not(e) );
-            if ( r == NULL )
-                return NULL;
-            r = Cloud_Not(r);
-        }
-        else
-        {
-            r = cloudMakeNode( dd, var, t, e );
-            if ( r == NULL )
-                return NULL;
-        }
-    }
-    cloudCacheInsert2( cacheEntry, dd->nSignCur, f, g, r );
-    return r;
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Performs the AND or two BDDs]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-static inline CloudNode * cloudBddAnd_gate( CloudManager * dd, CloudNode * f, CloudNode * g )
-{
-    if ( f <= g )
-        return cloudBddAnd(dd,f,g);
-    else
-        return cloudBddAnd(dd,g,f);
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Performs the AND or two BDDs]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-CloudNode * Cloud_bddAnd( CloudManager * dd, CloudNode * f, CloudNode * g )
-{
-    if ( Cloud_Regular(f) == NULL || Cloud_Regular(g) == NULL )
-        return NULL;
-    CLOUD_ASSERT(f);
-    CLOUD_ASSERT(g);
-    if ( dd->tCaches[CLOUD_OPER_AND] == NULL )
-        cloudCacheAllocate( dd, CLOUD_OPER_AND );
-    return cloudBddAnd_gate( dd, f, g );
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Performs the OR or two BDDs]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-CloudNode * Cloud_bddOr( CloudManager * dd, CloudNode * f, CloudNode * g )
-{
-    CloudNode * res;
-    if ( Cloud_Regular(f) == NULL || Cloud_Regular(g) == NULL )
-        return NULL;
-    CLOUD_ASSERT(f);
-    CLOUD_ASSERT(g);
-    if ( dd->tCaches[CLOUD_OPER_AND] == NULL )
-        cloudCacheAllocate( dd, CLOUD_OPER_AND );
-    res = cloudBddAnd_gate( dd, Cloud_Not(f), Cloud_Not(g) );
-    res = Cloud_NotCond( res, res != NULL );
-    return res;
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Performs the XOR or two BDDs]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-CloudNode * Cloud_bddXor( CloudManager * dd, CloudNode * f, CloudNode * g )
-{
-    CloudNode * t0, * t1, * r;
-    if ( Cloud_Regular(f) == NULL || Cloud_Regular(g) == NULL )
-        return NULL;
-    CLOUD_ASSERT(f);
-    CLOUD_ASSERT(g);
-    if ( dd->tCaches[CLOUD_OPER_AND] == NULL )
-        cloudCacheAllocate( dd, CLOUD_OPER_AND );
-    t0 = cloudBddAnd_gate( dd, f, Cloud_Not(g) );
-    if ( t0 == NULL )
-        return NULL;
-    t1 = cloudBddAnd_gate( dd, Cloud_Not(f), g );
-    if ( t1 == NULL )
-        return NULL;
-    r  = Cloud_bddOr( dd, t0, t1 );
-    return r;
-}
-
-
-
-/**Function********************************************************************
-
-  Synopsis    [Performs a DFS from f, clearing the LSB of the next
-  pointers.]
-
-  Description []
-
-  SideEffects [None]
-
-  SeeAlso     [cloudSupport cloudDagSize]
-
-******************************************************************************/
-static void cloudClearMark( CloudManager * dd, CloudNode * n )
-{
-    if ( !cloudNodeIsMarked(n) )
-        return;
-    // clear visited flag
-    cloudNodeUnmark(n);
-    if ( cloudIsConstant(n) )
-        return;
-    cloudClearMark( dd, cloudT(n) );
-    cloudClearMark( dd, Cloud_Regular(cloudE(n)) );
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Performs the recursive step of Cloud_Support.]
-
-  Description [Performs the recursive step of Cloud_Support. Performs a
-  DFS from f. The support is accumulated in supp as a side effect. Uses
-  the LSB of the then pointer as visited flag.]
-
-  SideEffects [None]
-
-  SeeAlso     []
-
-******************************************************************************/
-static void cloudSupport( CloudManager * dd, CloudNode * n, int * support )
-{
-    if ( cloudIsConstant(n) || cloudNodeIsMarked(n) )
-        return;
-    // set visited flag
-    cloudNodeMark(n);
-    support[cloudV(n)] = 1;
-    cloudSupport( dd, cloudT(n), support );
-    cloudSupport( dd, Cloud_Regular(cloudE(n)), support );
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Finds the variables on which a DD depends.]
-
-  Description [Finds the variables on which a DD depends.
-  Returns a BDD consisting of the product of the variables if
-  successful; NULL otherwise.]
-
-  SideEffects [None]
-
-  SeeAlso     []
-
-******************************************************************************/
-CloudNode * Cloud_Support( CloudManager * dd, CloudNode * n )
-{
-    CloudNode * res;
-    int * support, i;
-
-    CLOUD_ASSERT(n);
-
-    // allocate and initialize support array for cloudSupport
-    support = ABC_CALLOC( int, dd->nVars );
-
-    // compute support and clean up markers
-    cloudSupport( dd, Cloud_Regular(n), support );
-    cloudClearMark( dd, Cloud_Regular(n) );
-
-    // transform support from array to cube
-    res = dd->one;
-    for ( i = dd->nVars - 1; i >= 0; i-- ) // for each level bottom-up 
-        if ( support[i] == 1 )
-        {
-            res = Cloud_bddAnd( dd, res, dd->vars[i] );
-            if ( res == NULL )
-                break;
-        }
-    ABC_FREE( support );
-    return res;
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Counts the variables on which a DD depends.]
-
-  Description [Counts the variables on which a DD depends.
-  Returns the number of the variables if successful; Cloud_OUT_OF_MEM
-  otherwise.]
-
-  SideEffects [None]
-
-  SeeAlso     []
-
-******************************************************************************/
-int Cloud_SupportSize( CloudManager * dd, CloudNode * n )
-{
-    int * support, i, count;
-
-    CLOUD_ASSERT(n);
-
-    // allocate and initialize support array for cloudSupport
-    support = ABC_CALLOC( int, dd->nVars );
-
-    // compute support and clean up markers
-    cloudSupport( dd, Cloud_Regular(n), support );
-    cloudClearMark( dd, Cloud_Regular(n) );
-
-    // count support variables
-    count = 0;
-    for ( i = 0; i < dd->nVars; i++ )
-    {
-        if ( support[i] == 1 )
-            count++;
-    }
-
-    ABC_FREE( support );
-    return count;
-}
-
-
-/**Function********************************************************************
-
-  Synopsis    [Performs the recursive step of Cloud_DagSize.]
-
-  Description [Performs the recursive step of Cloud_DagSize. Returns the
-  number of nodes in the graph rooted at n.]
-
-  SideEffects [None]
-
-******************************************************************************/
-static int cloudDagSize( CloudManager * dd, CloudNode * n )
-{
-    int tval, eval;
-    if ( cloudNodeIsMarked(n) )
-        return 0;
-    // set visited flag
-    cloudNodeMark(n);
-    if ( cloudIsConstant(n) )
-        return 1;
-    tval = cloudDagSize( dd, cloudT(n) );
-    eval = cloudDagSize( dd, Cloud_Regular(cloudE(n)) );
-    return tval + eval + 1;
-
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Counts the number of nodes in a DD.]
-
-  Description [Counts the number of nodes in a DD. Returns the number
-  of nodes in the graph rooted at node.]
-
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-int Cloud_DagSize( CloudManager * dd, CloudNode * n )
-{
-    int res;
-    res = cloudDagSize( dd, Cloud_Regular( n ) );
-    cloudClearMark( dd, Cloud_Regular( n ) );
-    return res;
-
-}
-
-
-/**Function********************************************************************
-
-  Synopsis    [Performs the recursive step of Cloud_DagSize.]
-
-  Description [Performs the recursive step of Cloud_DagSize. Returns the
-  number of nodes in the graph rooted at n.]
-
-  SideEffects [None]
-
-******************************************************************************/
-static int Cloud_DagCollect_rec( CloudManager * dd, CloudNode * n, int * pCounter )
-{
-    int tval, eval;
-    if ( cloudNodeIsMarked(n) )
-        return 0;
-    // set visited flag
-    cloudNodeMark(n);
-    if ( cloudIsConstant(n) )
-    {
-        dd->ppNodes[(*pCounter)++] = n;
-        return 1;
-    }
-    tval = Cloud_DagCollect_rec( dd, cloudT(n), pCounter );
-    eval = Cloud_DagCollect_rec( dd, Cloud_Regular(cloudE(n)), pCounter );
-    dd->ppNodes[(*pCounter)++] = n;
-    return tval + eval + 1;
-
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Counts the number of nodes in a DD.]
-
-  Description [Counts the number of nodes in a DD. Returns the number
-  of nodes in the graph rooted at node.]
-
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-int Cloud_DagCollect( CloudManager * dd, CloudNode * n )
-{
-    int res, Counter = 0;
-    if ( dd->ppNodes == NULL )
-        dd->ppNodes = ABC_ALLOC( CloudNode *, dd->nNodesLimit );
-    res = Cloud_DagCollect_rec( dd, Cloud_Regular( n ), &Counter );
-    cloudClearMark( dd, Cloud_Regular( n ) );
-    assert( res == Counter );
-    return res;
-
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Counts the number of nodes in an array of DDs.]
-
-  Description [Counts the number of nodes in a DD. Returns the number
-  of nodes in the graph rooted at node.]
-
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-int Cloud_SharingSize( CloudManager * dd, CloudNode ** pn, int nn )
-{
-    int res, i;
-    res = 0;
-    for ( i = 0; i < nn; i++ )
-        res += cloudDagSize( dd, Cloud_Regular( pn[i] ) );
-    for ( i = 0; i < nn; i++ )
-        cloudClearMark( dd, Cloud_Regular( pn[i] ) );
-    return res;
-}
-
-
-/**Function********************************************************************
-
-  Synopsis    [Returns one cube contained in the given BDD.]
-
-  Description []
-
-  SideEffects []
-
-******************************************************************************/
-CloudNode * Cloud_GetOneCube( CloudManager * dd, CloudNode * bFunc )
-{
-    CloudNode * bFunc0, * bFunc1, * res;
-
-    if ( Cloud_IsConstant(bFunc) )
-        return bFunc;
-
-    // cofactor
-    if ( Cloud_IsComplement(bFunc) )
-    {
-        bFunc0 = Cloud_Not( cloudE(bFunc) );
-        bFunc1 = Cloud_Not( cloudT(bFunc) );
-    }
-    else
-    {
-        bFunc0 = cloudE(bFunc);
-        bFunc1 = cloudT(bFunc);
-    }
-
-    // try to find the cube with the negative literal
-    res = Cloud_GetOneCube( dd, bFunc0 );
-    if ( res == NULL )
-        return NULL;
-
-    if ( res != dd->zero )
-    {
-        res = Cloud_bddAnd( dd, res, Cloud_Not(dd->vars[Cloud_V(bFunc)]) );
-    }
-    else
-    {
-        // try to find the cube with the positive literal
-        res = Cloud_GetOneCube( dd, bFunc1 );
-        if ( res == NULL )
-            return NULL;
-        assert( res != dd->zero );
-        res = Cloud_bddAnd( dd, res, dd->vars[Cloud_V(bFunc)] );
-    }
-    return res;
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Prints the BDD as a set of disjoint cubes to the standard output.]
-
-  Description []
-
-  SideEffects []
-
-******************************************************************************/
-void Cloud_bddPrint( CloudManager * dd, CloudNode * Func )
-{
-    CloudNode * Cube;
-    int fFirst = 1;
-
-    if ( Func == dd->zero )
-        printf( "Constant 0." );
-    else if ( Func == dd->one )
-        printf( "Constant 1." );
-    else
-    {
-        while ( 1 )
-        {
-            Cube = Cloud_GetOneCube( dd, Func );
-            if ( Cube == NULL || Cube == dd->zero )
-                break;
-            if ( fFirst )       fFirst = 0;
-            else                printf( " + " );
-            Cloud_bddPrintCube( dd, Cube );
-            Func = Cloud_bddAnd( dd, Func, Cloud_Not(Cube) );
-        } 
-    }
-    printf( "\n" );
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Prints one cube.]
-
-  Description []
-
-  SideEffects []
-
-******************************************************************************/
-void Cloud_bddPrintCube( CloudManager * dd, CloudNode * bCube )
-{
-    CloudNode * bCube0, * bCube1;
-
-    assert( !Cloud_IsConstant(bCube) );
-    while ( 1 )
-    {
-        // get the node structure
-        if ( Cloud_IsConstant(bCube) )
-            break;
-
-        // cofactor the cube
-        if ( Cloud_IsComplement(bCube) )
-        {
-            bCube0 = Cloud_Not( cloudE(bCube) );
-            bCube1 = Cloud_Not( cloudT(bCube) );
-        }
-        else
-        {
-            bCube0 = cloudE(bCube);
-            bCube1 = cloudT(bCube);
-        }
-
-        if ( bCube0 != dd->zero )
-        {
-            assert( bCube1 == dd->zero );
-            printf( "[%d]'", cloudV(bCube) );
-            bCube = bCube0;
-        }
-        else
-        {
-            assert( bCube1 != dd->zero );
-            printf( "[%d]", cloudV(bCube) );
-            bCube = bCube1;
-        }
-    }
-}
-
-
-/**Function********************************************************************
-
-  Synopsis    [Prints info.]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-void Cloud_PrintInfo( CloudManager * dd )
-{
-    if ( dd == NULL ) return;
-    printf( "The number of unique table nodes allocated = %12d.\n", dd->nNodesAlloc );
-    printf( "The number of unique table nodes present   = %12d.\n", dd->nNodesCur );
-    printf( "The number of unique table hits            = %12d.\n", dd->nUniqueHits );
-    printf( "The number of unique table misses          = %12d.\n", dd->nUniqueMisses );
-    printf( "The number of unique table steps           = %12d.\n", dd->nUniqueSteps );
-    printf( "The number of cache hits                   = %12d.\n", dd->nCacheHits );
-    printf( "The number of cache misses                 = %12d.\n", dd->nCacheMisses );
-    printf( "The current signature                      = %12d.\n", dd->nSignCur );
-    printf( "The total memory in use                    = %12d.\n", dd->nMemUsed );
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Prints the state of the hash table.]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-void Cloud_PrintHashTable( CloudManager * dd )
-{
-    int i;
-
-    for ( i = 0; i < dd->nNodesAlloc; i++ )
-        if ( dd->tUnique[i].v == CLOUD_CONST_INDEX )
-            printf( "-" );
-        else
-            printf( "+" );
-    printf( "\n" );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/cloud.h b/src/aig/kit/cloud.h
deleted file mode 100644
index c48b55de..00000000
--- a/src/aig/kit/cloud.h
+++ /dev/null
@@ -1,255 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [cloud.h]
-
-  PackageName [Fast application-specific BDD package.]
-
-  Synopsis    [Interface of the package.]
-
-  Author      [Alan Mishchenko <alanmi@ece.pdx.edu>]
-  
-  Affiliation [ECE Department. Portland State University, Portland, Oregon.]
-
-  Date        [Ver. 1.0. Started - June 10, 2002.]
-
-  Revision    [$Id: cloud.h,v 1.0 2002/06/10 03:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#ifndef __CLOUD_H__
-#define __CLOUD_H__
-
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <assert.h>
-#include <time.h>
-
-#include "abc_global.h"
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-#ifdef _WIN32
-#define inline __inline // compatible with MS VS 6.0
-#endif
-
-////////////////////////////////////////////////////////////////////////
-//  n |  2^n ||  n |    2^n ||  n |        2^n ||  n |           2^n  //
-//====================================================================//
-//  1 |    2 ||  9 |    512 || 17 |    131,072 || 25 |    33,554,432  //
-//  2 |    4 || 10 |  1,024 || 18 |    262,144 || 26 |    67,108,864  // 
-//  3 |    8 || 11 |  2,048 || 19 |    524,288 || 27 |   134,217,728  //
-//  4 |   16 || 12 |  4,096 || 20 |  1,048,576 || 28 |   268,435,456  //
-//  5 |   32 || 13 |  8,192 || 21 |  2,097,152 || 29 |   536,870,912  //
-//  6 |   64 || 14 | 16,384 || 22 |  4,194,304 || 30 | 1,073,741,824  //
-//  7 |  128 || 15 | 32,768 || 23 |  8,388,608 || 31 | 2,147,483,648  //
-//  8 |  256 || 16 | 65,536 || 24 | 16,777,216 || 32 | 4,294,967,296  //
-////////////////////////////////////////////////////////////////////////
-
-// data structure typedefs
-typedef struct cloudManager       CloudManager;
-typedef unsigned                  CloudVar;
-typedef unsigned                  CloudSign;
-typedef struct cloudNode          CloudNode;
-typedef struct cloudCacheEntry1   CloudCacheEntry1;
-typedef struct cloudCacheEntry2   CloudCacheEntry2;
-typedef struct cloudCacheEntry3   CloudCacheEntry3;
-
-// operation codes used to set up the cache
-typedef enum { 
-    CLOUD_OPER_AND, 
-    CLOUD_OPER_XOR, 
-    CLOUD_OPER_BDIFF, 
-    CLOUD_OPER_LEQ 
-} CloudOper;
-
-/*
-// the number of operators using cache
-static int CacheOperNum = 4;
-
-// the ratio of cache size to the unique table size for each operator
-static int CacheLogRatioDefault[4] = {
-    4, // CLOUD_OPER_AND, 
-    8, // CLOUD_OPER_XOR, 
-    8, // CLOUD_OPER_BDIFF, 
-    8  // CLOUD_OPER_LEQ 
-};
-
-// the ratio of cache size to the unique table size for each operator
-static int CacheSize[4] = {
-    2, // CLOUD_OPER_AND, 
-    2, // CLOUD_OPER_XOR, 
-    2, // CLOUD_OPER_BDIFF, 
-    2  // CLOUD_OPER_LEQ 
-};
-*/
-
-// data structure definitions
-struct cloudManager            // the fast bdd manager     
-{
-    // variables
-    int nVars;                 // the number of variables allocated
-    // bits
-    int bitsNode;              // the number of bits used for the node
-    int bitsCache[4];          // default: bitsNode - CacheSizeRatio[i]
-    // shifts
-    int shiftUnique;           // 8*sizeof(unsigned) - (bitsNode + 1)
-    int shiftCache[4];         // 8*sizeof(unsigned) -  bitsCache[i]
-    // nodes 
-    int nNodesAlloc;           // 2 ^ (bitsNode + 1)
-    int nNodesLimit;           // 2 ^  bitsNode
-    int nNodesCur;             // the current number of nodes (including const1 and vars)
-    // signature
-    CloudSign nSignCur;
-
-    // statistics
-    int nMemUsed;              // memory usage in bytes
-    // cache stats
-    int nUniqueHits;           // hits in the unique table
-    int nUniqueMisses;         // misses in the unique table
-    int nCacheHits;            // hits in the caches
-    int nCacheMisses;          // misses in the caches
-    // the number of steps through the hash table
-    int nUniqueSteps;
-
-    // tables
-    CloudNode * tUnique;       // the unique table to store BDD nodes
-
-    // special nodes
-    CloudNode * pNodeStart;    // the pointer to the first node
-    CloudNode * pNodeEnd;      // the pointer to the first node out of the table
-
-    // constants and variables
-    CloudNode *  one;          // the one function
-    CloudNode *  zero;         // the zero function
-    CloudNode ** vars;         // the elementary variables
-
-    // temporary storage for nodes
-    CloudNode ** ppNodes;
-
-    // caches
-    CloudCacheEntry2 * tCaches[20];    // caches
-};
-
-struct cloudNode   // representation of the node in the unique table
-{
-    CloudSign   s;         // signature
-    CloudVar    v;         // variable
-    CloudNode * e;         // negative cofactor
-    CloudNode * t;         // positive cofactor
-};
-struct cloudCacheEntry1  // one-argument cache
-{
-    CloudSign   s;         // signature
-    CloudNode * a;         // argument 1
-    CloudNode * r;         // result
-};
-struct cloudCacheEntry2  // the two-argument cache
-{
-    CloudSign   s;         // signature
-    CloudNode * a;
-    CloudNode * b;
-    CloudNode * r;
-};
-struct cloudCacheEntry3  // the three-argument cache
-{
-    CloudSign   s;         // signature
-    CloudNode * a;
-    CloudNode * b;
-    CloudNode * c;
-    CloudNode * r;
-};
-
-
-// parameters
-#define CLOUD_NODE_BITS              23
-
-#define CLOUD_CONST_INDEX            ((unsigned)0x0fffffff)
-#define CLOUD_MARK_ON                ((unsigned)0x10000000)
-#define CLOUD_MARK_OFF               ((unsigned)0xefffffff)
-
-// hash functions a la Buddy
-#define cloudHashBuddy2(x,y,s)       ((((x)+(y))*((x)+(y)+1)/2) & ((1<<(32-(s)))-1))
-#define cloudHashBuddy3(x,y,z,s)     (cloudHashBuddy2((cloudHashBuddy2((x),(y),(s))),(z),(s)) & ((1<<(32-(s)))-1))
-// hash functions a la Cudd
-#define DD_P1                           12582917
-#define DD_P2                         4256249
-#define DD_P3                         741457
-#define DD_P4                         1618033999
-#define cloudHashCudd2(f,g,s)        ((((unsigned)(ABC_PTRUINT_T)(f) * DD_P1 + (unsigned)(ABC_PTRUINT_T)(g)) * DD_P2) >> (s))
-#define cloudHashCudd3(f,g,h,s)      (((((unsigned)(ABC_PTRUINT_T)(f) * DD_P1 + (unsigned)(ABC_PTRUINT_T)(g)) * DD_P2 + (unsigned)(ABC_PTRUINT_T)(h)) * DD_P3) >> (s))
-
-// node complementation (using node)
-#define Cloud_Regular(p)             ((CloudNode*)(((ABC_PTRUINT_T)(p)) & ~01))   // get the regular node (w/o bubble)
-#define Cloud_Not(p)                 ((CloudNode*)(((ABC_PTRUINT_T)(p)) ^  01))   // complement the node
-#define Cloud_NotCond(p,c)           ((CloudNode*)(((ABC_PTRUINT_T)(p)) ^ (c)))   // complement the node conditionally
-#define Cloud_IsComplement(p)        ((int)(((ABC_PTRUINT_T)(p)) & 01))           // check if complemented
-// checking constants (using node)
-#define Cloud_IsConstant(p)          (((Cloud_Regular(p))->v & CLOUD_MARK_OFF) == CLOUD_CONST_INDEX)
-#define cloudIsConstant(p)           (((p)->v & CLOUD_MARK_OFF) == CLOUD_CONST_INDEX)
-
-// retrieving values from the node (using node structure)
-#define Cloud_V(p)                   ((Cloud_Regular(p))->v)
-#define Cloud_E(p)                   ((Cloud_Regular(p))->e)
-#define Cloud_T(p)                   ((Cloud_Regular(p))->t)
-// retrieving values from the regular node (using node structure)
-#define cloudV(p)                    ((p)->v)
-#define cloudE(p)                    ((p)->e)
-#define cloudT(p)                    ((p)->t)
-// marking/unmarking (using node structure)
-#define cloudNodeMark(p)             ((p)->v       |= CLOUD_MARK_ON)
-#define cloudNodeUnmark(p)           ((p)->v       &= CLOUD_MARK_OFF)
-#define cloudNodeIsMarked(p)         ((int)((p)->v &  CLOUD_MARK_ON))
-
-// cache lookups and inserts (using node)
-#define cloudCacheLookup1(p,sign,f)     (((p)->s == (sign) && (p)->a == (f))? ((p)->r): (0))
-#define cloudCacheLookup2(p,sign,f,g)   (((p)->s == (sign) && (p)->a == (f) && (p)->b == (g))? ((p)->r): (0))
-#define cloudCacheLookup3(p,sign,f,g,h) (((p)->s == (sign) && (p)->a == (f) && (p)->b == (g) && (p)->c == (h))? ((p)->r): (0))
-// cache inserts
-#define cloudCacheInsert1(p,sign,f,r)     (((p)->s = (sign)), ((p)->a = (f)), ((p)->r = (r)))
-#define cloudCacheInsert2(p,sign,f,g,r)   (((p)->s = (sign)), ((p)->a = (f)), ((p)->b = (g)), ((p)->r = (r)))
-#define cloudCacheInsert3(p,sign,f,g,h,r) (((p)->s = (sign)), ((p)->a = (f)), ((p)->b = (g)), ((p)->c = (h)), ((p)->r = (r)))
-
-//#define CLOUD_ASSERT(p)              (assert((p) >= (dd->pNodeStart-1) && (p) < dd->pNodeEnd))
-#define CLOUD_ASSERT(p)            assert((p) >= dd->tUnique && (p) < dd->tUnique+dd->nNodesAlloc)
-
-////////////////////////////////////////////////////////////////////////
-///                       FUNCTION DECLARATIONS                      ///
-////////////////////////////////////////////////////////////////////////
-// starting/stopping 
-extern CloudManager * Cloud_Init( int nVars, int nBits );
-extern void           Cloud_Quit( CloudManager * dd );
-extern void           Cloud_Restart( CloudManager * dd );
-extern void           Cloud_CacheAllocate( CloudManager * dd, CloudOper oper, int size );
-extern CloudNode *    Cloud_MakeNode( CloudManager * dd, CloudVar v, CloudNode * t, CloudNode * e );
-// support and node count
-extern CloudNode *    Cloud_Support( CloudManager * dd, CloudNode * n );
-extern int            Cloud_SupportSize( CloudManager * dd, CloudNode * n );
-extern int            Cloud_DagSize( CloudManager * dd, CloudNode * n );
-extern int            Cloud_DagCollect( CloudManager * dd, CloudNode * n );
-extern int            Cloud_SharingSize( CloudManager * dd, CloudNode * * pn, int nn );
-// cubes
-extern CloudNode *    Cloud_GetOneCube( CloudManager * dd, CloudNode * n );
-extern void           Cloud_bddPrint( CloudManager * dd, CloudNode * Func );
-extern void           Cloud_bddPrintCube( CloudManager * dd, CloudNode * Cube );
-// operations
-extern CloudNode *    Cloud_bddAnd( CloudManager * dd, CloudNode * f, CloudNode * g );
-extern CloudNode *    Cloud_bddOr( CloudManager * dd, CloudNode * f, CloudNode * g );
-// stats 
-extern void           Cloud_PrintInfo( CloudManager * dd );
-extern void           Cloud_PrintHashTable( CloudManager * dd );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                            END OF FILE                           ///
-////////////////////////////////////////////////////////////////////////
diff --git a/src/aig/kit/kit.h b/src/aig/kit/kit.h
deleted file mode 100644
index 9e15e994..00000000
--- a/src/aig/kit/kit.h
+++ /dev/null
@@ -1,655 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kit.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Dec 6, 2006.]
-
-  Revision    [$Id: kit.h,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#ifndef __KIT_H__
-#define __KIT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-#include <time.h>
-#include "vec.h"
-#include "extra.h"
-#include "cloud.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Kit_Sop_t_ Kit_Sop_t;
-struct Kit_Sop_t_
-{
-    int               nCubes;         // the number of cubes
-    unsigned *        pCubes;         // the storage for cubes
-};
-
-typedef struct Kit_Edge_t_ Kit_Edge_t;
-struct Kit_Edge_t_
-{
-    unsigned          fCompl   :  1;   // the complemented bit
-    unsigned          Node     : 30;   // the decomposition node pointed by the edge
-};
-
-typedef struct Kit_Node_t_ Kit_Node_t;
-struct Kit_Node_t_
-{
-    Kit_Edge_t        eEdge0;          // the left child of the node
-    Kit_Edge_t        eEdge1;          // the right child of the node
-    // other info
-    void *            pFunc;           // the function of the node (BDD or AIG)
-    unsigned          Level    : 14;   // the level of this node in the global AIG
-    // printing info 
-    unsigned          fNodeOr  :  1;   // marks the original OR node
-    unsigned          fCompl0  :  1;   // marks the original complemented edge
-    unsigned          fCompl1  :  1;   // marks the original complemented edge
-    // latch info
-    unsigned          nLat0    :  5;   // the number of latches on the first edge
-    unsigned          nLat1    :  5;   // the number of latches on the second edge
-    unsigned          nLat2    :  5;   // the number of latches on the output edge
-};
-
-typedef struct Kit_Graph_t_ Kit_Graph_t;
-struct Kit_Graph_t_
-{
-    int               fConst;          // marks the constant 1 graph
-    int               nLeaves;         // the number of leaves
-    int               nSize;           // the number of nodes (including the leaves) 
-    int               nCap;            // the number of allocated nodes
-    Kit_Node_t *      pNodes;          // the array of leaves and internal nodes
-    Kit_Edge_t        eRoot;           // the pointer to the topmost node
-};
-
-
-// DSD node types
-typedef enum { 
-    KIT_DSD_NONE  = 0,  // 0: unknown
-    KIT_DSD_CONST1,     // 1: constant 1
-    KIT_DSD_VAR,        // 2: elementary variable
-    KIT_DSD_AND,        // 3: multi-input AND
-    KIT_DSD_XOR,        // 4: multi-input XOR
-    KIT_DSD_PRIME       // 5: arbitrary function of 3+ variables
-} Kit_Dsd_t;
-
-// DSD node
-typedef struct Kit_DsdObj_t_ Kit_DsdObj_t;
-struct Kit_DsdObj_t_
-{ 
-    unsigned       Id         : 6;  // the number of this node
-    unsigned       Type       : 3;  // none, const, var, AND, XOR, MUX, PRIME
-    unsigned       fMark      : 1;  // finished checking output
-    unsigned       Offset     : 8;  // offset to the truth table
-    unsigned       nRefs      : 8;  // offset to the truth table
-    unsigned       nFans      : 6;  // the number of fanins of this node
-    unsigned char  pFans[0];        // the fanin literals
-};
-
-// DSD network
-typedef struct Kit_DsdNtk_t_ Kit_DsdNtk_t;
-struct Kit_DsdNtk_t_
-{
-    unsigned char  nVars;           // at most 16 (perhaps 18?)
-    unsigned char  nNodesAlloc;     // the number of allocated nodes (at most nVars)
-    unsigned char  nNodes;          // the number of nodes
-    unsigned char  Root;            // the root of the tree
-    unsigned *     pMem;            // memory for the truth tables (memory manager?)
-    unsigned *     pSupps;          // supports of the nodes
-    Kit_DsdObj_t** pNodes;          // the nodes
-};
-
-// DSD manager
-typedef struct Kit_DsdMan_t_ Kit_DsdMan_t;
-struct Kit_DsdMan_t_
-{
-    int            nVars;           // the maximum number of variables
-    int            nWords;          // the number of words in TTs
-    Vec_Ptr_t *    vTtElems;        // elementary truth tables
-    Vec_Ptr_t *    vTtNodes;        // the node truth tables
-    // BDD representation
-    CloudManager * dd;              // BDD package
-    Vec_Ptr_t *    vTtBdds;         // the node truth tables
-    Vec_Int_t *    vNodes;          // temporary array for BDD nodes
-};
-
-static inline int             Kit_DsdVar2Lit( int Var, int fCompl )  { return Var + Var + fCompl; }
-static inline int             Kit_DsdLit2Var( int Lit )              { return Lit >> 1;           }
-static inline int             Kit_DsdLitIsCompl( int Lit )           { return Lit & 1;            }
-static inline int             Kit_DsdLitNot( int Lit )               { return Lit ^ 1;            }
-static inline int             Kit_DsdLitNotCond( int Lit, int c )    { return Lit ^ (int)(c > 0); }
-static inline int             Kit_DsdLitRegular( int Lit )           { return Lit & 0xfe;         }
- 
-static inline unsigned        Kit_DsdObjOffset( int nFans )          { return (nFans >> 2) + ((nFans & 3) > 0);                    }
-static inline unsigned *      Kit_DsdObjTruth( Kit_DsdObj_t * pObj ) { return pObj->Type == KIT_DSD_PRIME ? (unsigned *)pObj->pFans + pObj->Offset: NULL; }
-static inline int             Kit_DsdNtkObjNum( Kit_DsdNtk_t * pNtk ){ return pNtk->nVars + pNtk->nNodes; }
-static inline Kit_DsdObj_t *  Kit_DsdNtkObj( Kit_DsdNtk_t * pNtk, int Id )      { assert( Id >= 0 && Id < pNtk->nVars + pNtk->nNodes ); return Id < pNtk->nVars ? NULL : pNtk->pNodes[Id - pNtk->nVars]; }
-static inline Kit_DsdObj_t *  Kit_DsdNtkRoot( Kit_DsdNtk_t * pNtk )             { return Kit_DsdNtkObj( pNtk, Kit_DsdLit2Var(pNtk->Root) );                      }
-static inline int             Kit_DsdLitIsLeaf( Kit_DsdNtk_t * pNtk, int Lit )   { int Id = Kit_DsdLit2Var(Lit); assert( Id >= 0 && Id < pNtk->nVars + pNtk->nNodes ); return Id < pNtk->nVars; }
-static inline unsigned        Kit_DsdLitSupport( Kit_DsdNtk_t * pNtk, int Lit )  { int Id = Kit_DsdLit2Var(Lit); assert( Id >= 0 && Id < pNtk->nVars + pNtk->nNodes ); return pNtk->pSupps? (Id < pNtk->nVars? (1 << Id) : pNtk->pSupps[Id - pNtk->nVars]) : 0; }
-
-#define Kit_DsdNtkForEachObj( pNtk, pObj, i )                                      \
-    for ( i = 0; (i < (pNtk)->nNodes) && ((pObj) = (pNtk)->pNodes[i]); i++ )
-#define Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )                              \
-    for ( i = 0; (i < (int)(pObj)->nFans) && ((iLit) = (pObj)->pFans[i], 1); i++ )
-#define Kit_DsdObjForEachFaninReverse( pNtk, pObj, iLit, i )                       \
-    for ( i = (int)(pObj)->nFans - 1; (i >= 0) && ((iLit) = (pObj)->pFans[i], 1); i-- )
-
-#define Kit_PlaForEachCube( pSop, nFanins, pCube )                \
-    for ( pCube = (pSop); *pCube; pCube += (nFanins) + 3 )
-#define Kit_PlaCubeForEachVar( pCube, Value, i )                     \
-    for ( i = 0; (pCube[i] != ' ') && (Value = pCube[i]); i++ )           
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-#define KIT_MIN(a,b)       (((a) < (b))? (a) : (b))
-#define KIT_MAX(a,b)       (((a) > (b))? (a) : (b))
-#define KIT_INFINITY       (100000000)
-
-static inline int          Kit_CubeHasLit( unsigned uCube, int i )                        { return(uCube &  (unsigned)(1<<i)) > 0;  }
-static inline unsigned     Kit_CubeSetLit( unsigned uCube, int i )                        { return uCube |  (unsigned)(1<<i);       }
-static inline unsigned     Kit_CubeXorLit( unsigned uCube, int i )                        { return uCube ^  (unsigned)(1<<i);       }
-static inline unsigned     Kit_CubeRemLit( unsigned uCube, int i )                        { return uCube & ~(unsigned)(1<<i);       }
-
-static inline int          Kit_CubeContains( unsigned uLarge, unsigned uSmall )           { return (uLarge & uSmall) == uSmall;     }
-static inline unsigned     Kit_CubeSharp( unsigned uCube, unsigned uMask )                { return uCube & ~uMask;                  }
-static inline unsigned     Kit_CubeMask( int nVar )                                       { return (~(unsigned)0) >> (32-nVar);     }
-
-static inline int          Kit_CubeIsMarked( unsigned uCube )                             { return Kit_CubeHasLit( uCube, 31 );     }
-static inline unsigned     Kit_CubeMark( unsigned uCube )                                 { return Kit_CubeSetLit( uCube, 31 );     }
-static inline unsigned     Kit_CubeUnmark( unsigned uCube )                               { return Kit_CubeRemLit( uCube, 31 );     }
-
-static inline int          Kit_SopCubeNum( Kit_Sop_t * cSop )                             { return cSop->nCubes;                    }
-static inline unsigned     Kit_SopCube( Kit_Sop_t * cSop, int i )                         { return cSop->pCubes[i];                 }
-static inline void         Kit_SopShrink( Kit_Sop_t * cSop, int nCubesNew )               { cSop->nCubes = nCubesNew;               }
-static inline void         Kit_SopPushCube( Kit_Sop_t * cSop, unsigned uCube )            { cSop->pCubes[cSop->nCubes++] = uCube;   }
-static inline void         Kit_SopWriteCube( Kit_Sop_t * cSop, unsigned uCube, int i )    { cSop->pCubes[i] = uCube;                }
-
-static inline Kit_Edge_t   Kit_EdgeCreate( int Node, int fCompl )                         { Kit_Edge_t eEdge = { fCompl, Node }; return eEdge;  }
-static inline unsigned     Kit_EdgeToInt( Kit_Edge_t eEdge )                              { return (eEdge.Node << 1) | eEdge.fCompl;            }
-static inline Kit_Edge_t   Kit_IntToEdge( unsigned Edge )                                 { return Kit_EdgeCreate( Edge >> 1, Edge & 1 );       }
-//static inline unsigned     Kit_EdgeToInt_( Kit_Edge_t eEdge )                             { return *(unsigned *)&eEdge;                         }
-//static inline Kit_Edge_t   Kit_IntToEdge_( unsigned Edge )                                { return *(Kit_Edge_t *)&Edge;                        }
-static inline unsigned     Kit_EdgeToInt_( Kit_Edge_t m )                                 { union { Kit_Edge_t x; unsigned y; } v; v.x = m; return v.y;  }
-static inline Kit_Edge_t   Kit_IntToEdge_( unsigned m )                                   { union { Kit_Edge_t x; unsigned y; } v; v.y = m; return v.x;  }
-
-static inline int          Kit_GraphIsConst( Kit_Graph_t * pGraph )                       { return pGraph->fConst;                              }
-static inline int          Kit_GraphIsConst0( Kit_Graph_t * pGraph )                      { return pGraph->fConst && pGraph->eRoot.fCompl;      }
-static inline int          Kit_GraphIsConst1( Kit_Graph_t * pGraph )                      { return pGraph->fConst && !pGraph->eRoot.fCompl;     }
-static inline int          Kit_GraphIsComplement( Kit_Graph_t * pGraph )                  { return pGraph->eRoot.fCompl;                        }
-static inline int          Kit_GraphIsVar( Kit_Graph_t * pGraph )                         { return pGraph->eRoot.Node < (unsigned)pGraph->nLeaves; }
-static inline void         Kit_GraphComplement( Kit_Graph_t * pGraph )                    { pGraph->eRoot.fCompl ^= 1;                          }
-static inline void         Kit_GraphSetRoot( Kit_Graph_t * pGraph, Kit_Edge_t eRoot )     { pGraph->eRoot = eRoot;                              }
-static inline int          Kit_GraphLeaveNum( Kit_Graph_t * pGraph )                      { return pGraph->nLeaves;                             }
-static inline int          Kit_GraphNodeNum( Kit_Graph_t * pGraph )                       { return pGraph->nSize - pGraph->nLeaves;             }
-static inline Kit_Node_t * Kit_GraphNode( Kit_Graph_t * pGraph, int i )                   { return pGraph->pNodes + i;                          }
-static inline Kit_Node_t * Kit_GraphNodeLast( Kit_Graph_t * pGraph )                      { return pGraph->pNodes + pGraph->nSize - 1;          }
-static inline int          Kit_GraphNodeInt( Kit_Graph_t * pGraph, Kit_Node_t * pNode )   { return pNode - pGraph->pNodes;                      }
-static inline int          Kit_GraphNodeIsVar( Kit_Graph_t * pGraph, Kit_Node_t * pNode ) { return Kit_GraphNodeInt(pGraph,pNode) < pGraph->nLeaves; }
-static inline Kit_Node_t * Kit_GraphVar( Kit_Graph_t * pGraph )                           { assert( Kit_GraphIsVar( pGraph ) );    return Kit_GraphNode( pGraph, pGraph->eRoot.Node );      }
-static inline int          Kit_GraphVarInt( Kit_Graph_t * pGraph )                        { assert( Kit_GraphIsVar( pGraph ) );    return Kit_GraphNodeInt( pGraph, Kit_GraphVar(pGraph) ); }
-static inline Kit_Node_t * Kit_GraphNodeFanin0( Kit_Graph_t * pGraph, Kit_Node_t * pNode ){ return Kit_GraphNodeIsVar(pGraph, pNode)? NULL : Kit_GraphNode(pGraph, pNode->eEdge0.Node);     }
-static inline Kit_Node_t * Kit_GraphNodeFanin1( Kit_Graph_t * pGraph, Kit_Node_t * pNode ){ return Kit_GraphNodeIsVar(pGraph, pNode)? NULL : Kit_GraphNode(pGraph, pNode->eEdge1.Node);     }
-static inline int          Kit_GraphRootLevel( Kit_Graph_t * pGraph )                     { return Kit_GraphNode(pGraph, pGraph->eRoot.Node)->Level;                                        }
-
-static inline int          Kit_SuppIsMinBase( int Supp )                                  { return (Supp & (Supp+1)) == 0;                      }
-
-//static inline int          Kit_Float2Int( float Val )     { return *((int *)&Val);               }
-//static inline float        Kit_Int2Float( int Num )       { return *((float *)&Num);             }
-static inline int          Kit_Float2Int( float Val )             { union { int x; float y; } v; v.y = Val; return v.x;    }
-static inline float        Kit_Int2Float( int Num )               { union { int x; float y; } v; v.x = Num; return v.y;    }
-static inline int          Kit_BitWordNum( int nBits )    { return nBits/(8*sizeof(unsigned)) + ((nBits%(8*sizeof(unsigned))) > 0); }
-static inline int          Kit_TruthWordNum( int nVars )  { return nVars <= 5 ? 1 : (1 << (nVars - 5));                             }
-static inline unsigned     Kit_BitMask( int nBits )       { assert( nBits <= 32 ); return ~((~(unsigned)0) << nBits);               }
-
-static inline void         Kit_TruthSetBit( unsigned * p, int Bit )   { p[Bit>>5] |= (1<<(Bit & 31));               }
-static inline void         Kit_TruthXorBit( unsigned * p, int Bit )   { p[Bit>>5] ^= (1<<(Bit & 31));               }
-static inline int          Kit_TruthHasBit( unsigned * p, int Bit )   { return (p[Bit>>5] & (1<<(Bit & 31))) > 0;   }
-
-static inline int Kit_WordFindFirstBit( unsigned uWord )
-{
-    int i;
-    for ( i = 0; i < 32; i++ )
-        if ( uWord & (1 << i) )
-            return i;
-    return -1;
-}
-static inline int Kit_WordHasOneBit( unsigned uWord )
-{
-    return (uWord & (uWord - 1)) == 0;
-}
-static inline int Kit_WordCountOnes( unsigned uWord )
-{
-    uWord = (uWord & 0x55555555) + ((uWord>>1) & 0x55555555);
-    uWord = (uWord & 0x33333333) + ((uWord>>2) & 0x33333333);
-    uWord = (uWord & 0x0F0F0F0F) + ((uWord>>4) & 0x0F0F0F0F);
-    uWord = (uWord & 0x00FF00FF) + ((uWord>>8) & 0x00FF00FF);
-    return  (uWord & 0x0000FFFF) + (uWord>>16);
-}
-static inline int Kit_TruthCountOnes( unsigned * pIn, int nVars )
-{
-    int w, Counter = 0;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        Counter += Kit_WordCountOnes(pIn[w]);
-    return Counter;
-}
-static inline int Kit_TruthFindFirstBit( unsigned * pIn, int nVars )
-{
-    int w;
-    for ( w = 0; w < Kit_TruthWordNum(nVars); w++ )
-        if ( pIn[w] )
-            return 32*w + Kit_WordFindFirstBit(pIn[w]);
-    return -1;
-}
-static inline int Kit_TruthFindFirstZero( unsigned * pIn, int nVars )
-{
-    int w;
-    for ( w = 0; w < Kit_TruthWordNum(nVars); w++ )
-        if ( ~pIn[w] )
-            return 32*w + Kit_WordFindFirstBit(~pIn[w]);
-    return -1;
-}
-static inline int Kit_TruthIsEqual( unsigned * pIn0, unsigned * pIn1, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        if ( pIn0[w] != pIn1[w] )
-            return 0;
-    return 1;
-}
-static inline int Kit_TruthIsEqualWithCare( unsigned * pIn0, unsigned * pIn1, unsigned * pCare, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        if ( (pIn0[w] & pCare[w]) != (pIn1[w] & pCare[w]) )
-            return 0;
-    return 1;
-}
-static inline int Kit_TruthIsOpposite( unsigned * pIn0, unsigned * pIn1, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        if ( pIn0[w] != ~pIn1[w] )
-            return 0;
-    return 1;
-}
-static inline int Kit_TruthIsEqualWithPhase( unsigned * pIn0, unsigned * pIn1, int nVars )
-{
-    int w;
-    if ( (pIn0[0] & 1) == (pIn1[0] & 1) )
-    {
-        for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-            if ( pIn0[w] != pIn1[w] )
-                return 0;
-    }
-    else
-    {
-        for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-            if ( pIn0[w] != ~pIn1[w] )
-                return 0;
-    }
-    return 1;
-}
-static inline int Kit_TruthIsConst0( unsigned * pIn, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        if ( pIn[w] )
-            return 0;
-    return 1;
-}
-static inline int Kit_TruthIsConst1( unsigned * pIn, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        if ( pIn[w] != ~(unsigned)0 )
-            return 0;
-    return 1;
-}
-static inline int Kit_TruthIsImply( unsigned * pIn1, unsigned * pIn2, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        if ( pIn1[w] & ~pIn2[w] )
-            return 0;
-    return 1;
-}
-static inline int Kit_TruthIsDisjoint( unsigned * pIn1, unsigned * pIn2, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        if ( pIn1[w] & pIn2[w] )
-            return 0;
-    return 1;
-}
-static inline int Kit_TruthIsDisjoint3( unsigned * pIn1, unsigned * pIn2, unsigned * pIn3, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        if ( pIn1[w] & pIn2[w] & pIn3[w] )
-            return 0;
-    return 1;
-}
-static inline void Kit_TruthCopy( unsigned * pOut, unsigned * pIn, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        pOut[w] = pIn[w];
-}
-static inline void Kit_TruthClear( unsigned * pOut, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        pOut[w] = 0;
-}
-static inline void Kit_TruthFill( unsigned * pOut, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        pOut[w] = ~(unsigned)0;
-}
-static inline void Kit_TruthNot( unsigned * pOut, unsigned * pIn, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        pOut[w] = ~pIn[w];
-}
-static inline void Kit_TruthAnd( unsigned * pOut, unsigned * pIn0, unsigned * pIn1, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        pOut[w] = pIn0[w] & pIn1[w];
-}
-static inline void Kit_TruthOr( unsigned * pOut, unsigned * pIn0, unsigned * pIn1, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        pOut[w] = pIn0[w] | pIn1[w];
-}
-static inline void Kit_TruthXor( unsigned * pOut, unsigned * pIn0, unsigned * pIn1, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        pOut[w] = pIn0[w] ^ pIn1[w];
-}
-static inline void Kit_TruthSharp( unsigned * pOut, unsigned * pIn0, unsigned * pIn1, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        pOut[w] = pIn0[w] & ~pIn1[w];
-}
-static inline void Kit_TruthNand( unsigned * pOut, unsigned * pIn0, unsigned * pIn1, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        pOut[w] = ~(pIn0[w] & pIn1[w]);
-}
-static inline void Kit_TruthAndPhase( unsigned * pOut, unsigned * pIn0, unsigned * pIn1, int nVars, int fCompl0, int fCompl1 )
-{
-    int w;
-    if ( fCompl0 && fCompl1 )
-    {
-        for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-            pOut[w] = ~(pIn0[w] | pIn1[w]);
-    }
-    else if ( fCompl0 && !fCompl1 )
-    {
-        for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-            pOut[w] = ~pIn0[w] & pIn1[w];
-    }
-    else if ( !fCompl0 && fCompl1 )
-    {
-        for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-            pOut[w] = pIn0[w] & ~pIn1[w];
-    }
-    else // if ( !fCompl0 && !fCompl1 )
-    {
-        for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-            pOut[w] = pIn0[w] & pIn1[w];
-    }
-}
-static inline void Kit_TruthOrPhase( unsigned * pOut, unsigned * pIn0, unsigned * pIn1, int nVars, int fCompl0, int fCompl1 )
-{
-    int w;
-    if ( fCompl0 && fCompl1 )
-    {
-        for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-            pOut[w] = ~(pIn0[w] & pIn1[w]);
-    }
-    else if ( fCompl0 && !fCompl1 )
-    {
-        for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-            pOut[w] = ~pIn0[w] | pIn1[w];
-    }
-    else if ( !fCompl0 && fCompl1 )
-    {
-        for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-            pOut[w] = pIn0[w] | ~pIn1[w];
-    }
-    else // if ( !fCompl0 && !fCompl1 )
-    {
-        for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-            pOut[w] = pIn0[w] | pIn1[w];
-    }
-}
-static inline void Kit_TruthMux( unsigned * pOut, unsigned * pIn0, unsigned * pIn1, unsigned * pCtrl, int nVars )
-{
-    int w;
-    for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-        pOut[w] = (pIn0[w] & ~pCtrl[w]) | (pIn1[w] & pCtrl[w]);
-}
-static inline void Kit_TruthMuxPhase( unsigned * pOut, unsigned * pIn0, unsigned * pIn1, unsigned * pCtrl, int nVars, int fComp0 )
-{
-    int w;
-    if ( fComp0 )
-        for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-            pOut[w] = (~pIn0[w] & ~pCtrl[w]) | (pIn1[w] & pCtrl[w]);
-    else
-        for ( w = Kit_TruthWordNum(nVars)-1; w >= 0; w-- )
-            pOut[w] = (pIn0[w] & ~pCtrl[w]) | (pIn1[w] & pCtrl[w]);
-}
-static inline void Kit_TruthIthVar( unsigned * pTruth, int nVars, int iVar )
-{
-    unsigned Masks[5] = { 0xAAAAAAAA, 0xCCCCCCCC, 0xF0F0F0F0, 0xFF00FF00, 0xFFFF0000 };
-    int k, nWords = (nVars <= 5 ? 1 : (1 << (nVars - 5)));
-    if ( iVar < 5 )
-    {
-        for ( k = 0; k < nWords; k++ )
-            pTruth[k] = Masks[iVar];
-    }
-    else
-    {
-        for ( k = 0; k < nWords; k++ )
-            if ( k & (1 << (iVar-5)) )
-                pTruth[k] = ~(unsigned)0;
-            else
-                pTruth[k] = 0;
-    }
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                           ITERATORS                              ///
-////////////////////////////////////////////////////////////////////////
-
-#define Kit_SopForEachCube( cSop, uCube, i )                                      \
-    for ( i = 0; (i < Kit_SopCubeNum(cSop)) && ((uCube) = Kit_SopCube(cSop, i)); i++ )
-#define Kit_CubeForEachLiteral( uCube, Lit, nLits, i )                            \
-    for ( i = 0; (i < (nLits)) && ((Lit) = Kit_CubeHasLit(uCube, i)); i++ )
-
-#define Kit_GraphForEachLeaf( pGraph, pLeaf, i )                                              \
-    for ( i = 0; (i < (pGraph)->nLeaves) && (((pLeaf) = Kit_GraphNode(pGraph, i)), 1); i++ )
-#define Kit_GraphForEachNode( pGraph, pAnd, i )                                               \
-    for ( i = (pGraph)->nLeaves; (i < (pGraph)->nSize) && (((pAnd) = Kit_GraphNode(pGraph, i)), 1); i++ )
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== kitBdd.c ==========================================================*/
-extern DdNode *        Kit_SopToBdd( DdManager * dd, Kit_Sop_t * cSop, int nVars );
-extern DdNode *        Kit_GraphToBdd( DdManager * dd, Kit_Graph_t * pGraph );
-extern DdNode *        Kit_TruthToBdd( DdManager * dd, unsigned * pTruth, int nVars, int fMSBonTop );
-/*=== kitCloud.c ==========================================================*/
-extern CloudNode *     Kit_TruthToCloud( CloudManager * dd, unsigned * pTruth, int nVars );
-extern unsigned *      Kit_CloudToTruth( Vec_Int_t * vNodes, int nVars, Vec_Ptr_t * vStore, int fInv );
-extern int             Kit_CreateCloud( CloudManager * dd, CloudNode * pFunc, Vec_Int_t * vNodes );
-extern int             Kit_CreateCloudFromTruth( CloudManager * dd, unsigned * pTruth, int nVars, Vec_Int_t * vNodes );
-extern unsigned *      Kit_TruthCompose( CloudManager * dd, unsigned * pTruth, int nVars, unsigned ** pInputs, int nVarsAll, Vec_Ptr_t * vStore, Vec_Int_t * vNodes );
-extern void            Kit_TruthCofSupports( Vec_Int_t * vBddDir, Vec_Int_t * vBddInv, int nVars, Vec_Int_t * vMemory, unsigned * puSupps );
-/*=== kitDsd.c ==========================================================*/
-extern Kit_DsdMan_t *  Kit_DsdManAlloc( int nVars, int nNodes );
-extern void            Kit_DsdManFree( Kit_DsdMan_t * p );
-extern Kit_DsdNtk_t *  Kit_DsdDeriveNtk( unsigned * pTruth, int nVars, int nLutSize );
-extern unsigned *      Kit_DsdTruthCompute( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk );
-extern void            Kit_DsdTruth( Kit_DsdNtk_t * pNtk, unsigned * pTruthRes );
-extern void            Kit_DsdTruthPartial( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, unsigned * pTruthRes, unsigned uSupp );
-extern void            Kit_DsdTruthPartialTwo( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, unsigned uSupp, int iVar, unsigned * pTruthCo, unsigned * pTruthDec );
-extern void            Kit_DsdPrint( FILE * pFile, Kit_DsdNtk_t * pNtk );
-extern void            Kit_DsdPrintExpanded( Kit_DsdNtk_t * pNtk );
-extern void            Kit_DsdPrintFromTruth( unsigned * pTruth, int nVars );
-extern void            Kit_DsdPrintFromTruth2( FILE * pFile, unsigned * pTruth, int nVars );
-extern void            Kit_DsdWriteFromTruth( char * pBuffer, unsigned * pTruth, int nVars );
-extern Kit_DsdNtk_t *  Kit_DsdDecompose( unsigned * pTruth, int nVars );
-extern Kit_DsdNtk_t *  Kit_DsdDecomposeExpand( unsigned * pTruth, int nVars );
-extern Kit_DsdNtk_t *  Kit_DsdDecomposeMux( unsigned * pTruth, int nVars, int nDecMux );
-extern void            Kit_DsdVerify( Kit_DsdNtk_t * pNtk, unsigned * pTruth, int nVars );
-extern void            Kit_DsdNtkFree( Kit_DsdNtk_t * pNtk );
-extern int             Kit_DsdNonDsdSizeMax( Kit_DsdNtk_t * pNtk );
-extern Kit_DsdObj_t *  Kit_DsdNonDsdPrimeMax( Kit_DsdNtk_t * pNtk );
-extern unsigned        Kit_DsdNonDsdSupports( Kit_DsdNtk_t * pNtk );
-extern unsigned        Kit_DsdGetSupports( Kit_DsdNtk_t * p );
-extern Kit_DsdNtk_t *  Kit_DsdExpand( Kit_DsdNtk_t * p );
-extern Kit_DsdNtk_t *  Kit_DsdShrink( Kit_DsdNtk_t * p, int pPrios[] );
-extern void            Kit_DsdRotate( Kit_DsdNtk_t * p, int pFreqs[] );
-extern int             Kit_DsdCofactoring( unsigned * pTruth, int nVars, int * pCofVars, int nLimit, int fVerbose );
-/*=== kitFactor.c ==========================================================*/
-extern Kit_Graph_t *   Kit_SopFactor( Vec_Int_t * vCover, int fCompl, int nVars, Vec_Int_t * vMemory );
-/*=== kitGraph.c ==========================================================*/
-extern Kit_Graph_t *   Kit_GraphCreate( int nLeaves );   
-extern Kit_Graph_t *   Kit_GraphCreateConst0();   
-extern Kit_Graph_t *   Kit_GraphCreateConst1();   
-extern Kit_Graph_t *   Kit_GraphCreateLeaf( int iLeaf, int nLeaves, int fCompl );   
-extern void            Kit_GraphFree( Kit_Graph_t * pGraph );   
-extern Kit_Node_t *    Kit_GraphAppendNode( Kit_Graph_t * pGraph );   
-extern Kit_Edge_t      Kit_GraphAddNodeAnd( Kit_Graph_t * pGraph, Kit_Edge_t eEdge0, Kit_Edge_t eEdge1 );
-extern Kit_Edge_t      Kit_GraphAddNodeOr( Kit_Graph_t * pGraph, Kit_Edge_t eEdge0, Kit_Edge_t eEdge1 );
-extern Kit_Edge_t      Kit_GraphAddNodeXor( Kit_Graph_t * pGraph, Kit_Edge_t eEdge0, Kit_Edge_t eEdge1, int Type );
-extern Kit_Edge_t      Kit_GraphAddNodeMux( Kit_Graph_t * pGraph, Kit_Edge_t eEdgeC, Kit_Edge_t eEdgeT, Kit_Edge_t eEdgeE, int Type );
-extern unsigned        Kit_GraphToTruth( Kit_Graph_t * pGraph );
-extern Kit_Graph_t *   Kit_TruthToGraph( unsigned * pTruth, int nVars, Vec_Int_t * vMemory );
-extern int             Kit_GraphLeafDepth_rec( Kit_Graph_t * pGraph, Kit_Node_t * pNode, Kit_Node_t * pLeaf );
-/*=== kitHop.c ==========================================================*/
-//extern Hop_Obj_t *     Kit_GraphToHop( Hop_Man_t * pMan, Kit_Graph_t * pGraph );
-//extern Hop_Obj_t *     Kit_TruthToHop( Hop_Man_t * pMan, unsigned * pTruth, int nVars, Vec_Int_t * vMemory );
-//extern Hop_Obj_t *     Kit_CoverToHop( Hop_Man_t * pMan, Vec_Int_t * vCover, int nVars, Vec_Int_t * vMemory );
-/*=== kitIsop.c ==========================================================*/
-extern int             Kit_TruthIsop( unsigned * puTruth, int nVars, Vec_Int_t * vMemory, int fTryBoth );
-/*=== kitPla.c ==========================================================*/
-extern int             Kit_PlaIsConst0( char * pSop );
-extern int             Kit_PlaIsConst1( char * pSop );
-extern int             Kit_PlaIsBuf( char * pSop );
-extern int             Kit_PlaIsInv( char * pSop );
-extern int             Kit_PlaGetVarNum( char * pSop );
-extern int             Kit_PlaGetCubeNum( char * pSop );
-extern int             Kit_PlaIsComplement( char * pSop );
-extern void            Kit_PlaComplement( char * pSop );
-extern char *          Kit_PlaStart( void * p, int nCubes, int nVars );
-extern char *          Kit_PlaCreateFromIsop( void * p, int nVars, Vec_Int_t * vCover );
-extern void            Kit_PlaToIsop( char * pSop, Vec_Int_t * vCover );
-extern char *          Kit_PlaStoreSop( void * p, char * pSop );
-extern char *          Kit_PlaFromTruth( void * p, unsigned * pTruth, int nVars, Vec_Int_t * vCover );
-extern char *          Kit_PlaFromTruthNew( unsigned * pTruth, int nVars, Vec_Int_t * vCover, Vec_Str_t * vStr );
-extern ABC_UINT64_T    Kit_PlaToTruth6( char * pSop, int nVars );
-extern void            Kit_PlaToTruth( char * pSop, int nVars, Vec_Ptr_t * vVars, unsigned * pTemp, unsigned * pTruth );
-/*=== kitSop.c ==========================================================*/
-extern void            Kit_SopCreate( Kit_Sop_t * cResult, Vec_Int_t * vInput, int nVars, Vec_Int_t * vMemory );
-extern void            Kit_SopCreateInverse( Kit_Sop_t * cResult, Vec_Int_t * vInput, int nVars, Vec_Int_t * vMemory );
-extern void            Kit_SopDup( Kit_Sop_t * cResult, Kit_Sop_t * cSop, Vec_Int_t * vMemory );
-extern void            Kit_SopDivideByLiteralQuo( Kit_Sop_t * cSop, int iLit );
-extern void            Kit_SopDivideByCube( Kit_Sop_t * cSop, Kit_Sop_t * cDiv, Kit_Sop_t * vQuo, Kit_Sop_t * vRem, Vec_Int_t * vMemory );
-extern void            Kit_SopDivideInternal( Kit_Sop_t * cSop, Kit_Sop_t * cDiv, Kit_Sop_t * vQuo, Kit_Sop_t * vRem, Vec_Int_t * vMemory );
-extern void            Kit_SopMakeCubeFree( Kit_Sop_t * cSop );
-extern int             Kit_SopIsCubeFree( Kit_Sop_t * cSop );
-extern void            Kit_SopCommonCubeCover( Kit_Sop_t * cResult, Kit_Sop_t * cSop, Vec_Int_t * vMemory );
-extern int             Kit_SopAnyLiteral( Kit_Sop_t * cSop, int nLits );
-extern int             Kit_SopDivisor( Kit_Sop_t * cResult, Kit_Sop_t * cSop, int nLits, Vec_Int_t * vMemory );
-extern void            Kit_SopBestLiteralCover( Kit_Sop_t * cResult, Kit_Sop_t * cSop, unsigned uCube, int nLits, Vec_Int_t * vMemory );
-/*=== kitTruth.c ==========================================================*/
-extern void            Kit_TruthSwapAdjacentVars( unsigned * pOut, unsigned * pIn, int nVars, int Start );
-extern void            Kit_TruthStretch( unsigned * pOut, unsigned * pIn, int nVars, int nVarsAll, unsigned Phase, int fReturnIn );
-extern void            Kit_TruthPermute( unsigned * pOut, unsigned * pIn, int nVars, char * pPerm, int fReturnIn );
-extern void            Kit_TruthShrink( unsigned * pOut, unsigned * pIn, int nVars, int nVarsAll, unsigned Phase, int fReturnIn );
-extern int             Kit_TruthVarInSupport( unsigned * pTruth, int nVars, int iVar );
-extern int             Kit_TruthSupportSize( unsigned * pTruth, int nVars );
-extern unsigned        Kit_TruthSupport( unsigned * pTruth, int nVars );
-extern void            Kit_TruthCofactor0( unsigned * pTruth, int nVars, int iVar );
-extern void            Kit_TruthCofactor1( unsigned * pTruth, int nVars, int iVar );
-extern void            Kit_TruthCofactor0New( unsigned * pOut, unsigned * pIn, int nVars, int iVar );
-extern void            Kit_TruthCofactor1New( unsigned * pOut, unsigned * pIn, int nVars, int iVar );
-extern int             Kit_TruthVarIsVacuous( unsigned * pOnset, unsigned * pOffset, int nVars, int iVar );
-extern void            Kit_TruthExist( unsigned * pTruth, int nVars, int iVar );
-extern void            Kit_TruthExistNew( unsigned * pRes, unsigned * pTruth, int nVars, int iVar );
-extern void            Kit_TruthExistSet( unsigned * pRes, unsigned * pTruth, int nVars, unsigned uMask );
-extern void            Kit_TruthForall( unsigned * pTruth, int nVars, int iVar );
-extern void            Kit_TruthForallNew( unsigned * pRes, unsigned * pTruth, int nVars, int iVar );
-extern void            Kit_TruthForallSet( unsigned * pRes, unsigned * pTruth, int nVars, unsigned uMask );
-extern void            Kit_TruthUniqueNew( unsigned * pRes, unsigned * pTruth, int nVars, int iVar );
-extern void            Kit_TruthMuxVar( unsigned * pOut, unsigned * pCof0, unsigned * pCof1, int nVars, int iVar );
-extern void            Kit_TruthMuxVarPhase( unsigned * pOut, unsigned * pCof0, unsigned * pCof1, int nVars, int iVar, int fCompl0 );
-extern void            Kit_TruthChangePhase( unsigned * pTruth, int nVars, int iVar );
-extern int             Kit_TruthVarsSymm( unsigned * pTruth, int nVars, int iVar0, int iVar1, unsigned * pCof0, unsigned * pCof1 );
-extern int             Kit_TruthVarsAntiSymm( unsigned * pTruth, int nVars, int iVar0, int iVar1, unsigned * pCof0, unsigned * pCof1 );
-extern int             Kit_TruthMinCofSuppOverlap( unsigned * pTruth, int nVars, int * pVarMin );
-extern int             Kit_TruthBestCofVar( unsigned * pTruth, int nVars, unsigned * pCof0, unsigned * pCof1 );
-extern void            Kit_TruthCountOnesInCofs( unsigned * pTruth, int nVars, short * pStore );
-extern void            Kit_TruthCountOnesInCofs0( unsigned * pTruth, int nVars, short * pStore );
-extern void            Kit_TruthCountOnesInCofsSlow( unsigned * pTruth, int nVars, short * pStore, unsigned * pAux );
-extern unsigned        Kit_TruthHash( unsigned * pIn, int nWords );
-extern unsigned        Kit_TruthSemiCanonicize( unsigned * pInOut, unsigned * pAux, int nVars, char * pCanonPerm, short * pStore );
-extern char *          Kit_TruthDumpToFile( unsigned * pTruth, int nVars, int nFile );
-extern void            Kit_TruthPrintProfile( unsigned * pTruth, int nVars );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/kit/kitAig.c b/src/aig/kit/kitAig.c
deleted file mode 100644
index 88f17fc2..00000000
--- a/src/aig/kit/kitAig.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kitAig.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [Procedures involving AIGs.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Dec 6, 2006.]
-
-  Revision    [$Id: kitAig.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "kit.h"
-#include "aig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Transforms the decomposition graph into the AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Kit_GraphToAigInternal( Aig_Man_t * pMan, Kit_Graph_t * pGraph )
-{
-    Kit_Node_t * pNode = NULL;
-    Aig_Obj_t * pAnd0, * pAnd1;
-    int i;
-    // check for constant function
-    if ( Kit_GraphIsConst(pGraph) )
-        return Aig_NotCond( Aig_ManConst1(pMan), Kit_GraphIsComplement(pGraph) );
-    // check for a literal
-    if ( Kit_GraphIsVar(pGraph) )
-        return Aig_NotCond( (Aig_Obj_t *)Kit_GraphVar(pGraph)->pFunc, Kit_GraphIsComplement(pGraph) );
-    // build the AIG nodes corresponding to the AND gates of the graph
-    Kit_GraphForEachNode( pGraph, pNode, i )
-    {
-        pAnd0 = Aig_NotCond( (Aig_Obj_t *)Kit_GraphNode(pGraph, pNode->eEdge0.Node)->pFunc, pNode->eEdge0.fCompl ); 
-        pAnd1 = Aig_NotCond( (Aig_Obj_t *)Kit_GraphNode(pGraph, pNode->eEdge1.Node)->pFunc, pNode->eEdge1.fCompl ); 
-        pNode->pFunc = Aig_And( pMan, pAnd0, pAnd1 );
-    }
-    // complement the result if necessary
-    return Aig_NotCond( (Aig_Obj_t *)pNode->pFunc, Kit_GraphIsComplement(pGraph) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Strashes one logic node using its SOP.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Kit_GraphToAig( Aig_Man_t * pMan, Aig_Obj_t ** pFanins, Kit_Graph_t * pGraph )
-{
-    Kit_Node_t * pNode = NULL;
-    int i;
-    // collect the fanins
-    Kit_GraphForEachLeaf( pGraph, pNode, i )
-        pNode->pFunc = pFanins[i];
-    // perform strashing
-    return Kit_GraphToAigInternal( pMan, pGraph );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Strashed onen logic nodes using its truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Kit_TruthToAig( Aig_Man_t * pMan, Aig_Obj_t ** pFanins, unsigned * pTruth, int nVars, Vec_Int_t * vMemory )
-{
-    Aig_Obj_t * pObj;
-    Kit_Graph_t * pGraph;
-    // transform truth table into the decomposition tree
-    if ( vMemory == NULL )
-    {
-        vMemory = Vec_IntAlloc( 0 );
-        pGraph = Kit_TruthToGraph( pTruth, nVars, vMemory );
-        Vec_IntFree( vMemory );
-    }
-    else
-        pGraph = Kit_TruthToGraph( pTruth, nVars, vMemory );
-    // derive the AIG for the decomposition tree
-    pObj = Kit_GraphToAig( pMan, pFanins, pGraph );
-    Kit_GraphFree( pGraph );
-    return pObj;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/kitBdd.c b/src/aig/kit/kitBdd.c
deleted file mode 100644
index 1b24ac24..00000000
--- a/src/aig/kit/kitBdd.c
+++ /dev/null
@@ -1,236 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kitBdd.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [Procedures involving BDDs.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Dec 6, 2006.]
-
-  Revision    [$Id: kitBdd.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "kit.h"
-#include "extra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the BDD for the given SOP.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Kit_SopToBdd( DdManager * dd, Kit_Sop_t * cSop, int nVars )
-{
-    DdNode * bSum, * bCube, * bTemp, * bVar;
-    unsigned uCube;
-    int Value, i, v;
-    assert( nVars < 16 );
-    // start the cover
-    bSum = Cudd_ReadLogicZero(dd);   Cudd_Ref( bSum );
-   // check the logic function of the node
-    Kit_SopForEachCube( cSop, uCube, i )
-    {
-        bCube = Cudd_ReadOne(dd);   Cudd_Ref( bCube );
-        for ( v = 0; v < nVars; v++ )
-        {
-            Value = ((uCube >> 2*v) & 3);
-            if ( Value == 1 )
-                bVar = Cudd_Not( Cudd_bddIthVar( dd, v ) );
-            else if ( Value == 2 )
-                bVar = Cudd_bddIthVar( dd, v );
-            else
-                continue;
-            bCube  = Cudd_bddAnd( dd, bTemp = bCube, bVar );   Cudd_Ref( bCube );
-            Cudd_RecursiveDeref( dd, bTemp );
-        }
-        bSum = Cudd_bddOr( dd, bTemp = bSum, bCube );   
-        Cudd_Ref( bSum );
-        Cudd_RecursiveDeref( dd, bTemp );
-        Cudd_RecursiveDeref( dd, bCube );
-    }
-    // complement the result if necessary
-    Cudd_Deref( bSum );
-    return bSum;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Converts graph to BDD.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Kit_GraphToBdd( DdManager * dd, Kit_Graph_t * pGraph )
-{
-    DdNode * bFunc, * bFunc0, * bFunc1;
-    Kit_Node_t * pNode = NULL; // Suppress "might be used uninitialized"
-    int i;
-
-    // sanity checks
-    assert( Kit_GraphLeaveNum(pGraph) >= 0 );
-    assert( Kit_GraphLeaveNum(pGraph) <= pGraph->nSize );
-
-    // check for constant function
-    if ( Kit_GraphIsConst(pGraph) )
-        return Cudd_NotCond( b1, Kit_GraphIsComplement(pGraph) );
-    // check for a literal
-    if ( Kit_GraphIsVar(pGraph) )
-        return Cudd_NotCond( Cudd_bddIthVar(dd, Kit_GraphVarInt(pGraph)), Kit_GraphIsComplement(pGraph) );
-
-    // assign the elementary variables
-    Kit_GraphForEachLeaf( pGraph, pNode, i )
-        pNode->pFunc = Cudd_bddIthVar( dd, i );
-
-    // compute the function for each internal node
-    Kit_GraphForEachNode( pGraph, pNode, i )
-    {
-        bFunc0 = Cudd_NotCond( Kit_GraphNode(pGraph, pNode->eEdge0.Node)->pFunc, pNode->eEdge0.fCompl ); 
-        bFunc1 = Cudd_NotCond( Kit_GraphNode(pGraph, pNode->eEdge1.Node)->pFunc, pNode->eEdge1.fCompl ); 
-        pNode->pFunc = Cudd_bddAnd( dd, bFunc0, bFunc1 );   Cudd_Ref( (DdNode *)pNode->pFunc );
-    }
-
-    // deref the intermediate results
-    bFunc = (DdNode *)pNode->pFunc;   Cudd_Ref( bFunc );
-    Kit_GraphForEachNode( pGraph, pNode, i )
-        Cudd_RecursiveDeref( dd, (DdNode *)pNode->pFunc );
-    Cudd_Deref( bFunc );
-
-    // complement the result if necessary
-    return Cudd_NotCond( bFunc, Kit_GraphIsComplement(pGraph) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Kit_TruthToBdd_rec( DdManager * dd, unsigned * pTruth, int iBit, int nVars, int nVarsTotal, int fMSBonTop )
-{
-    DdNode * bF0, * bF1, * bF;
-    int Var;
-    if ( nVars <= 5 )
-    {
-        unsigned uTruth, uMask;
-        uMask = ((~(unsigned)0) >> (32 - (1<<nVars)));
-        uTruth = (pTruth[iBit>>5] >> (iBit&31)) & uMask;
-        if ( uTruth == 0 )
-            return b0;
-        if ( uTruth == uMask )
-            return b1;        
-    }
-    // find the variable to use
-    Var = fMSBonTop? nVarsTotal-nVars : nVars-1;
-    // other special cases can be added
-    bF0 = Kit_TruthToBdd_rec( dd, pTruth, iBit,                nVars-1, nVarsTotal, fMSBonTop );  Cudd_Ref( bF0 );
-    bF1 = Kit_TruthToBdd_rec( dd, pTruth, iBit+(1<<(nVars-1)), nVars-1, nVarsTotal, fMSBonTop );  Cudd_Ref( bF1 );
-    bF  = Cudd_bddIte( dd, dd->vars[Var], bF1, bF0 );                     Cudd_Ref( bF );
-    Cudd_RecursiveDeref( dd, bF0 );
-    Cudd_RecursiveDeref( dd, bF1 );
-    Cudd_Deref( bF );
-    return bF;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compute BDD corresponding to the truth table.]
-
-  Description [If truth table has N vars, the BDD depends on N topmost
-  variables of the BDD manager. The most significant variable of the table
-  is encoded by the topmost variable of the manager. BDD construction is 
-  efficient in this case because BDD is constructed one node at a time, 
-  by simply adding BDD nodes on top of existent BDD nodes.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Kit_TruthToBdd( DdManager * dd, unsigned * pTruth, int nVars, int fMSBonTop )
-{
-    return Kit_TruthToBdd_rec( dd, pTruth, 0, nVars, nVars, fMSBonTop );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Verifies that the factoring is correct.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_SopFactorVerify( Vec_Int_t * vCover, Kit_Graph_t * pFForm, int nVars )
-{
-    static DdManager * dd = NULL;
-    Kit_Sop_t Sop, * cSop = &Sop;
-    DdNode * bFunc1, * bFunc2;
-    Vec_Int_t * vMemory;
-    int RetValue;
-    // get the manager
-    if ( dd == NULL )
-        dd = Cudd_Init( 16, 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    // derive SOP
-    vMemory = Vec_IntAlloc( Vec_IntSize(vCover) );
-    Kit_SopCreate( cSop, vCover, nVars, vMemory );
-    // get the functions
-    bFunc1 = Kit_SopToBdd( dd, cSop, nVars );      Cudd_Ref( bFunc1 );
-    bFunc2 = Kit_GraphToBdd( dd, pFForm );         Cudd_Ref( bFunc2 );
-//Extra_bddPrint( dd, bFunc1 ); printf("\n");
-//Extra_bddPrint( dd, bFunc2 ); printf("\n");
-    RetValue = (bFunc1 == bFunc2);
-    if ( bFunc1 != bFunc2 )
-    {
-        int s;
-        Extra_bddPrint( dd, bFunc1 ); printf("\n");
-        Extra_bddPrint( dd, bFunc2 ); printf("\n");
-        s  = 0;
-    }
-    Cudd_RecursiveDeref( dd, bFunc1 );
-    Cudd_RecursiveDeref( dd, bFunc2 );
-    Vec_IntFree( vMemory );
-    return RetValue;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/kitCloud.c b/src/aig/kit/kitCloud.c
deleted file mode 100644
index dea56749..00000000
--- a/src/aig/kit/kitCloud.c
+++ /dev/null
@@ -1,378 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kitCloud.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [Procedures using BDD package CLOUD.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Dec 6, 2006.]
-
-  Revision    [$Id: kitCloud.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// internal representation of the function to be decomposed
-typedef struct Kit_Mux_t_ Kit_Mux_t;
-struct Kit_Mux_t_
-{
-    unsigned      v  :  5;          // variable 
-    unsigned      t  : 12;          // then edge
-    unsigned      e  : 12;          // else edge
-    unsigned      c  :  1;          // complemented attr of else edge
-    unsigned      i  :  1;          // complemented attr of top node
-};
-
-static inline int        Kit_Mux2Int( Kit_Mux_t m )  { union { Kit_Mux_t x; int y; } v; v.x = m; return v.y;  }
-static inline Kit_Mux_t  Kit_Int2Mux( int m )        { union { Kit_Mux_t x; int y; } v; v.y = m; return v.x;  }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Derive BDD from the truth table for 5 variable functions.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-CloudNode * Kit_TruthToCloud5_rec( CloudManager * dd, unsigned uTruth, int nVars, int nVarsAll )
-{
-    static unsigned uVars[5] = { 0xAAAAAAAA, 0xCCCCCCCC, 0xF0F0F0F0, 0xFF00FF00, 0xFFFF0000 };
-    CloudNode * pCof0, * pCof1;
-    unsigned uCof0, uCof1;
-    assert( nVars <= 5 );
-    if ( uTruth == 0 )
-        return dd->zero;
-    if ( uTruth == ~0 )
-        return dd->one;
-    if ( nVars == 1 )
-    {
-        if ( uTruth == uVars[0] )
-            return dd->vars[nVarsAll-1];
-        if ( uTruth == ~uVars[0] )
-            return Cloud_Not(dd->vars[nVarsAll-1]);
-        assert( 0 );
-    }
-//    Count++;
-    assert( nVars > 1 );
-    uCof0 = uTruth & ~uVars[nVars-1];
-    uCof1 = uTruth &  uVars[nVars-1];
-    uCof0 |= uCof0 << (1<<(nVars-1));
-    uCof1 |= uCof1 >> (1<<(nVars-1));
-    if ( uCof0 == uCof1 )
-        return Kit_TruthToCloud5_rec( dd, uCof0, nVars - 1, nVarsAll );
-    if ( uCof0 == ~uCof1 )
-    {
-        pCof0 = Kit_TruthToCloud5_rec( dd, uCof0, nVars - 1, nVarsAll );
-        pCof1 = Cloud_Not( pCof0 );
-    }
-    else
-    {
-        pCof0 = Kit_TruthToCloud5_rec( dd, uCof0, nVars - 1, nVarsAll );
-        pCof1 = Kit_TruthToCloud5_rec( dd, uCof1, nVars - 1, nVarsAll );
-    }
-    return Cloud_MakeNode( dd, nVarsAll - nVars, pCof1, pCof0 );
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Compute BDD for the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-CloudNode * Kit_TruthToCloud_rec( CloudManager * dd, unsigned * pTruth, int nVars, int nVarsAll )
-{
-    CloudNode * pCof0, * pCof1;
-    unsigned * pTruth0, * pTruth1;
-    if ( nVars <= 5 )
-        return Kit_TruthToCloud5_rec( dd, pTruth[0], nVars, nVarsAll );
-    if ( Kit_TruthIsConst0(pTruth, nVars) )
-        return dd->zero;
-    if ( Kit_TruthIsConst1(pTruth, nVars) )
-        return dd->one;
-//    Count++;
-    pTruth0 = pTruth;
-    pTruth1 = pTruth + Kit_TruthWordNum(nVars-1);
-    if ( Kit_TruthIsEqual( pTruth0, pTruth1, nVars - 1 ) )
-        return Kit_TruthToCloud_rec( dd, pTruth0, nVars - 1, nVarsAll );
-    if ( Kit_TruthIsOpposite( pTruth0, pTruth1, nVars - 1 ) )
-    {
-        pCof0 = Kit_TruthToCloud_rec( dd, pTruth0, nVars - 1, nVarsAll );
-        pCof1 = Cloud_Not( pCof0 );
-    }
-    else
-    {
-        pCof0 = Kit_TruthToCloud_rec( dd, pTruth0, nVars - 1, nVarsAll );
-        pCof1 = Kit_TruthToCloud_rec( dd, pTruth1, nVars - 1, nVarsAll );
-    }
-    return Cloud_MakeNode( dd, nVarsAll - nVars, pCof1, pCof0 );
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Compute BDD for the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-CloudNode * Kit_TruthToCloud( CloudManager * dd, unsigned * pTruth, int nVars )
-{
-    CloudNode * pRes;
-    pRes = Kit_TruthToCloud_rec( dd, pTruth, nVars, nVars );
-//    printf( "%d/%d  ", Count, Cloud_DagSize(dd, pRes) );
-    return pRes;
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Transforms the array of BDDs into the integer array.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-int Kit_CreateCloud( CloudManager * dd, CloudNode * pFunc, Vec_Int_t * vNodes )
-{
-    Kit_Mux_t Mux;
-    int nNodes, i;
-    // collect BDD nodes
-    nNodes = Cloud_DagCollect( dd, pFunc );
-    if ( nNodes >= (1<<12) ) // because in Kit_Mux_t edge is 12 bit
-        return 0;
-    assert( nNodes == Cloud_DagSize( dd, pFunc ) );
-    assert( nNodes < dd->nNodesLimit );
-    Vec_IntClear( vNodes );
-    Vec_IntPush( vNodes, 0 ); // const1 node
-    dd->ppNodes[0]->s = 0;
-    for ( i = 1; i < nNodes; i++ )
-    {
-        dd->ppNodes[i]->s = i;
-        Mux.v = dd->ppNodes[i]->v;
-        Mux.t = dd->ppNodes[i]->t->s;
-        Mux.e = Cloud_Regular(dd->ppNodes[i]->e)->s;
-        Mux.c = Cloud_IsComplement(dd->ppNodes[i]->e); 
-        Mux.i = (i == nNodes - 1)? Cloud_IsComplement(pFunc) : 0;
-        // put the MUX into the array
-        Vec_IntPush( vNodes, Kit_Mux2Int(Mux) );
-    }
-    assert( Vec_IntSize(vNodes) == nNodes );
-    // reset signatures
-    for ( i = 0; i < nNodes; i++ )
-        dd->ppNodes[i]->s = dd->nSignCur;
-    return 1;
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Transforms the array of BDDs into the integer array.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-int Kit_CreateCloudFromTruth( CloudManager * dd, unsigned * pTruth, int nVars, Vec_Int_t * vNodes )
-{
-    CloudNode * pFunc;
-    Cloud_Restart( dd );
-    pFunc = Kit_TruthToCloud( dd, pTruth, nVars );
-    Vec_IntClear( vNodes );
-    return Kit_CreateCloud( dd, pFunc, vNodes );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes composition of truth tables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Kit_CloudToTruth( Vec_Int_t * vNodes, int nVars, Vec_Ptr_t * vStore, int fInv )
-{
-    unsigned * pThis, * pFan0, * pFan1;
-    Kit_Mux_t Mux;
-    int i, Entry;
-    assert( Vec_IntSize(vNodes) <= Vec_PtrSize(vStore) );
-    pThis = (unsigned *)Vec_PtrEntry( vStore, 0 );
-    Kit_TruthFill( pThis, nVars );
-    Vec_IntForEachEntryStart( vNodes, Entry, i, 1 )
-    {
-        Mux = Kit_Int2Mux(Entry);
-        assert( (int)Mux.e < i && (int)Mux.t < i && (int)Mux.v < nVars );          
-        pFan0 = (unsigned *)Vec_PtrEntry( vStore, Mux.e );
-        pFan1 = (unsigned *)Vec_PtrEntry( vStore, Mux.t );
-        pThis = (unsigned *)Vec_PtrEntry( vStore, i );
-        Kit_TruthMuxVarPhase( pThis, pFan0, pFan1, nVars, fInv? Mux.v : nVars-1-Mux.v, Mux.c );
-    } 
-    // complement the result
-    if ( Mux.i )
-        Kit_TruthNot( pThis, pThis, nVars );
-    return pThis;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes composition of truth tables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Kit_TruthCompose( CloudManager * dd, unsigned * pTruth, int nVars, 
-    unsigned ** pInputs, int nVarsAll, Vec_Ptr_t * vStore, Vec_Int_t * vNodes )
-{
-    CloudNode * pFunc;
-    unsigned * pThis, * pFan0, * pFan1;
-    Kit_Mux_t Mux;
-    int i, Entry, RetValue;
-    // derive BDD from truth table
-    Cloud_Restart( dd );
-    pFunc = Kit_TruthToCloud( dd, pTruth, nVars );
-    // convert it into nodes
-    RetValue = Kit_CreateCloud( dd, pFunc, vNodes );
-    if ( RetValue == 0 )
-        printf( "Kit_TruthCompose(): Internal failure!!!\n" );
-    // verify the result
-//    pFan0 = Kit_CloudToTruth( vNodes, nVars, vStore, 0 );
-//    if ( !Kit_TruthIsEqual( pTruth, pFan0, nVars ) )
-//        printf( "Failed!\n" );
-    // compute truth table from the BDD
-    assert( Vec_IntSize(vNodes) <= Vec_PtrSize(vStore) );
-    pThis = (unsigned *)Vec_PtrEntry( vStore, 0 );
-    Kit_TruthFill( pThis, nVarsAll );
-    Vec_IntForEachEntryStart( vNodes, Entry, i, 1 )
-    {
-        Mux = Kit_Int2Mux(Entry);
-        pFan0 = (unsigned *)Vec_PtrEntry( vStore, Mux.e );
-        pFan1 = (unsigned *)Vec_PtrEntry( vStore, Mux.t );
-        pThis = (unsigned *)Vec_PtrEntry( vStore, i );
-        Kit_TruthMuxPhase( pThis, pFan0, pFan1, pInputs[nVars-1-Mux.v], nVarsAll, Mux.c );
-    }
-    // complement the result
-    if ( Mux.i )
-        Kit_TruthNot( pThis, pThis, nVarsAll );
-    return pThis;
-}
-
-/**Function********************************************************************
-
-  Synopsis    [Compute BDD for the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-******************************************************************************/
-void Kit_TruthCofSupports( Vec_Int_t * vBddDir, Vec_Int_t * vBddInv, int nVars, Vec_Int_t * vMemory, unsigned * puSupps )
-{
-    Kit_Mux_t Mux;
-    unsigned * puSuppAll;
-    unsigned * pThis = NULL; // Suppress "might be used uninitialized"
-    unsigned * pFan0, * pFan1;
-    int i, v, Var, Entry, nSupps;
-    nSupps = 2 * nVars;
-
-    // extend storage
-    if ( Vec_IntSize( vMemory ) < nSupps * Vec_IntSize(vBddDir) )
-        Vec_IntGrow( vMemory, nSupps * Vec_IntSize(vBddDir) );
-    puSuppAll = (unsigned *)Vec_IntArray( vMemory );
-    // clear storage for the const node
-    memset( puSuppAll, 0, sizeof(unsigned) * nSupps );
-    // compute supports from nodes
-    Vec_IntForEachEntryStart( vBddDir, Entry, i, 1 )
-    {
-        Mux = Kit_Int2Mux(Entry);
-        Var = nVars - 1 - Mux.v;
-        pFan0 = puSuppAll + nSupps * Mux.e;
-        pFan1 = puSuppAll + nSupps * Mux.t;
-        pThis = puSuppAll + nSupps * i;
-        for ( v = 0; v < nSupps; v++ )
-            pThis[v] = pFan0[v] | pFan1[v] | (1<<Var);
-        assert( pFan0[2*Var + 0] == pFan0[2*Var + 1] );
-        assert( pFan1[2*Var + 0] == pFan1[2*Var + 1] );
-        pThis[2*Var + 0] = pFan0[2*Var + 0];// | pFan0[2*Var + 1];
-        pThis[2*Var + 1] = pFan1[2*Var + 0];// | pFan1[2*Var + 1];
-    }
-    // copy the result
-    memcpy( puSupps, pThis, sizeof(unsigned) * nSupps );
-    // compute the inverse
-
-    // extend storage
-    if ( Vec_IntSize( vMemory ) < nSupps * Vec_IntSize(vBddInv) )
-        Vec_IntGrow( vMemory, nSupps * Vec_IntSize(vBddInv) );
-    puSuppAll = (unsigned *)Vec_IntArray( vMemory );
-    // clear storage for the const node
-    memset( puSuppAll, 0, sizeof(unsigned) * nSupps );
-    // compute supports from nodes
-    Vec_IntForEachEntryStart( vBddInv, Entry, i, 1 )
-    {
-        Mux = Kit_Int2Mux(Entry);
-//        Var = nVars - 1 - Mux.v;
-        Var = Mux.v;
-        pFan0 = puSuppAll + nSupps * Mux.e;
-        pFan1 = puSuppAll + nSupps * Mux.t;
-        pThis = puSuppAll + nSupps * i;
-        for ( v = 0; v < nSupps; v++ )
-            pThis[v] = pFan0[v] | pFan1[v] | (1<<Var);
-        assert( pFan0[2*Var + 0] == pFan0[2*Var + 1] );
-        assert( pFan1[2*Var + 0] == pFan1[2*Var + 1] );
-        pThis[2*Var + 0] = pFan0[2*Var + 0];// | pFan0[2*Var + 1];
-        pThis[2*Var + 1] = pFan1[2*Var + 0];// | pFan1[2*Var + 1];
-    }
-
-    // merge supports
-    for ( Var = 0; Var < nSupps; Var++ )
-        puSupps[Var] = (puSupps[Var] & Kit_BitMask(Var/2)) | (pThis[Var] & ~Kit_BitMask(Var/2));
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/kitDec.c b/src/aig/kit/kitDec.c
deleted file mode 100644
index afc7ef6c..00000000
--- a/src/aig/kit/kitDec.c
+++ /dev/null
@@ -1,343 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kitDec.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [Decomposition manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - November 18, 2009.]
-
-  Revision    [$Id: kitDec.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// decomposition manager
-typedef struct Kit_ManDec_t_ Kit_ManDec_t;
-struct Kit_ManDec_t_ 
-{
-    int             nVarsMax;     // the max number of variables
-    int             nWordsMax;    // the max number of words
-    Vec_Ptr_t *     vTruthVars;   // elementary truth tables
-    Vec_Ptr_t *     vTruthNodes;  // internal truth tables
-    // current problem
-    int             nVarsIn;      // the current number of variables
-    Vec_Int_t *     vLutsIn;      // LUT truth tables
-    Vec_Int_t *     vSuppIn;      // LUT supports
-    char            ATimeIn[64];  // variable arrival times
-    // extracted information
-    unsigned *      pTruthIn;     // computed truth table
-    unsigned *      pTruthOut;    // computed truth table
-    int             nVarsOut;     // the current number of variables
-    int             nWordsOut;    // the current number of words
-    char            Order[32];    // new vars into old vars after supp minimization
-    // computed information
-    Vec_Int_t *     vLutsOut;     // problem decomposition
-    Vec_Int_t *     vSuppOut;     // problem decomposition
-    char            ATimeOut[64]; // variable arrival times
-};
-
-static inline int   Kit_DecOuputArrival( int nVars, Vec_Int_t * vLuts, char ATimes[] ) { return ATimes[nVars + Vec_IntSize(vLuts) - 1]; }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Starts Decmetry manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_ManDec_t * Kit_ManDecStart( int nVarsMax )
-{
-    Kit_ManDec_t * p;
-    assert( nVarsMax <= 20 );
-    p = ABC_CALLOC( Kit_ManDec_t, 1 );
-    p->nVarsMax   = nVarsMax;
-    p->nWordsMax  = Kit_TruthWordNum( p->nVarsMax );
-    p->vTruthVars = Vec_PtrAllocTruthTables( p->nVarsMax );
-    p->vTruthNodes = Vec_PtrAllocSimInfo( 64, p->nWordsMax );
-    p->vLutsIn    = Vec_IntAlloc( 50 );
-    p->vSuppIn    = Vec_IntAlloc( 50 );
-    p->vLutsOut   = Vec_IntAlloc( 50 );
-    p->vSuppOut   = Vec_IntAlloc( 50 );
-    p->pTruthIn   = ABC_ALLOC( unsigned, p->nWordsMax );
-    p->pTruthOut  = ABC_ALLOC( unsigned, p->nWordsMax );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops Decmetry manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_ManDecStop( Kit_ManDec_t * p )
-{
-    ABC_FREE( p->pTruthIn );
-    ABC_FREE( p->pTruthOut );
-    Vec_IntFreeP( &p->vLutsIn );
-    Vec_IntFreeP( &p->vSuppIn );
-    Vec_IntFreeP( &p->vLutsOut );
-    Vec_IntFreeP( &p->vSuppOut );
-    Vec_PtrFreeP( &p->vTruthVars );
-    Vec_PtrFreeP( &p->vTruthNodes );
-    ABC_FREE( p );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Deriving timing information for the decomposed structure.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DecComputeOuputArrival( int nVars, Vec_Int_t * vSupps, int LutSize, char ATimesIn[], char ATimesOut[] )
-{
-    int i, v, iVar, nLuts, Delay;
-    nLuts = Vec_IntSize(vSupps) / LutSize;
-    assert( nLuts > 0 );
-    assert( Vec_IntSize(vSupps) % LutSize == 0 );
-    for ( v = 0; v < nVars; v++ )
-        ATimesOut[v] = ATimesIn[v];
-    for ( v = 0; v < nLuts; v++ )
-    {
-        Delay = 0;
-        for ( i = 0; i < LutSize; i++ )
-        {
-            iVar = Vec_IntEntry( vSupps, v * LutSize + i );
-            assert( iVar < nVars + v );
-            Delay = ABC_MAX( Delay, ATimesOut[iVar] );
-        }
-        ATimesOut[nVars + v] = Delay + 1;
-    }
-    return ATimesOut[nVars + nLuts - 1];
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the truth table]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DecComputeTruthOne( int LutSize, unsigned * pTruthLut, int nVars, unsigned * pTruths[], unsigned * pTemp, unsigned * pRes )
-{
-    int i, v;
-    Kit_TruthClear( pRes, nVars );
-    for ( i = 0; i < (1<<LutSize); i++ )
-    {
-        if ( !Kit_TruthHasBit( pTruthLut, i ) )
-            continue;
-        Kit_TruthFill( pTemp, nVars );
-        for ( v = 0; v < LutSize; v++ )
-            if ( i & (1<<v) )
-                Kit_TruthAnd( pTemp, pTemp, pTruths[v], nVars );
-            else
-                Kit_TruthSharp( pTemp, pTemp, pTruths[v], nVars );
-        Kit_TruthOr( pRes, pRes, pTemp, nVars );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the truth table]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DecComputeTruth( Kit_ManDec_t * p, int nVars, Vec_Int_t * vSupps, int LutSize, Vec_Int_t * vLuts, unsigned * pRes )
-{
-    unsigned * pResult, * pTruthLuts, * pTruths[17];
-    int nTruthLutWords, i, v, iVar, nLuts;
-    nLuts = Vec_IntSize(vSupps) / LutSize;
-    pTruthLuts = Vec_IntArray( vLuts );
-    nTruthLutWords = Kit_TruthWordNum( LutSize );
-    assert( nLuts > 0 );
-    assert( Vec_IntSize(vSupps) % LutSize == 0 );
-    assert( nLuts * nTruthLutWords == Vec_IntSize(vLuts) );
-    for ( v = 0; v < nLuts; v++ )
-    {
-        for ( i = 0; i < LutSize; i++ )
-        {
-            iVar = Vec_IntEntry( vSupps, v * LutSize + i );
-            assert( iVar < nVars + v );
-            pTruths[i] = (iVar < nVars)? Vec_PtrEntry(p->vTruthVars, iVar) : Vec_PtrEntry(p->vTruthNodes, iVar-nVars);
-        }
-        pResult = (v == nLuts - 1) ? pRes : Vec_PtrEntry(p->vTruthNodes, v);
-        Kit_DecComputeTruthOne( LutSize, pTruthLuts, nVars, pTruths, Vec_PtrEntry(p->vTruthNodes, v+1), pResult );
-        pTruthLuts += nTruthLutWords;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the truth table]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DecComputePattern( int nVars, unsigned * pTruth, int LutSize, int Pattern[] )
-{
-    int nCofs = (1 << LutSize);
-    int i, k, nMyu = 0;
-    assert( LutSize <= 6 );
-    assert( LutSize < nVars );
-    if ( nVars - LutSize <= 5 )
-    {
-        unsigned uCofs[64];
-        int nBits = (1 << (nVars - LutSize));
-        for ( i = 0; i < nCofs; i++ )
-            uCofs[i] = (pTruth[(i*nBits)/32] >> ((i*nBits)%32)) & ((1<<nBits)-1);
-        for ( i = 0; i < nCofs; i++ )
-        {
-            for ( k = 0; k < nMyu; k++ )
-                if ( uCofs[i] == uCofs[k] )
-                {
-                    Pattern[i] = k;
-                    break;
-                }
-            if ( k == i )
-                Pattern[nMyu++] = i;
-        }
-    }
-    else
-    {
-        unsigned * puCofs[64];
-        int nWords = (1 << (nVars - LutSize - 5));
-        for ( i = 0; i < nCofs; i++ )
-            puCofs[i] = pTruth + nWords;
-        for ( i = 0; i < nCofs; i++ )
-        {
-            for ( k = 0; k < nMyu; k++ )
-                if ( Kit_TruthIsEqual( puCofs[i], puCofs[k], nVars - LutSize - 5 ) )
-                {
-                    Pattern[i] = k;
-                    break;
-                }
-            if ( k == i )
-                Pattern[nMyu++] = i;
-        }
-    }
-    return nMyu;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of shared variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DecComputeShared_rec( int Pattern[], int Vars[], int nVars, int Shared[], int iVarTry )
-{
-    int Pat0[32], Pat1[32], Shared0[5], Shared1[5], VarsNext[5];
-    int v, u, iVarsNext, iPat0, iPat1, m, nMints = (1 << nVars);
-    int nShared0, nShared1, nShared = 0;
-    for ( v = iVarTry; v < nVars; v++ )
-    {
-        iVarsNext = 0;
-        for ( u = 0; u < nVars; u++ )
-            if ( u == v )
-                VarsNext[iVarsNext++] = Vars[u];
-        iPat0 = iPat1 = 0;
-        for ( m = 0; m < nMints; m++ )
-            if ( m & (1 << v) )
-                Pat1[iPat1++] = m;
-            else
-                Pat0[iPat0++] = m;
-        assert( iPat0 == nMints / 2 );
-        assert( iPat1 == nMints / 2 );
-        nShared0 = Kit_DecComputeShared_rec( Pat0, VarsNext, nVars-1, Shared0, v + 1 );
-        if ( nShared0 == 0 )
-            continue;
-        nShared1 = Kit_DecComputeShared_rec( Pat1, VarsNext, nVars-1, Shared1, v + 1 );
-        if ( nShared1 == 0 )
-            continue;
-        Shared[nShared++] = v;
-        for ( u = 0; u < nShared0; u++ )
-        for ( m = 0; m < nShared1; m++ )
-            if ( Shared0[u] >= 0 && Shared1[m] >= 0 && Shared0[u] == Shared1[m] )
-            {
-                Shared[nShared++] = Shared0[u];
-                Shared0[u] = Shared1[m] = -1;
-            }
-        return nShared;
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of shared variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DecComputeShared( int Pattern[], int LutSize, int Shared[] )
-{
-    int i, Vars[6];
-    assert( LutSize <= 6 );
-    for ( i = 0; i < LutSize; i++ )
-        Vars[i] = i;
-    return Kit_DecComputeShared_rec( Pattern, Vars, LutSize, Shared, 0 );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/kitDsd.c b/src/aig/kit/kitDsd.c
deleted file mode 100644
index dffbe315..00000000
--- a/src/aig/kit/kitDsd.c
+++ /dev/null
@@ -1,3200 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kitDsd.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [Performs disjoint-support decomposition based on truth tables.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Dec 6, 2006.]
-
-  Revision    [$Id: kitDsd.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates the DSD manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_DsdMan_t * Kit_DsdManAlloc( int nVars, int nNodes )
-{
-    Kit_DsdMan_t * p;
-    p = ABC_ALLOC( Kit_DsdMan_t, 1 );
-    memset( p, 0, sizeof(Kit_DsdMan_t) );
-    p->nVars    = nVars;
-    p->nWords   = Kit_TruthWordNum( p->nVars );
-    p->vTtElems = Vec_PtrAllocTruthTables( p->nVars );
-    p->vTtNodes = Vec_PtrAllocSimInfo( nNodes, p->nWords );
-    p->dd       = Cloud_Init( 16, 14 );
-    p->vTtBdds  = Vec_PtrAllocSimInfo( (1<<12), p->nWords );
-    p->vNodes   = Vec_IntAlloc( 512 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocates the DSD manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdManFree( Kit_DsdMan_t * p )
-{
-    Cloud_Quit( p->dd );
-    Vec_IntFree( p->vNodes );
-    Vec_PtrFree( p->vTtBdds );
-    Vec_PtrFree( p->vTtElems );
-    Vec_PtrFree( p->vTtNodes );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates the DSD node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_DsdObj_t * Kit_DsdObjAlloc( Kit_DsdNtk_t * pNtk, Kit_Dsd_t Type, int nFans )
-{
-    Kit_DsdObj_t * pObj;
-    int nSize = sizeof(Kit_DsdObj_t) + sizeof(unsigned) * (Kit_DsdObjOffset(nFans) + (Type == KIT_DSD_PRIME) * Kit_TruthWordNum(nFans));
-    pObj = (Kit_DsdObj_t *)ABC_ALLOC( char, nSize );
-    memset( pObj, 0, nSize );
-    pObj->Id = pNtk->nVars + pNtk->nNodes;
-    pObj->Type = Type;
-    pObj->nFans = nFans;
-    pObj->Offset = Kit_DsdObjOffset( nFans );
-    // add the object
-    if ( pNtk->nNodes == pNtk->nNodesAlloc )
-    {
-        pNtk->nNodesAlloc *= 2;
-        pNtk->pNodes = ABC_REALLOC( Kit_DsdObj_t *, pNtk->pNodes, pNtk->nNodesAlloc ); 
-    }
-    assert( pNtk->nNodes < pNtk->nNodesAlloc );
-    pNtk->pNodes[pNtk->nNodes++] = pObj;
-    return pObj;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocates the DSD node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdObjFree( Kit_DsdNtk_t * p, Kit_DsdObj_t * pObj )
-{
-    ABC_FREE( pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates the DSD network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_DsdNtk_t * Kit_DsdNtkAlloc( int nVars )
-{
-    Kit_DsdNtk_t * pNtk;
-    pNtk = ABC_ALLOC( Kit_DsdNtk_t, 1 );
-    memset( pNtk, 0, sizeof(Kit_DsdNtk_t) );
-    pNtk->pNodes = ABC_ALLOC( Kit_DsdObj_t *, nVars+1 );
-    pNtk->nVars = nVars;
-    pNtk->nNodesAlloc = nVars+1;
-    pNtk->pMem = ABC_ALLOC( unsigned, 6 * Kit_TruthWordNum(nVars) );
-    return pNtk;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocate the DSD network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdNtkFree( Kit_DsdNtk_t * pNtk )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned i;
-    Kit_DsdNtkForEachObj( pNtk, pObj, i )
-        ABC_FREE( pObj );
-    ABC_FREE( pNtk->pSupps );
-    ABC_FREE( pNtk->pNodes );
-    ABC_FREE( pNtk->pMem );
-    ABC_FREE( pNtk );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints the hex unsigned into a file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdPrintHex( FILE * pFile, unsigned * pTruth, int nFans )
-{
-    int nDigits, Digit, k;
-    nDigits = (1 << nFans) / 4;
-    for ( k = nDigits - 1; k >= 0; k-- )
-    {
-        Digit = ((pTruth[k/8] >> ((k%8) * 4)) & 15);
-        if ( Digit < 10 )
-            fprintf( pFile, "%d", Digit );
-        else
-            fprintf( pFile, "%c", 'A' + Digit-10 );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints the hex unsigned into a file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Kit_DsdWriteHex( char * pBuff, unsigned * pTruth, int nFans )
-{
-    int nDigits, Digit, k;
-    nDigits = (1 << nFans) / 4;
-    for ( k = nDigits - 1; k >= 0; k-- )
-    {
-        Digit = ((pTruth[k/8] >> ((k%8) * 4)) & 15);
-        if ( Digit < 10 )
-            *pBuff++ = '0' + Digit;
-        else
-            *pBuff++ = 'A' + Digit-10;
-    }
-    return pBuff;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recursively print the DSD formula.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdPrint2_rec( FILE * pFile, Kit_DsdNtk_t * pNtk, int Id )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned iLit, i;
-    char Symbol;
-
-    pObj = Kit_DsdNtkObj( pNtk, Id );
-    if ( pObj == NULL )
-    {
-        assert( Id < pNtk->nVars );
-        fprintf( pFile, "%c", 'a' + Id );
-        return;
-    }
-
-    if ( pObj->Type == KIT_DSD_CONST1 )
-    {
-        assert( pObj->nFans == 0 );
-        fprintf( pFile, "Const1" );
-        return;
-    }
-
-    if ( pObj->Type == KIT_DSD_VAR )
-        assert( pObj->nFans == 1 );
-
-    if ( pObj->Type == KIT_DSD_AND )
-        Symbol = '*';
-    else if ( pObj->Type == KIT_DSD_XOR )
-        Symbol = '+';
-    else 
-        Symbol = ',';
-
-    if ( pObj->Type == KIT_DSD_PRIME )
-        fprintf( pFile, "[" );
-    else
-        fprintf( pFile, "(" );
-    Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-    {
-        if ( Kit_DsdLitIsCompl(iLit) ) 
-            fprintf( pFile, "!" );
-        Kit_DsdPrint2_rec( pFile, pNtk, Kit_DsdLit2Var(iLit) );
-        if ( i < pObj->nFans - 1 )
-            fprintf( pFile, "%c", Symbol );
-    }
-    if ( pObj->Type == KIT_DSD_PRIME )
-        fprintf( pFile, "]" );
-    else
-        fprintf( pFile, ")" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Print the DSD formula.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdPrint2( FILE * pFile, Kit_DsdNtk_t * pNtk )
-{
-//    fprintf( pFile, "F = " );
-    if ( Kit_DsdLitIsCompl(pNtk->Root) )
-        fprintf( pFile, "!" );
-    Kit_DsdPrint2_rec( pFile, pNtk, Kit_DsdLit2Var(pNtk->Root) );
-//    fprintf( pFile, "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recursively print the DSD formula.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdPrint_rec( FILE * pFile, Kit_DsdNtk_t * pNtk, int Id )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned iLit, i;
-    char Symbol;
-
-    pObj = Kit_DsdNtkObj( pNtk, Id );
-    if ( pObj == NULL )
-    {
-        assert( Id < pNtk->nVars );
-        fprintf( pFile, "%c", 'a' + Id );
-        return;
-    }
-
-    if ( pObj->Type == KIT_DSD_CONST1 )
-    {
-        assert( pObj->nFans == 0 );
-        fprintf( pFile, "Const1" );
-        return;
-    }
-
-    if ( pObj->Type == KIT_DSD_VAR )
-        assert( pObj->nFans == 1 );
-
-    if ( pObj->Type == KIT_DSD_AND )
-        Symbol = '*';
-    else if ( pObj->Type == KIT_DSD_XOR )
-        Symbol = '+';
-    else 
-        Symbol = ',';
-
-    if ( pObj->Type == KIT_DSD_PRIME )
-        Kit_DsdPrintHex( pFile, Kit_DsdObjTruth(pObj), pObj->nFans );
-
-    fprintf( pFile, "(" );
-    Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-    {
-        if ( Kit_DsdLitIsCompl(iLit) ) 
-            fprintf( pFile, "!" );
-        Kit_DsdPrint_rec( pFile, pNtk, Kit_DsdLit2Var(iLit) );
-        if ( i < pObj->nFans - 1 )
-            fprintf( pFile, "%c", Symbol );
-    }
-    fprintf( pFile, ")" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Print the DSD formula.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdPrint( FILE * pFile, Kit_DsdNtk_t * pNtk )
-{
-    fprintf( pFile, "F = " );
-    if ( Kit_DsdLitIsCompl(pNtk->Root) )
-        fprintf( pFile, "!" );
-    Kit_DsdPrint_rec( pFile, pNtk, Kit_DsdLit2Var(pNtk->Root) );
-//    fprintf( pFile, "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recursively print the DSD formula.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Kit_DsdWrite_rec( char * pBuff, Kit_DsdNtk_t * pNtk, int Id )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned iLit, i;
-    char Symbol;
-
-    pObj = Kit_DsdNtkObj( pNtk, Id );
-    if ( pObj == NULL )
-    {
-        assert( Id < pNtk->nVars );
-        *pBuff++ = 'a' + Id;
-        return pBuff;
-    }
-
-    if ( pObj->Type == KIT_DSD_CONST1 )
-    {
-        assert( pObj->nFans == 0 );
-        sprintf( pBuff, "%s", "Const1" );
-        return pBuff + strlen("Const1");
-    }
-
-    if ( pObj->Type == KIT_DSD_VAR )
-        assert( pObj->nFans == 1 );
-
-    if ( pObj->Type == KIT_DSD_AND )
-        Symbol = '*';
-    else if ( pObj->Type == KIT_DSD_XOR )
-        Symbol = '+';
-    else 
-        Symbol = ',';
-
-    if ( pObj->Type == KIT_DSD_PRIME )
-        pBuff = Kit_DsdWriteHex( pBuff, Kit_DsdObjTruth(pObj), pObj->nFans );
-
-    *pBuff++ = '(';
-    Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-    {
-        if ( Kit_DsdLitIsCompl(iLit) ) 
-            *pBuff++ = '!';
-        pBuff = Kit_DsdWrite_rec( pBuff, pNtk, Kit_DsdLit2Var(iLit) );
-        if ( i < pObj->nFans - 1 )
-            *pBuff++ = Symbol;
-    }
-    *pBuff++ = ')';
-    return pBuff;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Print the DSD formula.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdWrite( char * pBuff, Kit_DsdNtk_t * pNtk )
-{
-    if ( Kit_DsdLitIsCompl(pNtk->Root) )
-        *pBuff++ = '!';
-    pBuff = Kit_DsdWrite_rec( pBuff, pNtk, Kit_DsdLit2Var(pNtk->Root) );
-    *pBuff = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Print the DSD formula.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdPrintExpanded( Kit_DsdNtk_t * pNtk )
-{
-    Kit_DsdNtk_t * pTemp;
-    pTemp = Kit_DsdExpand( pNtk );
-    Kit_DsdPrint( stdout, pTemp );
-    Kit_DsdNtkFree( pTemp );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Print the DSD formula.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdPrintFromTruth( unsigned * pTruth, int nVars )
-{
-    Kit_DsdNtk_t * pTemp, * pTemp2;
-//    pTemp = Kit_DsdDecomposeMux( pTruth, nVars, 5 );
-    pTemp = Kit_DsdDecomposeMux( pTruth, nVars, 8 );
-//    Kit_DsdPrintExpanded( pTemp );
-    pTemp2 = Kit_DsdExpand( pTemp );
-    Kit_DsdPrint( stdout, pTemp2 );
-    Kit_DsdVerify( pTemp2, pTruth, nVars ); 
-    Kit_DsdNtkFree( pTemp2 );
-    Kit_DsdNtkFree( pTemp );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Print the DSD formula.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdPrintFromTruth2( FILE * pFile, unsigned * pTruth, int nVars )
-{
-    Kit_DsdNtk_t * pTemp, * pTemp2;
-    pTemp = Kit_DsdDecomposeMux( pTruth, nVars, 0 );
-    pTemp2 = Kit_DsdExpand( pTemp );
-    Kit_DsdPrint2( pFile, pTemp2 );
-    Kit_DsdVerify( pTemp2, pTruth, nVars ); 
-    Kit_DsdNtkFree( pTemp2 );
-    Kit_DsdNtkFree( pTemp );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Print the DSD formula.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdWriteFromTruth( char * pBuffer, unsigned * pTruth, int nVars )
-{
-    Kit_DsdNtk_t * pTemp, * pTemp2;
-//    pTemp = Kit_DsdDecomposeMux( pTruth, nVars, 5 );
-    pTemp = Kit_DsdDecomposeMux( pTruth, nVars, 8 );
-//    Kit_DsdPrintExpanded( pTemp );
-    pTemp2 = Kit_DsdExpand( pTemp );
-    Kit_DsdWrite( pBuffer, pTemp2 );
-    Kit_DsdVerify( pTemp2, pTruth, nVars ); 
-    Kit_DsdNtkFree( pTemp2 );
-    Kit_DsdNtkFree( pTemp );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the truth table of the DSD node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Kit_DsdTruthComputeNode_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, int Id )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned * pTruthRes, * pTruthFans[16], * pTruthTemp;
-    unsigned i, iLit, fCompl;
-//    unsigned m, nMints, * pTruthPrime, * pTruthMint; 
-
-    // get the node with this ID
-    pObj = Kit_DsdNtkObj( pNtk, Id );
-    pTruthRes = (unsigned *)Vec_PtrEntry( p->vTtNodes, Id );
-
-    // special case: literal of an internal node
-    if ( pObj == NULL )
-    {
-        assert( Id < pNtk->nVars );
-        return pTruthRes;
-    }
-
-    // constant node
-    if ( pObj->Type == KIT_DSD_CONST1 )
-    {
-        assert( pObj->nFans == 0 );
-        Kit_TruthFill( pTruthRes, pNtk->nVars );
-        return pTruthRes;
-    }
-
-    // elementary variable node
-    if ( pObj->Type == KIT_DSD_VAR )
-    {
-        assert( pObj->nFans == 1 );
-        iLit = pObj->pFans[0];
-        pTruthFans[0] = Kit_DsdTruthComputeNode_rec( p, pNtk, Kit_DsdLit2Var(iLit) );
-        if ( Kit_DsdLitIsCompl(iLit) )
-            Kit_TruthNot( pTruthRes, pTruthFans[0], pNtk->nVars );
-        else
-            Kit_TruthCopy( pTruthRes, pTruthFans[0], pNtk->nVars );
-        return pTruthRes;
-    }
-
-    // collect the truth tables of the fanins
-    Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-        pTruthFans[i] = Kit_DsdTruthComputeNode_rec( p, pNtk, Kit_DsdLit2Var(iLit) );
-    // create the truth table
-
-    // simple gates
-    if ( pObj->Type == KIT_DSD_AND )
-    {
-        Kit_TruthFill( pTruthRes, pNtk->nVars );
-        Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-            Kit_TruthAndPhase( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars, 0, Kit_DsdLitIsCompl(iLit) );
-        return pTruthRes;
-    }
-    if ( pObj->Type == KIT_DSD_XOR )
-    {
-        Kit_TruthClear( pTruthRes, pNtk->nVars );
-        fCompl = 0;
-        Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-        {
-            Kit_TruthXor( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars );
-            fCompl ^= Kit_DsdLitIsCompl(iLit);
-        }
-        if ( fCompl )
-            Kit_TruthNot( pTruthRes, pTruthRes, pNtk->nVars );
-        return pTruthRes;
-    }
-    assert( pObj->Type == KIT_DSD_PRIME );
-/*
-    // get the truth table of the prime node
-    pTruthPrime = Kit_DsdObjTruth( pObj );
-    // get storage for the temporary minterm
-    pTruthMint = Vec_PtrEntry(p->vTtNodes, pNtk->nVars + pNtk->nNodes);
-    // go through the minterms
-    nMints = (1 << pObj->nFans);
-    Kit_TruthClear( pTruthRes, pNtk->nVars );
-    for ( m = 0; m < nMints; m++ )
-    {
-        if ( !Kit_TruthHasBit(pTruthPrime, m) )
-            continue;
-        Kit_TruthFill( pTruthMint, pNtk->nVars );
-        Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-            Kit_TruthAndPhase( pTruthMint, pTruthMint, pTruthFans[i], pNtk->nVars, 0, ((m & (1<<i)) == 0) ^ Kit_DsdLitIsCompl(iLit) );
-        Kit_TruthOr( pTruthRes, pTruthRes, pTruthMint, pNtk->nVars );
-    }
-*/
-    Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-        if ( Kit_DsdLitIsCompl(iLit) )
-            Kit_TruthNot( pTruthFans[i], pTruthFans[i], pNtk->nVars );
-    pTruthTemp = Kit_TruthCompose( p->dd, Kit_DsdObjTruth(pObj), pObj->nFans, pTruthFans, pNtk->nVars, p->vTtBdds, p->vNodes );
-    Kit_TruthCopy( pTruthRes, pTruthTemp, pNtk->nVars );
-    return pTruthRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the truth table of the DSD network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Kit_DsdTruthCompute( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk )
-{
-    unsigned * pTruthRes;
-    int i;
-    // assign elementary truth ables
-    assert( pNtk->nVars <= p->nVars );
-    for ( i = 0; i < (int)pNtk->nVars; i++ )
-        Kit_TruthCopy( (unsigned *)Vec_PtrEntry(p->vTtNodes, i), (unsigned *)Vec_PtrEntry(p->vTtElems, i), p->nVars );
-    // compute truth table for each node
-    pTruthRes = Kit_DsdTruthComputeNode_rec( p, pNtk, Kit_DsdLit2Var(pNtk->Root) );
-    // complement the truth table if needed
-    if ( Kit_DsdLitIsCompl(pNtk->Root) )
-        Kit_TruthNot( pTruthRes, pTruthRes, pNtk->nVars );
-    return pTruthRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the truth table of the DSD node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Kit_DsdTruthComputeNodeOne_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, int Id, unsigned uSupp )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned * pTruthRes, * pTruthFans[16], * pTruthTemp;
-    unsigned i, iLit, fCompl, nPartial = 0;
-//    unsigned m, nMints, * pTruthPrime, * pTruthMint; 
-
-    // get the node with this ID
-    pObj = Kit_DsdNtkObj( pNtk, Id );
-    pTruthRes = (unsigned *)Vec_PtrEntry( p->vTtNodes, Id );
-
-    // special case: literal of an internal node
-    if ( pObj == NULL )
-    {
-        assert( Id < pNtk->nVars );
-        assert( !uSupp || uSupp != (uSupp & ~(1<<Id)) );
-        return pTruthRes;
-    }
-
-    // constant node
-    if ( pObj->Type == KIT_DSD_CONST1 )
-    {
-        assert( pObj->nFans == 0 );
-        Kit_TruthFill( pTruthRes, pNtk->nVars );
-        return pTruthRes;
-    }
-
-    // elementary variable node
-    if ( pObj->Type == KIT_DSD_VAR )
-    {
-        assert( pObj->nFans == 1 );
-        iLit = pObj->pFans[0];
-        assert( Kit_DsdLitIsLeaf( pNtk, iLit ) );
-        pTruthFans[0] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Kit_DsdLit2Var(iLit), uSupp );
-        if ( Kit_DsdLitIsCompl(iLit) )
-            Kit_TruthNot( pTruthRes, pTruthFans[0], pNtk->nVars );
-        else
-            Kit_TruthCopy( pTruthRes, pTruthFans[0], pNtk->nVars );
-        return pTruthRes;
-    }
-
-    // collect the truth tables of the fanins
-    if ( uSupp )
-    {
-        Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-            if ( uSupp != (uSupp & ~Kit_DsdLitSupport(pNtk, iLit)) )
-                pTruthFans[i] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Kit_DsdLit2Var(iLit), uSupp );
-            else
-            {
-                pTruthFans[i] = NULL;
-                nPartial = 1;
-            }
-    }
-    else
-    {
-        Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-            pTruthFans[i] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Kit_DsdLit2Var(iLit), uSupp );
-    }
-    // create the truth table
-
-    // simple gates
-    if ( pObj->Type == KIT_DSD_AND )
-    {
-        Kit_TruthFill( pTruthRes, pNtk->nVars );
-        Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-            if ( pTruthFans[i] )
-                Kit_TruthAndPhase( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars, 0, Kit_DsdLitIsCompl(iLit) );
-        return pTruthRes;
-    }
-    if ( pObj->Type == KIT_DSD_XOR )
-    {
-        Kit_TruthClear( pTruthRes, pNtk->nVars );
-        fCompl = 0;
-        Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-        {
-            if ( pTruthFans[i] )
-            {
-                Kit_TruthXor( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars );
-                fCompl ^= Kit_DsdLitIsCompl(iLit);
-            }
-        }
-        if ( fCompl )
-            Kit_TruthNot( pTruthRes, pTruthRes, pNtk->nVars );
-        return pTruthRes;
-    }
-    assert( pObj->Type == KIT_DSD_PRIME );
-
-    if ( uSupp && nPartial )
-    {
-        // find the only non-empty component
-        Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-            if ( pTruthFans[i] )
-                break;
-        assert( i < pObj->nFans );
-        return pTruthFans[i];
-    }
-/*
-    // get the truth table of the prime node
-    pTruthPrime = Kit_DsdObjTruth( pObj );
-    // get storage for the temporary minterm
-    pTruthMint = Vec_PtrEntry(p->vTtNodes, pNtk->nVars + pNtk->nNodes);
-    // go through the minterms
-    nMints = (1 << pObj->nFans);
-    Kit_TruthClear( pTruthRes, pNtk->nVars );
-    for ( m = 0; m < nMints; m++ )
-    {
-        if ( !Kit_TruthHasBit(pTruthPrime, m) )
-            continue;
-        Kit_TruthFill( pTruthMint, pNtk->nVars );
-        Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-            Kit_TruthAndPhase( pTruthMint, pTruthMint, pTruthFans[i], pNtk->nVars, 0, ((m & (1<<i)) == 0) ^ Kit_DsdLitIsCompl(iLit) );
-        Kit_TruthOr( pTruthRes, pTruthRes, pTruthMint, pNtk->nVars );
-    }
-*/
-    Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-        if ( Kit_DsdLitIsCompl(iLit) )
-            Kit_TruthNot( pTruthFans[i], pTruthFans[i], pNtk->nVars );
-    pTruthTemp = Kit_TruthCompose( p->dd, Kit_DsdObjTruth(pObj), pObj->nFans, pTruthFans, pNtk->nVars, p->vTtBdds, p->vNodes );
-    Kit_TruthCopy( pTruthRes, pTruthTemp, pNtk->nVars );
-    return pTruthRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the truth table of the DSD network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Kit_DsdTruthComputeOne( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, unsigned uSupp )
-{
-    unsigned * pTruthRes;
-    int i;
-    // if support is specified, request that supports are available
-    if ( uSupp )
-        Kit_DsdGetSupports( pNtk );
-    // assign elementary truth tables
-    assert( pNtk->nVars <= p->nVars );
-    for ( i = 0; i < (int)pNtk->nVars; i++ )
-        Kit_TruthCopy( (unsigned *)Vec_PtrEntry(p->vTtNodes, i), (unsigned *)Vec_PtrEntry(p->vTtElems, i), p->nVars );
-    // compute truth table for each node
-    pTruthRes = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Kit_DsdLit2Var(pNtk->Root), uSupp );
-    // complement the truth table if needed
-    if ( Kit_DsdLitIsCompl(pNtk->Root) )
-        Kit_TruthNot( pTruthRes, pTruthRes, pNtk->nVars );
-    return pTruthRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the truth table of the DSD node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Kit_DsdTruthComputeNodeTwo_rec( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, int Id, unsigned uSupp, int iVar, unsigned * pTruthDec )
-{
-    Kit_DsdObj_t * pObj;
-    int pfBoundSet[16];
-    unsigned * pTruthRes, * pTruthFans[16], * pTruthTemp;
-    unsigned i, iLit, fCompl, nPartial, uSuppFan, uSuppCur;
-//    unsigned m, nMints, * pTruthPrime, * pTruthMint; 
-    assert( uSupp > 0 );
-
-    // get the node with this ID
-    pObj = Kit_DsdNtkObj( pNtk, Id );
-    pTruthRes = (unsigned *)Vec_PtrEntry( p->vTtNodes, Id );
-    if ( pObj == NULL )
-    {
-        assert( Id < pNtk->nVars );
-        return pTruthRes;
-    }
-    assert( pObj->Type != KIT_DSD_CONST1 );
-    assert( pObj->Type != KIT_DSD_VAR );
-
-    // count the number of intersecting fanins 
-    // collect the total support of the intersecting fanins
-    nPartial = 0;
-    uSuppFan = 0;
-    Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-    {
-        uSuppCur = Kit_DsdLitSupport(pNtk, iLit);
-        if ( uSupp & uSuppCur )
-        {
-            nPartial++;
-            uSuppFan |= uSuppCur;
-        }
-    }
-
-    // if there is no intersection, or full intersection, use simple procedure
-    if ( nPartial == 0 || nPartial == pObj->nFans )
-        return Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Id, 0 );
-
-    // if support of the component includes some other variables
-    // we need to continue constructing it as usual by the two-function procedure
-    if ( uSuppFan != (uSuppFan & uSupp) )
-    {
-        assert( nPartial == 1 );
-//        return Kit_DsdTruthComputeNodeTwo_rec( p, pNtk, Id, uSupp, iVar, pTruthDec );
-        Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-        {
-            if ( uSupp & Kit_DsdLitSupport(pNtk, iLit) )
-                pTruthFans[i] = Kit_DsdTruthComputeNodeTwo_rec( p, pNtk, Kit_DsdLit2Var(iLit), uSupp, iVar, pTruthDec );
-            else
-                pTruthFans[i] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Kit_DsdLit2Var(iLit), 0 );
-        }
-
-        // create composition/decomposition functions
-        if ( pObj->Type == KIT_DSD_AND )
-        {
-            Kit_TruthFill( pTruthRes, pNtk->nVars );
-            Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-                Kit_TruthAndPhase( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars, 0, Kit_DsdLitIsCompl(iLit) );
-            return pTruthRes;
-        }
-        if ( pObj->Type == KIT_DSD_XOR )
-        {
-            Kit_TruthClear( pTruthRes, pNtk->nVars );
-            fCompl = 0;
-            Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-            {
-                fCompl ^= Kit_DsdLitIsCompl(iLit);
-                Kit_TruthXor( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars );
-            }
-            if ( fCompl )
-                Kit_TruthNot( pTruthRes, pTruthRes, pNtk->nVars );
-            return pTruthRes;
-        }
-        assert( pObj->Type == KIT_DSD_PRIME );
-    }
-    else
-    {
-        assert( uSuppFan == (uSuppFan & uSupp) );
-        assert( nPartial < pObj->nFans );
-        // the support of the insecting component(s) is contained in the bound-set
-        // and yet there are components that are not contained in the bound set
-
-        // solve the fanins and collect info, which components belong to the bound set
-        Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-        {
-            pTruthFans[i] = Kit_DsdTruthComputeNodeOne_rec( p, pNtk, Kit_DsdLit2Var(iLit), 0 );
-            pfBoundSet[i] = (int)((uSupp & Kit_DsdLitSupport(pNtk, iLit)) > 0);
-        }
-
-        // create composition/decomposition functions
-        if ( pObj->Type == KIT_DSD_AND )
-        {
-            Kit_TruthIthVar( pTruthRes, pNtk->nVars, iVar );
-            Kit_TruthFill( pTruthDec, pNtk->nVars );
-            Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-                if ( pfBoundSet[i] )
-                    Kit_TruthAndPhase( pTruthDec, pTruthDec, pTruthFans[i], pNtk->nVars, 0, Kit_DsdLitIsCompl(iLit) );
-                else
-                    Kit_TruthAndPhase( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars, 0, Kit_DsdLitIsCompl(iLit) );
-            return pTruthRes;
-        }
-        if ( pObj->Type == KIT_DSD_XOR )
-        {
-            Kit_TruthIthVar( pTruthRes, pNtk->nVars, iVar );
-            Kit_TruthClear( pTruthDec, pNtk->nVars );
-            fCompl = 0;
-            Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-            {
-                fCompl ^= Kit_DsdLitIsCompl(iLit);
-                if ( pfBoundSet[i] )
-                    Kit_TruthXor( pTruthDec, pTruthDec, pTruthFans[i], pNtk->nVars );
-                else
-                    Kit_TruthXor( pTruthRes, pTruthRes, pTruthFans[i], pNtk->nVars );
-            }
-            if ( fCompl )
-                Kit_TruthNot( pTruthRes, pTruthRes, pNtk->nVars );
-            return pTruthRes;
-        }
-        assert( pObj->Type == KIT_DSD_PRIME );
-        assert( nPartial == 1 );
-
-        // find the only non-empty component
-        Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-            if ( pfBoundSet[i] )
-                break;
-        assert( i < pObj->nFans );
-
-        // save this component as the decomposed function
-        Kit_TruthCopy( pTruthDec, pTruthFans[i], pNtk->nVars );
-        // set the corresponding component to be the new variable
-        Kit_TruthIthVar( pTruthFans[i], pNtk->nVars, iVar );
-    }
-/*
-    // get the truth table of the prime node
-    pTruthPrime = Kit_DsdObjTruth( pObj );
-    // get storage for the temporary minterm
-    pTruthMint = Vec_PtrEntry(p->vTtNodes, pNtk->nVars + pNtk->nNodes);
-    // go through the minterms
-    nMints = (1 << pObj->nFans);
-    Kit_TruthClear( pTruthRes, pNtk->nVars );
-    for ( m = 0; m < nMints; m++ )
-    {
-        if ( !Kit_TruthHasBit(pTruthPrime, m) )
-            continue;
-        Kit_TruthFill( pTruthMint, pNtk->nVars );
-        Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-            Kit_TruthAndPhase( pTruthMint, pTruthMint, pTruthFans[i], pNtk->nVars, 0, ((m & (1<<i)) == 0) ^ Kit_DsdLitIsCompl(iLit) );
-        Kit_TruthOr( pTruthRes, pTruthRes, pTruthMint, pNtk->nVars );
-    }
-*/
-//    Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-//        assert( !Kit_DsdLitIsCompl(iLit) );
-    Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-        if ( Kit_DsdLitIsCompl(iLit) )
-            Kit_TruthNot( pTruthFans[i], pTruthFans[i], pNtk->nVars );
-    pTruthTemp = Kit_TruthCompose( p->dd, Kit_DsdObjTruth(pObj), pObj->nFans, pTruthFans, pNtk->nVars, p->vTtBdds, p->vNodes );
-    Kit_TruthCopy( pTruthRes, pTruthTemp, pNtk->nVars );
-    return pTruthRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the truth table of the DSD network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Kit_DsdTruthComputeTwo( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, unsigned uSupp, int iVar, unsigned * pTruthDec )
-{
-    unsigned * pTruthRes, uSuppAll;
-    int i;
-    assert( uSupp > 0 );
-    assert( pNtk->nVars <= p->nVars );
-    // compute support of all nodes
-    uSuppAll = Kit_DsdGetSupports( pNtk );
-    // consider special case - there is no overlap
-    if ( (uSupp & uSuppAll) == 0 )
-    {
-        Kit_TruthClear( pTruthDec, pNtk->nVars );
-        return Kit_DsdTruthCompute( p, pNtk );
-    }
-    // consider special case - support is fully contained
-    if ( (uSupp & uSuppAll) == uSuppAll )
-    {
-        pTruthRes = Kit_DsdTruthCompute( p, pNtk );
-        Kit_TruthCopy( pTruthDec, pTruthRes, pNtk->nVars );
-        Kit_TruthIthVar( pTruthRes, pNtk->nVars, iVar );
-        return pTruthRes;
-    }
-    // assign elementary truth tables
-    for ( i = 0; i < (int)pNtk->nVars; i++ )
-        Kit_TruthCopy( (unsigned *)Vec_PtrEntry(p->vTtNodes, i), (unsigned *)Vec_PtrEntry(p->vTtElems, i), p->nVars );
-    // compute truth table for each node
-    pTruthRes = Kit_DsdTruthComputeNodeTwo_rec( p, pNtk, Kit_DsdLit2Var(pNtk->Root), uSupp, iVar, pTruthDec );
-    // complement the truth table if needed
-    if ( Kit_DsdLitIsCompl(pNtk->Root) )
-        Kit_TruthNot( pTruthRes, pTruthRes, pNtk->nVars );
-    return pTruthRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the truth table of the DSD network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdTruth( Kit_DsdNtk_t * pNtk, unsigned * pTruthRes )
-{
-    Kit_DsdMan_t * p;
-    unsigned * pTruth;
-    p = Kit_DsdManAlloc( pNtk->nVars, Kit_DsdNtkObjNum(pNtk) );
-    pTruth = Kit_DsdTruthCompute( p, pNtk );
-    Kit_TruthCopy( pTruthRes, pTruth, pNtk->nVars );
-    Kit_DsdManFree( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the truth table of the DSD network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdTruthPartialTwo( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, unsigned uSupp, int iVar, unsigned * pTruthCo, unsigned * pTruthDec )
-{
-    unsigned * pTruth = Kit_DsdTruthComputeTwo( p, pNtk, uSupp, iVar, pTruthDec );
-    if ( pTruthCo )
-        Kit_TruthCopy( pTruthCo, pTruth, pNtk->nVars );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the truth table of the DSD network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdTruthPartial( Kit_DsdMan_t * p, Kit_DsdNtk_t * pNtk, unsigned * pTruthRes, unsigned uSupp )
-{
-    unsigned * pTruth = Kit_DsdTruthComputeOne( p, pNtk, uSupp );
-    Kit_TruthCopy( pTruthRes, pTruth, pNtk->nVars );
-/*
-    // verification
-    {
-        // compute the same function using different procedure
-        unsigned * pTruthTemp = Vec_PtrEntry(p->vTtNodes, pNtk->nVars + pNtk->nNodes + 1);
-        pNtk->pSupps = NULL;
-        Kit_DsdTruthComputeTwo( p, pNtk, uSupp, -1, pTruthTemp );
-//        if ( !Kit_TruthIsEqual( pTruthTemp, pTruthRes, pNtk->nVars ) )
-        if ( !Kit_TruthIsEqualWithPhase( pTruthTemp, pTruthRes, pNtk->nVars ) )
-        {
-            printf( "Verification FAILED!\n" );
-            Kit_DsdPrint( stdout, pNtk );
-            Kit_DsdPrintFromTruth( pTruthRes, pNtk->nVars );
-            Kit_DsdPrintFromTruth( pTruthTemp, pNtk->nVars );
-        }
-//        else
-//            printf( "Verification successful.\n" );
-    }
-*/
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of blocks of the given number of inputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DsdCountLuts_rec( Kit_DsdNtk_t * pNtk, int nLutSize, int Id, int * pCounter )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned iLit, i, Res0, Res1;
-    pObj = Kit_DsdNtkObj( pNtk, Id );
-    if ( pObj == NULL )
-        return 0;
-    if ( pObj->Type == KIT_DSD_AND || pObj->Type == KIT_DSD_XOR )
-    {
-        assert( pObj->nFans == 2 );
-        Res0 = Kit_DsdCountLuts_rec( pNtk, nLutSize, Kit_DsdLit2Var(pObj->pFans[0]), pCounter );
-        Res1 = Kit_DsdCountLuts_rec( pNtk, nLutSize, Kit_DsdLit2Var(pObj->pFans[1]), pCounter );
-        if ( Res0 == 0 && Res1 > 0 )
-            return Res1 - 1;
-        if ( Res0 > 0 && Res1 == 0 )
-            return Res0 - 1;
-        (*pCounter)++;
-        return nLutSize - 2;
-    }
-    assert( pObj->Type == KIT_DSD_PRIME );
-    if ( (int)pObj->nFans > nLutSize ) //+ 1 )
-    {
-        *pCounter = 1000;
-        return 0;
-    }
-    Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-        Kit_DsdCountLuts_rec( pNtk, nLutSize, Kit_DsdLit2Var(iLit), pCounter );
-    (*pCounter)++;
-//    if ( (int)pObj->nFans == nLutSize + 1 )
-//        (*pCounter)++;
-    return nLutSize - pObj->nFans;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of blocks of the given number of inputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DsdCountLuts( Kit_DsdNtk_t * pNtk, int nLutSize )
-{
-    int Counter = 0;
-    if ( Kit_DsdNtkRoot(pNtk)->Type == KIT_DSD_CONST1 )
-        return 0;
-    if ( Kit_DsdNtkRoot(pNtk)->Type == KIT_DSD_VAR )
-        return 0;
-    Kit_DsdCountLuts_rec( pNtk, nLutSize, Kit_DsdLit2Var(pNtk->Root), &Counter );
-    if ( Counter >= 1000 )
-        return -1;
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the size of the largest non-DSD block.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DsdNonDsdSizeMax( Kit_DsdNtk_t * pNtk )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned i, nSizeMax = 0;
-    Kit_DsdNtkForEachObj( pNtk, pObj, i )
-    {
-        if ( pObj->Type != KIT_DSD_PRIME )
-            continue;
-        if ( nSizeMax < pObj->nFans )
-            nSizeMax = pObj->nFans;
-    }
-    return nSizeMax;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the largest non-DSD block.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_DsdObj_t * Kit_DsdNonDsdPrimeMax( Kit_DsdNtk_t * pNtk )
-{
-    Kit_DsdObj_t * pObj, * pObjMax = NULL;
-    unsigned i, nSizeMax = 0;
-    Kit_DsdNtkForEachObj( pNtk, pObj, i )
-    {
-        if ( pObj->Type != KIT_DSD_PRIME )
-            continue;
-        if ( nSizeMax < pObj->nFans )
-        {
-            nSizeMax = pObj->nFans;
-            pObjMax = pObj;
-        }
-    }
-    return pObjMax;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds the union of supports of the non-DSD blocks.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Kit_DsdNonDsdSupports( Kit_DsdNtk_t * pNtk )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned i, uSupport = 0;
-//    ABC_FREE( pNtk->pSupps );
-    Kit_DsdGetSupports( pNtk );
-    Kit_DsdNtkForEachObj( pNtk, pObj, i )
-    {
-        if ( pObj->Type != KIT_DSD_PRIME )
-            continue;
-        uSupport |= Kit_DsdLitSupport( pNtk, Kit_DsdVar2Lit(pObj->Id,0) );
-    }
-    return uSupport;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Expands the node.]
-
-  Description [Returns the new literal.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdExpandCollectAnd_rec( Kit_DsdNtk_t * p, unsigned iLit, unsigned * piLitsNew, int * nLitsNew )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned i, iLitFanin;
-    // check the end of the supergate
-    pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
-    if ( Kit_DsdLitIsCompl(iLit) || Kit_DsdLit2Var(iLit) < p->nVars || pObj->Type != KIT_DSD_AND )
-    {
-        piLitsNew[(*nLitsNew)++] = iLit;
-        return;
-    }
-    // iterate through the fanins
-    Kit_DsdObjForEachFanin( p, pObj, iLitFanin, i )
-        Kit_DsdExpandCollectAnd_rec( p, iLitFanin, piLitsNew, nLitsNew );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Expands the node.]
-
-  Description [Returns the new literal.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdExpandCollectXor_rec( Kit_DsdNtk_t * p, unsigned iLit, unsigned * piLitsNew, int * nLitsNew )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned i, iLitFanin;
-    // check the end of the supergate
-    pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
-    if ( Kit_DsdLit2Var(iLit) < p->nVars || pObj->Type != KIT_DSD_XOR )
-    {
-        piLitsNew[(*nLitsNew)++] = iLit;
-        return;
-    }
-    // iterate through the fanins
-    pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
-    Kit_DsdObjForEachFanin( p, pObj, iLitFanin, i )
-        Kit_DsdExpandCollectXor_rec( p, iLitFanin, piLitsNew, nLitsNew );
-    // if the literal was complemented, pass the complemented attribute somewhere
-    if ( Kit_DsdLitIsCompl(iLit) )
-        piLitsNew[0] = Kit_DsdLitNot( piLitsNew[0] );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Expands the node.]
-
-  Description [Returns the new literal.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DsdExpandNode_rec( Kit_DsdNtk_t * pNew, Kit_DsdNtk_t * p, int iLit )
-{
-    unsigned * pTruth, * pTruthNew;
-    unsigned i, iLitFanin, piLitsNew[16], nLitsNew = 0;
-    Kit_DsdObj_t * pObj, * pObjNew;
-
-    // consider the case of simple gate
-    pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
-    if ( pObj == NULL )
-        return iLit;
-    if ( pObj->Type == KIT_DSD_AND )
-    {
-        Kit_DsdExpandCollectAnd_rec( p, Kit_DsdLitRegular(iLit), piLitsNew, (int *)&nLitsNew );
-        pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_AND, nLitsNew );
-        for ( i = 0; i < pObjNew->nFans; i++ )
-            pObjNew->pFans[i] = Kit_DsdExpandNode_rec( pNew, p, piLitsNew[i] );
-        return Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(iLit) );
-    }
-    if ( pObj->Type == KIT_DSD_XOR )
-    {
-        int fCompl = Kit_DsdLitIsCompl(iLit);
-        Kit_DsdExpandCollectXor_rec( p, Kit_DsdLitRegular(iLit), piLitsNew, (int *)&nLitsNew );
-        pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_XOR, nLitsNew );
-        for ( i = 0; i < pObjNew->nFans; i++ )
-        {
-            pObjNew->pFans[i] = Kit_DsdExpandNode_rec( pNew, p, Kit_DsdLitRegular(piLitsNew[i]) );
-            fCompl ^= Kit_DsdLitIsCompl(piLitsNew[i]);
-        }
-        return Kit_DsdVar2Lit( pObjNew->Id, fCompl );
-    }
-    assert( pObj->Type == KIT_DSD_PRIME );
-
-    // create new PRIME node
-    pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_PRIME, pObj->nFans );
-    // copy the truth table
-    pTruth = Kit_DsdObjTruth( pObj );
-    pTruthNew = Kit_DsdObjTruth( pObjNew );
-    Kit_TruthCopy( pTruthNew, pTruth, pObj->nFans );
-    // create fanins
-    Kit_DsdObjForEachFanin( pNtk, pObj, iLitFanin, i )
-    {
-        pObjNew->pFans[i] = Kit_DsdExpandNode_rec( pNew, p, iLitFanin );
-        // complement the corresponding inputs of the truth table
-        if ( Kit_DsdLitIsCompl(pObjNew->pFans[i]) )
-        {
-            pObjNew->pFans[i] = Kit_DsdLitRegular(pObjNew->pFans[i]);
-            Kit_TruthChangePhase( pTruthNew, pObjNew->nFans, i );
-        }
-    }
-
-    if ( pObj->nFans == 3 && 
-        (pTruthNew[0] == 0xCACACACA || pTruthNew[0] == 0xC5C5C5C5 || 
-         pTruthNew[0] == 0x3A3A3A3A || pTruthNew[0] == 0x35353535) )
-    {
-        // translate into regular MUXes
-        if ( pTruthNew[0] == 0xC5C5C5C5 )
-            pObjNew->pFans[0] = Kit_DsdLitNot(pObjNew->pFans[0]);
-        else if ( pTruthNew[0] == 0x3A3A3A3A )
-            pObjNew->pFans[1] = Kit_DsdLitNot(pObjNew->pFans[1]);
-        else if ( pTruthNew[0] == 0x35353535 )
-        {
-            pObjNew->pFans[0] = Kit_DsdLitNot(pObjNew->pFans[0]);
-            pObjNew->pFans[1] = Kit_DsdLitNot(pObjNew->pFans[1]);
-        }
-        pTruthNew[0] = 0xCACACACA;
-        // resolve the complemented control input
-        if ( Kit_DsdLitIsCompl(pObjNew->pFans[2]) )
-        {
-            unsigned char Temp = pObjNew->pFans[0];
-            pObjNew->pFans[0] = pObjNew->pFans[1];
-            pObjNew->pFans[1] = Temp;
-            pObjNew->pFans[2] = Kit_DsdLitNot(pObjNew->pFans[2]);
-        }
-        // resolve the complemented true input
-        if ( Kit_DsdLitIsCompl(pObjNew->pFans[1]) )
-        {
-            iLit = Kit_DsdLitNot(iLit);
-            pObjNew->pFans[0] = Kit_DsdLitNot(pObjNew->pFans[0]);
-            pObjNew->pFans[1] = Kit_DsdLitNot(pObjNew->pFans[1]);
-        }
-        return Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(iLit) );
-    }
-    else
-    {
-        // if the incoming phase is complemented, absorb it into the prime node
-        if ( Kit_DsdLitIsCompl(iLit) )
-            Kit_TruthNot( pTruthNew, pTruthNew, pObj->nFans );
-        return Kit_DsdVar2Lit( pObjNew->Id, 0 );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Expands the network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_DsdNtk_t * Kit_DsdExpand( Kit_DsdNtk_t * p )
-{
-    Kit_DsdNtk_t * pNew;
-    Kit_DsdObj_t * pObjNew;
-    assert( p->nVars <= 16 );
-    // create a new network
-    pNew = Kit_DsdNtkAlloc( p->nVars );
-    // consider simple special cases
-    if ( Kit_DsdNtkRoot(p)->Type == KIT_DSD_CONST1 )
-    {
-        pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_CONST1, 0 );
-        pNew->Root = Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(p->Root) );
-        return pNew;
-    }
-    if ( Kit_DsdNtkRoot(p)->Type == KIT_DSD_VAR )
-    {
-        pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_VAR, 1 );
-        pObjNew->pFans[0] = Kit_DsdNtkRoot(p)->pFans[0];
-        pNew->Root = Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(p->Root) );
-        return pNew;
-    }
-    // convert the root node
-    pNew->Root = Kit_DsdExpandNode_rec( pNew, p, p->Root );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sorts the literals by their support.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdCompSort( int pPrios[], unsigned uSupps[], unsigned char * piLits, int nVars, unsigned piLitsRes[] )
-{
-    int nSuppSizes[16], Priority[16], pOrder[16];
-    int i, k, iVarBest, SuppMax, PrioMax;
-    // compute support sizes and priorities of the components
-    for ( i = 0; i < nVars; i++ )
-    {
-        assert( uSupps[i] );
-        pOrder[i] = i;
-        Priority[i] = KIT_INFINITY;
-        for ( k = 0; k < 16; k++ )
-            if ( uSupps[i] & (1 << k) )
-                Priority[i] = KIT_MIN( Priority[i], pPrios[k] );
-        assert( Priority[i] != 16 );
-        nSuppSizes[i] = Kit_WordCountOnes(uSupps[i]);
-    }
-    // sort the components by pririty
-    Extra_BubbleSort( pOrder, Priority, nVars, 0 );
-    // find the component by with largest size and lowest priority
-    iVarBest = -1;
-    SuppMax  = 0;
-    PrioMax  = 0;
-    for ( i = 0; i < nVars; i++ )
-    {
-        if ( SuppMax < nSuppSizes[i] || (SuppMax == nSuppSizes[i] && PrioMax < Priority[i]) )
-        {
-            SuppMax  = nSuppSizes[i];
-            PrioMax  = Priority[i];
-            iVarBest = i;
-        }
-    }
-    assert( iVarBest != -1 );
-    // copy the resulting literals
-    k = 0;
-    piLitsRes[k++] = piLits[iVarBest];
-    for ( i = 0; i < nVars; i++ )
-    {
-        if ( pOrder[i] == iVarBest )
-            continue;
-        piLitsRes[k++] = piLits[pOrder[i]];
-    }
-    assert( k == nVars );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Shrinks multi-input nodes.]
-
-  Description [Takes the array of variable priorities pPrios.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DsdShrink_rec( Kit_DsdNtk_t * pNew, Kit_DsdNtk_t * p, int iLit, int pPrios[] )
-{
-    Kit_DsdObj_t * pObj;
-    Kit_DsdObj_t * pObjNew = NULL; // Suppress "might be used uninitialized"
-    unsigned * pTruth, * pTruthNew;
-    unsigned i, piLitsNew[16], uSupps[16];
-    int iLitFanin, iLitNew;
-
-    // consider the case of simple gate
-    pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
-    if ( pObj == NULL )
-        return iLit;
-    if ( pObj->Type == KIT_DSD_AND )
-    {
-        // get the supports
-        Kit_DsdObjForEachFanin( p, pObj, iLitFanin, i )
-            uSupps[i] = Kit_DsdLitSupport( p, iLitFanin );
-        // put the largest component last
-        // sort other components in the decreasing order of priority of their vars
-        Kit_DsdCompSort( pPrios, uSupps, pObj->pFans, pObj->nFans, piLitsNew );
-        // construct the two-input node network
-        iLitNew = Kit_DsdShrink_rec( pNew, p, piLitsNew[0], pPrios );
-        for ( i = 1; i < pObj->nFans; i++ )
-        {
-            pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_AND, 2 );
-            pObjNew->pFans[0] = Kit_DsdShrink_rec( pNew, p, piLitsNew[i], pPrios );
-            pObjNew->pFans[1] = iLitNew;
-            iLitNew = Kit_DsdVar2Lit( pObjNew->Id, 0 );
-        }
-        return Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(iLit) );
-    }
-    if ( pObj->Type == KIT_DSD_XOR )
-    {
-        // get the supports
-        Kit_DsdObjForEachFanin( p, pObj, iLitFanin, i )
-        {
-            assert( !Kit_DsdLitIsCompl(iLitFanin) );
-            uSupps[i] = Kit_DsdLitSupport( p, iLitFanin );
-        }
-        // put the largest component last
-        // sort other components in the decreasing order of priority of their vars
-        Kit_DsdCompSort( pPrios, uSupps, pObj->pFans, pObj->nFans, piLitsNew );
-        // construct the two-input node network
-        iLitNew = Kit_DsdShrink_rec( pNew, p, piLitsNew[0], pPrios );
-        for ( i = 1; i < pObj->nFans; i++ )
-        {
-            pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_XOR, 2 );
-            pObjNew->pFans[0] = Kit_DsdShrink_rec( pNew, p, piLitsNew[i], pPrios );
-            pObjNew->pFans[1] = iLitNew;
-            iLitNew = Kit_DsdVar2Lit( pObjNew->Id, 0 );
-        }
-        return Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(iLit) );
-    }
-    assert( pObj->Type == KIT_DSD_PRIME );
-
-    // create new PRIME node
-    pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_PRIME, pObj->nFans );
-    // copy the truth table
-    pTruth = Kit_DsdObjTruth( pObj );
-    pTruthNew = Kit_DsdObjTruth( pObjNew );
-    Kit_TruthCopy( pTruthNew, pTruth, pObj->nFans );
-    // create fanins
-    Kit_DsdObjForEachFanin( pNtk, pObj, iLitFanin, i )
-    {
-        pObjNew->pFans[i] = Kit_DsdShrink_rec( pNew, p, iLitFanin, pPrios );
-        // complement the corresponding inputs of the truth table
-        if ( Kit_DsdLitIsCompl(pObjNew->pFans[i]) )
-        {
-            pObjNew->pFans[i] = Kit_DsdLitRegular(pObjNew->pFans[i]);
-            Kit_TruthChangePhase( pTruthNew, pObjNew->nFans, i );
-        }
-    }
-    // if the incoming phase is complemented, absorb it into the prime node
-    if ( Kit_DsdLitIsCompl(iLit) )
-        Kit_TruthNot( pTruthNew, pTruthNew, pObj->nFans );
-    return Kit_DsdVar2Lit( pObjNew->Id, 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Shrinks the network.]
-
-  Description [Transforms the network to have two-input nodes so that the
-  higher-ordered nodes were decomposed out first.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_DsdNtk_t * Kit_DsdShrink( Kit_DsdNtk_t * p, int pPrios[] )
-{
-    Kit_DsdNtk_t * pNew;
-    Kit_DsdObj_t * pObjNew;
-    assert( p->nVars <= 16 );
-    // create a new network
-    pNew = Kit_DsdNtkAlloc( p->nVars );
-    // consider simple special cases
-    if ( Kit_DsdNtkRoot(p)->Type == KIT_DSD_CONST1 )
-    {
-        pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_CONST1, 0 );
-        pNew->Root = Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(p->Root) );
-        return pNew;
-    }
-    if ( Kit_DsdNtkRoot(p)->Type == KIT_DSD_VAR )
-    {
-        pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_VAR, 1 );
-        pObjNew->pFans[0] = Kit_DsdNtkRoot(p)->pFans[0];
-        pNew->Root = Kit_DsdVar2Lit( pObjNew->Id, Kit_DsdLitIsCompl(p->Root) );
-        return pNew;
-    }
-    // convert the root node
-    pNew->Root = Kit_DsdShrink_rec( pNew, p, p->Root, pPrios );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Rotates the network.]
-
-  Description [Transforms prime nodes to have the fanin with the
-  highest frequency of supports go first.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdRotate( Kit_DsdNtk_t * p, int pFreqs[] )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned * pIn, * pOut, * pTemp, k;
-    int i, v, Temp, uSuppFanin, iFaninLit, WeightMax, FaninMax, nSwaps;
-    int Weights[16];
-    // go through the prime nodes
-    Kit_DsdNtkForEachObj( p, pObj, i )
-    {
-        if ( pObj->Type != KIT_DSD_PRIME )
-            continue;
-        // count the fanin frequencies
-        Kit_DsdObjForEachFanin( p, pObj, iFaninLit, k )
-        {
-            uSuppFanin = Kit_DsdLitSupport( p, iFaninLit );
-            Weights[k] = 0;
-            for ( v = 0; v < 16; v++ )
-                if ( uSuppFanin & (1 << v) )
-                    Weights[k] += pFreqs[v] - 1;
-        }
-        // find the most frequent fanin
-        WeightMax = 0; 
-        FaninMax = -1;
-        for ( k = 0; k < pObj->nFans; k++ )
-            if ( WeightMax < Weights[k] )
-            {
-                WeightMax = Weights[k];
-                FaninMax = k;
-            }
-        // no need to reorder if there are no frequent fanins
-        if ( FaninMax == -1 )
-            continue;
-        // move the fanins number k to the first place
-        nSwaps = 0;
-        pIn = Kit_DsdObjTruth(pObj);
-        pOut = p->pMem;
-//        for ( v = FaninMax; v < ((int)pObj->nFans)-1; v++ )
-        for ( v = FaninMax-1; v >= 0; v-- )
-        {
-            // swap the fanins
-            Temp = pObj->pFans[v];
-            pObj->pFans[v] = pObj->pFans[v+1];
-            pObj->pFans[v+1] = Temp;
-            // swap the truth table variables
-            Kit_TruthSwapAdjacentVars( pOut, pIn, pObj->nFans, v );
-            pTemp = pIn; pIn = pOut; pOut = pTemp;
-            nSwaps++;
-        }
-        if ( nSwaps & 1 )
-            Kit_TruthCopy( pOut, pIn, pObj->nFans );
-    }    
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compute the support.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Kit_DsdGetSupports_rec( Kit_DsdNtk_t * p, int iLit )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned uSupport, k;
-    int iFaninLit;
-    pObj = Kit_DsdNtkObj( p, Kit_DsdLit2Var(iLit) );
-    if ( pObj == NULL )
-        return Kit_DsdLitSupport( p, iLit );
-    uSupport = 0;
-    Kit_DsdObjForEachFanin( p, pObj, iFaninLit, k )
-        uSupport |= Kit_DsdGetSupports_rec( p, iFaninLit );
-    p->pSupps[pObj->Id - p->nVars] = uSupport;
-    assert( uSupport <= 0xFFFF );
-    return uSupport;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compute the support.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Kit_DsdGetSupports( Kit_DsdNtk_t * p )
-{
-    Kit_DsdObj_t * pRoot;
-    unsigned uSupport;
-    assert( p->pSupps == NULL );
-    p->pSupps = ABC_ALLOC( unsigned, p->nNodes );
-    // consider simple special cases
-    pRoot = Kit_DsdNtkRoot(p);
-    if ( pRoot->Type == KIT_DSD_CONST1 )
-    {
-        assert( p->nNodes == 1 );
-        uSupport = p->pSupps[0] = 0;
-    }
-    if ( pRoot->Type == KIT_DSD_VAR )
-    {
-        assert( p->nNodes == 1 );
-        uSupport = p->pSupps[0] = Kit_DsdLitSupport( p, pRoot->pFans[0] );
-    }
-    else
-        uSupport = Kit_DsdGetSupports_rec( p, p->Root );
-    assert( uSupport <= 0xFFFF );
-    return uSupport;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if there is a component with more than 3 inputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DsdFindLargeBox_rec( Kit_DsdNtk_t * pNtk, int Id, int Size )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned iLit, i, RetValue;
-    pObj = Kit_DsdNtkObj( pNtk, Id );
-    if ( pObj == NULL )
-        return 0;
-    if ( pObj->Type == KIT_DSD_PRIME && (int)pObj->nFans > Size )
-        return 1;
-    RetValue = 0;
-    Kit_DsdObjForEachFanin( pNtk, pObj, iLit, i )
-        RetValue |= Kit_DsdFindLargeBox_rec( pNtk, Kit_DsdLit2Var(iLit), Size );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if there is a component with more than 3 inputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DsdFindLargeBox( Kit_DsdNtk_t * pNtk, int Size )
-{
-    return Kit_DsdFindLargeBox_rec( pNtk, Kit_DsdLit2Var(pNtk->Root), Size );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the non-DSD 4-var func is implementable with two 3-LUTs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DsdRootNodeHasCommonVars( Kit_DsdObj_t * pObj0, Kit_DsdObj_t * pObj1 )
-{
-    unsigned i, k;
-    for ( i = 0; i < pObj0->nFans; i++ )
-    {
-        if ( Kit_DsdLit2Var(pObj0->pFans[i]) >= 4 )
-            continue;
-        for ( k = 0; k < pObj1->nFans; k++ )
-            if ( Kit_DsdLit2Var(pObj0->pFans[i]) == Kit_DsdLit2Var(pObj1->pFans[k]) )
-                return 1;
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the non-DSD 4-var func is implementable with two 3-LUTs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DsdCheckVar4Dec2( Kit_DsdNtk_t * pNtk0, Kit_DsdNtk_t * pNtk1 )
-{
-    assert( pNtk0->nVars == 4 );
-    assert( pNtk1->nVars == 4 );
-    if ( Kit_DsdFindLargeBox(pNtk0, 2) )
-        return 0;
-    if ( Kit_DsdFindLargeBox(pNtk1, 2) )
-        return 0;
-    return Kit_DsdRootNodeHasCommonVars( Kit_DsdNtkRoot(pNtk0), Kit_DsdNtkRoot(pNtk1) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs decomposition of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdDecompose_rec( Kit_DsdNtk_t * pNtk, Kit_DsdObj_t * pObj, unsigned uSupp, unsigned char * pPar, int nDecMux )
-{
-    Kit_DsdObj_t * pRes, * pRes0, * pRes1;
-    int nWords = Kit_TruthWordNum(pObj->nFans);
-    unsigned * pTruth = Kit_DsdObjTruth(pObj);
-    unsigned * pCofs2[2] = { pNtk->pMem, pNtk->pMem + nWords };
-    unsigned * pCofs4[2][2] = { {pNtk->pMem + 2 * nWords, pNtk->pMem + 3 * nWords}, {pNtk->pMem + 4 * nWords, pNtk->pMem + 5 * nWords} };
-    int i, iLit0, iLit1, nFans0, nFans1, nPairs;
-    int fEquals[2][2], fOppos, fPairs[4][4];
-    unsigned j, k, nFansNew, uSupp0, uSupp1;
-
-    assert( pObj->nFans > 0 );
-    assert( pObj->Type == KIT_DSD_PRIME );
-    assert( uSupp == (uSupp0 = (unsigned)Kit_TruthSupport(pTruth, pObj->nFans)) );
-
-    // compress the truth table
-    if ( uSupp != Kit_BitMask(pObj->nFans) )
-    {
-        nFansNew = Kit_WordCountOnes(uSupp);
-        Kit_TruthShrink( pNtk->pMem, pTruth, nFansNew, pObj->nFans, uSupp, 1 );
-        for ( j = k = 0; j < pObj->nFans; j++ )
-            if ( uSupp & (1 << j) )
-                pObj->pFans[k++] = pObj->pFans[j];
-        assert( k == nFansNew );
-        pObj->nFans = k;
-        uSupp = Kit_BitMask(pObj->nFans);
-    }
-
-    // consider the single variable case
-    if ( pObj->nFans == 1 )
-    {
-        pObj->Type = KIT_DSD_NONE;
-        if ( pTruth[0] == 0x55555555 )
-            pObj->pFans[0] = Kit_DsdLitNot(pObj->pFans[0]);
-        else
-            assert( pTruth[0] == 0xAAAAAAAA );
-        // update the parent pointer
-        *pPar = Kit_DsdLitNotCond( pObj->pFans[0], Kit_DsdLitIsCompl(*pPar) );
-        return;
-    }
-
-    // decompose the output
-    if ( !pObj->fMark )
-    for ( i = pObj->nFans - 1; i >= 0; i-- )
-    {
-        // get the two-variable cofactors
-        Kit_TruthCofactor0New( pCofs2[0], pTruth, pObj->nFans, i );
-        Kit_TruthCofactor1New( pCofs2[1], pTruth, pObj->nFans, i );
-//        assert( !Kit_TruthVarInSupport( pCofs2[0], pObj->nFans, i) );
-//        assert( !Kit_TruthVarInSupport( pCofs2[1], pObj->nFans, i) );
-        // get the constant cofs
-        fEquals[0][0] = Kit_TruthIsConst0( pCofs2[0], pObj->nFans );
-        fEquals[0][1] = Kit_TruthIsConst0( pCofs2[1], pObj->nFans );
-        fEquals[1][0] = Kit_TruthIsConst1( pCofs2[0], pObj->nFans );
-        fEquals[1][1] = Kit_TruthIsConst1( pCofs2[1], pObj->nFans );
-        fOppos        = Kit_TruthIsOpposite( pCofs2[0], pCofs2[1], pObj->nFans );
-        assert( !Kit_TruthIsEqual(pCofs2[0], pCofs2[1], pObj->nFans) );
-        if ( fEquals[0][0] + fEquals[0][1] + fEquals[1][0] + fEquals[1][1] + fOppos == 0 )
-        {
-            // check the MUX decomposition
-            uSupp0 = Kit_TruthSupport( pCofs2[0], pObj->nFans );
-            uSupp1 = Kit_TruthSupport( pCofs2[1], pObj->nFans );
-            assert( uSupp == (uSupp0 | uSupp1 | (1<<i)) );
-            if ( uSupp0 & uSupp1 )
-                continue;
-            // perform MUX decomposition
-            pRes0 = Kit_DsdObjAlloc( pNtk, KIT_DSD_PRIME, pObj->nFans );
-            pRes1 = Kit_DsdObjAlloc( pNtk, KIT_DSD_PRIME, pObj->nFans );
-            for ( k = 0; k < pObj->nFans; k++ )
-            {
-                pRes0->pFans[k] = (uSupp0 & (1 << k))? pObj->pFans[k] : 127;
-                pRes1->pFans[k] = (uSupp1 & (1 << k))? pObj->pFans[k] : 127;
-            }
-            Kit_TruthCopy( Kit_DsdObjTruth(pRes0), pCofs2[0], pObj->nFans );        
-            Kit_TruthCopy( Kit_DsdObjTruth(pRes1), pCofs2[1], pObj->nFans ); 
-            // update the current one
-            assert( pObj->Type == KIT_DSD_PRIME );
-            pTruth[0] = 0xCACACACA;
-            pObj->nFans = 3;
-            pObj->pFans[2] = pObj->pFans[i];
-            pObj->pFans[0] = 2*pRes0->Id; pRes0->nRefs++;
-            pObj->pFans[1] = 2*pRes1->Id; pRes1->nRefs++;
-            // call recursively
-            Kit_DsdDecompose_rec( pNtk, pRes0, uSupp0, pObj->pFans + 0, nDecMux );
-            Kit_DsdDecompose_rec( pNtk, pRes1, uSupp1, pObj->pFans + 1, nDecMux );
-            return;
-        }
-
-        // create the new node
-        pRes = Kit_DsdObjAlloc( pNtk, KIT_DSD_AND, 2 );
-        pRes->nRefs++;
-        pRes->nFans = 2;
-        pRes->pFans[0] = pObj->pFans[i];  pObj->pFans[i] = 127;  uSupp &= ~(1 << i);
-        pRes->pFans[1] = 2*pObj->Id;
-        // update the parent pointer
-        *pPar = Kit_DsdLitNotCond( 2 * pRes->Id, Kit_DsdLitIsCompl(*pPar) );
-        // consider different decompositions
-        if ( fEquals[0][0] )
-        {
-            Kit_TruthCopy( pTruth, pCofs2[1], pObj->nFans );
-        }
-        else if ( fEquals[0][1] )
-        {
-            pRes->pFans[0] = Kit_DsdLitNot(pRes->pFans[0]);
-            Kit_TruthCopy( pTruth, pCofs2[0], pObj->nFans );
-        }
-        else if ( fEquals[1][0] )
-        {
-            *pPar = Kit_DsdLitNot(*pPar);
-            pRes->pFans[1] = Kit_DsdLitNot(pRes->pFans[1]);
-            Kit_TruthCopy( pTruth, pCofs2[1], pObj->nFans );
-        }
-        else if ( fEquals[1][1] )
-        {
-            *pPar = Kit_DsdLitNot(*pPar);
-            pRes->pFans[0] = Kit_DsdLitNot(pRes->pFans[0]);  
-            pRes->pFans[1] = Kit_DsdLitNot(pRes->pFans[1]);
-            Kit_TruthCopy( pTruth, pCofs2[0], pObj->nFans );
-        }
-        else if ( fOppos )
-        {
-            pRes->Type = KIT_DSD_XOR;
-            Kit_TruthCopy( pTruth, pCofs2[0], pObj->nFans );
-        }
-        else
-            assert( 0 );
-        // decompose the remainder
-        assert( Kit_DsdObjTruth(pObj) == pTruth );
-        Kit_DsdDecompose_rec( pNtk, pObj, uSupp, pRes->pFans + 1, nDecMux );
-        return;
-    }
-    pObj->fMark = 1;
-
-    // decompose the input
-    for ( i = pObj->nFans - 1; i >= 0; i-- )
-    {
-        assert( Kit_TruthVarInSupport( pTruth, pObj->nFans, i ) );
-        // get the single variale cofactors
-        Kit_TruthCofactor0New( pCofs2[0], pTruth, pObj->nFans, i );
-        Kit_TruthCofactor1New( pCofs2[1], pTruth, pObj->nFans, i );
-        // check the existence of MUX decomposition
-        uSupp0 = Kit_TruthSupport( pCofs2[0], pObj->nFans );
-        uSupp1 = Kit_TruthSupport( pCofs2[1], pObj->nFans );
-        assert( uSupp == (uSupp0 | uSupp1 | (1<<i)) );
-        // if one of the cofs is a constant, it is time to check the output again
-        if ( uSupp0 == 0 || uSupp1 == 0 )
-        {
-            pObj->fMark = 0;
-            Kit_DsdDecompose_rec( pNtk, pObj, uSupp, pPar, nDecMux );
-            return;
-        }
-        assert( uSupp0 && uSupp1 );
-        // get the number of unique variables
-        nFans0 = Kit_WordCountOnes( uSupp0 & ~uSupp1 );
-        nFans1 = Kit_WordCountOnes( uSupp1 & ~uSupp0 );
-        if ( nFans0 == 1 && nFans1 == 1 )
-        {
-            // get the cofactors w.r.t. the unique variables
-            iLit0 = Kit_WordFindFirstBit( uSupp0 & ~uSupp1 );
-            iLit1 = Kit_WordFindFirstBit( uSupp1 & ~uSupp0 );
-            // get four cofactors                                        
-            Kit_TruthCofactor0New( pCofs4[0][0], pCofs2[0], pObj->nFans, iLit0 );
-            Kit_TruthCofactor1New( pCofs4[0][1], pCofs2[0], pObj->nFans, iLit0 );
-            Kit_TruthCofactor0New( pCofs4[1][0], pCofs2[1], pObj->nFans, iLit1 );
-            Kit_TruthCofactor1New( pCofs4[1][1], pCofs2[1], pObj->nFans, iLit1 );
-            // check existence conditions
-            fEquals[0][0] = Kit_TruthIsEqual( pCofs4[0][0], pCofs4[1][0], pObj->nFans );
-            fEquals[0][1] = Kit_TruthIsEqual( pCofs4[0][1], pCofs4[1][1], pObj->nFans );
-            fEquals[1][0] = Kit_TruthIsEqual( pCofs4[0][0], pCofs4[1][1], pObj->nFans );
-            fEquals[1][1] = Kit_TruthIsEqual( pCofs4[0][1], pCofs4[1][0], pObj->nFans );
-            if ( (fEquals[0][0] && fEquals[0][1]) || (fEquals[1][0] && fEquals[1][1]) )
-            {
-                // construct the MUX
-                pRes = Kit_DsdObjAlloc( pNtk, KIT_DSD_PRIME, 3 );
-                Kit_DsdObjTruth(pRes)[0] = 0xCACACACA;
-                pRes->nRefs++;
-                pRes->nFans = 3;
-                pRes->pFans[0] = pObj->pFans[iLit0]; pObj->pFans[iLit0] = 127;  uSupp &= ~(1 << iLit0);
-                pRes->pFans[1] = pObj->pFans[iLit1]; pObj->pFans[iLit1] = 127;  uSupp &= ~(1 << iLit1);
-                pRes->pFans[2] = pObj->pFans[i];     pObj->pFans[i] = 2 * pRes->Id; // remains in support
-                // update the node
-//                if ( fEquals[0][0] && fEquals[0][1] )
-//                    Kit_TruthMuxVar( pTruth, pCofs4[0][0], pCofs4[0][1], pObj->nFans, i );
-//                else
-//                    Kit_TruthMuxVar( pTruth, pCofs4[0][1], pCofs4[0][0], pObj->nFans, i );
-                Kit_TruthMuxVar( pTruth, pCofs4[1][0], pCofs4[1][1], pObj->nFans, i );
-                if ( fEquals[1][0] && fEquals[1][1] )
-                    pRes->pFans[0] = Kit_DsdLitNot(pRes->pFans[0]);
-                // decompose the remainder
-                Kit_DsdDecompose_rec( pNtk, pObj, uSupp, pPar, nDecMux );
-                return;
-            }
-        }
-
-        // try other inputs
-        for ( k = i+1; k < pObj->nFans; k++ )
-        {
-            // get four cofactors                                                ik
-            Kit_TruthCofactor0New( pCofs4[0][0], pCofs2[0], pObj->nFans, k ); // 00 
-            Kit_TruthCofactor1New( pCofs4[0][1], pCofs2[0], pObj->nFans, k ); // 01 
-            Kit_TruthCofactor0New( pCofs4[1][0], pCofs2[1], pObj->nFans, k ); // 10 
-            Kit_TruthCofactor1New( pCofs4[1][1], pCofs2[1], pObj->nFans, k ); // 11 
-            // compare equal pairs
-            fPairs[0][1] = fPairs[1][0] = Kit_TruthIsEqual( pCofs4[0][0], pCofs4[0][1], pObj->nFans );
-            fPairs[0][2] = fPairs[2][0] = Kit_TruthIsEqual( pCofs4[0][0], pCofs4[1][0], pObj->nFans );
-            fPairs[0][3] = fPairs[3][0] = Kit_TruthIsEqual( pCofs4[0][0], pCofs4[1][1], pObj->nFans );
-            fPairs[1][2] = fPairs[2][1] = Kit_TruthIsEqual( pCofs4[0][1], pCofs4[1][0], pObj->nFans );
-            fPairs[1][3] = fPairs[3][1] = Kit_TruthIsEqual( pCofs4[0][1], pCofs4[1][1], pObj->nFans );
-            fPairs[2][3] = fPairs[3][2] = Kit_TruthIsEqual( pCofs4[1][0], pCofs4[1][1], pObj->nFans );
-            nPairs = fPairs[0][1] + fPairs[0][2] + fPairs[0][3] + fPairs[1][2] + fPairs[1][3] + fPairs[2][3];
-            if ( nPairs != 3 && nPairs != 2 )
-                continue;
-
-            // decomposition exists
-            pRes = Kit_DsdObjAlloc( pNtk, KIT_DSD_AND, 2 );
-            pRes->nRefs++;
-            pRes->nFans = 2;
-            pRes->pFans[0] = pObj->pFans[k]; pObj->pFans[k] = 2 * pRes->Id;  // remains in support
-            pRes->pFans[1] = pObj->pFans[i]; pObj->pFans[i] = 127;       uSupp &= ~(1 << i);
-            if ( !fPairs[0][1] && !fPairs[0][2] && !fPairs[0][3] ) // 00
-            {
-                pRes->pFans[0] = Kit_DsdLitNot(pRes->pFans[0]);  
-                pRes->pFans[1] = Kit_DsdLitNot(pRes->pFans[1]);
-                Kit_TruthMuxVar( pTruth, pCofs4[1][1], pCofs4[0][0], pObj->nFans, k );
-            }
-            else if ( !fPairs[1][0] && !fPairs[1][2] && !fPairs[1][3] ) // 01
-            {
-                pRes->pFans[1] = Kit_DsdLitNot(pRes->pFans[1]);  
-                Kit_TruthMuxVar( pTruth, pCofs4[0][0], pCofs4[0][1], pObj->nFans, k );
-            }
-            else if ( !fPairs[2][0] && !fPairs[2][1] && !fPairs[2][3] ) // 10
-            {
-                pRes->pFans[0] = Kit_DsdLitNot(pRes->pFans[0]);  
-                Kit_TruthMuxVar( pTruth, pCofs4[0][0], pCofs4[1][0], pObj->nFans, k );
-            }
-            else if ( !fPairs[3][0] && !fPairs[3][1] && !fPairs[3][2] ) // 11
-            {
-//                unsigned uSupp0 = Kit_TruthSupport(pCofs4[0][0], pObj->nFans);
-//                unsigned uSupp1 = Kit_TruthSupport(pCofs4[1][1], pObj->nFans);
-//                unsigned uSupp;
-//                Extra_PrintBinary( stdout, &uSupp0, pObj->nFans ); printf( "\n" );
-//                Extra_PrintBinary( stdout, &uSupp1, pObj->nFans ); printf( "\n" );
-                Kit_TruthMuxVar( pTruth, pCofs4[0][0], pCofs4[1][1], pObj->nFans, k );
-//                uSupp = Kit_TruthSupport(pTruth, pObj->nFans);
-//                Extra_PrintBinary( stdout, &uSupp, pObj->nFans ); printf( "\n" ); printf( "\n" );
-            }
-            else
-            {
-                assert( fPairs[0][3] && fPairs[1][2] );
-                pRes->Type = KIT_DSD_XOR;;
-                Kit_TruthMuxVar( pTruth, pCofs4[0][0], pCofs4[0][1], pObj->nFans, k );
-            }
-            // decompose the remainder
-            Kit_DsdDecompose_rec( pNtk, pObj, uSupp, pPar, nDecMux );
-            return;
-        }
-    }
-
-    // if all decomposition methods failed and we are still above the limit, perform MUX-decomposition
-    if ( nDecMux > 0 && (int)pObj->nFans > nDecMux )
-    {
-        int iBestVar = Kit_TruthBestCofVar( pTruth, pObj->nFans, pCofs2[0], pCofs2[1] );
-        uSupp0 = Kit_TruthSupport( pCofs2[0], pObj->nFans );
-        uSupp1 = Kit_TruthSupport( pCofs2[1], pObj->nFans );
-        // perform MUX decomposition
-        pRes0 = Kit_DsdObjAlloc( pNtk, KIT_DSD_PRIME, pObj->nFans );
-        pRes1 = Kit_DsdObjAlloc( pNtk, KIT_DSD_PRIME, pObj->nFans );
-        for ( k = 0; k < pObj->nFans; k++ )
-            pRes0->pFans[k] = pRes1->pFans[k] = pObj->pFans[k];
-        Kit_TruthCopy( Kit_DsdObjTruth(pRes0), pCofs2[0], pObj->nFans );        
-        Kit_TruthCopy( Kit_DsdObjTruth(pRes1), pCofs2[1], pObj->nFans ); 
-        // update the current one
-        assert( pObj->Type == KIT_DSD_PRIME );
-        pTruth[0] = 0xCACACACA;
-        pObj->nFans = 3;
-        pObj->pFans[2] = pObj->pFans[iBestVar];
-        pObj->pFans[0] = 2*pRes0->Id; pRes0->nRefs++;
-        pObj->pFans[1] = 2*pRes1->Id; pRes1->nRefs++;
-        // call recursively
-        Kit_DsdDecompose_rec( pNtk, pRes0, uSupp0, pObj->pFans + 0, nDecMux );
-        Kit_DsdDecompose_rec( pNtk, pRes1, uSupp1, pObj->pFans + 1, nDecMux );
-    }
-
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs decomposition of the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_DsdNtk_t * Kit_DsdDecomposeInt( unsigned * pTruth, int nVars, int nDecMux )
-{
-    Kit_DsdNtk_t * pNtk;
-    Kit_DsdObj_t * pObj;
-    unsigned uSupp;
-    int i, nVarsReal;
-    assert( nVars <= 16 );
-    pNtk = Kit_DsdNtkAlloc( nVars );
-    pNtk->Root = Kit_DsdVar2Lit( pNtk->nVars, 0 );
-    // create the first node
-    pObj = Kit_DsdObjAlloc( pNtk, KIT_DSD_PRIME, nVars );
-    assert( pNtk->pNodes[0] == pObj );
-    for ( i = 0; i < nVars; i++ )
-       pObj->pFans[i] = Kit_DsdVar2Lit( i, 0 );
-    Kit_TruthCopy( Kit_DsdObjTruth(pObj), pTruth, nVars );
-    uSupp = Kit_TruthSupport( pTruth, nVars );
-    // consider special cases
-    nVarsReal = Kit_WordCountOnes( uSupp );
-    if ( nVarsReal == 0 )
-    {
-        pObj->Type = KIT_DSD_CONST1;
-        pObj->nFans = 0;
-        if ( pTruth[0] == 0 )
-             pNtk->Root = Kit_DsdLitNot(pNtk->Root);
-        return pNtk;
-    }
-    if ( nVarsReal == 1 )
-    {
-        pObj->Type = KIT_DSD_VAR;
-        pObj->nFans = 1;
-        pObj->pFans[0] = Kit_DsdVar2Lit( Kit_WordFindFirstBit(uSupp), (pTruth[0] & 1) );
-        return pNtk;
-    }
-    Kit_DsdDecompose_rec( pNtk, pNtk->pNodes[0], uSupp, &pNtk->Root, nDecMux );
-    return pNtk;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs decomposition of the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_DsdNtk_t * Kit_DsdDecompose( unsigned * pTruth, int nVars )
-{
-    return Kit_DsdDecomposeInt( pTruth, nVars, 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs decomposition of the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_DsdNtk_t * Kit_DsdDecomposeExpand( unsigned * pTruth, int nVars )
-{
-    Kit_DsdNtk_t * pNtk, * pTemp;
-    pNtk = Kit_DsdDecomposeInt( pTruth, nVars, 0 );
-    pNtk = Kit_DsdExpand( pTemp = pNtk );      
-    Kit_DsdNtkFree( pTemp );
-    return pNtk;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs decomposition of the truth table.]
-
-  Description [Uses MUXes to break-down large prime nodes.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_DsdNtk_t *  Kit_DsdDecomposeMux( unsigned * pTruth, int nVars, int nDecMux )
-{
-/*
-    Kit_DsdNtk_t * pNew;
-    Kit_DsdObj_t * pObjNew;
-    assert( nVars <= 16 );
-    // create a new network
-    pNew = Kit_DsdNtkAlloc( nVars );
-    // consider simple special cases
-    if ( nVars == 0 )
-    {
-        pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_CONST1, 0 );
-        pNew->Root = Kit_DsdVar2Lit( pObjNew->Id, (int)(pTruth[0] == 0) );
-        return pNew;
-    }
-    if ( nVars == 1 )
-    {
-        pObjNew = Kit_DsdObjAlloc( pNew, KIT_DSD_VAR, 1 );
-        pObjNew->pFans[0] = Kit_DsdVar2Lit( 0, 0 );
-        pNew->Root = Kit_DsdVar2Lit( pObjNew->Id, (int)(pTruth[0] != 0xAAAAAAAA) );
-        return pNew;
-    }
-*/
-    return Kit_DsdDecomposeInt( pTruth, nVars, nDecMux );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs decomposition of the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DsdTestCofs( Kit_DsdNtk_t * pNtk, unsigned * pTruthInit )
-{
-    Kit_DsdNtk_t * pNtk0, * pNtk1, * pTemp;
-//    Kit_DsdObj_t * pRoot;
-    unsigned * pCofs2[2] = { pNtk->pMem, pNtk->pMem + Kit_TruthWordNum(pNtk->nVars) };
-    unsigned i, * pTruth;
-    int fVerbose = 1;
-    int RetValue = 0;
-
-    pTruth = pTruthInit;
-//    pRoot = Kit_DsdNtkRoot(pNtk);
-//    pTruth = Kit_DsdObjTruth(pRoot);
-//    assert( pRoot->nFans == pNtk->nVars );
-
-    if ( fVerbose )
-    {
-        printf( "Function: " );
-//        Extra_PrintBinary( stdout, pTruth, (1 << pNtk->nVars) ); 
-        Extra_PrintHexadecimal( stdout, pTruth, pNtk->nVars ); 
-        printf( "\n" );
-        Kit_DsdPrint( stdout, pNtk ), printf( "\n" );
-    }
-    for ( i = 0; i < pNtk->nVars; i++ )
-    {
-        Kit_TruthCofactor0New( pCofs2[0], pTruth, pNtk->nVars, i );
-        pNtk0 = Kit_DsdDecompose( pCofs2[0], pNtk->nVars );
-        pNtk0 = Kit_DsdExpand( pTemp = pNtk0 );
-        Kit_DsdNtkFree( pTemp );
-
-        if ( fVerbose )
-        {
-            printf( "Cof%d0: ", i );
-            Kit_DsdPrint( stdout, pNtk0 ), printf( "\n" );
-        }
-
-        Kit_TruthCofactor1New( pCofs2[1], pTruth, pNtk->nVars, i );
-        pNtk1 = Kit_DsdDecompose( pCofs2[1], pNtk->nVars );
-        pNtk1 = Kit_DsdExpand( pTemp = pNtk1 );
-        Kit_DsdNtkFree( pTemp );
-
-        if ( fVerbose )
-        {
-            printf( "Cof%d1: ", i );
-            Kit_DsdPrint( stdout, pNtk1 ), printf( "\n" );
-        }
-
-//        if ( Kit_DsdCheckVar4Dec2( pNtk0, pNtk1 ) )
-//            RetValue = 1;
-
-        Kit_DsdNtkFree( pNtk0 );
-        Kit_DsdNtkFree( pNtk1 );
-    }
-    if ( fVerbose )
-        printf( "\n" );
-
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs decomposition of the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DsdEval( unsigned * pTruth, int nVars, int nLutSize )
-{
-    Kit_DsdMan_t * p;
-    Kit_DsdNtk_t * pNtk;
-    unsigned * pTruthC;
-    int Result;
-
-    // decompose the function
-    pNtk = Kit_DsdDecompose( pTruth, nVars );
-    Result = Kit_DsdCountLuts( pNtk, nLutSize );
-//    printf( "\n" );
-//    Kit_DsdPrint( stdout, pNtk );
-//    printf( "Eval = %d.\n", Result );
-
-    // recompute the truth table
-    p = Kit_DsdManAlloc( nVars, Kit_DsdNtkObjNum(pNtk) );
-    pTruthC = Kit_DsdTruthCompute( p, pNtk );
-    if ( !Kit_TruthIsEqual( pTruth, pTruthC, nVars ) )
-        printf( "Verification failed.\n" );
-    Kit_DsdManFree( p );
-
-    Kit_DsdNtkFree( pNtk );
-    return Result;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs decomposition of the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdVerify( Kit_DsdNtk_t * pNtk, unsigned * pTruth, int nVars )
-{
-    Kit_DsdMan_t * p;
-    unsigned * pTruthC;
-    p = Kit_DsdManAlloc( nVars, Kit_DsdNtkObjNum(pNtk)+2 );
-    pTruthC = Kit_DsdTruthCompute( p, pNtk );
-    if ( !Extra_TruthIsEqual( pTruth, pTruthC, nVars ) )
-        printf( "Verification failed.\n" );
-    Kit_DsdManFree( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs decomposition of the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdTest( unsigned * pTruth, int nVars )
-{
-    Kit_DsdMan_t * p;
-    unsigned * pTruthC;
-    Kit_DsdNtk_t * pNtk, * pTemp;
-    pNtk = Kit_DsdDecompose( pTruth, nVars );
-
-//    if ( Kit_DsdFindLargeBox(pNtk, Kit_DsdLit2Var(pNtk->Root)) )
-//        Kit_DsdPrint( stdout, pNtk );
-
-//    if ( Kit_DsdNtkRoot(pNtk)->nFans == (unsigned)nVars && nVars == 6 )
-
-//    printf( "\n" );
-//    Kit_DsdPrint( stdout, pNtk );
-
-    pNtk = Kit_DsdExpand( pTemp = pNtk );
-    Kit_DsdNtkFree( pTemp );
-
-    Kit_DsdPrint( stdout, pNtk ), printf( "\n" );
-
-//    if ( Kit_DsdFindLargeBox(pNtk, Kit_DsdLit2Var(pNtk->Root)) )
-//        Kit_DsdTestCofs( pNtk, pTruth );
-
-    // recompute the truth table
-    p = Kit_DsdManAlloc( nVars, Kit_DsdNtkObjNum(pNtk) );
-    pTruthC = Kit_DsdTruthCompute( p, pNtk );
-//    Extra_PrintBinary( stdout, pTruth, 1 << nVars ); printf( "\n" );
-//    Extra_PrintBinary( stdout, pTruthC, 1 << nVars ); printf( "\n" );
-    if ( Extra_TruthIsEqual( pTruth, pTruthC, nVars ) )
-    {
-//        printf( "Verification is okay.\n" );
-    }
-    else
-        printf( "Verification failed.\n" );
-    Kit_DsdManFree( p );
-
-
-    Kit_DsdNtkFree( pNtk );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs decomposition of the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdPrecompute4Vars()
-{
-    Kit_DsdMan_t * p;
-    Kit_DsdNtk_t * pNtk, * pTemp;
-    FILE * pFile;
-    unsigned uTruth;
-    unsigned * pTruthC;
-    char Buffer[256];
-    int i, RetValue;
-    int Counter1 = 0, Counter2 = 0;
-
-    pFile = fopen( "5npn/npn4.txt", "r" );
-    for ( i = 0; fgets( Buffer, 100, pFile ); i++ )
-    {
-        Buffer[6] = 0;
-        Extra_ReadHexadecimal( &uTruth, Buffer+2, 4 );
-        uTruth = ((uTruth & 0xffff) << 16) | (uTruth & 0xffff);
-        pNtk = Kit_DsdDecompose( &uTruth, 4 );
-
-        pNtk = Kit_DsdExpand( pTemp = pNtk );
-        Kit_DsdNtkFree( pTemp );
-
-
-        if ( Kit_DsdFindLargeBox(pNtk, 3) )
-        {
-//            RetValue = 0;
-            RetValue = Kit_DsdTestCofs( pNtk, &uTruth );
-            printf( "\n" );
-            printf( "%3d : Non-DSD function  %s  %s\n", i, Buffer + 2, RetValue? "implementable" : "" );
-            Kit_DsdPrint( stdout, pNtk ), printf( "\n" );
-
-            Counter1++;
-            Counter2 += RetValue;
-        }
-
-/*
-        printf( "%3d : Function  %s   ", i, Buffer + 2 );
-        if ( !Kit_DsdFindLargeBox(pNtk, 3) )
-            Kit_DsdPrint( stdout, pNtk );
-        else
-            printf( "\n" );
-*/
-
-        p = Kit_DsdManAlloc( 4, Kit_DsdNtkObjNum(pNtk) );
-        pTruthC = Kit_DsdTruthCompute( p, pNtk );
-        if ( !Extra_TruthIsEqual( &uTruth, pTruthC, 4 ) )
-            printf( "Verification failed.\n" );
-        Kit_DsdManFree( p );
-
-        Kit_DsdNtkFree( pNtk );
-    }
-    fclose( pFile );
-    printf( "non-DSD = %d   implementable = %d\n", Counter1, Counter2 );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the set of cofactoring variables.]
-
-  Description [If there is no DSD components returns 0.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DsdCofactoringGetVars( Kit_DsdNtk_t ** ppNtk, int nSize, int * pVars )
-{
-    Kit_DsdObj_t * pObj;
-    unsigned m;
-    int i, k, v, Var, nVars, iFaninLit;
-    // go through all the networks
-    nVars = 0;
-    for ( i = 0; i < nSize; i++ )
-    {
-        // go through the prime objects of each networks
-        Kit_DsdNtkForEachObj( ppNtk[i], pObj, k )     
-        {
-            if ( pObj->Type != KIT_DSD_PRIME )
-                continue;
-            if ( pObj->nFans == 3 )
-                continue;
-            // collect direct fanin variables
-            Kit_DsdObjForEachFanin( ppNtk[i], pObj, iFaninLit, m )
-            {
-                if ( !Kit_DsdLitIsLeaf(ppNtk[i], iFaninLit) )
-                    continue;
-                // add it to the array
-                Var = Kit_DsdLit2Var( iFaninLit );
-                for ( v = 0; v < nVars; v++ )
-                    if ( pVars[v] == Var )
-                        break;
-                if ( v == nVars )
-                    pVars[nVars++] = Var;
-            }
-        }
-    }
-    return nVars;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Canonical decomposition into completely DSD-structure.]
-
-  Description [Returns the number of cofactoring steps. Also returns
-  the cofactoring variables in pVars.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_DsdCofactoring( unsigned * pTruth, int nVars, int * pCofVars, int nLimit, int fVerbose )
-{
-    Kit_DsdNtk_t * ppNtks[5][16] = {
-      {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
-      {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
-      {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
-      {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0},
-      {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}
-    };
-    Kit_DsdNtk_t * pTemp;
-    unsigned * ppCofs[5][16];
-    int pTryVars[16], nTryVars;
-    int nPrimeSizeMin, nPrimeSizeMax, nPrimeSizeCur;
-    int nSuppSizeMin, nSuppSizeMax, iVarBest;
-    int i, k, v, nStep, nSize, nMemSize;
-    assert( nLimit < 5 );
-
-    // allocate storage for cofactors
-    nMemSize = Kit_TruthWordNum(nVars);
-    ppCofs[0][0] = ABC_ALLOC( unsigned, 80 * nMemSize );
-    nSize = 0;
-    for ( i = 0; i <  5; i++ )
-    for ( k = 0; k < 16; k++ )
-        ppCofs[i][k] = ppCofs[0][0] + nMemSize * nSize++;
-    assert( nSize == 80 );
-
-    // copy the function
-    Kit_TruthCopy( ppCofs[0][0], pTruth, nVars );
-    ppNtks[0][0] = Kit_DsdDecompose( ppCofs[0][0], nVars );
-
-    if ( fVerbose )
-        printf( "\nProcessing prime function with %d support variables:\n", nVars );
-
-    // perform recursive cofactoring
-    for ( nStep = 0; nStep < nLimit; nStep++ )
-    {
-        nSize = (1 << nStep);
-        // find the variables to use in the cofactoring step
-        nTryVars = Kit_DsdCofactoringGetVars( ppNtks[nStep], nSize, pTryVars );
-        if ( nTryVars == 0 )
-            break;
-        // cofactor w.r.t. the above variables
-        iVarBest = -1;
-        nPrimeSizeMin = 10000;
-        nSuppSizeMin  = 10000;
-        for ( v = 0; v < nTryVars; v++ )
-        {
-            nPrimeSizeMax = 0;
-            nSuppSizeMax = 0;
-            for ( i = 0; i < nSize; i++ )
-            {
-                // cofactor and decompose cofactors          
-                Kit_TruthCofactor0New( ppCofs[nStep+1][2*i+0], ppCofs[nStep][i], nVars, pTryVars[v] );
-                Kit_TruthCofactor1New( ppCofs[nStep+1][2*i+1], ppCofs[nStep][i], nVars, pTryVars[v] );
-                ppNtks[nStep+1][2*i+0] = Kit_DsdDecompose( ppCofs[nStep+1][2*i+0], nVars );
-                ppNtks[nStep+1][2*i+1] = Kit_DsdDecompose( ppCofs[nStep+1][2*i+1], nVars );
-                // compute the largest non-decomp block
-                nPrimeSizeCur  = Kit_DsdNonDsdSizeMax(ppNtks[nStep+1][2*i+0]);
-                nPrimeSizeMax  = KIT_MAX( nPrimeSizeMax, nPrimeSizeCur );
-                nPrimeSizeCur  = Kit_DsdNonDsdSizeMax(ppNtks[nStep+1][2*i+1]);
-                nPrimeSizeMax  = KIT_MAX( nPrimeSizeMax, nPrimeSizeCur );
-                // compute the sum total of supports
-                nSuppSizeMax += Kit_TruthSupportSize( ppCofs[nStep+1][2*i+0], nVars );
-                nSuppSizeMax += Kit_TruthSupportSize( ppCofs[nStep+1][2*i+1], nVars );
-                // free the networks
-                Kit_DsdNtkFree( ppNtks[nStep+1][2*i+0] );
-                Kit_DsdNtkFree( ppNtks[nStep+1][2*i+1] );
-            }
-            // find the min max support size of the prime component
-            if ( nPrimeSizeMin > nPrimeSizeMax || (nPrimeSizeMin == nPrimeSizeMax && nSuppSizeMin > nSuppSizeMax) )
-            {
-                nPrimeSizeMin = nPrimeSizeMax;
-                nSuppSizeMin  = nSuppSizeMax;
-                iVarBest      = pTryVars[v];
-            }
-        }
-        assert( iVarBest != -1 );
-        // save the variable
-        if ( pCofVars )
-            pCofVars[nStep] = iVarBest;
-        // cofactor w.r.t. the best
-        for ( i = 0; i < nSize; i++ )
-        {
-            Kit_TruthCofactor0New( ppCofs[nStep+1][2*i+0], ppCofs[nStep][i], nVars, iVarBest );
-            Kit_TruthCofactor1New( ppCofs[nStep+1][2*i+1], ppCofs[nStep][i], nVars, iVarBest );
-            ppNtks[nStep+1][2*i+0] = Kit_DsdDecompose( ppCofs[nStep+1][2*i+0], nVars );
-            ppNtks[nStep+1][2*i+1] = Kit_DsdDecompose( ppCofs[nStep+1][2*i+1], nVars );
-            if ( fVerbose )
-            {
-                ppNtks[nStep+1][2*i+0] = Kit_DsdExpand( pTemp = ppNtks[nStep+1][2*i+0] );
-                Kit_DsdNtkFree( pTemp );
-                ppNtks[nStep+1][2*i+1] = Kit_DsdExpand( pTemp = ppNtks[nStep+1][2*i+1] );
-                Kit_DsdNtkFree( pTemp );
-
-                printf( "Cof%d%d: ", nStep+1, 2*i+0 );
-                Kit_DsdPrint( stdout, ppNtks[nStep+1][2*i+0] ), printf( "\n" );
-                printf( "Cof%d%d: ", nStep+1, 2*i+1 );
-                Kit_DsdPrint( stdout, ppNtks[nStep+1][2*i+1] ), printf( "\n" );
-            }
-        }
-    }
-
-    // free the networks
-    for ( i = 0; i <  5; i++ )
-    for ( k = 0; k < 16; k++ )
-        if ( ppNtks[i][k] )
-            Kit_DsdNtkFree( ppNtks[i][k] );
-    ABC_FREE( ppCofs[0][0] );
-
-    assert( nStep <= nLimit );
-    return nStep;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Canonical decomposition into completely DSD-structure.]
-
-  Description [Returns the number of cofactoring steps. Also returns
-  the cofactoring variables in pVars.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_DsdPrintCofactors( unsigned * pTruth, int nVars, int nCofLevel, int fVerbose )
-{
-    Kit_DsdNtk_t * ppNtks[32] = {0}, * pTemp;
-    unsigned * ppCofs[5][16];
-    int piCofVar[5];
-    int nPrimeSizeMax, nPrimeSizeCur, nSuppSizeMax;
-    int i, k, v1, v2, v3, v4, s, nSteps, nSize, nMemSize;
-    assert( nCofLevel < 5 );
-
-    // print the function
-    ppNtks[0] = Kit_DsdDecompose( pTruth, nVars );
-    ppNtks[0] = Kit_DsdExpand( pTemp = ppNtks[0] );
-    Kit_DsdNtkFree( pTemp );
-    if ( fVerbose )
-        Kit_DsdPrint( stdout, ppNtks[0] ), printf( "\n" );
-    Kit_DsdNtkFree( ppNtks[0] );
-
-    // allocate storage for cofactors
-    nMemSize = Kit_TruthWordNum(nVars);
-    ppCofs[0][0] = ABC_ALLOC( unsigned, 80 * nMemSize );
-    nSize = 0;
-    for ( i = 0; i <  5; i++ )
-    for ( k = 0; k < 16; k++ )
-        ppCofs[i][k] = ppCofs[0][0] + nMemSize * nSize++;
-    assert( nSize == 80 );
-
-    // copy the function
-    Kit_TruthCopy( ppCofs[0][0], pTruth, nVars );
-
-    if ( nCofLevel == 1 )
-    for ( v1 = 0; v1 < nVars; v1++ )
-    {
-        nSteps = 0;
-        piCofVar[nSteps++] = v1;
-
-        printf( "    Variables { " );
-        for ( i = 0; i < nSteps; i++ )
-            printf( "%c ", 'a' + piCofVar[i] );
-        printf( "}\n" );
-
-        // single cofactors
-        for ( s = 1; s <= nSteps; s++ )
-        {
-            for ( k = 0; k < s; k++ )
-            {
-                nSize = (1 << k);
-                for ( i = 0; i < nSize; i++ )
-                {
-                    Kit_TruthCofactor0New( ppCofs[k+1][2*i+0], ppCofs[k][i], nVars, piCofVar[k] );
-                    Kit_TruthCofactor1New( ppCofs[k+1][2*i+1], ppCofs[k][i], nVars, piCofVar[k] );
-                }
-            }
-        }
-        // compute DSD networks
-        nSize = (1 << nSteps);
-        nPrimeSizeMax = 0;
-        nSuppSizeMax = 0;
-        for ( i = 0; i < nSize; i++ )
-        {
-            ppNtks[i] = Kit_DsdDecompose( ppCofs[nSteps][i], nVars );
-            ppNtks[i] = Kit_DsdExpand( pTemp = ppNtks[i] );
-            Kit_DsdNtkFree( pTemp );
-            if ( fVerbose )
-            {
-                printf( "Cof%d%d: ", nSteps, i );
-                Kit_DsdPrint( stdout, ppNtks[i] ), printf( "\n" );
-            }
-            // compute the largest non-decomp block
-            nPrimeSizeCur  = Kit_DsdNonDsdSizeMax(ppNtks[i]);
-            nPrimeSizeMax  = KIT_MAX( nPrimeSizeMax, nPrimeSizeCur );
-            Kit_DsdNtkFree( ppNtks[i] );
-            nSuppSizeMax += Kit_TruthSupportSize( ppCofs[nSteps][i], nVars );
-        }
-        printf( "Max = %2d. Supps = %2d.\n", nPrimeSizeMax, nSuppSizeMax );
-    }
-
-    if ( nCofLevel == 2 )
-    for ( v1 = 0; v1 < nVars; v1++ )
-    for ( v2 = v1+1; v2 < nVars; v2++ )
-    {
-        nSteps = 0;
-        piCofVar[nSteps++] = v1;
-        piCofVar[nSteps++] = v2;
-
-        printf( "    Variables { " );
-        for ( i = 0; i < nSteps; i++ )
-            printf( "%c ", 'a' + piCofVar[i] );
-        printf( "}\n" );
-
-        // single cofactors
-        for ( s = 1; s <= nSteps; s++ )
-        {
-            for ( k = 0; k < s; k++ )
-            {
-                nSize = (1 << k);
-                for ( i = 0; i < nSize; i++ )
-                {
-                    Kit_TruthCofactor0New( ppCofs[k+1][2*i+0], ppCofs[k][i], nVars, piCofVar[k] );
-                    Kit_TruthCofactor1New( ppCofs[k+1][2*i+1], ppCofs[k][i], nVars, piCofVar[k] );
-                }
-            }
-        }
-        // compute DSD networks
-        nSize = (1 << nSteps);
-        nPrimeSizeMax = 0;
-        nSuppSizeMax = 0;
-        for ( i = 0; i < nSize; i++ )
-        {
-            ppNtks[i] = Kit_DsdDecompose( ppCofs[nSteps][i], nVars );
-            ppNtks[i] = Kit_DsdExpand( pTemp = ppNtks[i] );
-            Kit_DsdNtkFree( pTemp );
-            if ( fVerbose )
-            {
-                printf( "Cof%d%d: ", nSteps, i );
-                Kit_DsdPrint( stdout, ppNtks[i] ), printf( "\n" );
-            }
-            // compute the largest non-decomp block
-            nPrimeSizeCur  = Kit_DsdNonDsdSizeMax(ppNtks[i]);
-            nPrimeSizeMax  = KIT_MAX( nPrimeSizeMax, nPrimeSizeCur );
-            Kit_DsdNtkFree( ppNtks[i] );
-            nSuppSizeMax += Kit_TruthSupportSize( ppCofs[nSteps][i], nVars );
-        }
-        printf( "Max = %2d. Supps = %2d.\n", nPrimeSizeMax, nSuppSizeMax );
-    }
-
-    if ( nCofLevel == 3 )
-    for ( v1 = 0; v1 < nVars; v1++ )
-    for ( v2 = v1+1; v2 < nVars; v2++ )
-    for ( v3 = v2+1; v3 < nVars; v3++ )
-    {
-        nSteps = 0;
-        piCofVar[nSteps++] = v1;
-        piCofVar[nSteps++] = v2;
-        piCofVar[nSteps++] = v3;
-
-        printf( "    Variables { " );
-        for ( i = 0; i < nSteps; i++ )
-            printf( "%c ", 'a' + piCofVar[i] );
-        printf( "}\n" );
-
-        // single cofactors
-        for ( s = 1; s <= nSteps; s++ )
-        {
-            for ( k = 0; k < s; k++ )
-            {
-                nSize = (1 << k);
-                for ( i = 0; i < nSize; i++ )
-                {
-                    Kit_TruthCofactor0New( ppCofs[k+1][2*i+0], ppCofs[k][i], nVars, piCofVar[k] );
-                    Kit_TruthCofactor1New( ppCofs[k+1][2*i+1], ppCofs[k][i], nVars, piCofVar[k] );
-                }
-            }
-        }
-        // compute DSD networks
-        nSize = (1 << nSteps);
-        nPrimeSizeMax = 0;
-        nSuppSizeMax = 0;
-        for ( i = 0; i < nSize; i++ )
-        {
-            ppNtks[i] = Kit_DsdDecompose( ppCofs[nSteps][i], nVars );
-            ppNtks[i] = Kit_DsdExpand( pTemp = ppNtks[i] );
-            Kit_DsdNtkFree( pTemp );
-            if ( fVerbose )
-            {
-                printf( "Cof%d%d: ", nSteps, i );
-                Kit_DsdPrint( stdout, ppNtks[i] ), printf( "\n" );
-            }
-            // compute the largest non-decomp block
-            nPrimeSizeCur  = Kit_DsdNonDsdSizeMax(ppNtks[i]);
-            nPrimeSizeMax  = KIT_MAX( nPrimeSizeMax, nPrimeSizeCur );
-            Kit_DsdNtkFree( ppNtks[i] );
-            nSuppSizeMax += Kit_TruthSupportSize( ppCofs[nSteps][i], nVars );
-        }
-        printf( "Max = %2d. Supps = %2d.\n", nPrimeSizeMax, nSuppSizeMax );
-    }
-
-    if ( nCofLevel == 4 )
-    for ( v1 = 0; v1 < nVars; v1++ )
-    for ( v2 = v1+1; v2 < nVars; v2++ )
-    for ( v3 = v2+1; v3 < nVars; v3++ )
-    for ( v4 = v3+1; v4 < nVars; v4++ )
-    {
-        nSteps = 0;
-        piCofVar[nSteps++] = v1;
-        piCofVar[nSteps++] = v2;
-        piCofVar[nSteps++] = v3;
-        piCofVar[nSteps++] = v4;
-
-        printf( "    Variables { " );
-        for ( i = 0; i < nSteps; i++ )
-            printf( "%c ", 'a' + piCofVar[i] );
-        printf( "}\n" );
-
-        // single cofactors
-        for ( s = 1; s <= nSteps; s++ )
-        {
-            for ( k = 0; k < s; k++ )
-            {
-                nSize = (1 << k);
-                for ( i = 0; i < nSize; i++ )
-                {
-                    Kit_TruthCofactor0New( ppCofs[k+1][2*i+0], ppCofs[k][i], nVars, piCofVar[k] );
-                    Kit_TruthCofactor1New( ppCofs[k+1][2*i+1], ppCofs[k][i], nVars, piCofVar[k] );
-                }
-            }
-        }
-        // compute DSD networks
-        nSize = (1 << nSteps);
-        nPrimeSizeMax = 0;
-        nSuppSizeMax = 0;
-        for ( i = 0; i < nSize; i++ )
-        {
-            ppNtks[i] = Kit_DsdDecompose( ppCofs[nSteps][i], nVars );
-            ppNtks[i] = Kit_DsdExpand( pTemp = ppNtks[i] );
-            Kit_DsdNtkFree( pTemp );
-            if ( fVerbose )
-            {
-                printf( "Cof%d%d: ", nSteps, i );
-                Kit_DsdPrint( stdout, ppNtks[i] ), printf( "\n" );
-            }
-            // compute the largest non-decomp block
-            nPrimeSizeCur  = Kit_DsdNonDsdSizeMax(ppNtks[i]);
-            nPrimeSizeMax  = KIT_MAX( nPrimeSizeMax, nPrimeSizeCur );
-            Kit_DsdNtkFree( ppNtks[i] );
-            nSuppSizeMax += Kit_TruthSupportSize( ppCofs[nSteps][i], nVars );
-        }
-        printf( "Max = %2d. Supps = %2d.\n", nPrimeSizeMax, nSuppSizeMax );
-    }
-
-
-    ABC_FREE( ppCofs[0][0] );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char ** Kit_DsdNpn4ClassNames()
-{
-    static const char * pNames[222] = {
-        "F = 0",                     /*   0 */ 
-        "F = (!d*(!c*(!b*!a)))",     /*   1 */
-        "F = (!d*(!c*!b))",          /*   2 */
-        "F = (!d*(!c*(b+a)))",       /*   3 */
-        "F = (!d*(!c*!(b*a)))",      /*   4 */
-        "F = (!d*!c)",               /*   5 */
-        "F = (!d*16(a,b,c))",        /*   6 */
-        "F = (!d*17(a,b,c))",        /*   7 */
-        "F = (!d*18(a,b,c))",        /*   8 */
-        "F = (!d*19(a,b,c))",        /*   9 */
-        "F = (!d*CA(!b,!c,a))",      /*  10 */
-        "F = (!d*(c+!(!b*!a)))",     /*  11 */
-        "F = (!d*!(c*!(!b*!a)))",    /*  12 */
-        "F = (!d*(c+b))",            /*  13 */
-        "F = (!d*3D(a,b,c))",        /*  14 */
-        "F = (!d*!(c*b))",           /*  15 */
-        "F = (!d*(c+(b+!a)))",       /*  16 */
-        "F = (!d*6B(a,b,c))",        /*  17 */
-        "F = (!d*!(c*!(b+a)))",      /*  18 */
-        "F = (!d*7E(a,b,c))",        /*  19 */
-        "F = (!d*!(c*(b*a)))",       /*  20 */
-        "F = (!d)",                  /*  21 */
-        "F = 0116(a,b,c,d)",         /*  22 */
-        "F = 0117(a,b,c,d)",         /*  23 */
-        "F = 0118(a,b,c,d)",         /*  24 */
-        "F = 0119(a,b,c,d)",         /*  25 */
-        "F = 011A(a,b,c,d)",         /*  26 */
-        "F = 011B(a,b,c,d)",         /*  27 */
-        "F = 29((!b*!a),c,d)",       /*  28 */
-        "F = 2B((!b*!a),c,d)",       /*  29 */
-        "F = 012C(a,b,c,d)",         /*  30 */
-        "F = 012D(a,b,c,d)",         /*  31 */
-        "F = 012F(a,b,c,d)",         /*  32 */
-        "F = 013C(a,b,c,d)",         /*  33 */
-        "F = 013D(a,b,c,d)",         /*  34 */
-        "F = 013E(a,b,c,d)",         /*  35 */
-        "F = 013F(a,b,c,d)",         /*  36 */
-        "F = 0168(a,b,c,d)",         /*  37 */
-        "F = 0169(a,b,c,d)",         /*  38 */
-        "F = 016A(a,b,c,d)",         /*  39 */
-        "F = 016B(a,b,c,d)",         /*  40 */
-        "F = 016E(a,b,c,d)",         /*  41 */
-        "F = 016F(a,b,c,d)",         /*  42 */
-        "F = 017E(a,b,c,d)",         /*  43 */
-        "F = 017F(a,b,c,d)",         /*  44 */
-        "F = 0180(a,b,c,d)",         /*  45 */
-        "F = 0181(a,b,c,d)",         /*  46 */
-        "F = 0182(a,b,c,d)",         /*  47 */
-        "F = 0183(a,b,c,d)",         /*  48 */
-        "F = 0186(a,b,c,d)",         /*  49 */
-        "F = 0187(a,b,c,d)",         /*  50 */
-        "F = 0189(a,b,c,d)",         /*  51 */
-        "F = 018B(a,b,c,d)",         /*  52 */
-        "F = 018F(a,b,c,d)",         /*  53 */
-        "F = 0196(a,b,c,d)",         /*  54 */
-        "F = 0197(a,b,c,d)",         /*  55 */
-        "F = 0198(a,b,c,d)",         /*  56 */
-        "F = 0199(a,b,c,d)",         /*  57 */
-        "F = 019A(a,b,c,d)",         /*  58 */
-        "F = 019B(a,b,c,d)",         /*  59 */
-        "F = 019E(a,b,c,d)",         /*  60 */
-        "F = 019F(a,b,c,d)",         /*  61 */
-        "F = 42(a,(!c*!b),d)",       /*  62 */
-        "F = 46(a,(!c*!b),d)",       /*  63 */
-        "F = 4A(a,(!c*!b),d)",       /*  64 */
-        "F = CA((!c*!b),!d,a)",      /*  65 */
-        "F = 01AC(a,b,c,d)",         /*  66 */
-        "F = 01AD(a,b,c,d)",         /*  67 */
-        "F = 01AE(a,b,c,d)",         /*  68 */
-        "F = 01AF(a,b,c,d)",         /*  69 */
-        "F = 01BC(a,b,c,d)",         /*  70 */
-        "F = 01BD(a,b,c,d)",         /*  71 */
-        "F = 01BE(a,b,c,d)",         /*  72 */
-        "F = 01BF(a,b,c,d)",         /*  73 */
-        "F = 01E8(a,b,c,d)",         /*  74 */
-        "F = 01E9(a,b,c,d)",         /*  75 */
-        "F = 01EA(a,b,c,d)",         /*  76 */
-        "F = 01EB(a,b,c,d)",         /*  77 */
-        "F = 25((!b*!a),c,d)",       /*  78 */
-        "F = !CA(d,c,(!b*!a))",      /*  79 */
-        "F = (d+!(!c*(!b*!a)))",     /*  80 */
-        "F = 16(b,c,d)",             /*  81 */
-        "F = 033D(a,b,c,d)",         /*  82 */
-        "F = 17(b,c,d)",             /*  83 */
-        "F = ((!d*!a)+(!c*!b))",     /*  84 */
-        "F = !(!(!c*!b)*!(!d*!a))",  /*  85 */
-        "F = 0358(a,b,c,d)",         /*  86 */
-        "F = 0359(a,b,c,d)",         /*  87 */
-        "F = 035A(a,b,c,d)",         /*  88 */
-        "F = 035B(a,b,c,d)",         /*  89 */
-        "F = 035E(a,b,c,d)",         /*  90 */
-        "F = 035F(a,b,c,d)",         /*  91 */
-        "F = 0368(a,b,c,d)",         /*  92 */
-        "F = 0369(a,b,c,d)",         /*  93 */
-        "F = 036A(a,b,c,d)",         /*  94 */
-        "F = 036B(a,b,c,d)",         /*  95 */
-        "F = 036C(a,b,c,d)",         /*  96 */
-        "F = 036D(a,b,c,d)",         /*  97 */
-        "F = 036E(a,b,c,d)",         /*  98 */
-        "F = 036F(a,b,c,d)",         /*  99 */
-        "F = 037C(a,b,c,d)",         /* 100 */
-        "F = 037D(a,b,c,d)",         /* 101 */
-        "F = 037E(a,b,c,d)",         /* 102 */
-        "F = 18(b,c,d)",             /* 103 */
-        "F = 03C1(a,b,c,d)",         /* 104 */
-        "F = 19(b,c,d)",             /* 105 */
-        "F = 03C5(a,b,c,d)",         /* 106 */
-        "F = 03C6(a,b,c,d)",         /* 107 */
-        "F = 03C7(a,b,c,d)",         /* 108 */
-        "F = CA(!c,!d,b)",           /* 109 */
-        "F = 03D4(a,b,c,d)",         /* 110 */
-        "F = 03D5(a,b,c,d)",         /* 111 */
-        "F = 03D6(a,b,c,d)",         /* 112 */
-        "F = 03D7(a,b,c,d)",         /* 113 */
-        "F = 03D8(a,b,c,d)",         /* 114 */
-        "F = 03D9(a,b,c,d)",         /* 115 */
-        "F = 03DB(a,b,c,d)",         /* 116 */
-        "F = 03DC(a,b,c,d)",         /* 117 */
-        "F = 03DD(a,b,c,d)",         /* 118 */
-        "F = 03DE(a,b,c,d)",         /* 119 */
-        "F = (d+!(!c*!b))",          /* 120 */
-        "F = ((d+c)*(b+a))",         /* 121 */
-        "F = 0661(a,b,c,d)",         /* 122 */
-        "F = 0662(a,b,c,d)",         /* 123 */
-        "F = 0663(a,b,c,d)",         /* 124 */
-        "F = (!(d*c)*(b+a))",        /* 125 */
-        "F = 0667(a,b,c,d)",         /* 126 */
-        "F = 29((b+a),c,d)",         /* 127 */
-        "F = 066B(a,b,c,d)",         /* 128 */
-        "F = 2B((b+a),c,d)",         /* 129 */
-        "F = 0672(a,b,c,d)",         /* 130 */
-        "F = 0673(a,b,c,d)",         /* 131 */
-        "F = 0676(a,b,c,d)",         /* 132 */
-        "F = 0678(a,b,c,d)",         /* 133 */
-        "F = 0679(a,b,c,d)",         /* 134 */
-        "F = 067A(a,b,c,d)",         /* 135 */
-        "F = 067B(a,b,c,d)",         /* 136 */
-        "F = 067E(a,b,c,d)",         /* 137 */
-        "F = 24((b+a),c,d)",         /* 138 */
-        "F = 0691(a,b,c,d)",         /* 139 */
-        "F = 0693(a,b,c,d)",         /* 140 */
-        "F = 26((b+a),c,d)",         /* 141 */
-        "F = 0697(a,b,c,d)",         /* 142 */
-        "F = !CA(d,c,(b+a))",        /* 143 */
-        "F = 06B0(a,b,c,d)",         /* 144 */
-        "F = 06B1(a,b,c,d)",         /* 145 */
-        "F = 06B2(a,b,c,d)",         /* 146 */
-        "F = 06B3(a,b,c,d)",         /* 147 */
-        "F = 06B4(a,b,c,d)",         /* 148 */
-        "F = 06B5(a,b,c,d)",         /* 149 */
-        "F = 06B6(a,b,c,d)",         /* 150 */
-        "F = 06B7(a,b,c,d)",         /* 151 */
-        "F = 06B9(a,b,c,d)",         /* 152 */
-        "F = 06BD(a,b,c,d)",         /* 153 */
-        "F = 2C((b+a),c,d)",         /* 154 */
-        "F = 06F1(a,b,c,d)",         /* 155 */
-        "F = 06F2(a,b,c,d)",         /* 156 */
-        "F = CA((b+a),!d,c)",        /* 157 */
-        "F = (d+!(!c*!(b+!a)))",     /* 158 */
-        "F = 0776(a,b,c,d)",         /* 159 */
-        "F = 16((b*a),c,d)",         /* 160 */
-        "F = 0779(a,b,c,d)",         /* 161 */
-        "F = 077A(a,b,c,d)",         /* 162 */
-        "F = 077E(a,b,c,d)",         /* 163 */
-        "F = 07B0(a,b,c,d)",         /* 164 */
-        "F = 07B1(a,b,c,d)",         /* 165 */
-        "F = 07B4(a,b,c,d)",         /* 166 */
-        "F = 07B5(a,b,c,d)",         /* 167 */
-        "F = 07B6(a,b,c,d)",         /* 168 */
-        "F = 07BC(a,b,c,d)",         /* 169 */
-        "F = 07E0(a,b,c,d)",         /* 170 */
-        "F = 07E1(a,b,c,d)",         /* 171 */
-        "F = 07E2(a,b,c,d)",         /* 172 */
-        "F = 07E3(a,b,c,d)",         /* 173 */
-        "F = 07E6(a,b,c,d)",         /* 174 */
-        "F = 07E9(a,b,c,d)",         /* 175 */
-        "F = 1C((b*a),c,d)",         /* 176 */
-        "F = 07F1(a,b,c,d)",         /* 177 */
-        "F = 07F2(a,b,c,d)",         /* 178 */
-        "F = (d+!(!c*!(b*a)))",      /* 179 */
-        "F = (d+c)",                 /* 180 */
-        "F = 1668(a,b,c,d)",         /* 181 */
-        "F = 1669(a,b,c,d)",         /* 182 */
-        "F = 166A(a,b,c,d)",         /* 183 */
-        "F = 166B(a,b,c,d)",         /* 184 */
-        "F = 166E(a,b,c,d)",         /* 185 */
-        "F = 167E(a,b,c,d)",         /* 186 */
-        "F = 1681(a,b,c,d)",         /* 187 */
-        "F = 1683(a,b,c,d)",         /* 188 */
-        "F = 1686(a,b,c,d)",         /* 189 */
-        "F = 1687(a,b,c,d)",         /* 190 */
-        "F = 1689(a,b,c,d)",         /* 191 */
-        "F = 168B(a,b,c,d)",         /* 192 */
-        "F = 168E(a,b,c,d)",         /* 193 */
-        "F = 1696(a,b,c,d)",         /* 194 */
-        "F = 1697(a,b,c,d)",         /* 195 */
-        "F = 1698(a,b,c,d)",         /* 196 */
-        "F = 1699(a,b,c,d)",         /* 197 */
-        "F = 169A(a,b,c,d)",         /* 198 */
-        "F = 169B(a,b,c,d)",         /* 199 */
-        "F = 169E(a,b,c,d)",         /* 200 */
-        "F = 16A9(a,b,c,d)",         /* 201 */
-        "F = 16AC(a,b,c,d)",         /* 202 */
-        "F = 16AD(a,b,c,d)",         /* 203 */
-        "F = 16BC(a,b,c,d)",         /* 204 */
-        "F = (d+E9(a,b,c))",         /* 205 */
-        "F = 177E(a,b,c,d)",         /* 206 */
-        "F = 178E(a,b,c,d)",         /* 207 */
-        "F = 1796(a,b,c,d)",         /* 208 */
-        "F = 1798(a,b,c,d)",         /* 209 */
-        "F = 179A(a,b,c,d)",         /* 210 */
-        "F = 17AC(a,b,c,d)",         /* 211 */
-        "F = (d+E8(a,b,c))",         /* 212 */
-        "F = (d+E7(a,b,c))",         /* 213 */
-        "F = 19E1(a,b,c,d)",         /* 214 */
-        "F = 19E3(a,b,c,d)",         /* 215 */
-        "F = (d+E6(a,b,c))",         /* 216 */
-        "F = 1BD8(a,b,c,d)",         /* 217 */
-        "F = (d+CA(b,c,a))",         /* 218 */
-        "F = (d+(c+(!b*!a)))",       /* 219 */
-        "F = (d+(c+!b))",            /* 220 */
-        "F = (d+(c+(b+a)))"          /* 221 */
-    };
-    return (char **)pNames;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/kitFactor.c b/src/aig/kit/kitFactor.c
deleted file mode 100644
index ec4775ca..00000000
--- a/src/aig/kit/kitFactor.c
+++ /dev/null
@@ -1,344 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kitFactor.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [Algebraic factoring.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Dec 6, 2006.]
-
-  Revision    [$Id: kitFactor.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// factoring fails if intermediate memory usage exceed this limit
-#define KIT_FACTOR_MEM_LIMIT  (1<<20)
-
-static Kit_Edge_t  Kit_SopFactor_rec( Kit_Graph_t * pFForm, Kit_Sop_t * cSop, int nLits, Vec_Int_t * vMemory );
-static Kit_Edge_t  Kit_SopFactorLF_rec( Kit_Graph_t * pFForm, Kit_Sop_t * cSop, Kit_Sop_t * cSimple, int nLits, Vec_Int_t * vMemory );
-static Kit_Edge_t  Kit_SopFactorTrivial( Kit_Graph_t * pFForm, Kit_Sop_t * cSop, int nLits );
-static Kit_Edge_t  Kit_SopFactorTrivialCube( Kit_Graph_t * pFForm, unsigned uCube, int nLits );
-
-extern int         Kit_SopFactorVerify( Vec_Int_t * cSop, Kit_Graph_t * pFForm, int nVars );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Factors the cover.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Graph_t * Kit_SopFactor( Vec_Int_t * vCover, int fCompl, int nVars, Vec_Int_t * vMemory )
-{
-    Kit_Sop_t Sop, * cSop = &Sop;
-    Kit_Graph_t * pFForm;
-    Kit_Edge_t eRoot;
-//    int nCubes;
-
-    // works for up to 15 variables because division procedure
-    // used the last bit for marking the cubes going to the remainder
-    assert( nVars < 16 );
-
-    // check for trivial functions
-    if ( Vec_IntSize(vCover) == 0 )
-        return Kit_GraphCreateConst0();
-    if ( Vec_IntSize(vCover) == 1 && Vec_IntEntry(vCover, 0) == 0 )
-        return Kit_GraphCreateConst1();
-
-    // prepare memory manager
-//    Vec_IntClear( vMemory );
-    Vec_IntGrow( vMemory, KIT_FACTOR_MEM_LIMIT );
-
-    // perform CST
-    Kit_SopCreateInverse( cSop, vCover, 2 * nVars, vMemory ); // CST
-
-    // start the factored form
-    pFForm = Kit_GraphCreate( nVars );
-    // factor the cover
-    eRoot = Kit_SopFactor_rec( pFForm, cSop, 2 * nVars, vMemory );
-    // finalize the factored form
-    Kit_GraphSetRoot( pFForm, eRoot );
-    if ( fCompl )
-        Kit_GraphComplement( pFForm );
-
-    // verify the factored form
-//    nCubes = Vec_IntSize(vCover);
-//    Vec_IntShrink( vCover, nCubes );
-//    if ( !Kit_SopFactorVerify( vCover, pFForm, nVars ) )
-//        printf( "Verification has failed.\n" );
-    return pFForm;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recursive factoring procedure.]
-
-  Description [For the pseudo-code, see Hachtel/Somenzi, 
-  Logic synthesis and verification algorithms, Kluwer, 1996, p. 432.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Edge_t Kit_SopFactor_rec( Kit_Graph_t * pFForm, Kit_Sop_t * cSop, int nLits, Vec_Int_t * vMemory )
-{
-    Kit_Sop_t Div, Quo, Rem, Com;
-    Kit_Sop_t * cDiv = &Div, * cQuo = &Quo, * cRem = &Rem, * cCom = &Com;
-    Kit_Edge_t eNodeDiv, eNodeQuo, eNodeRem, eNodeAnd;
-
-    // make sure the cover contains some cubes
-    assert( Kit_SopCubeNum(cSop) > 0 );
-
-    // get the divisor
-    if ( !Kit_SopDivisor(cDiv, cSop, nLits, vMemory) )
-        return Kit_SopFactorTrivial( pFForm, cSop, nLits );
-
-    // divide the cover by the divisor
-    Kit_SopDivideInternal( cSop, cDiv, cQuo, cRem, vMemory );
-
-    // check the trivial case
-    assert( Kit_SopCubeNum(cQuo) > 0 );
-    if ( Kit_SopCubeNum(cQuo) == 1 )
-        return Kit_SopFactorLF_rec( pFForm, cSop, cQuo, nLits, vMemory );
-
-    // make the quotient cube ABC_FREE
-    Kit_SopMakeCubeFree( cQuo );
-
-    // divide the cover by the quotient
-    Kit_SopDivideInternal( cSop, cQuo, cDiv, cRem, vMemory );
-
-    // check the trivial case
-    if ( Kit_SopIsCubeFree( cDiv ) )
-    {
-        eNodeDiv = Kit_SopFactor_rec( pFForm, cDiv, nLits, vMemory );
-        eNodeQuo = Kit_SopFactor_rec( pFForm, cQuo, nLits, vMemory );
-        eNodeAnd = Kit_GraphAddNodeAnd( pFForm, eNodeDiv, eNodeQuo );
-        if ( Kit_SopCubeNum(cRem) == 0 )
-            return eNodeAnd;
-        eNodeRem = Kit_SopFactor_rec( pFForm, cRem, nLits, vMemory );
-        return Kit_GraphAddNodeOr( pFForm, eNodeAnd, eNodeRem );
-    }
-
-    // get the common cube
-    Kit_SopCommonCubeCover( cCom, cDiv, vMemory );
-
-    // solve the simple problem
-    return Kit_SopFactorLF_rec( pFForm, cSop, cCom, nLits, vMemory );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Internal recursive factoring procedure for the leaf case.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Edge_t Kit_SopFactorLF_rec( Kit_Graph_t * pFForm, Kit_Sop_t * cSop, Kit_Sop_t * cSimple, int nLits, Vec_Int_t * vMemory )
-{
-    Kit_Sop_t Div, Quo, Rem;
-    Kit_Sop_t * cDiv = &Div, * cQuo = &Quo, * cRem = &Rem;
-    Kit_Edge_t eNodeDiv, eNodeQuo, eNodeRem, eNodeAnd;
-    assert( Kit_SopCubeNum(cSimple) == 1 );
-    // get the most often occurring literal
-    Kit_SopBestLiteralCover( cDiv, cSop, Kit_SopCube(cSimple, 0), nLits, vMemory );
-    // divide the cover by the literal
-    Kit_SopDivideByCube( cSop, cDiv, cQuo, cRem, vMemory );
-    // get the node pointer for the literal
-    eNodeDiv = Kit_SopFactorTrivialCube( pFForm, Kit_SopCube(cDiv, 0), nLits );
-    // factor the quotient and remainder
-    eNodeQuo = Kit_SopFactor_rec( pFForm, cQuo, nLits, vMemory );
-    eNodeAnd = Kit_GraphAddNodeAnd( pFForm, eNodeDiv, eNodeQuo );
-    if ( Kit_SopCubeNum(cRem) == 0 )
-        return eNodeAnd;
-    eNodeRem = Kit_SopFactor_rec( pFForm, cRem, nLits, vMemory );
-    return Kit_GraphAddNodeOr( pFForm, eNodeAnd, eNodeRem );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Factoring cube.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Edge_t Kit_SopFactorTrivialCube_rec( Kit_Graph_t * pFForm, unsigned uCube, int nStart, int nFinish )
-{
-    Kit_Edge_t eNode1, eNode2;
-    int i, iLit = -1, nLits, nLits1, nLits2;
-    assert( uCube );
-    // count the number of literals in this interval
-    nLits = 0;
-    for ( i = nStart; i < nFinish; i++ )
-        if ( Kit_CubeHasLit(uCube, i) )
-        {
-            iLit = i;
-            nLits++;
-        }
-    assert( iLit != -1 );
-    // quit if there is only one literal        
-    if ( nLits == 1 )
-        return Kit_EdgeCreate( iLit/2, iLit%2 ); // CST
-    // split the literals into two parts
-    nLits1 = nLits/2;
-    nLits2 = nLits - nLits1;
-//    nLits2 = nLits/2;
-//    nLits1 = nLits - nLits2;
-    // find the splitting point
-    nLits = 0;
-    for ( i = nStart; i < nFinish; i++ )
-        if ( Kit_CubeHasLit(uCube, i) )
-        {
-            if ( nLits == nLits1 )
-                break;
-            nLits++;
-        }
-    // recursively construct the tree for the parts
-    eNode1 = Kit_SopFactorTrivialCube_rec( pFForm, uCube, nStart, i  );
-    eNode2 = Kit_SopFactorTrivialCube_rec( pFForm, uCube, i, nFinish );
-    return Kit_GraphAddNodeAnd( pFForm, eNode1, eNode2 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Factoring cube.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Edge_t Kit_SopFactorTrivialCube( Kit_Graph_t * pFForm, unsigned uCube, int nLits )
-{
-    return Kit_SopFactorTrivialCube_rec( pFForm, uCube, 0, nLits );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Factoring SOP.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Edge_t Kit_SopFactorTrivial_rec( Kit_Graph_t * pFForm, unsigned * pCubes, int nCubes, int nLits )
-{
-    Kit_Edge_t eNode1, eNode2;
-    int nCubes1, nCubes2;
-    if ( nCubes == 1 )
-        return Kit_SopFactorTrivialCube_rec( pFForm, pCubes[0], 0, nLits );
-    // split the cubes into two parts
-    nCubes1 = nCubes/2;
-    nCubes2 = nCubes - nCubes1;
-//    nCubes2 = nCubes/2;
-//    nCubes1 = nCubes - nCubes2;
-    // recursively construct the tree for the parts
-    eNode1 = Kit_SopFactorTrivial_rec( pFForm, pCubes,           nCubes1, nLits );
-    eNode2 = Kit_SopFactorTrivial_rec( pFForm, pCubes + nCubes1, nCubes2, nLits );
-    return Kit_GraphAddNodeOr( pFForm, eNode1, eNode2 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Factoring the cover, which has no algebraic divisors.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Edge_t Kit_SopFactorTrivial( Kit_Graph_t * pFForm, Kit_Sop_t * cSop, int nLits )
-{
-    return Kit_SopFactorTrivial_rec( pFForm, cSop->pCubes, cSop->nCubes, nLits );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Testing procedure for the factoring code.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_FactorTest( unsigned * pTruth, int nVars )
-{
-    Vec_Int_t * vCover, * vMemory;
-    Kit_Graph_t * pGraph;
-//    unsigned uTruthRes;
-    int RetValue;
-
-    // derive SOP
-    vCover = Vec_IntAlloc( 0 );
-    RetValue = Kit_TruthIsop( pTruth, nVars, vCover, 0 );
-    assert( RetValue == 0 );
-
-    // derive factored form
-    vMemory = Vec_IntAlloc( 0 );
-    pGraph = Kit_SopFactor( vCover, 0, nVars, vMemory );
-/*
-    // derive truth table
-    assert( nVars <= 5 );
-    uTruthRes = Kit_GraphToTruth( pGraph );
-    if ( uTruthRes != pTruth[0] )
-        printf( "Verification failed!" );
-*/
-    printf( "Vars = %2d. Cubes = %3d. FFNodes = %3d. FF_memory = %3d.\n",
-        nVars, Vec_IntSize(vCover), Kit_GraphNodeNum(pGraph), Vec_IntSize(vMemory) );
-
-    Vec_IntFree( vMemory );
-    Vec_IntFree( vCover );
-    Kit_GraphFree( pGraph );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/kitGraph.c b/src/aig/kit/kitGraph.c
deleted file mode 100644
index e4eea885..00000000
--- a/src/aig/kit/kitGraph.c
+++ /dev/null
@@ -1,402 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kitGraph.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [Decomposition graph representation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Dec 6, 2006.]
-
-  Revision    [$Id: kitGraph.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates a graph with the given number of leaves.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Graph_t * Kit_GraphCreate( int nLeaves )   
-{
-    Kit_Graph_t * pGraph;
-    pGraph = ABC_ALLOC( Kit_Graph_t, 1 );
-    memset( pGraph, 0, sizeof(Kit_Graph_t) );
-    pGraph->nLeaves = nLeaves;
-    pGraph->nSize = nLeaves;
-    pGraph->nCap = 2 * nLeaves + 50;
-    pGraph->pNodes = ABC_ALLOC( Kit_Node_t, pGraph->nCap );
-    memset( pGraph->pNodes, 0, sizeof(Kit_Node_t) * pGraph->nSize );
-    return pGraph;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates constant 0 graph.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Graph_t * Kit_GraphCreateConst0()   
-{
-    Kit_Graph_t * pGraph;
-    pGraph = ABC_ALLOC( Kit_Graph_t, 1 );
-    memset( pGraph, 0, sizeof(Kit_Graph_t) );
-    pGraph->fConst = 1;
-    pGraph->eRoot.fCompl = 1;
-    return pGraph;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates constant 1 graph.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Graph_t * Kit_GraphCreateConst1()   
-{
-    Kit_Graph_t * pGraph;
-    pGraph = ABC_ALLOC( Kit_Graph_t, 1 );
-    memset( pGraph, 0, sizeof(Kit_Graph_t) );
-    pGraph->fConst = 1;
-    return pGraph;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the literal graph.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Graph_t * Kit_GraphCreateLeaf( int iLeaf, int nLeaves, int fCompl )   
-{
-    Kit_Graph_t * pGraph;
-    assert( 0 <= iLeaf && iLeaf < nLeaves );
-    pGraph = Kit_GraphCreate( nLeaves );
-    pGraph->eRoot.Node   = iLeaf;
-    pGraph->eRoot.fCompl = fCompl;
-    return pGraph;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates a graph with the given number of leaves.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_GraphFree( Kit_Graph_t * pGraph )   
-{
-    ABC_FREE( pGraph->pNodes );
-    ABC_FREE( pGraph );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Appends a new node to the graph.]
-
-  Description [This procedure is meant for internal use.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Node_t * Kit_GraphAppendNode( Kit_Graph_t * pGraph )   
-{
-    Kit_Node_t * pNode;
-    if ( pGraph->nSize == pGraph->nCap )
-    {
-        pGraph->pNodes = ABC_REALLOC( Kit_Node_t, pGraph->pNodes, 2 * pGraph->nCap ); 
-        pGraph->nCap   = 2 * pGraph->nCap;
-    }
-    pNode = pGraph->pNodes + pGraph->nSize++;
-    memset( pNode, 0, sizeof(Kit_Node_t) );
-    return pNode;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates an AND node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Edge_t Kit_GraphAddNodeAnd( Kit_Graph_t * pGraph, Kit_Edge_t eEdge0, Kit_Edge_t eEdge1 )
-{
-    Kit_Node_t * pNode;
-    // get the new node
-    pNode = Kit_GraphAppendNode( pGraph );
-    // set the inputs and other info
-    pNode->eEdge0 = eEdge0;
-    pNode->eEdge1 = eEdge1;
-    pNode->fCompl0 = eEdge0.fCompl;
-    pNode->fCompl1 = eEdge1.fCompl;
-    return Kit_EdgeCreate( pGraph->nSize - 1, 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates an OR node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Edge_t Kit_GraphAddNodeOr( Kit_Graph_t * pGraph, Kit_Edge_t eEdge0, Kit_Edge_t eEdge1 )
-{
-    Kit_Node_t * pNode;
-    // get the new node
-    pNode = Kit_GraphAppendNode( pGraph );
-    // set the inputs and other info
-    pNode->eEdge0 = eEdge0;
-    pNode->eEdge1 = eEdge1;
-    pNode->fCompl0 = eEdge0.fCompl;
-    pNode->fCompl1 = eEdge1.fCompl;
-    // make adjustments for the OR gate
-    pNode->fNodeOr = 1;
-    pNode->eEdge0.fCompl = !pNode->eEdge0.fCompl;
-    pNode->eEdge1.fCompl = !pNode->eEdge1.fCompl;
-    return Kit_EdgeCreate( pGraph->nSize - 1, 1 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates an XOR node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Edge_t Kit_GraphAddNodeXor( Kit_Graph_t * pGraph, Kit_Edge_t eEdge0, Kit_Edge_t eEdge1, int Type )
-{
-    Kit_Edge_t eNode0, eNode1, eNode;
-    if ( Type == 0 )
-    {
-        // derive the first AND
-        eEdge0.fCompl ^= 1;
-        eNode0 = Kit_GraphAddNodeAnd( pGraph, eEdge0, eEdge1 );
-        eEdge0.fCompl ^= 1;
-        // derive the second AND
-        eEdge1.fCompl ^= 1;
-        eNode1 = Kit_GraphAddNodeAnd( pGraph, eEdge0, eEdge1 );
-        // derive the final OR
-        eNode = Kit_GraphAddNodeOr( pGraph, eNode0, eNode1 );
-    }
-    else
-    {
-        // derive the first AND
-        eNode0 = Kit_GraphAddNodeAnd( pGraph, eEdge0, eEdge1 );
-        // derive the second AND
-        eEdge0.fCompl ^= 1;
-        eEdge1.fCompl ^= 1;
-        eNode1 = Kit_GraphAddNodeAnd( pGraph, eEdge0, eEdge1 );
-        // derive the final OR
-        eNode = Kit_GraphAddNodeOr( pGraph, eNode0, eNode1 );
-        eNode.fCompl ^= 1;
-    }
-    return eNode;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates an XOR node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Edge_t Kit_GraphAddNodeMux( Kit_Graph_t * pGraph, Kit_Edge_t eEdgeC, Kit_Edge_t eEdgeT, Kit_Edge_t eEdgeE, int Type )
-{
-    Kit_Edge_t eNode0, eNode1, eNode;
-    if ( Type == 0 )
-    {
-        // derive the first AND
-        eNode0 = Kit_GraphAddNodeAnd( pGraph, eEdgeC, eEdgeT );
-        // derive the second AND
-        eEdgeC.fCompl ^= 1;
-        eNode1 = Kit_GraphAddNodeAnd( pGraph, eEdgeC, eEdgeE );
-        // derive the final OR
-        eNode = Kit_GraphAddNodeOr( pGraph, eNode0, eNode1 );
-    }
-    else
-    {
-        // complement the arguments
-        eEdgeT.fCompl ^= 1;
-        eEdgeE.fCompl ^= 1;
-        // derive the first AND
-        eNode0 = Kit_GraphAddNodeAnd( pGraph, eEdgeC, eEdgeT );
-        // derive the second AND
-        eEdgeC.fCompl ^= 1;
-        eNode1 = Kit_GraphAddNodeAnd( pGraph, eEdgeC, eEdgeE );
-        // derive the final OR
-        eNode = Kit_GraphAddNodeOr( pGraph, eNode0, eNode1 );
-        eNode.fCompl ^= 1;
-    }
-    return eNode;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Kit_GraphToTruth( Kit_Graph_t * pGraph )
-{
-    unsigned uTruths[5] = { 0xAAAAAAAA, 0xCCCCCCCC, 0xF0F0F0F0, 0xFF00FF00, 0xFFFF0000 };
-    unsigned uTruth = 0, uTruth0, uTruth1;
-    Kit_Node_t * pNode;
-    int i;
-
-    // sanity checks
-    assert( Kit_GraphLeaveNum(pGraph) >= 0 );
-    assert( Kit_GraphLeaveNum(pGraph) <= pGraph->nSize );
-    assert( Kit_GraphLeaveNum(pGraph) <= 5 );
-
-    // check for constant function
-    if ( Kit_GraphIsConst(pGraph) )
-        return Kit_GraphIsComplement(pGraph)? 0 : ~((unsigned)0);
-    // check for a literal
-    if ( Kit_GraphIsVar(pGraph) )
-        return Kit_GraphIsComplement(pGraph)? ~uTruths[Kit_GraphVarInt(pGraph)] : uTruths[Kit_GraphVarInt(pGraph)];
-
-    // assign the elementary variables
-    Kit_GraphForEachLeaf( pGraph, pNode, i )
-        pNode->pFunc = (void *)(long)uTruths[i];
-
-    // compute the function for each internal node
-    Kit_GraphForEachNode( pGraph, pNode, i )
-    {
-        uTruth0 = (unsigned)(long)Kit_GraphNode(pGraph, pNode->eEdge0.Node)->pFunc;
-        uTruth1 = (unsigned)(long)Kit_GraphNode(pGraph, pNode->eEdge1.Node)->pFunc;
-        uTruth0 = pNode->eEdge0.fCompl? ~uTruth0 : uTruth0;
-        uTruth1 = pNode->eEdge1.fCompl? ~uTruth1 : uTruth1;
-        uTruth = uTruth0 & uTruth1;
-        pNode->pFunc = (void *)(long)uTruth;
-    }
-
-    // complement the result if necessary
-    return Kit_GraphIsComplement(pGraph)? ~uTruth : uTruth;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the factored form from the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Kit_Graph_t * Kit_TruthToGraph( unsigned * pTruth, int nVars, Vec_Int_t * vMemory )
-{
-    Kit_Graph_t * pGraph;
-    int RetValue;
-    // derive SOP
-    RetValue = Kit_TruthIsop( pTruth, nVars, vMemory, 1 ); // tried 1 and found not useful in "renode"
-    if ( RetValue == -1 )
-        return NULL;
-    if ( Vec_IntSize(vMemory) > (1<<16) )
-        return NULL;
-//    printf( "Isop size = %d.\n", Vec_IntSize(vMemory) );
-    assert( RetValue == 0 || RetValue == 1 );
-    // derive factored form
-    pGraph = Kit_SopFactor( vMemory, RetValue, nVars, vMemory );
-    return pGraph;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the maximum depth from the leaf to the root.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_GraphLeafDepth_rec( Kit_Graph_t * pGraph, Kit_Node_t * pNode, Kit_Node_t * pLeaf )
-{
-    int Depth0, Depth1, Depth;
-    if ( pNode == pLeaf )
-        return 0;
-    if ( Kit_GraphNodeIsVar(pGraph, pNode) )
-        return -100;
-    Depth0 = Kit_GraphLeafDepth_rec( pGraph, Kit_GraphNodeFanin0(pGraph, pNode), pLeaf );
-    Depth1 = Kit_GraphLeafDepth_rec( pGraph, Kit_GraphNodeFanin1(pGraph, pNode), pLeaf );
-    Depth = KIT_MAX( Depth0, Depth1 );
-    Depth = (Depth == -100) ? -100 : Depth + 1;
-    return Depth;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/kitHop.c b/src/aig/kit/kitHop.c
deleted file mode 100644
index 9dfa67a8..00000000
--- a/src/aig/kit/kitHop.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kitHop.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [Procedures involving AIGs.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Dec 6, 2006.]
-
-  Revision    [$Id: kitHop.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "kit.h"
-#include "hop.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Transforms the decomposition graph into the AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Hop_Obj_t * Kit_GraphToHopInternal( Hop_Man_t * pMan, Kit_Graph_t * pGraph )
-{
-    Kit_Node_t * pNode = NULL;
-    Hop_Obj_t * pAnd0, * pAnd1;
-    int i;
-    // check for constant function
-    if ( Kit_GraphIsConst(pGraph) )
-        return Hop_NotCond( Hop_ManConst1(pMan), Kit_GraphIsComplement(pGraph) );
-    // check for a literal
-    if ( Kit_GraphIsVar(pGraph) )
-        return Hop_NotCond( (Hop_Obj_t *)Kit_GraphVar(pGraph)->pFunc, Kit_GraphIsComplement(pGraph) );
-    // build the AIG nodes corresponding to the AND gates of the graph
-    Kit_GraphForEachNode( pGraph, pNode, i )
-    {
-        pAnd0 = Hop_NotCond( (Hop_Obj_t *)Kit_GraphNode(pGraph, pNode->eEdge0.Node)->pFunc, pNode->eEdge0.fCompl ); 
-        pAnd1 = Hop_NotCond( (Hop_Obj_t *)Kit_GraphNode(pGraph, pNode->eEdge1.Node)->pFunc, pNode->eEdge1.fCompl ); 
-        pNode->pFunc = Hop_And( pMan, pAnd0, pAnd1 );
-    }
-    // complement the result if necessary
-    return Hop_NotCond( (Hop_Obj_t *)pNode->pFunc, Kit_GraphIsComplement(pGraph) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Strashes one logic node using its SOP.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Hop_Obj_t * Kit_GraphToHop( Hop_Man_t * pMan, Kit_Graph_t * pGraph )
-{
-    Kit_Node_t * pNode = NULL;
-    int i;
-    // collect the fanins
-    Kit_GraphForEachLeaf( pGraph, pNode, i )
-        pNode->pFunc = Hop_IthVar( pMan, i );
-    // perform strashing
-    return Kit_GraphToHopInternal( pMan, pGraph );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Strashed onen logic nodes using its truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Hop_Obj_t * Kit_TruthToHop( Hop_Man_t * pMan, unsigned * pTruth, int nVars, Vec_Int_t * vMemory )
-{
-    Hop_Obj_t * pObj;
-    Kit_Graph_t * pGraph;
-    // transform truth table into the decomposition tree
-    if ( vMemory == NULL )
-    {
-        vMemory = Vec_IntAlloc( 0 );
-        pGraph = Kit_TruthToGraph( pTruth, nVars, vMemory );
-        Vec_IntFree( vMemory );
-    }
-    else
-        pGraph = Kit_TruthToGraph( pTruth, nVars, vMemory );
-    if ( pGraph == NULL )
-    {
-        printf( "Kit_TruthToHop(): Converting truth table to AIG has failed for function:\n" );
-        Kit_DsdPrintFromTruth( pTruth, nVars ); printf( "\n" );
-    }
-    // derive the AIG for the decomposition tree
-    pObj = Kit_GraphToHop( pMan, pGraph );
-    Kit_GraphFree( pGraph );
-    return pObj;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Strashes one logic node using its SOP.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Hop_Obj_t * Kit_CoverToHop( Hop_Man_t * pMan, Vec_Int_t * vCover, int nVars, Vec_Int_t * vMemory )
-{
-    Kit_Graph_t * pGraph;
-    Hop_Obj_t * pFunc;
-    // perform factoring
-    Vec_IntClear( vMemory );
-    pGraph = Kit_SopFactor( vCover, 0, nVars, vMemory );
-    // convert graph to the AIG
-    pFunc = Kit_GraphToHop( pMan, pGraph );
-    Kit_GraphFree( pGraph );
-    return pFunc;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/kitIsop.c b/src/aig/kit/kitIsop.c
deleted file mode 100644
index fc017c0e..00000000
--- a/src/aig/kit/kitIsop.c
+++ /dev/null
@@ -1,330 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kitIsop.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [ISOP computation based on Morreale's algorithm.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Dec 6, 2006.]
-
-  Revision    [$Id: kitIsop.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// ISOP computation fails if intermediate memory usage exceed this limit
-#define KIT_ISOP_MEM_LIMIT  (1<<20)
-
-// static procedures to compute ISOP
-static unsigned * Kit_TruthIsop_rec( unsigned * puOn, unsigned * puOnDc, int nVars, Kit_Sop_t * pcRes, Vec_Int_t * vStore );
-static unsigned   Kit_TruthIsop5_rec( unsigned uOn, unsigned uOnDc, int nVars, Kit_Sop_t * pcRes, Vec_Int_t * vStore );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Computes ISOP from TT.]
-
-  Description [Returns the cover in vMemory. Uses the rest of array in vMemory
-  as an intermediate memory storage. Returns the cover with -1 cubes, if the
-  the computation exceeded the memory limit (KIT_ISOP_MEM_LIMIT words of
-  intermediate data).]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_TruthIsop( unsigned * puTruth, int nVars, Vec_Int_t * vMemory, int fTryBoth )
-{
-    Kit_Sop_t cRes, * pcRes = &cRes;
-    Kit_Sop_t cRes2, * pcRes2 = &cRes2;
-    unsigned * pResult;
-    int RetValue = 0;
-    assert( nVars >= 0 && nVars < 16 );
-    // if nVars < 5, make sure it does not depend on those vars
-//    for ( i = nVars; i < 5; i++ )
-//        assert( !Kit_TruthVarInSupport(puTruth, 5, i) );
-    // prepare memory manager
-    Vec_IntClear( vMemory );
-    Vec_IntGrow( vMemory, KIT_ISOP_MEM_LIMIT );
-    // compute ISOP for the direct polarity
-    pResult = Kit_TruthIsop_rec( puTruth, puTruth, nVars, pcRes, vMemory );
-    if ( pcRes->nCubes == -1 )
-    {
-        vMemory->nSize = -1;
-        return -1;
-    }
-    assert( Kit_TruthIsEqual( puTruth, pResult, nVars ) );
-    if ( pcRes->nCubes == 0 || (pcRes->nCubes == 1 && pcRes->pCubes[0] == 0) )
-    {
-        vMemory->pArray[0] = 0;
-        Vec_IntShrink( vMemory, pcRes->nCubes );
-        return 0;
-    }
-    if ( fTryBoth )
-    {
-        // compute ISOP for the complemented polarity
-        Kit_TruthNot( puTruth, puTruth, nVars );
-        pResult = Kit_TruthIsop_rec( puTruth, puTruth, nVars, pcRes2, vMemory );
-        if ( pcRes2->nCubes >= 0 )
-        {
-            assert( Kit_TruthIsEqual( puTruth, pResult, nVars ) );
-            if ( pcRes->nCubes > pcRes2->nCubes )
-            {
-                RetValue = 1;
-                pcRes = pcRes2;
-            }
-        }
-        Kit_TruthNot( puTruth, puTruth, nVars );
-    }
-//    printf( "%d ", vMemory->nSize );
-    // move the cover representation to the beginning of the memory buffer
-    memmove( vMemory->pArray, pcRes->pCubes, pcRes->nCubes * sizeof(unsigned) );
-    Vec_IntShrink( vMemory, pcRes->nCubes );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes ISOP 6 variables or more.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Kit_TruthIsop_rec( unsigned * puOn, unsigned * puOnDc, int nVars, Kit_Sop_t * pcRes, Vec_Int_t * vStore )
-{
-    Kit_Sop_t cRes0, cRes1, cRes2;
-    Kit_Sop_t * pcRes0 = &cRes0, * pcRes1 = &cRes1, * pcRes2 = &cRes2;
-    unsigned * puRes0, * puRes1, * puRes2;
-    unsigned * puOn0, * puOn1, * puOnDc0, * puOnDc1, * pTemp, * pTemp0, * pTemp1;
-    int i, k, Var, nWords, nWordsAll;
-//    assert( Kit_TruthIsImply( puOn, puOnDc, nVars ) );
-    // allocate room for the resulting truth table
-    nWordsAll = Kit_TruthWordNum( nVars );
-    pTemp = Vec_IntFetch( vStore, nWordsAll );
-    if ( pTemp == NULL )
-    {
-        pcRes->nCubes = -1;
-        return NULL;
-    }
-    // check for constants
-    if ( Kit_TruthIsConst0( puOn, nVars ) )
-    {
-        pcRes->nCubes = 0;
-        pcRes->pCubes = NULL;
-        Kit_TruthClear( pTemp, nVars );
-        return pTemp;
-    }
-    if ( Kit_TruthIsConst1( puOnDc, nVars ) )
-    {
-        pcRes->nCubes = 1;
-        pcRes->pCubes = Vec_IntFetch( vStore, 1 );
-        if ( pcRes->pCubes == NULL )
-        {
-            pcRes->nCubes = -1;
-            return NULL;
-        }
-        pcRes->pCubes[0] = 0;
-        Kit_TruthFill( pTemp, nVars );
-        return pTemp;
-    }
-    assert( nVars > 0 );
-    // find the topmost var
-    for ( Var = nVars-1; Var >= 0; Var-- )
-        if ( Kit_TruthVarInSupport( puOn, nVars, Var ) || 
-             Kit_TruthVarInSupport( puOnDc, nVars, Var ) )
-             break;
-    assert( Var >= 0 );
-    // consider a simple case when one-word computation can be used
-    if ( Var < 5 )
-    {
-        unsigned uRes = Kit_TruthIsop5_rec( puOn[0], puOnDc[0], Var+1, pcRes, vStore );
-        for ( i = 0; i < nWordsAll; i++ )
-            pTemp[i] = uRes;
-        return pTemp;
-    }
-    assert( Var >= 5 );
-    nWords = Kit_TruthWordNum( Var );
-    // cofactor
-    puOn0   = puOn;    puOn1   = puOn + nWords;
-    puOnDc0 = puOnDc;  puOnDc1 = puOnDc + nWords;
-    pTemp0  = pTemp;   pTemp1  = pTemp + nWords;
-    // solve for cofactors
-    Kit_TruthSharp( pTemp0, puOn0, puOnDc1, Var );
-    puRes0 = Kit_TruthIsop_rec( pTemp0, puOnDc0, Var, pcRes0, vStore );
-    if ( pcRes0->nCubes == -1 )
-    {
-        pcRes->nCubes = -1;
-        return NULL;
-    }
-    Kit_TruthSharp( pTemp1, puOn1, puOnDc0, Var );
-    puRes1 = Kit_TruthIsop_rec( pTemp1, puOnDc1, Var, pcRes1, vStore );
-    if ( pcRes1->nCubes == -1 )
-    {
-        pcRes->nCubes = -1;
-        return NULL;
-    }
-    Kit_TruthSharp( pTemp0, puOn0, puRes0, Var );
-    Kit_TruthSharp( pTemp1, puOn1, puRes1, Var );
-    Kit_TruthOr( pTemp0, pTemp0, pTemp1, Var );
-    Kit_TruthAnd( pTemp1, puOnDc0, puOnDc1, Var );
-    puRes2 = Kit_TruthIsop_rec( pTemp0, pTemp1, Var, pcRes2, vStore );
-    if ( pcRes2->nCubes == -1 )
-    {
-        pcRes->nCubes = -1;
-        return NULL;
-    }
-    // create the resulting cover
-    pcRes->nCubes = pcRes0->nCubes + pcRes1->nCubes + pcRes2->nCubes;
-    pcRes->pCubes = Vec_IntFetch( vStore, pcRes->nCubes );
-    if ( pcRes->pCubes == NULL )
-    {
-        pcRes->nCubes = -1;
-        return NULL;
-    }
-    k = 0;
-    for ( i = 0; i < pcRes0->nCubes; i++ )
-        pcRes->pCubes[k++] = pcRes0->pCubes[i] | (1 << ((Var<<1)+0));
-    for ( i = 0; i < pcRes1->nCubes; i++ )
-        pcRes->pCubes[k++] = pcRes1->pCubes[i] | (1 << ((Var<<1)+1));
-    for ( i = 0; i < pcRes2->nCubes; i++ )
-        pcRes->pCubes[k++] = pcRes2->pCubes[i];
-    assert( k == pcRes->nCubes );
-    // create the resulting truth table
-    Kit_TruthOr( pTemp0, puRes0, puRes2, Var );
-    Kit_TruthOr( pTemp1, puRes1, puRes2, Var );
-    // copy the table if needed
-    nWords <<= 1;
-    for ( i = 1; i < nWordsAll/nWords; i++ )
-        for ( k = 0; k < nWords; k++ )
-            pTemp[i*nWords + k] = pTemp[k];
-    // verify in the end
-//    assert( Kit_TruthIsImply( puOn, pTemp, nVars ) );
-//    assert( Kit_TruthIsImply( pTemp, puOnDc, nVars ) );
-    return pTemp;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes ISOP for 5 variables or less.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Kit_TruthIsop5_rec( unsigned uOn, unsigned uOnDc, int nVars, Kit_Sop_t * pcRes, Vec_Int_t * vStore )
-{
-    unsigned uMasks[5] = { 0xAAAAAAAA, 0xCCCCCCCC, 0xF0F0F0F0, 0xFF00FF00, 0xFFFF0000 };
-    Kit_Sop_t cRes0, cRes1, cRes2;
-    Kit_Sop_t * pcRes0 = &cRes0, * pcRes1 = &cRes1, * pcRes2 = &cRes2;
-    unsigned uOn0, uOn1, uOnDc0, uOnDc1, uRes0, uRes1, uRes2;
-    int i, k, Var;
-    assert( nVars <= 5 );
-    assert( (uOn & ~uOnDc) == 0 );
-    if ( uOn == 0 )
-    {
-        pcRes->nCubes = 0;
-        pcRes->pCubes = NULL;
-        return 0;
-    }
-    if ( uOnDc == 0xFFFFFFFF )
-    {
-        pcRes->nCubes = 1;
-        pcRes->pCubes = Vec_IntFetch( vStore, 1 );
-        if ( pcRes->pCubes == NULL )
-        {
-            pcRes->nCubes = -1;
-            return 0;
-        }
-        pcRes->pCubes[0] = 0;
-        return 0xFFFFFFFF;
-    }
-    assert( nVars > 0 );
-    // find the topmost var
-    for ( Var = nVars-1; Var >= 0; Var-- )
-        if ( Kit_TruthVarInSupport( &uOn, 5, Var ) || 
-             Kit_TruthVarInSupport( &uOnDc, 5, Var ) )
-             break;
-    assert( Var >= 0 );
-    // cofactor
-    uOn0   = uOn1   = uOn;
-    uOnDc0 = uOnDc1 = uOnDc;
-    Kit_TruthCofactor0( &uOn0, Var + 1, Var );
-    Kit_TruthCofactor1( &uOn1, Var + 1, Var );
-    Kit_TruthCofactor0( &uOnDc0, Var + 1, Var );
-    Kit_TruthCofactor1( &uOnDc1, Var + 1, Var );
-    // solve for cofactors
-    uRes0 = Kit_TruthIsop5_rec( uOn0 & ~uOnDc1, uOnDc0, Var, pcRes0, vStore );
-    if ( pcRes0->nCubes == -1 )
-    {
-        pcRes->nCubes = -1;
-        return 0;
-    }
-    uRes1 = Kit_TruthIsop5_rec( uOn1 & ~uOnDc0, uOnDc1, Var, pcRes1, vStore );
-    if ( pcRes1->nCubes == -1 )
-    {
-        pcRes->nCubes = -1;
-        return 0;
-    }
-    uRes2 = Kit_TruthIsop5_rec( (uOn0 & ~uRes0) | (uOn1 & ~uRes1), uOnDc0 & uOnDc1, Var, pcRes2, vStore );
-    if ( pcRes2->nCubes == -1 )
-    {
-        pcRes->nCubes = -1;
-        return 0;
-    }
-    // create the resulting cover
-    pcRes->nCubes = pcRes0->nCubes + pcRes1->nCubes + pcRes2->nCubes;
-    pcRes->pCubes = Vec_IntFetch( vStore, pcRes->nCubes );
-    if ( pcRes->pCubes == NULL )
-    {
-        pcRes->nCubes = -1;
-        return 0;
-    }
-    k = 0;
-    for ( i = 0; i < pcRes0->nCubes; i++ )
-        pcRes->pCubes[k++] = pcRes0->pCubes[i] | (1 << ((Var<<1)+0));
-    for ( i = 0; i < pcRes1->nCubes; i++ )
-        pcRes->pCubes[k++] = pcRes1->pCubes[i] | (1 << ((Var<<1)+1));
-    for ( i = 0; i < pcRes2->nCubes; i++ )
-        pcRes->pCubes[k++] = pcRes2->pCubes[i];
-    assert( k == pcRes->nCubes );
-    // derive the final truth table
-    uRes2 |= (uRes0 & ~uMasks[Var]) | (uRes1 & uMasks[Var]);
-//    assert( (uOn & ~uRes2) == 0 );
-//    assert( (uRes2 & ~uOnDc) == 0 );
-    return uRes2;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/kitPerm.c b/src/aig/kit/kitPerm.c
deleted file mode 100644
index d3e9ff5a..00000000
--- a/src/aig/kit/kitPerm.c
+++ /dev/null
@@ -1,355 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kitPerm.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [Procedures for permuting truth tables.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Oct 26, 2011.]
-
-  Revision    [$Id: kitPerm.c,v 1.00 2011/11/26 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-#include <time.h>
-
-#define inline __inline // compatible with MS VS 6.0
-
-//ABC_NAMESPACE_IMPL_START
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef unsigned __int64 word;
-typedef unsigned short   shot;
-typedef unsigned char    byte;
-
-static shot S[256] =
-{
-    0x0000, 0x0001, 0x0004, 0x0005, 0x0010, 0x0011, 0x0014, 0x0015,
-    0x0040, 0x0041, 0x0044, 0x0045, 0x0050, 0x0051, 0x0054, 0x0055,
-    0x0100, 0x0101, 0x0104, 0x0105, 0x0110, 0x0111, 0x0114, 0x0115,
-    0x0140, 0x0141, 0x0144, 0x0145, 0x0150, 0x0151, 0x0154, 0x0155,
-    0x0400, 0x0401, 0x0404, 0x0405, 0x0410, 0x0411, 0x0414, 0x0415,
-    0x0440, 0x0441, 0x0444, 0x0445, 0x0450, 0x0451, 0x0454, 0x0455,
-    0x0500, 0x0501, 0x0504, 0x0505, 0x0510, 0x0511, 0x0514, 0x0515,
-    0x0540, 0x0541, 0x0544, 0x0545, 0x0550, 0x0551, 0x0554, 0x0555,
-    0x1000, 0x1001, 0x1004, 0x1005, 0x1010, 0x1011, 0x1014, 0x1015,
-    0x1040, 0x1041, 0x1044, 0x1045, 0x1050, 0x1051, 0x1054, 0x1055,
-    0x1100, 0x1101, 0x1104, 0x1105, 0x1110, 0x1111, 0x1114, 0x1115,
-    0x1140, 0x1141, 0x1144, 0x1145, 0x1150, 0x1151, 0x1154, 0x1155,
-    0x1400, 0x1401, 0x1404, 0x1405, 0x1410, 0x1411, 0x1414, 0x1415,
-    0x1440, 0x1441, 0x1444, 0x1445, 0x1450, 0x1451, 0x1454, 0x1455,
-    0x1500, 0x1501, 0x1504, 0x1505, 0x1510, 0x1511, 0x1514, 0x1515,
-    0x1540, 0x1541, 0x1544, 0x1545, 0x1550, 0x1551, 0x1554, 0x1555,
-    0x4000, 0x4001, 0x4004, 0x4005, 0x4010, 0x4011, 0x4014, 0x4015,
-    0x4040, 0x4041, 0x4044, 0x4045, 0x4050, 0x4051, 0x4054, 0x4055,
-    0x4100, 0x4101, 0x4104, 0x4105, 0x4110, 0x4111, 0x4114, 0x4115,
-    0x4140, 0x4141, 0x4144, 0x4145, 0x4150, 0x4151, 0x4154, 0x4155,
-    0x4400, 0x4401, 0x4404, 0x4405, 0x4410, 0x4411, 0x4414, 0x4415,
-    0x4440, 0x4441, 0x4444, 0x4445, 0x4450, 0x4451, 0x4454, 0x4455,
-    0x4500, 0x4501, 0x4504, 0x4505, 0x4510, 0x4511, 0x4514, 0x4515,
-    0x4540, 0x4541, 0x4544, 0x4545, 0x4550, 0x4551, 0x4554, 0x4555,
-    0x5000, 0x5001, 0x5004, 0x5005, 0x5010, 0x5011, 0x5014, 0x5015,
-    0x5040, 0x5041, 0x5044, 0x5045, 0x5050, 0x5051, 0x5054, 0x5055,
-    0x5100, 0x5101, 0x5104, 0x5105, 0x5110, 0x5111, 0x5114, 0x5115,
-    0x5140, 0x5141, 0x5144, 0x5145, 0x5150, 0x5151, 0x5154, 0x5155,
-    0x5400, 0x5401, 0x5404, 0x5405, 0x5410, 0x5411, 0x5414, 0x5415,
-    0x5440, 0x5441, 0x5444, 0x5445, 0x5450, 0x5451, 0x5454, 0x5455,
-    0x5500, 0x5501, 0x5504, 0x5505, 0x5510, 0x5511, 0x5514, 0x5515,
-    0x5540, 0x5541, 0x5544, 0x5545, 0x5550, 0x5551, 0x5554, 0x5555
-};
-
-static byte P[256] =
-{
-    0x00, 0x01, 0x10, 0x11, 0x04, 0x05, 0x14, 0x15, 0x40, 0x41, 0x50, 0x51, 0x44, 0x45, 0x54, 0x55,
-    0x02, 0x03, 0x12, 0x13, 0x06, 0x07, 0x16, 0x17, 0x42, 0x43, 0x52, 0x53, 0x46, 0x47, 0x56, 0x57,
-    0x20, 0x21, 0x30, 0x31, 0x24, 0x25, 0x34, 0x35, 0x60, 0x61, 0x70, 0x71, 0x64, 0x65, 0x74, 0x75,
-    0x22, 0x23, 0x32, 0x33, 0x26, 0x27, 0x36, 0x37, 0x62, 0x63, 0x72, 0x73, 0x66, 0x67, 0x76, 0x77,
-    0x08, 0x09, 0x18, 0x19, 0x0c, 0x0d, 0x1c, 0x1d, 0x48, 0x49, 0x58, 0x59, 0x4c, 0x4d, 0x5c, 0x5d,
-    0x0a, 0x0b, 0x1a, 0x1b, 0x0e, 0x0f, 0x1e, 0x1f, 0x4a, 0x4b, 0x5a, 0x5b, 0x4e, 0x4f, 0x5e, 0x5f,
-    0x28, 0x29, 0x38, 0x39, 0x2c, 0x2d, 0x3c, 0x3d, 0x68, 0x69, 0x78, 0x79, 0x6c, 0x6d, 0x7c, 0x7d,
-    0x2a, 0x2b, 0x3a, 0x3b, 0x2e, 0x2f, 0x3e, 0x3f, 0x6a, 0x6b, 0x7a, 0x7b, 0x6e, 0x6f, 0x7e, 0x7f,
-    0x80, 0x81, 0x90, 0x91, 0x84, 0x85, 0x94, 0x95, 0xc0, 0xc1, 0xd0, 0xd1, 0xc4, 0xc5, 0xd4, 0xd5,
-    0x82, 0x83, 0x92, 0x93, 0x86, 0x87, 0x96, 0x97, 0xc2, 0xc3, 0xd2, 0xd3, 0xc6, 0xc7, 0xd6, 0xd7,
-    0xa0, 0xa1, 0xb0, 0xb1, 0xa4, 0xa5, 0xb4, 0xb5, 0xe0, 0xe1, 0xf0, 0xf1, 0xe4, 0xe5, 0xf4, 0xf5,
-    0xa2, 0xa3, 0xb2, 0xb3, 0xa6, 0xa7, 0xb6, 0xb7, 0xe2, 0xe3, 0xf2, 0xf3, 0xe6, 0xe7, 0xf6, 0xf7,
-    0x88, 0x89, 0x98, 0x99, 0x8c, 0x8d, 0x9c, 0x9d, 0xc8, 0xc9, 0xd8, 0xd9, 0xcc, 0xcd, 0xdc, 0xdd,
-    0x8a, 0x8b, 0x9a, 0x9b, 0x8e, 0x8f, 0x9e, 0x9f, 0xca, 0xcb, 0xda, 0xdb, 0xce, 0xcf, 0xde, 0xdf,
-    0xa8, 0xa9, 0xb8, 0xb9, 0xac, 0xad, 0xbc, 0xbd, 0xe8, 0xe9, 0xf8, 0xf9, 0xec, 0xed, 0xfc, 0xfd,
-    0xaa, 0xab, 0xba, 0xbb, 0xae, 0xaf, 0xbe, 0xbf, 0xea, 0xeb, 0xfa, 0xfb, 0xee, 0xef, 0xfe, 0xff
-};
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_PermCreateS()
-{
-    int i, n, r;
-    for ( i = 0; i < 256; i++ )
-    {
-        if ( i % 8 == 0 )
-            printf( "\n" );
-        for ( r = n = 0; n < 8; n++ )
-            r |= ((i & (1 << n)) << n);
-        printf( "0x%04x, ", r );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_PermCreateP()
-{
-    int i, s1, s2, r;
-    for ( i = 0; i < 256; i++ )
-    {
-        if ( i % 16 == 0 )
-            printf( "\n" );
-        s1 = i & 0x0A;
-        s2 = i & 0x50;
-        r = i ^ s1 ^ s2 ^ (s1 << 3) ^ (s2 >> 3);
-        assert( r < 256 );
-        printf( "0x%02x, ", r );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Kit_PermCycleOne( shot * s, byte * b, int v )
-{
-    int i, n = (1 << (v-3));
-    assert( v > 2 && v < 16 );
-    for ( i = 0; i < n; i++ )
-        s[i] = S[b[i]] | (S[b[i+n]] << 1);
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Kit_PermCycleMany( shot * s, byte * b, int V, int v )
-{
-    int i, n = (1 << (V - 1 - v)), m = (1 << (v-2));
-    assert( v > 2 && v < V );
-    for ( i = 0; i < n; i++, s += (m >> 1), b += m )
-        Kit_PermCycleOne( s, b, v );   
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_PermCompute( word * o, word * i, int V )
-{
-    word * t;
-    int v, n = (1 << (V-3));
-    assert( V >= 6 && V <= 16 );
-    for ( v = 0; v < n; v++ )
-        ((byte *)i)[v] = P[((byte *)i)[v]];
-    for ( v = 3; v < V; v++ )
-    {
-        Kit_PermCycleMany( (shot *)o, (byte *)i, V, v );
-        t = i; i = o; o = t;
-    }
-    if ( V & 1 )
-    {
-        n = (1 << (V-6));
-        for ( v = 0; v < n; v++ )
-            o[v] = i[v];
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_PermComputeNaive( word * F, int nVars )
-{
-    extern void If_CluReverseOrder( word * pF, int nVars, int * V2P, int * P2V, int iVarStart );
-    int i, V2P[16], P2V[16];
-    for ( i = 0; i < nVars; i++ )
-        V2P[i] = P2V[i] = i;
-    If_CluReverseOrder( F, nVars, V2P, P2V, 0 );
-}
-
-
-word M ( word f1, word f2, int n)
-{
-    word temp = 0;
-    word a = 1;
-    int i;
-    for(  i = 0; i < n; i++)
-        temp = temp + (((f1>>i)&a) << (2*i) ) + (((f2>>i)&a) << (2*i+1));
-    return temp;
-}
-
-word Tf ( word f, int n)
-{
-    if(n==1)
-        return f;
-    else
-    {
-//        int x = (int)pow(2,n-1);
-        int x;
-        x = (1 << (n-1));
-        return (  M (Tf( (f << x) >> x, n-1), Tf( (f >> x), n-1), x) );     //def. of M just below the function
-     }
-}
-
-
-#define ABC_PRT(a,t)    (printf("%s = ", (a)), printf("%7.2f sec\n", (float)(t)/(float)(CLOCKS_PER_SEC)))
-#define NFUNCS (1<<20)
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_PermComputeTest()
-{
-    word * T = (word *)malloc( 8 * NFUNCS );
-    word i, o, w = 0;
-    int k, b, clk;
-
-    srand( 0 );
-
-    clk = clock();
-    for ( k = 0; k < NFUNCS; k++ )
-        for ( b = 0; b < 8; b++ )
-            ((byte *)(T + k))[b] = (byte)(rand() & 0xFF);
-    ABC_PRT( "Assign", clock() - clk );
-
-//    T[0] = 0xacaccacaaccaacca;
-//    Kit_DsdPrintFromTruth( T, 6 );
-
-    // perform measurements
-    clk = clock();
-    for ( k = 0; k < NFUNCS; k++ )
-    {
-        i = T[k];
-//        Kit_PermComputeNaive( &i, 6 );
-        Tf( i, 6 );
-    }
-    ABC_PRT( "Perm1 ", clock() - clk );
-
-    // perform measurements
-    clk = clock();
-    for ( k = 0; k < NFUNCS; k++ )
-    {
-        i = T[k];
-        Kit_PermCompute( &o, &i, 6 );
-
-//        w = T[k];
-//        Kit_PermComputeNaive( &w, 6 );
-//        assert( w == o );
-    }
-    ABC_PRT( "Perm2 ", clock() - clk );
-
-    assert( w == 0 );
-    free( T );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-`
-***********************************************************************/
-void Kit_PermComputeTest_()
-{
-    word t, s;
-    t = 0xacaccacaaccaacca;
-//    Kit_DsdPrintFromTruth( &t, 6 ); printf( "\n" );
-    s = Tf( t, 6 );
-//    Kit_PermComputeNaive( &t, 6 );
-//    Kit_DsdPrintFromTruth( &s, 6 ); printf( "\n" );
-}
-
-/*
-    {
-        extern void Kit_PermComputeTest();
-        Kit_PermComputeTest();
-    }
-*/
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-//ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/kitPla.c b/src/aig/kit/kitPla.c
deleted file mode 100644
index df6d4e11..00000000
--- a/src/aig/kit/kitPla.c
+++ /dev/null
@@ -1,535 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kitPla.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [Manipulating SOP in the form of a C-string.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Dec 6, 2006.]
-
-  Revision    [$Id: kitPla.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "kit.h"
-#include "aig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Checks if the cover is constant 0.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_PlaIsConst0( char * pSop )
-{
-    return pSop[0] == ' ' && pSop[1] == '0';
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks if the cover is constant 1.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_PlaIsConst1( char * pSop )
-{
-    return pSop[0] == ' ' && pSop[1] == '1';
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks if the cover is a buffer.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_PlaIsBuf( char * pSop )
-{
-    if ( pSop[4] != 0 )
-        return 0;
-    if ( (pSop[0] == '1' && pSop[2] == '1') || (pSop[0] == '0' && pSop[2] == '0') )
-        return 1;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks if the cover is an inverter.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_PlaIsInv( char * pSop )
-{
-    if ( pSop[4] != 0 )
-        return 0;
-    if ( (pSop[0] == '0' && pSop[2] == '1') || (pSop[0] == '1' && pSop[2] == '0') )
-        return 1;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads the number of variables in the cover.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_PlaGetVarNum( char * pSop )
-{
-    char * pCur;
-    for ( pCur = pSop; *pCur != '\n'; pCur++ )
-        if ( *pCur == 0 )
-            return -1;
-    return pCur - pSop - 2;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads the number of cubes in the cover.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_PlaGetCubeNum( char * pSop )
-{
-    char * pCur;
-    int nCubes = 0;
-    if ( pSop == NULL )
-        return 0;
-    for ( pCur = pSop; *pCur; pCur++ )
-        nCubes += (*pCur == '\n');
-    return nCubes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_PlaIsComplement( char * pSop )
-{
-    char * pCur;
-    for ( pCur = pSop; *pCur; pCur++ )
-        if ( *pCur == '\n' )
-            return (int)(*(pCur - 1) == '0' || *(pCur - 1) == 'n');
-    assert( 0 );
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_PlaComplement( char * pSop )
-{
-    char * pCur;
-    for ( pCur = pSop; *pCur; pCur++ )
-        if ( *pCur == '\n' )
-        {
-            if ( *(pCur - 1) == '0' )
-                *(pCur - 1) = '1';
-            else if ( *(pCur - 1) == '1' )
-                *(pCur - 1) = '0';
-            else if ( *(pCur - 1) == 'x' )
-                *(pCur - 1) = 'n';
-            else if ( *(pCur - 1) == 'n' )
-                *(pCur - 1) = 'x';
-            else
-                assert( 0 );
-        }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the constant 1 cover with the given number of variables and cubes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Kit_PlaStart( void * p, int nCubes, int nVars )
-{
-    Aig_MmFlex_t * pMan = (Aig_MmFlex_t *)p;
-    char * pSopCover, * pCube;
-    int i, Length;
-
-    Length = nCubes * (nVars + 3);
-    pSopCover = Aig_MmFlexEntryFetch( pMan, Length + 1 );
-    memset( pSopCover, '-', Length );
-    pSopCover[Length] = 0;
-
-    for ( i = 0; i < nCubes; i++ )
-    {
-        pCube = pSopCover + i * (nVars + 3);
-        pCube[nVars + 0] = ' ';
-        pCube[nVars + 1] = '1';
-        pCube[nVars + 2] = '\n';
-    }
-    return pSopCover;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the cover from the ISOP computed from TT.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Kit_PlaCreateFromIsop( void * p, int nVars, Vec_Int_t * vCover )
-{
-    Aig_MmFlex_t * pMan = (Aig_MmFlex_t *)p;
-    char * pSop, * pCube;
-    int i, k, Entry, Literal;
-    assert( Vec_IntSize(vCover) > 0 );
-    if ( Vec_IntSize(vCover) == 0 )
-        return NULL;
-    // start the cover
-    pSop = Kit_PlaStart( pMan, Vec_IntSize(vCover), nVars );
-    // create cubes
-    Vec_IntForEachEntry( vCover, Entry, i )
-    {
-        pCube = pSop + i * (nVars + 3);
-        for ( k = 0; k < nVars; k++ )
-        {
-            Literal = 3 & (Entry >> (k << 1));
-            if ( Literal == 1 )
-                pCube[k] = '0';
-            else if ( Literal == 2 )
-                pCube[k] = '1';
-            else if ( Literal != 0 )
-                assert( 0 );
-        }
-    }
-    return pSop;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the cover from the ISOP computed from TT.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_PlaToIsop( char * pSop, Vec_Int_t * vCover )
-{
-    char * pCube;
-    int k, nVars, Entry;
-    nVars = Kit_PlaGetVarNum( pSop );
-    assert( nVars > 0 );
-    // create cubes
-    Vec_IntClear( vCover );
-    for ( pCube = pSop; *pCube; pCube += nVars + 3 )
-    {
-        Entry = 0;
-        for ( k = nVars - 1; k >= 0; k-- )
-            if ( pCube[k] == '0' )
-                Entry = (Entry << 2) | 1;
-            else if ( pCube[k] == '1' )
-                Entry = (Entry << 2) | 2;
-            else if ( pCube[k] == '-' )
-                Entry = (Entry << 2);
-            else 
-                assert( 0 );
-        Vec_IntPush( vCover, Entry );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates memory and copies the SOP into it.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Kit_PlaStoreSop( void * p, char * pSop )
-{
-    Aig_MmFlex_t * pMan = (Aig_MmFlex_t *)p;
-    char * pStore;
-    pStore = Aig_MmFlexEntryFetch( pMan, strlen(pSop) + 1 );
-    strcpy( pStore, pSop );
-    return pStore;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transforms truth table into the SOP.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Kit_PlaFromTruth( void * p, unsigned * pTruth, int nVars, Vec_Int_t * vCover )
-{
-    Aig_MmFlex_t * pMan = (Aig_MmFlex_t *)p;
-    char * pSop;
-    int RetValue;
-    if ( Kit_TruthIsConst0(pTruth, nVars) )
-        return Kit_PlaStoreSop( pMan, " 0\n" );
-    if ( Kit_TruthIsConst1(pTruth, nVars) )
-        return Kit_PlaStoreSop( pMan, " 1\n" );
-    RetValue = Kit_TruthIsop( pTruth, nVars, vCover, 0 ); // 1 );
-    assert( RetValue == 0 || RetValue == 1 );
-    pSop = Kit_PlaCreateFromIsop( pMan, nVars, vCover );
-    if ( RetValue )
-        Kit_PlaComplement( pSop );
-    return pSop;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the cover from the ISOP computed from TT.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Kit_PlaFromIsop( Vec_Str_t * vStr, int nVars, Vec_Int_t * vCover )
-{
-    int i, k, Entry, Literal;
-    assert( Vec_IntSize(vCover) > 0 );
-    if ( Vec_IntSize(vCover) == 0 )
-        return NULL;
-    Vec_StrClear( vStr );
-    Vec_IntForEachEntry( vCover, Entry, i )
-    {
-        for ( k = 0; k < nVars; k++ )
-        {
-            Literal = 3 & (Entry >> (k << 1));
-            if ( Literal == 1 )
-                Vec_StrPush( vStr, '0' );
-            else if ( Literal == 2 )
-                Vec_StrPush( vStr, '1' );
-            else if ( Literal == 0 )
-                Vec_StrPush( vStr, '-' );
-            else
-                assert( 0 );
-        }
-        Vec_StrPush( vStr, ' ' );
-        Vec_StrPush( vStr, '1' );
-        Vec_StrPush( vStr, '\n' );
-    }
-    Vec_StrPush( vStr, '\0' );
-    return Vec_StrArray( vStr );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the SOP from TT.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Kit_PlaFromTruthNew( unsigned * pTruth, int nVars, Vec_Int_t * vCover, Vec_Str_t * vStr )
-{
-    char * pResult;
-    // transform truth table into the SOP
-    int RetValue = Kit_TruthIsop( pTruth, nVars, vCover, 1 );
-    assert( RetValue == 0 || RetValue == 1 );
-    // check the case of constant cover
-    if ( Vec_IntSize(vCover) == 0 || (Vec_IntSize(vCover) == 1 && Vec_IntEntry(vCover,0) == 0) )
-    {
-        assert( RetValue == 0 );
-        Vec_StrClear( vStr );
-        Vec_StrAppend( vStr, (Vec_IntSize(vCover) == 0) ? " 0\n" : " 1\n" );
-        Vec_StrPush( vStr, '\0' );
-        return Vec_StrArray( vStr );
-    }
-    pResult = Kit_PlaFromIsop( vStr, nVars, vCover );
-    if ( RetValue )
-        Kit_PlaComplement( pResult );
-    if ( nVars < 6 )
-        assert( pTruth[0] == (unsigned)Kit_PlaToTruth6(pResult, nVars) );
-    else if ( nVars == 6 )
-        assert( *((ABC_UINT64_T*)pTruth) == Kit_PlaToTruth6(pResult, nVars) );
-    return pResult;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Converts SOP into a truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-ABC_UINT64_T Kit_PlaToTruth6( char * pSop, int nVars )
-{
-    static ABC_UINT64_T Truth[8] = {
-        0xAAAAAAAAAAAAAAAA,
-        0xCCCCCCCCCCCCCCCC,
-        0xF0F0F0F0F0F0F0F0,
-        0xFF00FF00FF00FF00,
-        0xFFFF0000FFFF0000,
-        0xFFFFFFFF00000000,
-        0x0000000000000000,
-        0xFFFFFFFFFFFFFFFF
-    };
-    ABC_UINT64_T valueAnd, valueOr = Truth[6];
-    int v, lit = 0;
-    assert( nVars < 7 );
-    do {
-        valueAnd = Truth[7];
-        for ( v = 0; v < nVars; v++, lit++ )
-        {
-            if ( pSop[lit] == '1' )
-                valueAnd &=  Truth[v];
-            else if ( pSop[lit] == '0' )
-                valueAnd &= ~Truth[v];
-            else if ( pSop[lit] != '-' )
-                assert( 0 );
-        }
-        valueOr |= valueAnd;
-        assert( pSop[lit] == ' ' );
-        lit++;
-        lit++;
-        assert( pSop[lit] == '\n' );
-        lit++;
-    } while ( pSop[lit] );
-    if ( Kit_PlaIsComplement(pSop) )
-        valueOr = ~valueOr;
-    return valueOr;
-}
-
-/**Fnction*************************************************************
-
-  Synopsis    [Converting SOP into a truth table.]
-
-  Description [The SOP is represented as a C-string, as documented in 
-  file "bblif.h". The truth table is returned as a bit-string composed 
-  of 2^nVars bits. For functions of less than 6 variables, the full
-  machine word is returned. (The truth table looks as if the function
-  had 5 variables.) The use of this procedure should be limited to 
-  Boolean functions with no more than 16 inputs.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_PlaToTruth( char * pSop, int nVars, Vec_Ptr_t * vVars, unsigned * pTemp, unsigned * pTruth )
-{
-    int v, c, nCubes, fCompl = 0;
-    assert( pSop != NULL );
-    assert( nVars >= 0 );
-    if ( strlen(pSop) % (nVars + 3) != 0 )
-    {
-        printf( "Kit_PlaToTruth(): SOP is represented incorrectly.\n" );
-        return;
-    }
-    // iterate through the cubes
-    Kit_TruthClear( pTruth, nVars );
-    nCubes =  strlen(pSop) / (nVars + 3);
-    for ( c = 0; c < nCubes; c++ )
-    {
-        fCompl = (pSop[nVars+1] == '0');
-        Kit_TruthFill( pTemp, nVars );
-        // iterate through the literals of the cube
-        for ( v = 0; v < nVars; v++ )
-            if ( pSop[v] == '1' )
-                Kit_TruthAnd( pTemp, pTemp, (unsigned *)Vec_PtrEntry(vVars, v), nVars );
-            else if ( pSop[v] == '0' )
-                Kit_TruthSharp( pTemp, pTemp, (unsigned *)Vec_PtrEntry(vVars, v), nVars );
-        // add cube to storage
-        Kit_TruthOr( pTruth, pTruth, pTemp, nVars );
-        // go to the next cube
-        pSop += (nVars + 3);
-    }
-    if ( fCompl )
-        Kit_TruthNot( pTruth, pTruth, nVars );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/kitSop.c b/src/aig/kit/kitSop.c
deleted file mode 100644
index 21ea69b8..00000000
--- a/src/aig/kit/kitSop.c
+++ /dev/null
@@ -1,579 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kitSop.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [Procedures involving SOPs.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Dec 6, 2006.]
-
-  Revision    [$Id: kitSop.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates SOP from the cube array.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_SopCreate( Kit_Sop_t * cResult, Vec_Int_t * vInput, int nVars, Vec_Int_t * vMemory )
-{
-    unsigned uCube;
-    int i;
-    // start the cover
-    cResult->nCubes = 0;
-    cResult->pCubes = Vec_IntFetch( vMemory, Vec_IntSize(vInput) );
-    // add the cubes
-    Vec_IntForEachEntry( vInput, uCube, i )
-        Kit_SopPushCube( cResult, uCube );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates SOP from the cube array.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_SopCreateInverse( Kit_Sop_t * cResult, Vec_Int_t * vInput, int nLits, Vec_Int_t * vMemory )
-{
-    unsigned uCube, uMask = 0;
-    int i, nCubes = Vec_IntSize(vInput);
-    // start the cover
-    cResult->nCubes = 0;
-    cResult->pCubes = Vec_IntFetch( vMemory, nCubes );
-    // add the cubes
-//    Vec_IntForEachEntry( vInput, uCube, i )
-    for ( i = 0; i < nCubes; i++ )
-    {
-        uCube = Vec_IntEntry( vInput, i );
-        uMask = ((uCube | (uCube >> 1)) & 0x55555555);
-        uMask |= (uMask << 1);
-        Kit_SopPushCube( cResult, uCube ^ uMask );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates SOP.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_SopDup( Kit_Sop_t * cResult, Kit_Sop_t * cSop, Vec_Int_t * vMemory )
-{
-    unsigned uCube;
-    int i;
-    // start the cover
-    cResult->nCubes = 0;
-    cResult->pCubes = Vec_IntFetch( vMemory, Kit_SopCubeNum(cSop) );
-    // add the cubes
-    Kit_SopForEachCube( cSop, uCube, i )
-        Kit_SopPushCube( cResult, uCube );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the quotient of division by literal.]
-
-  Description [Reduces the cover to be equal to the result of
-  division of the given cover by the literal.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_SopDivideByLiteralQuo( Kit_Sop_t * cSop, int iLit )
-{
-    unsigned uCube;
-    int i, k = 0;
-    Kit_SopForEachCube( cSop, uCube, i )
-    {
-        if ( Kit_CubeHasLit(uCube, iLit) )
-            Kit_SopWriteCube( cSop, Kit_CubeRemLit(uCube, iLit), k++ );
-    }
-    Kit_SopShrink( cSop, k );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Divides cover by one cube.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_SopDivideByCube( Kit_Sop_t * cSop, Kit_Sop_t * cDiv, Kit_Sop_t * vQuo, Kit_Sop_t * vRem, Vec_Int_t * vMemory )
-{
-    unsigned uCube, uDiv;
-    int i;
-    // get the only cube
-    assert( Kit_SopCubeNum(cDiv) == 1 );
-    uDiv = Kit_SopCube(cDiv, 0);
-    // allocate covers
-    vQuo->nCubes = 0;
-    vQuo->pCubes = Vec_IntFetch( vMemory, Kit_SopCubeNum(cSop) );
-    vRem->nCubes = 0;
-    vRem->pCubes = Vec_IntFetch( vMemory, Kit_SopCubeNum(cSop) );
-    // sort the cubes
-    Kit_SopForEachCube( cSop, uCube, i )
-    {
-        if ( Kit_CubeContains( uCube, uDiv ) )
-            Kit_SopPushCube( vQuo, Kit_CubeSharp(uCube, uDiv) );
-        else
-            Kit_SopPushCube( vRem, uCube );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Divides cover by one cube.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_SopDivideInternal( Kit_Sop_t * cSop, Kit_Sop_t * cDiv, Kit_Sop_t * vQuo, Kit_Sop_t * vRem, Vec_Int_t * vMemory )
-{
-    unsigned uCube, uDiv;
-    unsigned uCube2 = 0; // Suppress "might be used uninitialized"
-    unsigned uDiv2, uQuo;
-    int i, i2, k, k2, nCubesRem;
-    assert( Kit_SopCubeNum(cSop) >= Kit_SopCubeNum(cDiv) );
-    // consider special case
-    if ( Kit_SopCubeNum(cDiv) == 1 )
-    {
-        Kit_SopDivideByCube( cSop, cDiv, vQuo, vRem, vMemory );
-        return;
-    }
-    // allocate quotient
-    vQuo->nCubes = 0;
-    vQuo->pCubes = Vec_IntFetch( vMemory, Kit_SopCubeNum(cSop) / Kit_SopCubeNum(cDiv) );
-    // for each cube of the cover
-    // it either belongs to the quotient or to the remainder
-    Kit_SopForEachCube( cSop, uCube, i )
-    {
-        // skip taken cubes
-        if ( Kit_CubeIsMarked(uCube) )
-            continue;
-        // find a matching cube in the divisor
-        uDiv = ~0;
-        Kit_SopForEachCube( cDiv, uDiv, k )
-            if ( Kit_CubeContains( uCube, uDiv ) )
-                break;
-        // the cube is not found 
-        if ( k == Kit_SopCubeNum(cDiv) )
-            continue;
-        // the quotient cube exists
-        uQuo = Kit_CubeSharp( uCube, uDiv );
-        // find corresponding cubes for other cubes of the divisor
-        uDiv2 = ~0;
-        Kit_SopForEachCube( cDiv, uDiv2, k2 )
-        {
-            if ( k2 == k )
-                continue;
-            // find a matching cube
-            Kit_SopForEachCube( cSop, uCube2, i2 )
-            {
-                // skip taken cubes
-                if ( Kit_CubeIsMarked(uCube2) )
-                    continue;
-                // check if the cube can be used
-                if ( Kit_CubeContains( uCube2, uDiv2 ) && uQuo == Kit_CubeSharp( uCube2, uDiv2 ) )
-                    break;
-            }
-            // the case when the cube is not found
-            if ( i2 == Kit_SopCubeNum(cSop) )
-                break;
-        }
-        // we did not find some cubes - continue looking at other cubes
-        if ( k2 != Kit_SopCubeNum(cDiv) )
-            continue;
-        // we found all cubes - add the quotient cube
-        Kit_SopPushCube( vQuo, uQuo );
-
-        // mark the first cube
-        Kit_SopWriteCube( cSop, Kit_CubeMark(uCube), i );
-        // mark other cubes that have this quotient
-        Kit_SopForEachCube( cDiv, uDiv2, k2 )
-        {
-            if ( k2 == k )
-                continue;
-            // find a matching cube
-            Kit_SopForEachCube( cSop, uCube2, i2 )
-            {
-                // skip taken cubes
-                if ( Kit_CubeIsMarked(uCube2) )
-                    continue;
-                // check if the cube can be used
-                if ( Kit_CubeContains( uCube2, uDiv2 ) && uQuo == Kit_CubeSharp( uCube2, uDiv2 ) )
-                    break;
-            }
-            assert( i2 < Kit_SopCubeNum(cSop) );
-            // the cube is found, mark it 
-            // (later we will add all unmarked cubes to the remainder)
-            Kit_SopWriteCube( cSop, Kit_CubeMark(uCube2), i2 );
-        }
-    }
-    // determine the number of cubes in the remainder
-    nCubesRem = Kit_SopCubeNum(cSop) - Kit_SopCubeNum(vQuo) * Kit_SopCubeNum(cDiv);
-    // allocate remainder
-    vRem->nCubes = 0;
-    vRem->pCubes = Vec_IntFetch( vMemory, nCubesRem );
-    // finally add the remaining unmarked cubes to the remainder 
-    // and clean the marked cubes in the cover
-    Kit_SopForEachCube( cSop, uCube, i )
-    {
-        if ( !Kit_CubeIsMarked(uCube) )
-        {
-            Kit_SopPushCube( vRem, uCube );
-            continue;
-        }
-        Kit_SopWriteCube( cSop, Kit_CubeUnmark(uCube), i );
-    }
-    assert( nCubesRem == Kit_SopCubeNum(vRem) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the common cube.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline unsigned Kit_SopCommonCube( Kit_Sop_t * cSop )
-{
-    unsigned uMask, uCube;
-    int i;
-    uMask = ~(unsigned)0;
-    Kit_SopForEachCube( cSop, uCube, i )
-        uMask &= uCube;
-    return uMask;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Makes the cover cube-ABC_FREE.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_SopMakeCubeFree( Kit_Sop_t * cSop )
-{
-    unsigned uMask, uCube;
-    int i;
-    uMask = Kit_SopCommonCube( cSop );
-    if ( uMask == 0 )
-        return;
-    // remove the common cube
-    Kit_SopForEachCube( cSop, uCube, i )
-        Kit_SopWriteCube( cSop, Kit_CubeSharp(uCube, uMask), i );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks if the cover is cube-ABC_FREE.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_SopIsCubeFree( Kit_Sop_t * cSop )
-{
-    return Kit_SopCommonCube( cSop ) == 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates SOP composes of the common cube of the given SOP.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_SopCommonCubeCover( Kit_Sop_t * cResult, Kit_Sop_t * cSop, Vec_Int_t * vMemory )
-{
-    assert( Kit_SopCubeNum(cSop) > 0 );
-    cResult->nCubes = 0;
-    cResult->pCubes = Vec_IntFetch( vMemory, 1 );
-    Kit_SopPushCube( cResult, Kit_SopCommonCube(cSop) );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Find any literal that occurs more than once.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_SopAnyLiteral( Kit_Sop_t * cSop, int nLits )
-{
-    unsigned uCube;
-    int i, k, nLitsCur;
-    // go through each literal
-    for ( i = 0; i < nLits; i++ )
-    {
-        // go through all the cubes
-        nLitsCur = 0;
-        Kit_SopForEachCube( cSop, uCube, k )
-            if ( Kit_CubeHasLit(uCube, i) )
-                nLitsCur++;
-        if ( nLitsCur > 1 )
-            return i;
-    }
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find the least often occurring literal.]
-
-  Description [Find the least often occurring literal among those
-  that occur more than once.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_SopWorstLiteral( Kit_Sop_t * cSop, int nLits )
-{
-    unsigned uCube;
-    int i, k, iMin, nLitsMin, nLitsCur;
-    int fUseFirst = 1;
-
-    // go through each literal
-    iMin = -1;
-    nLitsMin = 1000000;
-    for ( i = 0; i < nLits; i++ )
-    {
-        // go through all the cubes
-        nLitsCur = 0;
-        Kit_SopForEachCube( cSop, uCube, k )
-            if ( Kit_CubeHasLit(uCube, i) )
-                nLitsCur++;
-        // skip the literal that does not occur or occurs once
-        if ( nLitsCur < 2 )
-            continue;
-        // check if this is the best literal
-        if ( fUseFirst )
-        {
-            if ( nLitsMin > nLitsCur )
-            {
-                nLitsMin = nLitsCur;
-                iMin = i;
-            }
-        }
-        else
-        {
-            if ( nLitsMin >= nLitsCur )
-            {
-                nLitsMin = nLitsCur;
-                iMin = i;
-            }
-        }
-    }
-    if ( nLitsMin < 1000000 )
-        return iMin;
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find the least often occurring literal.]
-
-  Description [Find the least often occurring literal among those
-  that occur more than once.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_SopBestLiteral( Kit_Sop_t * cSop, int nLits, unsigned uMask )
-{
-    unsigned uCube;
-    int i, k, iMax, nLitsMax, nLitsCur;
-    int fUseFirst = 1;
-
-    // go through each literal
-    iMax = -1;
-    nLitsMax = -1;
-    for ( i = 0; i < nLits; i++ )
-    {
-        if ( !Kit_CubeHasLit(uMask, i) )
-            continue;
-        // go through all the cubes
-        nLitsCur = 0;
-        Kit_SopForEachCube( cSop, uCube, k )
-            if ( Kit_CubeHasLit(uCube, i) )
-                nLitsCur++;
-        // skip the literal that does not occur or occurs once
-        if ( nLitsCur < 2 )
-            continue;
-        // check if this is the best literal
-        if ( fUseFirst )
-        {
-            if ( nLitsMax < nLitsCur )
-            {
-                nLitsMax = nLitsCur;
-                iMax = i;
-            }
-        }
-        else
-        {
-            if ( nLitsMax <= nLitsCur )
-            {
-                nLitsMax = nLitsCur;
-                iMax = i;
-            }
-        }
-    }
-    if ( nLitsMax >= 0 )
-        return iMax;
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes a level-zero kernel.]
-
-  Description [Modifies the cover to contain one level-zero kernel.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_SopDivisorZeroKernel_rec( Kit_Sop_t * cSop, int nLits )
-{
-    int iLit;
-    // find any literal that occurs at least two times
-    iLit = Kit_SopWorstLiteral( cSop, nLits );
-    if ( iLit == -1 )
-        return;
-    // derive the cube-free quotient
-    Kit_SopDivideByLiteralQuo( cSop, iLit ); // the same cover
-    Kit_SopMakeCubeFree( cSop );             // the same cover
-    // call recursively
-    Kit_SopDivisorZeroKernel_rec( cSop, nLits );    // the same cover
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the quick divisor of the cover.]
-
-  Description [Returns 0, if there is no divisor other than trivial.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_SopDivisor( Kit_Sop_t * cResult, Kit_Sop_t * cSop, int nLits, Vec_Int_t * vMemory )
-{
-    if ( Kit_SopCubeNum(cSop) <= 1 )
-        return 0;
-    if ( Kit_SopAnyLiteral( cSop, nLits ) == -1 )
-        return 0;
-    // duplicate the cover
-    Kit_SopDup( cResult, cSop, vMemory );
-    // perform the kerneling
-    Kit_SopDivisorZeroKernel_rec( cResult, nLits );
-    assert( Kit_SopCubeNum(cResult) > 0 );
-    return 1;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Create the one-literal cover with the best literal from cSop.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_SopBestLiteralCover( Kit_Sop_t * cResult, Kit_Sop_t * cSop, unsigned uCube, int nLits, Vec_Int_t * vMemory )
-{
-    int iLitBest;
-    // get the best literal
-    iLitBest = Kit_SopBestLiteral( cSop, nLits, uCube );
-    // start the cover
-    cResult->nCubes = 0;
-    cResult->pCubes = Vec_IntFetch( vMemory, 1 );
-    // set the cube
-    Kit_SopPushCube( cResult, Kit_CubeSetLit(0, iLitBest) );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/kitTruth.c b/src/aig/kit/kitTruth.c
deleted file mode 100644
index bd8bbb1c..00000000
--- a/src/aig/kit/kitTruth.c
+++ /dev/null
@@ -1,2222 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kitTruth.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    [Procedures involving truth tables.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Dec 6, 2006.]
-
-  Revision    [$Id: kitTruth.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Swaps two adjacent variables in the truth table.]
-
-  Description [Swaps var number Start and var number Start+1 (0-based numbers).
-  The input truth table is pIn. The output truth table is pOut.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthSwapAdjacentVars( unsigned * pOut, unsigned * pIn, int nVars, int iVar )
-{
-    static unsigned PMasks[4][3] = {
-        { 0x99999999, 0x22222222, 0x44444444 },
-        { 0xC3C3C3C3, 0x0C0C0C0C, 0x30303030 },
-        { 0xF00FF00F, 0x00F000F0, 0x0F000F00 },
-        { 0xFF0000FF, 0x0000FF00, 0x00FF0000 }
-    };
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step, Shift;
-
-    assert( iVar < nVars - 1 );
-    if ( iVar < 4 )
-    {
-        Shift = (1 << iVar);
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & PMasks[iVar][0]) | ((pIn[i] & PMasks[iVar][1]) << Shift) | ((pIn[i] & PMasks[iVar][2]) >> Shift);
-    }
-    else if ( iVar > 4 )
-    {
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 4*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-                pOut[i] = pIn[i];
-            for ( i = 0; i < Step; i++ )
-                pOut[Step+i] = pIn[2*Step+i];
-            for ( i = 0; i < Step; i++ )
-                pOut[2*Step+i] = pIn[Step+i];
-            for ( i = 0; i < Step; i++ )
-                pOut[3*Step+i] = pIn[3*Step+i];
-            pIn  += 4*Step;
-            pOut += 4*Step;
-        }
-    }
-    else // if ( iVar == 4 )
-    {
-        for ( i = 0; i < nWords; i += 2 )
-        {
-            pOut[i]   = (pIn[i]   & 0x0000FFFF) | ((pIn[i+1] & 0x0000FFFF) << 16);
-            pOut[i+1] = (pIn[i+1] & 0xFFFF0000) | ((pIn[i]   & 0xFFFF0000) >> 16);
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Swaps two adjacent variables in the truth table.]
-
-  Description [Swaps var number Start and var number Start+1 (0-based numbers).
-  The input truth table is pIn. The output truth table is pOut.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthSwapAdjacentVars2( unsigned * pIn, unsigned * pOut, int nVars, int Start )
-{
-    int nWords = (nVars <= 5)? 1 : (1 << (nVars-5));
-    int i, k, Step;
-
-    assert( Start < nVars - 1 );
-    switch ( Start )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0x99999999) | ((pIn[i] & 0x22222222) << 1) | ((pIn[i] & 0x44444444) >> 1);
-        return;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0xC3C3C3C3) | ((pIn[i] & 0x0C0C0C0C) << 2) | ((pIn[i] & 0x30303030) >> 2);
-        return;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0xF00FF00F) | ((pIn[i] & 0x00F000F0) << 4) | ((pIn[i] & 0x0F000F00) >> 4);
-        return;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0xFF0000FF) | ((pIn[i] & 0x0000FF00) << 8) | ((pIn[i] & 0x00FF0000) >> 8);
-        return;
-    case 4:
-        for ( i = 0; i < nWords; i += 2 )
-        {
-            pOut[i]   = (pIn[i]   & 0x0000FFFF) | ((pIn[i+1] & 0x0000FFFF) << 16);
-            pOut[i+1] = (pIn[i+1] & 0xFFFF0000) | ((pIn[i]   & 0xFFFF0000) >> 16);
-        }
-        return;
-    default:
-        Step = (1 << (Start - 5));
-        for ( k = 0; k < nWords; k += 4*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-                pOut[i] = pIn[i];
-            for ( i = 0; i < Step; i++ )
-                pOut[Step+i] = pIn[2*Step+i];
-            for ( i = 0; i < Step; i++ )
-                pOut[2*Step+i] = pIn[Step+i];
-            for ( i = 0; i < Step; i++ )
-                pOut[3*Step+i] = pIn[3*Step+i];
-            pIn  += 4*Step;
-            pOut += 4*Step;
-        }
-        return;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Expands the truth table according to the phase.]
-
-  Description [The input and output truth tables are in pIn/pOut. The current number
-  of variables is nVars. The total number of variables in nVarsAll. The last argument
-  (Phase) contains shows where the variables should go.]
-               
-  SideEffects [The input truth table is modified.]
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthStretch( unsigned * pOut, unsigned * pIn, int nVars, int nVarsAll, unsigned Phase, int fReturnIn )
-{
-    unsigned * pTemp;
-    int i, k, Var = nVars - 1, Counter = 0;
-    for ( i = nVarsAll - 1; i >= 0; i-- )
-        if ( Phase & (1 << i) )
-        {
-            for ( k = Var; k < i; k++ )
-            {
-                Kit_TruthSwapAdjacentVars( pOut, pIn, nVarsAll, k );
-                pTemp = pIn; pIn = pOut; pOut = pTemp;
-                Counter++;
-            }
-            Var--;
-        }
-    assert( Var == -1 );
-    // swap if it was moved an even number of times
-    if ( fReturnIn ^ !(Counter & 1) )
-        Kit_TruthCopy( pOut, pIn, nVarsAll );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Shrinks the truth table according to the phase.]
-
-  Description [The input and output truth tables are in pIn/pOut. The current number
-  of variables is nVars. The total number of variables in nVarsAll. The last argument
-  (Phase) shows what variables should remain.]
-               
-  SideEffects [The input truth table is modified.]
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthShrink( unsigned * pOut, unsigned * pIn, int nVars, int nVarsAll, unsigned Phase, int fReturnIn )
-{
-    unsigned * pTemp;
-    int i, k, Var = 0, Counter = 0;
-    for ( i = 0; i < nVarsAll; i++ )
-        if ( Phase & (1 << i) )
-        {
-            for ( k = i-1; k >= Var; k-- )
-            {
-                Kit_TruthSwapAdjacentVars( pOut, pIn, nVarsAll, k );
-                pTemp = pIn; pIn = pOut; pOut = pTemp;
-                Counter++;
-            }
-            Var++;
-        }
-    assert( Var == nVars );
-    // swap if it was moved an even number of times
-    if ( fReturnIn ^ !(Counter & 1) )
-        Kit_TruthCopy( pOut, pIn, nVarsAll );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Implement give permutation.]
-
-  Description [The input and output truth tables are in pIn/pOut. 
-  The number of variables is nVars. Permutation is in pPerm.]
-               
-  SideEffects [The input truth table is modified.]
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthPermute( unsigned * pOut, unsigned * pIn, int nVars, char * pPerm, int fReturnIn )
-{
-    unsigned * pTemp;
-    int i, Temp, fChange, Counter = 0;
-    do {
-        fChange = 0;
-        for ( i = 0; i < nVars-1; i++ )
-        {
-            assert( pPerm[i] != pPerm[i+1] );
-            if ( pPerm[i] <= pPerm[i+1] )
-                continue;
-            Counter++;
-            fChange = 1;
-
-            Temp = pPerm[i];
-            pPerm[i] = pPerm[i+1];
-            pPerm[i+1] = Temp;
-
-            Kit_TruthSwapAdjacentVars( pOut, pIn, nVars, i );
-            pTemp = pIn; pIn = pOut; pOut = pTemp;
-        }
-    } while ( fChange );
-    if ( fReturnIn ^ !(Counter & 1) )
-        Kit_TruthCopy( pOut, pIn, nVars );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if TT depends on the given variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_TruthVarInSupport( unsigned * pTruth, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            if ( (pTruth[i] & 0x55555555) != ((pTruth[i] & 0xAAAAAAAA) >> 1) )
-                return 1;
-        return 0;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            if ( (pTruth[i] & 0x33333333) != ((pTruth[i] & 0xCCCCCCCC) >> 2) )
-                return 1;
-        return 0;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            if ( (pTruth[i] & 0x0F0F0F0F) != ((pTruth[i] & 0xF0F0F0F0) >> 4) )
-                return 1;
-        return 0;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            if ( (pTruth[i] & 0x00FF00FF) != ((pTruth[i] & 0xFF00FF00) >> 8) )
-                return 1;
-        return 0;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            if ( (pTruth[i] & 0x0000FFFF) != ((pTruth[i] & 0xFFFF0000) >> 16) )
-                return 1;
-        return 0;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-                if ( pTruth[i] != pTruth[Step+i] )
-                    return 1;
-            pTruth += 2*Step;
-        }
-        return 0;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of support vars.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_TruthSupportSize( unsigned * pTruth, int nVars )
-{
-    int i, Counter = 0;
-    for ( i = 0; i < nVars; i++ )
-        Counter += Kit_TruthVarInSupport( pTruth, nVars, i );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns support of the function.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Kit_TruthSupport( unsigned * pTruth, int nVars )
-{
-    int i, Support = 0;
-    for ( i = 0; i < nVars; i++ )
-        if ( Kit_TruthVarInSupport( pTruth, nVars, i ) )
-            Support |= (1 << i);
-    return Support;
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Computes negative cofactor of the function.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthCofactor0( unsigned * pTruth, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = (pTruth[i] & 0x55555555) | ((pTruth[i] & 0x55555555) << 1);
-        return;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = (pTruth[i] & 0x33333333) | ((pTruth[i] & 0x33333333) << 2);
-        return;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = (pTruth[i] & 0x0F0F0F0F) | ((pTruth[i] & 0x0F0F0F0F) << 4);
-        return;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = (pTruth[i] & 0x00FF00FF) | ((pTruth[i] & 0x00FF00FF) << 8);
-        return;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = (pTruth[i] & 0x0000FFFF) | ((pTruth[i] & 0x0000FFFF) << 16);
-        return;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-                pTruth[Step+i] = pTruth[i];
-            pTruth += 2*Step;
-        }
-        return;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes negative cofactor of the function.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_TruthCofactor0Count( unsigned * pTruth, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step, Counter = 0;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            Counter += Kit_WordCountOnes(pTruth[i] & 0x55555555);
-        return Counter;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            Counter += Kit_WordCountOnes(pTruth[i] & 0x33333333);
-        return Counter;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            Counter += Kit_WordCountOnes(pTruth[i] & 0x0F0F0F0F);
-        return Counter;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            Counter += Kit_WordCountOnes(pTruth[i] & 0x00FF00FF);
-        return Counter;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            Counter += Kit_WordCountOnes(pTruth[i] & 0x0000FFFF);
-        return Counter;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-                Counter += Kit_WordCountOnes(pTruth[i]);
-            pTruth += 2*Step;
-        }
-        return Counter;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes positive cofactor of the function.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthCofactor1( unsigned * pTruth, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = (pTruth[i] & 0xAAAAAAAA) | ((pTruth[i] & 0xAAAAAAAA) >> 1);
-        return;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = (pTruth[i] & 0xCCCCCCCC) | ((pTruth[i] & 0xCCCCCCCC) >> 2);
-        return;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = (pTruth[i] & 0xF0F0F0F0) | ((pTruth[i] & 0xF0F0F0F0) >> 4);
-        return;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = (pTruth[i] & 0xFF00FF00) | ((pTruth[i] & 0xFF00FF00) >> 8);
-        return;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = (pTruth[i] & 0xFFFF0000) | ((pTruth[i] & 0xFFFF0000) >> 16);
-        return;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-                pTruth[i] = pTruth[Step+i];
-            pTruth += 2*Step;
-        }
-        return;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes positive cofactor of the function.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthCofactor0New( unsigned * pOut, unsigned * pIn, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0x55555555) | ((pIn[i] & 0x55555555) << 1);
-        return;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0x33333333) | ((pIn[i] & 0x33333333) << 2);
-        return;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0x0F0F0F0F) | ((pIn[i] & 0x0F0F0F0F) << 4);
-        return;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0x00FF00FF) | ((pIn[i] & 0x00FF00FF) << 8);
-        return;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0x0000FFFF) | ((pIn[i] & 0x0000FFFF) << 16);
-        return;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-                pOut[i] = pOut[Step+i] = pIn[i];
-            pIn += 2*Step;
-            pOut += 2*Step;
-        }
-        return;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes positive cofactor of the function.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthCofactor1New( unsigned * pOut, unsigned * pIn, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0xAAAAAAAA) | ((pIn[i] & 0xAAAAAAAA) >> 1);
-        return;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0xCCCCCCCC) | ((pIn[i] & 0xCCCCCCCC) >> 2);
-        return;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0xF0F0F0F0) | ((pIn[i] & 0xF0F0F0F0) >> 4);
-        return;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0xFF00FF00) | ((pIn[i] & 0xFF00FF00) >> 8);
-        return;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pIn[i] & 0xFFFF0000) | ((pIn[i] & 0xFFFF0000) >> 16);
-        return;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-                pOut[i] = pOut[Step+i] = pIn[Step+i];
-            pIn += 2*Step;
-            pOut += 2*Step;
-        }
-        return;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes negative cofactor of the function.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
- 
-***********************************************************************/
-int Kit_TruthVarIsVacuous( unsigned * pOnset, unsigned * pOffset, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            if ( ((pOnset[i] & (pOffset[i] >> 1)) | (pOffset[i] & (pOnset[i] >> 1))) & 0x55555555 )
-                 return 0;
-        return 1;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            if ( ((pOnset[i] & (pOffset[i] >> 2)) | (pOffset[i] & (pOnset[i] >> 2))) & 0x33333333 )
-                 return 0;
-            return 1;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            if ( ((pOnset[i] & (pOffset[i] >> 4)) | (pOffset[i] & (pOnset[i] >> 4))) & 0x0F0F0F0F )
-                 return 0;
-        return 1;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            if ( ((pOnset[i] & (pOffset[i] >> 8)) | (pOffset[i] & (pOnset[i] >> 8))) & 0x00FF00FF )
-                 return 0;
-        return 1;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            if ( ((pOnset[i] & (pOffset[i] >> 16)) | (pOffset[i] & (pOnset[i] >> 16))) & 0x0000FFFF )
-                 return 0;
-        return 1;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-                if ( (pOnset[i] & pOffset[Step+i]) | (pOffset[i] & pOnset[Step+i]) )
-                     return 0;
-            pOnset += 2*Step;
-            pOffset += 2*Step;
-        }
-        return 1;
-    }
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Existentially quantifies the variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthExist( unsigned * pTruth, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] |=  ((pTruth[i] & 0xAAAAAAAA) >> 1) | ((pTruth[i] & 0x55555555) << 1);
-        return;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] |=  ((pTruth[i] & 0xCCCCCCCC) >> 2) | ((pTruth[i] & 0x33333333) << 2);
-        return;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] |=  ((pTruth[i] & 0xF0F0F0F0) >> 4) | ((pTruth[i] & 0x0F0F0F0F) << 4);
-        return;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] |=  ((pTruth[i] & 0xFF00FF00) >> 8) | ((pTruth[i] & 0x00FF00FF) << 8);
-        return;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] |=  ((pTruth[i] & 0xFFFF0000) >> 16) | ((pTruth[i] & 0x0000FFFF) << 16);
-        return;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-            {
-                pTruth[i]     |= pTruth[Step+i];
-                pTruth[Step+i] = pTruth[i];
-            }
-            pTruth += 2*Step;
-        }
-        return;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Existentially quantifies the variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthExistNew( unsigned * pRes, unsigned * pTruth, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] | ((pTruth[i] & 0xAAAAAAAA) >> 1) | ((pTruth[i] & 0x55555555) << 1);
-        return;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] | ((pTruth[i] & 0xCCCCCCCC) >> 2) | ((pTruth[i] & 0x33333333) << 2);
-        return;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] | ((pTruth[i] & 0xF0F0F0F0) >> 4) | ((pTruth[i] & 0x0F0F0F0F) << 4);
-        return;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] | ((pTruth[i] & 0xFF00FF00) >> 8) | ((pTruth[i] & 0x00FF00FF) << 8);
-        return;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] | ((pTruth[i] & 0xFFFF0000) >> 16) | ((pTruth[i] & 0x0000FFFF) << 16);
-        return;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-            {
-                pRes[i]      = pTruth[i] | pTruth[Step+i];
-                pRes[Step+i] = pRes[i];
-            }
-            pRes += 2*Step;
-            pTruth += 2*Step;
-        }
-        return;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Existantially quantifies the set of variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthExistSet( unsigned * pRes, unsigned * pTruth, int nVars, unsigned uMask )
-{
-    int v;
-    Kit_TruthCopy( pRes, pTruth, nVars );
-    for ( v = 0; v < nVars; v++ )
-        if ( uMask & (1 << v) )
-            Kit_TruthExist( pRes, nVars, v );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Unversally quantifies the variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthForall( unsigned * pTruth, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] &=  ((pTruth[i] & 0xAAAAAAAA) >> 1) | ((pTruth[i] & 0x55555555) << 1);
-        return;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] &=  ((pTruth[i] & 0xCCCCCCCC) >> 2) | ((pTruth[i] & 0x33333333) << 2);
-        return;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] &=  ((pTruth[i] & 0xF0F0F0F0) >> 4) | ((pTruth[i] & 0x0F0F0F0F) << 4);
-        return;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] &=  ((pTruth[i] & 0xFF00FF00) >> 8) | ((pTruth[i] & 0x00FF00FF) << 8);
-        return;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] &=  ((pTruth[i] & 0xFFFF0000) >> 16) | ((pTruth[i] & 0x0000FFFF) << 16);
-        return;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-            {
-                pTruth[i]     &= pTruth[Step+i];
-                pTruth[Step+i] = pTruth[i];
-            }
-            pTruth += 2*Step;
-        }
-        return;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Universally quantifies the variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthForallNew( unsigned * pRes, unsigned * pTruth, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] & (((pTruth[i] & 0xAAAAAAAA) >> 1) | ((pTruth[i] & 0x55555555) << 1));
-        return;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] & (((pTruth[i] & 0xCCCCCCCC) >> 2) | ((pTruth[i] & 0x33333333) << 2));
-        return;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] & (((pTruth[i] & 0xF0F0F0F0) >> 4) | ((pTruth[i] & 0x0F0F0F0F) << 4));
-        return;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] & (((pTruth[i] & 0xFF00FF00) >> 8) | ((pTruth[i] & 0x00FF00FF) << 8));
-        return;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] & (((pTruth[i] & 0xFFFF0000) >> 16) | ((pTruth[i] & 0x0000FFFF) << 16));
-        return;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-            {
-                pRes[i]      = pTruth[i] & pTruth[Step+i];
-                pRes[Step+i] = pRes[i];
-            }
-            pRes += 2*Step;
-            pTruth += 2*Step;
-        }
-        return;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Universally quantifies the variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthUniqueNew( unsigned * pRes, unsigned * pTruth, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] ^ (((pTruth[i] & 0xAAAAAAAA) >> 1) | ((pTruth[i] & 0x55555555) << 1));
-        return;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] ^ (((pTruth[i] & 0xCCCCCCCC) >> 2) | ((pTruth[i] & 0x33333333) << 2));
-        return;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] ^ (((pTruth[i] & 0xF0F0F0F0) >> 4) | ((pTruth[i] & 0x0F0F0F0F) << 4));
-        return;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] ^ (((pTruth[i] & 0xFF00FF00) >> 8) | ((pTruth[i] & 0x00FF00FF) << 8));
-        return;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            pRes[i] =  pTruth[i] ^ (((pTruth[i] & 0xFFFF0000) >> 16) | ((pTruth[i] & 0x0000FFFF) << 16));
-        return;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-            {
-                pRes[i]      = pTruth[i] ^ pTruth[Step+i];
-                pRes[Step+i] = pRes[i];
-            }
-            pRes += 2*Step;
-            pTruth += 2*Step;
-        }
-        return;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of minterms in the Boolean difference.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_TruthBooleanDiffCount( unsigned * pTruth, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step, Counter = 0;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            Counter += Kit_WordCountOnes( (pTruth[i] ^ (pTruth[i] >> 1)) & 0x55555555 );
-        return Counter;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            Counter += Kit_WordCountOnes( (pTruth[i] ^ (pTruth[i] >> 2)) & 0x33333333 );
-        return Counter;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            Counter += Kit_WordCountOnes( (pTruth[i] ^ (pTruth[i] >> 4)) & 0x0F0F0F0F );
-        return Counter;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            Counter += Kit_WordCountOnes( (pTruth[i] ^ (pTruth[i] >> 8)) & 0x00FF00FF );
-        return Counter;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            Counter += Kit_WordCountOnes( (pTruth[i] ^ (pTruth[i] >>16)) & 0x0000FFFF );
-        return Counter;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-                Counter += Kit_WordCountOnes( pTruth[i] ^ pTruth[Step+i] );
-            pTruth += 2*Step;
-        }
-        return Counter;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of minterms in the Boolean difference.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_TruthXorCount( unsigned * pTruth0, unsigned * pTruth1, int nVars )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, Counter = 0;
-    for ( i = 0; i < nWords; i++ )
-        Counter += Kit_WordCountOnes( pTruth0[i] ^ pTruth1[i] );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Universally quantifies the set of variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthForallSet( unsigned * pRes, unsigned * pTruth, int nVars, unsigned uMask )
-{
-    int v;
-    Kit_TruthCopy( pRes, pTruth, nVars );
-    for ( v = 0; v < nVars; v++ )
-        if ( uMask & (1 << v) )
-            Kit_TruthForall( pRes, nVars, v );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Multiplexes two functions with the given variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthMuxVar( unsigned * pOut, unsigned * pCof0, unsigned * pCof1, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pCof0[i] & 0x55555555) | (pCof1[i] & 0xAAAAAAAA);
-        return;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pCof0[i] & 0x33333333) | (pCof1[i] & 0xCCCCCCCC);
-        return;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pCof0[i] & 0x0F0F0F0F) | (pCof1[i] & 0xF0F0F0F0);
-        return;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pCof0[i] & 0x00FF00FF) | (pCof1[i] & 0xFF00FF00);
-        return;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (pCof0[i] & 0x0000FFFF) | (pCof1[i] & 0xFFFF0000);
-        return;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-            {
-                pOut[i]      = pCof0[i];
-                pOut[Step+i] = pCof1[Step+i];
-            }
-            pOut += 2*Step;
-            pCof0 += 2*Step;
-            pCof1 += 2*Step;
-        }
-        return;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Multiplexes two functions with the given variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthMuxVarPhase( unsigned * pOut, unsigned * pCof0, unsigned * pCof1, int nVars, int iVar, int fCompl0 )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-
-    if ( fCompl0 == 0 )
-    {
-        Kit_TruthMuxVar( pOut, pCof0, pCof1, nVars, iVar );
-        return;
-    }
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (~pCof0[i] & 0x55555555) | (pCof1[i] & 0xAAAAAAAA);
-        return;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (~pCof0[i] & 0x33333333) | (pCof1[i] & 0xCCCCCCCC);
-        return;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (~pCof0[i] & 0x0F0F0F0F) | (pCof1[i] & 0xF0F0F0F0);
-        return;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (~pCof0[i] & 0x00FF00FF) | (pCof1[i] & 0xFF00FF00);
-        return;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            pOut[i] = (~pCof0[i] & 0x0000FFFF) | (pCof1[i] & 0xFFFF0000);
-        return;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-            {
-                pOut[i]      = ~pCof0[i];
-                pOut[Step+i] = pCof1[Step+i];
-            }
-            pOut += 2*Step;
-            pCof0 += 2*Step;
-            pCof1 += 2*Step;
-        }
-        return;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks symmetry of two variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_TruthVarsSymm( unsigned * pTruth, int nVars, int iVar0, int iVar1, unsigned * pCof0, unsigned * pCof1 )
-{
-    static unsigned uTemp0[32], uTemp1[32];
-    if ( pCof0 == NULL )
-    {
-        assert( nVars <= 10 );
-        pCof0 = uTemp0;
-    }
-    if ( pCof1 == NULL )
-    {
-        assert( nVars <= 10 );
-        pCof1 = uTemp1;
-    }
-    // compute Cof01
-    Kit_TruthCopy( pCof0, pTruth, nVars );
-    Kit_TruthCofactor0( pCof0, nVars, iVar0 );
-    Kit_TruthCofactor1( pCof0, nVars, iVar1 );
-    // compute Cof10
-    Kit_TruthCopy( pCof1, pTruth, nVars );
-    Kit_TruthCofactor1( pCof1, nVars, iVar0 );
-    Kit_TruthCofactor0( pCof1, nVars, iVar1 );
-    // compare
-    return Kit_TruthIsEqual( pCof0, pCof1, nVars );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks antisymmetry of two variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_TruthVarsAntiSymm( unsigned * pTruth, int nVars, int iVar0, int iVar1, unsigned * pCof0, unsigned * pCof1 )
-{
-    static unsigned uTemp0[32], uTemp1[32];
-    if ( pCof0 == NULL )
-    {
-        assert( nVars <= 10 );
-        pCof0 = uTemp0;
-    }
-    if ( pCof1 == NULL )
-    {
-        assert( nVars <= 10 );
-        pCof1 = uTemp1;
-    }
-    // compute Cof00
-    Kit_TruthCopy( pCof0, pTruth, nVars );
-    Kit_TruthCofactor0( pCof0, nVars, iVar0 );
-    Kit_TruthCofactor0( pCof0, nVars, iVar1 );
-    // compute Cof11
-    Kit_TruthCopy( pCof1, pTruth, nVars );
-    Kit_TruthCofactor1( pCof1, nVars, iVar0 );
-    Kit_TruthCofactor1( pCof1, nVars, iVar1 );
-    // compare
-    return Kit_TruthIsEqual( pCof0, pCof1, nVars );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Changes phase of the function w.r.t. one variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthChangePhase( unsigned * pTruth, int nVars, int iVar )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Step;
-    unsigned Temp;
-
-    assert( iVar < nVars );
-    switch ( iVar )
-    {
-    case 0:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = ((pTruth[i] & 0x55555555) << 1) | ((pTruth[i] & 0xAAAAAAAA) >> 1);
-        return;
-    case 1:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = ((pTruth[i] & 0x33333333) << 2) | ((pTruth[i] & 0xCCCCCCCC) >> 2);
-        return;
-    case 2:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = ((pTruth[i] & 0x0F0F0F0F) << 4) | ((pTruth[i] & 0xF0F0F0F0) >> 4);
-        return;
-    case 3:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = ((pTruth[i] & 0x00FF00FF) << 8) | ((pTruth[i] & 0xFF00FF00) >> 8);
-        return;
-    case 4:
-        for ( i = 0; i < nWords; i++ )
-            pTruth[i] = ((pTruth[i] & 0x0000FFFF) << 16) | ((pTruth[i] & 0xFFFF0000) >> 16);
-        return;
-    default:
-        Step = (1 << (iVar - 5));
-        for ( k = 0; k < nWords; k += 2*Step )
-        {
-            for ( i = 0; i < Step; i++ )
-            {
-                Temp = pTruth[i];
-                pTruth[i] = pTruth[Step+i];
-                pTruth[Step+i] = Temp;
-            }
-            pTruth += 2*Step;
-        }
-        return;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes minimum overlap in supports of cofactors.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_TruthMinCofSuppOverlap( unsigned * pTruth, int nVars, int * pVarMin )
-{
-    static unsigned uCofactor[16];
-    int i, ValueCur, ValueMin, VarMin;
-    unsigned uSupp0, uSupp1;
-    int nVars0, nVars1;
-    assert( nVars <= 9 );
-    ValueMin = 32;
-    VarMin   = -1;
-    for ( i = 0; i < nVars; i++ )
-    {
-        // get negative cofactor
-        Kit_TruthCopy( uCofactor, pTruth, nVars );
-        Kit_TruthCofactor0( uCofactor, nVars, i );
-        uSupp0 = Kit_TruthSupport( uCofactor, nVars );
-        nVars0 = Kit_WordCountOnes( uSupp0 );
-//Kit_PrintBinary( stdout, &uSupp0, 8 ); printf( "\n" );
-        // get positive cofactor
-        Kit_TruthCopy( uCofactor, pTruth, nVars );
-        Kit_TruthCofactor1( uCofactor, nVars, i );
-        uSupp1 = Kit_TruthSupport( uCofactor, nVars );
-        nVars1 = Kit_WordCountOnes( uSupp1 );
-//Kit_PrintBinary( stdout, &uSupp1, 8 ); printf( "\n" );
-        // get the number of common vars
-        ValueCur = Kit_WordCountOnes( uSupp0 & uSupp1 );
-        if ( ValueMin > ValueCur && nVars0 <= 5 && nVars1 <= 5 )
-        {
-            ValueMin = ValueCur;
-            VarMin = i;
-        }
-        if ( ValueMin == 0 )
-            break;
-    }
-    if ( pVarMin )
-        *pVarMin = VarMin;
-    return ValueMin;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Find the best cofactoring variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_TruthBestCofVar( unsigned * pTruth, int nVars, unsigned * pCof0, unsigned * pCof1 )
-{
-    int i, iBestVar, nSuppSizeCur0, nSuppSizeCur1, nSuppSizeCur, nSuppSizeMin;
-    if ( Kit_TruthIsConst0(pTruth, nVars) || Kit_TruthIsConst1(pTruth, nVars) )
-        return -1;
-    // iterate through variables
-    iBestVar = -1;
-    nSuppSizeMin = KIT_INFINITY;
-    for ( i = 0; i < nVars; i++ )
-    {
-        // cofactor the functiona and get support sizes
-        Kit_TruthCofactor0New( pCof0, pTruth, nVars, i );
-        Kit_TruthCofactor1New( pCof1, pTruth, nVars, i );
-        nSuppSizeCur0 = Kit_TruthSupportSize( pCof0, nVars );
-        nSuppSizeCur1 = Kit_TruthSupportSize( pCof1, nVars );
-        nSuppSizeCur  = nSuppSizeCur0 + nSuppSizeCur1;
-        // compare this variable with other variables
-        if ( nSuppSizeMin > nSuppSizeCur ) 
-        {
-            nSuppSizeMin = nSuppSizeCur;
-            iBestVar = i;
-        }
-    }
-    assert( iBestVar != -1 );
-    // cofactor w.r.t. this variable
-    Kit_TruthCofactor0New( pCof0, pTruth, nVars, iBestVar );
-    Kit_TruthCofactor1New( pCof1, pTruth, nVars, iBestVar );
-    return iBestVar;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of 1's in each cofactor.]
-
-  Description [The resulting numbers are stored in the array of shorts, 
-  whose length is 2*nVars. The number of 1's is counted in a different
-  space than the original function. For example, if the function depends 
-  on k variables, the cofactors are assumed to depend on k-1 variables.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthCountOnesInCofs( unsigned * pTruth, int nVars, short * pStore )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Counter;
-    memset( pStore, 0, sizeof(short) * 2 * nVars );
-    if ( nVars <= 5 )
-    {
-        if ( nVars > 0 )
-        {
-            pStore[2*0+0] = Kit_WordCountOnes( pTruth[0] & 0x55555555 );
-            pStore[2*0+1] = Kit_WordCountOnes( pTruth[0] & 0xAAAAAAAA );
-        }
-        if ( nVars > 1 )
-        {
-            pStore[2*1+0] = Kit_WordCountOnes( pTruth[0] & 0x33333333 );
-            pStore[2*1+1] = Kit_WordCountOnes( pTruth[0] & 0xCCCCCCCC );
-        }
-        if ( nVars > 2 )
-        {
-            pStore[2*2+0] = Kit_WordCountOnes( pTruth[0] & 0x0F0F0F0F );
-            pStore[2*2+1] = Kit_WordCountOnes( pTruth[0] & 0xF0F0F0F0 );
-        }
-        if ( nVars > 3 )
-        {
-            pStore[2*3+0] = Kit_WordCountOnes( pTruth[0] & 0x00FF00FF );
-            pStore[2*3+1] = Kit_WordCountOnes( pTruth[0] & 0xFF00FF00 );
-        }
-        if ( nVars > 4 )
-        {
-            pStore[2*4+0] = Kit_WordCountOnes( pTruth[0] & 0x0000FFFF );
-            pStore[2*4+1] = Kit_WordCountOnes( pTruth[0] & 0xFFFF0000 );
-        }
-        return;
-    }
-    // nVars >= 6
-    // count 1's for all other variables
-    for ( k = 0; k < nWords; k++ )
-    {
-        Counter = Kit_WordCountOnes( pTruth[k] );
-        for ( i = 5; i < nVars; i++ )
-            if ( k & (1 << (i-5)) )
-                pStore[2*i+1] += Counter;
-            else
-                pStore[2*i+0] += Counter;
-    }
-    // count 1's for the first five variables
-    for ( k = 0; k < nWords/2; k++ )
-    {
-        pStore[2*0+0] += Kit_WordCountOnes( (pTruth[0] & 0x55555555) | ((pTruth[1] & 0x55555555) <<  1) );
-        pStore[2*0+1] += Kit_WordCountOnes( (pTruth[0] & 0xAAAAAAAA) | ((pTruth[1] & 0xAAAAAAAA) >>  1) );
-        pStore[2*1+0] += Kit_WordCountOnes( (pTruth[0] & 0x33333333) | ((pTruth[1] & 0x33333333) <<  2) );
-        pStore[2*1+1] += Kit_WordCountOnes( (pTruth[0] & 0xCCCCCCCC) | ((pTruth[1] & 0xCCCCCCCC) >>  2) );
-        pStore[2*2+0] += Kit_WordCountOnes( (pTruth[0] & 0x0F0F0F0F) | ((pTruth[1] & 0x0F0F0F0F) <<  4) );
-        pStore[2*2+1] += Kit_WordCountOnes( (pTruth[0] & 0xF0F0F0F0) | ((pTruth[1] & 0xF0F0F0F0) >>  4) );
-        pStore[2*3+0] += Kit_WordCountOnes( (pTruth[0] & 0x00FF00FF) | ((pTruth[1] & 0x00FF00FF) <<  8) );
-        pStore[2*3+1] += Kit_WordCountOnes( (pTruth[0] & 0xFF00FF00) | ((pTruth[1] & 0xFF00FF00) >>  8) );
-        pStore[2*4+0] += Kit_WordCountOnes( (pTruth[0] & 0x0000FFFF) | ((pTruth[1] & 0x0000FFFF) << 16) );
-        pStore[2*4+1] += Kit_WordCountOnes( (pTruth[0] & 0xFFFF0000) | ((pTruth[1] & 0xFFFF0000) >> 16) );
-        pTruth += 2;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of 1's in each negative cofactor.]
-
-  Description [The resulting numbers are stored in the array of shorts, 
-  whose length is nVars. The number of 1's is counted in a different
-  space than the original function. For example, if the function depends 
-  on k variables, the cofactors are assumed to depend on k-1 variables.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthCountOnesInCofs0( unsigned * pTruth, int nVars, short * pStore )
-{
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, k, Counter;
-    memset( pStore, 0, sizeof(short) * nVars );
-    if ( nVars <= 5 )
-    {
-        if ( nVars > 0 )
-            pStore[0] = Kit_WordCountOnes( pTruth[0] & 0x55555555 );
-        if ( nVars > 1 )
-            pStore[1] = Kit_WordCountOnes( pTruth[0] & 0x33333333 );
-        if ( nVars > 2 )
-            pStore[2] = Kit_WordCountOnes( pTruth[0] & 0x0F0F0F0F );
-        if ( nVars > 3 )
-            pStore[3] = Kit_WordCountOnes( pTruth[0] & 0x00FF00FF );
-        if ( nVars > 4 )
-            pStore[4] = Kit_WordCountOnes( pTruth[0] & 0x0000FFFF );
-        return;
-    }
-    // nVars >= 6
-    // count 1's for all other variables
-    for ( k = 0; k < nWords; k++ )
-    {
-        Counter = Kit_WordCountOnes( pTruth[k] );
-        for ( i = 5; i < nVars; i++ )
-            if ( (k & (1 << (i-5))) == 0 )
-                pStore[i] += Counter;
-    }
-    // count 1's for the first five variables
-    for ( k = 0; k < nWords/2; k++ )
-    {
-        pStore[0] += Kit_WordCountOnes( (pTruth[0] & 0x55555555) | ((pTruth[1] & 0x55555555) <<  1) );
-        pStore[1] += Kit_WordCountOnes( (pTruth[0] & 0x33333333) | ((pTruth[1] & 0x33333333) <<  2) );
-        pStore[2] += Kit_WordCountOnes( (pTruth[0] & 0x0F0F0F0F) | ((pTruth[1] & 0x0F0F0F0F) <<  4) );
-        pStore[3] += Kit_WordCountOnes( (pTruth[0] & 0x00FF00FF) | ((pTruth[1] & 0x00FF00FF) <<  8) );
-        pStore[4] += Kit_WordCountOnes( (pTruth[0] & 0x0000FFFF) | ((pTruth[1] & 0x0000FFFF) << 16) );
-        pTruth += 2;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of 1's in each cofactor.]
-
-  Description [Verifies the above procedure.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthCountOnesInCofsSlow( unsigned * pTruth, int nVars, short * pStore, unsigned * pAux )
-{
-    int i;
-    for ( i = 0; i < nVars; i++ )
-    {
-        Kit_TruthCofactor0New( pAux, pTruth, nVars, i );
-        pStore[2*i+0] = Kit_TruthCountOnes( pAux, nVars ) / 2;
-        Kit_TruthCofactor1New( pAux, pTruth, nVars, i );
-        pStore[2*i+1] = Kit_TruthCountOnes( pAux, nVars ) / 2;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Canonicize the truth table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Kit_TruthHash( unsigned * pIn, int nWords )
-{
-    // The 1,024 smallest prime numbers used to compute the hash value
-    // http://www.math.utah.edu/~alfeld/math/primelist.html
-    static int HashPrimes[1024] = { 2, 3, 5, 
-    7, 11, 13, 17, 19, 23, 29, 31, 37, 41, 43, 47, 53, 59, 61, 67, 71, 73, 79, 83, 89, 97, 
-    101, 103, 107, 109, 113, 127, 131, 137, 139, 149, 151, 157, 163, 167, 173, 179, 181, 191, 
-    193, 197, 199, 211, 223, 227, 229, 233, 239, 241, 251, 257, 263, 269, 271, 277, 281, 283, 
-    293, 307, 311, 313, 317, 331, 337, 347, 349, 353, 359, 367, 373, 379, 383, 389, 397, 401, 
-    409, 419, 421, 431, 433, 439, 443, 449, 457, 461, 463, 467, 479, 487, 491, 499, 503, 509, 
-    521, 523, 541, 547, 557, 563, 569, 571, 577, 587, 593, 599, 601, 607, 613, 617, 619, 631, 
-    641, 643, 647, 653, 659, 661, 673, 677, 683, 691, 701, 709, 719, 727, 733, 739, 743, 751, 
-    757, 761, 769, 773, 787, 797, 809, 811, 821, 823, 827, 829, 839, 853, 857, 859, 863, 877, 
-    881, 883, 887, 907, 911, 919, 929, 937, 941, 947, 953, 967, 971, 977, 983, 991, 997, 
-    1009, 1013, 1019, 1021, 1031, 1033, 1039, 1049, 1051, 1061, 1063, 1069, 1087, 1091, 
-    1093, 1097, 1103, 1109, 1117, 1123, 1129, 1151, 1153, 1163, 1171, 1181, 1187, 1193, 
-    1201, 1213, 1217, 1223, 1229, 1231, 1237, 1249, 1259, 1277, 1279, 1283, 1289, 1291, 
-    1297, 1301, 1303, 1307, 1319, 1321, 1327, 1361, 1367, 1373, 1381, 1399, 1409, 1423, 
-    1427, 1429, 1433, 1439, 1447, 1451, 1453, 1459, 1471, 1481, 1483, 1487, 1489, 1493, 
-    1499, 1511, 1523, 1531, 1543, 1549, 1553, 1559, 1567, 1571, 1579, 1583, 1597, 1601, 
-    1607, 1609, 1613, 1619, 1621, 1627, 1637, 1657, 1663, 1667, 1669, 1693, 1697, 1699, 
-    1709, 1721, 1723, 1733, 1741, 1747, 1753, 1759, 1777, 1783, 1787, 1789, 1801, 1811, 
-    1823, 1831, 1847, 1861, 1867, 1871, 1873, 1877, 1879, 1889, 1901, 1907, 1913, 1931, 
-    1933, 1949, 1951, 1973, 1979, 1987, 1993, 1997, 1999, 2003, 2011, 2017, 2027, 2029, 
-    2039, 2053, 2063, 2069, 2081, 2083, 2087, 2089, 2099, 2111, 2113, 2129, 2131, 2137, 
-    2141, 2143, 2153, 2161, 2179, 2203, 2207, 2213, 2221, 2237, 2239, 2243, 2251, 2267, 
-    2269, 2273, 2281, 2287, 2293, 2297, 2309, 2311, 2333, 2339, 2341, 2347, 2351, 2357, 
-    2371, 2377, 2381, 2383, 2389, 2393, 2399, 2411, 2417, 2423, 2437, 2441, 2447, 2459, 
-    2467, 2473, 2477, 2503, 2521, 2531, 2539, 2543, 2549, 2551, 2557, 2579, 2591, 2593, 
-    2609, 2617, 2621, 2633, 2647, 2657, 2659, 2663, 2671, 2677, 2683, 2687, 2689, 2693, 
-    2699, 2707, 2711, 2713, 2719, 2729, 2731, 2741, 2749, 2753, 2767, 2777, 2789, 2791, 
-    2797, 2801, 2803, 2819, 2833, 2837, 2843, 2851, 2857, 2861, 2879, 2887, 2897, 2903, 
-    2909, 2917, 2927, 2939, 2953, 2957, 2963, 2969, 2971, 2999, 3001, 3011, 3019, 3023, 
-    3037, 3041, 3049, 3061, 3067, 3079, 3083, 3089, 3109, 3119, 3121, 3137, 3163, 3167, 
-    3169, 3181, 3187, 3191, 3203, 3209, 3217, 3221, 3229, 3251, 3253, 3257, 3259, 3271, 
-    3299, 3301, 3307, 3313, 3319, 3323, 3329, 3331, 3343, 3347, 3359, 3361, 3371, 3373, 
-    3389, 3391, 3407, 3413, 3433, 3449, 3457, 3461, 3463, 3467, 3469, 3491, 3499, 3511, 
-    3517, 3527, 3529, 3533, 3539, 3541, 3547, 3557, 3559, 3571, 3581, 3583, 3593, 3607, 
-    3613, 3617, 3623, 3631, 3637, 3643, 3659, 3671, 3673, 3677, 3691, 3697, 3701, 3709, 
-    3719, 3727, 3733, 3739, 3761, 3767, 3769, 3779, 3793, 3797, 3803, 3821, 3823, 3833, 
-    3847, 3851, 3853, 3863, 3877, 3881, 3889, 3907, 3911, 3917, 3919, 3923, 3929, 3931, 
-    3943, 3947, 3967, 3989, 4001, 4003, 4007, 4013, 4019, 4021, 4027, 4049, 4051, 4057, 
-    4073, 4079, 4091, 4093, 4099, 4111, 4127, 4129, 4133, 4139, 4153, 4157, 4159, 4177, 
-    4201, 4211, 4217, 4219, 4229, 4231, 4241, 4243, 4253, 4259, 4261, 4271, 4273, 4283, 
-    4289, 4297, 4327, 4337, 4339, 4349, 4357, 4363, 4373, 4391, 4397, 4409, 4421, 4423, 
-    4441, 4447, 4451, 4457, 4463, 4481, 4483, 4493, 4507, 4513, 4517, 4519, 4523, 4547, 
-    4549, 4561, 4567, 4583, 4591, 4597, 4603, 4621, 4637, 4639, 4643, 4649, 4651, 4657, 
-    4663, 4673, 4679, 4691, 4703, 4721, 4723, 4729, 4733, 4751, 4759, 4783, 4787, 4789, 
-    4793, 4799, 4801, 4813, 4817, 4831, 4861, 4871, 4877, 4889, 4903, 4909, 4919, 4931, 
-    4933, 4937, 4943, 4951, 4957, 4967, 4969, 4973, 4987, 4993, 4999, 5003, 5009, 5011, 
-    5021, 5023, 5039, 5051, 5059, 5077, 5081, 5087, 5099, 5101, 5107, 5113, 5119, 5147, 
-    5153, 5167, 5171, 5179, 5189, 5197, 5209, 5227, 5231, 5233, 5237, 5261, 5273, 5279, 
-    5281, 5297, 5303, 5309, 5323, 5333, 5347, 5351, 5381, 5387, 5393, 5399, 5407, 5413, 
-    5417, 5419, 5431, 5437, 5441, 5443, 5449, 5471, 5477, 5479, 5483, 5501, 5503, 5507, 
-    5519, 5521, 5527, 5531, 5557, 5563, 5569, 5573, 5581, 5591, 5623, 5639, 5641, 5647, 
-    5651, 5653, 5657, 5659, 5669, 5683, 5689, 5693, 5701, 5711, 5717, 5737, 5741, 5743, 
-    5749, 5779, 5783, 5791, 5801, 5807, 5813, 5821, 5827, 5839, 5843, 5849, 5851, 5857, 
-    5861, 5867, 5869, 5879, 5881, 5897, 5903, 5923, 5927, 5939, 5953, 5981, 5987, 6007, 
-    6011, 6029, 6037, 6043, 6047, 6053, 6067, 6073, 6079, 6089, 6091, 6101, 6113, 6121, 
-    6131, 6133, 6143, 6151, 6163, 6173, 6197, 6199, 6203, 6211, 6217, 6221, 6229, 6247, 
-    6257, 6263, 6269, 6271, 6277, 6287, 6299, 6301, 6311, 6317, 6323, 6329, 6337, 6343, 
-    6353, 6359, 6361, 6367, 6373, 6379, 6389, 6397, 6421, 6427, 6449, 6451, 6469, 6473, 
-    6481, 6491, 6521, 6529, 6547, 6551, 6553, 6563, 6569, 6571, 6577, 6581, 6599, 6607, 
-    6619, 6637, 6653, 6659, 6661, 6673, 6679, 6689, 6691, 6701, 6703, 6709, 6719, 6733, 
-    6737, 6761, 6763, 6779, 6781, 6791, 6793, 6803, 6823, 6827, 6829, 6833, 6841, 6857, 
-    6863, 6869, 6871, 6883, 6899, 6907, 6911, 6917, 6947, 6949, 6959, 6961, 6967, 6971, 
-    6977, 6983, 6991, 6997, 7001, 7013, 7019, 7027, 7039, 7043, 7057, 7069, 7079, 7103, 
-    7109, 7121, 7127, 7129, 7151, 7159, 7177, 7187, 7193, 7207, 7211, 7213, 7219, 7229, 
-    7237, 7243, 7247, 7253, 7283, 7297, 7307, 7309, 7321, 7331, 7333, 7349, 7351, 7369, 
-    7393, 7411, 7417, 7433, 7451, 7457, 7459, 7477, 7481, 7487, 7489, 7499, 7507, 7517, 
-    7523, 7529, 7537, 7541, 7547, 7549, 7559, 7561, 7573, 7577, 7583, 7589, 7591, 7603, 
-    7607, 7621, 7639, 7643, 7649, 7669, 7673, 7681, 7687, 7691, 7699, 7703, 7717, 7723, 
-    7727, 7741, 7753, 7757, 7759, 7789, 7793, 7817, 7823, 7829, 7841, 7853, 7867, 7873, 
-    7877, 7879, 7883, 7901, 7907, 7919, 7927, 7933, 7937, 7949, 7951, 7963, 7993, 8009, 
-    8011, 8017, 8039, 8053, 8059, 8069, 8081, 8087, 8089, 8093, 8101, 8111, 8117, 8123, 
-    8147, 8161 };
-    int i;
-    unsigned uHashKey;
-    assert( nWords <= 1024 );
-    uHashKey = 0;
-    for ( i = 0; i < nWords; i++ )
-        uHashKey ^= HashPrimes[i] * pIn[i];
-    return uHashKey;
-}
-
- 
-/**Function*************************************************************
-
-  Synopsis    [Canonicize the truth table.]
-
-  Description [Returns the phase. ]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Kit_TruthSemiCanonicize( unsigned * pInOut, unsigned * pAux, int nVars, char * pCanonPerm, short * pStore )
-{
-//    short pStore2[32];
-    unsigned * pIn = pInOut, * pOut = pAux, * pTemp;
-    int nWords = Kit_TruthWordNum( nVars );
-    int i, Temp, fChange, Counter, nOnes;//, k, j, w, Limit;
-    unsigned uCanonPhase;
-
-    // canonicize output
-    uCanonPhase = 0;
-
-    nOnes = Kit_TruthCountOnes(pIn, nVars);
-    //if(pIn[0] & 1)
-    if ( (nOnes > nWords * 16) )//|| ((nOnes == nWords * 16) && (pIn[0] & 1)) )
-    {
-        uCanonPhase |= (1 << nVars);
-        Kit_TruthNot( pIn, pIn, nVars );
-    }
-
-    // collect the minterm counts
-    Kit_TruthCountOnesInCofs( pIn, nVars, pStore );
-/*
-    Kit_TruthCountOnesInCofsSlow( pIn, nVars, pStore2, pAux );
-    for ( i = 0; i < 2*nVars; i++ )
-    {
-        assert( pStore[i] == pStore2[i] );
-    }
-*/
-    // canonicize phase
-    for ( i = 0; i < nVars; i++ )
-    {
-        if ( pStore[2*i+0] <= pStore[2*i+1] )
-            continue;
-        uCanonPhase |= (1 << i);
-        Temp = pStore[2*i+0];
-        pStore[2*i+0] = pStore[2*i+1];
-        pStore[2*i+1] = Temp;
-        Kit_TruthChangePhase( pIn, nVars, i );
-    }
-
-//    Kit_PrintHexadecimal( stdout, pIn, nVars );
-//    printf( "\n" );
-
-    // permute
-    Counter = 0;
-    do {
-        fChange = 0;
-        for ( i = 0; i < nVars-1; i++ )
-        {
-            if ( pStore[2*i] <= pStore[2*(i+1)] )
-                continue;
-            Counter++;
-            fChange = 1;
-
-            Temp = pCanonPerm[i];
-            pCanonPerm[i] = pCanonPerm[i+1];
-            pCanonPerm[i+1] = Temp;
-
-            Temp = pStore[2*i];
-            pStore[2*i] = pStore[2*(i+1)];
-            pStore[2*(i+1)] = Temp;
-
-            Temp = pStore[2*i+1];
-            pStore[2*i+1] = pStore[2*(i+1)+1];
-            pStore[2*(i+1)+1] = Temp;
-
-            // if the polarity of variables is different, swap them
-            if ( ((uCanonPhase & (1 << i)) > 0) != ((uCanonPhase & (1 << (i+1))) > 0) )
-            {
-                uCanonPhase ^= (1 << i);
-                uCanonPhase ^= (1 << (i+1));
-            }
-
-            Kit_TruthSwapAdjacentVars( pOut, pIn, nVars, i );
-            pTemp = pIn; pIn = pOut; pOut = pTemp;
-        }
-    } while ( fChange );
-
-
-/*
-    Extra_PrintBinary( stdout, &uCanonPhase, nVars+1 ); printf( " : " );
-    for ( i = 0; i < nVars; i++ )
-        printf( "%d=%d/%d  ", pCanonPerm[i], pStore[2*i], pStore[2*i+1] );
-    printf( "  C = %d\n", Counter );
-    Extra_PrintHexadecimal( stdout, pIn, nVars );
-    printf( "\n" );
-*/
-
-/*
-    // process symmetric variable groups
-    uSymms = 0;
-    for ( i = 0; i < nVars-1; i++ )
-    {
-        if ( pStore[2*i] != pStore[2*(i+1)] ) // i and i+1 cannot be symmetric
-            continue;
-        if ( pStore[2*i] != pStore[2*i+1] )
-            continue;
-        if ( Kit_TruthVarsSymm( pIn, nVars, i, i+1 ) )
-            continue;
-        if ( Kit_TruthVarsAntiSymm( pIn, nVars, i, i+1 ) )
-            Kit_TruthChangePhase( pIn, nVars, i+1 );
-    }
-*/
-
-/*
-    // process symmetric variable groups
-    uSymms = 0;
-    for ( i = 0; i < nVars-1; i++ )
-    {
-        if ( pStore[2*i] != pStore[2*(i+1)] ) // i and i+1 cannot be symmetric
-            continue;
-        // i and i+1 can be symmetric
-        // find the end of this group
-        for ( k = i+1; k < nVars; k++ )
-            if ( pStore[2*i] != pStore[2*k] ) 
-                break;
-        Limit = k;
-        assert( i < Limit-1 );
-        // go through the variables in this group
-        for ( j = i + 1; j < Limit; j++ )
-        {
-            // check symmetry
-            if ( Kit_TruthVarsSymm( pIn, nVars, i, j ) )
-            {
-                uSymms |= (1 << j);
-                continue;
-            }
-            // they are phase-unknown
-            if ( pStore[2*i] == pStore[2*i+1] ) 
-            {
-                if ( Kit_TruthVarsAntiSymm( pIn, nVars, i, j ) )
-                {
-                    Kit_TruthChangePhase( pIn, nVars, j );
-                    uCanonPhase ^= (1 << j);
-                    uSymms |= (1 << j);
-                    continue;
-                }
-            }
-
-            // they are not symmetric - move j as far as it goes in the group
-            for ( k = j; k < Limit-1; k++ )
-            {
-                Counter++;
-
-                Temp = pCanonPerm[k];
-                pCanonPerm[k] = pCanonPerm[k+1];
-                pCanonPerm[k+1] = Temp;
-
-                assert( pStore[2*k] == pStore[2*(k+1)] );
-                Kit_TruthSwapAdjacentVars( pOut, pIn, nVars, k );
-                pTemp = pIn; pIn = pOut; pOut = pTemp;
-            }
-            Limit--;
-            j--;
-        }
-        i = Limit - 1;
-    }
-*/
-
-    // swap if it was moved an even number of times
-    if ( Counter & 1 )
-        Kit_TruthCopy( pOut, pIn, nVars );
-    return uCanonPhase;
-}
-
- 
-/**Function*************************************************************
-
-  Synopsis    [Fast counting minterms in the cofactors of a function.]
-
-  Description [Returns the total number of minterms in the function.
-  The resulting array (pRes) contains the number of minterms in 0-cofactor
-  w.r.t. each variables. The additional array (pBytes) is used for internal 
-  storage. It should have the size equal to the number of truth table bytes.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Kit_TruthCountMinterms( unsigned * pTruth, int nVars, int * pRes, int * pBytesInit )
-{
-    // the number of 1s if every byte as well as in the 0-cofactors w.r.t. three variables
-    static unsigned Table[256] = {
-        0x00000000, 0x01010101, 0x01010001, 0x02020102, 0x01000101, 0x02010202, 0x02010102, 0x03020203,
-        0x01000001, 0x02010102, 0x02010002, 0x03020103, 0x02000102, 0x03010203, 0x03010103, 0x04020204,
-        0x00010101, 0x01020202, 0x01020102, 0x02030203, 0x01010202, 0x02020303, 0x02020203, 0x03030304,
-        0x01010102, 0x02020203, 0x02020103, 0x03030204, 0x02010203, 0x03020304, 0x03020204, 0x04030305,
-        0x00010001, 0x01020102, 0x01020002, 0x02030103, 0x01010102, 0x02020203, 0x02020103, 0x03030204,
-        0x01010002, 0x02020103, 0x02020003, 0x03030104, 0x02010103, 0x03020204, 0x03020104, 0x04030205,
-        0x00020102, 0x01030203, 0x01030103, 0x02040204, 0x01020203, 0x02030304, 0x02030204, 0x03040305,
-        0x01020103, 0x02030204, 0x02030104, 0x03040205, 0x02020204, 0x03030305, 0x03030205, 0x04040306,
-        0x00000101, 0x01010202, 0x01010102, 0x02020203, 0x01000202, 0x02010303, 0x02010203, 0x03020304,
-        0x01000102, 0x02010203, 0x02010103, 0x03020204, 0x02000203, 0x03010304, 0x03010204, 0x04020305,
-        0x00010202, 0x01020303, 0x01020203, 0x02030304, 0x01010303, 0x02020404, 0x02020304, 0x03030405,
-        0x01010203, 0x02020304, 0x02020204, 0x03030305, 0x02010304, 0x03020405, 0x03020305, 0x04030406,
-        0x00010102, 0x01020203, 0x01020103, 0x02030204, 0x01010203, 0x02020304, 0x02020204, 0x03030305,
-        0x01010103, 0x02020204, 0x02020104, 0x03030205, 0x02010204, 0x03020305, 0x03020205, 0x04030306,
-        0x00020203, 0x01030304, 0x01030204, 0x02040305, 0x01020304, 0x02030405, 0x02030305, 0x03040406,
-        0x01020204, 0x02030305, 0x02030205, 0x03040306, 0x02020305, 0x03030406, 0x03030306, 0x04040407,
-        0x00000001, 0x01010102, 0x01010002, 0x02020103, 0x01000102, 0x02010203, 0x02010103, 0x03020204,
-        0x01000002, 0x02010103, 0x02010003, 0x03020104, 0x02000103, 0x03010204, 0x03010104, 0x04020205,
-        0x00010102, 0x01020203, 0x01020103, 0x02030204, 0x01010203, 0x02020304, 0x02020204, 0x03030305,
-        0x01010103, 0x02020204, 0x02020104, 0x03030205, 0x02010204, 0x03020305, 0x03020205, 0x04030306,
-        0x00010002, 0x01020103, 0x01020003, 0x02030104, 0x01010103, 0x02020204, 0x02020104, 0x03030205,
-        0x01010003, 0x02020104, 0x02020004, 0x03030105, 0x02010104, 0x03020205, 0x03020105, 0x04030206,
-        0x00020103, 0x01030204, 0x01030104, 0x02040205, 0x01020204, 0x02030305, 0x02030205, 0x03040306,
-        0x01020104, 0x02030205, 0x02030105, 0x03040206, 0x02020205, 0x03030306, 0x03030206, 0x04040307,
-        0x00000102, 0x01010203, 0x01010103, 0x02020204, 0x01000203, 0x02010304, 0x02010204, 0x03020305,
-        0x01000103, 0x02010204, 0x02010104, 0x03020205, 0x02000204, 0x03010305, 0x03010205, 0x04020306,
-        0x00010203, 0x01020304, 0x01020204, 0x02030305, 0x01010304, 0x02020405, 0x02020305, 0x03030406,
-        0x01010204, 0x02020305, 0x02020205, 0x03030306, 0x02010305, 0x03020406, 0x03020306, 0x04030407,
-        0x00010103, 0x01020204, 0x01020104, 0x02030205, 0x01010204, 0x02020305, 0x02020205, 0x03030306,
-        0x01010104, 0x02020205, 0x02020105, 0x03030206, 0x02010205, 0x03020306, 0x03020206, 0x04030307,
-        0x00020204, 0x01030305, 0x01030205, 0x02040306, 0x01020305, 0x02030406, 0x02030306, 0x03040407,
-        0x01020205, 0x02030306, 0x02030206, 0x03040307, 0x02020306, 0x03030407, 0x03030307, 0x04040408
-    };
-    unsigned uSum;
-    unsigned char * pTruthC, * pLimit;
-    int * pBytes = pBytesInit;
-    int i, iVar, Step, nWords, nBytes, nTotal;
-
-    assert( nVars <= 20 );
-
-    // clear storage
-    memset( pRes, 0, sizeof(int) * nVars );
-
-    // count the number of one's in 0-cofactors of the first three variables
-    nTotal = uSum = 0;
-    nWords = Kit_TruthWordNum( nVars );
-    nBytes = nWords * 4;
-    pTruthC = (unsigned char *)pTruth;
-    pLimit = pTruthC + nBytes;
-    for ( ; pTruthC < pLimit; pTruthC++ )
-    {
-        uSum += Table[*pTruthC];
-        *pBytes++ = (Table[*pTruthC] & 0xff);
-        if ( (uSum & 0xff) > 246 )
-        {
-            nTotal += (uSum & 0xff);
-            pRes[0] += ((uSum >>  8) & 0xff);
-            pRes[2] += ((uSum >> 16) & 0xff);
-            pRes[3] += ((uSum >> 24) & 0xff);
-            uSum = 0;
-        }
-    }
-    if ( uSum )
-    {
-        nTotal += (uSum & 0xff);
-        pRes[0] += ((uSum >>  8) & 0xff);
-        pRes[1] += ((uSum >> 16) & 0xff);
-        pRes[2] += ((uSum >> 24) & 0xff);
-    }
-
-    // count all other variables
-    for ( iVar = 3, Step = 1; Step < nBytes; Step *= 2, iVar++ )
-        for ( i = 0; i < nBytes; i += Step + Step )
-        {
-            pRes[iVar] += pBytesInit[i];
-            pBytesInit[i] += pBytesInit[i+Step];
-        }
-    assert( pBytesInit[0] == nTotal );
-    assert( iVar == nVars );
-
-    for ( i = 0; i < nVars; i++ )
-        assert( pRes[i] == Kit_TruthCofactor0Count(pTruth, nVars, i) );
-    return nTotal;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints the hex unsigned into a file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_PrintHexadecimal( FILE * pFile, unsigned Sign[], int nVars )
-{
-    int nDigits, Digit, k;
-    // write the number into the file
-    nDigits = (1 << nVars) / 4;
-    for ( k = nDigits - 1; k >= 0; k-- )
-    {
-        Digit = ((Sign[k/8] >> ((k%8) * 4)) & 15);
-        if ( Digit < 10 )
-            fprintf( pFile, "%d", Digit );
-        else
-            fprintf( pFile, "%c", 'a' + Digit-10 );
-    }
-//    fprintf( pFile, "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Fast counting minterms for the functions.]
-
-  Description [Returns 0 if the function is a constant.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthCountMintermsPrecomp()
-{
-    int bit_count[256] = {
-      0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4,1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,
-      1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,
-      1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,
-      2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7,
-      1,2,2,3,2,3,3,4,2,3,3,4,3,4,4,5,2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,
-      2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7,
-      2,3,3,4,3,4,4,5,3,4,4,5,4,5,5,6,3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7,
-      3,4,4,5,4,5,5,6,4,5,5,6,5,6,6,7,4,5,5,6,5,6,6,7,5,6,6,7,6,7,7,8
-    };
-    unsigned i, uWord;
-    for ( i = 0; i < 256; i++ )
-    {
-        if ( i % 8 == 0 )
-            printf( "\n" );
-        uWord  =  bit_count[i];
-        uWord |= (bit_count[i & 0x55] <<  8);
-        uWord |= (bit_count[i & 0x33] << 16);
-        uWord |= (bit_count[i & 0x0f] << 24);
-        printf( "0x" );
-        Kit_PrintHexadecimal( stdout, &uWord, 5 );
-        printf( ", " );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Dumps truth table into a file.]
-
-  Description [Generates script file for reading into ABC.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Kit_TruthDumpToFile( unsigned * pTruth, int nVars, int nFile )
-{
-    static char pFileName[100];
-    FILE * pFile;
-    sprintf( pFileName, "tt\\s%04d", nFile );
-    pFile = fopen( pFileName, "w" );
-    fprintf( pFile, "rt " );
-    Kit_PrintHexadecimal( pFile, pTruth, nVars );
-    fprintf( pFile, "; bdd; sop; ps\n" );
-    fclose( pFile );
-    return pFileName;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Dumps truth table into a file.]
-
-  Description [Generates script file for reading into ABC.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthPrintProfile_int( unsigned * pTruth, int nVars )
-{
-    int Mints[20];
-    int Mints0[20];
-    int Mints1[20];
-    int Unique1[20];
-    int Total2[20][20];
-    int Unique2[20][20];
-    int Common2[20][20];
-    int nWords = Kit_TruthWordNum( nVars );
-    int * pBytes    = ABC_ALLOC( int, nWords * 4 );
-    unsigned * pIn  = ABC_ALLOC( unsigned, nWords );
-    unsigned * pOut = ABC_ALLOC( unsigned, nWords );
-    unsigned * pCof00 = ABC_ALLOC( unsigned, nWords );
-    unsigned * pCof01 = ABC_ALLOC( unsigned, nWords );
-    unsigned * pCof10 = ABC_ALLOC( unsigned, nWords );
-    unsigned * pCof11 = ABC_ALLOC( unsigned, nWords );
-    unsigned * pTemp;
-    int nTotalMints, nTotalMints0, nTotalMints1;
-    int v, u, i, iVar, nMints1;
-    int Cof00, Cof01, Cof10, Cof11;
-    int Coz00, Coz01, Coz10, Coz11;
-    assert( nVars <= 20 );
-    assert( nVars >=  6 );
-
-    nTotalMints = Kit_TruthCountMinterms( pTruth, nVars, Mints, pBytes );
-    for ( v = 0; v < nVars; v++ )
-        Unique1[v] = Kit_TruthBooleanDiffCount( pTruth, nVars, v );
-
-    for ( v = 0; v < nVars; v++ )
-    for ( u = 0; u < nVars; u++ )
-        Total2[v][u] = Unique2[v][u] = Common2[v][u] = -1;
-
-    nMints1 = (1<<(nVars-2));
-    for ( v = 0; v < nVars; v++ )
-    {
-        // move this var to be the first
-        Kit_TruthCopy( pIn, pTruth, nVars );
-//        Extra_PrintBinary( stdout, pIn, (1<<nVars) ); printf( "\n" );
-        for ( i = v; i < nVars - 1; i++ )
-        {
-            Kit_TruthSwapAdjacentVars( pOut, pIn, nVars, i );
-            pTemp = pIn; pIn = pOut; pOut = pTemp;
-        }
-//        Extra_PrintBinary( stdout, pIn, (1<<nVars) ); printf( "\n" );
-//        printf( "\n" );
-
-
-        // count minterms in both cofactor
-        nTotalMints0 = Kit_TruthCountMinterms( pIn,          nVars-1, Mints0, pBytes );
-        nTotalMints1 = Kit_TruthCountMinterms( pIn+nWords/2, nVars-1, Mints1, pBytes );
-        assert( nTotalMints == nTotalMints0 + nTotalMints1 );
-/*
-        for ( u = 0; u < nVars-1; u++ )
-            printf( "%2d ", Mints0[u] );
-        printf( "\n" );
-
-        for ( u = 0; u < nVars-1; u++ )
-            printf( "%2d ", Mints1[u] );
-        printf( "\n" );
-*/
-        for ( u = 0; u < nVars-1; u++ )
-        {
-            if ( u < v )
-                iVar = u;
-            else 
-                iVar = u + 1;
-            assert( v != iVar );
-            // get minter counts in the cofactors
-            Cof00 =              Mints0[u]; Coz00 = nMints1 - Cof00;              
-            Cof01 = nTotalMints0-Mints0[u]; Coz01 = nMints1 - Cof01;
-            Cof10 =              Mints1[u]; Coz10 = nMints1 - Cof10;
-            Cof11 = nTotalMints1-Mints1[u]; Coz11 = nMints1 - Cof11;
-
-            assert( Cof00 >= 0 && Cof00 <= nMints1 );
-            assert( Cof01 >= 0 && Cof01 <= nMints1 );
-            assert( Cof10 >= 0 && Cof10 <= nMints1 );
-            assert( Cof11 >= 0 && Cof11 <= nMints1 );
-
-            assert( Coz00 >= 0 && Coz00 <= nMints1 );
-            assert( Coz01 >= 0 && Coz01 <= nMints1 );
-            assert( Coz10 >= 0 && Coz10 <= nMints1 );
-            assert( Coz11 >= 0 && Coz11 <= nMints1 );
-
-            Common2[v][iVar] = Common2[iVar][v] = Cof00 * Coz11 + Coz00 * Cof11 + Cof01 * Coz10 + Coz01 * Cof10;
-
-            Total2[v][iVar] = Total2[iVar][v] = 
-                Cof00 * Coz01 + Coz00 * Cof01 + 
-                Cof00 * Coz10 + Coz00 * Cof10 + 
-                Cof00 * Coz11 + Coz00 * Cof11 + 
-                Cof01 * Coz10 + Coz01 * Cof10 + 
-                Cof01 * Coz11 + Coz01 * Cof11 + 
-                Cof10 * Coz11 + Coz10 * Cof11 ;
-
-            
-            Kit_TruthCofactor0New( pCof00, pIn,          nVars-1, u );
-            Kit_TruthCofactor1New( pCof01, pIn,          nVars-1, u );
-            Kit_TruthCofactor0New( pCof10, pIn+nWords/2, nVars-1, u );
-            Kit_TruthCofactor1New( pCof11, pIn+nWords/2, nVars-1, u );
-
-            Unique2[v][iVar] = Unique2[iVar][v] = 
-                Kit_TruthXorCount( pCof00, pCof01, nVars-1 ) +
-                Kit_TruthXorCount( pCof00, pCof10, nVars-1 ) +
-                Kit_TruthXorCount( pCof00, pCof11, nVars-1 ) +
-                Kit_TruthXorCount( pCof01, pCof10, nVars-1 ) +
-                Kit_TruthXorCount( pCof01, pCof11, nVars-1 ) +
-                Kit_TruthXorCount( pCof10, pCof11, nVars-1 );
-        }
-    }
-
-    printf( "\n" );
-    printf( " V: " );
-    for ( v = 0; v < nVars; v++ )
-        printf( "%8c  ", v+'a' );
-    printf( "\n" );
-
-    printf( " M: " );
-    for ( v = 0; v < nVars; v++ )
-        printf( "%8d  ", Mints[v] );
-    printf( "\n" );
-
-    printf( " U: " );
-    for ( v = 0; v < nVars; v++ )
-        printf( "%8d  ", Unique1[v] );
-    printf( "\n" );
-    printf( "\n" );
-
-    printf( "Unique:\n" );
-    for ( i = 0; i < nVars; i++ )
-    {
-    printf( " %2d ", i );
-    for ( v = 0; v < nVars; v++ )
-        printf( "%8d  ", Unique2[i][v] );
-    printf( "\n" );
-    }
-
-    printf( "Common:\n" );
-    for ( i = 0; i < nVars; i++ )
-    {
-    printf( " %2d ", i );
-    for ( v = 0; v < nVars; v++ )
-        printf( "%8d  ", Common2[i][v] );
-    printf( "\n" );
-    }
-
-    printf( "Total:\n" );
-    for ( i = 0; i < nVars; i++ )
-    {
-    printf( " %2d ", i );
-    for ( v = 0; v < nVars; v++ )
-        printf( "%8d  ", Total2[i][v] );
-    printf( "\n" );
-    }
-
-    ABC_FREE( pIn );
-    ABC_FREE( pOut );
-    ABC_FREE( pCof00 );
-    ABC_FREE( pCof01 );
-    ABC_FREE( pCof10 );
-    ABC_FREE( pCof11 );
-    ABC_FREE( pBytes );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Dumps truth table into a file.]
-
-  Description [Generates script file for reading into ABC.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Kit_TruthPrintProfile( unsigned * pTruth, int nVars )
-{
-    unsigned uTruth[2];
-    if ( nVars >= 6 )
-    {
-        Kit_TruthPrintProfile_int( pTruth, nVars );
-        return;
-    }
-    assert( nVars >= 2 );
-    uTruth[0] = pTruth[0];
-    uTruth[1] = pTruth[0];
-    Kit_TruthPrintProfile( uTruth, 6 );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/kit_.c b/src/aig/kit/kit_.c
deleted file mode 100644
index 37be0b49..00000000
--- a/src/aig/kit/kit_.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [kit_.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Computation kit.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - Dec 6, 2006.]
-
-  Revision    [$Id: kit_.c,v 1.00 2006/12/06 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/kit/module.make b/src/aig/kit/module.make
deleted file mode 100644
index a592aeec..00000000
--- a/src/aig/kit/module.make
+++ /dev/null
@@ -1,11 +0,0 @@
-SRC +=  src/aig/kit/kitAig.c \
-    src/aig/kit/kitBdd.c \
-    src/aig/kit/kitCloud.c src/aig/kit/cloud.c \
-    src/aig/kit/kitDsd.c \
-    src/aig/kit/kitFactor.c \
-    src/aig/kit/kitGraph.c \
-    src/aig/kit/kitHop.c \
-    src/aig/kit/kitIsop.c \
-    src/aig/kit/kitPla.c \
-    src/aig/kit/kitSop.c \
-    src/aig/kit/kitTruth.c
diff --git a/src/aig/live/liveness.c b/src/aig/live/liveness.c
deleted file mode 100644
index 324865a9..00000000
--- a/src/aig/live/liveness.c
+++ /dev/null
@@ -1,2575 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [liveness.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Liveness property checking.]
-
-  Synopsis    [Main implementation module.]
-
-  Author      [Sayak Ray]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - January 1, 2009.]
-
-  Revision    [$Id: liveness.c,v 1.00 2009/01/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include <stdio.h>
-#include "main.h"
-#include "aig.h"
-#include "saig.h"
-#include <string.h>
-#include "mainInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-#define PROPAGATE_NAMES
-#define MULTIPLE_LTL_FORMULA
-#define ALLOW_SAFETY_PROPERTIES
-
-#define FULL_BIERE_MODE 0
-#define IGNORE_LIVENESS_KEEP_SAFETY_MODE 1
-#define IGNORE_SAFETY_KEEP_LIVENESS_MODE 2
-#define IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE 3
-#define FULL_BIERE_ONE_LOOP_MODE 4
-//#define DUPLICATE_CKT_DEBUG
-
-extern Aig_Man_t * Abc_NtkToDar( Abc_Ntk_t * pNtk, int fExors, int fRegisters );
-extern Abc_Ntk_t * Abc_NtkFromAigPhase( Aig_Man_t * pMan );
-//char *strdup(const char *string);
-
-//******************************************
-//external functions defined in ltl_parser.c
-//******************************************
-typedef struct ltlNode_t ltlNode;
-extern ltlNode *readLtlFormula( char *formula );
-extern void traverseAbstractSyntaxTree( ltlNode *node );
-extern ltlNode *parseFormulaCreateAST( char *inputFormula );
-extern int isWellFormed( ltlNode *topNode );
-extern int checkSignalNameExistence( Abc_Ntk_t *pNtk, ltlNode *topASTNode );
-extern void populateBoolWithAigNodePtr( Abc_Ntk_t *pNtk, Aig_Man_t *pAigOld, Aig_Man_t *pAigNew, ltlNode *topASTNode );
-extern int checkAllBoolHaveAIGPointer( ltlNode *topASTNode );
-extern void populateAigPointerUnitGF( Aig_Man_t *pAigNew, ltlNode *topASTNode, Vec_Ptr_t *vSignal, Vec_Vec_t *vAigGFMap );
-extern void setAIGNodePtrOfGloballyNode( ltlNode *astNode, Aig_Obj_t *pObjLo );
-extern Aig_Obj_t *buildLogicFromLTLNode( Aig_Man_t *pAig, ltlNode *pLtlNode );
-extern Aig_Obj_t *retriveAIGPointerFromLTLNode( ltlNode *astNode );
-extern void traverseAbstractSyntaxTree_postFix( ltlNode *node );
-//**********************************
-//external function declaration ends
-//**********************************
-
- 
-/*******************************************************************
-LAYOUT OF PI VECTOR:
-
-+------------------------------------------------------------------------------------------------------------------------------------+
-| TRUE ORIGINAL PI (n) | SAVE(PI) (1) | ORIGINAL LO (k) | SAVED(LO) (1) | SHADOW_ORIGINAL LO (k) | LIVENESS LO (l) | FAIRNESS LO (f) |
-+------------------------------------------------------------------------------------------------------------------------------------+
-<------------True PI----------------->|<----------------------------LO--------------------------------------------------------------->
-
-LAYOUT OF PO VECTOR:
-
-+-----------------------------------------------------------------------------------------------------------+
-| SOLE PO (1) | ORIGINAL LI (k) | SAVED LI (1) | SHADOW_ORIGINAL LI (k) | LIVENESS LI (l) | FAIRNESS LI (f) |
-+-----------------------------------------------------------------------------------------------------------+
-<--True PO--->|<--------------------------------------LI---------------------------------------------------->
-
-********************************************************************/
-
-
-static int nodeName_starts_with( Abc_Obj_t *pNode, const char *prefix )
-{
-    if( strstr( Abc_ObjName( pNode ), prefix ) == Abc_ObjName( pNode ) )
-        return 1;
-    else
-        return 0;
-}
-
-void printVecPtrOfString( Vec_Ptr_t *vec )
-{
-    int i;
-
-    for( i=0; i< Vec_PtrSize( vec ); i++ )
-    {
-        printf("vec[%d] = %s\n", i, (char *)Vec_PtrEntry(vec, i) );
-    }
-}
-
-int getPoIndex( Aig_Man_t *pAig, Aig_Obj_t *pPivot )
-{
-    int i;
-    Aig_Obj_t *pObj;
-
-    Saig_ManForEachPo( pAig, pObj, i )
-    {
-        if( pObj == pPivot )
-            return i;
-    }
-    return -1;
-}
-
-char * retrieveTruePiName( Abc_Ntk_t *pNtkOld, Aig_Man_t *pAigOld, Aig_Man_t *pAigNew, Aig_Obj_t *pObjPivot )
-{
-    Aig_Obj_t *pObjOld, *pObj;
-    Abc_Obj_t *pNode;
-    int index;
-
-    assert( Saig_ObjIsPi( pAigNew, pObjPivot ) );
-    Aig_ManForEachPi( pAigNew, pObj, index )
-        if( pObj == pObjPivot )
-            break;
-    assert( index < Aig_ManPiNum( pAigNew ) - Aig_ManRegNum( pAigNew ) );
-    if( index == Saig_ManPiNum( pAigNew ) - 1 )
-        return "SAVE_BIERE";
-    else
-    {
-        pObjOld = Aig_ManPi( pAigOld, index );
-        pNode = Abc_NtkPi( pNtkOld, index );
-        assert( pObjOld->pData == pObjPivot );
-        return Abc_ObjName( pNode );
-    }
-}
-
-char * retrieveLOName( Abc_Ntk_t *pNtkOld, Aig_Man_t *pAigOld, Aig_Man_t *pAigNew, Aig_Obj_t *pObjPivot, Vec_Ptr_t *vLive, Vec_Ptr_t * vFair )
-{
-    Aig_Obj_t *pObjOld, *pObj;
-    Abc_Obj_t *pNode;
-    int index, oldIndex, originalLatchNum = Saig_ManRegNum(pAigOld), strMatch, i;
-    char *dummyStr = (char *)malloc( sizeof(char) * 50 );
-
-    assert( Saig_ObjIsLo( pAigNew, pObjPivot ) );
-    Saig_ManForEachLo( pAigNew, pObj, index )
-        if( pObj == pObjPivot )
-            break;
-    if( index < originalLatchNum )
-    {
-        oldIndex = Saig_ManPiNum( pAigOld ) + index;
-        pObjOld = Aig_ManPi( pAigOld, oldIndex );
-        pNode = Abc_NtkCi( pNtkOld, oldIndex );
-        assert( pObjOld->pData == pObjPivot );
-        return Abc_ObjName( pNode );
-    }
-    else if( index == originalLatchNum )
-        return "SAVED_LO";
-    else if( index > originalLatchNum && index < 2 * originalLatchNum + 1 )
-    {
-        oldIndex = Saig_ManPiNum( pAigOld ) + index - originalLatchNum - 1;
-        pObjOld = Aig_ManPi( pAigOld, oldIndex );
-        pNode = Abc_NtkCi( pNtkOld, oldIndex );
-        sprintf( dummyStr, "%s__%s", Abc_ObjName( pNode ), "SHADOW");
-        return dummyStr;
-    }
-    else if( index >= 2 * originalLatchNum + 1 && index < 2 * originalLatchNum + 1 + Vec_PtrSize( vLive ) )
-    {
-        oldIndex = index - 2 * originalLatchNum - 1;
-        strMatch = 0;
-        dummyStr[0] = '\0';
-        Saig_ManForEachPo( pAigOld, pObj, i )
-        {
-            pNode = Abc_NtkPo( pNtkOld, i );
-            //if( strstr( Abc_ObjName( pNode ), "assert_fair" ) != NULL )
-            if(    nodeName_starts_with( pNode, "assert_fair" ) )
-            {
-                if( strMatch == oldIndex )
-                {
-                    sprintf( dummyStr, "%s__%s", Abc_ObjName( pNode ), "LIVENESS");
-                    //return dummyStr;
-                    break;
-                }
-                else
-                    strMatch++;
-            }
-        }
-        assert( dummyStr[0] != '\0' );
-        return dummyStr;
-    }
-    else if( index >= 2 * originalLatchNum + 1 + Vec_PtrSize( vLive ) && index < 2 * originalLatchNum + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) )
-    {
-        oldIndex = index - 2 * originalLatchNum - 1 - Vec_PtrSize( vLive );
-        strMatch = 0;
-        dummyStr[0] = '\0';
-        Saig_ManForEachPo( pAigOld, pObj, i )
-        {
-            pNode = Abc_NtkPo( pNtkOld, i );
-            //if( strstr( Abc_ObjName( pNode ), "assume_fair" ) != NULL )
-            if(    nodeName_starts_with( pNode, "assume_fair" ) )
-            {
-                if( strMatch == oldIndex )
-                {
-                    sprintf( dummyStr, "%s__%s", Abc_ObjName( pNode ), "FAIRNESS");
-                    //return dummyStr;
-                    break;
-                }
-                else
-                    strMatch++;
-            }
-        }
-        assert( dummyStr[0] != '\0' );
-        return dummyStr;
-    }
-    else
-        return "UNKNOWN";
-}
-
-Vec_Ptr_t *vecPis, *vecPiNames;
-Vec_Ptr_t *vecLos, *vecLoNames;
-
-
-int Aig_ManPiCleanupBiere( Aig_Man_t * p )
-{
-    int k = 0, nPisOld = Aig_ManPiNum(p);
-    
-    p->nObjs[AIG_OBJ_PI] = Vec_PtrSize( p->vPis );
-    if ( Aig_ManRegNum(p) )
-        p->nTruePis = Aig_ManPiNum(p) - Aig_ManRegNum(p);
-    
-    return nPisOld - Aig_ManPiNum(p);
-}
-
-
-int Aig_ManPoCleanupBiere( Aig_Man_t * p )
-{
-    int k = 0, nPosOld = Aig_ManPoNum(p);
-
-    p->nObjs[AIG_OBJ_PO] = Vec_PtrSize( p->vPos );
-    if ( Aig_ManRegNum(p) )
-        p->nTruePos = Aig_ManPoNum(p) - Aig_ManRegNum(p);
-    return nPosOld - Aig_ManPoNum(p);
-}
-
-Aig_Man_t * LivenessToSafetyTransformation( int mode, Abc_Ntk_t * pNtk, Aig_Man_t * p, 
-                                           Vec_Ptr_t *vLive, Vec_Ptr_t *vFair, Vec_Ptr_t *vAssertSafety, Vec_Ptr_t *vAssumeSafety )
-{
-    Aig_Man_t * pNew;
-    int i, nRegCount;
-    Aig_Obj_t * pObjSavePi;
-    Aig_Obj_t *pObjSavedLo, *pObjSavedLi;
-    Aig_Obj_t *pObj, *pMatch;
-    Aig_Obj_t *pObjSaveOrSaved, *pObjSaveAndNotSaved, *pObjSavedLoAndEquality;
-    Aig_Obj_t *pObjShadowLo, *pObjShadowLi, *pObjShadowLiDriver;
-    Aig_Obj_t *pObjXor, *pObjXnor, *pObjAndAcc;
-    Aig_Obj_t *pObjLive, *pObjFair, *pObjSafetyGate;
-    Aig_Obj_t *pObjSafetyPropertyOutput;
-    Aig_Obj_t *pObjOriginalSafetyPropertyOutput;
-    Aig_Obj_t *pDriverImage, *pArgument, *collectiveAssertSafety, *collectiveAssumeSafety;
-    char *nodeName;
-    int piCopied = 0, liCopied = 0, loCopied = 0, liCreated = 0, loCreated = 0, piVecIndex = 0, liveLatch = 0, fairLatch = 0;
-    
-    vecPis = Vec_PtrAlloc( Saig_ManPiNum( p ) + 1);
-    vecPiNames = Vec_PtrAlloc( Saig_ManPiNum( p ) + 1);
-
-    vecLos = Vec_PtrAlloc( Saig_ManRegNum( p )*2 + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) );
-    vecLoNames = Vec_PtrAlloc( Saig_ManRegNum( p )*2 + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) );
-
-    //****************************************************************
-    // Step1: create the new manager
-    // Note: The new manager is created with "2 * Aig_ManObjNumMax(p)"
-    // nodes, but this selection is arbitrary - need to be justified
-    //****************************************************************
-    pNew = Aig_ManStart( 2 * Aig_ManObjNumMax(p) );
-    pNew->pName = (char *)malloc( strlen( pNtk->pName ) + strlen("_l2s") + 1 );
-    sprintf(pNew->pName, "%s_%s", pNtk->pName, "l2s");
-    pNew->pSpec = NULL;
-    
-    //****************************************************************
-    // Step 2: map constant nodes
-    //****************************************************************
-    pObj = Aig_ManConst1( p );
-    pObj->pData = Aig_ManConst1( pNew );
-
-    //****************************************************************
-    // Step 3: create true PIs
-    //****************************************************************
-    Saig_ManForEachPi( p, pObj, i )
-    {
-        piCopied++;
-        pObj->pData = Aig_ObjCreatePi(pNew);
-        Vec_PtrPush( vecPis, pObj->pData );
-        nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
-        Vec_PtrPush( vecPiNames, nodeName );
-    }
-
-    //****************************************************************
-    // Step 4: create the special Pi corresponding to SAVE
-    //****************************************************************
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-        pObjSavePi = Aig_ObjCreatePi( pNew );
-        nodeName = "SAVE_BIERE",
-        Vec_PtrPush( vecPiNames, nodeName );
-    }
-        
-    //****************************************************************
-    // Step 5: create register outputs
-    //****************************************************************
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        loCopied++;
-        pObj->pData = Aig_ObjCreatePi(pNew);
-        Vec_PtrPush( vecLos, pObj->pData );
-        nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
-        Vec_PtrPush( vecLoNames, nodeName );
-    }
-
-    //****************************************************************
-    // Step 6: create "saved" register output
-    //****************************************************************
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-        loCreated++;
-        pObjSavedLo = Aig_ObjCreatePi( pNew );
-        Vec_PtrPush( vecLos, pObjSavedLo );
-        nodeName = "SAVED_LO";
-        Vec_PtrPush( vecLoNames, nodeName );
-    }
-
-    //****************************************************************
-    // Step 7: create the OR gate and the AND gate directly fed by "SAVE" Pi
-    //****************************************************************
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-        pObjSaveOrSaved = Aig_Or( pNew, pObjSavePi, pObjSavedLo );
-        pObjSaveAndNotSaved = Aig_And( pNew, pObjSavePi, Aig_Not(pObjSavedLo) );
-    }
-
-    //********************************************************************
-    // Step 8: create internal nodes
-    //********************************************************************
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-    }
-
-    
-    //********************************************************************
-    // Step 8.x : create PO for each safety assertions
-    // NOTE : Here the output is purposely inverted as it will be thrown to 
-    // dprove
-    //********************************************************************
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_LIVENESS_KEEP_SAFETY_MODE )
-    {
-        if( Vec_PtrSize( vAssertSafety ) != 0 && Vec_PtrSize( vAssumeSafety ) == 0 )
-        {
-            pObjAndAcc = Aig_ManConst1( pNew );
-            Vec_PtrForEachEntry( Aig_Obj_t *, vAssertSafety, pObj, i )
-            {
-                pArgument = Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) );
-                pObjAndAcc = Aig_And( pNew, pArgument, pObjAndAcc );
-            }
-            pObjOriginalSafetyPropertyOutput = Aig_ObjCreatePo( pNew, Aig_Not(pObjAndAcc) );
-        }
-        else if( Vec_PtrSize( vAssertSafety ) != 0 && Vec_PtrSize( vAssumeSafety ) != 0 )
-        {
-            pObjAndAcc = Aig_ManConst1( pNew );
-            Vec_PtrForEachEntry( Aig_Obj_t *, vAssertSafety, pObj, i )
-            {
-                pArgument = Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) );
-                pObjAndAcc = Aig_And( pNew, pArgument, pObjAndAcc );
-            }
-            collectiveAssertSafety = pObjAndAcc;
-
-            pObjAndAcc = Aig_ManConst1( pNew );
-            Vec_PtrForEachEntry( Aig_Obj_t *, vAssumeSafety, pObj, i )
-            {
-                pArgument = Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) );
-                pObjAndAcc = Aig_And( pNew, pArgument, pObjAndAcc );
-            }
-            collectiveAssumeSafety = pObjAndAcc;
-            pObjOriginalSafetyPropertyOutput = Aig_ObjCreatePo( pNew, Aig_And( pNew, Aig_Not(collectiveAssertSafety), collectiveAssumeSafety ) );
-        }
-        else
-        {
-            printf("WARNING!! No safety property is found, a new (negated) constant 1 output is created\n");
-            pObjOriginalSafetyPropertyOutput = Aig_ObjCreatePo( pNew, Aig_Not( Aig_ManConst1(pNew) ) );
-        }
-    }
-
-    //********************************************************************
-    // Step 9: create the safety property output gate for the liveness properties
-    // discuss with Sat/Alan for an alternative implementation
-    //********************************************************************
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-        pObjSafetyPropertyOutput = Aig_ObjCreatePo( pNew, (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData );
-    }
-
-    // create register inputs for the original registers
-    nRegCount = 0;
-    
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        pMatch = Saig_ObjLoToLi( p, pObj );
-        Aig_ObjCreatePo( pNew, Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin0(pMatch)->pData, Aig_ObjFaninC0( pMatch ) ) );
-        nRegCount++;
-        liCopied++;
-    }
-
-    // create register input corresponding to the register "saved"
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-        #ifndef DUPLICATE_CKT_DEBUG
-            pObjSavedLi = Aig_ObjCreatePo( pNew, pObjSaveOrSaved );
-            nRegCount++;
-            liCreated++;
-
-            //Changed on October 13, 2009
-            //pObjAndAcc = NULL;
-            pObjAndAcc = Aig_ManConst1( pNew );
-
-    // create the family of shadow registers, then create the cascade of Xnor and And gates for the comparator 
-            Saig_ManForEachLo( p, pObj, i )
-            {
-                pObjShadowLo = Aig_ObjCreatePi( pNew );
-
-                #ifdef PROPAGATE_NAMES
-                    Vec_PtrPush( vecLos, pObjShadowLo );
-                    nodeName = (char *)malloc( strlen( Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ) ) + 10 );
-                    sprintf( nodeName, "%s__%s", Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ), "SHADOW" );
-                    
-                    Vec_PtrPush( vecLoNames, nodeName );
-                #endif
-
-                pObjShadowLiDriver = Aig_Mux( pNew, pObjSaveAndNotSaved, (Aig_Obj_t *)pObj->pData, pObjShadowLo );
-                pObjShadowLi = Aig_ObjCreatePo( pNew, pObjShadowLiDriver );
-                nRegCount++;
-                loCreated++; liCreated++;
-        
-                pObjXor = Aig_Exor( pNew, (Aig_Obj_t *)pObj->pData, pObjShadowLo );
-                pObjXnor = Aig_Not( pObjXor );
-                
-                pObjAndAcc = Aig_And( pNew, pObjXnor, pObjAndAcc );
-            }
-
-            // create the AND gate whose output will be the signal "looped"
-            pObjSavedLoAndEquality = Aig_And( pNew, pObjSavedLo, pObjAndAcc );
-
-            // create the master AND gate and corresponding AND and OR logic for the liveness properties
-            pObjAndAcc = Aig_ManConst1( pNew );
-            if( vLive == NULL || Vec_PtrSize( vLive ) == 0 )
-            {
-                printf("Circuit without any liveness property\n");
-            }
-            else
-            {
-                Vec_PtrForEachEntry( Aig_Obj_t *, vLive, pObj, i )
-                {
-                    liveLatch++;
-                    pDriverImage = Aig_NotCond((Aig_Obj_t *)Aig_Regular(Aig_ObjChild0( pObj ))->pData, Aig_ObjFaninC0(pObj));
-                    pObjShadowLo = Aig_ObjCreatePi( pNew );
-
-                    #ifdef PROPAGATE_NAMES
-                        Vec_PtrPush( vecLos, pObjShadowLo );
-                        nodeName = (char *)malloc( strlen( Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ) ) + 12 );
-                        sprintf( nodeName, "%s__%s", Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ), "LIVENESS" );
-                        Vec_PtrPush( vecLoNames, nodeName );
-                    #endif
-
-                    pObjShadowLiDriver = Aig_Or( pNew, pObjShadowLo, Aig_And( pNew, pDriverImage, pObjSaveOrSaved ) );
-                    pObjShadowLi = Aig_ObjCreatePo( pNew, pObjShadowLiDriver );
-                    nRegCount++;
-                    loCreated++; liCreated++;
-            
-                    pObjAndAcc = Aig_And( pNew, pObjShadowLo, pObjAndAcc );
-                }
-            }
-
-            pObjLive = pObjAndAcc;
-                
-            pObjAndAcc = Aig_ManConst1( pNew );
-            if( vFair == NULL || Vec_PtrSize( vFair ) == 0 )
-                printf("Circuit without any fairness property\n");
-            else
-            {
-                Vec_PtrForEachEntry( Aig_Obj_t *, vFair, pObj, i )
-                {
-                    fairLatch++;
-                    pDriverImage = Aig_NotCond((Aig_Obj_t *)Aig_Regular(Aig_ObjChild0( pObj ))->pData, Aig_ObjFaninC0(pObj));
-                    pObjShadowLo = Aig_ObjCreatePi( pNew );
-
-                    #ifdef PROPAGATE_NAMES
-                        Vec_PtrPush( vecLos, pObjShadowLo );
-                        nodeName = (char *)malloc( strlen( Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ) ) + 12 );
-                        sprintf( nodeName, "%s__%s", Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ), "FAIRNESS" );
-                        Vec_PtrPush( vecLoNames, nodeName );
-                    #endif
-
-                    pObjShadowLiDriver = Aig_Or( pNew, pObjShadowLo, Aig_And( pNew, pDriverImage, pObjSaveOrSaved ) );
-                    pObjShadowLi = Aig_ObjCreatePo( pNew, pObjShadowLiDriver );
-                    nRegCount++;
-                    loCreated++; liCreated++;
-            
-                    pObjAndAcc = Aig_And( pNew, pObjShadowLo, pObjAndAcc );
-                }
-            }
-
-            pObjFair = pObjAndAcc;
-                
-            //pObjSafetyGate = Aig_Exor( pNew, Aig_Not(Aig_ManConst1( pNew )), Aig_And( pNew, pObjSavedLoAndEquality, Aig_And( pNew, pObjFair, Aig_Not( pObjLive ) ) ) );
-            //Following is the actual Biere translation
-            pObjSafetyGate = Aig_And( pNew, pObjSavedLoAndEquality, Aig_And( pNew, pObjFair, Aig_Not( pObjLive ) ) );
-
-            Aig_ObjPatchFanin0( pNew, pObjSafetyPropertyOutput, pObjSafetyGate );
-        #endif
-    }
-
-    Aig_ManSetRegNum( pNew, nRegCount );
-
-    Aig_ManPiCleanupBiere( pNew );
-    Aig_ManPoCleanupBiere( pNew );
-    
-    Aig_ManCleanup( pNew );
-    
-    assert( Aig_ManCheck( pNew ) );
-    
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-            assert((Aig_Obj_t *)Vec_PtrEntry(pNew->vPos, Saig_ManPoNum(pNew)+Aig_ObjPioNum(pObjSavedLo)-Saig_ManPiNum(p)-1) == pObjSavedLi);
-            assert( Saig_ManPiNum( p ) + 1 == Saig_ManPiNum( pNew ) );
-            assert( Saig_ManRegNum( pNew ) == Saig_ManRegNum( p ) * 2 + 1 + liveLatch + fairLatch );
-    }
-
-    return pNew;
-}
-
-
-
-
-
-Aig_Man_t * LivenessToSafetyTransformationAbs( int mode, Abc_Ntk_t * pNtk, Aig_Man_t * p, Vec_Int_t *vFlops, 
-                                           Vec_Ptr_t *vLive, Vec_Ptr_t *vFair, Vec_Ptr_t *vAssertSafety, Vec_Ptr_t *vAssumeSafety )
-{
-    Aig_Man_t * pNew;
-    int i, nRegCount, iEntry;
-    Aig_Obj_t * pObjSavePi;
-    Aig_Obj_t *pObjSavedLo, *pObjSavedLi;
-    Aig_Obj_t *pObj, *pMatch;
-    Aig_Obj_t *pObjSaveOrSaved, *pObjSaveAndNotSaved, *pObjSavedLoAndEquality;
-    Aig_Obj_t *pObjShadowLo, *pObjShadowLi, *pObjShadowLiDriver;
-    Aig_Obj_t *pObjXor, *pObjXnor, *pObjAndAcc;
-    Aig_Obj_t *pObjLive, *pObjFair, *pObjSafetyGate;
-    Aig_Obj_t *pObjSafetyPropertyOutput;
-    Aig_Obj_t *pDriverImage, *pArgument, *collectiveAssertSafety, *collectiveAssumeSafety;
-    char *nodeName;
-    int piCopied = 0, liCopied = 0, loCopied = 0, liCreated = 0, loCreated = 0, piVecIndex = 0, liveLatch = 0, fairLatch = 0;
-    
-    vecPis = Vec_PtrAlloc( Saig_ManPiNum( p ) + 1);
-    vecPiNames = Vec_PtrAlloc( Saig_ManPiNum( p ) + 1);
-
-    vecLos = Vec_PtrAlloc( Saig_ManRegNum( p ) + Vec_IntSize( vFlops ) + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) );
-    vecLoNames = Vec_PtrAlloc( Saig_ManRegNum( p ) + Vec_IntSize( vFlops ) + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) );
-
-    //****************************************************************
-    // Step1: create the new manager
-    // Note: The new manager is created with "2 * Aig_ManObjNumMax(p)"
-    // nodes, but this selection is arbitrary - need to be justified
-    //****************************************************************
-    pNew = Aig_ManStart( 2 * Aig_ManObjNumMax(p) );
-    pNew->pName = (char *)malloc( strlen( pNtk->pName ) + strlen("_l2s") + 1 );
-    sprintf(pNew->pName, "%s_%s", pNtk->pName, "l2s");
-    pNew->pSpec = NULL;
-    
-    //****************************************************************
-    // Step 2: map constant nodes
-    //****************************************************************
-    pObj = Aig_ManConst1( p );
-    pObj->pData = Aig_ManConst1( pNew );
-
-    //****************************************************************
-    // Step 3: create true PIs
-    //****************************************************************
-    Saig_ManForEachPi( p, pObj, i )
-    {
-        piCopied++;
-        pObj->pData = Aig_ObjCreatePi(pNew);
-        Vec_PtrPush( vecPis, pObj->pData );
-        nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
-        Vec_PtrPush( vecPiNames, nodeName );
-    }
-
-    //****************************************************************
-    // Step 4: create the special Pi corresponding to SAVE
-    //****************************************************************
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-        pObjSavePi = Aig_ObjCreatePi( pNew );
-        nodeName = "SAVE_BIERE",
-        Vec_PtrPush( vecPiNames, nodeName );
-    }
-        
-    //****************************************************************
-    // Step 5: create register outputs
-    //****************************************************************
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        loCopied++;
-        pObj->pData = Aig_ObjCreatePi(pNew);
-        Vec_PtrPush( vecLos, pObj->pData );
-        nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
-        Vec_PtrPush( vecLoNames, nodeName );
-    }
-
-    //****************************************************************
-    // Step 6: create "saved" register output
-    //****************************************************************
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-        loCreated++;
-        pObjSavedLo = Aig_ObjCreatePi( pNew );
-        Vec_PtrPush( vecLos, pObjSavedLo );
-        nodeName = "SAVED_LO";
-        Vec_PtrPush( vecLoNames, nodeName );
-    }
-
-    //****************************************************************
-    // Step 7: create the OR gate and the AND gate directly fed by "SAVE" Pi
-    //****************************************************************
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-        pObjSaveOrSaved = Aig_Or( pNew, pObjSavePi, pObjSavedLo );
-        pObjSaveAndNotSaved = Aig_And( pNew, pObjSavePi, Aig_Not(pObjSavedLo) );
-    }
-
-    //********************************************************************
-    // Step 8: create internal nodes
-    //********************************************************************
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-    }
-
-    
-    //********************************************************************
-    // Step 8.x : create PO for each safety assertions
-    // NOTE : Here the output is purposely inverted as it will be thrown to 
-    // dprove
-    //********************************************************************
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_LIVENESS_KEEP_SAFETY_MODE )
-    {
-        if( Vec_PtrSize( vAssertSafety ) != 0 && Vec_PtrSize( vAssumeSafety ) == 0 )
-        {
-            pObjAndAcc = Aig_ManConst1( pNew );
-            Vec_PtrForEachEntry( Aig_Obj_t *, vAssertSafety, pObj, i )
-            {
-                pArgument = Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) );
-                pObjAndAcc = Aig_And( pNew, pArgument, pObjAndAcc );
-            }
-            Aig_ObjCreatePo( pNew, Aig_Not(pObjAndAcc) );
-        }
-        else if( Vec_PtrSize( vAssertSafety ) != 0 && Vec_PtrSize( vAssumeSafety ) != 0 )
-        {
-            pObjAndAcc = Aig_ManConst1( pNew );
-            Vec_PtrForEachEntry( Aig_Obj_t *, vAssertSafety, pObj, i )
-            {
-                pArgument = Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) );
-                pObjAndAcc = Aig_And( pNew, pArgument, pObjAndAcc );
-            }
-            collectiveAssertSafety = pObjAndAcc;
-
-            pObjAndAcc = Aig_ManConst1( pNew );
-            Vec_PtrForEachEntry( Aig_Obj_t *, vAssumeSafety, pObj, i )
-            {
-                pArgument = Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) );
-                pObjAndAcc = Aig_And( pNew, pArgument, pObjAndAcc );
-            }
-            collectiveAssumeSafety = pObjAndAcc;
-            Aig_ObjCreatePo( pNew, Aig_And( pNew, Aig_Not(collectiveAssertSafety), collectiveAssumeSafety ) );
-        }
-        else
-        {
-            printf("WARNING!! No safety property is found, a new (negated) constant 1 output is created\n");
-            Aig_ObjCreatePo( pNew, Aig_Not( Aig_ManConst1(pNew) ) );
-        }
-    }
-
-    //********************************************************************
-    // Step 9: create the safety property output gate for the liveness properties
-    // discuss with Sat/Alan for an alternative implementation
-    //********************************************************************
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-        pObjSafetyPropertyOutput = Aig_ObjCreatePo( pNew, (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData );
-    }
-
-    // create register inputs for the original registers
-    nRegCount = 0;
-    
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        pMatch = Saig_ObjLoToLi( p, pObj );
-        Aig_ObjCreatePo( pNew, Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin0(pMatch)->pData, Aig_ObjFaninC0( pMatch ) ) );
-        nRegCount++;
-        liCopied++;
-    }
-
-    // create register input corresponding to the register "saved"
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-        #ifndef DUPLICATE_CKT_DEBUG
-            pObjSavedLi = Aig_ObjCreatePo( pNew, pObjSaveOrSaved );
-            nRegCount++;
-            liCreated++;
-
-            //Changed on October 13, 2009
-            //pObjAndAcc = NULL;
-            pObjAndAcc = Aig_ManConst1( pNew );
-
-    // create the family of shadow registers, then create the cascade of Xnor and And gates for the comparator 
-            //Saig_ManForEachLo( p, pObj, i )
-            Saig_ManForEachLo( p, pObj, i )
-            {
-                printf("Flop[%d] = %s\n", i, Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ) );
-            }
-            Vec_IntForEachEntry( vFlops, iEntry, i )
-            {
-                pObjShadowLo = Aig_ObjCreatePi( pNew );
-                pObj = Aig_ManLo( p, iEntry );
-
-                #ifdef PROPAGATE_NAMES
-                    Vec_PtrPush( vecLos, pObjShadowLo );
-                    nodeName = (char *)malloc( strlen( Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + iEntry ) ) ) + 10 );
-                    sprintf( nodeName, "%s__%s", Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + iEntry ) ), "SHADOW" );
-                    printf("Flop copied [%d] = %s\n", iEntry, nodeName );
-                    Vec_PtrPush( vecLoNames, nodeName );
-                #endif
-
-                pObjShadowLiDriver = Aig_Mux( pNew, pObjSaveAndNotSaved, (Aig_Obj_t *)pObj->pData, pObjShadowLo );
-                pObjShadowLi = Aig_ObjCreatePo( pNew, pObjShadowLiDriver );
-                nRegCount++;
-                loCreated++; liCreated++;
-        
-                pObjXor = Aig_Exor( pNew, (Aig_Obj_t *)pObj->pData, pObjShadowLo );
-                pObjXnor = Aig_Not( pObjXor );
-                
-                pObjAndAcc = Aig_And( pNew, pObjXnor, pObjAndAcc );
-            }
-
-            // create the AND gate whose output will be the signal "looped"
-            pObjSavedLoAndEquality = Aig_And( pNew, pObjSavedLo, pObjAndAcc );
-
-            // create the master AND gate and corresponding AND and OR logic for the liveness properties
-            pObjAndAcc = Aig_ManConst1( pNew );
-            if( vLive == NULL || Vec_PtrSize( vLive ) == 0 )
-            {
-                printf("Circuit without any liveness property\n");
-            }
-            else
-            {
-                Vec_PtrForEachEntry( Aig_Obj_t *, vLive, pObj, i )
-                {
-                    liveLatch++;
-                    pDriverImage = Aig_NotCond((Aig_Obj_t *)Aig_Regular(Aig_ObjChild0( pObj ))->pData, Aig_ObjFaninC0(pObj));
-                    pObjShadowLo = Aig_ObjCreatePi( pNew );
-
-                    #ifdef PROPAGATE_NAMES
-                        Vec_PtrPush( vecLos, pObjShadowLo );
-                        nodeName = (char *)malloc( strlen( Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ) ) + 12 );
-                        sprintf( nodeName, "%s__%s", Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ), "LIVENESS" );
-                        Vec_PtrPush( vecLoNames, nodeName );
-                    #endif
-
-                    pObjShadowLiDriver = Aig_Or( pNew, pObjShadowLo, Aig_And( pNew, pDriverImage, pObjSaveOrSaved ) );
-                    pObjShadowLi = Aig_ObjCreatePo( pNew, pObjShadowLiDriver );
-                    nRegCount++;
-                    loCreated++; liCreated++;
-            
-                    pObjAndAcc = Aig_And( pNew, pObjShadowLo, pObjAndAcc );
-                }
-            }
-
-            pObjLive = pObjAndAcc;
-                
-            pObjAndAcc = Aig_ManConst1( pNew );
-            if( vFair == NULL || Vec_PtrSize( vFair ) == 0 )
-                printf("Circuit without any fairness property\n");
-            else
-            {
-                Vec_PtrForEachEntry( Aig_Obj_t *, vFair, pObj, i )
-                {
-                    fairLatch++;
-                    pDriverImage = Aig_NotCond((Aig_Obj_t *)Aig_Regular(Aig_ObjChild0( pObj ))->pData, Aig_ObjFaninC0(pObj));
-                    pObjShadowLo = Aig_ObjCreatePi( pNew );
-
-                    #ifdef PROPAGATE_NAMES
-                        Vec_PtrPush( vecLos, pObjShadowLo );
-                        nodeName = (char *)malloc( strlen( Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ) ) + 12 );
-                        sprintf( nodeName, "%s__%s", Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ), "FAIRNESS" );
-                        Vec_PtrPush( vecLoNames, nodeName );
-                    #endif
-
-                    pObjShadowLiDriver = Aig_Or( pNew, pObjShadowLo, Aig_And( pNew, pDriverImage, pObjSaveOrSaved ) );
-                    pObjShadowLi = Aig_ObjCreatePo( pNew, pObjShadowLiDriver );
-                    nRegCount++;
-                    loCreated++; liCreated++;
-            
-                    pObjAndAcc = Aig_And( pNew, pObjShadowLo, pObjAndAcc );
-                }
-            }
-
-            pObjFair = pObjAndAcc;
-                
-            //pObjSafetyGate = Aig_Exor( pNew, Aig_Not(Aig_ManConst1( pNew )), Aig_And( pNew, pObjSavedLoAndEquality, Aig_And( pNew, pObjFair, Aig_Not( pObjLive ) ) ) );
-            //Following is the actual Biere translation
-            pObjSafetyGate = Aig_And( pNew, pObjSavedLoAndEquality, Aig_And( pNew, pObjFair, Aig_Not( pObjLive ) ) );
-
-            Aig_ObjPatchFanin0( pNew, pObjSafetyPropertyOutput, pObjSafetyGate );
-        #endif
-    }
-
-    Aig_ManSetRegNum( pNew, nRegCount );
-
-    Aig_ManPiCleanupBiere( pNew );
-    Aig_ManPoCleanupBiere( pNew );
-    
-    Aig_ManCleanup( pNew );
-    
-    assert( Aig_ManCheck( pNew ) );
-    
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-            assert((Aig_Obj_t *)Vec_PtrEntry(pNew->vPos, Saig_ManPoNum(pNew)+Aig_ObjPioNum(pObjSavedLo)-Saig_ManPiNum(p)-1) == pObjSavedLi);
-            assert( Saig_ManPiNum( p ) + 1 == Saig_ManPiNum( pNew ) );
-            assert( Saig_ManRegNum( pNew ) == Saig_ManRegNum( p ) + Vec_IntSize( vFlops ) + 1 + liveLatch + fairLatch );
-    }
-
-    return pNew;
-}
-
-
-
-Aig_Man_t * LivenessToSafetyTransformationOneStepLoop( int mode, Abc_Ntk_t * pNtk, Aig_Man_t * p, 
-                                                      Vec_Ptr_t *vLive, Vec_Ptr_t *vFair, Vec_Ptr_t *vAssertSafety, Vec_Ptr_t *vAssumeSafety )
-{
-    Aig_Man_t * pNew;
-    int i, nRegCount;
-    Aig_Obj_t * pObjSavePi;
-    Aig_Obj_t *pObj, *pMatch;
-    Aig_Obj_t *pObjSavedLoAndEquality;
-    Aig_Obj_t *pObjXor, *pObjXnor, *pObjAndAcc, *pObjAndAccDummy;
-    Aig_Obj_t *pObjLive, *pObjFair, *pObjSafetyGate;
-    Aig_Obj_t *pObjSafetyPropertyOutput;
-    Aig_Obj_t *pDriverImage;
-    Aig_Obj_t *pObjCorrespondingLi;
-    Aig_Obj_t *pArgument;
-    Aig_Obj_t *collectiveAssertSafety, *collectiveAssumeSafety;
-
-    char *nodeName;
-    int piCopied = 0, liCopied = 0, loCopied = 0, liCreated = 0, loCreated = 0, piVecIndex = 0;
-
-    if( Aig_ManRegNum( p ) == 0 )
-    {
-        printf("The input AIG contains no register, returning the original AIG as it is\n");
-        return p;
-    }
-
-    vecPis = Vec_PtrAlloc( Saig_ManPiNum( p ) + 1);
-    vecPiNames = Vec_PtrAlloc( Saig_ManPiNum( p ) + 1);
-
-    vecLos = Vec_PtrAlloc( Saig_ManRegNum( p )*2 + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) );
-    vecLoNames = Vec_PtrAlloc( Saig_ManRegNum( p )*2 + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) );
-
-    //****************************************************************
-    // Step1: create the new manager
-    // Note: The new manager is created with "2 * Aig_ManObjNumMax(p)"
-    // nodes, but this selection is arbitrary - need to be justified
-    //****************************************************************
-    pNew = Aig_ManStart( 2 * Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( "live2safe" );
-    pNew->pSpec = NULL;
-    
-    //****************************************************************
-    // Step 2: map constant nodes
-    //****************************************************************
-    pObj = Aig_ManConst1( p );
-    pObj->pData = Aig_ManConst1( pNew );
-
-    //****************************************************************
-    // Step 3: create true PIs
-    //****************************************************************
-    Saig_ManForEachPi( p, pObj, i )
-    {
-        piCopied++;
-        pObj->pData = Aig_ObjCreatePi(pNew);
-        Vec_PtrPush( vecPis, pObj->pData );
-        nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
-        Vec_PtrPush( vecPiNames, nodeName );
-    }
-
-    //****************************************************************
-    // Step 4: create the special Pi corresponding to SAVE
-    //****************************************************************
-    if( mode == FULL_BIERE_ONE_LOOP_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE )
-    {
-        pObjSavePi = Aig_ObjCreatePi( pNew );
-        nodeName = "SAVE_BIERE",
-        Vec_PtrPush( vecPiNames, nodeName );
-    }
-            
-    //****************************************************************
-    // Step 5: create register outputs
-    //****************************************************************
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        loCopied++;
-        pObj->pData = Aig_ObjCreatePi(pNew);
-        Vec_PtrPush( vecLos, pObj->pData );
-        nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
-        Vec_PtrPush( vecLoNames, nodeName );
-    }
-
-    //****************************************************************
-    // Step 6: create "saved" register output
-    //****************************************************************
-
-#if 0
-    loCreated++;
-    pObjSavedLo = Aig_ObjCreatePi( pNew );
-    Vec_PtrPush( vecLos, pObjSavedLo );
-    nodeName = "SAVED_LO";
-    Vec_PtrPush( vecLoNames, nodeName );
-#endif
-
-    //****************************************************************
-    // Step 7: create the OR gate and the AND gate directly fed by "SAVE" Pi
-    //****************************************************************
-#if 0
-    pObjSaveOrSaved = Aig_Or( pNew, pObjSavePi, pObjSavedLo );
-    pObjSaveAndNotSaved = Aig_And( pNew, pObjSavePi, Aig_Not(pObjSavedLo) );
-#endif
-
-    //********************************************************************
-    // Step 8: create internal nodes
-    //********************************************************************
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-    }
-
-#if 0
-    //********************************************************************
-    // Step 8.x : create PO for each safety assertions
-    //********************************************************************
-    Vec_PtrForEachEntry( Aig_Obj_t *, vAssertSafety, pObj, i )
-    {
-        pObj->pData = Aig_ObjCreatePo( pNew, Aig_NotCond(Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) ) );
-    }
-#endif
-
-    if( mode == FULL_BIERE_ONE_LOOP_MODE || mode == IGNORE_LIVENESS_KEEP_SAFETY_MODE )
-    {
-        if( Vec_PtrSize( vAssertSafety ) != 0 && Vec_PtrSize( vAssumeSafety ) == 0 )
-        {
-            pObjAndAcc = NULL;
-            Vec_PtrForEachEntry( Aig_Obj_t *, vAssertSafety, pObj, i )
-            {
-                //pObj->pData = Aig_ObjCreatePo( pNew, Aig_NotCond(Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) ) );
-                pArgument = Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) );
-                if( pObjAndAcc == NULL )
-                    pObjAndAcc = pArgument;
-                else
-                {
-                    pObjAndAccDummy = pObjAndAcc;
-                    pObjAndAcc = Aig_And( pNew, pArgument, pObjAndAccDummy );
-                }
-            }
-            Aig_ObjCreatePo( pNew, Aig_Not(pObjAndAcc) );
-        }
-        else if( Vec_PtrSize( vAssertSafety ) != 0 && Vec_PtrSize( vAssumeSafety ) != 0 )
-        {
-            pObjAndAcc = NULL;
-            Vec_PtrForEachEntry( Aig_Obj_t *, vAssertSafety, pObj, i )
-            {
-                //pObj->pData = Aig_ObjCreatePo( pNew, Aig_NotCond(Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) ) );
-                pArgument = Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) );
-                if( pObjAndAcc == NULL )
-                    pObjAndAcc = pArgument;
-                else
-                {
-                    pObjAndAccDummy = pObjAndAcc;
-                    pObjAndAcc = Aig_And( pNew, pArgument, pObjAndAccDummy );
-                }
-            }
-            collectiveAssertSafety = pObjAndAcc;
-            pObjAndAcc = NULL;
-            Vec_PtrForEachEntry( Aig_Obj_t *, vAssumeSafety, pObj, i )
-            {
-                //pObj->pData = Aig_ObjCreatePo( pNew, Aig_NotCond(Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) ) );
-                pArgument = Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) );
-                if( pObjAndAcc == NULL )
-                    pObjAndAcc = pArgument;
-                else
-                {
-                    pObjAndAccDummy = pObjAndAcc;
-                    pObjAndAcc = Aig_And( pNew, pArgument, pObjAndAccDummy );
-                }
-            }
-            collectiveAssumeSafety = pObjAndAcc;
-            Aig_ObjCreatePo( pNew, Aig_And( pNew, Aig_Not(collectiveAssertSafety), collectiveAssumeSafety ) );
-        }
-        else
-            printf("No safety property is specified, hence no safety gate is created\n");
-    }
-
-    //********************************************************************
-    // Step 9: create the safety property output gate
-    // create the safety property output gate, this will be the sole true PO 
-    // of the whole circuit, discuss with Sat/Alan for an alternative implementation
-    //********************************************************************
-
-    if( mode == FULL_BIERE_ONE_LOOP_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE )
-    {
-        pObjSafetyPropertyOutput = Aig_ObjCreatePo( pNew, (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData );
-    }
-
-    // create register inputs for the original registers
-    nRegCount = 0;
-    
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        pMatch = Saig_ObjLoToLi( p, pObj );
-        //Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pMatch) );
-        Aig_ObjCreatePo( pNew, Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin0(pMatch)->pData, Aig_ObjFaninC0( pMatch ) ) );
-        nRegCount++;
-        liCopied++;
-    }
-
-#if 0
-    // create register input corresponding to the register "saved"
-    pObjSavedLi = Aig_ObjCreatePo( pNew, pObjSaveOrSaved );
-    nRegCount++;
-    liCreated++;7
-#endif
-
-    pObjAndAcc = NULL;
-
-    //****************************************************************************************************
-    //For detection of loop of length 1 we do not need any shadow register, we only need equality detector
-    //between Lo_j and Li_j and then a cascade of AND gates
-    //****************************************************************************************************
-
-    if( mode == FULL_BIERE_ONE_LOOP_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE )
-    {
-        Saig_ManForEachLo( p, pObj, i )
-        {
-            pObjCorrespondingLi = Saig_ObjLoToLi( p, pObj );
-        
-            pObjXor = Aig_Exor( pNew, (Aig_Obj_t *)pObj->pData,  Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0( pObjCorrespondingLi )->pData, Aig_ObjFaninC0( pObjCorrespondingLi ) ) );
-            pObjXnor = Aig_Not( pObjXor );
-        
-            if( pObjAndAcc == NULL )
-                pObjAndAcc = pObjXnor;
-            else
-            {
-                pObjAndAccDummy = pObjAndAcc;
-                pObjAndAcc = Aig_And( pNew, pObjXnor, pObjAndAccDummy );
-            }
-        }
-
-        // create the AND gate whose output will be the signal "looped"
-        pObjSavedLoAndEquality = Aig_And( pNew, pObjSavePi, pObjAndAcc );
-    
-        // create the master AND gate and corresponding AND and OR logic for the liveness properties
-        pObjAndAcc = NULL;
-        if( vLive == NULL || Vec_PtrSize( vLive ) == 0 )
-            printf("Circuit without any liveness property\n");
-        else
-        {
-            Vec_PtrForEachEntry( Aig_Obj_t *, vLive, pObj, i )
-            {
-                pDriverImage = Aig_NotCond((Aig_Obj_t *)Aig_Regular(Aig_ObjChild0( pObj ))->pData, Aig_ObjFaninC0(pObj));
-                if( pObjAndAcc == NULL )
-                    pObjAndAcc = pDriverImage;
-                else
-                {
-                    pObjAndAccDummy = pObjAndAcc;
-                    pObjAndAcc = Aig_And( pNew, pDriverImage, pObjAndAccDummy );
-                }
-            }
-        }
-
-        if( pObjAndAcc != NULL )
-            pObjLive = pObjAndAcc;
-        else
-            pObjLive = Aig_ManConst1( pNew );
-    
-        // create the master AND gate and corresponding AND and OR logic for the fairness properties
-        pObjAndAcc = NULL;
-        if( vFair == NULL || Vec_PtrSize( vFair ) == 0 )
-            printf("Circuit without any fairness property\n");
-        else
-        {
-            Vec_PtrForEachEntry( Aig_Obj_t *, vFair, pObj, i )
-            {
-                pDriverImage = Aig_NotCond((Aig_Obj_t *)Aig_Regular(Aig_ObjChild0( pObj ))->pData, Aig_ObjFaninC0(pObj));
-                if( pObjAndAcc == NULL )
-                    pObjAndAcc = pDriverImage;
-                else
-                {
-                    pObjAndAccDummy = pObjAndAcc;
-                    pObjAndAcc = Aig_And( pNew, pDriverImage, pObjAndAccDummy );
-                }
-            }
-        }
-
-        if( pObjAndAcc != NULL )
-            pObjFair = pObjAndAcc;
-        else
-            pObjFair = Aig_ManConst1( pNew );
-    
-        pObjSafetyGate = Aig_And( pNew, pObjSavedLoAndEquality, Aig_And( pNew, pObjFair, Aig_Not( pObjLive ) ) );
-    
-        Aig_ObjPatchFanin0( pNew, pObjSafetyPropertyOutput, pObjSafetyGate );
-    }
-
-    Aig_ManSetRegNum( pNew, nRegCount );
-
-    //printf("\nSaig_ManPiNum = %d, Reg Num = %d, before everything, before Pi cleanup\n", Vec_PtrSize( pNew->vPis ), pNew->nRegs );
-
-    Aig_ManPiCleanupBiere( pNew );
-    Aig_ManPoCleanupBiere( pNew );
-
-    Aig_ManCleanup( pNew );
-    
-    assert( Aig_ManCheck( pNew ) );
-    
-    return pNew;
-}
-
-
-
-Vec_Ptr_t * populateLivenessVector( Abc_Ntk_t *pNtk, Aig_Man_t *pAig )
-{
-    Abc_Obj_t * pNode;
-    int i, liveCounter = 0;
-    Vec_Ptr_t * vLive;
-
-    vLive = Vec_PtrAlloc( 100 );
-    Abc_NtkForEachPo( pNtk, pNode, i )
-        //if( strstr( Abc_ObjName( pNode ), "assert_fair") != NULL )
-        if( nodeName_starts_with( pNode, "assert_fair" ) )
-        {
-            Vec_PtrPush( vLive, Aig_ManPo( pAig, i ) );
-            liveCounter++;
-        }
-    printf("Number of liveness property found = %d\n", liveCounter);
-    return vLive;
-}
-
-Vec_Ptr_t * populateFairnessVector( Abc_Ntk_t *pNtk, Aig_Man_t *pAig )
-{
-    Abc_Obj_t * pNode;
-    int i, fairCounter = 0;
-    Vec_Ptr_t * vFair;
-
-    vFair = Vec_PtrAlloc( 100 );
-    Abc_NtkForEachPo( pNtk, pNode, i )
-        //if( strstr( Abc_ObjName( pNode ), "assume_fair") != NULL )
-        if( nodeName_starts_with( pNode, "assume_fair" ) )
-        {
-            Vec_PtrPush( vFair, Aig_ManPo( pAig, i ) );
-            fairCounter++;
-        }
-    printf("Number of fairness property found = %d\n", fairCounter);
-    return vFair;
-}
-
-Vec_Ptr_t * populateSafetyAssertionVector( Abc_Ntk_t *pNtk, Aig_Man_t *pAig )
-{
-    Abc_Obj_t * pNode;
-    int i, assertSafetyCounter = 0;
-    Vec_Ptr_t * vAssertSafety;
-
-    vAssertSafety = Vec_PtrAlloc( 100 );
-    Abc_NtkForEachPo( pNtk, pNode, i )
-        //if( strstr( Abc_ObjName( pNode ), "Assert") != NULL )
-        if( nodeName_starts_with( pNode, "assert_safety" ) || nodeName_starts_with( pNode, "Assert" ))
-        {
-            Vec_PtrPush( vAssertSafety, Aig_ManPo( pAig, i ) );
-            assertSafetyCounter++;
-        }
-    printf("Number of safety property found = %d\n", assertSafetyCounter);
-    return vAssertSafety;
-}
-
-Vec_Ptr_t * populateSafetyAssumptionVector( Abc_Ntk_t *pNtk, Aig_Man_t *pAig )
-{
-    Abc_Obj_t * pNode;
-    int i, assumeSafetyCounter = 0;
-    Vec_Ptr_t * vAssumeSafety;
-
-    vAssumeSafety = Vec_PtrAlloc( 100 );
-    Abc_NtkForEachPo( pNtk, pNode, i )
-        //if( strstr( Abc_ObjName( pNode ), "Assert") != NULL )
-        if( nodeName_starts_with( pNode, "assume_safety" ) || nodeName_starts_with( pNode, "Assume" ))
-        {
-            Vec_PtrPush( vAssumeSafety, Aig_ManPo( pAig, i ) );
-            assumeSafetyCounter++;
-        }
-    printf("Number of assume_safety property found = %d\n", assumeSafetyCounter);
-    return vAssumeSafety;
-}
-
-void updateNewNetworkNameManager( Abc_Ntk_t *pNtk, Aig_Man_t *pAig, Vec_Ptr_t *vPiNames, Vec_Ptr_t *vLoNames )
-{
-    Aig_Obj_t *pObj;
-    Abc_Obj_t *pNode;
-    int i, ntkObjId;
-
-    pNtk->pManName = Nm_ManCreate( Abc_NtkCiNum( pNtk ) );
-
-    if( vPiNames )
-    {
-        Saig_ManForEachPi( pAig, pObj, i )
-        {
-            ntkObjId = Abc_NtkCi( pNtk, i )->Id;
-            //printf("Pi %d, Saved Name = %s, id = %d\n", i, Nm_ManStoreIdName( pNtk->pManName, ntkObjId, Aig_ObjType(pObj), Vec_PtrEntry(vPiNames, i), NULL ), ntkObjId);  
-            Nm_ManStoreIdName( pNtk->pManName, ntkObjId, Aig_ObjType(pObj), (char *)Vec_PtrEntry(vPiNames, i), NULL );
-        }
-    }
-    if( vLoNames )
-    {
-        Saig_ManForEachLo( pAig, pObj, i )
-        {
-            ntkObjId = Abc_NtkCi( pNtk, Saig_ManPiNum( pAig ) + i )->Id;
-            //printf("Lo %d, Saved name = %s, id = %d\n", i, Nm_ManStoreIdName( pNtk->pManName, ntkObjId, Aig_ObjType(pObj), Vec_PtrEntry(vLoNames, i), NULL ), ntkObjId);  
-            Nm_ManStoreIdName( pNtk->pManName, ntkObjId, Aig_ObjType(pObj), (char *)Vec_PtrEntry(vLoNames, i), NULL );
-        }
-    }
-
-    Abc_NtkForEachPo(pNtk, pNode, i)
-    {
-        Abc_ObjAssignName(pNode, "assert_safety_", Abc_ObjName(pNode) );
-    }
-
-    // assign latch input names
-    Abc_NtkForEachLatch(pNtk, pNode, i)
-        if ( Nm_ManFindNameById(pNtk->pManName, Abc_ObjFanin0(pNode)->Id) == NULL )
-            Abc_ObjAssignName( Abc_ObjFanin0(pNode), Abc_ObjName(Abc_ObjFanin0(pNode)), NULL );
-}
-
-
-int Abc_CommandAbcLivenessToSafety( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
-    FILE * pOut, * pErr;
-    Abc_Ntk_t * pNtk, * pNtkTemp, *pNtkNew, *pNtkOld;
-    Aig_Man_t * pAig, *pAigNew;
-    int c;
-    Vec_Ptr_t * vLive, * vFair, *vAssertSafety, *vAssumeSafety;
-    int directive = -1;
-                
-    pNtk = Abc_FrameReadNtk(pAbc);
-    pOut = Abc_FrameReadOut(pAbc);
-    pErr = Abc_FrameReadErr(pAbc);
-
-    if( argc == 1 )
-    {
-        assert( directive == -1 );
-        directive = FULL_BIERE_MODE;
-    }
-    else
-    {
-        Extra_UtilGetoptReset();
-        while ( ( c = Extra_UtilGetopt( argc, argv, "1slh" ) ) != EOF )
-        {
-            switch( c )
-            {
-            case '1': 
-                if( directive == -1 )
-                    directive = FULL_BIERE_ONE_LOOP_MODE;
-                else
-                {
-                    assert( directive == IGNORE_LIVENESS_KEEP_SAFETY_MODE || directive == IGNORE_SAFETY_KEEP_LIVENESS_MODE );
-                    if( directive == IGNORE_LIVENESS_KEEP_SAFETY_MODE )
-                        directive = IGNORE_LIVENESS_KEEP_SAFETY_MODE;
-                    else
-                        directive = IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE;
-                }
-                break;
-            case 's':
-                if( directive == -1 )
-                    directive = IGNORE_SAFETY_KEEP_LIVENESS_MODE;
-                else
-                {
-                    if( directive != FULL_BIERE_ONE_LOOP_MODE )
-                        goto usage;
-                    assert(directive == FULL_BIERE_ONE_LOOP_MODE);
-                    directive = IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE;
-                }
-                break;
-            case 'l':
-                if( directive == -1 )
-                    directive = IGNORE_LIVENESS_KEEP_SAFETY_MODE;
-                else
-                {
-                    if( directive != FULL_BIERE_ONE_LOOP_MODE )
-                        goto usage;
-                    assert(directive == FULL_BIERE_ONE_LOOP_MODE);
-                    directive = IGNORE_LIVENESS_KEEP_SAFETY_MODE;
-                }
-                break;
-            case 'h':
-                goto usage;
-            default:
-                goto usage;
-            }
-        }
-    }
-
-    if ( pNtk == NULL )
-    {
-        fprintf( pErr, "Empty network.\n" );
-        return 1;
-    }
-    if( !Abc_NtkIsStrash( pNtk ) )
-    {
-        printf("The input network was not strashed, strashing....\n");
-        pNtkTemp = Abc_NtkStrash( pNtk, 0, 0, 0 );
-        pNtkOld = pNtkTemp;
-        pAig = Abc_NtkToDar( pNtkTemp, 0, 1 );
-        vLive = populateLivenessVector( pNtk, pAig );
-        vFair = populateFairnessVector( pNtk, pAig );
-        vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-        vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-    }
-    else
-    {
-        pAig = Abc_NtkToDar( pNtk, 0, 1 );
-        pNtkOld = pNtk;
-        vLive = populateLivenessVector( pNtk, pAig );
-        vFair = populateFairnessVector( pNtk, pAig );
-        vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-        vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-    }
-
-    switch( directive )
-    {
-    case FULL_BIERE_MODE:
-        //if( Vec_PtrSize(vLive) == 0 && Vec_PtrSize(vAssertSafety) == 0 )
-        //{
-        //    printf("Input circuit has NO safety and NO liveness property, original network is not disturbed\n");
-        //    return 1;
-        //}
-        //else
-        //{
-            pAigNew = LivenessToSafetyTransformation( FULL_BIERE_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("A new circuit is produced with\n\t2 POs - one for safety and one for liveness.\n\tone additional input is added (due to Biere's nondeterminism)\n\tshadow flops are not created if the original circuit is combinational\n\tnon-property POs are suppressed\n");
-            break;
-        //}
-    case FULL_BIERE_ONE_LOOP_MODE:
-        //if( Vec_PtrSize(vLive) == 0 && Vec_PtrSize(vAssertSafety) == 0 )
-        //{
-        //    printf("Input circuit has NO safety and NO liveness property, original network is not disturbed\n");
-        //    return 1;
-        //}
-        //else
-        //{
-            pAigNew = LivenessToSafetyTransformationOneStepLoop( FULL_BIERE_ONE_LOOP_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("A new circuit is produced with\n\t2 POs - one for safety and one for liveness.\n\tone additional input is added (due to Biere's nondeterminism)\n\tshadow flops are not created\n\tnon-property POs are suppressed\n");
-            break;
-        //}
-    case IGNORE_LIVENESS_KEEP_SAFETY_MODE:
-        //if( Vec_PtrSize(vAssertSafety) == 0 )
-        //{    
-        //    printf("Input circuit has NO safety property, original network is not disturbed\n");
-        //    return 1;
-        //}
-        //else
-        //{
-            pAigNew = LivenessToSafetyTransformation( IGNORE_LIVENESS_KEEP_SAFETY_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("A new circuit is produced with\n\t1 PO - only for safety property; liveness properties are ignored, if any.\n\tno additional input is added (due to Biere's nondeterminism)\n\tshadow flops are not created\n\tnon-property POs are suppressed\n");
-            break;
-        //}
-    case IGNORE_SAFETY_KEEP_LIVENESS_MODE:
-        //if( Vec_PtrSize(vLive) == 0 )
-        //{    
-        //    printf("Input circuit has NO liveness property, original network is not disturbed\n");
-        //    return 1;
-        //}
-        //else
-        //{
-            pAigNew = LivenessToSafetyTransformation( IGNORE_SAFETY_KEEP_LIVENESS_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("A new circuit is produced with\n\t1 PO - only for liveness property; safety properties are ignored, if any.\n\tone additional input is added (due to Biere's nondeterminism)\n\tshadow flops are not created if the original circuit is combinational\n\tnon-property POs are suppressed\n");
-            break;
-        //}
-    case IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE:
-        //if( Vec_PtrSize(vLive) == 0 )
-        //{
-        //    printf("Input circuit has NO liveness property, original network is not disturbed\n");
-        //    return 1;
-        //}
-        //else
-        //{
-            pAigNew = LivenessToSafetyTransformationOneStepLoop( IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("New circuit is produced ignoring safety outputs!\nOnly liveness and fairness outputs are considered.\nShadow registers are not created\n");
-            break;
-        //}
-    }
-
-#if 0
-    if( argc == 1 )
-    {
-        pAigNew = LivenessToSafetyTransformation( FULL_BIERE_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-        if( Aig_ManRegNum(pAigNew) != 0 )
-            printf("New circuit is produced considering all safety, liveness and fairness outputs.\nBiere's logic is created\n");
-    }
-    else 
-    {
-        Extra_UtilGetoptReset();
-        c = Extra_UtilGetopt( argc, argv, "1lsh" );
-        if( c == '1' )
-        {
-            if ( pNtk == NULL )
-            {
-                fprintf( pErr, "Empty network.\n" );
-                return 1;
-            }
-            if( !Abc_NtkIsStrash( pNtk ) )
-            {
-                printf("The input network was not strashed, strashing....\n");
-                pNtkTemp = Abc_NtkStrash( pNtk, 0, 0, 0 );
-                pNtkOld = pNtkTemp;
-                pAig = Abc_NtkToDar( pNtkTemp, 0, 1 );
-                vLive = populateLivenessVector( pNtk, pAig );
-                vFair = populateFairnessVector( pNtk, pAig );
-                vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-                vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-            }
-            else
-            {
-                pAig = Abc_NtkToDar( pNtk, 0, 1 );
-                pNtkOld = pNtk;
-                vLive = populateLivenessVector( pNtk, pAig );
-                vFair = populateFairnessVector( pNtk, pAig );
-                vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-                vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-            }
-            pAigNew = LivenessToSafetyTransformationOneStepLoop( pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-        }
-        else if( c == 'l' )
-        {
-            if ( pNtk == NULL )
-            {
-                fprintf( pErr, "Empty network.\n" );
-                return 1;
-            }
-            if( !Abc_NtkIsStrash( pNtk ) )
-            {
-                printf("The input network was not strashed, strashing....\n");
-                pNtkTemp = Abc_NtkStrash( pNtk, 0, 0, 0 );
-                pNtkOld = pNtkTemp;
-                pAig = Abc_NtkToDar( pNtkTemp, 0, 1 );
-                vLive = populateLivenessVector( pNtk, pAig );
-                vFair = populateFairnessVector( pNtk, pAig );
-                vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-                vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-            }
-            else
-            {
-                pAig = Abc_NtkToDar( pNtk, 0, 1 );
-                pNtkOld = pNtk;
-                vLive = populateLivenessVector( pNtk, pAig );
-                vFair = populateFairnessVector( pNtk, pAig );
-                vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-                vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-            }
-            pAigNew = LivenessToSafetyTransformation( IGNORE_LIVENESS_KEEP_SAFETY_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("New circuit is produced ignoring liveness outputs!\nOnly safety outputs are kept.\nBiere's logic is not created\n");
-        }
-        else if( c == 's' )
-        {
-            if ( pNtk == NULL )
-            {
-                fprintf( pErr, "Empty network.\n" );
-                return 1;
-            }
-            
-            if( !Abc_NtkIsStrash( pNtk ) )
-            {
-                printf("The input network was not strashed, strashing....\n");
-                pNtkTemp = Abc_NtkStrash( pNtk, 0, 0, 0 );
-                pNtkOld = pNtkTemp;
-                pAig = Abc_NtkToDar( pNtkTemp, 0, 1 );
-                vLive = populateLivenessVector( pNtk, pAig );
-                vFair = populateFairnessVector( pNtk, pAig );
-                vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-                vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-            }
-            else
-            {
-                pAig = Abc_NtkToDar( pNtk, 0, 1 );
-                pNtkOld = pNtk;
-                vLive = populateLivenessVector( pNtk, pAig );
-                vFair = populateFairnessVector( pNtk, pAig );
-                vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-                vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-            }
-            pAigNew = LivenessToSafetyTransformation( IGNORE_SAFETY_KEEP_LIVENESS_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("New circuit is produced ignoring safety outputs!\nOnly liveness and fairness outputs are considered.\nBiere's logic is created\n");
-        }
-        else if( c == 'h' )
-            goto usage;
-        else
-            goto usage;
-    }
-#endif
-    
-#if 0
-    Aig_ManPrintStats( pAigNew );
-    printf("\nDetail statistics*************************************\n");
-    printf("Number of true primary inputs = %d\n", Saig_ManPiNum( pAigNew ));
-    printf("Number of true primary outputs = %d\n", Saig_ManPoNum( pAigNew ));
-    printf("Number of true latch outputs = %d\n", Saig_ManCiNum( pAigNew ) - Saig_ManPiNum( pAigNew ));
-    printf("Number of true latch inputs = %d\n", Saig_ManCoNum( pAigNew ) - Saig_ManPoNum( pAigNew ));
-    printf("Numer of registers = %d\n", Saig_ManRegNum( pAigNew ) );
-    printf("\n*******************************************************\n");
-#endif
-
-    pNtkNew = Abc_NtkFromAigPhase( pAigNew );
-    pNtkNew->pName = Aig_UtilStrsav( pAigNew->pName );
-    
-    if ( !Abc_NtkCheck( pNtkNew ) )
-        fprintf( stdout, "Abc_NtkCreateCone(): Network check has failed.\n" );
-    
-    updateNewNetworkNameManager( pNtkNew, pAigNew, vecPiNames, vecLoNames );
-    Abc_FrameSetCurrentNetwork( pAbc, pNtkNew );
-
-#if 0
-#ifndef DUPLICATE_CKT_DEBUG
-    Saig_ManForEachPi( pAigNew, pObj, i )
-        assert( strcmp( (char *)Vec_PtrEntry(vecPiNames, i), retrieveTruePiName( pNtk, pAig, pAigNew, pObj ) ) == 0 );
-        //printf("Name of %d-th Pi = %s, %s\n", i, retrieveTruePiName( pNtk, pAig, pAigNew, pObj ), (char *)Vec_PtrEntry(vecPiNames, i) );
-
-    Saig_ManForEachLo( pAigNew, pObj, i )
-        assert( strcmp( (char *)Vec_PtrEntry(vecLoNames, i), retrieveLOName( pNtk, pAig, pAigNew, pObj, vLive, vFair ) ) == 0 );
-#endif    
-#endif
-        
-    return 0;
-
-usage:
-    fprintf( stdout, "usage: l2s [-1lsh]\n" );
-    fprintf( stdout, "\t         performs Armin Biere's live-to-safe transformation\n" );
-    fprintf( stdout, "\t-1 : no shadow logic, presume all loops are self loops\n");
-    fprintf( stdout, "\t-l : ignore liveness and fairness outputs\n");
-    fprintf( stdout, "\t-s : ignore safety assertions and assumptions\n");
-    fprintf( stdout, "\t-h : print command usage\n");
-    return 1;
-}
-
-Vec_Int_t * prepareFlopVector( Aig_Man_t * pAig, int vectorLength )
-{
-    Vec_Int_t *vFlops;
-    int i;
-
-    vFlops = Vec_IntAlloc( vectorLength );
-
-    for( i=0; i<vectorLength; i++ )
-        Vec_IntPush( vFlops, i );
-
-#if 0
-    Vec_IntPush( vFlops, 19 );
-    Vec_IntPush( vFlops, 20 );
-    Vec_IntPush( vFlops, 23 );
-    Vec_IntPush( vFlops, 24 );
-    //Vec_IntPush( vFlops, 2 );
-    //Vec_IntPush( vFlops, 3 );
-    //Vec_IntPush( vFlops, 4 );
-    //Vec_IntPush( vFlops, 5 );
-    //Vec_IntPush( vFlops, 8 );
-    //Vec_IntPush( vFlops, 9 );
-    //Vec_IntPush( vFlops, 10 );
-    //Vec_IntPush( vFlops, 11 );
-    //Vec_IntPush( vFlops, 0 );
-    //Vec_IntPush( vFlops, 0 );
-#endif
-
-    return vFlops;
-}
-
-int Abc_CommandAbcLivenessToSafetyAbstraction( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
-    FILE * pOut, * pErr;
-    Abc_Ntk_t * pNtk, * pNtkTemp, *pNtkNew, *pNtkOld;
-    Aig_Man_t * pAig, *pAigNew;
-    int c;
-    Vec_Ptr_t * vLive, * vFair, *vAssertSafety, *vAssumeSafety;
-    int directive = -1;
-    Vec_Int_t * vFlops;
-                
-    pNtk = Abc_FrameReadNtk(pAbc);
-    pOut = Abc_FrameReadOut(pAbc);
-    pErr = Abc_FrameReadErr(pAbc);
-
-    if( argc == 1 )
-    {
-        assert( directive == -1 );
-        directive = FULL_BIERE_MODE;
-    }
-    else
-    {
-        Extra_UtilGetoptReset();
-        while ( ( c = Extra_UtilGetopt( argc, argv, "1slh" ) ) != EOF )
-        {
-            switch( c )
-            {
-            case '1': 
-                if( directive == -1 )
-                    directive = FULL_BIERE_ONE_LOOP_MODE;
-                else
-                {
-                    assert( directive == IGNORE_LIVENESS_KEEP_SAFETY_MODE || directive == IGNORE_SAFETY_KEEP_LIVENESS_MODE );
-                    if( directive == IGNORE_LIVENESS_KEEP_SAFETY_MODE )
-                        directive = IGNORE_LIVENESS_KEEP_SAFETY_MODE;
-                    else
-                        directive = IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE;
-                }
-                break;
-            case 's':
-                if( directive == -1 )
-                    directive = IGNORE_SAFETY_KEEP_LIVENESS_MODE;
-                else
-                {
-                    if( directive != FULL_BIERE_ONE_LOOP_MODE )
-                        goto usage;
-                    assert(directive == FULL_BIERE_ONE_LOOP_MODE);
-                    directive = IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE;
-                }
-                break;
-            case 'l':
-                if( directive == -1 )
-                    directive = IGNORE_LIVENESS_KEEP_SAFETY_MODE;
-                else
-                {
-                    if( directive != FULL_BIERE_ONE_LOOP_MODE )
-                        goto usage;
-                    assert(directive == FULL_BIERE_ONE_LOOP_MODE);
-                    directive = IGNORE_LIVENESS_KEEP_SAFETY_MODE;
-                }
-                break;
-            case 'h':
-                goto usage;
-            default:
-                goto usage;
-            }
-        }
-    }
-
-    if ( pNtk == NULL )
-    {
-        fprintf( pErr, "Empty network.\n" );
-        return 1;
-    }
-    if( !Abc_NtkIsStrash( pNtk ) )
-    {
-        printf("The input network was not strashed, strashing....\n");
-        pNtkTemp = Abc_NtkStrash( pNtk, 0, 0, 0 );
-        pNtkOld = pNtkTemp;
-        pAig = Abc_NtkToDar( pNtkTemp, 0, 1 );
-        vLive = populateLivenessVector( pNtk, pAig );
-        vFair = populateFairnessVector( pNtk, pAig );
-        vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-        vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-    }
-    else
-    {
-        pAig = Abc_NtkToDar( pNtk, 0, 1 );
-        pNtkOld = pNtk;
-        vLive = populateLivenessVector( pNtk, pAig );
-        vFair = populateFairnessVector( pNtk, pAig );
-        vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-        vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-    }
-
-    vFlops = prepareFlopVector( pAig, Aig_ManRegNum(pAig)%2 == 0? Aig_ManRegNum(pAig)/2 : (Aig_ManRegNum(pAig)-1)/2);
-
-    //vFlops = prepareFlopVector( pAig, 100 );
-
-    switch( directive )
-    {
-    case FULL_BIERE_MODE:
-        //if( Vec_PtrSize(vLive) == 0 && Vec_PtrSize(vAssertSafety) == 0 )
-        //{
-        //    printf("Input circuit has NO safety and NO liveness property, original network is not disturbed\n");
-        //    return 1;
-        //}
-        //else
-        //{
-            pAigNew = LivenessToSafetyTransformationAbs( FULL_BIERE_MODE, pNtk, pAig, vFlops, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("A new circuit is produced with\n\t2 POs - one for safety and one for liveness.\n\tone additional input is added (due to Biere's nondeterminism)\n\tshadow flops are not created if the original circuit is combinational\n\tnon-property POs are suppressed\n");
-            break;
-        //}
-    case FULL_BIERE_ONE_LOOP_MODE:
-        //if( Vec_PtrSize(vLive) == 0 && Vec_PtrSize(vAssertSafety) == 0 )
-        //{
-        //    printf("Input circuit has NO safety and NO liveness property, original network is not disturbed\n");
-        //    return 1;
-        //}
-        //else
-        //{
-            pAigNew = LivenessToSafetyTransformationOneStepLoop( FULL_BIERE_ONE_LOOP_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("A new circuit is produced with\n\t2 POs - one for safety and one for liveness.\n\tone additional input is added (due to Biere's nondeterminism)\n\tshadow flops are not created\n\tnon-property POs are suppressed\n");
-            break;
-        //}
-    case IGNORE_LIVENESS_KEEP_SAFETY_MODE:
-        //if( Vec_PtrSize(vAssertSafety) == 0 )
-        //{    
-        //    printf("Input circuit has NO safety property, original network is not disturbed\n");
-        //    return 1;
-        //}
-        //else
-        //{
-            pAigNew = LivenessToSafetyTransformationAbs( IGNORE_LIVENESS_KEEP_SAFETY_MODE, pNtk, pAig, vFlops, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("A new circuit is produced with\n\t1 PO - only for safety property; liveness properties are ignored, if any.\n\tno additional input is added (due to Biere's nondeterminism)\n\tshadow flops are not created\n\tnon-property POs are suppressed\n");
-            break;
-        //}
-    case IGNORE_SAFETY_KEEP_LIVENESS_MODE:
-        //if( Vec_PtrSize(vLive) == 0 )
-        //{    
-        //    printf("Input circuit has NO liveness property, original network is not disturbed\n");
-        //    return 1;
-        //}
-        //else
-        //{
-            pAigNew = LivenessToSafetyTransformationAbs( IGNORE_SAFETY_KEEP_LIVENESS_MODE, pNtk, pAig, vFlops, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("A new circuit is produced with\n\t1 PO - only for liveness property; safety properties are ignored, if any.\n\tone additional input is added (due to Biere's nondeterminism)\n\tshadow flops are not created if the original circuit is combinational\n\tnon-property POs are suppressed\n");
-            break;
-        //}
-    case IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE:
-        //if( Vec_PtrSize(vLive) == 0 )
-        //{
-        //    printf("Input circuit has NO liveness property, original network is not disturbed\n");
-        //    return 1;
-        //}
-        //else
-        //{
-            pAigNew = LivenessToSafetyTransformationOneStepLoop( IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("New circuit is produced ignoring safety outputs!\nOnly liveness and fairness outputs are considered.\nShadow registers are not created\n");
-            break;
-        //}
-    }
-
-    pNtkNew = Abc_NtkFromAigPhase( pAigNew );
-    pNtkNew->pName = Aig_UtilStrsav( pAigNew->pName );
-    
-    if ( !Abc_NtkCheck( pNtkNew ) )
-        fprintf( stdout, "Abc_NtkCreateCone(): Network check has failed.\n" );
-    
-    updateNewNetworkNameManager( pNtkNew, pAigNew, vecPiNames,vecLoNames );
-    Abc_FrameSetCurrentNetwork( pAbc, pNtkNew );
-
-#if 0
-#ifndef DUPLICATE_CKT_DEBUG
-    Saig_ManForEachPi( pAigNew, pObj, i )
-        assert( strcmp( (char *)Vec_PtrEntry(vecPiNames, i), retrieveTruePiName( pNtk, pAig, pAigNew, pObj ) ) == 0 );
-        //printf("Name of %d-th Pi = %s, %s\n", i, retrieveTruePiName( pNtk, pAig, pAigNew, pObj ), (char *)Vec_PtrEntry(vecPiNames, i) );
-
-    Saig_ManForEachLo( pAigNew, pObj, i )
-        assert( strcmp( (char *)Vec_PtrEntry(vecLoNames, i), retrieveLOName( pNtk, pAig, pAigNew, pObj, vLive, vFair ) ) == 0 );
-#endif    
-#endif
-        
-    return 0;
-
-usage:
-    fprintf( stdout, "usage: l2s [-1lsh]\n" );
-    fprintf( stdout, "\t         performs Armin Biere's live-to-safe transformation\n" );
-    fprintf( stdout, "\t-1 : no shadow logic, presume all loops are self loops\n");
-    fprintf( stdout, "\t-l : ignore liveness and fairness outputs\n");
-    fprintf( stdout, "\t-s : ignore safety assertions and assumptions\n");
-    fprintf( stdout, "\t-h : print command usage\n");
-    return 1;
-}
-
-Aig_Man_t * LivenessToSafetyTransformationWithLTL( int mode, Abc_Ntk_t * pNtk, Aig_Man_t * p, 
-                                           Vec_Ptr_t *vLive, Vec_Ptr_t *vFair, Vec_Ptr_t *vAssertSafety, Vec_Ptr_t *vAssumeSafety,
-                                           int *numLtlProcessed, Vec_Ptr_t *ltlBuffer )
-{
-    Aig_Man_t * pNew;
-    int i, ii, iii, nRegCount;
-    Aig_Obj_t * pObjSavePi;
-    Aig_Obj_t *pObjSavedLo, *pObjSavedLi;
-    Aig_Obj_t *pObj, *pMatch;
-    Aig_Obj_t *pObjSaveOrSaved, *pObjSaveAndNotSaved, *pObjSavedLoAndEquality;
-    Aig_Obj_t *pObjShadowLo, *pObjShadowLi, *pObjShadowLiDriver;
-    Aig_Obj_t *pObjXor, *pObjXnor, *pObjAndAcc;
-    Aig_Obj_t *pObjLive, *pObjSafetyGate;
-    Aig_Obj_t *pObjSafetyPropertyOutput;
-    Aig_Obj_t *pObjOriginalSafetyPropertyOutput;
-    Aig_Obj_t *pDriverImage, *pArgument, *collectiveAssertSafety, *collectiveAssumeSafety;
-    Aig_Obj_t *pNegatedSafetyConjunction = NULL;
-    Aig_Obj_t *pObjSafetyAndLiveToSafety;
-    char *nodeName, *pFormula;
-    int piCopied = 0, liCopied = 0, loCopied = 0, liCreated = 0, loCreated = 0, piVecIndex = 0, liveLatch = 0, fairLatch = 0;
-    Vec_Ptr_t *vSignal, *vTopASTNodeArray;
-    ltlNode *pEnrtyGLOBALLY;
-    ltlNode *topNodeOfAST, *tempTopASTNode;
-    Vec_Vec_t *vAigGFMap;
-    Vec_Ptr_t *vSignalMemory, *vGFFlopMemory, *vPoForLtlProps;
-    Vec_Ptr_t *vecInputLtlFormulae;
-    
-    vecPis = Vec_PtrAlloc( Saig_ManPiNum( p ) + 1);
-    vecPiNames = Vec_PtrAlloc( Saig_ManPiNum( p ) + 1);
-
-    vecLos = Vec_PtrAlloc( Saig_ManRegNum( p )*2 + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) );
-    vecLoNames = Vec_PtrAlloc( Saig_ManRegNum( p )*2 + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) );
-
-    //****************************************************************
-    //step0: Parsing the LTL formula
-    //****************************************************************
-    //Vec_PtrForEachEntry( char *, pNtk->vLtlProperties, pFormula, i )
-    //    printf("\ninput LTL formula [%d] = %s\n", i, pFormula );
-
-
-#ifdef MULTIPLE_LTL_FORMULA
-
-
-    //***************************************************************************
-    //Reading input LTL formulae from Ntk data-structure and creating 
-    //AST for them, Steps involved: 
-    //        parsing -> AST creation -> well-formedness check -> signal name check
-    //***************************************************************************
-
-    //resetting numLtlProcessed
-    *numLtlProcessed = 0;
-    
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-        //if( ltlBuffer )
-        vecInputLtlFormulae = ltlBuffer;
-        //vecInputLtlFormulae = pNtk->vLtlProperties;
-        if( vecInputLtlFormulae )
-        {
-            vTopASTNodeArray = Vec_PtrAlloc( Vec_PtrSize( vecInputLtlFormulae ) );
-            printf("\n");
-            Vec_PtrForEachEntry( char *, vecInputLtlFormulae, pFormula, i )
-            {
-                tempTopASTNode = parseFormulaCreateAST( pFormula );
-                //traverseAbstractSyntaxTree_postFix( tempTopASTNode );
-                if( tempTopASTNode )
-                {
-                    printf("Formula %d: AST is created, ", i+1);
-                    if( isWellFormed( tempTopASTNode ) )
-                        printf("Well-formedness check PASSED, ");
-                    else
-                    {
-                        printf("Well-formedness check FAILED!!\n");
-                        printf("AST will be ignored for formula %d, no extra logic will be added for this formula\n", i+1 );
-                        //do memory management to free the created AST
-                        continue;
-                    }
-                    if( checkSignalNameExistence( pNtk, tempTopASTNode ) )
-                        printf("Signal check PASSED\n");
-                    else
-                    {
-                        printf("Signal check FAILED!!");
-                        printf("AST will be ignored for formula %d, no extra logic will be added for this formula\n", i+1 );
-                        //do memory management to free the created AST
-                        continue;
-                    }
-                    Vec_PtrPush( vTopASTNodeArray, tempTopASTNode );
-                    (*numLtlProcessed)++;
-                }
-                else
-                    printf("\nNo AST has been created for formula %d, no extra logic will be added\n", i+1 );
-            }
-        }
-        printf("\n");
-        if( Vec_PtrSize( vTopASTNodeArray ) == 0 )
-        {
-            //printf("\nNo AST has been created for any formula; hence the circuit is left untouched\n");
-            printf("\nCurrently aborting, need to take care when Vec_PtrSize( vTopASTNodeArray ) == 0\n");
-            exit(0);
-        }
-    }
-
-        //****************************************************************
-        // Step1: create the new manager
-        // Note: The new manager is created with "2 * Aig_ManObjNumMax(p)"
-        // nodes, but this selection is arbitrary - need to be justified
-        //****************************************************************
-        pNew = Aig_ManStart( 2 * Aig_ManObjNumMax(p) );
-        pNew->pName = (char *)malloc( strlen( pNtk->pName ) + strlen("_l3s") + 1 );
-        sprintf(pNew->pName, "%s_%s", pNtk->pName, "l3s");
-        pNew->pSpec = NULL;
-    
-        //****************************************************************
-        // Step 2: map constant nodes
-        //****************************************************************
-        pObj = Aig_ManConst1( p );
-        pObj->pData = Aig_ManConst1( pNew );
-
-        //****************************************************************
-        // Step 3: create true PIs
-        //****************************************************************
-        Saig_ManForEachPi( p, pObj, i )
-        {
-            piCopied++;
-            pObj->pData = Aig_ObjCreatePi(pNew);
-            Vec_PtrPush( vecPis, pObj->pData );
-            nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
-            Vec_PtrPush( vecPiNames, nodeName );
-        }
-
-        //****************************************************************
-        // Step 4: create the special Pi corresponding to SAVE
-        //****************************************************************
-        if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-        {
-            pObjSavePi = Aig_ObjCreatePi( pNew );
-            nodeName = "SAVE_BIERE",
-            Vec_PtrPush( vecPiNames, nodeName );
-        }
-        
-        //****************************************************************
-        // Step 5: create register outputs
-        //****************************************************************
-        Saig_ManForEachLo( p, pObj, i )
-        {
-            loCopied++;
-            pObj->pData = Aig_ObjCreatePi(pNew);
-            Vec_PtrPush( vecLos, pObj->pData );
-            nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
-            Vec_PtrPush( vecLoNames, nodeName );
-        }
-
-        //****************************************************************
-        // Step 6: create "saved" register output
-        //****************************************************************
-        if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-        {
-            loCreated++;
-            pObjSavedLo = Aig_ObjCreatePi( pNew );
-            Vec_PtrPush( vecLos, pObjSavedLo );
-            nodeName = "SAVED_LO";
-            Vec_PtrPush( vecLoNames, nodeName );
-        }
-
-        //****************************************************************
-        // Step 7: create the OR gate and the AND gate directly fed by "SAVE" Pi
-        //****************************************************************
-        if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-        {
-            pObjSaveOrSaved = Aig_Or( pNew, pObjSavePi, pObjSavedLo );
-            pObjSaveAndNotSaved = Aig_And( pNew, pObjSavePi, Aig_Not(pObjSavedLo) );
-        }
-
-        //********************************************************************
-        // Step 8: create internal nodes
-        //********************************************************************
-        Aig_ManForEachNode( p, pObj, i )
-        {
-            pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-        }
-
-        
-        //********************************************************************
-        // Step 8.x : create PO for each safety assertions
-        // NOTE : Here the output is purposely inverted as it will be thrown to 
-        // dprove
-        //********************************************************************
-        assert( pNegatedSafetyConjunction == NULL );
-        if( mode == FULL_BIERE_MODE || mode == IGNORE_LIVENESS_KEEP_SAFETY_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE)
-        {
-            if( Vec_PtrSize( vAssertSafety ) != 0 && Vec_PtrSize( vAssumeSafety ) == 0 )
-            {
-                pObjAndAcc = Aig_ManConst1( pNew );
-                Vec_PtrForEachEntry( Aig_Obj_t *, vAssertSafety, pObj, i )
-                {
-                    pArgument = Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) );
-                    pObjAndAcc = Aig_And( pNew, pArgument, pObjAndAcc );
-                }
-                pNegatedSafetyConjunction = Aig_Not(pObjAndAcc);
-                if( mode == FULL_BIERE_MODE || mode == IGNORE_LIVENESS_KEEP_SAFETY_MODE )
-                    pObjOriginalSafetyPropertyOutput = Aig_ObjCreatePo( pNew, Aig_Not(pObjAndAcc) );
-            }
-            else if( Vec_PtrSize( vAssertSafety ) != 0 && Vec_PtrSize( vAssumeSafety ) != 0 )
-            {
-                pObjAndAcc = Aig_ManConst1( pNew );
-                Vec_PtrForEachEntry( Aig_Obj_t *, vAssertSafety, pObj, i )
-                {
-                    pArgument = Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) );
-                    pObjAndAcc = Aig_And( pNew, pArgument, pObjAndAcc );
-                }
-                collectiveAssertSafety = pObjAndAcc;
-
-                pObjAndAcc = Aig_ManConst1( pNew );
-                Vec_PtrForEachEntry( Aig_Obj_t *, vAssumeSafety, pObj, i )
-                {
-                    pArgument = Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0( pObj ) );
-                    pObjAndAcc = Aig_And( pNew, pArgument, pObjAndAcc );
-                }
-                collectiveAssumeSafety = pObjAndAcc;
-                pNegatedSafetyConjunction =  Aig_And( pNew, Aig_Not(collectiveAssertSafety), collectiveAssumeSafety );
-                if( mode == FULL_BIERE_MODE || mode == IGNORE_LIVENESS_KEEP_SAFETY_MODE )
-                    pObjOriginalSafetyPropertyOutput = Aig_ObjCreatePo( pNew, Aig_And( pNew, Aig_Not(collectiveAssertSafety), collectiveAssumeSafety ) );
-            }
-            else
-            {
-                printf("WARNING!! No safety property is found, a new (negated) constant 1 output is created\n");
-                pNegatedSafetyConjunction = Aig_Not( Aig_ManConst1(pNew) );
-                if( mode == FULL_BIERE_MODE || mode == IGNORE_LIVENESS_KEEP_SAFETY_MODE )
-                    pObjOriginalSafetyPropertyOutput = Aig_ObjCreatePo( pNew, Aig_Not( Aig_ManConst1(pNew) ) );
-            }
-        }
-        assert( pNegatedSafetyConjunction != NULL );
-
-        //********************************************************************
-        // Step 9: create the safety property output gate for the liveness properties
-        // discuss with Sat/Alan for an alternative implementation
-        //********************************************************************
-        if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-        {
-            vPoForLtlProps = Vec_PtrAlloc( Vec_PtrSize( vTopASTNodeArray ) );
-            if( Vec_PtrSize( vTopASTNodeArray ) )
-            {
-                //no effective AST for any input LTL property
-                //must do something graceful
-            }
-            for( i=0; i<Vec_PtrSize( vTopASTNodeArray ); i++ )
-            {
-                pObjSafetyPropertyOutput = Aig_ObjCreatePo( pNew, (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData );
-                Vec_PtrPush( vPoForLtlProps, pObjSafetyPropertyOutput );
-            }
-        }
-
-        //*************************************************************************************
-        // Step 10: Placeholder PO's were created for Liveness property outputs in the
-        // last step. FYI, # of new liveness property outputs = # of LTL properties in the circuit
-        // It is time for creation of loop LI's and other stuff
-        // Now creating register inputs for the original flops
-        //*************************************************************************************
-        nRegCount = 0;
-        
-        Saig_ManForEachLo( p, pObj, i )
-        {
-            pMatch = Saig_ObjLoToLi( p, pObj );
-            Aig_ObjCreatePo( pNew, Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin0(pMatch)->pData, Aig_ObjFaninC0( pMatch ) ) );
-            nRegCount++;
-            liCopied++;
-        }
-
-        //*************************************************************************************
-        // Step 11: create register input corresponding to the register "saved"
-        //*************************************************************************************
-        if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-        {
-            #ifndef DUPLICATE_CKT_DEBUG
-                pObjSavedLi = Aig_ObjCreatePo( pNew, pObjSaveOrSaved );
-                nRegCount++;
-                liCreated++;
-
-                pObjAndAcc = Aig_ManConst1( pNew );
-
-                //*************************************************************************************
-                // Step 11: create the family of shadow registers, then create the cascade of Xnor 
-                // and And gates for the comparator 
-                //*************************************************************************************
-                Saig_ManForEachLo( p, pObj, i )
-                {
-                //printf("\nKEMON RENDY = %s", Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i )) );
-                //top|route0_target0_queue_with_credit0_queue0
-                //top|route0_master0_queue2
-                //    if( strcmp(  Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ), "top|route0_queue1_num[0]" ) == 0 
-                //            || strcmp(  Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ), "top|route0_queue1_num[1]" ) == 0 || strcmp(  Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ), "top|route0_queue1_num[2]" ) == 0 )
-                    {        
-                        pObjShadowLo = Aig_ObjCreatePi( pNew );
-
-                    #ifdef PROPAGATE_NAMES
-                        Vec_PtrPush( vecLos, pObjShadowLo );
-                        nodeName = (char *)malloc( strlen( Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ) ) + 10 );
-                        sprintf( nodeName, "%s__%s", Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ), "SHADOW" );
-                        
-                        Vec_PtrPush( vecLoNames, nodeName );
-                    #endif
-
-                        pObjShadowLiDriver = Aig_Mux( pNew, pObjSaveAndNotSaved, (Aig_Obj_t *)pObj->pData, pObjShadowLo );
-                        pObjShadowLi = Aig_ObjCreatePo( pNew, pObjShadowLiDriver );
-                        nRegCount++;
-                        loCreated++; liCreated++;
-            
-                        pObjXor = Aig_Exor( pNew, (Aig_Obj_t *)pObj->pData, pObjShadowLo );
-                        pObjXnor = Aig_Not( pObjXor );
-                    
-                        pObjAndAcc = Aig_And( pNew, pObjXnor, pObjAndAcc );
-                    }
-                }
-
-                // create the AND gate whose output will be the signal "looped"
-                pObjSavedLoAndEquality = Aig_And( pNew, pObjSavedLo, pObjAndAcc );
-
-                // create the master AND gate and corresponding AND and OR logic for the liveness properties
-                
-                //*************************************************************************************
-                // Step 11: logic for LTL properties:- (looped & ~theta) where theta is the input ltl 
-                // property
-                // Description of some data-structure:
-                //-------------------------------------------------------------------------------------
-                // Name          | Type            | Purpose
-                //-------------------------------------------------------------------------------------
-                // vSignalMemory | Vec_Ptr_t *     | A vector across all ASTs of the LTL properties
-                //                 |                   | It remembers if OR+Latch for GF node has already been
-                //                 |                   | created for a particular signal.
-                //               |                 |
-                // vGFFlopMemory | Vec_Ptr_t *     | A vector across all ASTs of the LTL properties
-                //                 |                 | remembers if OR+Latch of a GF node has already been created
-                //                 |                 |
-                // vSignal         | Vec_Ptr_t *     | vector for each AST; contains pointers from GF nodes
-                //               |                 | to AIG signals
-                //                 |                   |
-                // vAigGFMap     | Vec_Vec_t *     | vAigGFMap[ index ] = vector of GF nodes pointing to
-                //               |                 | the same AIG node; "index" is the index of that
-                //               |                 | AIG node in the vector vSignal
-                //*************************************************************************************
-                
-                vSignalMemory = Vec_PtrAlloc(10);
-                vGFFlopMemory = Vec_PtrAlloc(10);
-
-                Vec_PtrForEachEntry( ltlNode *, vTopASTNodeArray, topNodeOfAST, iii )
-                {
-                                    vSignal = Vec_PtrAlloc( 10 );
-                                    vAigGFMap = Vec_VecAlloc( 10 );
-                                    
-                                    //*************************************************************************************
-                                    //Step 11a: for the current AST, find out the leaf level Boolean signal pointers from 
-                                    // the NEW aig.
-                                    //*************************************************************************************
-                                    populateBoolWithAigNodePtr( pNtk, p, pNew, topNodeOfAST );
-                                    assert( checkAllBoolHaveAIGPointer( topNodeOfAST ) );
-
-                                    //*************************************************************************************
-                                    //Step 11b: for each GF node, compute the pointer in AIG that it should point to
-                                    // In particular, if the subtree below GF is some Boolean crown (including the case
-                                    // of simple negation, create new logic and populate the AIG pointer in GF node
-                                    // accordingly
-                                    //*************************************************************************************
-                                    populateAigPointerUnitGF( pNew, topNodeOfAST, vSignal, vAigGFMap );
-                                    
-                                    //*************************************************************************************
-                                    //Step 11c: everything below GF are computed. Now, it is time to create logic for individual 
-                                    // GF nodes (i.e. the OR gate and the latch and the Boolean crown of the AST
-                                    //*************************************************************************************
-                                    Vec_PtrForEachEntry( Aig_Obj_t *, vSignal, pObj, i )
-                                    {
-                                        //*********************************************************
-                                        // Step 11c.1: if the OR+Latch of the particular signal is
-                                        // not already created, create it. It may have already been 
-                                        // created from another property, so check it before creation
-                                        //*********************************************************
-                                        if( Vec_PtrFind( vSignalMemory, pObj ) == -1 )
-                                        {
-                                            liveLatch++;
-
-                                            pDriverImage = pObj;
-                                            pObjShadowLo = Aig_ObjCreatePi( pNew );
-                                            pObjShadowLiDriver = Aig_Or( pNew, pObjShadowLo, Aig_And( pNew, pDriverImage, pObjSaveOrSaved ) );
-                                            pObjShadowLi = Aig_ObjCreatePo( pNew, pObjShadowLiDriver );
-
-                                            nRegCount++;
-                                            loCreated++; liCreated++;
-
-                                            Vec_PtrPush( vSignalMemory, pObj );
-                                            Vec_PtrPush( vGFFlopMemory, pObjShadowLo );
-
-                                            #if 1
-                                            #ifdef PROPAGATE_NAMES
-                                                Vec_PtrPush( vecLos, pObjShadowLo );
-                                                //nodeName = (char *)malloc( strlen( Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ) ) + 12 );
-                                                //sprintf( nodeName, "%s__%s", Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ), "LIVENESS" );
-                                                nodeName = (char *)malloc( 20 );
-                                                sprintf( nodeName, "n%d__%s", Aig_ObjId(pObjShadowLo), "GF_flop" );
-                                                Vec_PtrPush( vecLoNames, nodeName );
-                                            #endif
-                                            #endif
-                                        }
-                                        else
-                                            pObjShadowLo = (Aig_Obj_t *)Vec_PtrEntry( vGFFlopMemory, Vec_PtrFind( vSignalMemory, pObj ) );
-                                                                                
-                                        Vec_VecForEachEntryLevel( ltlNode *, vAigGFMap, pEnrtyGLOBALLY, ii, i )
-                                            setAIGNodePtrOfGloballyNode( pEnrtyGLOBALLY, pObjShadowLo);
-                                            
-
-                                        //#ifdef PROPAGATE_NAMES
-                                        //    Vec_PtrPush( vecLos, pObjShadowLo );
-                                        //    nodeName = (char *)malloc( strlen( Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ) ) + 12 );
-                                        //    sprintf( nodeName, "%s__%s", Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ), "LIVENESS" );
-                                        //    Vec_PtrPush( vecLoNames, nodeName );
-                                        //#endif
-                                        
-                                    }
-                                    
-                                    //*********************************************************
-                                    //Step 11c.2: creating the Boolean crown
-                                    //*********************************************************
-                                    buildLogicFromLTLNode( pNew, topNodeOfAST );
-
-                                    //*********************************************************
-                                    //Step 11c.3: creating logic for (looped & ~theta) and patching
-                                    // it with the proper PO
-                                    //Note: if ALLOW_SAFETY_PROPERTIES is defined then the final AND
-                                    //gate is a conjunction of safety & liveness, i.e. SAFETY & (looped => theta)
-                                    //since ABC convention demands a NOT gate at the end, the property logic 
-                                    //becomes !( SAFETY & (looped => theta) ) = !SAFETY + (looped & !theta)
-                                    //*********************************************************
-                                    pObjLive = retriveAIGPointerFromLTLNode( topNodeOfAST );
-                                    pObjSafetyGate = Aig_And( pNew, pObjSavedLoAndEquality, Aig_Not(pObjLive) );
-                                    #ifdef ALLOW_SAFETY_PROPERTIES
-                                        printf("liveness output is conjoined with safety assertions\n");
-                                        pObjSafetyAndLiveToSafety = Aig_Or( pNew, pObjSafetyGate, pNegatedSafetyConjunction );
-                                        pObjSafetyPropertyOutput = (Aig_Obj_t *)Vec_PtrEntry( vPoForLtlProps, iii );
-                                        Aig_ObjPatchFanin0( pNew, pObjSafetyPropertyOutput, pObjSafetyAndLiveToSafety );
-                                    #else
-                                        pObjSafetyPropertyOutput = Vec_PtrEntry( vPoForLtlProps, iii );
-                                        Aig_ObjPatchFanin0( pNew, pObjSafetyPropertyOutput, pObjSafetyGate );
-                                    #endif
-                                    //refreshing vSignal and vAigGFMap arrays
-                                    Vec_PtrFree( vSignal );
-                                    Vec_VecFree( vAigGFMap );
-                }
-                                
-            #endif
-        }
-#endif
-
-    Aig_ManSetRegNum( pNew, nRegCount );
-
-    Aig_ManPiCleanupBiere( pNew );
-    Aig_ManPoCleanupBiere( pNew );
-    
-    Aig_ManCleanup( pNew );
-    
-    assert( Aig_ManCheck( pNew ) );
-    
-    if( mode == FULL_BIERE_MODE || mode == IGNORE_SAFETY_KEEP_LIVENESS_MODE )
-    {
-            assert((Aig_Obj_t *)Vec_PtrEntry(pNew->vPos, Saig_ManPoNum(pNew)+Aig_ObjPioNum(pObjSavedLo)-Saig_ManPiNum(p)-1) == pObjSavedLi);
-            assert( Saig_ManPiNum( p ) + 1 == Saig_ManPiNum( pNew ) );
-            //assert( Saig_ManRegNum( pNew ) == Saig_ManRegNum( p ) * 2 + 1 + liveLatch + fairLatch );
-    }
-
-
-    return pNew;
-}
-
-int Abc_CommandAbcLivenessToSafetyWithLTL( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
-    FILE * pOut, * pErr;
-    Abc_Ntk_t * pNtk, * pNtkTemp, *pNtkNew, *pNtkOld;
-    Aig_Man_t * pAig, *pAigNew;
-    int c;
-    Vec_Ptr_t * vLive, * vFair, *vAssertSafety, *vAssumeSafety;
-    int directive = -1;
-    char *ltfFormulaString = NULL;
-    int LTL_FLAG = 0, numOfLtlPropOutput;
-    Vec_Ptr_t *ltlBuffer;
-                
-    pNtk = Abc_FrameReadNtk(pAbc);
-    pOut = Abc_FrameReadOut(pAbc);
-    pErr = Abc_FrameReadErr(pAbc);
-
-    if( argc == 1 )
-    {
-        assert( directive == -1 );
-        directive = FULL_BIERE_MODE;
-    }
-    else
-    {
-        Extra_UtilGetoptReset();
-        while ( ( c = Extra_UtilGetopt( argc, argv, "1slhf" ) ) != EOF )
-        {
-            switch( c )
-            {
-            case '1': 
-                if( directive == -1 )
-                    directive = FULL_BIERE_ONE_LOOP_MODE;
-                else
-                {
-                    assert( directive == IGNORE_LIVENESS_KEEP_SAFETY_MODE || directive == IGNORE_SAFETY_KEEP_LIVENESS_MODE );
-                    if( directive == IGNORE_LIVENESS_KEEP_SAFETY_MODE )
-                        directive = IGNORE_LIVENESS_KEEP_SAFETY_MODE;
-                    else
-                        directive = IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE;
-                }
-                break;
-            case 's':
-                if( directive == -1 )
-                    directive = IGNORE_SAFETY_KEEP_LIVENESS_MODE;
-                else
-                {
-                    if( directive != FULL_BIERE_ONE_LOOP_MODE )
-                        goto usage;
-                    assert(directive == FULL_BIERE_ONE_LOOP_MODE);
-                    directive = IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE;
-                }
-                break;
-            case 'l':
-                if( directive == -1 )
-                    directive = IGNORE_LIVENESS_KEEP_SAFETY_MODE;
-                else
-                {
-                    if( directive != FULL_BIERE_ONE_LOOP_MODE )
-                        goto usage;
-                    assert(directive == FULL_BIERE_ONE_LOOP_MODE);
-                    directive = IGNORE_LIVENESS_KEEP_SAFETY_MODE;
-                }
-                break;
-            case 'f':
-                //assert( argc >= 3 );
-                //vecLtlFormula = Vec_PtrAlloc( argc - 2 );
-                //if( argc >= 3 )
-                //{
-                //    for( t=3; t<=argc; t++ )
-                //    {
-                //        printf("argv[%d] = %s\n", t-1, argv[t-1]);
-                //        Vec_PtrPush( vecLtlFormula, argv[t-1] );
-                //    }
-                //}
-                //printf("argv[argc] = %s\n", argv[argc-1]);
-                //ltfFormulaString = argv[2];
-                
-                //LTL_FLAG = 1;
-                printf("\nILLEGAL FLAG: aborting....\n");
-                exit(0);
-                break;
-            case 'h':
-                goto usage;
-            default:
-                goto usage;
-            }
-        }
-    }
-
-    if ( pNtk == NULL )
-    {
-        fprintf( pErr, "Empty network.\n" );
-        return 1;
-    }
-    if( !Abc_NtkIsStrash( pNtk ) )
-    {
-        printf("The input network was not strashed, strashing....\n");
-        pNtkTemp = Abc_NtkStrash( pNtk, 0, 0, 0 );
-        pNtkOld = pNtkTemp;
-        pAig = Abc_NtkToDar( pNtkTemp, 0, 1 );
-        vLive = populateLivenessVector( pNtk, pAig );
-        vFair = populateFairnessVector( pNtk, pAig );
-        vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-        vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-    }
-    else
-    {
-        pAig = Abc_NtkToDar( pNtk, 0, 1 );
-        pNtkOld = pNtk;
-        vLive = populateLivenessVector( pNtk, pAig );
-        vFair = populateFairnessVector( pNtk, pAig );
-        vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-        vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-    }
-
-    if( pAbc->vLTLProperties_global != NULL )
-        ltlBuffer = pAbc->vLTLProperties_global;
-    else
-        ltlBuffer = NULL;
-
-    switch( directive )
-    {
-    case FULL_BIERE_MODE:
-            pAigNew = LivenessToSafetyTransformationWithLTL( FULL_BIERE_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety, &numOfLtlPropOutput, ltlBuffer );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("A new circuit is produced with\n\t%d POs - one for safety and %d for liveness.\n\tone additional input is added (due to Biere's nondeterminism)\n\tshadow flops are not created if the original circuit is combinational\n\tnon-property POs are suppressed\n", numOfLtlPropOutput+1, numOfLtlPropOutput);
-            break;
-        
-    case FULL_BIERE_ONE_LOOP_MODE:
-            pAigNew = LivenessToSafetyTransformationOneStepLoop( FULL_BIERE_ONE_LOOP_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("A new circuit is produced with\n\t2 POs - one for safety and one for liveness.\n\tone additional input is added (due to Biere's nondeterminism)\n\tshadow flops are not created\n\tnon-property POs are suppressed\n");
-            break;
-        
-    case IGNORE_LIVENESS_KEEP_SAFETY_MODE:
-            pAigNew = LivenessToSafetyTransformationWithLTL( IGNORE_LIVENESS_KEEP_SAFETY_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety, &numOfLtlPropOutput, ltlBuffer );
-            assert( numOfLtlPropOutput == 0 );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("A new circuit is produced with\n\t1 PO - only for safety property; liveness properties are ignored, if any.\n\tno additional input is added (due to Biere's nondeterminism)\n\tshadow flops are not created\n\tnon-property POs are suppressed\n");
-            break;
-        
-    case IGNORE_SAFETY_KEEP_LIVENESS_MODE:
-            pAigNew = LivenessToSafetyTransformationWithLTL( IGNORE_SAFETY_KEEP_LIVENESS_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety, &numOfLtlPropOutput, ltlBuffer );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("A new circuit is produced with\n\t%d PO - only for liveness property; safety properties are ignored, if any.\n\tone additional input is added (due to Biere's nondeterminism)\n\tshadow flops are not created if the original circuit is combinational\n\tnon-property POs are suppressed\n", numOfLtlPropOutput);
-            break;
-        
-    case IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE:
-            pAigNew = LivenessToSafetyTransformationOneStepLoop( IGNORE_SAFETY_KEEP_LIVENESS_ONE_LOOP_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("New circuit is produced ignoring safety outputs!\nOnly liveness and fairness outputs are considered.\nShadow registers are not created\n");
-            break;
-    }
-
-#if 0
-    if( argc == 1 )
-    {
-        pAigNew = LivenessToSafetyTransformation( FULL_BIERE_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-        if( Aig_ManRegNum(pAigNew) != 0 )
-            printf("New circuit is produced considering all safety, liveness and fairness outputs.\nBiere's logic is created\n");
-    }
-    else 
-    {
-        Extra_UtilGetoptReset();
-        c = Extra_UtilGetopt( argc, argv, "1lsh" );
-        if( c == '1' )
-        {
-            if ( pNtk == NULL )
-            {
-                fprintf( pErr, "Empty network.\n" );
-                return 1;
-            }
-            if( !Abc_NtkIsStrash( pNtk ) )
-            {
-                printf("The input network was not strashed, strashing....\n");
-                pNtkTemp = Abc_NtkStrash( pNtk, 0, 0, 0 );
-                pNtkOld = pNtkTemp;
-                pAig = Abc_NtkToDar( pNtkTemp, 0, 1 );
-                vLive = populateLivenessVector( pNtk, pAig );
-                vFair = populateFairnessVector( pNtk, pAig );
-                vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-                vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-            }
-            else
-            {
-                pAig = Abc_NtkToDar( pNtk, 0, 1 );
-                pNtkOld = pNtk;
-                vLive = populateLivenessVector( pNtk, pAig );
-                vFair = populateFairnessVector( pNtk, pAig );
-                vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-                vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-            }
-            pAigNew = LivenessToSafetyTransformationOneStepLoop( pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-        }
-        else if( c == 'l' )
-        {
-            if ( pNtk == NULL )
-            {
-                fprintf( pErr, "Empty network.\n" );
-                return 1;
-            }
-            if( !Abc_NtkIsStrash( pNtk ) )
-            {
-                printf("The input network was not strashed, strashing....\n");
-                pNtkTemp = Abc_NtkStrash( pNtk, 0, 0, 0 );
-                pNtkOld = pNtkTemp;
-                pAig = Abc_NtkToDar( pNtkTemp, 0, 1 );
-                vLive = populateLivenessVector( pNtk, pAig );
-                vFair = populateFairnessVector( pNtk, pAig );
-                vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-                vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-            }
-            else
-            {
-                pAig = Abc_NtkToDar( pNtk, 0, 1 );
-                pNtkOld = pNtk;
-                vLive = populateLivenessVector( pNtk, pAig );
-                vFair = populateFairnessVector( pNtk, pAig );
-                vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-                vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-            }
-            pAigNew = LivenessToSafetyTransformation( IGNORE_LIVENESS_KEEP_SAFETY_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("New circuit is produced ignoring liveness outputs!\nOnly safety outputs are kept.\nBiere's logic is not created\n");
-        }
-        else if( c == 's' )
-        {
-            if ( pNtk == NULL )
-            {
-                fprintf( pErr, "Empty network.\n" );
-                return 1;
-            }
-            
-            if( !Abc_NtkIsStrash( pNtk ) )
-            {
-                printf("The input network was not strashed, strashing....\n");
-                pNtkTemp = Abc_NtkStrash( pNtk, 0, 0, 0 );
-                pNtkOld = pNtkTemp;
-                pAig = Abc_NtkToDar( pNtkTemp, 0, 1 );
-                vLive = populateLivenessVector( pNtk, pAig );
-                vFair = populateFairnessVector( pNtk, pAig );
-                vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-                vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-            }
-            else
-            {
-                pAig = Abc_NtkToDar( pNtk, 0, 1 );
-                pNtkOld = pNtk;
-                vLive = populateLivenessVector( pNtk, pAig );
-                vFair = populateFairnessVector( pNtk, pAig );
-                vAssertSafety = populateSafetyAssertionVector( pNtk, pAig );
-                vAssumeSafety = populateSafetyAssumptionVector( pNtk, pAig );
-            }
-            pAigNew = LivenessToSafetyTransformation( IGNORE_SAFETY_KEEP_LIVENESS_MODE, pNtk, pAig, vLive, vFair, vAssertSafety, vAssumeSafety );
-            if( Aig_ManRegNum(pAigNew) != 0 )
-                printf("New circuit is produced ignoring safety outputs!\nOnly liveness and fairness outputs are considered.\nBiere's logic is created\n");
-        }
-        else if( c == 'h' )
-            goto usage;
-        else
-            goto usage;
-    }
-#endif
-    
-#if 0
-    Aig_ManPrintStats( pAigNew );
-    printf("\nDetail statistics*************************************\n");
-    printf("Number of true primary inputs = %d\n", Saig_ManPiNum( pAigNew ));
-    printf("Number of true primary outputs = %d\n", Saig_ManPoNum( pAigNew ));
-    printf("Number of true latch outputs = %d\n", Saig_ManCiNum( pAigNew ) - Saig_ManPiNum( pAigNew ));
-    printf("Number of true latch inputs = %d\n", Saig_ManCoNum( pAigNew ) - Saig_ManPoNum( pAigNew ));
-    printf("Numer of registers = %d\n", Saig_ManRegNum( pAigNew ) );
-    printf("\n*******************************************************\n");
-#endif
-
-    pNtkNew = Abc_NtkFromAigPhase( pAigNew );
-    pNtkNew->pName = Aig_UtilStrsav( pAigNew->pName );
-    
-    if ( !Abc_NtkCheck( pNtkNew ) )
-        fprintf( stdout, "Abc_NtkCreateCone(): Network check has failed.\n" );
-    
-    updateNewNetworkNameManager( pNtkNew, pAigNew, vecPiNames, vecLoNames );
-    Abc_FrameSetCurrentNetwork( pAbc, pNtkNew );
-
-#if 0
-#ifndef DUPLICATE_CKT_DEBUG
-    Saig_ManForEachPi( pAigNew, pObj, i )
-        assert( strcmp( (char *)Vec_PtrEntry(vecPiNames, i), retrieveTruePiName( pNtk, pAig, pAigNew, pObj ) ) == 0 );
-        //printf("Name of %d-th Pi = %s, %s\n", i, retrieveTruePiName( pNtk, pAig, pAigNew, pObj ), (char *)Vec_PtrEntry(vecPiNames, i) );
-
-    Saig_ManForEachLo( pAigNew, pObj, i )
-        assert( strcmp( (char *)Vec_PtrEntry(vecLoNames, i), retrieveLOName( pNtk, pAig, pAigNew, pObj, vLive, vFair ) ) == 0 );
-#endif    
-#endif
-        
-    return 0;
-
-usage:
-    fprintf( stdout, "usage: l3s [-1lsh]\n" );
-    fprintf( stdout, "\t         performs Armin Biere's live-to-safe transformation\n" );
-    fprintf( stdout, "\t-1 : no shadow logic, presume all loops are self loops\n");
-    fprintf( stdout, "\t-l : ignore liveness and fairness outputs\n");
-    fprintf( stdout, "\t-s : ignore safety assertions and assumptions\n");
-    fprintf( stdout, "\t-h : print command usage\n");
-    return 1;
-}
-
-
-ABC_NAMESPACE_IMPL_END
diff --git a/src/aig/live/liveness_sim.c b/src/aig/live/liveness_sim.c
deleted file mode 100644
index 5e494b87..00000000
--- a/src/aig/live/liveness_sim.c
+++ /dev/null
@@ -1,848 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [liveness_sim.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Liveness property checking.]
-
-  Synopsis    [Main implementation module.]
-
-  Author      [Sayak Ray]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - January 1, 2009.]
-
-  Revision    [$Id: liveness_sim.c,v 1.00 2009/01/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include <stdio.h>
-#include "main.h"
-#include "aig.h"
-#include "saig.h"
-#include <string.h>
-
-ABC_NAMESPACE_IMPL_START
-
-
-#define PROPAGATE_NAMES
-//#define DUPLICATE_CKT_DEBUG
-
-extern Aig_Man_t * Abc_NtkToDar( Abc_Ntk_t * pNtk, int fExors, int fRegisters );
-extern Abc_Ntk_t * Abc_NtkFromAigPhase( Aig_Man_t * pMan );
-//char *strdup(const char *string);
-
-
-/*******************************************************************
-LAYOUT OF PI VECTOR:
- 
-+------------------------------------------------------------------------------------------------------------------------------------+
-| TRUE ORIGINAL PI (n) | SAVE(PI) (1) | ORIGINAL LO (k) | SAVED(LO) (1) | SHADOW_ORIGINAL LO (k) | LIVENESS LO (l) | FAIRNESS LO (f) |
-+------------------------------------------------------------------------------------------------------------------------------------+
-<------------True PI----------------->|<----------------------------LO--------------------------------------------------------------->
-
-LAYOUT OF PO VECTOR:
-
-+-----------------------------------------------------------------------------------------------------------+
-| SOLE PO (1) | ORIGINAL LI (k) | SAVED LI (1) | SHADOW_ORIGINAL LI (k) | LIVENESS LI (l) | FAIRNESS LI (f) |
-+-----------------------------------------------------------------------------------------------------------+
-<--True PO--->|<--------------------------------------LI---------------------------------------------------->
-
-********************************************************************/
-
-static void printVecPtrOfString( Vec_Ptr_t *vec )
-{
-    int i;
-
-    for( i=0; i< Vec_PtrSize( vec ); i++ )
-    {
-        printf("vec[%d] = %s\n", i, (char *)Vec_PtrEntry(vec, i) );
-    }
-}
-
-static int getPoIndex( Aig_Man_t *pAig, Aig_Obj_t *pPivot )
-{
-    int i;
-    Aig_Obj_t *pObj;
-
-    Saig_ManForEachPo( pAig, pObj, i )
-    {
-        if( pObj == pPivot )
-            return i;
-    }
-    return -1;
-}
-
-static char * retrieveTruePiName( Abc_Ntk_t *pNtkOld, Aig_Man_t *pAigOld, Aig_Man_t *pAigNew, Aig_Obj_t *pObjPivot )
-{
-    Aig_Obj_t *pObjOld, *pObj;
-    Abc_Obj_t *pNode;
-    int index;
-
-    assert( Saig_ObjIsPi( pAigNew, pObjPivot ) );
-    Aig_ManForEachPi( pAigNew, pObj, index )
-        if( pObj == pObjPivot )
-            break;
-    assert( index < Aig_ManPiNum( pAigNew ) - Aig_ManRegNum( pAigNew ) );
-    if( index == Saig_ManPiNum( pAigNew ) - 1 )
-        return "SAVE_BIERE";
-    else
-    {
-        pObjOld = Aig_ManPi( pAigOld, index );
-        pNode = Abc_NtkPi( pNtkOld, index );
-        assert( pObjOld->pData == pObjPivot );
-        return Abc_ObjName( pNode );
-    }
-}
-
-static char * retrieveLOName( Abc_Ntk_t *pNtkOld, Aig_Man_t *pAigOld, Aig_Man_t *pAigNew, Aig_Obj_t *pObjPivot, Vec_Ptr_t *vLive, Vec_Ptr_t * vFair )
-{
-    Aig_Obj_t *pObjOld, *pObj;
-    Abc_Obj_t *pNode;
-    int index, oldIndex, originalLatchNum = Saig_ManRegNum(pAigOld), strMatch, i;
-    char *dummyStr = (char *)malloc( sizeof(char) * 50 );
-
-    assert( Saig_ObjIsLo( pAigNew, pObjPivot ) );
-    Saig_ManForEachLo( pAigNew, pObj, index )
-        if( pObj == pObjPivot )
-            break;
-    if( index < originalLatchNum )
-    {
-        oldIndex = Saig_ManPiNum( pAigOld ) + index;
-        pObjOld = Aig_ManPi( pAigOld, oldIndex );
-        pNode = Abc_NtkCi( pNtkOld, oldIndex );
-        assert( pObjOld->pData == pObjPivot );
-        return Abc_ObjName( pNode );
-    }
-    else if( index == originalLatchNum )
-        return "SAVED_LO";
-    else if( index > originalLatchNum && index < 2 * originalLatchNum + 1 )
-    {
-        oldIndex = Saig_ManPiNum( pAigOld ) + index - originalLatchNum - 1;
-        pObjOld = Aig_ManPi( pAigOld, oldIndex );
-        pNode = Abc_NtkCi( pNtkOld, oldIndex );
-        sprintf( dummyStr, "%s__%s", Abc_ObjName( pNode ), "SHADOW");
-        return dummyStr;
-    }
-    else if( index >= 2 * originalLatchNum + 1 && index < 2 * originalLatchNum + 1 + Vec_PtrSize( vLive ) )
-    {
-        oldIndex = index - 2 * originalLatchNum - 1;
-        strMatch = 0;
-        Saig_ManForEachPo( pAigOld, pObj, i )
-        {
-            pNode = Abc_NtkPo( pNtkOld, i );
-            if( strstr( Abc_ObjName( pNode ), "assert_fair" ) != NULL )
-            {
-                if( strMatch == oldIndex )
-                {
-                    sprintf( dummyStr, "%s__%s", Abc_ObjName( pNode ), "LIVENESS");
-                    return dummyStr;
-                }
-                else
-                    strMatch++;
-            }
-        }
-    }
-    else if( index >= 2 * originalLatchNum + 1 + Vec_PtrSize( vLive ) && index < 2 * originalLatchNum + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) )
-    {
-        oldIndex = index - 2 * originalLatchNum - 1 - Vec_PtrSize( vLive );
-        strMatch = 0;
-        Saig_ManForEachPo( pAigOld, pObj, i )
-        {
-            pNode = Abc_NtkPo( pNtkOld, i );
-            if( strstr( Abc_ObjName( pNode ), "assume_fair" ) != NULL )
-            {
-                if( strMatch == oldIndex )
-                {
-                    sprintf( dummyStr, "%s__%s", Abc_ObjName( pNode ), "FAIRNESS");
-                    return dummyStr;
-                }
-                else
-                    strMatch++;
-            }
-        }
-    }
-    else
-        return "UNKNOWN";
-}
-
-extern Vec_Ptr_t *vecPis, *vecPiNames;
-extern Vec_Ptr_t *vecLos, *vecLoNames;
-
-
-static int Aig_ManPiCleanupBiere( Aig_Man_t * p )
-{
-    int k = 0, nPisOld = Aig_ManPiNum(p);
-    
-    p->nObjs[AIG_OBJ_PI] = Vec_PtrSize( p->vPis );
-    if ( Aig_ManRegNum(p) )
-        p->nTruePis = Aig_ManPiNum(p) - Aig_ManRegNum(p);
-    
-    return nPisOld - Aig_ManPiNum(p);
-}
-
-
-static int Aig_ManPoCleanupBiere( Aig_Man_t * p )
-{
-    int k = 0, nPosOld = Aig_ManPoNum(p);
-
-    p->nObjs[AIG_OBJ_PO] = Vec_PtrSize( p->vPos );
-    if ( Aig_ManRegNum(p) )
-        p->nTruePos = Aig_ManPoNum(p) - Aig_ManRegNum(p);
-    return nPosOld - Aig_ManPoNum(p);
-}
-
-static Aig_Man_t * LivenessToSafetyTransformationSim( Abc_Ntk_t * pNtk, Aig_Man_t * p, Vec_Ptr_t *vLive, Vec_Ptr_t *vFair )
-{
-    Aig_Man_t * pNew;
-    int i, nRegCount;
-    Aig_Obj_t * pObjSavePi;
-    Aig_Obj_t *pObjSavedLo, *pObjSavedLi;
-    Aig_Obj_t *pObj, *pMatch;
-    Aig_Obj_t *pObjSaveOrSaved, *pObjSavedLoAndEquality;
-    Aig_Obj_t *pObjShadowLo, *pObjShadowLi, *pObjShadowLiDriver;
-    Aig_Obj_t *pObjXor, *pObjXnor, *pObjAndAcc, *pObjAndAccDummy;
-    Aig_Obj_t *pObjLive, *pObjFair, *pObjSafetyGate;
-    Aig_Obj_t *pObjSafetyPropertyOutput;
-    Aig_Obj_t *pDriverImage;
-    char *nodeName;
-    int piCopied = 0, liCopied = 0, loCopied = 0, liCreated = 0, loCreated = 0, piVecIndex = 0, liveLatch = 0, fairLatch = 0;
-    
-    vecPis = Vec_PtrAlloc( Saig_ManPiNum( p ) + 1);
-    vecPiNames = Vec_PtrAlloc( Saig_ManPiNum( p ) + 1);
-
-    vecLos = Vec_PtrAlloc( Saig_ManRegNum( p )*2 + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) );
-    vecLoNames = Vec_PtrAlloc( Saig_ManRegNum( p )*2 + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) );
-
-#ifdef DUPLICATE_CKT_DEBUG
-    printf("\nCode is compiled in DEBUG mode, the input-output behavior will be the same as the original circuit\n");
-    printf("Press any key to continue...");
-    scanf("%c", &c);
-#endif
-
-    //****************************************************************
-    // Step1: create the new manager
-    // Note: The new manager is created with "2 * Aig_ManObjNumMax(p)"
-    // nodes, but this selection is arbitrary - need to be justified
-    //****************************************************************
-    pNew = Aig_ManStart( 2 * Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( "live2safe" );
-    pNew->pSpec = NULL;
-    
-    //****************************************************************
-    // Step 2: map constant nodes
-    //****************************************************************
-    pObj = Aig_ManConst1( p );
-    pObj->pData = Aig_ManConst1( pNew );
-
-    //****************************************************************
-    // Step 3: create true PIs
-    //****************************************************************
-    Saig_ManForEachPi( p, pObj, i )
-    {
-        piCopied++;
-        pObj->pData = Aig_ObjCreatePi(pNew);
-        Vec_PtrPush( vecPis, pObj->pData );
-        nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
-        Vec_PtrPush( vecPiNames, nodeName );
-    }
-
-    //****************************************************************
-    // Step 4: create the special Pi corresponding to SAVE
-    //****************************************************************
-#ifndef DUPLICATE_CKT_DEBUG
-    pObjSavePi = Aig_ObjCreatePi( pNew );
-    nodeName = Aig_UtilStrsav("SAVE_BIERE"),
-    Vec_PtrPush( vecPiNames, nodeName );
-#endif
-        
-    //****************************************************************
-    // Step 5: create register outputs
-    //****************************************************************
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        loCopied++;
-        pObj->pData = Aig_ObjCreatePi(pNew);
-        Vec_PtrPush( vecLos, pObj->pData );
-        nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
-        Vec_PtrPush( vecLoNames, nodeName );
-    }
-
-    //****************************************************************
-    // Step 6: create "saved" register output
-    //****************************************************************
-#ifndef DUPLICATE_CKT_DEBUG
-    loCreated++;
-    pObjSavedLo = Aig_ObjCreatePi( pNew );
-    Vec_PtrPush( vecLos, pObjSavedLo );
-    nodeName = Aig_UtilStrsav("SAVED_LO");
-    Vec_PtrPush( vecLoNames, nodeName );
-#endif
-
-    //****************************************************************
-    // Step 7: create the OR gate and the AND gate directly fed by "SAVE" Pi
-    //****************************************************************
-#ifndef DUPLICATE_CKT_DEBUG
-    pObjSaveOrSaved = Aig_Or( pNew, pObjSavePi, pObjSavedLo );
-    //pObjSaveAndNotSaved = Aig_And( pNew, pObjSavePi, Aig_Not(pObjSavedLo) );
-#endif
-
-    //********************************************************************
-    // Step 8: create internal nodes
-    //********************************************************************
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-    }
-
-    //********************************************************************
-    // Step 9: create the safety property output gate
-    // create the safety property output gate, this will be the sole true PO 
-    // of the whole circuit, discuss with Sat/Alan for an alternative implementation
-    //********************************************************************
-#ifndef DUPLICATE_CKT_DEBUG
-    pObjSafetyPropertyOutput = Aig_ObjCreatePo( pNew, (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData );
-#endif
-
-    //********************************************************************
-    // DEBUG: To recreate the same circuit, at least from the input and output
-    // behavior, we need to copy the original PO
-    //********************************************************************
-#ifdef DUPLICATE_CKT_DEBUG
-    Saig_ManForEachPo( p, pObj, i )
-    {
-        Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
-    }
-#endif
-
-    // create register inputs for the original registers
-    nRegCount = 0;
-    
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        pMatch = Saig_ObjLoToLi( p, pObj );
-        //Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pMatch) );
-        Aig_ObjCreatePo( pNew, Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin0(pMatch)->pData, Aig_ObjFaninC0( pMatch ) ) );
-        nRegCount++;
-        liCopied++;
-    }
-
-    // create register input corresponding to the register "saved"
-#ifndef DUPLICATE_CKT_DEBUG
-    pObjSavedLi = Aig_ObjCreatePo( pNew, pObjSaveOrSaved );
-    nRegCount++;
-    liCreated++;
-
-    pObjAndAcc = NULL;
-
-    // create the family of shadow registers, then create the cascade of Xnor and And gates for the comparator 
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        pObjShadowLo = Aig_ObjCreatePi( pNew );
-
-#ifdef PROPAGATE_NAMES
-        Vec_PtrPush( vecLos, pObjShadowLo );
-        nodeName = (char *)malloc( strlen( Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ) ) + 10 );
-        sprintf( nodeName, "%s__%s", Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ), "SHADOW" );
-        Vec_PtrPush( vecLoNames, nodeName );
-#endif
-
-        pObjShadowLiDriver = Aig_Mux( pNew, pObjSavePi, (Aig_Obj_t *)pObj->pData, pObjShadowLo );
-        pObjShadowLi = Aig_ObjCreatePo( pNew, pObjShadowLiDriver );
-        nRegCount++;
-        loCreated++; liCreated++;
-        
-        pObjXor = Aig_Exor( pNew, (Aig_Obj_t *)pObj->pData, pObjShadowLo );
-        pObjXnor = Aig_Not( pObjXor );
-        if( pObjAndAcc == NULL )
-            pObjAndAcc = pObjXnor;
-        else
-        {
-            pObjAndAccDummy = pObjAndAcc;
-            pObjAndAcc = Aig_And( pNew, pObjXnor, pObjAndAccDummy );
-        }
-    }
-
-    // create the AND gate whose output will be the signal "looped"
-    pObjSavedLoAndEquality = Aig_And( pNew, pObjSavedLo, pObjAndAcc );
-    
-    // create the master AND gate and corresponding AND and OR logic for the liveness properties
-    pObjAndAcc = NULL;
-    if( vLive == NULL || Vec_PtrSize( vLive ) == 0 )
-        printf("\nCircuit without any liveness property\n");
-    else
-    {
-        Vec_PtrForEachEntry( Aig_Obj_t *, vLive, pObj, i )
-        {
-            //assert( Aig_ObjIsNode( Aig_ObjChild0( pObj ) ) );
-            //Aig_ObjPrint( pNew, pObj );
-            liveLatch++;
-            pDriverImage = Aig_NotCond((Aig_Obj_t *)Aig_Regular(Aig_ObjChild0( pObj ))->pData, Aig_ObjFaninC0(pObj));
-            pObjShadowLo = Aig_ObjCreatePi( pNew );
-
-#ifdef PROPAGATE_NAMES
-        Vec_PtrPush( vecLos, pObjShadowLo );
-        nodeName = (char *)malloc( strlen( Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ) ) + 12 );
-        sprintf( nodeName, "%s__%s", Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ), "LIVENESS" );
-        Vec_PtrPush( vecLoNames, nodeName );
-#endif
-
-            pObjShadowLiDriver = Aig_Or( pNew, Aig_Mux(pNew, pObjSavePi, Aig_Not(Aig_ManConst1(pNew)), pObjShadowLo), 
-                                                Aig_And( pNew, pDriverImage, pObjSaveOrSaved ) );
-            pObjShadowLi = Aig_ObjCreatePo( pNew, pObjShadowLiDriver );
-            nRegCount++;
-            loCreated++; liCreated++;
-            
-            if( pObjAndAcc == NULL )
-                pObjAndAcc = pObjShadowLo;
-            else
-            {
-                pObjAndAccDummy = pObjAndAcc;
-                pObjAndAcc = Aig_And( pNew, pObjShadowLo, pObjAndAccDummy );
-            }
-        }
-    }
-
-    if( pObjAndAcc != NULL )
-        pObjLive = pObjAndAcc;
-    else
-        pObjLive = Aig_ManConst1( pNew );
-    
-    // create the master AND gate and corresponding AND and OR logic for the fairness properties
-    pObjAndAcc = NULL;
-    if( vFair == NULL || Vec_PtrSize( vFair ) == 0 )
-        printf("\nCircuit without any fairness property\n");
-    else
-    {
-        Vec_PtrForEachEntry( Aig_Obj_t *, vFair, pObj, i )
-        {
-            fairLatch++;
-            //assert( Aig_ObjIsNode( Aig_ObjChild0( pObj ) ) );
-            pDriverImage = Aig_NotCond((Aig_Obj_t *)Aig_Regular(Aig_ObjChild0( pObj ))->pData, Aig_ObjFaninC0(pObj));
-            pObjShadowLo = Aig_ObjCreatePi( pNew );
-
-#ifdef PROPAGATE_NAMES
-        Vec_PtrPush( vecLos, pObjShadowLo );
-        nodeName = (char *)malloc( strlen( Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ) ) + 12 );
-        sprintf( nodeName, "%s__%s", Abc_ObjName( Abc_NtkPo( pNtk, getPoIndex( p, pObj ) ) ), "FAIRNESS" );
-        Vec_PtrPush( vecLoNames, nodeName );
-#endif
-
-            pObjShadowLiDriver = Aig_Or( pNew, Aig_Mux(pNew, pObjSavePi, Aig_Not(Aig_ManConst1(pNew)), pObjShadowLo), 
-                                    Aig_And( pNew, pDriverImage, pObjSaveOrSaved ) );
-            pObjShadowLi = Aig_ObjCreatePo( pNew, pObjShadowLiDriver );
-            nRegCount++;
-            loCreated++; liCreated++;
-            
-            if( pObjAndAcc == NULL )
-                pObjAndAcc = pObjShadowLo;
-            else
-            {
-                pObjAndAccDummy = pObjAndAcc;
-                pObjAndAcc = Aig_And( pNew, pObjShadowLo, pObjAndAccDummy );
-            }
-        }
-    }
-
-    if( pObjAndAcc != NULL )
-        pObjFair = pObjAndAcc;
-    else
-        pObjFair = Aig_ManConst1( pNew );
-    
-    //pObjSafetyGate = Aig_Exor( pNew, Aig_Not(Aig_ManConst1( pNew )), Aig_And( pNew, pObjSavedLoAndEquality, Aig_And( pNew, pObjFair, Aig_Not( pObjLive ) ) ) );
-    pObjSafetyGate = Aig_And( pNew, pObjSavedLoAndEquality, Aig_And( pNew, pObjFair, Aig_Not( pObjLive ) ) );
-    
-    Aig_ObjPatchFanin0( pNew, pObjSafetyPropertyOutput, pObjSafetyGate );
-#endif
-
-    Aig_ManSetRegNum( pNew, nRegCount );
-
-    Aig_ManPiCleanupBiere( pNew );
-    Aig_ManPoCleanupBiere( pNew );
-    
-    Aig_ManCleanup( pNew );
-    assert( Aig_ManCheck( pNew ) );
-    
-#ifndef DUPLICATE_CKT_DEBUG
-    assert((Aig_Obj_t *)Vec_PtrEntry(pNew->vPos, Saig_ManPoNum(pNew)+Aig_ObjPioNum(pObjSavedLo)-Saig_ManPiNum(p)-1) == pObjSavedLi);
-    assert( Saig_ManPoNum( pNew ) == 1 );
-    assert( Saig_ManPiNum( p ) + 1 == Saig_ManPiNum( pNew ) );
-    assert( Saig_ManRegNum( pNew ) == Saig_ManRegNum( p ) * 2 + 1 + liveLatch + fairLatch );
-#endif
-
-    return pNew;
-}
-
-
-static Aig_Man_t * LivenessToSafetyTransformationOneStepLoopSim( Abc_Ntk_t * pNtk, Aig_Man_t * p, Vec_Ptr_t *vLive, Vec_Ptr_t *vFair )
-{
-    Aig_Man_t * pNew;
-    int i, nRegCount;
-    Aig_Obj_t * pObjSavePi;
-    Aig_Obj_t *pObj, *pMatch;
-    Aig_Obj_t *pObjSavedLoAndEquality;
-    Aig_Obj_t *pObjXor, *pObjXnor, *pObjAndAcc, *pObjAndAccDummy;
-    Aig_Obj_t *pObjLive, *pObjFair, *pObjSafetyGate;
-    Aig_Obj_t *pObjSafetyPropertyOutput;
-    Aig_Obj_t *pDriverImage;
-    Aig_Obj_t *pObjCorrespondingLi;
-
-
-    char *nodeName;
-    int piCopied = 0, liCopied = 0, loCopied = 0, liCreated = 0, loCreated = 0, piVecIndex = 0;
-    
-    vecPis = Vec_PtrAlloc( Saig_ManPiNum( p ) + 1);
-    vecPiNames = Vec_PtrAlloc( Saig_ManPiNum( p ) + 1);
-
-    vecLos = Vec_PtrAlloc( Saig_ManRegNum( p )*2 + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) );
-    vecLoNames = Vec_PtrAlloc( Saig_ManRegNum( p )*2 + 1 + Vec_PtrSize( vLive ) + Vec_PtrSize( vFair ) );
-
-    //****************************************************************
-    // Step1: create the new manager
-    // Note: The new manager is created with "2 * Aig_ManObjNumMax(p)"
-    // nodes, but this selection is arbitrary - need to be justified
-    //****************************************************************
-    pNew = Aig_ManStart( 2 * Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( "live2safe" );
-    pNew->pSpec = NULL;
-    
-    //****************************************************************
-    // Step 2: map constant nodes
-    //****************************************************************
-    pObj = Aig_ManConst1( p );
-    pObj->pData = Aig_ManConst1( pNew );
-
-    //****************************************************************
-    // Step 3: create true PIs
-    //****************************************************************
-    Saig_ManForEachPi( p, pObj, i )
-    {
-        piCopied++;
-        pObj->pData = Aig_ObjCreatePi(pNew);
-        Vec_PtrPush( vecPis, pObj->pData );
-        nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkPi( pNtk, i ) ));
-        Vec_PtrPush( vecPiNames, nodeName );
-    }
-
-    //****************************************************************
-    // Step 4: create the special Pi corresponding to SAVE
-    //****************************************************************
-    pObjSavePi = Aig_ObjCreatePi( pNew );
-    nodeName = "SAVE_BIERE",
-    Vec_PtrPush( vecPiNames, nodeName );
-        
-    //****************************************************************
-    // Step 5: create register outputs
-    //****************************************************************
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        loCopied++;
-        pObj->pData = Aig_ObjCreatePi(pNew);
-        Vec_PtrPush( vecLos, pObj->pData );
-        nodeName = Aig_UtilStrsav(Abc_ObjName( Abc_NtkCi( pNtk, Abc_NtkPiNum(pNtk) + i ) ));
-        Vec_PtrPush( vecLoNames, nodeName );
-    }
-
-    //****************************************************************
-    // Step 6: create "saved" register output
-    //****************************************************************
-
-#if 0
-    loCreated++;
-    pObjSavedLo = Aig_ObjCreatePi( pNew );
-    Vec_PtrPush( vecLos, pObjSavedLo );
-    nodeName = "SAVED_LO";
-    Vec_PtrPush( vecLoNames, nodeName );
-#endif
-
-    //****************************************************************
-    // Step 7: create the OR gate and the AND gate directly fed by "SAVE" Pi
-    //****************************************************************
-#if 0
-    pObjSaveOrSaved = Aig_Or( pNew, pObjSavePi, pObjSavedLo );
-    pObjSaveAndNotSaved = Aig_And( pNew, pObjSavePi, Aig_Not(pObjSavedLo) );
-#endif
-
-    //********************************************************************
-    // Step 8: create internal nodes
-    //********************************************************************
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-    }
-
-    //********************************************************************
-    // Step 9: create the safety property output gate
-    // create the safety property output gate, this will be the sole true PO 
-    // of the whole circuit, discuss with Sat/Alan for an alternative implementation
-    //********************************************************************
-
-    pObjSafetyPropertyOutput = Aig_ObjCreatePo( pNew, (Aig_Obj_t *)Aig_ObjFanin0(pObj)->pData );
-
-    // create register inputs for the original registers
-    nRegCount = 0;
-    
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        pMatch = Saig_ObjLoToLi( p, pObj );
-        //Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pMatch) );
-        Aig_ObjCreatePo( pNew, Aig_NotCond((Aig_Obj_t *)Aig_ObjFanin0(pMatch)->pData, Aig_ObjFaninC0( pMatch ) ) );
-        nRegCount++;
-        liCopied++;
-    }
-
-#if 0
-    // create register input corresponding to the register "saved"
-    pObjSavedLi = Aig_ObjCreatePo( pNew, pObjSaveOrSaved );
-    nRegCount++;
-    liCreated++;
-#endif
-
-    pObjAndAcc = NULL;
-
-    //****************************************************************************************************
-    //For detection of loop of length 1 we do not need any shadow register, we only need equality detector
-    //between Lo_j and Li_j and then a cascade of AND gates
-    //****************************************************************************************************
-
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        pObjCorrespondingLi = Saig_ObjLoToLi( p, pObj );
-        
-        pObjXor = Aig_Exor( pNew, (Aig_Obj_t *)pObj->pData,  Aig_NotCond( (Aig_Obj_t *)Aig_ObjFanin0( pObjCorrespondingLi )->pData, Aig_ObjFaninC0( pObjCorrespondingLi ) ) );
-        pObjXnor = Aig_Not( pObjXor );
-        
-        if( pObjAndAcc == NULL )
-            pObjAndAcc = pObjXnor;
-        else
-        {
-            pObjAndAccDummy = pObjAndAcc;
-            pObjAndAcc = Aig_And( pNew, pObjXnor, pObjAndAccDummy );
-        }
-    }
-
-    // create the AND gate whose output will be the signal "looped"
-    pObjSavedLoAndEquality = Aig_And( pNew, pObjSavePi, pObjAndAcc );
-    
-    // create the master AND gate and corresponding AND and OR logic for the liveness properties
-    pObjAndAcc = NULL;
-    if( vLive == NULL || Vec_PtrSize( vLive ) == 0 )
-        printf("\nCircuit without any liveness property\n");
-    else
-    {
-        Vec_PtrForEachEntry( Aig_Obj_t *, vLive, pObj, i )
-        {
-            pDriverImage = Aig_NotCond((Aig_Obj_t *)Aig_Regular(Aig_ObjChild0( pObj ))->pData, Aig_ObjFaninC0(pObj));
-            if( pObjAndAcc == NULL )
-                pObjAndAcc = pDriverImage;
-            else
-            {
-                pObjAndAccDummy = pObjAndAcc;
-                pObjAndAcc = Aig_And( pNew, pDriverImage, pObjAndAccDummy );
-            }
-        }
-    }
-
-    if( pObjAndAcc != NULL )
-        pObjLive = pObjAndAcc;
-    else
-        pObjLive = Aig_ManConst1( pNew );
-    
-    // create the master AND gate and corresponding AND and OR logic for the fairness properties
-    pObjAndAcc = NULL;
-    if( vFair == NULL || Vec_PtrSize( vFair ) == 0 )
-        printf("\nCircuit without any fairness property\n");
-    else
-    {
-        Vec_PtrForEachEntry( Aig_Obj_t *, vFair, pObj, i )
-        {
-            pDriverImage = Aig_NotCond((Aig_Obj_t *)Aig_Regular(Aig_ObjChild0( pObj ))->pData, Aig_ObjFaninC0(pObj));
-            if( pObjAndAcc == NULL )
-                pObjAndAcc = pDriverImage;
-            else
-            {
-                pObjAndAccDummy = pObjAndAcc;
-                pObjAndAcc = Aig_And( pNew, pDriverImage, pObjAndAccDummy );
-            }
-        }
-    }
-
-    if( pObjAndAcc != NULL )
-        pObjFair = pObjAndAcc;
-    else
-        pObjFair = Aig_ManConst1( pNew );
-    
-    pObjSafetyGate = Aig_And( pNew, pObjSavedLoAndEquality, Aig_And( pNew, pObjFair, Aig_Not( pObjLive ) ) );
-    
-    Aig_ObjPatchFanin0( pNew, pObjSafetyPropertyOutput, pObjSafetyGate );
-
-    Aig_ManSetRegNum( pNew, nRegCount );
-
-    printf("\nSaig_ManPiNum = %d, Reg Num = %d, before everything, before Pi cleanup\n", Vec_PtrSize( pNew->vPis ), pNew->nRegs );
-
-    Aig_ManPiCleanupBiere( pNew );
-    Aig_ManPoCleanupBiere( pNew );
-
-    Aig_ManCleanup( pNew );
-    
-    assert( Aig_ManCheck( pNew ) );
-    
-    return pNew;
-}
-
-
-
-static Vec_Ptr_t * populateLivenessVector( Abc_Ntk_t *pNtk, Aig_Man_t *pAig )
-{
-    Abc_Obj_t * pNode;
-    int i, liveCounter = 0;
-    Vec_Ptr_t * vLive;
-
-    vLive = Vec_PtrAlloc( 100 );
-    Abc_NtkForEachPo( pNtk, pNode, i )
-        if( strstr( Abc_ObjName( pNode ), "assert_fair") != NULL )
-        {
-            Vec_PtrPush( vLive, Aig_ManPo( pAig, i ) );
-            liveCounter++;
-        }
-    printf("\nNumber of liveness property found = %d\n", liveCounter);
-    return vLive;
-}
-
-static Vec_Ptr_t * populateFairnessVector( Abc_Ntk_t *pNtk, Aig_Man_t *pAig )
-{
-    Abc_Obj_t * pNode;
-    int i, fairCounter = 0;
-    Vec_Ptr_t * vFair;
-
-    vFair = Vec_PtrAlloc( 100 );
-    Abc_NtkForEachPo( pNtk, pNode, i )
-        if( strstr( Abc_ObjName( pNode ), "assume_fair") != NULL )
-        {
-            Vec_PtrPush( vFair, Aig_ManPo( pAig, i ) );
-            fairCounter++;
-        }
-    printf("\nNumber of fairness property found = %d\n", fairCounter);
-    return vFair;
-}
-
-static void updateNewNetworkNameManager( Abc_Ntk_t *pNtk, Aig_Man_t *pAig, Vec_Ptr_t *vPiNames, Vec_Ptr_t *vLoNames )
-{
-    Aig_Obj_t *pObj;
-    int i, ntkObjId;
-
-    pNtk->pManName = Nm_ManCreate( Abc_NtkCiNum( pNtk ) );
-
-    Saig_ManForEachPi( pAig, pObj, i )
-    {
-        ntkObjId = Abc_NtkCi( pNtk, i )->Id;
-        //printf("Pi %d, Saved Name = %s, id = %d\n", i, Nm_ManStoreIdName( pNtk->pManName, ntkObjId, Aig_ObjType(pObj), Vec_PtrEntry(vPiNames, i), NULL ), ntkObjId);  
-        Nm_ManStoreIdName( pNtk->pManName, ntkObjId, Aig_ObjType(pObj), (char *)Vec_PtrEntry(vPiNames, i), NULL );
-    }
-    Saig_ManForEachLo( pAig, pObj, i )
-    {
-        ntkObjId = Abc_NtkCi( pNtk, Saig_ManPiNum( pAig ) + i )->Id;
-        //printf("Lo %d, Saved name = %s, id = %d\n", i, Nm_ManStoreIdName( pNtk->pManName, ntkObjId, Aig_ObjType(pObj), Vec_PtrEntry(vLoNames, i), NULL ), ntkObjId);  
-        Nm_ManStoreIdName( pNtk->pManName, ntkObjId, Aig_ObjType(pObj), (char *)Vec_PtrEntry(vLoNames, i), NULL );
-    }
-}
-
-
-int Abc_CommandAbcLivenessToSafetySim( Abc_Frame_t * pAbc, int argc, char ** argv )
-{
-    FILE * pOut, * pErr;
-    Abc_Ntk_t * pNtk, * pNtkTemp, *pNtkNew, *pNtkOld;
-    Aig_Man_t * pAig, *pAigNew;
-    int c;
-    Vec_Ptr_t * vLive, * vFair;
-                
-    pNtk = Abc_FrameReadNtk(pAbc);
-    pOut = Abc_FrameReadOut(pAbc);
-    pErr = Abc_FrameReadErr(pAbc);
-
-    if ( pNtk == NULL )
-    {
-        fprintf( pErr, "Empty network.\n" );
-        return 1;
-    }
-
-    if( !Abc_NtkIsStrash( pNtk ) )
-    {
-        printf("\nThe input network was not strashed, strashing....\n");
-        pNtkTemp = Abc_NtkStrash( pNtk, 0, 0, 0 );
-        pNtkOld = pNtkTemp;
-        pAig = Abc_NtkToDar( pNtkTemp, 0, 1 );
-        vLive = populateLivenessVector( pNtk, pAig );
-        vFair = populateFairnessVector( pNtk, pAig );
-    }
-    else
-    {
-        pAig = Abc_NtkToDar( pNtk, 0, 1 );
-        pNtkOld = pNtk;
-        vLive = populateLivenessVector( pNtk, pAig );
-        vFair = populateFairnessVector( pNtk, pAig );
-    }
-
-#if 0
-    Aig_ManPrintStats( pAig );
-    printf("\nDetail statistics*************************************\n");
-    printf("Number of true primary inputs = %d\n", Saig_ManPiNum( pAig ));
-    printf("Number of true primary outputs = %d\n", Saig_ManPoNum( pAig ));
-    printf("Number of true latch outputs = %d\n", Saig_ManCiNum( pAig ) - Saig_ManPiNum( pAig ));
-    printf("Number of true latch inputs = %d\n", Saig_ManCoNum( pAig ) - Saig_ManPoNum( pAig ));
-    printf("Numer of registers = %d\n", Saig_ManRegNum( pAig ) );
-    printf("\n*******************************************************\n");
-#endif
-
-    c = Extra_UtilGetopt( argc, argv, "1" );
-    if( c == '1' )
-        pAigNew = LivenessToSafetyTransformationOneStepLoopSim( pNtk, pAig, vLive, vFair );
-    else
-        pAigNew = LivenessToSafetyTransformationSim( pNtk, pAig, vLive, vFair );
-    
-#if 0
-    Aig_ManPrintStats( pAigNew );
-    printf("\nDetail statistics*************************************\n");
-    printf("Number of true primary inputs = %d\n", Saig_ManPiNum( pAigNew ));
-    printf("Number of true primary outputs = %d\n", Saig_ManPoNum( pAigNew ));
-    printf("Number of true latch outputs = %d\n", Saig_ManCiNum( pAigNew ) - Saig_ManPiNum( pAigNew ));
-    printf("Number of true latch inputs = %d\n", Saig_ManCoNum( pAigNew ) - Saig_ManPoNum( pAigNew ));
-    printf("Numer of registers = %d\n", Saig_ManRegNum( pAigNew ) );
-    printf("\n*******************************************************\n");
-#endif
-
-    pNtkNew = Abc_NtkFromAigPhase( pAigNew );
-
-    if ( !Abc_NtkCheck( pNtkNew ) )
-        fprintf( stdout, "Abc_NtkCreateCone(): Network check has failed.\n" );
-    
-    updateNewNetworkNameManager( pNtkNew, pAigNew, vecPiNames,vecLoNames );
-    Abc_FrameSetCurrentNetwork( pAbc, pNtkNew );
-
-    //Saig_ManForEachPi( pAigNew, pObj, i )
-    //    printf("Name of %d-th Pi = %s\n", i, retrieveTruePiName( pNtk, pAig, pAigNew, pObj ) );
-
-    //Saig_ManForEachLo( pAigNew, pObj, i )
-    //    printf("Name of %d-th Lo = %s\n", i, retrieveLOName( pNtk, pAig, pAigNew, pObj, vLive, vFair ) );
-
-    //printVecPtrOfString( vecPiNames );
-    //printVecPtrOfString( vecLoNames );
-
-#if 0
-#ifndef DUPLICATE_CKT_DEBUG
-    Saig_ManForEachPi( pAigNew, pObj, i )
-        assert( strcmp( (char *)Vec_PtrEntry(vecPiNames, i), retrieveTruePiName( pNtk, pAig, pAigNew, pObj ) ) == 0 );
-        //printf("Name of %d-th Pi = %s, %s\n", i, retrieveTruePiName( pNtk, pAig, pAigNew, pObj ), (char *)Vec_PtrEntry(vecPiNames, i) );
-
-    Saig_ManForEachLo( pAigNew, pObj, i )
-        assert( strcmp( (char *)Vec_PtrEntry(vecLoNames, i), retrieveLOName( pNtk, pAig, pAigNew, pObj, vLive, vFair ) ) == 0 );
-#endif    
-#endif
-        
-    return 0;
-
-}
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/live/ltl_parser.c b/src/aig/live/ltl_parser.c
deleted file mode 100644
index de113ba7..00000000
--- a/src/aig/live/ltl_parser.c
+++ /dev/null
@@ -1,839 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ltl_parser.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Liveness property checking.]
-
-  Synopsis    [LTL checker.]
-
-  Author      [Sayak Ray]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - January 1, 2009.]
-
-  Revision    [$Id: ltl_parser.c,v 1.00 2009/01/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include <stdio.h>
-#include <string.h>
-#include <assert.h>
-#include <stdlib.h>
-#include "aig.h"
-#include "abc.h"
-#include "mainInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-enum ltlToken { AND, OR, NOT, IMPLY, GLOBALLY, EVENTUALLY, NEXT, UNTIL, BOOL };
-enum ltlGrammerToken { OPERAND, LTL, BINOP, UOP };
-typedef enum ltlToken tokenType;
-typedef enum ltlGrammerToken ltlGrammerTokenType;
-
-struct ltlNode_t
-{
-    tokenType type;
-    char *name;
-    Aig_Obj_t *pObj;
-    struct ltlNode_t *left;
-    struct ltlNode_t *right;
-};
-
-typedef struct ltlNode_t ltlNode;
-
-ltlNode *generateTypedNode( tokenType new_type )
-//void generateTypedNode( ltlNode *new_node, tokenType new_type )
-{
-    ltlNode *new_node;
-
-    new_node = (ltlNode *)malloc( sizeof(ltlNode) );
-    if( new_node )
-    {
-        new_node->type = new_type;
-        new_node->pObj = NULL;
-        new_node->name = NULL;
-        new_node->left = NULL;
-        new_node->right = NULL;
-    }
-
-    return new_node;
-}
-
-Aig_Obj_t *buildLogicFromLTLNode_combinationalOnly( Aig_Man_t *pAig, ltlNode *pLtlNode );
-
-static inline int isNotVarNameSymbol( char c )
-{
-    return ( c == ' ' || c == '\t' || c == '\n' || c == ':' || c == '\0' );
-}
-
-void Abc_FrameCopyLTLDataBase( Abc_Frame_t *pAbc, Abc_Ntk_t * pNtk )
-{
-    char *pLtlFormula, *tempFormula;
-    int i;
-
-    if( pAbc->vLTLProperties_global != NULL )
-    {
-//        printf("Deleting exisitng LTL database from the frame\n");
-        Vec_PtrFree( pAbc->vLTLProperties_global );
-        pAbc->vLTLProperties_global = NULL;
-    }
-    pAbc->vLTLProperties_global = Vec_PtrAlloc(Vec_PtrSize(pNtk->vLtlProperties));
-    Vec_PtrForEachEntry( char *, pNtk->vLtlProperties, pLtlFormula, i )
-    {
-        tempFormula = (char *)malloc( sizeof(char)*(strlen(pLtlFormula)+1) );
-        sprintf( tempFormula, "%s", pLtlFormula );
-        Vec_PtrPush( pAbc->vLTLProperties_global, tempFormula );
-    }
-}
-
-char *getVarName( char *suffixFormula, int startLoc, int *endLocation )
-{
-    int i = startLoc, length;
-    char *name;
-
-    if( isNotVarNameSymbol( suffixFormula[startLoc] ) )
-        return NULL;
-
-    while( !isNotVarNameSymbol( suffixFormula[i] ) )
-        i++;
-    *endLocation = i;
-    length = i - startLoc;
-    name = (char *)malloc( sizeof(char) * (length + 1));
-    for( i=0; i<length; i++ )
-        name[i] = suffixFormula[i+startLoc];
-    name[i] = '\0';
-
-    return name;
-}
-
-
-int startOfSuffixString = 0;
-
-int isUnexpectedEOS( char *formula, int index )
-{
-    assert( formula );
-    if( index >= (int)strlen( formula ) )
-    {
-        printf("\nInvalid LTL formula: unexpected end of string..." );
-        return 1;
-    }
-    return 0;
-}
-
-int isTemporalOperator( char *formula, int index )
-{
-    if( !(isUnexpectedEOS( formula, index ) || formula[ index ] == 'G' || formula[ index ] == 'F' || formula[ index ] == 'U' || formula[ index ] == 'X') )
-    {
-        printf("\nInvalid LTL formula: expecting temporal operator at the position %d....\n", index);
-        return 0;
-    }
-    return 1;
-}
-
-ltlNode *readLtlFormula( char *formula )
-{
-    char ch;
-    char *varName;
-    int formulaLength, rememberEnd;
-    int i = startOfSuffixString;
-    ltlNode *curr_node, *temp_node_left, *temp_node_right;
-    char prevChar;
-    
-    formulaLength = strlen( formula );
-    if( isUnexpectedEOS( formula, startOfSuffixString ) )
-    {
-        printf("\nFAULTING POINT: formula = %s\nstartOfSuffixString = %d, formula[%d] = %c\n\n", formula, startOfSuffixString, startOfSuffixString - 1, formula[startOfSuffixString-1]);
-        return NULL;
-    }
-            
-    while( i < formulaLength )
-    {
-        ch = formula[i];
-
-        switch(ch){
-            case ' ':
-            case '\n':
-            case '\r':
-            case '\t':
-            case '\v':
-            case '\f':
-                        i++;
-                        startOfSuffixString = i;
-                        break;
-            case ':':
-                        i++;
-                        if( !isTemporalOperator( formula, i ) )
-                            return NULL;
-                        startOfSuffixString = i;
-                        break;
-            case 'G':
-                        prevChar = formula[i-1];
-                        if( prevChar == ':' ) //i.e. 'G' is a temporal operator
-                        {
-                            i++;
-                            startOfSuffixString = i;
-                            temp_node_left = readLtlFormula( formula );
-                            if( temp_node_left == NULL )
-                                return NULL;
-                            else
-                            {
-                                curr_node = generateTypedNode(GLOBALLY);
-                                curr_node->left = temp_node_left;
-                                return curr_node;
-                            }
-                        }
-                        else    //i.e. 'G' must be starting a variable name
-                        {
-                            varName = getVarName( formula, i, &rememberEnd );
-                            if( !varName )
-                            {
-                                printf("\nInvalid LTL formula: expecting valid variable name token...aborting" );
-                                return NULL;
-                            }
-                            curr_node = generateTypedNode(BOOL);
-                            curr_node->name = varName;
-                            i = rememberEnd;
-                            startOfSuffixString = i;
-                            return curr_node;
-                        }
-            case 'F':
-                        prevChar = formula[i-1];
-                        if( prevChar == ':' ) //i.e. 'F' is a temporal operator
-                        {
-                            i++;
-                            startOfSuffixString = i;
-                            temp_node_left = readLtlFormula( formula );
-                            if( temp_node_left == NULL )
-                                return NULL;
-                            else
-                            {
-                                curr_node = generateTypedNode(EVENTUALLY);
-                                curr_node->left = temp_node_left;
-                                return curr_node;
-                            }
-                        }
-                        else //i.e. 'F' must be starting a variable name
-                        {
-                            varName = getVarName( formula, i, &rememberEnd );
-                            if( !varName )
-                            {
-                                printf("\nInvalid LTL formula: expecting valid variable name token...aborting" );
-                                return NULL;
-                            }
-                            curr_node = generateTypedNode(BOOL);
-                            curr_node->name = varName;
-                            i = rememberEnd;
-                            startOfSuffixString = i;
-                            return curr_node;
-                        }    
-            case 'X':
-                        prevChar = formula[i-1];
-                        if( prevChar == ':' ) //i.e. 'X' is a temporal operator
-                        {
-                            i++;
-                            startOfSuffixString = i;
-                            temp_node_left = readLtlFormula( formula );
-                            if( temp_node_left == NULL )
-                                return NULL;
-                            else
-                            {
-                                curr_node = generateTypedNode(NEXT);
-                                curr_node->left = temp_node_left;
-                                return curr_node;
-                            }
-                        }
-                        else //i.e. 'X' must be starting a variable name
-                        {
-                            varName = getVarName( formula, i, &rememberEnd );
-                            if( !varName )
-                            {
-                                printf("\nInvalid LTL formula: expecting valid variable name token...aborting" );
-                                return NULL;
-                            }
-                            curr_node = generateTypedNode(BOOL);
-                            curr_node->name = varName;
-                            i = rememberEnd;
-                            startOfSuffixString = i;
-                            return curr_node;
-                        }    
-            case 'U':
-                        prevChar = formula[i-1];
-                        if( prevChar == ':' ) //i.e. 'X' is a temporal operator
-                        {
-                            i++;
-                            startOfSuffixString = i;
-                            temp_node_left = readLtlFormula( formula );
-                            if( temp_node_left == NULL )
-                                return NULL;
-                            temp_node_right = readLtlFormula( formula );
-                            if( temp_node_right == NULL )
-                            {
-                                //need to do memory management: if right subtree is NULL then left
-                                //subtree must be freed.
-                                return NULL;
-                            }
-                            curr_node = generateTypedNode(UNTIL);
-                            curr_node->left = temp_node_left;
-                            curr_node->right = temp_node_right;
-                            return curr_node;
-                        }
-                        else //i.e. 'U' must be starting a variable name
-                        {
-                            varName = getVarName( formula, i, &rememberEnd );
-                            if( !varName )
-                            {
-                                printf("\nInvalid LTL formula: expecting valid variable name token...aborting" );
-                                return NULL;
-                            }
-                            curr_node = generateTypedNode(BOOL);
-                            curr_node->name = varName;
-                            i = rememberEnd;
-                            startOfSuffixString = i;
-                            return curr_node;
-                        }    
-            case '+':
-                        i++;
-                        startOfSuffixString = i;
-                        temp_node_left = readLtlFormula( formula );
-                        if( temp_node_left == NULL )
-                            return NULL;
-                        temp_node_right = readLtlFormula( formula );
-                        if( temp_node_right == NULL )
-                        {
-                            //need to do memory management: if right subtree is NULL then left
-                            //subtree must be freed.
-                            return NULL;
-                        }
-                        curr_node = generateTypedNode(OR);
-                        curr_node->left = temp_node_left;
-                        curr_node->right = temp_node_right;
-                        return curr_node;
-            case '&':
-                        i++;
-                        startOfSuffixString = i;
-                        temp_node_left = readLtlFormula( formula );
-                        if( temp_node_left == NULL )
-                            return NULL;
-                        temp_node_right = readLtlFormula( formula );
-                        if( temp_node_right == NULL )
-                        {
-                            //need to do memory management: if right subtree is NULL then left
-                            //subtree must be freed.
-                            return NULL;
-                        }
-                        curr_node = generateTypedNode(AND);
-                        curr_node->left = temp_node_left;
-                        curr_node->right = temp_node_right;
-                        return curr_node;
-            case '!':
-                        i++;
-                        startOfSuffixString = i;
-                        temp_node_left = readLtlFormula( formula );
-                        if( temp_node_left == NULL )
-                            return NULL;
-                        else
-                        {
-                            curr_node = generateTypedNode(NOT);
-                            curr_node->left = temp_node_left;
-                            return curr_node;
-                        }
-            default:
-                varName = getVarName( formula, i, &rememberEnd );
-                if( !varName )
-                {
-                    printf("\nInvalid LTL formula: expecting valid variable name token...aborting" );
-                    return NULL;
-                }
-                curr_node = generateTypedNode(BOOL);
-                curr_node->name = varName;
-                i = rememberEnd;
-                startOfSuffixString = i;
-                return curr_node;
-        }
-    }
-    return NULL;
-}
-
-void resetGlobalVar()
-{
-    startOfSuffixString = 0;
-}
-
-ltlNode *parseFormulaCreateAST( char *inputFormula )
-{
-    ltlNode *temp;
-
-    temp = readLtlFormula( inputFormula );
-    //if( temp == NULL )
-    //    printf("\nAST creation failed for formula %s", inputFormula );
-    resetGlobalVar();
-    return temp;
-}
-
-void traverseAbstractSyntaxTree( ltlNode *node )
-{
-    switch(node->type){
-        case( AND ):
-            printf("& ");
-            assert( node->left != NULL );
-            assert( node->right != NULL );
-            traverseAbstractSyntaxTree( node->left );
-            traverseAbstractSyntaxTree( node->right );
-            return;
-        case( OR ):
-            printf("+ ");
-            assert( node->left != NULL );
-            assert( node->right != NULL );
-            traverseAbstractSyntaxTree( node->left );
-            traverseAbstractSyntaxTree( node->right );
-            return;
-        case( NOT ):
-            printf("~ ");
-            assert( node->left != NULL );
-            traverseAbstractSyntaxTree( node->left );
-            assert( node->right == NULL );
-            return;
-        case( GLOBALLY ):
-            printf("G ");
-            assert( node->left != NULL );
-            traverseAbstractSyntaxTree( node->left );
-            assert( node->right == NULL );
-            return;
-        case( EVENTUALLY ):
-            printf("F ");
-            assert( node->left != NULL );
-            traverseAbstractSyntaxTree( node->left );
-            assert( node->right == NULL );
-            return;
-        case( NEXT ):
-            printf("X ");
-            assert( node->left != NULL );
-            traverseAbstractSyntaxTree( node->left );
-            assert( node->right == NULL );
-            return;
-        case( UNTIL ):
-            printf("U ");
-            assert( node->left != NULL );
-            assert( node->right != NULL );
-            traverseAbstractSyntaxTree( node->left );
-            traverseAbstractSyntaxTree( node->right );
-            return;
-        case( BOOL ):
-            printf("%s ", node->name);
-            assert( node->left == NULL );
-            assert( node->right == NULL );
-            return;
-        default:
-            printf("\nUnsupported token type: Exiting execution\n");
-            exit(0);
-    }
-}
-
-void traverseAbstractSyntaxTree_postFix( ltlNode *node )
-{
-    switch(node->type){
-        case( AND ):
-            printf("( ");
-            assert( node->left != NULL );
-            assert( node->right != NULL );
-            traverseAbstractSyntaxTree_postFix( node->left );
-            printf("& ");
-            traverseAbstractSyntaxTree_postFix( node->right );
-            printf(") ");
-            return;
-        case( OR ):
-            printf("( ");
-            assert( node->left != NULL );
-            assert( node->right != NULL );
-            traverseAbstractSyntaxTree_postFix( node->left );
-            printf("+ ");
-            traverseAbstractSyntaxTree_postFix( node->right );
-            printf(") ");
-            return;
-        case( NOT ):
-            printf("~ ");
-            assert( node->left != NULL );
-            traverseAbstractSyntaxTree_postFix( node->left );
-            assert( node->right == NULL );
-            return;
-        case( GLOBALLY ):
-            printf("G ");
-            //printf("( ");
-            assert( node->left != NULL );
-            traverseAbstractSyntaxTree_postFix( node->left );
-            assert( node->right == NULL );
-            //printf(") ");
-            return;
-        case( EVENTUALLY ):
-            printf("F ");
-            //printf("( ");
-            assert( node->left != NULL );
-            traverseAbstractSyntaxTree_postFix( node->left );
-            assert( node->right == NULL );
-            //printf(") ");
-            return;
-        case( NEXT ):
-            printf("X ");
-            assert( node->left != NULL );
-            traverseAbstractSyntaxTree_postFix( node->left );
-            assert( node->right == NULL );
-            return;
-        case( UNTIL ):
-            printf("( ");
-            assert( node->left != NULL );
-            assert( node->right != NULL );
-            traverseAbstractSyntaxTree_postFix( node->left );
-            printf("U ");
-            traverseAbstractSyntaxTree_postFix( node->right );
-            printf(") ");
-            return;
-        case( BOOL ):
-            printf("%s ", node->name);
-            assert( node->left == NULL );
-            assert( node->right == NULL );
-            return;
-        default:
-            printf("\nUnsupported token type: Exiting execution\n");
-            exit(0);
-    }
-}
-
-void populateAigPointerUnitGF( Aig_Man_t *pAigNew, ltlNode *topASTNode, Vec_Ptr_t *vSignal, Vec_Vec_t *vAigGFMap )
-{
-    ltlNode *nextNode, *nextToNextNode;
-    int serialNumSignal;
-
-    switch( topASTNode->type ){
-        case AND:
-        case OR:
-        case IMPLY:
-            populateAigPointerUnitGF( pAigNew, topASTNode->left, vSignal, vAigGFMap );
-            populateAigPointerUnitGF( pAigNew, topASTNode->right, vSignal, vAigGFMap );
-            return;
-        case NOT:
-            populateAigPointerUnitGF( pAigNew, topASTNode->left, vSignal, vAigGFMap );
-            return;
-        case GLOBALLY:
-            nextNode = topASTNode->left;
-            assert( nextNode->type = EVENTUALLY );
-            nextToNextNode = nextNode->left;
-            if( nextToNextNode->type == BOOL )
-            {
-                assert( nextToNextNode->pObj );
-                serialNumSignal = Vec_PtrFind( vSignal, nextToNextNode->pObj );
-                if( serialNumSignal == -1 )
-                {                    
-                    Vec_PtrPush( vSignal, nextToNextNode->pObj );
-                    serialNumSignal = Vec_PtrFind( vSignal, nextToNextNode->pObj );
-                }
-                //Vec_PtrPush( vGLOBALLY, topASTNode );
-                Vec_VecPush( vAigGFMap, serialNumSignal, topASTNode );
-            }
-            else
-            {
-                assert( nextToNextNode->pObj == NULL );
-                buildLogicFromLTLNode_combinationalOnly( pAigNew, nextToNextNode );
-                serialNumSignal = Vec_PtrFind( vSignal, nextToNextNode->pObj );
-                if( serialNumSignal == -1 )
-                {
-                    Vec_PtrPush( vSignal, nextToNextNode->pObj );
-                    serialNumSignal = Vec_PtrFind( vSignal, nextToNextNode->pObj );
-                }
-                //Vec_PtrPush( vGLOBALLY, topASTNode );
-                Vec_VecPush( vAigGFMap, serialNumSignal, topASTNode );
-            }
-            return;
-        case BOOL:
-            return;
-        default:
-            printf("\nINVALID situation: aborting...\n");
-            exit(0);
-    }
-}
-
-Aig_Obj_t *buildLogicFromLTLNode_combinationalOnly( Aig_Man_t *pAigNew, ltlNode *pLtlNode )
-{
-    Aig_Obj_t *leftAigObj, *rightAigObj;
-
-    if( pLtlNode->pObj != NULL )
-        return pLtlNode->pObj;
-    else
-    {
-        assert( pLtlNode->type != BOOL );
-        switch( pLtlNode->type ){
-            case AND:
-                assert( pLtlNode->left ); assert( pLtlNode->right );
-                leftAigObj = buildLogicFromLTLNode_combinationalOnly( pAigNew, pLtlNode->left );
-                rightAigObj = buildLogicFromLTLNode_combinationalOnly( pAigNew, pLtlNode->right );
-                assert( leftAigObj ); assert( rightAigObj );
-                pLtlNode->pObj = Aig_And( pAigNew, leftAigObj, rightAigObj );
-                return pLtlNode->pObj;
-            case OR:
-                assert( pLtlNode->left ); assert( pLtlNode->right );
-                leftAigObj = buildLogicFromLTLNode_combinationalOnly( pAigNew, pLtlNode->left );
-                rightAigObj = buildLogicFromLTLNode_combinationalOnly( pAigNew, pLtlNode->right );
-                assert( leftAigObj ); assert( rightAigObj );
-                pLtlNode->pObj = Aig_Or( pAigNew, leftAigObj, rightAigObj );
-                return pLtlNode->pObj;
-            case NOT:
-                assert( pLtlNode->left ); assert( pLtlNode->right == NULL ); 
-                leftAigObj = buildLogicFromLTLNode_combinationalOnly( pAigNew, pLtlNode->left );
-                assert( leftAigObj );
-                pLtlNode->pObj = Aig_Not( leftAigObj );
-                return pLtlNode->pObj;
-            case GLOBALLY:
-            case EVENTUALLY:
-            case NEXT:
-            case UNTIL:
-                printf("FORBIDDEN node: ABORTING!!\n");
-                exit(0);
-            default:
-                printf("\nSerious ERROR: attempting to create AIG node from a temporal node\n");
-                exit(0);
-        }
-    }
-}
-
-Aig_Obj_t *buildLogicFromLTLNode( Aig_Man_t *pAig, ltlNode *pLtlNode )
-{
-    Aig_Obj_t *leftAigObj, *rightAigObj;
-
-    if( pLtlNode->pObj != NULL )
-        return pLtlNode->pObj;
-    else
-    {
-        assert( pLtlNode->type != BOOL );
-        switch( pLtlNode->type ){
-            case AND:
-                assert( pLtlNode->left ); assert( pLtlNode->right );
-                leftAigObj = buildLogicFromLTLNode( pAig, pLtlNode->left );
-                rightAigObj = buildLogicFromLTLNode( pAig, pLtlNode->right );
-                assert( leftAigObj ); assert( rightAigObj );
-                pLtlNode->pObj = Aig_And( pAig, leftAigObj, rightAigObj );
-                return pLtlNode->pObj;
-            case OR:
-                assert( pLtlNode->left ); assert( pLtlNode->right );
-                leftAigObj = buildLogicFromLTLNode( pAig, pLtlNode->left );
-                rightAigObj = buildLogicFromLTLNode( pAig, pLtlNode->right );
-                assert( leftAigObj ); assert( rightAigObj );
-                pLtlNode->pObj = Aig_Or( pAig, leftAigObj, rightAigObj );
-                return pLtlNode->pObj;
-            case NOT:
-                assert( pLtlNode->left ); assert( pLtlNode->right == NULL ); 
-                leftAigObj = buildLogicFromLTLNode( pAig, pLtlNode->left );
-                assert( leftAigObj );
-                pLtlNode->pObj = Aig_Not( leftAigObj );
-                return pLtlNode->pObj;
-            case GLOBALLY:
-            case EVENTUALLY:
-            case NEXT:
-            case UNTIL:
-                printf("\nAttempting to create circuit with missing AIG pointer in a TEMPORAL node: ABORTING!!\n");
-                exit(0);
-            default:
-                printf("\nSerious ERROR: attempting to create AIG node from a temporal node\n");
-                exit(0);
-        }
-    }
-}
-
-int isNonTemporalSubformula( ltlNode *topNode )
-{
-    switch( topNode->type ){
-        case AND:
-        case OR:
-        case IMPLY:
-            return isNonTemporalSubformula( topNode->left) && isNonTemporalSubformula( topNode->right ) ;
-        case NOT:
-            assert( topNode->right == NULL );
-            return isNonTemporalSubformula( topNode->left );
-        case BOOL:
-            return 1;
-        default:
-            return 0;
-    }
-}
-
-int isWellFormed( ltlNode *topNode )
-{
-    ltlNode *nextNode;
-
-    switch( topNode->type ){
-        case AND:
-        case OR:
-        case IMPLY:
-            return isWellFormed( topNode->left) && isWellFormed( topNode->right ) ;
-        case NOT:
-            assert( topNode->right == NULL );
-            return isWellFormed( topNode->left );
-        case BOOL:
-            return 1;
-        case GLOBALLY:
-            nextNode = topNode->left;
-            assert( topNode->right == NULL );
-            if( nextNode->type != EVENTUALLY )
-                return 0;
-            else
-            {
-                assert( nextNode->right == NULL );
-                return isNonTemporalSubformula( nextNode->left );
-            }
-        default:
-            return 0;
-    }
-}
-
-int checkBooleanConstant( char *targetName )
-{
-    if( strcmp( targetName, "true" ) == 0 ) 
-        return 1;
-    if( strcmp( targetName, "false" ) == 0 )
-        return 0;
-    return -1;
-}
-
-int checkSignalNameExistence( Abc_Ntk_t *pNtk, ltlNode *topASTNode )
-{
-    char *targetName;
-    Abc_Obj_t * pNode;
-    int i;
-        
-    switch( topASTNode->type ){
-        case BOOL:
-            targetName = topASTNode->name;
-            //printf("\nTrying to match name %s\n", targetName);
-            if( checkBooleanConstant( targetName ) != -1 )
-                return 1;
-            Abc_NtkForEachPo( pNtk, pNode, i )
-            {
-                if( strcmp( Abc_ObjName( pNode ), targetName ) == 0 )
-                {
-                    //printf("\nVariable name \"%s\" MATCHED\n", targetName);
-                    return 1;
-                }
-            }
-            printf("\nVariable name \"%s\" not found in the PO name list\n", targetName);
-            return 0;
-        case AND:
-        case OR:
-        case IMPLY:
-        case UNTIL:
-            assert( topASTNode->left != NULL );
-            assert( topASTNode->right != NULL );
-            return checkSignalNameExistence( pNtk, topASTNode->left ) && checkSignalNameExistence( pNtk, topASTNode->right );
-            
-        case NOT:
-        case NEXT:
-        case GLOBALLY:
-        case EVENTUALLY:
-            assert( topASTNode->left != NULL );
-            assert( topASTNode->right == NULL );
-            return checkSignalNameExistence( pNtk, topASTNode->left );
-        default:
-            printf("\nUNSUPPORTED LTL NODE TYPE:: Aborting execution\n");
-            exit(0);
-    }
-}
-
-void populateBoolWithAigNodePtr( Abc_Ntk_t *pNtk, Aig_Man_t *pAigOld, Aig_Man_t *pAigNew, ltlNode *topASTNode )
-{
-    char *targetName;
-    Abc_Obj_t * pNode;
-    int i;
-    Aig_Obj_t *pObj, *pDriverImage;
-    
-    switch( topASTNode->type ){
-        case BOOL:
-            targetName = topASTNode->name;
-            if( checkBooleanConstant( targetName ) == 1 )
-            {
-                topASTNode->pObj = Aig_ManConst1( pAigNew );
-                return;
-            }
-            if( checkBooleanConstant( targetName ) == 0 )
-            {
-                topASTNode->pObj = Aig_Not(topASTNode->pObj = Aig_ManConst1( pAigNew ));
-                return;
-            }
-            Abc_NtkForEachPo( pNtk, pNode, i )
-                if( strcmp( Abc_ObjName( pNode ), targetName ) == 0 )
-                {
-                    pObj = Aig_ManPo( pAigOld, i );
-                    assert( Aig_ObjIsPo( pObj ));
-                    pDriverImage = Aig_NotCond((Aig_Obj_t *)Aig_Regular(Aig_ObjChild0( pObj ))->pData, Aig_ObjFaninC0(pObj));
-                    topASTNode->pObj = pDriverImage;
-                    return;
-                }
-            assert(0);
-        case AND:
-        case OR:
-        case IMPLY:
-        case UNTIL:
-            assert( topASTNode->left != NULL );
-            assert( topASTNode->right != NULL );
-            populateBoolWithAigNodePtr( pNtk, pAigOld, pAigNew, topASTNode->left );
-            populateBoolWithAigNodePtr( pNtk, pAigOld, pAigNew, topASTNode->right );
-            return;
-        case NOT:
-        case NEXT:
-        case GLOBALLY:
-        case EVENTUALLY:
-            assert( topASTNode->left != NULL );
-            assert( topASTNode->right == NULL );
-            populateBoolWithAigNodePtr( pNtk, pAigOld, pAigNew, topASTNode->left );
-            return;
-        default:
-            printf("\nUNSUPPORTED LTL NODE TYPE:: Aborting execution\n");
-            exit(0);
-    }
-}
-
-int checkAllBoolHaveAIGPointer( ltlNode *topASTNode )
-{
-    
-    switch( topASTNode->type ){
-        case BOOL:
-            if( topASTNode->pObj != NULL )
-                return 1;
-            else
-            {
-                printf("\nfaulting PODMANDYO topASTNode->name = %s\n", topASTNode->name);
-                return 0;
-            }
-        case AND:
-        case OR:
-        case IMPLY:
-        case UNTIL:
-            assert( topASTNode->left != NULL );
-            assert( topASTNode->right != NULL );
-            return checkAllBoolHaveAIGPointer( topASTNode->left ) && checkAllBoolHaveAIGPointer( topASTNode->right );
-            
-        case NOT:
-        case NEXT:
-        case GLOBALLY:
-        case EVENTUALLY:
-            assert( topASTNode->left != NULL );
-            assert( topASTNode->right == NULL );
-            return checkAllBoolHaveAIGPointer( topASTNode->left );
-        default:
-            printf("\nUNSUPPORTED LTL NODE TYPE:: Aborting execution\n");
-            exit(0);
-    }
-}
-
-void setAIGNodePtrOfGloballyNode( ltlNode *astNode, Aig_Obj_t *pObjLo )
-{
-    astNode->pObj = pObjLo;
-}
-            
-Aig_Obj_t *retriveAIGPointerFromLTLNode( ltlNode *astNode )
-{
-    return astNode->pObj;
-}
-
-
-ABC_NAMESPACE_IMPL_END
diff --git a/src/aig/live/module.make b/src/aig/live/module.make
deleted file mode 100644
index 46a9ed3c..00000000
--- a/src/aig/live/module.make
+++ /dev/null
@@ -1,3 +0,0 @@
-SRC +=  src/aig/live/liveness.c \
-    src/aig/live/liveness_sim.c \
-    src/aig/live/ltl_parser.c
diff --git a/src/aig/llb/llb.c b/src/aig/llb/llb.c
deleted file mode 100644
index 348c0622..00000000
--- a/src/aig/llb/llb.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb.h b/src/aig/llb/llb.h
deleted file mode 100644
index e5fa6956..00000000
--- a/src/aig/llb/llb.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD-based reachability.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - May 8, 2010.]
-
-  Revision    [$Id: llb.h,v 1.00 2010/05/08 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __LLB_H__
-#define __LLB_H__
-
- 
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-  
-typedef struct Gia_ParLlb_t_ Gia_ParLlb_t;
-struct Gia_ParLlb_t_
-{
-    int         nBddMax;       // maximum BDD size
-    int         nIterMax;      // maximum iteration count
-    int         nClusterMax;   // maximum cluster size
-    int         nHintDepth;    // the number of times to cofactor
-    int         HintFirst;     // the number of first hint to use
-    int         fUseFlow;      // use flow computation
-    int         nVolumeMax;    // the largest volume
-    int         nVolumeMin;    // the smallest volume
-    int         nPartValue;    // partitioning value
-    int         fBackward;     // enable backward reachability
-    int         fReorder;      // enable dynamic variable reordering
-    int         fIndConstr;    // extract inductive constraints
-    int         fUsePivots;    // use internal pivot variables
-    int         fCluster;      // use partition clustering
-    int         fSchedule;     // use cluster scheduling
-    int         fDumpReached;  // dump reached states into a file
-    int         fVerbose;      // print verbose information
-    int         fVeryVerbose;  // print dependency matrices
-    int         fSilent;       // do not print any infomation
-    int         fSkipReach;    // skip reachability (preparation phase only)
-    int         fSkipOutCheck; // does not check the property output
-    int         TimeLimit;     // time limit for one reachability run
-    int         TimeLimitGlo;  // time limit for all reachability runs
-    // internal parameters
-    int         TimeTarget;    // the time to stop
-    int         iFrame;        // explored up to this frame
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== llbCore.c ==========================================================*/
-extern void     Llb_ManSetDefaultParams( Gia_ParLlb_t * pPars );
-/*=== llb4Nonlin.c ==========================================================*/
-extern int      Llb_Nonlin4CoreReach( Aig_Man_t * pAig, Gia_ParLlb_t * pPars );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/llb/llb1Cluster.c b/src/aig/llb/llb1Cluster.c
deleted file mode 100644
index 758994b5..00000000
--- a/src/aig/llb/llb1Cluster.c
+++ /dev/null
@@ -1,357 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb1Cluster.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Clustering algorithm.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
- 
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb1Cluster.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-#include "extra.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManComputeCommonQuant( Llb_Mtr_t * p, int iCol1, int iCol2 )
-{
-    int iVar, Weight = 0;
-    for ( iVar = 0; iVar < p->nRows - p->nFfs; iVar++ )
-    {
-        // count each removed variable as 2
-        if ( p->pMatrix[iCol1][iVar] == 1 && p->pMatrix[iCol2][iVar] == 1 && p->pRowSums[iVar] == 2 )
-            Weight += 2;
-        // count each added variale as -1
-        else if ( (p->pMatrix[iCol1][iVar] == 1 && p->pMatrix[iCol2][iVar] == 0) || 
-                  (p->pMatrix[iCol1][iVar] == 0 && p->pMatrix[iCol2][iVar] == 1) )
-            Weight--;
-    }
-    return Weight;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManComputeBestQuant( Llb_Mtr_t * p )
-{
-    int i, k, WeightBest = -100000, WeightCur, RetValue = -1;
-    for ( i = 1; i < p->nCols-1; i++ )
-    for ( k = i+1; k < p->nCols-1; k++ )
-    {
-        if ( p->pColSums[i] == 0 || p->pColSums[i] > p->pMan->pPars->nClusterMax )
-            continue;
-        if ( p->pColSums[k] == 0 || p->pColSums[k] > p->pMan->pPars->nClusterMax )
-            continue;
-
-        WeightCur = Llb_ManComputeCommonQuant( p, i, k );
-        if ( WeightCur <= 0 )
-            continue;
-        if ( WeightBest < WeightCur )
-        {
-            WeightBest = WeightCur;
-            RetValue   = (i << 16) | k;
-        }
-    }
-//    printf( "Choosing best quant Weight %4d\n", WeightCur );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-float ** Llb_ManComputeQuant( Llb_Mtr_t * p )
-{
-    float ** pCosts;
-    int i, k;
-    // alloc and clean
-    pCosts = (float **)Extra_ArrayAlloc( p->nCols, p->nCols, sizeof(float) );
-    for ( i = 0; i < p->nCols; i++ )
-    for ( k = 0; k < p->nCols; k++ )
-        pCosts[i][i] = 0.0;
-    // fill up
-    for ( i = 1; i < p->nCols-1; i++ )
-    for ( k = i+1; k < p->nCols-1; k++ )
-        pCosts[i][k] = pCosts[k][i] = Llb_ManComputeCommonQuant( p, i, k );
-    return pCosts;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-float Llb_ManComputeCommonAttr( Llb_Mtr_t * p, int iCol1, int iCol2 )
-{
-    int iVar, CountComm = 0, CountDiff = 0;
-    for ( iVar = 0; iVar < p->nRows - p->nFfs; iVar++ )
-    {
-        if ( p->pMatrix[iCol1][iVar] == 1 && p->pMatrix[iCol2][iVar] == 1 )
-            CountComm++;
-        else if ( p->pMatrix[iCol1][iVar] == 1 || p->pMatrix[iCol2][iVar] == 1 )
-            CountDiff++;
-    }
-/*
-    printf( "Attr cost for %4d and %4d:  %4d %4d (%5.2f)\n", 
-        iCol1, iCol2, 
-        CountDiff, CountComm, 
-        -1.0 * CountDiff / ( CountComm + CountDiff ) );
-*/
-    return -1.0 * CountDiff / ( CountComm + CountDiff );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManComputeBestAttr( Llb_Mtr_t * p )
-{
-    float WeightBest = -100000, WeightCur;
-    int i, k, RetValue = -1;
-    for ( i = 1; i < p->nCols-1; i++ )
-    for ( k = i+1; k < p->nCols-1; k++ )
-    {
-        if ( p->pColSums[i] == 0 || p->pColSums[i] > p->pMan->pPars->nClusterMax )
-            continue;
-        if ( p->pColSums[k] == 0 || p->pColSums[k] > p->pMan->pPars->nClusterMax )
-            continue;
-        WeightCur = Llb_ManComputeCommonAttr( p, i, k );
-        if ( WeightBest < WeightCur )
-        {
-            WeightBest = WeightCur;
-            RetValue   = (i << 16) | k;
-        }
-    }
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-float ** Llb_ManComputeAttr( Llb_Mtr_t * p )
-{
-    float ** pCosts;
-    int i, k;
-    // alloc and clean
-    pCosts = (float **)Extra_ArrayAlloc( p->nCols, p->nCols, sizeof(float) );
-    for ( i = 0; i < p->nCols; i++ )
-    for ( k = 0; k < p->nCols; k++ )
-        pCosts[i][i] = 0.0;
-    // fill up
-    for ( i = 1; i < p->nCols-1; i++ )
-    for ( k = i+1; k < p->nCols-1; k++ )
-        pCosts[i][k] = pCosts[k][i] = Llb_ManComputeCommonAttr( p, i, k );
-    return pCosts;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of variables that will be saved.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MtrCombineSelectedColumns( Llb_Mtr_t * p, int iGrp1, int iGrp2 )
-{
-    int iVar;
-    assert( iGrp1 >= 1 && iGrp1 < p->nCols - 1 );
-    assert( iGrp2 >= 1 && iGrp2 < p->nCols - 1 );
-    assert( p->pColGrps[iGrp1] != NULL );
-    assert( p->pColGrps[iGrp2] != NULL );
-    for ( iVar = 0; iVar < p->nRows; iVar++ )
-    {
-        if ( p->pMatrix[iGrp1][iVar] == 1 && p->pMatrix[iGrp2][iVar] == 1 )
-            p->pRowSums[iVar]--;
-        if ( p->pMatrix[iGrp1][iVar] == 0 && p->pMatrix[iGrp2][iVar] == 1 )
-        {
-            p->pMatrix[iGrp1][iVar] = 1;
-            p->pColSums[iGrp1]++;
-        }
-        if ( p->pMatrix[iGrp2][iVar] == 1 )
-            p->pMatrix[iGrp2][iVar] = 0;
-    }
-    p->pColSums[iGrp2] = 0;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Combines one pair of columns.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManClusterOne( Llb_Mtr_t * p, int iCol1, int iCol2 )
-{
-    int fVerbose = 0;
-    Llb_Grp_t * pGrp;
-    int iVar;
-
-    if ( fVerbose )
-    {
-        printf( "Combining %d and %d\n", iCol1, iCol2 );
-        for ( iVar = 0; iVar < p->nRows; iVar++ )
-        {
-            if ( p->pMatrix[iCol1][iVar] == 0 && p->pMatrix[iCol2][iVar] == 0 )
-                continue;
-            printf( "%3d : %c%c\n", iVar, 
-                p->pMatrix[iCol1][iVar]? '*':' ', 
-                p->pMatrix[iCol2][iVar]? '*':' ' );
-        }
-    }
-    pGrp = Llb_ManGroupsCombine( p->pColGrps[iCol1], p->pColGrps[iCol2] );
-    Llb_MtrCombineSelectedColumns( p, iCol1, iCol2 );
-    p->pColGrps[iCol1] = pGrp;
-    p->pColGrps[iCol2] = NULL;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes empty columns.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManClusterCompress( Llb_Mtr_t * p )
-{
-    int i, k = 0;
-    for ( i = 0; i < p->nCols; i++ )
-    {
-        if ( p->pColGrps[i] == NULL )
-        {
-            assert( p->pColSums[i] == 0 );
-            assert( p->pMatrix[i] != NULL );
-            ABC_FREE( p->pMatrix[i] );
-            continue;
-        }
-        p->pMatrix[k]  = p->pMatrix[i];
-        p->pColGrps[k] = p->pColGrps[i];
-        p->pColSums[k] = p->pColSums[i];
-        k++;
-    }
-    p->nCols = k;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Combines one pair of columns.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManCluster( Llb_Mtr_t * p )
-{
-    int RetValue;
-    do
-    {
-        do {
-            RetValue = Llb_ManComputeBestQuant( p );
-            if ( RetValue > 0 )
-                Llb_ManClusterOne( p, RetValue >> 16, RetValue & 0xffff );
-        }
-        while ( RetValue > 0 );
-
-        RetValue = Llb_ManComputeBestAttr( p );
-        if ( RetValue > 0 )
-            Llb_ManClusterOne( p, RetValue >> 16, RetValue & 0xffff );
-
-        Llb_MtrVerifyMatrix( p );
-    }
-    while ( RetValue > 0 );
-
-    Llb_ManClusterCompress( p );
-
-    Llb_MtrVerifyMatrix( p );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb1Constr.c b/src/aig/llb/llb1Constr.c
deleted file mode 100644
index 67fb30ba..00000000
--- a/src/aig/llb/llb1Constr.c
+++ /dev/null
@@ -1,313 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb1Constr.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Computing inductive constraints.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb1Constr.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the array of constraint candidates.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManCountEntries( Vec_Int_t * vCands )
-{
-    int i, Entry, Counter = 0;
-    Vec_IntForEachEntry( vCands, Entry, i )
-        Counter += ((Entry == 0) || (Entry == 1));
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the array of constraint candidates.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManPrintEntries( Aig_Man_t * p, Vec_Int_t * vCands )
-{
-    int i, Entry;
-    if ( vCands == NULL )
-    {
-        printf( "There is no hints.\n" );
-        return;
-    }
-    Entry = Llb_ManCountEntries(vCands);
-    printf( "\n*** Using %d hint%s:\n", Entry, (Entry != 1 ? "s":"") );
-    Vec_IntForEachEntry( vCands, Entry, i )
-    {
-        if ( Entry != 0 && Entry != 1 )
-            continue;
-        printf( "%c", Entry ? '+' : '-' );
-        printf( "%-6d : ", i );
-        Aig_ObjPrint( p, Aig_ManObj(p, i) );
-        printf( "\n" );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Dereference BDD nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManDerefenceBdds( Aig_Man_t * p, DdManager * dd )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManForEachObj( p, pObj, i )
-        Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the array of constraint candidates.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_ManComputeIndCase_rec( Aig_Man_t * p, Aig_Obj_t * pObj, DdManager * dd, Vec_Ptr_t * vBdds )
-{
-    DdNode * bBdd0, * bBdd1;
-    DdNode * bFunc = (DdNode *)Vec_PtrEntry( vBdds, Aig_ObjId(pObj) );
-    if ( bFunc != NULL )
-        return bFunc;
-    assert( Aig_ObjIsNode(pObj) );
-    bBdd0 = Llb_ManComputeIndCase_rec( p, Aig_ObjFanin0(pObj), dd, vBdds ); 
-    bBdd1 = Llb_ManComputeIndCase_rec( p, Aig_ObjFanin1(pObj), dd, vBdds ); 
-    bBdd0 = Cudd_NotCond( bBdd0, Aig_ObjFaninC0(pObj) );
-    bBdd1 = Cudd_NotCond( bBdd1, Aig_ObjFaninC1(pObj) );
-    bFunc = Cudd_bddAnd( dd, bBdd0, bBdd1 );  Cudd_Ref( bFunc );
-    Vec_PtrWriteEntry( vBdds, Aig_ObjId(pObj), bFunc );
-    return bFunc;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the array of constraint candidates.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManComputeIndCase( Aig_Man_t * p, DdManager * dd, Vec_Int_t * vNodes )
-{
-    Vec_Ptr_t * vBdds;
-    Aig_Obj_t * pObj;
-    DdNode * bFunc;
-    int i, Entry;
-    vBdds = Vec_PtrStart( Aig_ManObjNumMax(p) );
-    bFunc = Cudd_ReadOne(dd); Cudd_Ref( bFunc );
-    Vec_PtrWriteEntry( vBdds, Aig_ObjId(Aig_ManConst1(p)), bFunc );
-    Saig_ManForEachPi( p, pObj, i )
-    {
-        bFunc = Cudd_bddIthVar( dd, Aig_ManPiNum(p) + i );  Cudd_Ref( bFunc );
-        Vec_PtrWriteEntry( vBdds, Aig_ObjId(pObj), bFunc );
-    }
-    Saig_ManForEachLi( p, pObj, i )
-    {
-        bFunc = (DdNode *)pObj->pData;  Cudd_Ref( bFunc );
-        Vec_PtrWriteEntry( vBdds, Aig_ObjId(Saig_ObjLiToLo(p, pObj)), bFunc );
-    }
-    Vec_IntForEachEntry( vNodes, Entry, i )
-    { 
-        if ( Entry != 0 && Entry != 1 )
-            continue;
-        pObj = Aig_ManObj( p, i );
-        bFunc = Llb_ManComputeIndCase_rec( p, pObj, dd, vBdds );
-        if ( Entry == 0 )
-        {
-//            Extra_bddPrint( dd, Cudd_Not(pObj->pData) );  printf( "\n" );
-//            Extra_bddPrint( dd, Cudd_Not(bFunc) );        printf( "\n" );
-            if ( !Cudd_bddLeq( dd, Cudd_Not(pObj->pData), Cudd_Not(bFunc) ) )
-                Vec_IntWriteEntry( vNodes, i, -1 );
-        }
-        else if ( Entry == 1 )
-        {
-//            Extra_bddPrint( dd, pObj->pData );  printf( "\n" );
-//            Extra_bddPrint( dd, bFunc );        printf( "\n" );
-            if ( !Cudd_bddLeq( dd, (DdNode *)pObj->pData, bFunc ) )
-                Vec_IntWriteEntry( vNodes, i, -1 );
-        }
-    }
-    Vec_PtrForEachEntry( DdNode *, vBdds, bFunc, i )
-        if ( bFunc )
-            Cudd_RecursiveDeref( dd, bFunc );
-    Vec_PtrFree( vBdds );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the array of constraint candidates.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_ManComputeBaseCase( Aig_Man_t * p, DdManager * dd )
-{
-    Vec_Int_t * vNodes;
-    Aig_Obj_t * pObj, * pRoot;
-    int i;
-    pRoot = Aig_ManPo( p, 0 );
-    vNodes = Vec_IntStartFull( Aig_ManObjNumMax(p) );
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
-            continue;
-        if ( Cudd_bddLeq( dd, (DdNode *)pObj->pData, Cudd_Not(pRoot->pData) ) )
-            Vec_IntWriteEntry( vNodes, i, 1 );
-        else if ( Cudd_bddLeq( dd, Cudd_Not((DdNode *)pObj->pData), Cudd_Not(pRoot->pData) ) )
-            Vec_IntWriteEntry( vNodes, i, 0 );
-    }
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Constructs global BDDs for each object in the AIG manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdManager * Llb_ManConstructGlobalBdds( Aig_Man_t * p )
-{
-    DdManager * dd;
-    DdNode * bBdd0, * bBdd1;
-    Aig_Obj_t * pObj;
-    int i;
-    dd = Cudd_Init( Aig_ManPiNum(p), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    Cudd_AutodynEnable( dd,  CUDD_REORDER_SYMM_SIFT );
-    pObj = Aig_ManConst1(p);
-    pObj->pData = Cudd_ReadOne(dd);  Cudd_Ref( (DdNode *)pObj->pData );
-    Aig_ManForEachPi( p, pObj, i )
-    {
-        pObj->pData = Cudd_bddIthVar(dd, i);  Cudd_Ref( (DdNode *)pObj->pData );
-    }
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        bBdd0 = Cudd_NotCond( (DdNode *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-        bBdd1 = Cudd_NotCond( (DdNode *)Aig_ObjFanin1(pObj)->pData, Aig_ObjFaninC1(pObj) );
-        pObj->pData = Cudd_bddAnd( dd, bBdd0, bBdd1 );   Cudd_Ref( (DdNode *)pObj->pData );
-    }
-    Aig_ManForEachPo( p, pObj, i )
-    {
-        pObj->pData = Cudd_NotCond( (DdNode *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );  Cudd_Ref( (DdNode *)pObj->pData );
-    }
-    return dd;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives inductive constraints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_ManDeriveConstraints( Aig_Man_t * p )
-{
-    DdManager * dd;
-    Vec_Int_t * vNodes;
-    if ( Saig_ManPoNum(p) != 1 )
-    {
-        printf( "The AIG has %d property outputs.\n", Saig_ManPoNum(p) );
-        return NULL;
-    }
-    assert( Saig_ManPoNum(p) == 1 );
-    dd = Llb_ManConstructGlobalBdds( p );
-    vNodes = Llb_ManComputeBaseCase( p, dd );
-    if ( Llb_ManCountEntries(vNodes) > 0 )
-        Llb_ManComputeIndCase( p, dd, vNodes );
-    if ( Llb_ManCountEntries(vNodes) == 0 )
-        Vec_IntFreeP( &vNodes );
-    Llb_ManDerefenceBdds( p, dd );
-    Extra_StopManager( dd );
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Tests derived constraints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManConstrTest( Aig_Man_t * p )
-{
-    Vec_Int_t * vNodes;
-    vNodes = Llb_ManDeriveConstraints( p );
-    Llb_ManPrintEntries( p, vNodes );
-    Vec_IntFreeP( &vNodes );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb1Core.c b/src/aig/llb/llb1Core.c
deleted file mode 100644
index ad2c5934..00000000
--- a/src/aig/llb/llb1Core.c
+++ /dev/null
@@ -1,222 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb1Core.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Top-level procedure.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb1Core.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-#include "gia.h"
-#include "giaAig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
- 
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
- 
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManSetDefaultParams( Gia_ParLlb_t * p )
-{
-    memset( p, 0, sizeof(Gia_ParLlb_t) );
-    p->nBddMax       = 10000000;
-    p->nIterMax      = 10000000;
-    p->nClusterMax   =       20;
-    p->nHintDepth    =        0;
-    p->HintFirst     =        0;
-    p->fUseFlow      =        0;  // use flow 
-    p->nVolumeMax    =      100;  // max volume
-    p->nVolumeMin    =       30;  // min volume
-    p->nPartValue    =        5;  // partitioning value
-    p->fBackward     =        0;  // forward by default
-    p->fReorder      =        1;
-    p->fIndConstr    =        0;
-    p->fUsePivots    =        0;
-    p->fCluster      =        0;
-    p->fSchedule     =        0;
-    p->fDumpReached  =        0;
-    p->fVerbose      =        0;
-    p->fVeryVerbose  =        0;
-    p->fSilent       =        0;
-    p->TimeLimit     =        0;
-//    p->TimeLimit     =        0;
-    p->TimeLimitGlo  =        0;
-    p->TimeTarget    =        0;
-    p->iFrame        =       -1;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Prints statistics about MFFCs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManPrintAig( Llb_Man_t * p )
-{
-    Abc_Print( 1, "pi =%3d  ",    Saig_ManPiNum(p->pAig) );
-    Abc_Print( 1, "po =%3d  ",    Saig_ManPoNum(p->pAig) );
-    Abc_Print( 1, "ff =%3d  ",    Saig_ManRegNum(p->pAig) );
-    Abc_Print( 1, "int =%5d  ",   Vec_IntSize(p->vVar2Obj)-Aig_ManPiNum(p->pAig)-Saig_ManRegNum(p->pAig) );
-    Abc_Print( 1, "var =%5d  ",   Vec_IntSize(p->vVar2Obj) );
-    Abc_Print( 1, "part =%5d  ",  Vec_PtrSize(p->vGroups)-2 );
-    Abc_Print( 1, "and =%5d  ",   Aig_ManNodeNum(p->pAig) );
-    Abc_Print( 1, "lev =%4d  ",   Aig_ManLevelNum(p->pAig) );
-//    Abc_Print( 1, "cut =%4d  ",   Llb_ManCrossCut(p->pAig) );
-    Abc_Print( 1, "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManModelCheckAig( Aig_Man_t * pAigGlo, Gia_ParLlb_t * pPars, Vec_Int_t * vHints, DdManager ** pddGlo )
-{
-    Llb_Man_t * p = NULL; 
-    Aig_Man_t * pAig;
-    int RetValue = -1;
-    int clk = clock();
-
-    if ( pPars->fIndConstr )
-    {
-        assert( vHints == NULL );
-        vHints = Llb_ManDeriveConstraints( pAigGlo );
-    }
-
-    // derive AIG for hints
-    if ( vHints == NULL )
-        pAig = Aig_ManDupSimple( pAigGlo );
-    else
-    {
-        if ( pPars->fVerbose )
-            Llb_ManPrintEntries( pAigGlo, vHints );
-        pAig = Aig_ManDupSimpleWithHints( pAigGlo, vHints );
-    }
-
-
-    if ( pPars->fUseFlow )
-    {
-//        p = Llb_ManStartFlow( pAigGlo, pAig, pPars );
-    }
-    else
-    {
-        p = Llb_ManStart( pAigGlo, pAig, pPars );
-        if ( pPars->fVerbose )
-        {
-            Llb_ManPrintAig( p );
-            printf( "Original matrix:          " );
-            Llb_MtrPrintMatrixStats( p->pMatrix );
-            if ( pPars->fVeryVerbose )
-                Llb_MtrPrint( p->pMatrix, 1 );
-        }
-        if ( pPars->fCluster )
-        {
-            Llb_ManCluster( p->pMatrix );
-            if ( pPars->fVerbose )
-            {
-                printf( "Matrix after clustering:  " );
-                Llb_MtrPrintMatrixStats( p->pMatrix );
-                if ( pPars->fVeryVerbose )
-                    Llb_MtrPrint( p->pMatrix, 1 );
-            }
-        }
-        if ( pPars->fSchedule )
-        {
-            Llb_MtrSchedule( p->pMatrix );
-            if ( pPars->fVerbose )
-            {
-                printf( "Matrix after scheduling:  " );
-                Llb_MtrPrintMatrixStats( p->pMatrix );
-                if ( pPars->fVeryVerbose )
-                    Llb_MtrPrint( p->pMatrix, 1 );
-            }
-        }
-    }
-    
-    if ( !p->pPars->fSkipReach ) 
-        RetValue = Llb_ManReachability( p, vHints, pddGlo );
-    Llb_ManStop( p );
-
-    Abc_PrintTime( 1, "Time", clock() - clk );
-
-    if ( pPars->fIndConstr )
-        Vec_IntFreeP( &vHints );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManModelCheckGia( Gia_Man_t * pGia, Gia_ParLlb_t * pPars )
-{
-    Gia_Man_t * pGia2;
-    Aig_Man_t * pAig;
-    int RetValue = -1;
-    pGia2 = Gia_ManDupDfs( pGia );
-    pAig  = Gia_ManToAigSimple( pGia2 );
-    Gia_ManStop( pGia2 );
-//Aig_ManShow( pAig, 0, NULL ); 
-
-    if ( pPars->nHintDepth == 0 )
-        RetValue = Llb_ManModelCheckAig( pAig, pPars, NULL, NULL );
-    else
-        RetValue = Llb_ManModelCheckAigWithHints( pAig, pPars );
-    pGia->pCexSeq = pAig->pSeqModel; pAig->pSeqModel = NULL;
-    Aig_ManStop( pAig );
-    return RetValue;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb1Group.c b/src/aig/llb/llb1Group.c
deleted file mode 100644
index d865c239..00000000
--- a/src/aig/llb/llb1Group.c
+++ /dev/null
@@ -1,474 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb1Group.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Initial partition computation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb1Group.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Grp_t * Llb_ManGroupAlloc( Llb_Man_t * pMan )
-{
-    Llb_Grp_t * p;
-    p = ABC_CALLOC( Llb_Grp_t, 1 );
-    p->pMan   = pMan;
-    p->vIns   = Vec_PtrAlloc( 8 );
-    p->vOuts  = Vec_PtrAlloc( 8 );
-    p->Id     = Vec_PtrSize( pMan->vGroups );
-    Vec_PtrPush( pMan->vGroups, p );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManGroupStop( Llb_Grp_t * p )
-{
-    if ( p == NULL )
-        return;
-    Vec_PtrWriteEntry( p->pMan->vGroups, p->Id, NULL );
-    Vec_PtrFreeP( &p->vIns );
-    Vec_PtrFreeP( &p->vOuts );
-    Vec_PtrFreeP( &p->vNodes );
-    ABC_FREE( p );
-}
-
- 
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManGroupCollect_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Ptr_t * vNodes )
-{
-    if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent(pAig, pObj);
-    if ( Aig_ObjIsConst1(pObj) )
-        return;
-    if ( Aig_ObjIsPo(pObj) )
-    {
-        Llb_ManGroupCollect_rec( pAig, Aig_ObjFanin0(pObj), vNodes );
-        return;
-    }
-    assert( Aig_ObjIsAnd(pObj) );
-    Llb_ManGroupCollect_rec( pAig, Aig_ObjFanin0(pObj), vNodes );
-    Llb_ManGroupCollect_rec( pAig, Aig_ObjFanin1(pObj), vNodes );
-    Vec_PtrPush( vNodes, pObj );
-}
- 
-/**Function*************************************************************
-
-  Synopsis    [Collects the support of MFFC.]
-
-  Description [Returns the number of internal nodes in the MFFC.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ManGroupCollect( Llb_Grp_t * pGroup )
-{
-    Vec_Ptr_t * vNodes;
-    Aig_Obj_t * pObj;
-    int i;
-    vNodes = Vec_PtrAlloc( 100 );
-    Aig_ManIncrementTravId( pGroup->pMan->pAig );
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vIns, pObj, i )
-        Aig_ObjSetTravIdCurrent( pGroup->pMan->pAig, pObj );
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vOuts, pObj, i )
-        Aig_ObjSetTravIdPrevious( pGroup->pMan->pAig, pObj );
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vOuts, pObj, i )
-        Llb_ManGroupCollect_rec( pGroup->pMan->pAig, pObj, vNodes );
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManGroupCreate_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Ptr_t * vSupp )
-{ 
-    if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent(pAig, pObj);
-    if ( Aig_ObjIsConst1(pObj) )
-        return;
-    if ( pObj->fMarkA )
-    {
-        Vec_PtrPush( vSupp, pObj );
-        return;
-    }
-    assert( Aig_ObjIsAnd(pObj) );
-    Llb_ManGroupCreate_rec( pAig, Aig_ObjFanin0(pObj), vSupp );
-    Llb_ManGroupCreate_rec( pAig, Aig_ObjFanin1(pObj), vSupp );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Grp_t * Llb_ManGroupCreate( Llb_Man_t * pMan, Aig_Obj_t * pObj )
-{
-    Llb_Grp_t * p;
-    assert( pObj->fMarkA == 1 );
-    // derive group
-    p = Llb_ManGroupAlloc( pMan );
-    Vec_PtrPush( p->vOuts, pObj );
-    Aig_ManIncrementTravId( pMan->pAig );
-    if ( Aig_ObjIsPo(pObj) )
-        Llb_ManGroupCreate_rec( pMan->pAig, Aig_ObjFanin0(pObj), p->vIns );
-    else
-    {
-        Llb_ManGroupCreate_rec( pMan->pAig, Aig_ObjFanin0(pObj), p->vIns );
-        Llb_ManGroupCreate_rec( pMan->pAig, Aig_ObjFanin1(pObj), p->vIns );
-    }
-    // derive internal objects
-    assert( p->vNodes == NULL );
-    p->vNodes = Llb_ManGroupCollect( p );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Grp_t * Llb_ManGroupCreateFirst( Llb_Man_t * pMan )
-{
-    Llb_Grp_t * p;
-    Aig_Obj_t * pObj;
-    int i;
-    p = Llb_ManGroupAlloc( pMan );
-    Saig_ManForEachLo( pMan->pAig, pObj, i )
-        Vec_PtrPush( p->vOuts, pObj );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Grp_t * Llb_ManGroupCreateLast( Llb_Man_t * pMan )
-{
-    Llb_Grp_t * p;
-    Aig_Obj_t * pObj;
-    int i;
-    p = Llb_ManGroupAlloc( pMan );
-    Saig_ManForEachLi( pMan->pAig, pObj, i )
-        Vec_PtrPush( p->vIns, pObj );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Grp_t * Llb_ManGroupsCombine( Llb_Grp_t * p1, Llb_Grp_t * p2 )
-{
-    Llb_Grp_t * p;
-    Aig_Obj_t * pObj;
-    int i;
-    p = Llb_ManGroupAlloc( p1->pMan );
-    // create inputs
-    Vec_PtrForEachEntry( Aig_Obj_t *, p1->vIns, pObj, i )
-        Vec_PtrPush( p->vIns, pObj );
-    Vec_PtrForEachEntry( Aig_Obj_t *, p2->vIns, pObj, i )
-        Vec_PtrPushUnique( p->vIns, pObj );
-    // create outputs
-    Vec_PtrForEachEntry( Aig_Obj_t *, p1->vOuts, pObj, i )
-        Vec_PtrPush( p->vOuts, pObj );
-    Vec_PtrForEachEntry( Aig_Obj_t *, p2->vOuts, pObj, i )
-        Vec_PtrPushUnique( p->vOuts, pObj );
-
-    // derive internal objects
-    assert( p->vNodes == NULL );
-    p->vNodes = Llb_ManGroupCollect( p );
-    return p;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManGroupMarkNodes_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
-{
-    if ( Aig_ObjIsTravIdCurrent(p, pObj) )
-        return;
-    if ( Aig_ObjIsTravIdPrevious(p, pObj) )
-    {
-        Aig_ObjSetTravIdCurrent(p, pObj);
-        return;
-    }
-    Aig_ObjSetTravIdCurrent(p, pObj);
-    assert( Aig_ObjIsNode(pObj) );
-    Llb_ManGroupMarkNodes_rec( p, Aig_ObjFanin0(pObj) );
-    Llb_ManGroupMarkNodes_rec( p, Aig_ObjFanin1(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates group from two cuts derived by the flow computation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Grp_t * Llb_ManGroupCreateFromCuts( Llb_Man_t * pMan, Vec_Int_t * vCut1, Vec_Int_t * vCut2 )
-{
-    Llb_Grp_t * p;
-    Aig_Obj_t * pObj;
-    int i;
-    p = Llb_ManGroupAlloc( pMan );
-
-    // mark Cut1
-    Aig_ManIncrementTravId( pMan->pAig );
-    Aig_ManForEachObjVec( vCut1, pMan->pAig, pObj, i )
-        Aig_ObjSetTravIdCurrent( pMan->pAig, pObj );
-    // collect unmarked Cut2
-    Aig_ManForEachObjVec( vCut2, pMan->pAig, pObj, i )
-        if ( !Aig_ObjIsTravIdCurrent( pMan->pAig, pObj ) )
-            Vec_PtrPush( p->vOuts, pObj );
-
-    // mark nodes reachable from Cut2
-    Aig_ManIncrementTravId( pMan->pAig );
-    Aig_ManForEachObjVec( vCut2, pMan->pAig, pObj, i )
-        Llb_ManGroupMarkNodes_rec( pMan->pAig, pObj );
-    // collect marked Cut1
-    Aig_ManForEachObjVec( vCut1, pMan->pAig, pObj, i )
-        if ( Aig_ObjIsTravIdCurrent( pMan->pAig, pObj ) )
-            Vec_PtrPush( p->vIns, pObj );
-
-    // derive internal objects
-    assert( p->vNodes == NULL );
-    p->vNodes = Llb_ManGroupCollect( p );
-    return p;
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManPrepareGroups( Llb_Man_t * pMan )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    assert( pMan->vGroups == NULL );
-    pMan->vGroups = Vec_PtrAlloc( 1000 );
-    Llb_ManGroupCreateFirst( pMan );
-    Aig_ManForEachNode( pMan->pAig, pObj, i )
-    {
-        if ( pObj->fMarkA )
-            Llb_ManGroupCreate( pMan, pObj );
-    }
-    Saig_ManForEachLi( pMan->pAig, pObj, i )
-    {
-        if ( pObj->fMarkA )
-            Llb_ManGroupCreate( pMan, pObj );
-    }
-    Llb_ManGroupCreateLast( pMan );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManPrintSpan( Llb_Man_t * p )
-{
-    Llb_Grp_t * pGroup;
-    Aig_Obj_t * pVar;
-    int i, k, Span = 0, SpanMax = 0;
-    Vec_PtrForEachEntry( Llb_Grp_t *, p->vGroups, pGroup, i )
-    {
-        Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vIns, pVar, k )
-            if ( Vec_IntEntry(p->vVarBegs, pVar->Id) == i )
-                Span++;
-        Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vOuts, pVar, k )
-            if ( Vec_IntEntry(p->vVarBegs, pVar->Id) == i )
-                Span++;
-
-        SpanMax = ABC_MAX( SpanMax, Span );
-printf( "%d ", Span );
-
-        Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vIns, pVar, k )
-            if ( Vec_IntEntry(p->vVarEnds, pVar->Id) == i )
-                Span--;
-        Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vOuts, pVar, k )
-            if ( Vec_IntEntry(p->vVarEnds, pVar->Id) == i )
-                Span--;
-    }
-printf( "\n" );
-printf( "Max = %d\n", SpanMax );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManGroupHasVar( Llb_Man_t * p, int iGroup, int iVar )
-{
-    Llb_Grp_t * pGroup = (Llb_Grp_t *)Vec_PtrEntry( p->vGroups, iGroup );
-    Aig_Obj_t * pObj;
-    int i;
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vIns, pObj, i )
-        if ( pObj->Id == iVar )
-            return 1;
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vOuts, pObj, i )
-        if ( pObj->Id == iVar )
-            return 1;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManPrintHisto( Llb_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i, k;
-    Aig_ManForEachObj( p->pAig, pObj, i )
-    {
-        if ( Vec_IntEntry(p->vObj2Var, i) < 0 )
-            continue;
-        printf( "%3d :", i );
-        for ( k = 0; k < Vec_IntEntry(p->vVarBegs, i); k++ )
-            printf( " " );
-        for (      ; k <= Vec_IntEntry(p->vVarEnds, i); k++ )
-            printf( "%c", Llb_ManGroupHasVar(p, k, i)? '*':'-' );
-        printf( "\n" );
-    }
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb1Hint.c b/src/aig/llb/llb1Hint.c
deleted file mode 100644
index d8ffecd3..00000000
--- a/src/aig/llb/llb1Hint.c
+++ /dev/null
@@ -1,226 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb1Hint.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Cofactors the circuit w.r.t. the high-fanout variables.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb1Hint.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns CI index with the largest number of fanouts.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManMaxFanoutCi( Aig_Man_t * pAig )
-{
-    Aig_Obj_t * pObj; 
-    int i, WeightMax = -ABC_INFINITY, iInput = -1;
-    Aig_ManForEachPi( pAig, pObj, i )
-        if ( WeightMax < Aig_ObjRefs(pObj) )
-        {
-            WeightMax = Aig_ObjRefs(pObj);
-            iInput = i;
-        }
-    assert( iInput >= 0 );
-    return iInput;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives AIG whose PI is substituted by a constant.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Llb_ManPerformHints( Aig_Man_t * pAig, int nHintDepth )
-{
-    Aig_Man_t * pNew, * pTemp;
-    int i, iInput;
-    pNew = Aig_ManDupDfs( pAig );
-    for ( i = 0; i < nHintDepth; i++ )
-    {
-        iInput = Llb_ManMaxFanoutCi( pNew );
-        Abc_Print( 1, "%d %3d\n", i, iInput );
-        pNew = Aig_ManDupCof( pTemp = pNew, iInput, 1 );
-        Aig_ManStop( pTemp );
-    }
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns CI index with the largest number of fanouts.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_ManCollectHighFanoutObjects( Aig_Man_t * pAig, int nCandMax, int fCisOnly )
-{
-    Vec_Int_t * vFanouts, * vResult;
-    Aig_Obj_t * pObj; 
-    int i, fChanges, PivotValue;
-//    int Entry;
-    // collect fanout counts
-    vFanouts = Vec_IntAlloc( 100 );
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-//        if ( !Aig_ObjIsPi(pObj) && (fCisOnly || !Aig_ObjIsNode(pObj)) )
-        if ( !Saig_ObjIsLo(pAig,pObj) && (fCisOnly || !Aig_ObjIsNode(pObj)) )
-            continue;
-        Vec_IntPush( vFanouts, Aig_ObjRefs(pObj) );
-    }
-    Vec_IntSort( vFanouts, 1 );
-    // pick the separator
-    nCandMax = ABC_MIN( nCandMax, Vec_IntSize(vFanouts) - 1 );
-    PivotValue = Vec_IntEntry( vFanouts, nCandMax );
-    Vec_IntFree( vFanouts );
-    // collect obj satisfying the constraints
-    vResult = Vec_IntAlloc( 100 );
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-//        if ( !Aig_ObjIsPi(pObj) && (fCisOnly || !Aig_ObjIsNode(pObj)) )
-        if ( !Saig_ObjIsLo(pAig,pObj) && (fCisOnly || !Aig_ObjIsNode(pObj)) )
-            continue;
-        if ( Aig_ObjRefs(pObj) < PivotValue )
-            continue;
-        Vec_IntPush( vResult, Aig_ObjId(pObj) );
-    }
-    assert( Vec_IntSize(vResult) >= nCandMax );
-    // order in the decreasing order of fanouts
-    do
-    {
-        fChanges = 0;
-        for ( i = 0; i < Vec_IntSize(vResult) - 1; i++ )
-            if ( Aig_ObjRefs(Aig_ManObj(pAig, Vec_IntEntry(vResult, i))) < 
-                 Aig_ObjRefs(Aig_ManObj(pAig, Vec_IntEntry(vResult, i+1))) )
-            {
-                int Temp = Vec_IntEntry( vResult, i );
-                Vec_IntWriteEntry( vResult, i, Vec_IntEntry(vResult, i+1) );
-                Vec_IntWriteEntry( vResult, i+1, Temp );
-                fChanges = 1;
-            }
-    }
-    while ( fChanges );
-/*
-    Vec_IntForEachEntry( vResult, Entry, i )
-        printf( "%d ", Aig_ObjRefs(Aig_ManObj(pAig, Entry)) );
-printf( "\n" );
-*/
-    return vResult;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives AIG whose PI is substituted by a constant.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManModelCheckAigWithHints( Aig_Man_t * pAigGlo, Gia_ParLlb_t * pPars )
-{
-    DdManager * ddGlo = NULL;
-    Vec_Int_t * vHints;
-    Vec_Int_t * vHFCands;
-    int i, Entry, RetValue = -1;
-    int clk = clock();
-    assert( pPars->nHintDepth > 0 );
-/*
-    // perform reachability without hints
-    RetValue = Llb_ManModelCheckAig( pAigGlo, pPars, NULL, NULL );
-    if ( RetValue >= 0 )
-        return RetValue;
-*/
-    // create hints representation
-    vHFCands = Llb_ManCollectHighFanoutObjects( pAigGlo, pPars->nHintDepth+pPars->HintFirst, 1 );
-    vHints   = Vec_IntStartFull( Aig_ManObjNumMax(pAigGlo) );
-    // add one hint at a time till the problem is solved
-    Vec_IntForEachEntryStart( vHFCands, Entry, i, pPars->HintFirst )
-    {
-        Vec_IntWriteEntry( vHints, Entry, 1 );   // change to 1 to start from zero cof!!!
-        // solve under hints
-        RetValue = Llb_ManModelCheckAig( pAigGlo, pPars, vHints, &ddGlo );
-        if ( RetValue == 0 )
-            goto Finish;
-        if ( RetValue == 1 )
-            break;
-    }
-    if ( RetValue == -1 )
-        goto Finish;
-    // undo the hints one at a time
-    for ( ; i >= pPars->HintFirst; i-- )
-    {
-        Entry = Vec_IntEntry( vHFCands, i );
-        Vec_IntWriteEntry( vHints, Entry, -1 );        
-        // solve under relaxed hints
-        RetValue = Llb_ManModelCheckAig( pAigGlo, pPars, vHints, &ddGlo );
-        if ( RetValue == 0 )
-            goto Finish;
-        if ( RetValue == 1 )
-            continue;
-        break;
-    }
-Finish:
-    if ( ddGlo )
-    {
-        if ( ddGlo->bFunc )
-            Cudd_RecursiveDeref( ddGlo, ddGlo->bFunc ); 
-        Extra_StopManager( ddGlo );
-    }
-    Vec_IntFreeP( &vHFCands );
-    Vec_IntFreeP( &vHints );
-    if ( pPars->fVerbose )
-        Abc_PrintTime( 1, "Total runtime", clock() - clk );
-    return RetValue;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb1Man.c b/src/aig/llb/llb1Man.c
deleted file mode 100644
index f5de25e0..00000000
--- a/src/aig/llb/llb1Man.c
+++ /dev/null
@@ -1,218 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb1Man.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Reachability manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb1Man.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManPrepareVarMap( Llb_Man_t * p )
-{
-    Aig_Obj_t * pObjLi, * pObjLo;
-    int i, iVarLi, iVarLo;
-    assert( p->vNs2Glo == NULL );
-    assert( p->vCs2Glo == NULL );
-    assert( p->vGlo2Cs == NULL );
-    assert( p->vGlo2Ns == NULL );
-    p->vNs2Glo = Vec_IntStartFull( Vec_IntSize(p->vVar2Obj) );
-    p->vCs2Glo = Vec_IntStartFull( Vec_IntSize(p->vVar2Obj) );
-    p->vGlo2Cs = Vec_IntStartFull( Aig_ManRegNum(p->pAig) );
-    p->vGlo2Ns = Vec_IntStartFull( Aig_ManRegNum(p->pAig) );
-    Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-    {
-        iVarLi = Vec_IntEntry(p->vObj2Var, Aig_ObjId(pObjLi));
-        iVarLo = Vec_IntEntry(p->vObj2Var, Aig_ObjId(pObjLo));
-        assert( iVarLi >= 0 && iVarLi < Vec_IntSize(p->vVar2Obj) );
-        assert( iVarLo >= 0 && iVarLo < Vec_IntSize(p->vVar2Obj) );
-        Vec_IntWriteEntry( p->vNs2Glo, iVarLi, i );
-        Vec_IntWriteEntry( p->vCs2Glo, iVarLo, i );
-        Vec_IntWriteEntry( p->vGlo2Cs, i, iVarLo );
-        Vec_IntWriteEntry( p->vGlo2Ns, i, iVarLi );
-    }
-    // add mapping of the PIs
-    Saig_ManForEachPi( p->pAig, pObjLo, i )
-    {
-        iVarLo = Vec_IntEntry(p->vObj2Var, Aig_ObjId(pObjLo));
-        Vec_IntWriteEntry( p->vCs2Glo, iVarLo, Aig_ManRegNum(p->pAig)+i );
-        Vec_IntWriteEntry( p->vNs2Glo, iVarLo, Aig_ManRegNum(p->pAig)+i );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManPrepareVarLimits( Llb_Man_t * p )
-{
-    Llb_Grp_t * pGroup;
-    Aig_Obj_t * pVar;
-    int i, k;
-    assert( p->vVarBegs == NULL );
-    assert( p->vVarEnds == NULL );
-    p->vVarEnds = Vec_IntStart( Aig_ManObjNumMax(p->pAig) ); 
-    p->vVarBegs = Vec_IntStart( Aig_ManObjNumMax(p->pAig) ); 
-    Vec_IntFill( p->vVarBegs, Aig_ManObjNumMax(p->pAig), p->pMatrix->nCols );
-
-    for ( i = 0; i < p->pMatrix->nCols; i++ )
-    {
-        pGroup = p->pMatrix->pColGrps[i];
-
-        Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vIns, pVar, k )
-            if ( Vec_IntEntry(p->vVarBegs, pVar->Id) > i )
-                Vec_IntWriteEntry( p->vVarBegs, pVar->Id, i );
-        Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vOuts, pVar, k )
-            if ( Vec_IntEntry(p->vVarBegs, pVar->Id) > i )
-                Vec_IntWriteEntry( p->vVarBegs, pVar->Id, i );
-
-        Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vIns, pVar, k )
-            if ( Vec_IntEntry(p->vVarEnds, pVar->Id) < i )
-                Vec_IntWriteEntry( p->vVarEnds, pVar->Id, i );
-        Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vOuts, pVar, k )
-            if ( Vec_IntEntry(p->vVarEnds, pVar->Id) < i )
-                Vec_IntWriteEntry( p->vVarEnds, pVar->Id, i );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManStop( Llb_Man_t * p )
-{
-    Llb_Grp_t * pGrp;
-    DdNode * bTemp;
-    int i;
-
-//    Vec_IntFreeP( &p->vMem );
-//    Vec_PtrFreeP( &p->vTops );
-//    Vec_PtrFreeP( &p->vBots );
-//    Vec_VecFreeP( (Vec_Vec_t **)&p->vCuts );
-
-    if ( p->pMatrix )
-        Llb_MtrFree( p->pMatrix );
-    Vec_PtrForEachEntry( Llb_Grp_t *, p->vGroups, pGrp, i )
-        Llb_ManGroupStop( pGrp );
-    if ( p->dd )
-    {
-//        printf( "Manager dd\n" );
-        Extra_StopManager( p->dd );
-    }
-    if ( p->ddG )
-    {
-//        printf( "Manager ddG\n" );
-        if ( p->ddG->bFunc )
-            Cudd_RecursiveDeref( p->ddG, p->ddG->bFunc ); 
-        Extra_StopManager( p->ddG );
-    }
-    if ( p->ddR )
-    {
-//        printf( "Manager ddR\n" );
-        if ( p->ddR->bFunc )
-            Cudd_RecursiveDeref( p->ddR, p->ddR->bFunc ); 
-        Vec_PtrForEachEntry( DdNode *, p->vRings, bTemp, i )
-            Cudd_RecursiveDeref( p->ddR, bTemp );
-        Extra_StopManager( p->ddR );
-    }
-    Aig_ManStop( p->pAig );
-    Vec_PtrFreeP( &p->vGroups );
-    Vec_IntFreeP( &p->vVar2Obj );
-    Vec_IntFreeP( &p->vObj2Var );
-    Vec_IntFreeP( &p->vVarBegs );
-    Vec_IntFreeP( &p->vVarEnds );
-    Vec_PtrFreeP( &p->vRings  );
-    Vec_IntFreeP( &p->vNs2Glo );
-    Vec_IntFreeP( &p->vCs2Glo );
-    Vec_IntFreeP( &p->vGlo2Cs );
-    Vec_IntFreeP( &p->vGlo2Ns );
-//    Vec_IntFreeP( &p->vHints );
-    ABC_FREE( p );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Man_t * Llb_ManStart( Aig_Man_t * pAigGlo, Aig_Man_t * pAig, Gia_ParLlb_t * pPars )
-{
-    Llb_Man_t * p;
-    Aig_ManCleanMarkA( pAig );
-    p = ABC_CALLOC( Llb_Man_t, 1 );
-    p->pAigGlo  = pAigGlo;
-    p->pPars    = pPars;
-    p->pAig     = pAig;
-    p->vVar2Obj = Llb_ManMarkPivotNodes( p->pAig, pPars->fUsePivots );
-    p->vObj2Var = Vec_IntInvert( p->vVar2Obj, -1 );
-    p->vRings   = Vec_PtrAlloc( 100 );
-    Llb_ManPrepareVarMap( p );
-    Llb_ManPrepareGroups( p );
-    Aig_ManCleanMarkA( pAig );
-    p->pMatrix = Llb_MtrCreate( p );
-    p->pMatrix->pMan = p;
-    return p;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb1Matrix.c b/src/aig/llb/llb1Matrix.c
deleted file mode 100644
index 7aa9c744..00000000
--- a/src/aig/llb/llb1Matrix.c
+++ /dev/null
@@ -1,430 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb1Matrix.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Partition clustering as a matrix problem.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb1Matrix.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-//              0123              nCols
-//             +--------------------->  
-// pi        0 |  111             row0   pRowSums[0]  
-// pi        1 | 1     11         row1   pRowSums[1] 
-// pi        2 |   1  11          row2   pRowSums[2] 
-// CS          |1       1
-// CS          |1      111
-// CS          |111    111
-// int         |  11111           
-// int         |     111          
-// int         |       111        
-// int         |         111      
-// NS          |           11 11
-// NS          |            11 1
-// NS          |             111
-//       nRows |
-//             v    
-//              cccc   pColSums[0]
-//              oooo   pColSums[1]
-//              llll   pColSums[2]
-//              0123   pColSums[3]
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Verify columns.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MtrVerifyRowsAll( Llb_Mtr_t * p )
-{
-    int iRow, iCol, Counter;
-    for ( iCol = 0; iCol < p->nCols; iCol++ )
-    {
-        Counter = 0;
-        for ( iRow = 0; iRow < p->nRows; iRow++ )
-            if ( p->pMatrix[iCol][iRow] == 1 )
-                Counter++;
-        assert( Counter == p->pColSums[iCol] );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Verify columns.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MtrVerifyColumnsAll( Llb_Mtr_t * p )
-{
-    int iRow, iCol, Counter;
-    for ( iRow = 0; iRow < p->nRows; iRow++ )
-    {
-        Counter = 0;
-        for ( iCol = 0; iCol < p->nCols; iCol++ )
-            if ( p->pMatrix[iCol][iRow] == 1 )
-                Counter++;
-        assert( Counter == p->pRowSums[iRow] );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Verify columns.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MtrVerifyMatrix( Llb_Mtr_t * p )
-{
-    Llb_MtrVerifyRowsAll( p );
-    Llb_MtrVerifyColumnsAll( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sort variables in the order of removal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int * Llb_MtrFindVarOrder( Llb_Mtr_t * p )
-{
-    int * pOrder, * pLast;
-    int i, k, fChanges, Temp;
-    pOrder = ABC_CALLOC( int, p->nRows );
-    pLast  = ABC_CALLOC( int, p->nRows );
-    for ( i = 0; i < p->nRows; i++ )
-    {
-        pOrder[i] = i;
-        for ( k = p->nCols - 1; k >= 0; k-- )
-            if ( p->pMatrix[k][i] )
-            {
-                pLast[i] = k;
-                break;
-            }
-    }
-    do
-    {
-        fChanges = 0;
-        for ( i = 0; i < p->nRows - 1; i++ )
-            if ( pLast[i] > pLast[i+1] )
-            {
-                Temp = pOrder[i];
-                pOrder[i] = pOrder[i+1];
-                pOrder[i+1] = Temp;
-
-                Temp = pLast[i];
-                pLast[i] = pLast[i+1];
-                pLast[i+1] = Temp;
-
-                fChanges = 1;
-            }
-    }
-    while ( fChanges );
-    ABC_FREE( pLast );
-    return pOrder;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns type of a variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Llb_MtrVarName( Llb_Mtr_t * p, int iVar )
-{
-    static char Buffer[10];
-    if ( iVar < p->nPis )
-        strcpy( Buffer, "pi" );
-    else if ( iVar < p->nPis + p->nFfs )
-        strcpy( Buffer, "CS" );
-    else if ( iVar >= p->nRows - p->nFfs )
-        strcpy( Buffer, "NS" );
-    else 
-        strcpy( Buffer, "int" );
-    return Buffer;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates one column with vars in the array.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MtrPrint( Llb_Mtr_t * p, int fOrder )
-{
-    int * pOrder = NULL;
-    int i, iRow, iCol;
-    if ( fOrder )
-        pOrder = Llb_MtrFindVarOrder( p );
-    for ( i = 0; i < p->nRows; i++ )
-    {
-        iRow = pOrder ? pOrder[i] : i;
-        printf( "%3d : ", iRow );
-        printf( "%3d ", p->pRowSums[iRow] );
-        printf( "%3s ", Llb_MtrVarName(p, iRow) );
-        for ( iCol = 0; iCol < p->nCols; iCol++ )
-            printf( "%c", p->pMatrix[iCol][iRow] ? '*' : ' ' );
-        printf( "\n" );
-    }
-    ABC_FREE( pOrder );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Verify columns.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MtrPrintMatrixStats( Llb_Mtr_t * p )
-{
-    int iVar, iGrp, iGrp1, iGrp2, Span = 0, nCutSize = 0, nCutSizeMax = 0;
-    int * pGrp1 = ABC_CALLOC( int, p->nRows ); 
-    int * pGrp2 = ABC_CALLOC( int, p->nRows ); 
-    for ( iVar = 0; iVar < p->nRows; iVar++ )
-    {
-        if ( p->pRowSums[iVar] == 0 )
-            continue;
-        for ( iGrp1 = 0; iGrp1 < p->nCols; iGrp1++ )
-            if ( p->pMatrix[iGrp1][iVar] == 1 )
-                break;
-        for ( iGrp2 = p->nCols - 1; iGrp2 >= 0; iGrp2-- )
-            if ( p->pMatrix[iGrp2][iVar] == 1 )
-                break;
-        assert( iGrp1 <= iGrp2 );
-        pGrp1[iVar] = iGrp1;
-        pGrp2[iVar] = iGrp2;
-        Span += iGrp2 - iGrp1;
-    }
-    // compute span
-    for ( iGrp = 0; iGrp < p->nCols; iGrp++ )
-    {
-        for ( iVar = 0; iVar < p->nRows; iVar++ )
-            if ( pGrp1[iVar] == iGrp )
-                nCutSize++;
-        if ( nCutSizeMax < nCutSize )
-            nCutSizeMax = nCutSize;
-        for ( iVar = 0; iVar < p->nRows; iVar++ )
-            if ( pGrp2[iVar] == iGrp )
-                nCutSize--;
-    }
-    ABC_FREE( pGrp1 );
-    ABC_FREE( pGrp2 );
-    printf( "[%4d x %4d]  Life-span =%6.2f  Max-cut =%5d\n", 
-        p->nCols, p->nRows, 1.0*Span/p->nRows, nCutSizeMax );
-    if ( nCutSize )
-        Abc_Print( -1, "Cut size is not zero (%d).\n", nCutSize );
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the matrix representation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Mtr_t * Llb_MtrAlloc( int nPis, int nFfs, int nCols, int nRows )
-{
-    Llb_Mtr_t * p;
-    int i;
-    p = ABC_CALLOC( Llb_Mtr_t, 1 );
-    p->nPis  = nPis;
-    p->nFfs  = nFfs;
-    p->nRows = nRows;
-    p->nCols = nCols;
-    p->pRowSums = ABC_CALLOC( int, nRows );
-    p->pColSums = ABC_CALLOC( int, nCols );
-    p->pColGrps = ABC_CALLOC( Llb_Grp_t *, nCols );
-    p->pMatrix  = ABC_CALLOC( char *, nCols );
-    for ( i = 0; i < nCols; i++ )
-        p->pMatrix[i] = ABC_CALLOC( char, nRows );
-    // partial product
-    p->pProdVars = ABC_CALLOC( char, nRows );  // variables in the partial product
-    p->pProdNums = ABC_CALLOC( int, nRows );   // var counts in the remaining partitions
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the matrix representation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MtrFree( Llb_Mtr_t * p )
-{
-    int i;
-    ABC_FREE( p->pProdVars );
-    ABC_FREE( p->pProdNums );
-    for ( i = 0; i < p->nCols; i++ )
-        ABC_FREE( p->pMatrix[i] );
-    ABC_FREE( p->pRowSums );
-    ABC_FREE( p->pColSums );
-    ABC_FREE( p->pMatrix );
-    ABC_FREE( p->pColGrps );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates one column with vars in the array.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MtrAddColumn( Llb_Mtr_t * p, Llb_Grp_t * pGrp )
-{
-    Aig_Obj_t * pVar;
-    int i, iRow, iCol = pGrp->Id;
-    assert( iCol >= 0 && iCol < p->nCols );
-    p->pColGrps[iCol] = pGrp;
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGrp->vIns, pVar, i )
-    {
-        iRow = Vec_IntEntry( pGrp->pMan->vObj2Var, Aig_ObjId(pVar) );
-        assert( iRow >= 0 && iRow < p->nRows );
-        p->pMatrix[iCol][iRow] = 1;
-        p->pColSums[iCol]++;
-        p->pRowSums[iRow]++;
-    }
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGrp->vOuts, pVar, i )
-    {
-        iRow = Vec_IntEntry( pGrp->pMan->vObj2Var, Aig_ObjId(pVar) );
-        assert( iRow >= 0 && iRow < p->nRows );
-        p->pMatrix[iCol][iRow] = 1;
-        p->pColSums[iCol]++;
-        p->pRowSums[iRow]++;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Matrix reduce.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MtrRemoveSingletonRows( Llb_Mtr_t * p )
-{
-    int i, k;
-    for ( i = 0; i < p->nRows; i++ )
-        if ( p->pRowSums[i] < 2 )
-        {
-            p->pRowSums[i] = 0;
-            for ( k = 0; k < p->nCols; k++ )
-            {
-                if ( p->pMatrix[k][i] == 1 )
-                {
-                    p->pMatrix[k][i] = 0;
-                    p->pColSums[k]--;
-                }
-            }
-        }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Matrix reduce.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Mtr_t * Llb_MtrCreate( Llb_Man_t * p )
-{
-    Llb_Mtr_t * pMatrix;
-    Llb_Grp_t * pGroup;
-    int i;
-    pMatrix = Llb_MtrAlloc( Saig_ManPiNum(p->pAig), Saig_ManRegNum(p->pAig), 
-        Vec_PtrSize(p->vGroups), Vec_IntSize(p->vVar2Obj) );
-    Vec_PtrForEachEntry( Llb_Grp_t *, p->vGroups, pGroup, i )
-        Llb_MtrAddColumn( pMatrix, pGroup );
-//    Llb_MtrRemoveSingletonRows( pMatrix );
-    return pMatrix;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb1Pivot.c b/src/aig/llb/llb1Pivot.c
deleted file mode 100644
index d42bf659..00000000
--- a/src/aig/llb/llb1Pivot.c
+++ /dev/null
@@ -1,254 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb1Pivot.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Determining pivot variables.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb1Pivot.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManTracePaths_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pPivot )
-{
-    Aig_Obj_t * pFanout;
-    int k, iFan;
-    if ( Aig_ObjIsTravIdPrevious(p, pObj) )
-        return 0;
-    if ( Aig_ObjIsTravIdCurrent(p, pObj) )
-        return 1;
-    if ( Saig_ObjIsLi(p, pObj) )
-        return 0;
-    if ( Saig_ObjIsPo(p, pObj) )
-        return 0;
-    if ( pObj == pPivot )
-        return 1;
-    assert( Aig_ObjIsCand(pObj) );
-    Aig_ObjForEachFanout( p, pObj, pFanout, iFan, k )
-        if ( !Llb_ManTracePaths_rec( p, pFanout, pPivot ) )
-        {
-            Aig_ObjSetTravIdPrevious(p, pObj);
-            return 0;
-        }
-    Aig_ObjSetTravIdCurrent(p, pObj);
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManTracePaths( Aig_Man_t * p, Aig_Obj_t * pPivot )
-{
-    Aig_Obj_t * pObj;
-    int i, Counter = 0;
-    Aig_ManIncrementTravId( p ); // prev = visited with path to LI  (value 0)
-    Aig_ManIncrementTravId( p ); // cur  = visited w/o  path to LI  (value 1)
-    Saig_ManForEachLo( p, pObj, i )
-        Counter += Llb_ManTracePaths_rec( p, pObj, pPivot );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManTestCuts( Aig_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i, Count;
-    Aig_ManFanoutStart( p );
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        if ( Aig_ObjRefs(pObj) <= 1 )
-            continue;
-        Count = Llb_ManTracePaths( p, pObj );
-        printf( "Obj =%5d.  Lev =%3d.  Fanout =%5d.  Count = %3d.\n", 
-            i, Aig_ObjLevel(pObj), Aig_ObjRefs(pObj), Count );
-    }
-    Aig_ManFanoutStop( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManLabelLiCones_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
-{
-    if ( pObj->fMarkB )
-        return;
-    pObj->fMarkB = 1;
-    assert( Aig_ObjIsNode(pObj) );
-    Llb_ManLabelLiCones_rec( p, Aig_ObjFanin0(pObj) );
-    Llb_ManLabelLiCones_rec( p, Aig_ObjFanin1(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Determine starting cut-points.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManLabelLiCones( Aig_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    // mark const and PIs
-    Aig_ManConst1(p)->fMarkB = 1;
-    Aig_ManForEachPi( p, pObj, i )
-        pObj->fMarkB = 1;
-    // mark cones
-    Saig_ManForEachLi( p, pObj, i )
-        Llb_ManLabelLiCones_rec( p, Aig_ObjFanin0(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Determine starting cut-points.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManMarkInternalPivots( Aig_Man_t * p )
-{
-    Vec_Ptr_t * vMuxes;
-    Aig_Obj_t * pObj;
-    int i, Counter = 0;
-
-    // remove refs due to MUXes
-    vMuxes = Aig_ManMuxesCollect( p );
-    Aig_ManMuxesDeref( p, vMuxes );
-
-    // mark nodes feeding into LIs
-    Aig_ManCleanMarkB( p );
-    Llb_ManLabelLiCones( p );
-
-    // mark internal nodes
-    Aig_ManFanoutStart( p );
-    Aig_ManForEachNode( p, pObj, i )
-        if ( pObj->fMarkB && pObj->nRefs > 1 )
-        {
-            if ( Llb_ManTracePaths(p, pObj) > 0 )
-                pObj->fMarkA = 1;
-            Counter++;
-        }
-    Aig_ManFanoutStop( p );
-//    printf( "TracePath tried = %d.\n", Counter );
-
-    // mark nodes feeding into LIs
-    Aig_ManCleanMarkB( p );
-
-    // add refs due to MUXes
-    Aig_ManMuxesRef( p, vMuxes );
-    Vec_PtrFree( vMuxes );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Determine starting cut-points.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_ManMarkPivotNodes( Aig_Man_t * p, int fUseInternal )
-{
-    Vec_Int_t * vVar2Obj;
-    Aig_Obj_t * pObj;
-    int i;
-    // mark inputs/outputs
-    Aig_ManForEachPi( p, pObj, i )
-        pObj->fMarkA = 1;
-    Saig_ManForEachLi( p, pObj, i )
-        pObj->fMarkA = 1;
-
-    // mark internal pivot nodes
-    if ( fUseInternal )
-        Llb_ManMarkInternalPivots( p );
-
-    // assign variable numbers
-    Aig_ManConst1(p)->fMarkA = 0;
-    vVar2Obj = Vec_IntAlloc( 100 );
-    Aig_ManForEachPi( p, pObj, i )
-        Vec_IntPush( vVar2Obj, Aig_ObjId(pObj) );
-    Aig_ManForEachNode( p, pObj, i )
-        if ( pObj->fMarkA )
-            Vec_IntPush( vVar2Obj, Aig_ObjId(pObj) );
-    Saig_ManForEachLi( p, pObj, i )
-        Vec_IntPush( vVar2Obj, Aig_ObjId(pObj) );
-    return vVar2Obj;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb1Reach.c b/src/aig/llb/llb1Reach.c
deleted file mode 100644
index e427eb24..00000000
--- a/src/aig/llb/llb1Reach.c
+++ /dev/null
@@ -1,899 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb1Reach.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Reachability analysis.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb1Reach.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-#include "extra.h"
-
-ABC_NAMESPACE_IMPL_START
-
- 
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Derives global BDD for the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_ManConstructOutBdd( Aig_Man_t * pAig, Aig_Obj_t * pNode, DdManager * dd )
-{
-    DdNode * bBdd0, * bBdd1, * bFunc;
-    Vec_Ptr_t * vNodes;
-    Aig_Obj_t * pObj;
-    int i, TimeStop;
-    if ( Aig_ObjFanin0(pNode) == Aig_ManConst1(pAig) )
-        return Cudd_NotCond( Cudd_ReadOne(dd), Aig_ObjFaninC0(pNode) );
-    TimeStop = dd->TimeStop;  dd->TimeStop = 0;
-    vNodes = Aig_ManDfsNodes( pAig, &pNode, 1 );
-    assert( Vec_PtrSize(vNodes) > 0 );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-    {
-        if ( !Aig_ObjIsNode(pObj) )
-            continue;
-        bBdd0 = Cudd_NotCond( Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-        bBdd1 = Cudd_NotCond( Aig_ObjFanin1(pObj)->pData, Aig_ObjFaninC1(pObj) );
-        pObj->pData = Cudd_bddAnd( dd, bBdd0, bBdd1 );  Cudd_Ref( (DdNode *)pObj->pData );
-    }
-    bFunc = (DdNode *)pObj->pData; Cudd_Ref( bFunc );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-    {
-        if ( !Aig_ObjIsNode(pObj) )
-            continue;
-        Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-    }
-    Vec_PtrFree( vNodes );
-    if ( Aig_ObjIsPo(pNode) )
-        bFunc = Cudd_NotCond( bFunc, Aig_ObjFaninC0(pNode) );
-    Cudd_Deref( bFunc );
-    dd->TimeStop = TimeStop;
-    return bFunc;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives BDD for the group.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_ManConstructGroupBdd( Llb_Man_t * p, Llb_Grp_t * pGroup )
-{
-    Aig_Obj_t * pObj;
-    DdNode * bBdd0, * bBdd1, * bRes, * bXor, * bTemp;
-    int i, k;
-    Aig_ManConst1(p->pAig)->pData = Cudd_ReadOne( p->dd );
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vIns, pObj, i )
-        pObj->pData = Cudd_bddIthVar( p->dd, Vec_IntEntry(p->vObj2Var, Aig_ObjId(pObj)) );
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vNodes, pObj, i )
-    {
-        bBdd0 = Cudd_NotCond( Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-        bBdd1 = Cudd_NotCond( Aig_ObjFanin1(pObj)->pData, Aig_ObjFaninC1(pObj) );
-//        pObj->pData = Extra_bddAndTime( p->dd, bBdd0, bBdd1, p->pPars->TimeTarget );  
-        pObj->pData = Cudd_bddAnd( p->dd, bBdd0, bBdd1 );  
-        if ( pObj->pData == NULL )
-        {
-            Vec_PtrForEachEntryStop( Aig_Obj_t *, pGroup->vNodes, pObj, k, i )
-                if ( pObj->pData )
-                    Cudd_RecursiveDeref( p->dd, (DdNode *)pObj->pData );
-            return NULL;
-        }
-        Cudd_Ref( (DdNode *)pObj->pData );
-    }
-    bRes = Cudd_ReadOne( p->dd );   Cudd_Ref( bRes );
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vOuts, pObj, i )
-    {
-        if ( Aig_ObjIsPo(pObj) )
-            bBdd0 = Cudd_NotCond( Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-        else
-            bBdd0 = (DdNode *)pObj->pData;
-        bBdd1 = Cudd_bddIthVar( p->dd, Vec_IntEntry(p->vObj2Var, Aig_ObjId(pObj)) );
-        bXor  = Cudd_bddXor( p->dd, bBdd0, bBdd1 );                  Cudd_Ref( bXor );
-//        bRes  = Extra_bddAndTime( p->dd, bTemp = bRes, Cudd_Not(bXor), p->pPars->TimeTarget );  
-        bRes  = Cudd_bddAnd( p->dd, bTemp = bRes, Cudd_Not(bXor) );  
-        if ( bRes == NULL )
-        {
-            Cudd_RecursiveDeref( p->dd, bTemp );
-            Cudd_RecursiveDeref( p->dd, bXor );
-            Vec_PtrForEachEntryStop( Aig_Obj_t *, pGroup->vNodes, pObj, k, i )
-                if ( pObj->pData )
-                    Cudd_RecursiveDeref( p->dd, (DdNode *)pObj->pData );
-            return NULL;
-        }        
-        Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-        Cudd_RecursiveDeref( p->dd, bXor );
-    }
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vNodes, pObj, i )
-        Cudd_RecursiveDeref( p->dd, (DdNode *)pObj->pData );
-    Cudd_Deref( bRes );
-    return bRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives quantification cube.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_ManConstructQuantCubeIntern( Llb_Man_t * p, Llb_Grp_t * pGroup, int iGrpPlace, int fBackward )
-{
-    Aig_Obj_t * pObj;
-    DdNode * bRes, * bTemp, * bVar;
-    int i, iGroupFirst, iGroupLast;
-    int TimeStop;
-    TimeStop = p->dd->TimeStop; p->dd->TimeStop = 0;
-    bRes = Cudd_ReadOne( p->dd );   Cudd_Ref( bRes );
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vIns, pObj, i )
-    {
-        if ( fBackward && Saig_ObjIsPi(p->pAig, pObj) )
-            continue;
-        iGroupFirst = Vec_IntEntry(p->vVarBegs, Aig_ObjId(pObj));
-        iGroupLast  = Vec_IntEntry(p->vVarEnds, Aig_ObjId(pObj));
-        assert( iGroupFirst <= iGroupLast );
-        if ( iGroupFirst < iGroupLast )
-            continue;
-        bVar  = Cudd_bddIthVar( p->dd, Vec_IntEntry(p->vObj2Var, Aig_ObjId(pObj)) );
-        bRes  = Cudd_bddAnd( p->dd, bTemp = bRes, bVar );  Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-    }
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vOuts, pObj, i )
-    {
-        if ( fBackward && Saig_ObjIsPi(p->pAig, pObj) )
-            continue;
-        iGroupFirst = Vec_IntEntry(p->vVarBegs, Aig_ObjId(pObj));
-        iGroupLast  = Vec_IntEntry(p->vVarEnds, Aig_ObjId(pObj));
-        assert( iGroupFirst <= iGroupLast );
-        if ( iGroupFirst < iGroupLast )
-            continue;
-        bVar  = Cudd_bddIthVar( p->dd, Vec_IntEntry(p->vObj2Var, Aig_ObjId(pObj)) );
-        bRes  = Cudd_bddAnd( p->dd, bTemp = bRes, bVar );  Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-    }
-    Cudd_Deref( bRes );
-    p->dd->TimeStop = TimeStop;
-    return bRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives quantification cube.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_ManConstructQuantCubeFwd( Llb_Man_t * p, Llb_Grp_t * pGroup, int iGrpPlace )
-{
-    Aig_Obj_t * pObj;
-    DdNode * bRes, * bTemp, * bVar;
-    int i, iGroupLast, TimeStop;
-    TimeStop = p->dd->TimeStop; p->dd->TimeStop = 0;
-    bRes = Cudd_ReadOne( p->dd );   Cudd_Ref( bRes );
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vIns, pObj, i )
-    {
-        iGroupLast = Vec_IntEntry(p->vVarEnds, Aig_ObjId(pObj));
-        assert( iGroupLast >= iGrpPlace );
-        if ( iGroupLast > iGrpPlace )
-            continue;
-        bVar  = Cudd_bddIthVar( p->dd, Vec_IntEntry(p->vObj2Var, Aig_ObjId(pObj)) );
-        bRes  = Cudd_bddAnd( p->dd, bTemp = bRes, bVar );  Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-    }
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vOuts, pObj, i )
-    {
-        iGroupLast = Vec_IntEntry(p->vVarEnds, Aig_ObjId(pObj));
-        assert( iGroupLast >= iGrpPlace );
-        if ( iGroupLast > iGrpPlace )
-            continue;
-        bVar  = Cudd_bddIthVar( p->dd, Vec_IntEntry(p->vObj2Var, Aig_ObjId(pObj)) );
-        bRes  = Cudd_bddAnd( p->dd, bTemp = bRes, bVar );  Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-    }
-    Cudd_Deref( bRes );
-    p->dd->TimeStop = TimeStop;
-    return bRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives quantification cube.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_ManConstructQuantCubeBwd( Llb_Man_t * p, Llb_Grp_t * pGroup, int iGrpPlace )
-{
-    Aig_Obj_t * pObj;
-    DdNode * bRes, * bTemp, * bVar;
-    int i, iGroupFirst, TimeStop;
-    TimeStop = p->dd->TimeStop; p->dd->TimeStop = 0;
-    bRes = Cudd_ReadOne( p->dd );   Cudd_Ref( bRes );
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vIns, pObj, i )
-    {
-        if ( Saig_ObjIsPi(p->pAig, pObj) )
-            continue;
-        iGroupFirst = Vec_IntEntry(p->vVarBegs, Aig_ObjId(pObj));
-        assert( iGroupFirst <= iGrpPlace );
-        if ( iGroupFirst < iGrpPlace )
-            continue;
-        bVar  = Cudd_bddIthVar( p->dd, Vec_IntEntry(p->vObj2Var, Aig_ObjId(pObj)) );
-        bRes  = Cudd_bddAnd( p->dd, bTemp = bRes, bVar );  Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-    }
-    Vec_PtrForEachEntry( Aig_Obj_t *, pGroup->vOuts, pObj, i )
-    {
-        if ( Saig_ObjIsPi(p->pAig, pObj) )
-            continue;
-        iGroupFirst = Vec_IntEntry(p->vVarBegs, Aig_ObjId(pObj));
-        assert( iGroupFirst <= iGrpPlace );
-        if ( iGroupFirst < iGrpPlace )
-            continue;
-        bVar  = Cudd_bddIthVar( p->dd, Vec_IntEntry(p->vObj2Var, Aig_ObjId(pObj)) );
-        bRes  = Cudd_bddAnd( p->dd, bTemp = bRes, bVar );  Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-    }
-    Cudd_Deref( bRes );
-    p->dd->TimeStop = TimeStop;
-    return bRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_ManComputeInitState( Llb_Man_t * p, DdManager * dd )
-{
-    Aig_Obj_t * pObj;
-    DdNode * bRes, * bVar, * bTemp;
-    int i, iVar, TimeStop;
-    TimeStop = dd->TimeStop; dd->TimeStop = 0;
-    bRes = Cudd_ReadOne( dd );   Cudd_Ref( bRes );
-    Saig_ManForEachLo( p->pAig, pObj, i )
-    {
-        iVar  = (dd == p->ddG) ? i : Vec_IntEntry(p->vObj2Var, Aig_ObjId(pObj));
-        bVar  = Cudd_bddIthVar( dd, iVar );
-        bRes  = Cudd_bddAnd( dd, bTemp = bRes, Cudd_Not(bVar) );  Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( dd, bTemp );
-    }
-    Cudd_Deref( bRes );
-    dd->TimeStop = TimeStop;
-    return bRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_ManComputeImage( Llb_Man_t * p, DdNode * bInit, int fBackward )
-{
-    int fCheckSupport = 0;
-    Llb_Grp_t * pGroup;
-    DdNode * bImage, * bGroup, * bCube, * bTemp;
-    int k, Index;
-    bImage = bInit;  Cudd_Ref( bImage );
-    for ( k = 1; k < p->pMatrix->nCols-1; k++ )
-    {
-        if ( fBackward )
-            Index = p->pMatrix->nCols - 1 - k;
-        else
-            Index = k;
-
-        // compute group BDD
-        pGroup = p->pMatrix->pColGrps[Index];
-        bGroup = Llb_ManConstructGroupBdd( p, pGroup );
-        if ( bGroup == NULL )
-        {
-            Cudd_RecursiveDeref( p->dd, bImage );
-            return NULL;
-        }
-        Cudd_Ref( bGroup );
-        // quantify variables appearing only in this group
-        bCube  = Llb_ManConstructQuantCubeIntern( p, pGroup, Index, fBackward );       Cudd_Ref( bCube );
-        bGroup = Cudd_bddExistAbstract( p->dd, bTemp = bGroup, bCube );         
-        if ( bGroup == NULL )
-        {
-            Cudd_RecursiveDeref( p->dd, bTemp );
-            Cudd_RecursiveDeref( p->dd, bCube );
-            return NULL;
-        }
-        Cudd_Ref( bGroup );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-        Cudd_RecursiveDeref( p->dd, bCube );
-        // perform partial product
-        if ( fBackward )
-            bCube  = Llb_ManConstructQuantCubeBwd( p, pGroup, Index );
-        else
-            bCube  = Llb_ManConstructQuantCubeFwd( p, pGroup, Index );
-        Cudd_Ref( bCube );
-//        bImage = Extra_bddAndAbstractTime( p->dd, bTemp = bImage, bGroup, bCube, p->pPars->TimeTarget );   
-        bImage = Cudd_bddAndAbstract( p->dd, bTemp = bImage, bGroup, bCube );   
-        if ( bImage == NULL )
-        {
-            Cudd_RecursiveDeref( p->dd, bTemp );
-            Cudd_RecursiveDeref( p->dd, bGroup );
-            Cudd_RecursiveDeref( p->dd, bCube );
-            return NULL;
-        }
-        Cudd_Ref( bImage );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-        Cudd_RecursiveDeref( p->dd, bGroup );
-        Cudd_RecursiveDeref( p->dd, bCube );
-    }
-
-    // make sure image depends on next state vars
-    if ( fCheckSupport )
-    {
-        bCube = Cudd_Support( p->dd, bImage );    Cudd_Ref( bCube );
-        for ( bTemp = bCube; bTemp != p->dd->one; bTemp = cuddT(bTemp) )
-        {
-            int ObjId = Vec_IntEntry( p->vVar2Obj, bTemp->index );
-            Aig_Obj_t * pObj = Aig_ManObj( p->pAig, ObjId );
-            if ( !Saig_ObjIsLi(p->pAig, pObj) )
-                printf( "Var %d assigned to obj %d that is not LI\n", bTemp->index, ObjId );
-        }
-        Cudd_RecursiveDeref( p->dd, bCube );
-    }
-    Cudd_Deref( bImage );
-    return bImage;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_ManCreateConstraints( Llb_Man_t * p, Vec_Int_t * vHints, int fUseNsVars )
-{
-    DdNode * bConstr, * bFunc, * bTemp;
-    Aig_Obj_t * pObj;
-    int i, Entry, TimeStop;
-    if ( vHints == NULL )
-        return Cudd_ReadOne( p->dd );
-    TimeStop = p->dd->TimeStop; p->dd->TimeStop = 0;
-    assert( Aig_ManPiNum(p->pAig) == Aig_ManPiNum(p->pAigGlo) );
-    // assign const and PI nodes to the original AIG
-    Aig_ManCleanData( p->pAig );
-    Aig_ManConst1( p->pAig )->pData = Cudd_ReadOne( p->dd );
-    Saig_ManForEachPi( p->pAig, pObj, i )
-        pObj->pData = Cudd_bddIthVar( p->dd, Vec_IntEntry(p->vObj2Var,Aig_ObjId(pObj)) );
-    Saig_ManForEachLo( p->pAig, pObj, i )
-    {
-        if ( fUseNsVars )
-            Entry = Vec_IntEntry( p->vObj2Var, Aig_ObjId(Saig_ObjLoToLi(p->pAig, pObj)) );
-        else
-            Entry = Vec_IntEntry( p->vObj2Var, Aig_ObjId(pObj) );
-        pObj->pData = Cudd_bddIthVar( p->dd, Entry );
-    }
-    // transfer them to the global AIG
-    Aig_ManCleanData( p->pAigGlo );
-    Aig_ManConst1( p->pAigGlo )->pData = Cudd_ReadOne( p->dd );
-    Aig_ManForEachPi( p->pAigGlo, pObj, i )
-        pObj->pData = Aig_ManPi(p->pAig, i)->pData;
-    // derive consraints
-    bConstr = Cudd_ReadOne( p->dd );   Cudd_Ref( bConstr );
-    Vec_IntForEachEntry( vHints, Entry, i )
-    {
-        if ( Entry != 0 && Entry != 1 )
-            continue;
-        bFunc = Llb_ManConstructOutBdd( p->pAigGlo, Aig_ManObj(p->pAigGlo, i), p->dd );  Cudd_Ref( bFunc );
-        bFunc = Cudd_NotCond( bFunc, Entry ); // restrict to not constraint
-        // make the product
-        bConstr = Cudd_bddAnd( p->dd, bTemp = bConstr, bFunc );                          Cudd_Ref( bConstr );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-        Cudd_RecursiveDeref( p->dd, bFunc );
-    }
-    Cudd_Deref( bConstr );
-    p->dd->TimeStop = TimeStop;
-    return bConstr;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Perform reachability with hints and returns reached states in ppGlo.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Abc_Cex_t * Llb_ManReachDeriveCex( Llb_Man_t * p )
-{
-    Abc_Cex_t * pCex;
-    Aig_Obj_t * pObj;
-    DdNode * bState, * bImage, * bOneCube, * bTemp, * bRing;
-    int i, v, RetValue, nPiOffset;
-    char * pValues = ABC_ALLOC( char, Cudd_ReadSize(p->ddR) );
-    assert( Vec_PtrSize(p->vRings) > 0 );
-
-    p->dd->TimeStop  = 0;
-    p->ddR->TimeStop = 0;
-
-/*
-    Saig_ManForEachLo( p->pAig, pObj, i )
-        printf( "%d ", pObj->Id );
-    printf( "\n" );
-    Saig_ManForEachLi( p->pAig, pObj, i )
-        printf( "%d(%d) ", pObj->Id, Aig_ObjFaninId0(pObj) );
-    printf( "\n" );
-*/
-    // allocate room for the counter-example
-    pCex = Abc_CexAlloc( Saig_ManRegNum(p->pAig), Saig_ManPiNum(p->pAig), Vec_PtrSize(p->vRings) );
-    pCex->iFrame = Vec_PtrSize(p->vRings) - 1;
-    pCex->iPo = -1;
-
-    // get the last cube
-    bOneCube = Cudd_bddIntersect( p->ddR, (DdNode *)Vec_PtrEntryLast(p->vRings), p->ddR->bFunc );  Cudd_Ref( bOneCube );
-    RetValue = Cudd_bddPickOneCube( p->ddR, bOneCube, pValues );
-    Cudd_RecursiveDeref( p->ddR, bOneCube );
-    assert( RetValue );
-
-    // write PIs of counter-example
-    nPiOffset = Saig_ManRegNum(p->pAig) + Saig_ManPiNum(p->pAig) * (Vec_PtrSize(p->vRings) - 1);
-    Saig_ManForEachPi( p->pAig, pObj, i )
-        if ( pValues[Saig_ManRegNum(p->pAig)+i] == 1 )
-            Aig_InfoSetBit( pCex->pData, nPiOffset + i );
-
-    // write state in terms of NS variables
-    if ( Vec_PtrSize(p->vRings) > 1 )
-    {
-        bState = Llb_CoreComputeCube( p->dd, p->vGlo2Ns, 1, pValues );   Cudd_Ref( bState );
-    }
-    // perform backward analysis
-    Vec_PtrForEachEntryReverse( DdNode *, p->vRings, bRing, v )
-    { 
-        if ( v == Vec_PtrSize(p->vRings) - 1 )
-            continue;
-//Extra_bddPrintSupport( p->dd, bState );  printf( "\n" );
-//Extra_bddPrintSupport( p->dd, bRing );   printf( "\n" );
-        // compute the next states
-        bImage = Llb_ManComputeImage( p, bState, 1 ); 
-        assert( bImage != NULL );
-        Cudd_Ref( bImage );
-        Cudd_RecursiveDeref( p->dd, bState );
-//Extra_bddPrintSupport( p->dd, bImage );  printf( "\n" );
-
-        // move reached states into ring manager
-        bImage = Extra_TransferPermute( p->dd, p->ddR, bTemp = bImage, Vec_IntArray(p->vCs2Glo) );    Cudd_Ref( bImage );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-//Extra_bddPrintSupport( p->ddR, bImage );  printf( "\n" );
-
-        // intersect with the previous set
-        bOneCube = Cudd_bddIntersect( p->ddR, bImage, bRing );                Cudd_Ref( bOneCube );
-        Cudd_RecursiveDeref( p->ddR, bImage );
-
-        // find any assignment of the BDD
-        RetValue = Cudd_bddPickOneCube( p->ddR, bOneCube, pValues );
-        Cudd_RecursiveDeref( p->ddR, bOneCube );
-        assert( RetValue );
-/*
-        for ( i = 0; i < p->ddR->size; i++ )
-            printf( "%d ", pValues[i] );
-        printf( "\n" );
-*/
-        // write PIs of counter-example
-        nPiOffset -= Saig_ManPiNum(p->pAig);
-        Saig_ManForEachPi( p->pAig, pObj, i )
-            if ( pValues[Saig_ManRegNum(p->pAig)+i] == 1 )
-                Aig_InfoSetBit( pCex->pData, nPiOffset + i );
-
-        // check that we get the init state
-        if ( v == 0 )
-        {
-            Saig_ManForEachLo( p->pAig, pObj, i )
-                assert( pValues[i] == 0 );
-            break;
-        }
-
-        // write state in terms of NS variables
-        bState = Llb_CoreComputeCube( p->dd, p->vGlo2Ns, 1, pValues );   Cudd_Ref( bState );
-    }
-    assert( nPiOffset == Saig_ManRegNum(p->pAig) );
-    // update the output number
-//Abc_CexPrint( pCex );
-    RetValue = Saig_ManFindFailedPoCex( p->pAigGlo, pCex );
-    assert( RetValue >= 0 && RetValue < Saig_ManPoNum(p->pAigGlo) ); // invalid CEX!!!
-    pCex->iPo = RetValue;
-    // cleanup
-    ABC_FREE( pValues );
-    return pCex;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Perform reachability with hints and returns reached states in ppGlo.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManReachability( Llb_Man_t * p, Vec_Int_t * vHints, DdManager ** pddGlo )
-{
-    int * pNs2Glo = Vec_IntArray( p->vNs2Glo );
-    int * pCs2Glo = Vec_IntArray( p->vCs2Glo );
-    int * pGlo2Cs = Vec_IntArray( p->vGlo2Cs );
-    DdNode * bCurrent, * bReached, * bNext, * bTemp, * bCube;
-    DdNode * bConstrCs, * bConstrNs;
-    int clk2, clk = clock(), nIters, nBddSize = 0;
-    int nThreshold = 10000;
-
-    // compute time to stop
-    p->pPars->TimeTarget = p->pPars->TimeLimit ? time(NULL) + p->pPars->TimeLimit : 0;
-
-    // define variable limits
-    Llb_ManPrepareVarLimits( p );
-
-    // start the managers
-    assert( p->dd == NULL );
-    assert( p->ddG == NULL );
-    assert( p->ddR == NULL );
-    p->dd  = Cudd_Init( Vec_IntSize(p->vVar2Obj), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    p->ddR = Cudd_Init( Aig_ManPiNum(p->pAig),    0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    if ( pddGlo && *pddGlo )
-        p->ddG = *pddGlo, *pddGlo = NULL; 
-    else
-        p->ddG = Cudd_Init( Aig_ManRegNum(p->pAig),   0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-
-    if ( p->pPars->fReorder )
-    {
-        Cudd_AutodynEnable( p->dd,  CUDD_REORDER_SYMM_SIFT );
-        Cudd_AutodynEnable( p->ddG, CUDD_REORDER_SYMM_SIFT );
-        Cudd_AutodynEnable( p->ddR, CUDD_REORDER_SYMM_SIFT );
-    }
-    else
-    {
-        Cudd_AutodynDisable( p->dd );
-        Cudd_AutodynDisable( p->ddG );
-        Cudd_AutodynDisable( p->ddR );
-    }
-
-    // set the stop time parameter
-    p->dd->TimeStop  = p->pPars->TimeTarget;
-    p->ddG->TimeStop = p->pPars->TimeTarget;
-    p->ddR->TimeStop = p->pPars->TimeTarget;
-
-    // create bad state in the ring manager
-    p->ddR->bFunc  = Llb_BddComputeBad( p->pAigGlo, p->ddR, p->pPars->TimeTarget );          
-    if ( p->ddR->bFunc == NULL )
-    {
-        if ( !p->pPars->fSilent )
-            printf( "Reached timeout (%d seconds) during constructing the bad states.\n", p->pPars->TimeLimit );
-        p->pPars->iFrame = -1;
-        return -1;
-    }
-    Cudd_Ref( p->ddR->bFunc );
-
-    // derive constraints
-    bConstrCs = Llb_ManCreateConstraints( p, vHints, 0 );   Cudd_Ref( bConstrCs );
-    bConstrNs = Llb_ManCreateConstraints( p, vHints, 1 );   Cudd_Ref( bConstrNs );
-//Extra_bddPrint( p->dd, bConstrCs ); printf( "\n" );
-//Extra_bddPrint( p->dd, bConstrNs ); printf( "\n" );
-
-    // perform reachability analysis
-    // compute the starting set of states
-    if ( p->ddG->bFunc )
-    {
-        bReached = p->ddG->bFunc; p->ddG->bFunc = NULL;
-        bCurrent = Extra_TransferPermute( p->ddG, p->dd, bReached, pGlo2Cs );    Cudd_Ref( bCurrent );
-    }
-    else
-    {
-        bReached = Llb_ManComputeInitState( p, p->ddG );                         Cudd_Ref( bReached );
-        bCurrent = Llb_ManComputeInitState( p, p->dd  );                         Cudd_Ref( bCurrent );
-    }
-//Extra_bddPrintSupport( p->ddG, bReached ); printf( "\n" );
-//Extra_bddPrintSupport( p->dd,  bCurrent ); printf( "\n" );
-
-//Extra_bddPrintSupport( p->dd, bCurrent ); printf( "\n" );
-    for ( nIters = 0; nIters < p->pPars->nIterMax; nIters++ )
-    { 
-        clk2 = clock();
-        // check the runtime limit
-        if ( p->pPars->TimeLimit && time(NULL) > p->pPars->TimeTarget )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout during image computation (%d seconds).\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->dd,  bCurrent );  bCurrent = NULL;
-            Cudd_RecursiveDeref( p->dd,  bConstrCs ); bConstrCs = NULL;
-            Cudd_RecursiveDeref( p->dd,  bConstrNs ); bConstrNs = NULL;
-            Cudd_RecursiveDeref( p->ddG, bReached );  bReached = NULL;
-            return -1;
-        }
-
-        // save the onion ring
-        bTemp = Extra_TransferPermute( p->dd, p->ddR, bCurrent, pCs2Glo );
-        if ( bTemp == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during ring transfer.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->dd,  bCurrent );  bCurrent = NULL;
-            Cudd_RecursiveDeref( p->dd,  bConstrCs ); bConstrCs = NULL;
-            Cudd_RecursiveDeref( p->dd,  bConstrNs ); bConstrNs = NULL;
-            Cudd_RecursiveDeref( p->ddG, bReached );  bReached = NULL;
-            return -1;
-        }
-        Cudd_Ref( bTemp );
-        Vec_PtrPush( p->vRings, bTemp );
-
-        // check it for bad states
-        if ( !p->pPars->fSkipOutCheck && !Cudd_bddLeq( p->ddR, bTemp, Cudd_Not(p->ddR->bFunc) ) ) 
-        {
-            assert( p->pAigGlo->pSeqModel == NULL );
-            if ( !p->pPars->fBackward )
-                p->pAigGlo->pSeqModel = Llb_ManReachDeriveCex( p ); 
-            if ( !p->pPars->fSilent )
-            {
-                if ( !p->pPars->fBackward )
-                    printf( "Output %d was asserted in frame %d (use \"write_counter\" to dump a witness).  ", p->pAigGlo->pSeqModel->iPo, nIters );
-                else
-                    printf( "Output ??? was asserted in frame %d (counter-example is not produced).  ", nIters );
-                Abc_PrintTime( 1, "Time", clock() - clk );
-            }
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->dd,  bCurrent );  bCurrent = NULL;
-            Cudd_RecursiveDeref( p->dd,  bConstrCs ); bConstrCs = NULL;
-            Cudd_RecursiveDeref( p->dd,  bConstrNs ); bConstrNs = NULL;
-            Cudd_RecursiveDeref( p->ddG, bReached );  bReached = NULL;
-            return 0; 
-        }
-
-        // restrict reachable states using constraints
-        if ( vHints )
-        {
-            bCurrent = Cudd_bddAnd( p->dd, bTemp = bCurrent, bConstrCs );                                Cudd_Ref( bCurrent );
-            Cudd_RecursiveDeref( p->dd, bTemp );
-        }
-
-        // quantify variables appearing only in the init state
-        bCube    = Llb_ManConstructQuantCubeIntern( p, (Llb_Grp_t *)Vec_PtrEntry(p->vGroups,0), 0, 0 );  Cudd_Ref( bCube );
-        bCurrent = Cudd_bddExistAbstract( p->dd, bTemp = bCurrent, bCube );                              Cudd_Ref( bCurrent );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-        Cudd_RecursiveDeref( p->dd, bCube );
-
-        // compute the next states
-        bNext = Llb_ManComputeImage( p, bCurrent, 0 );
-        if ( bNext == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->dd,  bCurrent );   bCurrent = NULL;
-            Cudd_RecursiveDeref( p->dd,  bConstrCs );  bConstrCs = NULL;
-            Cudd_RecursiveDeref( p->dd,  bConstrNs );  bConstrNs = NULL;
-            Cudd_RecursiveDeref( p->ddG, bReached );   bReached = NULL;
-            return -1;
-        }
-        Cudd_Ref( bNext );
-        Cudd_RecursiveDeref( p->dd, bCurrent ); bCurrent = NULL;
-
-        // restrict reachable states using constraints
-        if ( vHints )
-        {
-            bNext = Cudd_bddAnd( p->dd, bTemp = bNext, bConstrNs );                Cudd_Ref( bNext );
-            Cudd_RecursiveDeref( p->dd, bTemp );
-        }
-//Extra_bddPrintSupport( p->dd, bNext ); printf( "\n" );
-
-        // remap these states into the current state vars
-//        bNext = Extra_TransferPermute( p->dd, p->ddG, bTemp = bNext, pNs2Glo );    Cudd_Ref( bNext );
-//        Cudd_RecursiveDeref( p->dd, bTemp );
-//        bNext = Extra_TransferPermuteTime( p->dd, p->ddG, bTemp = bNext, pNs2Glo, p->pPars->TimeTarget );    
-        bNext = Extra_TransferPermute( p->dd, p->ddG, bTemp = bNext, pNs2Glo );    
-        if ( bNext == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation in transfer 1.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->dd,  bTemp );  
-            Cudd_RecursiveDeref( p->dd,  bConstrCs );  bConstrCs = NULL;
-            Cudd_RecursiveDeref( p->dd,  bConstrNs );  bConstrNs = NULL;
-            Cudd_RecursiveDeref( p->ddG, bReached );   bReached = NULL;
-            return -1;
-        }
-        Cudd_Ref( bNext );
-        Cudd_RecursiveDeref( p->dd, bTemp );  
-
-
-        // check if there are any new states
-        if ( Cudd_bddLeq( p->ddG, bNext, bReached ) ) // implication = no new states
-        {
-            Cudd_RecursiveDeref( p->ddG,  bNext );     bNext = NULL;
-            break;
-        }
-
-        // check the BDD size
-        nBddSize = Cudd_DagSize(bNext);
-        if ( nBddSize > p->pPars->nBddMax )
-        {
-            Cudd_RecursiveDeref( p->ddG,  bNext );     bNext = NULL;
-            break;
-        }
-
-        // get the new states
-        bCurrent = Cudd_bddAnd( p->ddG, bNext, Cudd_Not(bReached) );
-        if ( bCurrent == NULL )
-        {
-            Cudd_RecursiveDeref( p->ddG,  bNext );        bNext = NULL;
-            Cudd_RecursiveDeref( p->ddG,  bReached );     bReached = NULL;
-            break;
-        }
-        Cudd_Ref( bCurrent );
-        // minimize the new states with the reached states
-//        bCurrent = Cudd_bddConstrain( p->ddG, bTemp = bCurrent, Cudd_Not(bReached) ); Cudd_Ref( bCurrent );
-//        bCurrent = Cudd_bddRestrict( p->ddG, bTemp = bCurrent, Cudd_Not(bReached) );  Cudd_Ref( bCurrent );
-//        Cudd_RecursiveDeref( p->ddG, bTemp );
-//printf( "Initial BDD =%7d. Constrained BDD =%7d.\n", Cudd_DagSize(bTemp), Cudd_DagSize(bCurrent) );
-
-        // remap these states into the current state vars
-//        bCurrent = Extra_TransferPermute( p->ddG, p->dd, bTemp = bCurrent, pGlo2Cs );   Cudd_Ref( bCurrent );
-//        Cudd_RecursiveDeref( p->ddG, bTemp );
-//        bCurrent = Extra_TransferPermuteTime( p->ddG, p->dd, bTemp = bCurrent, pGlo2Cs, p->pPars->TimeTarget );    
-        bCurrent = Extra_TransferPermute( p->ddG, p->dd, bTemp = bCurrent, pGlo2Cs );    
-        if ( bCurrent == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation in transfer 2.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->ddG, bTemp );  
-            Cudd_RecursiveDeref( p->dd,  bConstrCs );  bConstrCs = NULL;
-            Cudd_RecursiveDeref( p->dd,  bConstrNs );  bConstrNs = NULL;
-            Cudd_RecursiveDeref( p->ddG, bReached );   bReached = NULL;
-            return -1;
-        }
-        Cudd_Ref( bCurrent );
-        Cudd_RecursiveDeref( p->ddG, bTemp ); 
-        
-
-        // add to the reached states
-        bReached = Cudd_bddOr( p->ddG, bTemp = bReached, bNext );                       
-        if ( bReached == NULL )
-        {
-            Cudd_RecursiveDeref( p->ddG,  bTemp );     bTemp = NULL;
-            Cudd_RecursiveDeref( p->ddG,  bNext );     bNext = NULL;
-            break;
-        }
-        Cudd_Ref( bReached );
-        Cudd_RecursiveDeref( p->ddG, bTemp );
-        Cudd_RecursiveDeref( p->ddG, bNext );
-        bNext = NULL;
-
-        if ( p->pPars->fVerbose )
-        {
-            fprintf( stdout, "F =%5d : ",    nIters );
-            fprintf( stdout, "Im =%6d  ",    nBddSize );
-            fprintf( stdout, "(%4d %3d)   ", Cudd_ReadReorderings(p->dd),  Cudd_ReadGarbageCollections(p->dd) );
-            fprintf( stdout, "Rea =%6d  ",   Cudd_DagSize(bReached) );
-            fprintf( stdout, "(%4d%4d)   ",  Cudd_ReadReorderings(p->ddG), Cudd_ReadGarbageCollections(p->ddG) );
-            Abc_PrintTime( 1, "Time", clock() - clk2 );
-        }
-/*
-        if ( p->pPars->fVerbose )
-        {
-            double nMints = Cudd_CountMinterm(p->ddG, bReached, Saig_ManRegNum(p->pAig) );
-//            Extra_bddPrint( p->ddG, bReached );printf( "\n" );
-            fprintf( stdout, "Reachable states = %.0f. (Ratio = %.4f %%)\n", nMints, 100.0*nMints/pow(2.0, Saig_ManRegNum(p->pAig)) );
-            fflush( stdout ); 
-        }
-*/
-    }
-    Cudd_RecursiveDeref( p->dd, bConstrCs ); bConstrCs = NULL;
-    Cudd_RecursiveDeref( p->dd, bConstrNs ); bConstrNs = NULL;
-    if ( bReached == NULL )
-    {
-        p->pPars->iFrame = nIters - 1;
-        return 0; // reachable
-    }
-//    assert( bCurrent == NULL );
-    if ( bCurrent )
-        Cudd_RecursiveDeref( p->dd, bCurrent );
-    // report the stats
-    if ( p->pPars->fVerbose )
-    {
-        double nMints = Cudd_CountMinterm(p->ddG, bReached, Saig_ManRegNum(p->pAig) );
-        if ( nIters >= p->pPars->nIterMax || nBddSize > p->pPars->nBddMax )
-            fprintf( stdout, "Reachability analysis is stopped after %d frames.\n", nIters );
-        else
-            fprintf( stdout, "Reachability analysis completed after %d frames.\n", nIters );
-        fprintf( stdout, "Reachable states = %.0f. (Ratio = %.4f %%)\n", nMints, 100.0*nMints/pow(2.0, Saig_ManRegNum(p->pAig)) );
-        fflush( stdout ); 
-    }
-    if ( nIters >= p->pPars->nIterMax || nBddSize > p->pPars->nBddMax )
-    {
-        if ( !p->pPars->fSilent )
-            printf( "Verified only for states reachable in %d frames.  ", nIters );
-        p->pPars->iFrame = p->pPars->nIterMax;
-        Cudd_RecursiveDeref( p->ddG, bReached );
-        return -1; // undecided
-    }
-    if ( pddGlo ) 
-    {
-        assert( p->ddG->bFunc == NULL );
-        p->ddG->bFunc = bReached; bReached = NULL;
-        assert( *pddGlo == NULL );
-        *pddGlo = p->ddG;  p->ddG = NULL;
-    }
-    else
-        Cudd_RecursiveDeref( p->ddG, bReached );
-    if ( !p->pPars->fSilent )
-        printf( "The miter is proved unreachable after %d iterations.  ", nIters );
-    p->pPars->iFrame = nIters - 1;
-    return 1; // unreachable
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb1Sched.c b/src/aig/llb/llb1Sched.c
deleted file mode 100644
index 6bdae42e..00000000
--- a/src/aig/llb/llb1Sched.c
+++ /dev/null
@@ -1,257 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb1Sched.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Partition scheduling algorithm.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb1Sched.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Swaps two rows.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MtrSwapColumns( Llb_Mtr_t * p, int iCol1, int iCol2 )
-{
-    Llb_Grp_t * pGemp;
-    char * pTemp;
-    int iTemp;
-    assert( iCol1 >= 0 && iCol1 < p->nCols );
-    assert( iCol2 >= 0 && iCol2 < p->nCols );
-    if ( iCol1 == iCol2 )
-        return;
-    assert( iCol1 != iCol2 );
-    // swap col groups
-    pGemp = p->pColGrps[iCol1];
-    p->pColGrps[iCol1] = p->pColGrps[iCol2];
-    p->pColGrps[iCol2] = pGemp;
-    // swap col vectors
-    pTemp = p->pMatrix[iCol1];
-    p->pMatrix[iCol1] = p->pMatrix[iCol2];
-    p->pMatrix[iCol2] = pTemp;
-    // swap col sums
-    iTemp = p->pColSums[iCol1];
-    p->pColSums[iCol1] = p->pColSums[iCol2];
-    p->pColSums[iCol2] = iTemp;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find columns which brings as few vars as possible.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_MtrFindBestColumn( Llb_Mtr_t * p, int iGrpStart )
-{
-    int Cost, Cost2, CostBest = ABC_INFINITY, Cost2Best = ABC_INFINITY;
-    int WeightCur, WeightBest = -ABC_INFINITY, iGrp, iGrpBest = -1;
-    int k, c, iVar, Counter;
-    // find partition that reduces partial product as much as possible
-    for ( iVar = 0; iVar < p->nRows - p->nFfs; iVar++ )
-    { 
-        if ( p->pRowSums[iVar] < 2 )
-            continue;
-        // look at present variables that can be quantified
-        if ( !(p->pProdVars[iVar] == 1 && p->pProdNums[iVar] == 1) )
-            continue;
-        // check that it appears in one partition only
-        Counter = 0;
-        for ( c = iGrpStart; c < p->nCols-1; c++ )
-            if ( p->pMatrix[c][iVar] == 1 )
-            {
-                iGrp = c;
-                Counter++;
-            }
-        assert( Counter == 1 );
-        if ( Counter != 1 )
-            Abc_Print( -1, "Llb_MtrFindBestColumn() Internal error!\n" );
-        // find weight of this column
-        WeightCur = 0;
-        for ( k = 0; k < p->nRows; k++ )
-        {
-            // increase weight if variable k will be quantified from partial product
-            if ( p->pProdVars[k] == 1 && p->pMatrix[iGrp][k] == 1 && p->pProdNums[k] == 1 ) 
-                WeightCur += 2;
-            // decrease weight if variable k will be added to partial product
-            if ( p->pProdVars[k] == 0 && p->pMatrix[iGrp][k] == 1 )
-                WeightCur--;
-        }
-        if ( WeightCur > 0 && WeightBest < WeightCur )
-        {
-            WeightBest = WeightCur;
-            iGrpBest   = iGrp;
-        }
-    }
-    if ( iGrpBest >= 0 )
-        return iGrpBest;
-    // could not find the group with any vars to quantify
-    // select the group that contains as few extra variables as possible
-    // if there is a tie, select variables that appear in less groups than others
-    for ( iGrp = iGrpStart; iGrp < p->nCols-1; iGrp++ )
-    {
-        Cost = Cost2 = 0;
-        for ( k = 0; k < p->nRows; k++ )
-            if ( p->pProdVars[k] == 0 && p->pMatrix[iGrp][k] == 1 )
-            {
-                Cost++;
-                Cost2 += p->pProdNums[k];
-            }
-        if ( CostBest >  Cost || 
-            (CostBest == Cost && Cost2 > Cost2Best) )
-        {
-            CostBest  = Cost;
-            Cost2Best = Cost2;
-            iGrpBest  = iGrp;
-        }
-    }
-    return iGrpBest;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of variables that will be saved.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MtrUseSelectedColumn( Llb_Mtr_t * p, int iCol )
-{
-    int iVar;
-    assert( iCol >= 1 && iCol < p->nCols - 1 );
-    for ( iVar = 0; iVar < p->nRows; iVar++ )
-    {
-        if ( p->pMatrix[iCol][iVar] == 0 )
-            continue;
-        if ( p->pProdVars[iVar] == 1 && p->pProdNums[iVar] == 1 )
-        {
-            p->pProdVars[iVar] = 0;
-            p->pProdNums[iVar] = 0;
-            continue;
-        }
-        if ( p->pProdVars[iVar] == 0 )
-        {
-            p->pProdVars[iVar] = 1;
-            p->pProdNums[iVar] = p->pRowSums[iVar];
-        }
-        p->pProdNums[iVar]--;
-        assert( p->pProdNums[iVar] >= 0 );
-        if ( p->pProdNums[iVar] < 0 )
-            Abc_Print( -1, "Llb_MtrUseSelectedColumn() Internal error!\n" );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Verify columns.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MtrVerifyColumns( Llb_Mtr_t * p, int iGrpStart )
-{
-    int iVar, iGrp, Counter;
-    for ( iVar = 0; iVar < p->nRows; iVar++ )
-    {
-        if ( p->pProdVars[iVar] == 0 )
-            continue;
-        Counter = 0;
-        for ( iGrp = iGrpStart; iGrp < p->nCols; iGrp++ )
-            if ( p->pMatrix[iGrp][iVar] == 1 )
-                Counter++;
-        assert( Counter == p->pProdNums[iVar] );
-        if ( Counter != p->pProdNums[iVar] )
-            Abc_Print( -1, "Llb_MtrVerifyColumns(): Internal error.\n" );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Matrix reduce.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MtrSchedule( Llb_Mtr_t * p )
-{
-    int iGrp, iGrpBest, i;
-    // start partial product
-    for ( i = 0; i < p->nRows; i++ )
-    {
-        if ( i >= p->nPis && i < p->nPis + p->nFfs )
-        {
-            p->pProdVars[i] = 1;
-            p->pProdNums[i] = p->pRowSums[i] - 1;
-        }
-        else 
-        {
-            p->pProdVars[i] = 0;
-            p->pProdNums[i] = p->pRowSums[i];
-        }
-    }
-    // order the partitions
-    Llb_MtrVerifyMatrix( p );
-    for ( iGrp = 1; iGrp < p->nCols-1; iGrp++ )
-    {
-        Llb_MtrVerifyColumns( p, iGrp );
-        iGrpBest = Llb_MtrFindBestColumn( p, iGrp );
-        Llb_MtrUseSelectedColumn( p, iGrpBest );
-        Llb_MtrSwapColumns( p, iGrp, iGrpBest );
-    }
-    Llb_MtrVerifyMatrix( p );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb2Bad.c b/src/aig/llb/llb2Bad.c
deleted file mode 100644
index 9aecb9ff..00000000
--- a/src/aig/llb/llb2Bad.c
+++ /dev/null
@@ -1,137 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb2Bad.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Computing bad states.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb2Bad.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
- 
-/**Function*************************************************************
-
-  Synopsis    [Computes bad in working manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_BddComputeBad( Aig_Man_t * pInit, DdManager * dd, int TimeOut )
-{
-    Vec_Ptr_t * vNodes;
-    DdNode * bBdd0, * bBdd1, * bTemp, * bResult;
-    Aig_Obj_t * pObj;
-    int i, k;
-    assert( Cudd_ReadSize(dd) == Aig_ManPiNum(pInit) );
-    // initialize elementary variables
-    Aig_ManConst1(pInit)->pData = Cudd_ReadOne( dd );
-    Saig_ManForEachLo( pInit, pObj, i )
-        pObj->pData = Cudd_bddIthVar( dd, i );
-    Saig_ManForEachPi( pInit, pObj, i )
-        pObj->pData = Cudd_bddIthVar( dd, Aig_ManRegNum(pInit) + i );
-    // compute internal nodes
-    vNodes = Aig_ManDfsNodes( pInit, (Aig_Obj_t **)Vec_PtrArray(pInit->vPos), Saig_ManPoNum(pInit) );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-    {
-        if ( !Aig_ObjIsNode(pObj) )
-            continue;
-        bBdd0 = Cudd_NotCond( (DdNode *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-        bBdd1 = Cudd_NotCond( (DdNode *)Aig_ObjFanin1(pObj)->pData, Aig_ObjFaninC1(pObj) );
-//        pObj->pData = Extra_bddAndTime( dd, bBdd0, bBdd1, TimeOut );
-        pObj->pData = Cudd_bddAnd( dd, bBdd0, bBdd1 );
-        if ( pObj->pData == NULL )
-        {
-            Vec_PtrForEachEntryStop( Aig_Obj_t *, vNodes, pObj, k, i )
-                if ( pObj->pData )
-                    Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-            Vec_PtrFree( vNodes );
-            return NULL;
-        }
-        Cudd_Ref( (DdNode *)pObj->pData );
-    }
-    // quantify PIs of each PO
-    bResult = Cudd_ReadLogicZero( dd );  Cudd_Ref( bResult );
-    Saig_ManForEachPo( pInit, pObj, i )
-    {
-        bBdd0   = Cudd_NotCond( Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-        bResult = Cudd_bddOr( dd, bTemp = bResult, bBdd0 );     Cudd_Ref( bResult );
-        Cudd_RecursiveDeref( dd, bTemp );
-    }
-    // deref
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-    {
-        if ( !Aig_ObjIsNode(pObj) )
-            continue;
-        Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-    }
-    Vec_PtrFree( vNodes );
-    Cudd_Deref( bResult );
-    return bResult;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_BddQuantifyPis( Aig_Man_t * pInit, DdManager * dd, DdNode * bFunc )
-{
-    DdNode * bVar, * bCube, * bTemp;
-    Aig_Obj_t * pObj;
-    int i, TimeStop;
-    assert( Cudd_ReadSize(dd) == Aig_ManPiNum(pInit) );
-    TimeStop = dd->TimeStop; dd->TimeStop = 0;
-    // create PI cube
-    bCube = Cudd_ReadOne( dd );  Cudd_Ref( bCube );
-    Saig_ManForEachPi( pInit, pObj, i )    {
-        bVar  = Cudd_bddIthVar( dd, Aig_ManRegNum(pInit) + i );
-        bCube = Cudd_bddAnd( dd, bTemp = bCube, bVar );  Cudd_Ref( bCube );
-        Cudd_RecursiveDeref( dd, bTemp );
-    }
-    // quantify PI cube
-    bFunc = Cudd_bddExistAbstract( dd, bFunc, bCube );  Cudd_Ref( bFunc );
-    Cudd_RecursiveDeref( dd, bCube );
-    Cudd_Deref( bFunc );
-    dd->TimeStop = TimeStop;
-    return bFunc;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb2Core.c b/src/aig/llb/llb2Core.c
deleted file mode 100644
index 4ecd1cdf..00000000
--- a/src/aig/llb/llb2Core.c
+++ /dev/null
@@ -1,775 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb2Core.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Core procedure.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb2Core.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Llb_Img_t_ Llb_Img_t;
-struct Llb_Img_t_
-{
-    Aig_Man_t *     pInit;          // AIG manager
-    Aig_Man_t *     pAig;           // AIG manager
-    Gia_ParLlb_t *  pPars;          // parameters
-
-    DdManager *     dd;             // BDD manager
-    DdManager *     ddG;            // BDD manager
-    DdManager *     ddR;            // BDD manager
-    Vec_Ptr_t *     vDdMans;        // BDD managers for each partition
-    Vec_Ptr_t *     vRings;         // onion rings in ddR
-
-    Vec_Int_t *     vDriRefs;       // driver references
-    Vec_Int_t *     vVarsCs;        // cur state variables
-    Vec_Int_t *     vVarsNs;        // next state variables
-
-    Vec_Int_t *     vCs2Glo;        // cur state variables into global variables
-    Vec_Int_t *     vNs2Glo;        // next state variables into global variables
-    Vec_Int_t *     vGlo2Cs;        // global variables into cur state variables
-    Vec_Int_t *     vGlo2Ns;        // global variables into next state variables
-};
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Computes cube composed of given variables with given values.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_CoreComputeCube( DdManager * dd, Vec_Int_t * vVars, int fUseVarIndex, char * pValues )
-{
-    DdNode * bRes, * bVar, * bTemp;
-    int i, iVar, Index, TimeStop;
-    TimeStop = dd->TimeStop; dd->TimeStop = 0;
-    bRes = Cudd_ReadOne( dd );   Cudd_Ref( bRes );
-    Vec_IntForEachEntry( vVars, Index, i )
-    {
-        iVar  = fUseVarIndex ? Index : i;
-        bVar  = Cudd_NotCond( Cudd_bddIthVar(dd, iVar), (int)(pValues == NULL || pValues[i] != 1) );
-        bRes  = Cudd_bddAnd( dd, bTemp = bRes, bVar );  Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( dd, bTemp );
-    }
-    Cudd_Deref( bRes );
-    dd->TimeStop = TimeStop;
-    return bRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives counter-example by backward reachability.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Abc_Cex_t * Llb_CoreDeriveCex( Llb_Img_t * p )
-{
-    Abc_Cex_t * pCex;
-    Aig_Obj_t * pObj;
-    Vec_Ptr_t * vSupps, * vQuant0, * vQuant1;
-    DdNode * bState, * bImage, * bOneCube, * bTemp, * bRing;
-    int i, v, RetValue, nPiOffset;
-    char * pValues = ABC_ALLOC( char, Cudd_ReadSize(p->ddR) );
-    assert( Vec_PtrSize(p->vRings) > 0 );
-
-    p->dd->TimeStop  = 0;
-    p->ddR->TimeStop = 0;
-
-    // get supports and quantified variables
-    Vec_PtrReverseOrder( p->vDdMans );
-    vSupps = Llb_ImgSupports( p->pAig, p->vDdMans, p->vVarsNs, p->vVarsCs, 1, 0 );
-    Llb_ImgSchedule( vSupps, &vQuant0, &vQuant1, 0 );
-    Vec_VecFree( (Vec_Vec_t *)vSupps );
-    Llb_ImgQuantifyReset( p->vDdMans );
-//    Llb_ImgQuantifyFirst( p->pAig, p->vDdMans, vQuant0 );
-
-    // allocate room for the counter-example
-    pCex = Abc_CexAlloc( Saig_ManRegNum(p->pAig), Saig_ManPiNum(p->pAig), Vec_PtrSize(p->vRings) );
-    pCex->iFrame = Vec_PtrSize(p->vRings) - 1;
-    pCex->iPo = -1;
-
-    // get the last cube
-    bOneCube = Cudd_bddIntersect( p->ddR, (DdNode *)Vec_PtrEntryLast(p->vRings), p->ddR->bFunc );  Cudd_Ref( bOneCube );
-    RetValue = Cudd_bddPickOneCube( p->ddR, bOneCube, pValues );
-    Cudd_RecursiveDeref( p->ddR, bOneCube );
-    assert( RetValue );
-
-    // write PIs of counter-example
-    nPiOffset = Saig_ManRegNum(p->pAig) + Saig_ManPiNum(p->pAig) * (Vec_PtrSize(p->vRings) - 1);
-    Saig_ManForEachPi( p->pAig, pObj, i )
-        if ( pValues[Saig_ManRegNum(p->pAig)+i] == 1 )
-            Aig_InfoSetBit( pCex->pData, nPiOffset + i );
-
-    // write state in terms of NS variables
-    if ( Vec_PtrSize(p->vRings) > 1 )
-    {
-        bState = Llb_CoreComputeCube( p->dd, p->vVarsNs, 1, pValues );   Cudd_Ref( bState );
-    }
-    // perform backward analysis
-    Vec_PtrForEachEntryReverse( DdNode *, p->vRings, bRing, v )
-    { 
-        if ( v == Vec_PtrSize(p->vRings) - 1 )
-            continue;
-        // compute the next states
-        bImage = Llb_ImgComputeImage( p->pAig, p->vDdMans, p->dd, bState, 
-            vQuant0, vQuant1, p->vDriRefs, p->pPars->TimeTarget, 1, 0, 0 );
-        assert( bImage != NULL );
-        Cudd_Ref( bImage );
-        Cudd_RecursiveDeref( p->dd, bState );
-//Extra_bddPrintSupport( p->dd, bImage ); printf( "\n" );
-
-        // move reached states into ring manager
-        bImage = Extra_TransferPermute( p->dd, p->ddR, bTemp = bImage, Vec_IntArray(p->vCs2Glo) );    Cudd_Ref( bImage );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-
-        // intersect with the previous set
-        bOneCube = Cudd_bddIntersect( p->ddR, bImage, bRing );                Cudd_Ref( bOneCube );
-        Cudd_RecursiveDeref( p->ddR, bImage );
-
-        // find any assignment of the BDD
-        RetValue = Cudd_bddPickOneCube( p->ddR, bOneCube, pValues );
-        Cudd_RecursiveDeref( p->ddR, bOneCube );
-        assert( RetValue );
-
-        // write PIs of counter-example
-        nPiOffset -= Saig_ManPiNum(p->pAig);
-        Saig_ManForEachPi( p->pAig, pObj, i )
-            if ( pValues[Saig_ManRegNum(p->pAig)+i] == 1 )
-                Aig_InfoSetBit( pCex->pData, nPiOffset + i );
-
-        // check that we get the init state
-        if ( v == 0 )
-        {
-            Saig_ManForEachLo( p->pAig, pObj, i )
-                assert( pValues[i] == 0 );
-            break;
-        }
-
-        // write state in terms of NS variables
-        bState = Llb_CoreComputeCube( p->dd, p->vVarsNs, 1, pValues );   Cudd_Ref( bState );
-    }
-    assert( nPiOffset == Saig_ManRegNum(p->pAig) );
-    // update the output number
-    RetValue = Saig_ManFindFailedPoCex( p->pInit, pCex );
-    assert( RetValue >= 0 && RetValue < Saig_ManPoNum(p->pInit) ); // invalid CEX!!!
-    pCex->iPo = RetValue;
-    // cleanup
-    ABC_FREE( pValues );
-    Vec_VecFree( (Vec_Vec_t *)vQuant0 );
-    Vec_VecFree( (Vec_Vec_t *)vQuant1 );
-    return pCex;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_CoreReachability_int( Llb_Img_t * p, Vec_Ptr_t * vQuant0, Vec_Ptr_t * vQuant1 )
-{
-    int * pLoc2Glo  = p->pPars->fBackward? Vec_IntArray( p->vCs2Glo ) : Vec_IntArray( p->vNs2Glo );
-    int * pLoc2GloR = p->pPars->fBackward? Vec_IntArray( p->vNs2Glo ) : Vec_IntArray( p->vCs2Glo );
-    int * pGlo2Loc  = p->pPars->fBackward? Vec_IntArray( p->vGlo2Ns ) : Vec_IntArray( p->vGlo2Cs );
-    DdNode * bCurrent, * bReached, * bNext, * bTemp;
-    int clk2, clk = clock(), nIters, nBddSize, iOutFail = -1;
-/*
-    // compute time to stop
-    if ( p->pPars->TimeLimit )
-        p->pPars->TimeTarget = clock() + p->pPars->TimeLimit * CLOCKS_PER_SEC;
-    else
-        p->pPars->TimeTarget = 0;
-*/
-
-    if ( time(NULL) > p->pPars->TimeTarget )
-    {
-        if ( !p->pPars->fSilent )
-            printf( "Reached timeout (%d seconds) before image computation.\n", p->pPars->TimeLimit );
-        p->pPars->iFrame = -1;
-        return -1;
-    }
-
-    // set the stop time parameter
-    p->dd->TimeStop  = p->pPars->TimeTarget;
-    p->ddG->TimeStop = p->pPars->TimeTarget;
-    p->ddR->TimeStop = p->pPars->TimeTarget;
-
-    // compute initial states
-    if ( p->pPars->fBackward )
-    {
-        // create init state in the global manager
-        bTemp = Llb_BddComputeBad( p->pInit, p->ddR, p->pPars->TimeTarget );   
-        if ( bTemp == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) while computing bad states.\n", p->pPars->TimeLimit );
-            p->pPars->iFrame = -1;
-            return -1;
-        }
-        Cudd_Ref( bTemp );
-        // create bad state in the ring manager
-        p->ddR->bFunc = Llb_CoreComputeCube( p->ddR, p->vVarsCs, 0, NULL );      Cudd_Ref( p->ddR->bFunc );
-        bCurrent = Llb_BddQuantifyPis( p->pInit, p->ddR, bTemp );                Cudd_Ref( bCurrent );
-        Cudd_RecursiveDeref( p->ddR, bTemp );
-        bReached = Cudd_bddTransfer( p->ddR, p->ddG, bCurrent );                 Cudd_Ref( bReached );
-        Cudd_RecursiveDeref( p->ddR, bCurrent );
-        // move init state to the working manager
-        bCurrent = Extra_TransferPermute( p->ddG, p->dd, bReached, pGlo2Loc );   
-        if ( bCurrent == NULL )
-        {
-            Cudd_RecursiveDeref( p->ddG, bReached );
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during transfer 0.\n", p->pPars->TimeLimit );
-            p->pPars->iFrame = -1;
-            return -1;
-        }
-        Cudd_Ref( bCurrent );
-    }
-    else
-    {
-        // create bad state in the ring manager
-        p->ddR->bFunc = Llb_BddComputeBad( p->pInit, p->ddR, p->pPars->TimeTarget );  
-        if ( p->ddR->bFunc == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) while computing bad states.\n", p->pPars->TimeLimit );
-            p->pPars->iFrame = -1;
-            return -1;
-        }
-        Cudd_Ref( p->ddR->bFunc );
-        // create init state in the working and global manager
-        bCurrent = Llb_CoreComputeCube( p->dd,  p->vVarsCs, 1, NULL );           Cudd_Ref( bCurrent );
-        bReached = Llb_CoreComputeCube( p->ddG, p->vVarsCs, 0, NULL );           Cudd_Ref( bReached );
-//Extra_bddPrint( p->dd, bCurrent );  printf( "\n" );
-//Extra_bddPrint( p->ddG, bReached );  printf( "\n" );
-    }
-
-    // compute onion rings
-    for ( nIters = 0; nIters < p->pPars->nIterMax; nIters++ )
-    { 
-        clk2 = clock();
-        // check the runtime limit
-        if ( p->pPars->TimeLimit && time(NULL) > p->pPars->TimeTarget )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->dd,  bCurrent );  bCurrent = NULL;
-            Cudd_RecursiveDeref( p->ddG, bReached );  bReached = NULL;
-            return -1;
-        }
-
-        // save the onion ring
-        bTemp = Extra_TransferPermute( p->dd, p->ddR, bCurrent, pLoc2GloR );  
-        if ( bTemp == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->dd,  bCurrent );  bCurrent = NULL;
-            Cudd_RecursiveDeref( p->ddG, bReached );  bReached = NULL;
-            return -1;
-        }
-        Cudd_Ref( bTemp );
-        Vec_PtrPush( p->vRings, bTemp );
-
-        // check it for bad states
-        if ( !p->pPars->fSkipOutCheck && !Cudd_bddLeq( p->ddR, bTemp, Cudd_Not(p->ddR->bFunc) ) ) 
-        {
-            assert( p->pInit->pSeqModel == NULL );
-            if ( !p->pPars->fBackward )
-                p->pInit->pSeqModel = Llb_CoreDeriveCex( p ); 
-            Cudd_RecursiveDeref( p->dd,  bCurrent );  bCurrent = NULL;
-            Cudd_RecursiveDeref( p->ddG, bReached );  bReached = NULL;
-            if ( !p->pPars->fSilent )
-            {
-                if ( !p->pPars->fBackward )
-                    printf( "Output %d was asserted in frame %d (use \"write_counter\" to dump a witness).  ", p->pInit->pSeqModel->iPo, nIters );
-                else
-                    printf( "Output ??? was asserted in frame %d (counter-example is not produced).  ", nIters );
-                Abc_PrintTime( 1, "Time", clock() - clk );
-            }
-            p->pPars->iFrame = nIters - 1;
-            return 0;
-        }
-
-        // compute the next states
-        bNext = Llb_ImgComputeImage( p->pAig, p->vDdMans, p->dd, bCurrent, 
-            vQuant0, vQuant1, p->vDriRefs, p->pPars->TimeTarget, 
-            p->pPars->fBackward, p->pPars->fReorder, p->pPars->fVeryVerbose );
-        if ( bNext == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->dd,  bCurrent );   bCurrent = NULL;
-            Cudd_RecursiveDeref( p->ddG, bReached );   bReached = NULL;
-            return -1;
-        }
-        Cudd_Ref( bNext );
-        Cudd_RecursiveDeref( p->dd, bCurrent );        bCurrent = NULL;
-//Extra_bddPrintSupport( p->dd, bNext ); printf( "\n" );
-
-        // remap these states into the global manager
-//        bNext = Extra_TransferPermute( p->dd, p->ddG, bTemp = bNext, pLoc2Glo );    Cudd_Ref( bNext );
-//        Cudd_RecursiveDeref( p->dd, bTemp );
-
-//        bNext = Extra_TransferPermuteTime( p->dd, p->ddG, bTemp = bNext, pLoc2Glo, p->pPars->TimeTarget );    
-        bNext = Extra_TransferPermute( p->dd, p->ddG, bTemp = bNext, pLoc2Glo );    
-        if ( bNext == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation in transfer 1.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->dd,  bTemp );  
-            Cudd_RecursiveDeref( p->ddG, bReached );   bReached = NULL;
-            return -1;
-        }
-        Cudd_Ref( bNext );
-        Cudd_RecursiveDeref( p->dd, bTemp );  
-
-        nBddSize = Cudd_DagSize(bNext);
-        // check if there are any new states
-        if ( Cudd_bddLeq( p->ddG, bNext, bReached ) ) // implication = no new states
-        {
-            Cudd_RecursiveDeref( p->ddG,  bNext );     bNext = NULL;
-            break;
-        }
-
-        // get the new states
-        bCurrent = Cudd_bddAnd( p->ddG, bNext, Cudd_Not(bReached) );                    
-        if ( bCurrent == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation in transfer 2.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->ddG, bNext );  
-            Cudd_RecursiveDeref( p->ddG, bReached );   bReached = NULL;
-            return -1;
-        }
-        Cudd_Ref( bCurrent );
-
-        // remap these states into the current state vars
-//        bCurrent = Extra_TransferPermute( p->ddG, p->dd, bTemp = bCurrent, pGlo2Loc );   Cudd_Ref( bCurrent );
-//        Cudd_RecursiveDeref( p->ddG, bTemp );
-
-//        bCurrent = Extra_TransferPermuteTime( p->ddG, p->dd, bTemp = bCurrent, pGlo2Loc, p->pPars->TimeTarget );    
-        bCurrent = Extra_TransferPermute( p->ddG, p->dd, bTemp = bCurrent, pGlo2Loc );    
-        if ( bCurrent == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation in transfer 2.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->ddG, bTemp );  
-            Cudd_RecursiveDeref( p->ddG, bReached );   bReached = NULL;
-            return -1;
-        }
-        Cudd_Ref( bCurrent );
-        Cudd_RecursiveDeref( p->ddG, bTemp );
-
-        // add to the reached states
-        bReached = Cudd_bddOr( p->ddG, bTemp = bReached, bNext );                       Cudd_Ref( bReached );
-        Cudd_RecursiveDeref( p->ddG, bTemp );
-        Cudd_RecursiveDeref( p->ddG, bNext );
-        bNext = NULL;
-
-        if ( p->pPars->fVeryVerbose )
-        {
-            double nMints = Cudd_CountMinterm(p->ddG, bReached, Saig_ManRegNum(p->pAig) );
-//            Extra_bddPrint( p->ddG, bReached );printf( "\n" );
-            fprintf( stdout, "        Reachable states = %.0f. (Ratio = %.4f %%)\n", nMints, 100.0*nMints/pow(2.0, Saig_ManRegNum(p->pAig)) );
-            fflush( stdout ); 
-        }
-        if ( p->pPars->fVerbose )
-        {
-            fprintf( stdout, "F =%3d : ",    nIters );
-            fprintf( stdout, "Image =%6d  ", nBddSize );
-            fprintf( stdout, "(%4d%4d)  ", 
-                Cudd_ReadReorderings(p->dd),  Cudd_ReadGarbageCollections(p->dd) );
-            fprintf( stdout, "Reach =%6d  ", Cudd_DagSize(bReached) );
-            fprintf( stdout, "(%4d%4d)  ", 
-                Cudd_ReadReorderings(p->ddG), Cudd_ReadGarbageCollections(p->ddG) );
-            Abc_PrintTime( 1, "Time", clock() - clk2 );
-        }
-
-        // check timeframe limit
-        if ( nIters == p->pPars->nIterMax - 1 )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached limit on the number of timeframes (%d).\n",  p->pPars->nIterMax );
-            p->pPars->iFrame = nIters;
-            Cudd_RecursiveDeref( p->dd,  bCurrent );  bCurrent = NULL;
-            Cudd_RecursiveDeref( p->ddG, bReached );  bReached = NULL;
-            return -1;
-        }
-    }
-    if ( bReached == NULL )
-    {
-        p->pPars->iFrame = nIters - 1;
-        return 0; // reachable
-    }
-    if ( bCurrent )
-        Cudd_RecursiveDeref( p->dd, bCurrent );
-    // report the stats
-    if ( p->pPars->fVerbose )
-    {
-        double nMints = Cudd_CountMinterm(p->ddG, bReached, Saig_ManRegNum(p->pAig) );
-        if ( nIters >= p->pPars->nIterMax )
-            fprintf( stdout, "Reachability analysis is stopped after %d frames.\n", nIters );
-        else
-            fprintf( stdout, "Reachability analysis completed after %d frames.\n", nIters );
-        fprintf( stdout, "Reachable states = %.0f. (Ratio = %.4f %%)\n", nMints, 100.0*nMints/pow(2.0, Saig_ManRegNum(p->pAig)) );
-        fflush( stdout ); 
-    }
-    if ( p->pPars->fDumpReached )
-    {
-        Llb_ManDumpReached( p->ddG, bReached, p->pAig->pName, "reached.blif" );
-        printf( "Reached states with %d BDD nodes are dumpted into file \"reached.blif\".\n", Cudd_DagSize(bReached) );
-    }
-    Cudd_RecursiveDeref( p->ddG, bReached );
-    if ( nIters >= p->pPars->nIterMax )
-    {
-        if ( !p->pPars->fSilent )
-        {
-            printf( "Verified only for states reachable in %d frames.  ", nIters );
-            Abc_PrintTime( 1, "Time", clock() - clk );
-        }
-        p->pPars->iFrame = p->pPars->nIterMax;
-        return -1; // undecided
-    }
-    if ( !p->pPars->fSilent )
-    {
-        printf( "The miter is proved unreachable after %d iterations.  ", nIters );
-        Abc_PrintTime( 1, "Time", clock() - clk );
-    }
-    p->pPars->iFrame = nIters - 1;
-    return 1; // unreachable
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_CoreReachability( Llb_Img_t * p )
-{
-    Vec_Ptr_t * vSupps, * vQuant0, * vQuant1;
-    int RetValue;
-    // get supports and quantified variables
-    if ( p->pPars->fBackward )
-    {
-        Vec_PtrReverseOrder( p->vDdMans );
-        vSupps = Llb_ImgSupports( p->pAig, p->vDdMans, p->vVarsNs, p->vVarsCs, 0, p->pPars->fVeryVerbose );
-    }
-    else
-        vSupps = Llb_ImgSupports( p->pAig, p->vDdMans, p->vVarsCs, p->vVarsNs, 0, p->pPars->fVeryVerbose );
-    Llb_ImgSchedule( vSupps, &vQuant0, &vQuant1, p->pPars->fVeryVerbose );
-    Vec_VecFree( (Vec_Vec_t *)vSupps );
-    // remove variables
-    Llb_ImgQuantifyFirst( p->pAig, p->vDdMans, vQuant0, p->pPars->fVeryVerbose );
-    // perform reachability
-    RetValue = Llb_CoreReachability_int( p, vQuant0, vQuant1 );
-    Vec_VecFree( (Vec_Vec_t *)vQuant0 );
-    Vec_VecFree( (Vec_Vec_t *)vQuant1 );
-    return RetValue;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_CoreConstructAll( Aig_Man_t * p, Vec_Ptr_t * vResult, Vec_Int_t * vVarsNs, int TimeTarget )
-{
-    DdManager * dd;
-    Vec_Ptr_t * vDdMans;
-    Vec_Ptr_t * vLower, * vUpper;
-    int i;
-    vDdMans = Vec_PtrStart( Vec_PtrSize(vResult) );
-    Vec_PtrForEachEntryReverse( Vec_Ptr_t *, vResult, vLower, i )
-    {
-        if ( i < Vec_PtrSize(vResult) - 1 )
-            dd = Llb_ImgPartition( p, vLower, vUpper, TimeTarget );
-        else
-            dd = Llb_DriverLastPartition( p, vVarsNs, TimeTarget );
-        if ( dd == NULL )
-        {
-            Vec_PtrForEachEntry( DdManager *, vDdMans, dd, i )
-            {
-                if ( dd == NULL )
-                    continue;
-                if ( dd->bFunc )
-                    Cudd_RecursiveDeref( dd, dd->bFunc );
-                Extra_StopManager( dd );
-            }
-            Vec_PtrFree( vDdMans );
-            return NULL;
-        }
-        Vec_PtrWriteEntry( vDdMans, i, dd );
-        vUpper = vLower;
-    }
-    return vDdMans;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_CoreSetVarMaps( Llb_Img_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i, iVarCs, iVarNs;
-    assert( p->vVarsCs != NULL );
-    assert( p->vVarsNs != NULL );
-    assert( p->vCs2Glo == NULL );
-    assert( p->vNs2Glo == NULL );
-    assert( p->vGlo2Cs == NULL );
-    assert( p->vGlo2Ns == NULL );
-    p->vCs2Glo = Vec_IntStartFull( Aig_ManObjNumMax(p->pAig) );
-    p->vNs2Glo = Vec_IntStartFull( Aig_ManObjNumMax(p->pAig) );
-    p->vGlo2Cs = Vec_IntStartFull( Aig_ManRegNum(p->pAig) );
-    p->vGlo2Ns = Vec_IntStartFull( Aig_ManRegNum(p->pAig) );
-    for ( i = 0; i < Aig_ManRegNum(p->pAig); i++ )
-    {
-        iVarCs = Vec_IntEntry( p->vVarsCs, i );
-        iVarNs = Vec_IntEntry( p->vVarsNs, i );
-        assert( iVarCs >= 0 && iVarCs < Aig_ManObjNumMax(p->pAig) );
-        assert( iVarNs >= 0 && iVarNs < Aig_ManObjNumMax(p->pAig) );
-        Vec_IntWriteEntry( p->vCs2Glo, iVarCs, i );
-        Vec_IntWriteEntry( p->vNs2Glo, iVarNs, i );
-        Vec_IntWriteEntry( p->vGlo2Cs, i, iVarCs );
-        Vec_IntWriteEntry( p->vGlo2Ns, i, iVarNs );
-    }
-    // add mapping of the PIs
-    Saig_ManForEachPi( p->pAig, pObj, i )
-        Vec_IntWriteEntry( p->vCs2Glo, Aig_ObjId(pObj), Aig_ManRegNum(p->pAig)+i );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Img_t * Llb_CoreStart( Aig_Man_t * pInit, Aig_Man_t * pAig, Gia_ParLlb_t *  pPars )
-{
-    Llb_Img_t * p;
-    p = ABC_CALLOC( Llb_Img_t, 1 );
-    p->pInit = pInit;
-    p->pAig  = pAig;
-    p->pPars = pPars;
-    p->dd    = Cudd_Init( Aig_ManObjNumMax(pAig), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    p->ddG   = Cudd_Init( Aig_ManRegNum(pAig),    0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    p->ddR   = Cudd_Init( Aig_ManPiNum(pAig),     0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    Cudd_AutodynEnable( p->dd,  CUDD_REORDER_SYMM_SIFT );
-    Cudd_AutodynEnable( p->ddG, CUDD_REORDER_SYMM_SIFT );
-    Cudd_AutodynEnable( p->ddR, CUDD_REORDER_SYMM_SIFT );
-    p->vRings = Vec_PtrAlloc( 100 );
-    p->vDriRefs = Llb_DriverCountRefs( pAig );
-    p->vVarsCs  = Llb_DriverCollectCs( pAig );
-    p->vVarsNs  = Llb_DriverCollectNs( pAig, p->vDriRefs );
-    Llb_CoreSetVarMaps( p );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_CoreStop( Llb_Img_t * p )
-{
-    DdManager * dd;
-    DdNode * bTemp;
-    int i;
-    if ( p->vDdMans )
-    Vec_PtrForEachEntry( DdManager *, p->vDdMans, dd, i )
-    {
-        if ( dd->bFunc )
-            Cudd_RecursiveDeref( dd, dd->bFunc );
-        if ( dd->bFunc2 )
-            Cudd_RecursiveDeref( dd, dd->bFunc2 );
-        Extra_StopManager( dd );
-    }
-    Vec_PtrFreeP( &p->vDdMans );
-    if ( p->ddR->bFunc )
-        Cudd_RecursiveDeref( p->ddR, p->ddR->bFunc );
-    Vec_PtrForEachEntry( DdNode *, p->vRings, bTemp, i )
-        Cudd_RecursiveDeref( p->ddR, bTemp );
-    Vec_PtrFree( p->vRings );
-    Extra_StopManager( p->dd );
-    Extra_StopManager( p->ddG );
-    Extra_StopManager( p->ddR );
-    Vec_IntFreeP( &p->vDriRefs );
-    Vec_IntFreeP( &p->vVarsCs );
-    Vec_IntFreeP( &p->vVarsNs );
-    Vec_IntFreeP( &p->vCs2Glo );
-    Vec_IntFreeP( &p->vNs2Glo );
-    Vec_IntFreeP( &p->vGlo2Cs );
-    Vec_IntFreeP( &p->vGlo2Ns );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_CoreExperiment( Aig_Man_t * pInit, Aig_Man_t * pAig, Gia_ParLlb_t * pPars, Vec_Ptr_t * vResult, int TimeTarget )
-{
-    int RetValue;
-    Llb_Img_t * p;
-//    printf( "\n" );
-//    pPars->fVerbose = 1;
-    p = Llb_CoreStart( pInit, pAig, pPars );
-    p->vDdMans = Llb_CoreConstructAll( pAig, vResult, p->vVarsNs, TimeTarget );
-    if ( p->vDdMans == NULL )
-    {
-        if ( !pPars->fSilent )
-            printf( "Reached timeout (%d seconds) while deriving the partitions.\n", pPars->TimeLimit );
-        Llb_CoreStop( p );
-        return -1;
-    }
-    RetValue = Llb_CoreReachability( p );
-    Llb_CoreStop( p );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds balanced cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManReachMinCut( Aig_Man_t * pAig, Gia_ParLlb_t * pPars )
-{
-    extern Vec_Ptr_t * Llb_ManComputeCuts( Aig_Man_t * p, int Num, int fVerbose, int fVeryVerbose );
-    Vec_Ptr_t * vResult;
-    Aig_Man_t * p;
-    int RetValue = -1;
-    int clk = clock();
-
-    // compute time to stop
-    pPars->TimeTarget = pPars->TimeLimit ? time(NULL) + pPars->TimeLimit : 0;
-
-    p = Aig_ManDupFlopsOnly( pAig );
-//Aig_ManShow( p, 0, NULL );
-    if ( pPars->fVerbose )
-    Aig_ManPrintStats( pAig );
-    if ( pPars->fVerbose )
-    Aig_ManPrintStats( p );
-    Aig_ManFanoutStart( p );
-
-    vResult = Llb_ManComputeCuts( p, pPars->nPartValue, pPars->fVerbose, pPars->fVeryVerbose );
-
-    if ( pPars->TimeLimit && time(NULL) > pPars->TimeTarget )
-    {
-        if ( !pPars->fSilent )
-            printf( "Reached timeout (%d seconds) after partitioning.\n", pPars->TimeLimit );
-
-        Vec_VecFree( (Vec_Vec_t *)vResult );
-        Aig_ManFanoutStop( p );
-        Aig_ManCleanMarkAB( p );
-        Aig_ManStop( p );
-        return RetValue;
-    }
-
-    if ( !pPars->fSkipReach )
-        RetValue = Llb_CoreExperiment( pAig, p, pPars, vResult, pPars->TimeTarget );
-
-    Vec_VecFree( (Vec_Vec_t *)vResult );
-    Aig_ManFanoutStop( p );
-    Aig_ManCleanMarkAB( p );
-    Aig_ManStop( p );
-
-    if ( RetValue == -1 )
-        Abc_PrintTime( 1, "Total runtime of the min-cut-based reachability engine", clock() - clk );
-    return RetValue;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb2Driver.c b/src/aig/llb/llb2Driver.c
deleted file mode 100644
index 041a39d5..00000000
--- a/src/aig/llb/llb2Driver.c
+++ /dev/null
@@ -1,221 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb2Driver.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Procedures working with flop drivers.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb2Driver.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// driver issue:arises when creating
-// - driver ref-counter array
-// - Ns2Glo maps
-// - final partition
-// - change-phase cube
-
-// LI variable is used when
-// - driver drives more than one LI
-// - driver is a PI
-// - driver is a constant
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the array of times each flop driver is referenced.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_DriverCountRefs( Aig_Man_t * p )
-{
-    Vec_Int_t * vCounts;
-    Aig_Obj_t * pObj;
-    int i;
-    vCounts = Vec_IntStart( Aig_ManObjNumMax(p) );
-    Saig_ManForEachLi( p, pObj, i )
-        Vec_IntAddToEntry( vCounts, Aig_ObjFaninId0(pObj), 1 );
-    return vCounts;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns array of NS variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_DriverCollectNs( Aig_Man_t * pAig, Vec_Int_t * vDriRefs )
-{
-    Vec_Int_t * vVars;
-    Aig_Obj_t * pObj, * pDri;
-    int i;
-    vVars = Vec_IntAlloc( Aig_ManRegNum(pAig) );
-    Saig_ManForEachLi( pAig, pObj, i )
-    {
-        pDri = Aig_ObjFanin0(pObj);
-        if ( Vec_IntEntry( vDriRefs, Aig_ObjId(pDri) ) != 1 || Saig_ObjIsPi(pAig, pDri) || Aig_ObjIsConst1(pDri) )
-            Vec_IntPush( vVars, Aig_ObjId(pObj) );
-        else
-            Vec_IntPush( vVars, Aig_ObjId(pDri) );
-    }
-    return vVars;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns array of CS variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_DriverCollectCs( Aig_Man_t * pAig )
-{
-    Vec_Int_t * vVars;
-    Aig_Obj_t * pObj;
-    int i;
-    vVars = Vec_IntAlloc( Aig_ManRegNum(pAig) );
-    Saig_ManForEachLo( pAig, pObj, i )
-        Vec_IntPush( vVars, Aig_ObjId(pObj) );
-    return vVars;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Create cube for phase swapping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_DriverPhaseCube( Aig_Man_t * pAig, Vec_Int_t * vDriRefs, DdManager * dd )
-{
-    DdNode * bCube, * bVar, * bTemp;
-    Aig_Obj_t * pObj;
-    int i, TimeStop;
-    TimeStop = dd->TimeStop; dd->TimeStop = 0;
-    bCube = Cudd_ReadOne( dd );  Cudd_Ref( bCube );
-    Saig_ManForEachLi( pAig, pObj, i )
-    {
-        assert( Vec_IntEntry( vDriRefs, Aig_ObjFaninId0(pObj) ) >= 1 );
-        if ( Vec_IntEntry( vDriRefs, Aig_ObjFaninId0(pObj) ) != 1 )
-            continue;
-        if ( !Aig_ObjFaninC0(pObj) )
-            continue;
-        bVar  = Cudd_bddIthVar( dd, Aig_ObjFaninId0(pObj) );
-        bCube = Cudd_bddAnd( dd, bTemp = bCube, bVar );  Cudd_Ref( bCube );
-        Cudd_RecursiveDeref( dd, bTemp );
-    }
-    Cudd_Deref( bCube );
-    dd->TimeStop = TimeStop;
-    return bCube;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compute the last partition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdManager * Llb_DriverLastPartition( Aig_Man_t * p, Vec_Int_t * vVarsNs, int TimeTarget )
-{
-    int fVerbose = 1;
-    DdManager * dd;
-    DdNode * bVar1, * bVar2, * bProd, * bRes, * bTemp;
-    Aig_Obj_t * pObj;
-    int i;
-    dd = Cudd_Init( Aig_ManObjNumMax(p), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    Cudd_AutodynEnable( dd, CUDD_REORDER_SYMM_SIFT );
-    dd->TimeStop = TimeTarget;
-    bRes = Cudd_ReadOne(dd);                                   Cudd_Ref( bRes );
-
-    // mark the duplicated flop inputs
-    Aig_ManForEachObjVec( vVarsNs, p, pObj, i )
-    {
-        if ( !Saig_ObjIsLi(p, pObj) )
-            continue;
-        bVar1 = Cudd_bddIthVar( dd, Aig_ObjId(pObj) );
-        bVar2 = Cudd_bddIthVar( dd, Aig_ObjFaninId0(pObj) );
-        if ( Aig_ObjIsConst1(Aig_ObjFanin0(pObj)) )
-            bVar2 = Cudd_ReadOne(dd);
-        bVar2 = Cudd_NotCond( bVar2, Aig_ObjFaninC0(pObj) );
-        bProd = Cudd_bddXnor( dd, bVar1, bVar2 );              Cudd_Ref( bProd );
-//        bRes  = Cudd_bddAnd( dd, bTemp = bRes, bProd );        Cudd_Ref( bRes );
-//        bRes  = Extra_bddAndTime( dd, bTemp = bRes, bProd, TimeTarget );  
-        bRes  = Cudd_bddAnd( dd, bTemp = bRes, bProd );  
-        if ( bRes == NULL )
-        {
-            Cudd_RecursiveDeref( dd, bTemp );
-            Cudd_RecursiveDeref( dd, bProd );
-            return NULL;
-        }        
-        Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( dd, bTemp );
-        Cudd_RecursiveDeref( dd, bProd );
-    }
-
-/*
-    Saig_ManForEachLi( p, pObj, i )
-        printf( "%d ", Aig_ObjId(pObj) );
-    printf( "\n" );
-    Saig_ManForEachLi( p, pObj, i )
-        printf( "%c%d ", Aig_ObjFaninC0(pObj)? '-':'+', Aig_ObjFaninId0(pObj) );
-    printf( "\n" );
-*/
-    Cudd_AutodynDisable( dd );
-//    Cudd_RecursiveDeref( dd, bRes );
-//    Extra_StopManager( dd );
-    dd->bFunc = bRes;
-    dd->TimeStop = 0;
-    return dd;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb2Dump.c b/src/aig/llb/llb2Dump.c
deleted file mode 100644
index 3e1dd8c5..00000000
--- a/src/aig/llb/llb2Dump.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb2Dump.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Dumps the BDD of reached states into a file.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb2Dump.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns a dummy name.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Llb_ManGetDummyName( char * pPrefix, int Num, int nDigits )
-{
-    static char Buffer[2000];
-    sprintf( Buffer, "%s%0*d", pPrefix, nDigits, Num );
-    return Buffer;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes reached state BDD into a BLIF file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManDumpReached( DdManager * ddG, DdNode * bReached, char * pModel, char * pFileName )
-{
-    FILE * pFile;
-    Vec_Ptr_t * vNamesIn, * vNamesOut;
-    char * pName;
-    int i, nDigits;
-    // reorder the BDD
-    Cudd_ReduceHeap( ddG, CUDD_REORDER_SYMM_SIFT, 1 );
-
-    // create input names
-    nDigits = Extra_Base10Log( Cudd_ReadSize(ddG) );
-    vNamesIn = Vec_PtrAlloc( Cudd_ReadSize(ddG) );
-    for ( i = 0; i < Cudd_ReadSize(ddG); i++ )
-    {
-        pName = Llb_ManGetDummyName( "ff", i, nDigits );
-        Vec_PtrPush( vNamesIn, Extra_UtilStrsav(pName) );
-    }
-    // create output names
-    vNamesOut = Vec_PtrAlloc( 1 );
-    Vec_PtrPush( vNamesOut, Extra_UtilStrsav("Reached") );
-
-    // write the file
-    pFile = fopen( pFileName, "wb" );
-    Cudd_DumpBlif( ddG, 1, &bReached, (char **)Vec_PtrArray(vNamesIn), (char **)Vec_PtrArray(vNamesOut), pModel, pFile, 0 );
-    fclose( pFile );
-
-    // cleanup
-    Vec_PtrForEachEntry( char *, vNamesIn, pName, i )
-        ABC_FREE( pName );
-    Vec_PtrForEachEntry( char *, vNamesOut, pName, i )
-        ABC_FREE( pName );
-    Vec_PtrFree( vNamesIn );
-    Vec_PtrFree( vNamesOut );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb2Flow.c b/src/aig/llb/llb2Flow.c
deleted file mode 100644
index 1b177807..00000000
--- a/src/aig/llb/llb2Flow.c
+++ /dev/null
@@ -1,1374 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb2Flow.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Flow computation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb2Flow.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static inline int         Llb_ObjSetPath( Aig_Obj_t * pObj, Aig_Obj_t * pNext ) { pObj->pData = (void *)pNext; return 1;  }
-static inline Aig_Obj_t * Llb_ObjGetPath( Aig_Obj_t * pObj )                    { return (Aig_Obj_t *)pObj->pData;        }
-static inline Aig_Obj_t * Llb_ObjGetFanoutPath( Aig_Man_t * p, Aig_Obj_t * pObj ) 
-{ 
-    Aig_Obj_t * pFanout;
-    int i, iFanout;
-    assert( Llb_ObjGetPath(pObj) ); 
-    Aig_ObjForEachFanout( p, pObj, pFanout, iFanout, i )
-        if ( Llb_ObjGetPath(pFanout) == pObj )
-            return pFanout;
-    return NULL;
-}
-
-extern Vec_Ptr_t * Llb_ManCutSupp( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-
-/**Function*************************************************************
-
-  Synopsis    [For each cut, returns PIs that can be quantified.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ManCutSupps( Aig_Man_t * p, Vec_Ptr_t * vResult )
-{
-    Vec_Ptr_t * vSupps, * vOne, * vLower, * vUpper;
-    int i;
-    vSupps = Vec_PtrAlloc( 100 );
-    Vec_PtrPush( vSupps, Vec_PtrAlloc(0) );
-    vLower = (Vec_Ptr_t *)Vec_PtrEntry( vResult, 0 );
-    Vec_PtrForEachEntryStart( Vec_Ptr_t *, vResult, vUpper, i, 1 )
-    {
-        vOne  = Llb_ManCutSupp( p, vLower, vUpper );
-        Vec_PtrPush( vSupps, vOne );
-        vLower = vUpper;
-    }
-    assert( Vec_PtrSize(vSupps) == Vec_PtrSize(vResult) );
-    return vSupps;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [For each cut, returns PIs that can be quantified.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ManCutMap( Aig_Man_t * p, Vec_Ptr_t * vResult, Vec_Ptr_t * vSupps )
-{
-    int fShowMatrix = 1;
-    Vec_Ptr_t * vMaps, * vOne;
-    Vec_Int_t * vMap, * vPrev, * vNext;
-    Aig_Obj_t * pObj;
-    int * piFirst, * piLast;
-    int i, k, CounterPlus, CounterMinus, Counter;
-
-    vMaps = Vec_PtrAlloc( 100 );
-    Vec_PtrForEachEntry( Vec_Ptr_t *, vResult, vOne, i )
-    {
-        vMap = Vec_IntStart( Aig_ManObjNumMax(p) );
-        Vec_PtrForEachEntry( Aig_Obj_t *, vOne, pObj, k )
-        {
-            if ( !Saig_ObjIsPi(p, pObj) )
-                Vec_IntWriteEntry( vMap, pObj->Id, 1 );
-//            else
-//printf( "*" );
-//printf( "%d ", pObj->Id );
-        }
-        Vec_PtrPush( vMaps, vMap );
-//printf( "\n" );
-    }
-    Vec_PtrPush( vMaps, Vec_IntStart( Aig_ManObjNumMax(p) ) );
-    assert( Vec_PtrSize(vMaps) == Vec_PtrSize(vResult)+1 );
-
-    // collect the first and last PIs
-    piFirst = ABC_ALLOC( int, Saig_ManPiNum(p) );
-    piLast  = ABC_ALLOC( int, Saig_ManPiNum(p) );
-    Saig_ManForEachPi( p, pObj, i )
-        piFirst[i] = piLast[i] = -1;
-    Vec_PtrForEachEntry( Vec_Ptr_t *, vSupps, vOne, i )
-    {
-        Vec_PtrForEachEntry( Aig_Obj_t *, vOne, pObj, k )
-        {
-            if ( !Saig_ObjIsPi(p, pObj) )
-                continue;
-            if ( piFirst[Aig_ObjPioNum(pObj)] == -1 )
-                 piFirst[Aig_ObjPioNum(pObj)] = i;
-            piLast[Aig_ObjPioNum(pObj)] = i;
-        }
-    }
-    // PIs feeding into the flops should be extended to the last frame
-    Saig_ManForEachLi( p, pObj, i )
-    {
-        if ( !Saig_ObjIsPi(p, Aig_ObjFanin0(pObj)) )
-            continue;
-        piLast[Aig_ObjPioNum(Aig_ObjFanin0(pObj))] = Vec_PtrSize(vMaps)-1;
-    }
-
-    // set the PI map
-    Saig_ManForEachPi( p, pObj, i )
-    {
-        if ( piFirst[i] == -1 )
-            continue;
-        if ( piFirst[i] == piLast[i] )
-        {
-            vMap = (Vec_Int_t *)Vec_PtrEntry( vMaps, piFirst[i] );
-            Vec_IntWriteEntry( vMap, pObj->Id, 2 );
-            continue;
-        }
-
-        // set support for all in between        
-        for ( k = piFirst[i]; k <= piLast[i]; k++ )
-        {
-            vMap = (Vec_Int_t *)Vec_PtrEntry( vMaps, k );
-            Vec_IntWriteEntry( vMap, pObj->Id, 1 );
-        }
-    }
-    ABC_FREE( piFirst );
-    ABC_FREE( piLast );
-
-
-    // find all that will appear here
-    Counter = Aig_ManRegNum(p);
-    printf( "%d ", Counter );
-    Vec_PtrForEachEntryStart( Vec_Int_t *, vMaps, vMap, i, 1 )
-    {
-        vPrev = (Vec_Int_t *)Vec_PtrEntry( vMaps, i-1 );
-        vNext = (i == Vec_PtrSize(vMaps)-1)? NULL: (Vec_Int_t *)Vec_PtrEntry( vMaps, i+1 );
-
-        CounterPlus = CounterMinus = 0;
-        Aig_ManForEachObj( p, pObj, k )
-        {
-            if ( Saig_ObjIsPi(p, pObj) )
-            {
-                if ( Vec_IntEntry(vPrev, k) == 0 && Vec_IntEntry(vMap, k) == 1 )
-                    CounterPlus++;
-                if ( Vec_IntEntry(vMap, k) == 1 && (vNext == NULL || Vec_IntEntry(vNext, k) == 0) )
-                    CounterMinus++;
-            }
-            else
-            {
-                if ( Vec_IntEntry(vPrev, k) == 0 && Vec_IntEntry(vMap, k) == 1 )
-                    CounterPlus++;
-                if ( Vec_IntEntry(vPrev, k) == 1 && Vec_IntEntry(vMap, k) == 0 )
-                    CounterMinus++;
-            }
-        }
-        Counter = Counter + CounterPlus - CounterMinus;
-        printf( "%d=%d ", i, Counter );
-    }
-    printf( "\n" );
-
-    if ( fShowMatrix )
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        if ( !Aig_ObjIsPi(pObj) && !Aig_ObjIsNode(pObj) )
-            continue;
-        Vec_PtrForEachEntry( Vec_Int_t *, vMaps, vMap, k )
-            if ( Vec_IntEntry(vMap, i) )
-                break;
-        if ( k == Vec_PtrSize(vMaps) )
-            continue;
-        printf( "Obj = %4d : ", i );
-        if ( Saig_ObjIsPi(p,pObj) )
-            printf( "pi  " );
-        else if ( Saig_ObjIsLo(p,pObj) )
-            printf( "lo  " );
-        else if ( Aig_ObjIsNode(pObj) )
-            printf( "and " );
-
-        Vec_PtrForEachEntry( Vec_Int_t *, vMaps, vMap, k )
-            printf( "%d", Vec_IntEntry(vMap, i) );
-        printf( "\n" );
-    }
-    return vMaps;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of PIs in the cut]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManCutPiNum( Aig_Man_t * p, Vec_Ptr_t * vMinCut )
-{
-    Aig_Obj_t * pObj;
-    int i, Counter = 0;
-    Vec_PtrForEachEntry( Aig_Obj_t *, vMinCut, pObj, i )
-        if ( Saig_ObjIsPi(p,pObj) )
-            Counter++;
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of LOs in the cut]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManCutLoNum( Aig_Man_t * p, Vec_Ptr_t * vMinCut )
-{
-    Aig_Obj_t * pObj;
-    int i, Counter = 0;
-    Vec_PtrForEachEntry( Aig_Obj_t *, vMinCut, pObj, i )
-        if ( Saig_ObjIsLo(p,pObj) )
-            Counter++;
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of LIs in the cut]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManCutLiNum( Aig_Man_t * p, Vec_Ptr_t * vMinCut )
-{
-    Aig_Obj_t * pFanout;
-    Aig_Obj_t * pObj;
-    int i, k, iFanout, Counter = 0;
-    Vec_PtrForEachEntry( Aig_Obj_t *, vMinCut, pObj, i )
-    {
-        if ( Aig_ObjIsPi(pObj) )
-            continue;
-        Aig_ObjForEachFanout( p, pObj, pFanout, iFanout, k )
-        {
-            if ( Saig_ObjIsLi(p, pFanout) )
-            {
-                Counter++;
-                break;
-            }
-        }
-    }
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes volume of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManCutVolume_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
-{
-    if ( Aig_ObjIsTravIdCurrent(p, pObj) )
-        return 0;
-    Aig_ObjSetTravIdCurrent(p, pObj);
-    assert( Aig_ObjIsNode(pObj) );
-    return 1 + Llb_ManCutVolume_rec(p, Aig_ObjFanin0(pObj)) + 
-        Llb_ManCutVolume_rec(p, Aig_ObjFanin1(pObj));
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes volume of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManCutVolume( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper )
-{
-    Aig_Obj_t * pObj;
-    int i, Counter = 0;
-    // mark the lower cut with the traversal ID
-    Aig_ManIncrementTravId(p);
-    Vec_PtrForEachEntry( Aig_Obj_t *, vLower, pObj, i )
-        Aig_ObjSetTravIdCurrent( p, pObj );
-    // count the upper cut
-    Vec_PtrForEachEntry( Aig_Obj_t *, vUpper, pObj, i )
-        Counter += Llb_ManCutVolume_rec( p, pObj );
-    return Counter;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Computes volume of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManCutNodes_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vNodes )
-{
-    if ( Aig_ObjIsTravIdCurrent(p, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent(p, pObj);
-    assert( Aig_ObjIsNode(pObj) );
-    Llb_ManCutNodes_rec(p, Aig_ObjFanin0(pObj), vNodes);
-    Llb_ManCutNodes_rec(p, Aig_ObjFanin1(pObj), vNodes);
-    Vec_PtrPush( vNodes, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes volume of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ManCutNodes( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper )
-{
-    Vec_Ptr_t * vNodes;
-    Aig_Obj_t * pObj;
-    int i;
-    // mark the lower cut with the traversal ID
-    Aig_ManIncrementTravId(p);
-    Vec_PtrForEachEntry( Aig_Obj_t *, vLower, pObj, i )
-        Aig_ObjSetTravIdCurrent( p, pObj );
-    // count the upper cut
-    vNodes = Vec_PtrAlloc( 100 );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vUpper, pObj, i )
-        Llb_ManCutNodes_rec( p, pObj, vNodes );
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes volume of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ManCutSupp( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper )
-{
-    Vec_Ptr_t * vNodes, * vSupp;
-    Aig_Obj_t * pObj;
-    int i;
-    vNodes = Llb_ManCutNodes( p, vLower, vUpper );
-    // mark support of the nodes
-    Aig_ManIncrementTravId(p);
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-    {
-        assert( Aig_ObjIsNode(pObj) );
-        Aig_ObjSetTravIdCurrent( p, Aig_ObjFanin0(pObj) );
-        Aig_ObjSetTravIdCurrent( p, Aig_ObjFanin1(pObj) );
-    }
-    Vec_PtrFree( vNodes );
-    // collect the support nodes
-    vSupp = Vec_PtrAlloc( 100 );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vLower, pObj, i )
-        if ( Aig_ObjIsTravIdCurrent(p, pObj) )
-            Vec_PtrPush( vSupp, pObj );
-    return vSupp;
-
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes volume of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ManCutRange( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper )
-{
-    Vec_Ptr_t * vRange;
-    Aig_Obj_t * pObj;
-    int i;
-    // mark the lower cut with the traversal ID
-    Aig_ManIncrementTravId(p);
-    Vec_PtrForEachEntry( Aig_Obj_t *, vLower, pObj, i )
-        Aig_ObjSetTravIdCurrent( p, pObj );
-    // collect the upper ones that are not marked
-    vRange = Vec_PtrAlloc( 100 );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vUpper, pObj, i )
-        if ( !Aig_ObjIsTravIdCurrent(p, pObj) )
-            Vec_PtrPush( vRange, pObj );
-    return vRange;
-}
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Prints the given cluster.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManCutPrint( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper )
-{
-    Vec_Ptr_t * vSupp, * vRange;
-    int Pis, Ffs, And;
-
-    Pis = Llb_ManCutPiNum(p, vLower);
-    Ffs = Llb_ManCutLoNum(p, vLower);
-    And = Vec_PtrSize(vLower) - Pis - Ffs;
-    printf( "Leaf: %3d=%3d+%3d+%3d  ",  Vec_PtrSize(vLower), Pis, Ffs, And );
-
-    Pis = Llb_ManCutPiNum(p, vUpper);
-    Ffs = Llb_ManCutLiNum(p, vUpper);
-    And = Vec_PtrSize(vUpper) - Pis - Ffs;
-    printf( "Root: %3d=%3d+%3d+%3d  ", Vec_PtrSize(vUpper), Pis, Ffs, And );
-
-    vSupp = Llb_ManCutSupp( p, vLower, vUpper );
-    Pis = Llb_ManCutPiNum(p, vSupp);
-    Ffs = Llb_ManCutLoNum(p, vSupp);
-    And = Vec_PtrSize(vSupp) - Pis - Ffs;
-    printf( "Supp: %3d=%3d+%3d+%3d  ", Vec_PtrSize(vSupp), Pis, Ffs, And );
-
-    vRange = Llb_ManCutRange( p, vLower, vUpper );
-    Pis = Llb_ManCutPiNum(p, vRange);
-    Ffs = Llb_ManCutLiNum(p, vRange);
-    And = Vec_PtrSize(vRange) - Pis - Ffs;
-    printf( "Range: %3d=%3d+%3d+%3d  ", Vec_PtrSize(vRange), Pis, Ffs, And );
-
-    printf( "S =%3d. V =%3d.\n", 
-        Vec_PtrSize(vSupp)+Vec_PtrSize(vRange), Llb_ManCutVolume(p, vLower, vUpper) );
-    Vec_PtrFree( vSupp );
-    Vec_PtrFree( vRange );
-/*   
-    {
-        Aig_Obj_t * pObj;
-        int i;
-        printf( "Lower: " );
-        Vec_PtrForEachEntry( Aig_Obj_t *, vLower, pObj, i )
-            printf( " %d", pObj->Id );
-        printf( "     " );
-        printf( "Upper: " );
-        Vec_PtrForEachEntry( Aig_Obj_t *, vUpper, pObj, i )
-            printf( " %d", pObj->Id );
-        printf( "\n" );
-    }
-*/
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints the given cluster.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManResultPrint( Aig_Man_t * p, Vec_Ptr_t * vResult )
-{
-    Vec_Ptr_t * vLower, * vUpper;
-    int i;
-    Vec_PtrForEachEntryReverse( Vec_Ptr_t *, vResult, vLower, i )
-    {
-        if ( i < Vec_PtrSize(vResult) - 1 )
-            Llb_ManCutPrint( p, vLower, vUpper );
-        vUpper = vLower;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Tries to find an augmenting path originating in this node.]
-
-  Description [This procedure works for directed graphs only!]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManFlowBwdPath2_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
-{
-    Aig_Obj_t * pFanout;
-    assert( Aig_ObjIsNode(pObj) || Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) );
-    // skip visited nodes
-    if ( Aig_ObjIsTravIdCurrent(p, pObj) )
-        return 0;
-    Aig_ObjSetTravIdCurrent(p, pObj);
-    // process node without flow
-    if ( !Llb_ObjGetPath(pObj) )
-    {
-        // start the path if we reached a terminal node
-        if ( pObj->fMarkA )
-            return Llb_ObjSetPath( pObj, (Aig_Obj_t *)1 );
-        // explore the fanins
-//        Abc_ObjForEachFanin( pObj, pFanin, i )
-//            if ( Abc_NtkMaxFlowBwdPath2_rec(pFanin) )
-//                return Abc_ObjSetPath( pObj, pFanin );
-        if ( Aig_ObjIsNode(pObj) )
-        {
-            if ( Llb_ManFlowBwdPath2_rec( p, Aig_ObjFanin0(pObj) ) )
-                return Llb_ObjSetPath( pObj, Aig_ObjFanin0(pObj) );
-            if ( Llb_ManFlowBwdPath2_rec( p, Aig_ObjFanin1(pObj) ) )
-                return Llb_ObjSetPath( pObj, Aig_ObjFanin1(pObj) );
-        }
-        return 0;
-    }
-    // pObj has flow - find the fanout with flow
-    pFanout = Llb_ObjGetFanoutPath( p, pObj );
-    if ( pFanout == NULL )
-        return 0;
-    // go through the fanins of the fanout with flow
-//    Abc_ObjForEachFanin( pFanout, pFanin, i )
-//        if ( Abc_NtkMaxFlowBwdPath2_rec( pFanin ) )
-//            return Abc_ObjSetPath( pFanout, pFanin );
-    assert( Aig_ObjIsNode(pFanout) );
-    if ( Llb_ManFlowBwdPath2_rec( p, Aig_ObjFanin0(pFanout) ) )
-        return Llb_ObjSetPath( pFanout, Aig_ObjFanin0(pFanout) );
-    if ( Llb_ManFlowBwdPath2_rec( p, Aig_ObjFanin1(pFanout) ) )
-        return Llb_ObjSetPath( pFanout, Aig_ObjFanin1(pFanout) );
-    // try the fanout
-    if ( Llb_ManFlowBwdPath2_rec( p, pFanout ) )
-        return Llb_ObjSetPath( pFanout, NULL );
-    return 0;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Cleans markB.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManFlowLabelTfi_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
-{
-    if ( Aig_ObjIsTravIdCurrent(p, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent(p, pObj);
-    if ( Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) )
-        return;
-    assert( Aig_ObjIsNode(pObj) );
-    Llb_ManFlowLabelTfi_rec( p, Aig_ObjFanin0(pObj) );
-    Llb_ManFlowLabelTfi_rec( p, Aig_ObjFanin1(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManFlowUpdateCut( Aig_Man_t * p, Vec_Ptr_t * vMinCut )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    // label the TFI of the cut nodes
-    Aig_ManIncrementTravId(p);
-    Vec_PtrForEachEntry( Aig_Obj_t *, vMinCut, pObj, i )
-        Llb_ManFlowLabelTfi_rec( p, pObj );
-    // collect labeled fanins of non-labeled nodes
-    Vec_PtrClear( vMinCut );
-    Aig_ManIncrementTravId(p);
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        if ( !Aig_ObjIsPo(pObj) && !Aig_ObjIsNode(pObj) )
-            continue;
-        if ( Aig_ObjIsTravIdCurrent(p, pObj) || Aig_ObjIsTravIdPrevious(p, pObj) )
-            continue;
-        if ( Aig_ObjIsTravIdPrevious(p, Aig_ObjFanin0(pObj)) )
-        {
-            Aig_ObjSetTravIdCurrent(p, Aig_ObjFanin0(pObj));
-            Vec_PtrPush( vMinCut, Aig_ObjFanin0(pObj) );
-        }
-        if ( Aig_ObjIsNode(pObj) && Aig_ObjIsTravIdPrevious(p, Aig_ObjFanin1(pObj)) )
-        {
-            Aig_ObjSetTravIdCurrent(p, Aig_ObjFanin1(pObj));
-            Vec_PtrPush( vMinCut, Aig_ObjFanin1(pObj) );
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find minimum-volume minumum cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ManFlowMinCut( Aig_Man_t * p )
-{
-    Vec_Ptr_t * vMinCut;
-    Aig_Obj_t * pObj;
-    int i;
-    // collect the cut nodes
-    vMinCut = Vec_PtrAlloc( Aig_ManRegNum(p) );
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        // node without flow is not a cut node
-        if ( !Llb_ObjGetPath(pObj) )
-            continue;
-        // unvisited node is below the cut
-        if ( !Aig_ObjIsTravIdCurrent(p, pObj) )
-            continue;
-        // add terminal with flow or node whose path is not visited
-        if ( pObj->fMarkA || !Aig_ObjIsTravIdCurrent( p, Llb_ObjGetPath(pObj) ) )
-            Vec_PtrPush( vMinCut, pObj );
-    }
-    return vMinCut;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Verifies the min-cut is indeed a cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManFlowVerifyCut_rec( Aig_Man_t * p, Aig_Obj_t * pObj )
-{
-    // skip visited nodes
-    if ( Aig_ObjIsTravIdCurrent(p, pObj) )
-        return 1;
-    Aig_ObjSetTravIdCurrent(p, pObj);
-    // visit the node
-    if ( Aig_ObjIsConst1(pObj) )
-        return 1;
-    if ( Aig_ObjIsPi(pObj) )
-        return 0;
-    // explore the fanins
-    assert( Aig_ObjIsNode(pObj) );
-    if ( !Llb_ManFlowVerifyCut_rec(p, Aig_ObjFanin0(pObj)) )
-        return 0;
-    if ( !Llb_ManFlowVerifyCut_rec(p, Aig_ObjFanin1(pObj)) )
-        return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Verifies the min-cut is indeed a cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_ManFlowVerifyCut( Aig_Man_t * p, Vec_Ptr_t * vMinCut )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    // mark the cut with the current traversal ID
-    Aig_ManIncrementTravId(p);
-    Vec_PtrForEachEntry( Aig_Obj_t *, vMinCut, pObj, i )
-        Aig_ObjSetTravIdCurrent( p, pObj );
-    // search from the latches for a path to the COs/CIs
-    Saig_ManForEachLi( p, pObj, i )
-    {
-        if ( !Llb_ManFlowVerifyCut_rec( p, Aig_ObjFanin0(pObj) ) )
-            return 0;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Implementation of max-flow/min-cut computation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ManFlow( Aig_Man_t * p, Vec_Ptr_t * vSources, int * pnFlow )
-{
-    Vec_Ptr_t * vMinCut;
-    Aig_Obj_t * pObj;
-    int Flow, FlowCur, RetValue, i;
-    // find the max-flow
-    Flow = 0;
-    Aig_ManCleanData( p );
-    Aig_ManIncrementTravId(p);
-    Vec_PtrForEachEntry( Aig_Obj_t *, vSources, pObj, i )
-    {
-        assert( !pObj->fMarkA && pObj->fMarkB );
-        if ( !Aig_ObjFanin0(pObj)->fMarkB )
-        {
-            FlowCur  = Llb_ManFlowBwdPath2_rec( p, Aig_ObjFanin0(pObj) );
-            Flow    += FlowCur;
-            if ( FlowCur )
-                Aig_ManIncrementTravId(p);
-        }
-        if ( Aig_ObjIsNode(pObj) && !Aig_ObjFanin1(pObj)->fMarkB )
-        {
-            FlowCur  = Llb_ManFlowBwdPath2_rec( p, Aig_ObjFanin1(pObj) );
-            Flow    += FlowCur;
-            if ( FlowCur )
-                Aig_ManIncrementTravId(p);
-        }
-    }
-    if ( pnFlow )
-        *pnFlow = Flow;
-
-    // mark the nodes reachable from the latches
-    Aig_ManIncrementTravId(p);
-    Vec_PtrForEachEntry( Aig_Obj_t *, vSources, pObj, i )
-    {
-        assert( !pObj->fMarkA && pObj->fMarkB );
-        if ( !Aig_ObjFanin0(pObj)->fMarkB )
-        {
-            RetValue = Llb_ManFlowBwdPath2_rec( p, Aig_ObjFanin0(pObj) );
-            assert( RetValue == 0 );
-        }
-        if ( Aig_ObjIsNode(pObj) && !Aig_ObjFanin1(pObj)->fMarkB )
-        {
-            RetValue = Llb_ManFlowBwdPath2_rec( p, Aig_ObjFanin1(pObj) );
-            assert( RetValue == 0 );
-        }
-    }
-
-    // find the min-cut with the smallest volume
-    vMinCut = Llb_ManFlowMinCut( p );
-    assert( Vec_PtrSize(vMinCut) == Flow );
-    // verify the cut
-    if ( !Llb_ManFlowVerifyCut(p, vMinCut) )
-        printf( "Llb_ManFlow() error! The computed min-cut is not a cut!\n" );
-//    Llb_ManFlowPrintCut( p, vMinCut );
-    return vMinCut;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Implementation of max-flow/min-cut computation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ManFlowCompute( Aig_Man_t * p )
-{
-    Vec_Ptr_t * vMinCut;
-    Aig_Obj_t * pObj;
-    int Flow, FlowCur, RetValue, i;
-    // find the max-flow
-    Flow = 0;
-    Aig_ManCleanData( p );
-    Aig_ManIncrementTravId(p);
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        if ( !pObj->fMarkB )
-            continue;
-        assert( !pObj->fMarkA );
-        if ( !Aig_ObjFanin0(pObj)->fMarkB )
-        {
-//printf( "%d ", Aig_ObjFanin0(pObj)->Id );
-            FlowCur  = Llb_ManFlowBwdPath2_rec( p, Aig_ObjFanin0(pObj) );
-            Flow    += FlowCur;
-            if ( FlowCur )
-                Aig_ManIncrementTravId(p);
-        }
-        if ( Aig_ObjIsNode(pObj) && !Aig_ObjFanin1(pObj)->fMarkB )
-        {
-//printf( "%d ", Aig_ObjFanin1(pObj)->Id );
-            FlowCur  = Llb_ManFlowBwdPath2_rec( p, Aig_ObjFanin1(pObj) );
-            Flow    += FlowCur;
-            if ( FlowCur )
-                Aig_ManIncrementTravId(p);
-        }
-    }
-//printf( "\n" );
-
-    // mark the nodes reachable from the latches
-    Aig_ManIncrementTravId(p);
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        if ( !pObj->fMarkB )
-            continue;
-        assert( !pObj->fMarkA );
-        if ( !Aig_ObjFanin0(pObj)->fMarkB )
-        {
-            RetValue = Llb_ManFlowBwdPath2_rec( p, Aig_ObjFanin0(pObj) );
-            assert( RetValue == 0 );
-        }
-        if ( Aig_ObjIsNode(pObj) && !Aig_ObjFanin1(pObj)->fMarkB )
-        {
-            RetValue = Llb_ManFlowBwdPath2_rec( p, Aig_ObjFanin1(pObj) );
-            assert( RetValue == 0 );
-        }
-    }
-    // find the min-cut with the smallest volume
-    vMinCut = Llb_ManFlowMinCut( p );
-    assert( Vec_PtrSize(vMinCut) == Flow );
-//printf( "%d ", Vec_PtrSize(vMinCut) );
-    Llb_ManFlowUpdateCut( p, vMinCut );
-//printf( "%d   ", Vec_PtrSize(vMinCut) );
-    // verify the cut
-    if ( !Llb_ManFlowVerifyCut(p, vMinCut) )
-        printf( "Llb_ManFlow() error! The computed min-cut is not a cut!\n" );
-//    Llb_ManFlowPrintCut( p, vMinCut );
-    return vMinCut;
-}
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Cleans markB.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManFlowCleanMarkB_rec( Aig_Obj_t * pObj )
-{
-    if ( pObj->fMarkB == 0 )
-        return;
-    pObj->fMarkB = 0;
-    assert( Aig_ObjIsNode(pObj) );
-    Llb_ManFlowCleanMarkB_rec( Aig_ObjFanin0(pObj) );
-    Llb_ManFlowCleanMarkB_rec( Aig_ObjFanin1(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Cleans markB.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManFlowSetMarkA_rec( Aig_Obj_t * pObj )
-{
-    if ( pObj->fMarkA )
-        return;
-    pObj->fMarkA = 1;
-    if ( Aig_ObjIsPi(pObj) || Aig_ObjIsConst1(pObj) )
-        return;
-    assert( Aig_ObjIsNode(pObj) );
-    Llb_ManFlowSetMarkA_rec( Aig_ObjFanin0(pObj) );
-    Llb_ManFlowSetMarkA_rec( Aig_ObjFanin1(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares flow computation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManFlowPrepareCut( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    // reset marks
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        pObj->fMarkA = 0;
-        pObj->fMarkB = 1;
-    }
-    // clean PIs and const
-    Aig_ManConst1(p)->fMarkB = 0;
-    Aig_ManForEachPi( p, pObj, i )
-        pObj->fMarkB = 0;
-    // clean upper cut
-//printf( "Upper: ");
-    Vec_PtrForEachEntry( Aig_Obj_t *, vUpper, pObj, i )
-    {
-        Llb_ManFlowCleanMarkB_rec( pObj );
-//printf( "%d ", pObj->Id );
-    }
-//printf( "\n" );
-    // set lower cut
-//printf( "Lower: ");
-    Vec_PtrForEachEntry( Aig_Obj_t *, vLower, pObj, i )
-    {
-//printf( "%d ", pObj->Id );
-        assert( pObj->fMarkB == 0 );
-        Llb_ManFlowSetMarkA_rec( pObj );
-    }
-//printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares flow computation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManFlowUnmarkCone( Aig_Man_t * p, Vec_Ptr_t * vCone )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Vec_PtrForEachEntry( Aig_Obj_t *, vCone, pObj, i )
-    {
-        assert( Aig_ObjIsNode(pObj) );
-        assert( pObj->fMarkB == 1 );
-        pObj->fMarkB = 0;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManFlowCollectAndMarkCone_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vCone )
-{
-    Aig_Obj_t * pFanout;
-    int i, iFanout;
-    if ( Saig_ObjIsLi(p, pObj) )
-        return;
-    if ( pObj->fMarkB )
-        return;
-    if ( pObj->fMarkA == 0 )
-    {
-        assert( Aig_ObjIsNode(pObj) );
-        pObj->fMarkB = 1;
-        if ( Aig_ObjIsNode(pObj) )
-            Vec_PtrPush( vCone, pObj );
-    }
-    Aig_ObjForEachFanout( p, pObj, pFanout, iFanout, i )
-        Llb_ManFlowCollectAndMarkCone_rec( p, pFanout, vCone );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the cone.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManFlowCollectAndMarkCone( Aig_Man_t * p, Vec_Ptr_t * vStarts, Vec_Ptr_t * vCone )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Vec_PtrClear( vCone );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vStarts, pObj, i )
-    {
-        assert( pObj->fMarkA && !pObj->fMarkB );
-        Llb_ManFlowCollectAndMarkCone_rec( p, pObj, vCone );
-    }
-}
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Finds balanced cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ManComputeCutLo( Aig_Man_t * p )
-{
-    Vec_Ptr_t * vMinCut;
-    Aig_Obj_t * pObj;
-    int i;
-    vMinCut = Vec_PtrAlloc( 100 );
-    Aig_ManForEachPi( p, pObj, i )
-        Vec_PtrPush( vMinCut, pObj );
-    return vMinCut;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds balanced cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ManComputeCutLi( Aig_Man_t * p )
-{
-    Vec_Ptr_t * vMinCut;
-    Aig_Obj_t * pObj;
-    int i;
-    assert( Saig_ManPoNum(p) == 0 );
-    vMinCut = Vec_PtrAlloc( 100 );
-    Aig_ManIncrementTravId(p);
-    Saig_ManForEachLi( p, pObj, i )
-    {
-        pObj = Aig_ObjFanin0(pObj);
-        if ( Aig_ObjIsConst1(pObj) )
-            continue;
-        if ( Aig_ObjIsTravIdCurrent(p, pObj) )
-            continue;
-        Aig_ObjSetTravIdCurrent(p, pObj);
-        Vec_PtrPush( vMinCut, pObj );
-    }
-    return vMinCut;
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Finds balanced cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManFlowGetObjSet( Aig_Man_t * p, Vec_Ptr_t * vLower, int iStart, int nSize, Vec_Ptr_t * vSet )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Vec_PtrClear( vSet );
-    for ( i = 0; i < nSize; i++ )
-    {
-        pObj = (Aig_Obj_t *)Vec_PtrEntry( vLower, (iStart + i) % Vec_PtrSize(vLower) );
-        Vec_PtrPush( vSet, pObj );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds balanced cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ManFlowFindBestCut( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper, int Num )
-{
-    int nVolMin = Aig_ManNodeNum(p) / Num / 2;
-    Vec_Ptr_t * vMinCut;
-    Vec_Ptr_t * vCone, * vSet;
-    Aig_Obj_t * pObj;
-    int i, s, Vol, VolLower, VolUpper, VolCmp;
-    int iBest = -1, iMinCut = ABC_INFINITY, iVolBest = 0;
-
-    Vol = Llb_ManCutVolume( p, vLower, vUpper );
-    assert( Vol > nVolMin );
-    VolCmp = ABC_MIN( nVolMin, Vol - nVolMin );
-    vCone = Vec_PtrAlloc( 100 );
-    vSet  = Vec_PtrAlloc( 100 );
-    Llb_ManFlowPrepareCut( p, vLower, vUpper );
-    for ( s = 1; s < Aig_ManRegNum(p); s += 5 )
-    {
-        Vec_PtrForEachEntry( Aig_Obj_t *, vLower, pObj, i )
-        {
-            Llb_ManFlowGetObjSet( p, vLower, i, s, vSet );
-            Llb_ManFlowCollectAndMarkCone( p, vSet, vCone );
-            if ( Vec_PtrSize(vCone) == 0 )
-                continue;
-            vMinCut  = Llb_ManFlowCompute( p );
-            Llb_ManFlowUnmarkCone( p, vCone );
-
-            VolLower = Llb_ManCutVolume( p, vLower, vMinCut );
-            VolUpper = Llb_ManCutVolume( p, vMinCut, vUpper );
-            Vol = ABC_MIN( VolLower, VolUpper );
-            if ( Vol >= VolCmp &&  (iMinCut == -1 || 
-                                    iMinCut >  Vec_PtrSize(vMinCut) || 
-                                   (iMinCut == Vec_PtrSize(vMinCut) && iVolBest < Vol)) )
-            {
-                iBest = i;
-                iMinCut = Vec_PtrSize(vMinCut);
-                iVolBest = Vol;
-            }
-            Vec_PtrFree( vMinCut );
-        }
-        if ( iBest >= 0 )
-            break;
-    }
-    if ( iBest == -1 )
-    {
-        // cleanup
-        Vec_PtrFree( vCone );
-        Vec_PtrFree( vSet );
-        return NULL;
-    }
-    // get the best cut
-    assert( iBest >= 0 );
-    Llb_ManFlowGetObjSet( p, vLower, iBest, s, vSet );
-    Llb_ManFlowCollectAndMarkCone( p, vSet, vCone );
-    vMinCut = Llb_ManFlowCompute( p );
-    Llb_ManFlowUnmarkCone( p, vCone );
-    // cleanup
-    Vec_PtrFree( vCone );
-    Vec_PtrFree( vSet );
-    return vMinCut;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds balanced cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ManComputeCuts( Aig_Man_t * p, int Num, int fVerbose, int fVeryVerbose )
-{
-    int nVolMax = Aig_ManNodeNum(p) / Num;
-    Vec_Ptr_t * vResult, * vMinCut, * vLower, * vUpper;
-    int i, k, nVol, clk = clock();
-    vResult = Vec_PtrAlloc( 100 );
-    Vec_PtrPush( vResult, Llb_ManComputeCutLo(p) );
-    Vec_PtrPush( vResult, Llb_ManComputeCutLi(p) );
-    while ( 1 ) 
-    {
-        // find a place to insert new cut
-        vLower = (Vec_Ptr_t *)Vec_PtrEntry( vResult, 0 );
-        Vec_PtrForEachEntryStart( Vec_Ptr_t *, vResult, vUpper, i, 1 )
-        {
-            nVol = Llb_ManCutVolume( p, vLower, vUpper );
-            if ( nVol <= nVolMax )
-            {
-                vLower = vUpper;
-                continue;
-            }
-
-            if ( fVeryVerbose )
-            Llb_ManCutPrint( p, vLower,  vUpper );
-            vMinCut = Llb_ManFlowFindBestCut( p, vLower, vUpper, Num );
-            if ( vMinCut == NULL )
-            {
-                if ( fVeryVerbose )
-                printf( "Could not break the cut.\n" );
-                if ( fVeryVerbose )
-                printf( "\n" );
-                vLower = vUpper;
-                continue;
-            }
-
-            if ( fVeryVerbose )
-            Llb_ManCutPrint( p, vMinCut, vUpper );
-            if ( fVeryVerbose )
-            Llb_ManCutPrint( p, vLower,  vMinCut );
-            if ( fVeryVerbose )
-            printf( "\n" );
-
-            break;
-        }
-        if ( i == Vec_PtrSize(vResult) )
-            break;
-        // insert vMinCut before vUpper
-        Vec_PtrPush( vResult, NULL );
-        for ( k = Vec_PtrSize(vResult) - 1; k > i; k-- )
-            Vec_PtrWriteEntry( vResult, k, Vec_PtrEntry(vResult, k-1) );
-        Vec_PtrWriteEntry( vResult, i, vMinCut );
-    }
-    if ( fVerbose )
-    {
-        printf( "Finished computing %d partitions.  ", Vec_PtrSize(vResult) - 1 );
-        Abc_PrintTime( 1, "Time", clock() - clk );
-        Llb_ManResultPrint( p, vResult );
-    }
-    return vResult;
-}
- 
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_BddSetDefaultParams( Gia_ParLlb_t * p )
-{
-    memset( p, 0, sizeof(Gia_ParLlb_t) );
-    p->nBddMax       =  1000000;
-    p->nIterMax      = 10000000;
-    p->nClusterMax   =       20;
-    p->nHintDepth    =        0;
-    p->HintFirst     =        0;
-    p->fUseFlow      =        0;  // use flow 
-    p->nVolumeMax    =      100;  // max volume
-    p->nVolumeMin    =       30;  // min volume
-    p->fReorder      =        1;
-    p->fIndConstr    =        0;
-    p->fUsePivots    =        0;
-    p->fCluster      =        0;
-    p->fSchedule     =        0;
-    p->fVerbose      =        0;
-    p->fVeryVerbose  =        0;
-    p->fSilent       =        0;
-    p->TimeLimit     =        0;
-//    p->TimeLimit     =        0;
-    p->TimeLimitGlo  =        0;
-    p->TimeTarget    =        0;
-    p->iFrame        =       -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds balanced cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ManMinCutTest( Aig_Man_t * pAig, int Num )
-{
-    extern void Llb_BddConstructTest( Aig_Man_t * p, Vec_Ptr_t * vResult );
-    extern void Llb_BddExperiment( Aig_Man_t * pInit, Aig_Man_t * pAig, Gia_ParLlb_t * pPars, Vec_Ptr_t * vResult, Vec_Ptr_t * vMaps );
- 
-
-    int fVerbose = 1;
-    Gia_ParLlb_t Pars, * pPars = &Pars;
-    Vec_Ptr_t * vResult;//, * vSupps, * vMaps;
-    Aig_Man_t * p;
-
-    Llb_BddSetDefaultParams( pPars );
-
-    p = Aig_ManDupFlopsOnly( pAig );
-//Aig_ManShow( p, 0, NULL );
-    Aig_ManPrintStats( pAig );
-    Aig_ManPrintStats( p );
-    Aig_ManFanoutStart( p );
-
-    vResult = Llb_ManComputeCuts( p, Num, 1, 0 );
-//    vSupps  = Llb_ManCutSupps( p, vResult );
-//    vMaps   = Llb_ManCutMap( p, vResult, vSupps );
-
-//    Llb_BddExperiment( pAig, p, pPars, vResult, vMaps );
-    Llb_CoreExperiment( pAig, p, pPars, vResult, 0 );
-
-//    Vec_VecFree( (Vec_Vec_t *)vMaps );
-//    Vec_VecFree( (Vec_Vec_t *)vSupps );
-    Vec_VecFree( (Vec_Vec_t *)vResult );
-
-    Aig_ManFanoutStop( p );
-    Aig_ManCleanMarkAB( p );
-    Aig_ManStop( p );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb2Image.c b/src/aig/llb/llb2Image.c
deleted file mode 100644
index 5baa5c57..00000000
--- a/src/aig/llb/llb2Image.c
+++ /dev/null
@@ -1,478 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb2Image.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Computes image using partitioned structure.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb2Image.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-extern Vec_Ptr_t * Llb_ManCutNodes( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper );
-extern Vec_Ptr_t * Llb_ManCutRange( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Computes supports of the partitions.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_ImgSupports( Aig_Man_t * p, Vec_Ptr_t * vDdMans, Vec_Int_t * vStart, Vec_Int_t * vStop, int fAddPis, int fVerbose )
-{
-    Vec_Ptr_t * vSupps;
-    Vec_Int_t * vOne;
-    Aig_Obj_t * pObj;
-    DdManager * dd;
-    DdNode * bSupp, * bTemp;
-    int i, Entry, nSize;
-    nSize  = Cudd_ReadSize( (DdManager *)Vec_PtrEntry( vDdMans, 0 ) );
-    vSupps = Vec_PtrAlloc( 100 );
-    // create initial
-    vOne = Vec_IntStart( nSize );
-    Vec_IntForEachEntry( vStart, Entry, i )
-        Vec_IntWriteEntry( vOne, Entry, 1 );
-    Vec_PtrPush( vSupps, vOne );
-    // create intermediate 
-    Vec_PtrForEachEntry( DdManager *, vDdMans, dd, i )
-    {
-        vOne  = Vec_IntStart( nSize );
-        bSupp = Cudd_Support( dd, dd->bFunc );  Cudd_Ref( bSupp );
-        for ( bTemp = bSupp; bTemp != Cudd_ReadOne(dd); bTemp = cuddT(bTemp) )
-            Vec_IntWriteEntry( vOne, bTemp->index, 1 );
-        Cudd_RecursiveDeref( dd, bSupp );
-        Vec_PtrPush( vSupps, vOne );
-    }
-    // create final
-    vOne = Vec_IntStart( nSize );
-    Vec_IntForEachEntry( vStop, Entry, i )
-        Vec_IntWriteEntry( vOne, Entry, 1 );
-    if ( fAddPis )
-        Saig_ManForEachPi( p, pObj, i )
-            Vec_IntWriteEntry( vOne, Aig_ObjId(pObj), 1 );
-    Vec_PtrPush( vSupps, vOne );
-
-    // print supports
-    assert( nSize == Aig_ManObjNumMax(p) );
-    if ( fVerbose )
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        int k, Counter = 0;
-        Vec_PtrForEachEntry( Vec_Int_t *, vSupps, vOne, k )
-            Counter += Vec_IntEntry(vOne, i);
-        if ( Counter == 0 ) 
-            continue;
-        printf( "Obj = %4d : ", i );
-        if ( Saig_ObjIsPi(p,pObj) )
-            printf( "pi  " );
-        else if ( Saig_ObjIsLo(p,pObj) )
-            printf( "lo  " );
-        else if ( Saig_ObjIsLi(p,pObj) )
-            printf( "li  " );
-        else if ( Aig_ObjIsNode(pObj) )
-            printf( "and " );
-        Vec_PtrForEachEntry( Vec_Int_t *, vSupps, vOne, k )
-            printf( "%d", Vec_IntEntry(vOne, i) );
-        printf( "\n" );
-    }
-    return vSupps;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes quantification schedule.]
-
-  Description [Input array contains supports: 0=starting, ... intermediate...
-  N-1=final. Output arrays contain immediately quantifiable vars (vQuant0)
-  and vars that should be quantified after conjunction (vQuant1).]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ImgSchedule( Vec_Ptr_t * vSupps, Vec_Ptr_t ** pvQuant0, Vec_Ptr_t ** pvQuant1, int fVerbose )
-{
-    Vec_Int_t * vOne;
-    int nVarsAll, Counter, iSupp, Entry, i, k;
-    // start quantification arrays
-    *pvQuant0 = Vec_PtrAlloc( Vec_PtrSize(vSupps) );
-    *pvQuant1 = Vec_PtrAlloc( Vec_PtrSize(vSupps) );
-    Vec_PtrForEachEntry( Vec_Int_t *, vSupps, vOne, k )
-    {
-        Vec_PtrPush( *pvQuant0, Vec_IntAlloc(16) );
-        Vec_PtrPush( *pvQuant1, Vec_IntAlloc(16) );
-    }
-    // count how many times each var appears
-    nVarsAll = Vec_IntSize( (Vec_Int_t *)Vec_PtrEntry(vSupps, 0) );
-    for ( i = 0; i < nVarsAll; i++ )
-    {
-        Counter = 0;
-        Vec_PtrForEachEntry( Vec_Int_t *, vSupps, vOne, k )
-            if ( Vec_IntEntry(vOne, i) )
-            {
-                iSupp = k;
-                Counter++;
-            }
-        if ( Counter == 0 )
-            continue;
-        if ( Counter == 1 )
-            Vec_IntPush( (Vec_Int_t *)Vec_PtrEntry(*pvQuant0, iSupp), i );
-        else // if ( Counter > 1 )
-            Vec_IntPush( (Vec_Int_t *)Vec_PtrEntry(*pvQuant1, iSupp), i );
-    }
-
-    if ( fVerbose )
-    for ( i = 0; i < Vec_PtrSize(vSupps); i++ )
-    {
-        printf( "%2d : Quant0 = ", i );
-        Vec_IntForEachEntry( (Vec_Int_t *)Vec_PtrEntry(*pvQuant0, i), Entry, k )
-            printf( "%d ", Entry );
-        printf( "\n" );
-    }
-
-    if ( fVerbose )
-    for ( i = 0; i < Vec_PtrSize(vSupps); i++ )
-    {
-        printf( "%2d : Quant1 = ", i );
-        Vec_IntForEachEntry( (Vec_Int_t *)Vec_PtrEntry(*pvQuant1, i), Entry, k )
-            printf( "%d ", Entry );
-        printf( "\n" );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes one partition in a separate BDD manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdManager * Llb_ImgPartition( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper, int TimeTarget )
-{
-    Vec_Ptr_t * vNodes, * vRange;
-    Aig_Obj_t * pObj;
-    DdManager * dd;
-    DdNode * bBdd0, * bBdd1, * bProd, * bRes, * bTemp;
-    int i;
-
-    dd = Cudd_Init( Aig_ManObjNumMax(p), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    Cudd_AutodynEnable( dd,  CUDD_REORDER_SYMM_SIFT );
-    dd->TimeStop = TimeTarget;
-
-    Vec_PtrForEachEntry( Aig_Obj_t *, vLower, pObj, i )
-        pObj->pData = Cudd_bddIthVar( dd, Aig_ObjId(pObj) );
-
-    vNodes = Llb_ManCutNodes( p, vLower, vUpper );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-    {
-        bBdd0 = Cudd_NotCond( (DdNode *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-        bBdd1 = Cudd_NotCond( (DdNode *)Aig_ObjFanin1(pObj)->pData, Aig_ObjFaninC1(pObj) );
-//        pObj->pData = Cudd_bddAnd( dd, bBdd0, bBdd1 );   Cudd_Ref( (DdNode *)pObj->pData );
-//        pObj->pData = Extra_bddAndTime( dd, bBdd0, bBdd1, TimeTarget );  
-        pObj->pData = Cudd_bddAnd( dd, bBdd0, bBdd1 );  
-        if ( pObj->pData == NULL )
-        {
-            Cudd_Quit( dd );
-            Vec_PtrFree( vNodes );
-            return NULL;
-        }
-        Cudd_Ref( (DdNode *)pObj->pData );
-    }
-
-    vRange = Llb_ManCutRange( p, vLower, vUpper );
-    bRes   = Cudd_ReadOne(dd);   Cudd_Ref( bRes );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vRange, pObj, i )
-    {
-        assert( Aig_ObjIsNode(pObj) );
-        bProd = Cudd_bddXnor( dd, Cudd_bddIthVar(dd, Aig_ObjId(pObj)), (DdNode *)pObj->pData );   Cudd_Ref( bProd );
-//        bRes  = Cudd_bddAnd( dd, bTemp = bRes, bProd ); Cudd_Ref( bRes );
-//        bRes  = Extra_bddAndTime( dd, bTemp = bRes, bProd, TimeTarget );  
-        bRes  = Cudd_bddAnd( dd, bTemp = bRes, bProd );  
-        if ( bRes == NULL )
-        {
-            Cudd_Quit( dd );
-            Vec_PtrFree( vRange );
-            Vec_PtrFree( vNodes );
-            return NULL;
-        }        
-        Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( dd, bTemp );
-        Cudd_RecursiveDeref( dd, bProd );
-    }
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-        Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-
-    Vec_PtrFree( vRange );
-    Vec_PtrFree( vNodes );
-    Cudd_AutodynDisable( dd );
-//    Cudd_RecursiveDeref( dd, bRes );
-//    Extra_StopManager( dd );
-    dd->bFunc = bRes;
-    dd->TimeStop = 0;
-    return dd;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives positive cube composed of nodes IDs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_ImgComputeCube( Aig_Man_t * pAig, Vec_Int_t * vNodeIds, DdManager * dd )
-{
-    DdNode * bProd, * bTemp;
-    Aig_Obj_t * pObj;
-    int i, TimeStop;
-    TimeStop = dd->TimeStop; dd->TimeStop = 0;
-    bProd = Cudd_ReadOne(dd);   Cudd_Ref( bProd );
-    Aig_ManForEachObjVec( vNodeIds, pAig, pObj, i )
-    {
-        bProd  = Cudd_bddAnd( dd, bTemp = bProd, Cudd_bddIthVar(dd, Aig_ObjId(pObj)) ); Cudd_Ref( bProd );
-        Cudd_RecursiveDeref( dd, bTemp );
-    }
-    Cudd_Deref( bProd );
-    dd->TimeStop = TimeStop;
-    return bProd;
-} 
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ImgQuantifyFirst( Aig_Man_t * pAig, Vec_Ptr_t * vDdMans, Vec_Ptr_t * vQuant0, int fVerbose )
-{
-    DdManager * dd;
-    DdNode * bProd, * bRes, * bTemp;
-    int i, clk = clock();
-    Vec_PtrForEachEntry( DdManager *, vDdMans, dd, i )
-    {
-        // remember unquantified ones
-        assert( dd->bFunc2 == NULL );
-        dd->bFunc2 = dd->bFunc;   Cudd_Ref( dd->bFunc2 );
-
-        Cudd_AutodynEnable( dd, CUDD_REORDER_SYMM_SIFT );
-
-        bRes = dd->bFunc;
-        if ( fVerbose )
-            Abc_Print( 1, "Part %2d : Init =%5d. ", i, Cudd_DagSize(bRes) );
-        bProd = Llb_ImgComputeCube( pAig, (Vec_Int_t *)Vec_PtrEntry(vQuant0, i+1), dd );   Cudd_Ref( bProd );
-        bRes  = Cudd_bddExistAbstract( dd, bTemp = bRes, bProd );                          Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( dd, bTemp );
-        Cudd_RecursiveDeref( dd, bProd );
-        dd->bFunc = bRes;
-
-        Cudd_AutodynDisable( dd );
-
-        if ( fVerbose )
-            Abc_Print( 1, "Quant =%5d. ", Cudd_DagSize(bRes) );
-        Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 100 );
-        if ( fVerbose ) 
-            Abc_Print( 1, "Reo = %5d. ", Cudd_DagSize(bRes) );
-        Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 100 );
-        if ( fVerbose ) 
-            Abc_Print( 1, "Reo = %5d.  ", Cudd_DagSize(bRes) );
-        if ( fVerbose ) 
-            Abc_Print( 1, "Supp = %3d.  ", Cudd_SupportSize(dd, bRes) );
-        if ( fVerbose ) 
-            Abc_PrintTime( 1, "Time", clock() - clk );
-
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_ImgQuantifyReset( Vec_Ptr_t * vDdMans )
-{
-    DdManager * dd;
-    int i;
-    Vec_PtrForEachEntry( DdManager *, vDdMans, dd, i )
-    {
-        assert( dd->bFunc2 != NULL );
-        Cudd_RecursiveDeref( dd, dd->bFunc );
-        dd->bFunc = dd->bFunc2;
-        dd->bFunc2 = NULL;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes image of the initial set of states.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_ImgComputeImage( Aig_Man_t * pAig, Vec_Ptr_t * vDdMans, DdManager * dd, DdNode * bInit, 
-    Vec_Ptr_t * vQuant0, Vec_Ptr_t * vQuant1, Vec_Int_t * vDriRefs, 
-    int TimeTarget, int fBackward, int fReorder, int fVerbose )
-{
-    int fCheckSupport = 0;
-    DdManager * ddPart;
-    DdNode * bImage, * bGroup, * bCube, * bTemp;
-    int i, clk, clk0 = clock();
-
-    bImage = bInit;  Cudd_Ref( bImage );
-    if ( fBackward )
-    {
-        // change polarity
-        bCube  = Llb_DriverPhaseCube( pAig, vDriRefs, dd );                Cudd_Ref( bCube );
-        bImage = Extra_bddChangePolarity( dd, bTemp = bImage, bCube );     Cudd_Ref( bImage );
-        Cudd_RecursiveDeref( dd, bTemp );
-        Cudd_RecursiveDeref( dd, bCube );
-    }
-    else
-    {
-        // quantify unique vriables
-        bCube  = Llb_ImgComputeCube( pAig, (Vec_Int_t *)Vec_PtrEntry(vQuant0, 0), dd ); Cudd_Ref( bCube );
-        bImage = Cudd_bddExistAbstract( dd, bTemp = bImage, bCube );                    
-        if ( bImage == NULL )
-        {
-            Cudd_RecursiveDeref( dd, bTemp );
-            Cudd_RecursiveDeref( dd, bCube );
-            return NULL;
-        }
-        Cudd_Ref( bImage );
-        Cudd_RecursiveDeref( dd, bTemp );
-        Cudd_RecursiveDeref( dd, bCube );
-    }
-    // perform image computation
-    Vec_PtrForEachEntry( DdManager *, vDdMans, ddPart, i )
-    {
-        clk = clock();
-if ( fVerbose )
-printf( "   %2d : ", i );
-        // transfer the BDD from the group manager to the main manager
-        bGroup = Cudd_bddTransfer( ddPart, dd, ddPart->bFunc );                           
-        if ( bGroup == NULL )
-            return NULL;
-        Cudd_Ref( bGroup );
-if ( fVerbose )
-printf( "Pt0 =%6d. Pt1 =%6d. ", Cudd_DagSize(ddPart->bFunc), Cudd_DagSize(bGroup) );
-        // perform partial product
-        bCube  = Llb_ImgComputeCube( pAig, (Vec_Int_t *)Vec_PtrEntry(vQuant1, i+1), dd ); Cudd_Ref( bCube );
-//        bImage = Cudd_bddAndAbstract( dd, bTemp = bImage, bGroup, bCube );                
-//        bImage = Extra_bddAndAbstractTime( dd, bTemp = bImage, bGroup, bCube, TimeTarget );  
-        bImage = Cudd_bddAndAbstract( dd, bTemp = bImage, bGroup, bCube );  
-        if ( bImage == NULL )
-        {
-            Cudd_RecursiveDeref( dd, bTemp );
-            Cudd_RecursiveDeref( dd, bCube );
-            Cudd_RecursiveDeref( dd, bGroup );
-            return NULL;
-        }
-        Cudd_Ref( bImage );
-
-if ( fVerbose )
-printf( "Im0 =%6d. Im1 =%6d. ", Cudd_DagSize(bTemp), Cudd_DagSize(bImage) );
-//printf("\n"); Extra_bddPrintSupport(dd, bImage); printf("\n");
-        Cudd_RecursiveDeref( dd, bTemp );
-        Cudd_RecursiveDeref( dd, bCube );
-        Cudd_RecursiveDeref( dd, bGroup );
-
-//        Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 100 );
-//        Abc_Print( 1, "Reo =%6d.  ", Cudd_DagSize(bImage) );
-
-if ( fVerbose )
-printf( "Supp =%3d. ", Cudd_SupportSize(dd, bImage) );
-if ( fVerbose )
-Abc_PrintTime( 1, "T", clock() - clk );
-    }
-
-    if ( !fBackward )
-    {
-        // change polarity
-        bCube  = Llb_DriverPhaseCube( pAig, vDriRefs, dd );                Cudd_Ref( bCube );
-        bImage = Extra_bddChangePolarity( dd, bTemp = bImage, bCube );     Cudd_Ref( bImage );
-        Cudd_RecursiveDeref( dd, bTemp );
-        Cudd_RecursiveDeref( dd, bCube );
-    }
-    else
-    {
-        // quantify unique vriables
-        bCube  = Llb_ImgComputeCube( pAig, (Vec_Int_t *)Vec_PtrEntry(vQuant0, 0), dd ); Cudd_Ref( bCube );
-        bImage = Cudd_bddExistAbstract( dd, bTemp = bImage, bCube );                    Cudd_Ref( bImage );
-        Cudd_RecursiveDeref( dd, bTemp );
-        Cudd_RecursiveDeref( dd, bCube );
-    }
-
-    if ( fReorder )
-    {
-    if ( fVerbose )
-    Abc_Print( 1, "        Reordering... Before =%5d. ", Cudd_DagSize(bImage) );
-    Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 100 );
-    if ( fVerbose )
-    Abc_Print( 1, "After =%5d. ", Cudd_DagSize(bImage) );
-//    Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 100 );
-//    Abc_Print( 1, "After =%5d.  ", Cudd_DagSize(bImage) );
-    if ( fVerbose )
-    Abc_PrintTime( 1, "Time", clock() - clk0 );
-//    Abc_Print( 1, "\n" );
-    }
-
-    Cudd_Deref( bImage );
-    return bImage;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb3Image.c b/src/aig/llb/llb3Image.c
deleted file mode 100644
index 09f2700c..00000000
--- a/src/aig/llb/llb3Image.c
+++ /dev/null
@@ -1,1093 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb3Image.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Computes image using partitioned structure.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb3Image.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Llb_Var_t_ Llb_Var_t;
-struct Llb_Var_t_ 
-{
-    int           iVar;      // variable number
-    int           nScore;    // variable score
-    Vec_Int_t *   vParts;    // partitions
-};
-
-typedef struct Llb_Prt_t_ Llb_Prt_t;
-struct Llb_Prt_t_ 
-{
-    int           iPart;     // partition number
-    int           nSize;     // the number of BDD nodes
-    DdNode *      bFunc;     // the partition
-    Vec_Int_t *   vVars;     // support
-};
-
-typedef struct Llb_Mgr_t_ Llb_Mgr_t;
-struct Llb_Mgr_t_
-{
-    Aig_Man_t *   pAig;      // AIG manager
-    Vec_Ptr_t *   vLeaves;   // leaves in the AIG manager
-    Vec_Ptr_t *   vRoots;    // roots in the AIG manager
-    DdManager *   dd;        // working BDD manager
-    int *         pVars2Q;   // variables to quantify
-    // internal
-    Llb_Prt_t **  pParts;    // partitions
-    Llb_Var_t **  pVars;     // variables
-    int           iPartFree; // next free partition
-    int           nVars;     // the number of BDD variables
-    int           nSuppMax;  // maximum support size
-    // temporary
-    int *         pSupp;     // temporary support storage
-};
-
-static inline Llb_Var_t * Llb_MgrVar( Llb_Mgr_t * p, int i )   { return p->pVars[i];  }
-static inline Llb_Prt_t * Llb_MgrPart( Llb_Mgr_t * p, int i )  { return p->pParts[i]; }
-
-// iterator over vars
-#define Llb_MgrForEachVar( p, pVar, i )     \
-    for ( i = 0; (i < p->nVars) && (((pVar) = Llb_MgrVar(p, i)), 1); i++ ) if ( pVar == NULL ) {} else
-// iterator over parts
-#define Llb_MgrForEachPart( p, pPart, i )   \
-    for ( i = 0; (i < p->iPartFree) && (((pPart) = Llb_MgrPart(p, i)), 1); i++ ) if ( pPart == NULL ) {} else
-
-// iterator over vars of one partition
-#define Llb_PartForEachVar( p, pPart, pVar, i )   \
-    for ( i = 0; (i < Vec_IntSize(pPart->vVars)) && (((pVar) = Llb_MgrVar(p, Vec_IntEntry(pPart->vVars,i))), 1); i++ )
-// iterator over parts of one variable
-#define Llb_VarForEachPart( p, pVar, pPart, i )   \
-    for ( i = 0; (i < Vec_IntSize(pVar->vParts)) && (((pPart) = Llb_MgrPart(p, Vec_IntEntry(pVar->vParts,i))), 1); i++ )
-
-// statistics
-int timeBuild, timeAndEx, timeOther;
-int nSuppMax;
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Removes one variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinRemoveVar( Llb_Mgr_t * p, Llb_Var_t * pVar )
-{
-    assert( p->pVars[pVar->iVar] == pVar );
-    p->pVars[pVar->iVar] = NULL;
-    Vec_IntFree( pVar->vParts );
-    ABC_FREE( pVar );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes one partition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinRemovePart( Llb_Mgr_t * p, Llb_Prt_t * pPart )
-{
-    assert( p->pParts[pPart->iPart] == pPart );
-    p->pParts[pPart->iPart] = NULL;
-    Vec_IntFree( pPart->vVars );
-    Cudd_RecursiveDeref( p->dd, pPart->bFunc );
-    ABC_FREE( pPart );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Create cube with singleton variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_NonlinCreateCube1( Llb_Mgr_t * p, Llb_Prt_t * pPart )
-{
-    DdNode * bCube, * bTemp;
-    Llb_Var_t * pVar;
-    int i, TimeStop;
-    TimeStop = p->dd->TimeStop; p->dd->TimeStop = 0;
-    bCube = Cudd_ReadOne(p->dd);   Cudd_Ref( bCube );
-    Llb_PartForEachVar( p, pPart, pVar, i )
-    {
-        assert( Vec_IntSize(pVar->vParts) > 0 );
-        if ( Vec_IntSize(pVar->vParts) != 1 )
-            continue;
-        assert( Vec_IntEntry(pVar->vParts, 0) == pPart->iPart );
-        bCube = Cudd_bddAnd( p->dd, bTemp = bCube, Cudd_bddIthVar(p->dd, pVar->iVar) );    Cudd_Ref( bCube );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-    }
-    Cudd_Deref( bCube );
-    p->dd->TimeStop = TimeStop;
-    return bCube;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Create cube of variables appearing only in two partitions.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_NonlinCreateCube2( Llb_Mgr_t * p, Llb_Prt_t * pPart1, Llb_Prt_t * pPart2 )
-{
-    DdNode * bCube, * bTemp;
-    Llb_Var_t * pVar;
-    int i, TimeStop;
-    TimeStop = p->dd->TimeStop; p->dd->TimeStop = 0;
-    bCube = Cudd_ReadOne(p->dd);   Cudd_Ref( bCube );
-    Llb_PartForEachVar( p, pPart1, pVar, i )
-    {
-        assert( Vec_IntSize(pVar->vParts) > 0 );
-        if ( Vec_IntSize(pVar->vParts) != 2 )
-            continue;
-        if ( (Vec_IntEntry(pVar->vParts, 0) == pPart1->iPart && Vec_IntEntry(pVar->vParts, 1) == pPart2->iPart) ||
-             (Vec_IntEntry(pVar->vParts, 0) == pPart2->iPart && Vec_IntEntry(pVar->vParts, 1) == pPart1->iPart) )
-        {
-            bCube = Cudd_bddAnd( p->dd, bTemp = bCube, Cudd_bddIthVar(p->dd, pVar->iVar) );   Cudd_Ref( bCube );
-            Cudd_RecursiveDeref( p->dd, bTemp );
-        }
-    }
-    Cudd_Deref( bCube );
-    p->dd->TimeStop = TimeStop;
-    return bCube;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if partition has singleton variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_NonlinHasSingletonVars( Llb_Mgr_t * p, Llb_Prt_t * pPart )
-{
-    Llb_Var_t * pVar;
-    int i;
-    Llb_PartForEachVar( p, pPart, pVar, i )
-        if ( Vec_IntSize(pVar->vParts) == 1 )
-            return 1;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if partition has singleton variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinPrint( Llb_Mgr_t * p )
-{
-    Llb_Prt_t * pPart;
-    Llb_Var_t * pVar;
-    int i, k;
-    printf( "\n" );
-    Llb_MgrForEachVar( p, pVar, i )
-    {
-        printf( "Var %3d : ", i );
-        Llb_VarForEachPart( p, pVar, pPart, k )
-            printf( "%d ", pPart->iPart );
-        printf( "\n" );
-    }
-    Llb_MgrForEachPart( p, pPart, i )
-    {
-        printf( "Part %3d : ", i );
-        Llb_PartForEachVar( p, pPart, pVar, k )
-            printf( "%d ", pVar->iVar );
-        printf( "\n" );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Quantifies singles belonging to one partition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_NonlinQuantify1( Llb_Mgr_t * p, Llb_Prt_t * pPart, int fSubset )
-{
-    Llb_Var_t * pVar;
-    Llb_Prt_t * pTemp;
-    Vec_Ptr_t * vSingles;
-    DdNode * bCube, * bTemp;
-    int i, RetValue, nSizeNew;
-    if ( fSubset )
-    {        
-        int Length;
-//        int nSuppSize = Cudd_SupportSize( p->dd, pPart->bFunc );
-//        pPart->bFunc = Cudd_SubsetHeavyBranch( p->dd, bTemp = pPart->bFunc, nSuppSize, 3*pPart->nSize/4 );  Cudd_Ref( pPart->bFunc );
-        pPart->bFunc = Cudd_LargestCube( p->dd, bTemp = pPart->bFunc, &Length );  Cudd_Ref( pPart->bFunc );
-
-        printf( "Subsetting %3d : ", pPart->iPart );
-        printf( "(Supp =%3d  Node =%5d) -> ", Cudd_SupportSize(p->dd, bTemp),        Cudd_DagSize(bTemp) );
-        printf( "(Supp =%3d  Node =%5d)\n",   Cudd_SupportSize(p->dd, pPart->bFunc), Cudd_DagSize(pPart->bFunc) );
-
-        RetValue = (Cudd_DagSize(bTemp) == Cudd_DagSize(pPart->bFunc));
-
-        Cudd_RecursiveDeref( p->dd, bTemp );
-
-        if ( RetValue )
-            return 1;
-    }
-    else
-    {
-        // create cube to be quantified
-        bCube = Llb_NonlinCreateCube1( p, pPart );   Cudd_Ref( bCube );
-//        assert( !Cudd_IsConstant(bCube) );
-        // derive new function
-        pPart->bFunc = Cudd_bddExistAbstract( p->dd, bTemp = pPart->bFunc, bCube );  Cudd_Ref( pPart->bFunc );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-        Cudd_RecursiveDeref( p->dd, bCube );
-    }
-    // get support
-    vSingles = Vec_PtrAlloc( 0 );
-    nSizeNew = Cudd_DagSize(pPart->bFunc);
-    Extra_SupportArray( p->dd, pPart->bFunc, p->pSupp );
-    Llb_PartForEachVar( p, pPart, pVar, i )
-        if ( p->pSupp[pVar->iVar] )
-        {
-            assert( Vec_IntSize(pVar->vParts) > 1 );
-            pVar->nScore -= pPart->nSize - nSizeNew;
-        }
-        else
-        {
-            RetValue = Vec_IntRemove( pVar->vParts, pPart->iPart );
-            assert( RetValue );
-            pVar->nScore -= pPart->nSize;
-            if ( Vec_IntSize(pVar->vParts) == 0 )
-                Llb_NonlinRemoveVar( p, pVar );
-            else if ( Vec_IntSize(pVar->vParts) == 1 )
-                Vec_PtrPushUnique( vSingles, Llb_MgrPart(p, Vec_IntEntry(pVar->vParts,0)) );
-        }
-
-    // update partition
-    pPart->nSize = nSizeNew;
-    Vec_IntClear( pPart->vVars );
-    for ( i = 0; i < p->nVars; i++ )
-        if ( p->pSupp[i] && p->pVars2Q[i] )
-            Vec_IntPush( pPart->vVars, i );
-    // remove other variables
-    Vec_PtrForEachEntry( Llb_Prt_t *, vSingles, pTemp, i )
-        Llb_NonlinQuantify1( p, pTemp, 0 );
-    Vec_PtrFree( vSingles );
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Quantifies singles belonging to one partition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_NonlinQuantify2( Llb_Mgr_t * p, Llb_Prt_t * pPart1, Llb_Prt_t * pPart2, int Limit, int TimeOut )
-{
-    int fVerbose = 0;
-    Llb_Var_t * pVar;
-    Llb_Prt_t * pTemp;
-    Vec_Ptr_t * vSingles;
-    DdNode * bCube, * bFunc;
-    int i, RetValue, nSuppSize;
-    int iPart1 = pPart1->iPart;
-    int iPart2 = pPart2->iPart;
-
-    // create cube to be quantified
-    bCube = Llb_NonlinCreateCube2( p, pPart1, pPart2 );   Cudd_Ref( bCube );
-if ( fVerbose )
-{
-printf( "\n" );
-printf( "\n" );
-Llb_NonlinPrint( p );
-printf( "Conjoining partitions %d and %d.\n", pPart1->iPart, pPart2->iPart );
-Extra_bddPrintSupport( p->dd, bCube );  printf( "\n" );
-}
- 
-    // derive new function
-//    bFunc = Cudd_bddAndAbstract( p->dd, pPart1->bFunc, pPart2->bFunc, bCube );  Cudd_Ref( bFunc );
-/*
-    bFunc = Cudd_bddAndAbstractLimit( p->dd, pPart1->bFunc, pPart2->bFunc, bCube, Limit );  
-    if ( bFunc == NULL )
-    {
-        int RetValue;
-        Cudd_RecursiveDeref( p->dd, bCube );
-        if ( pPart1->nSize < pPart2->nSize )
-            RetValue = Llb_NonlinQuantify1( p, pPart1, 1 );
-        else
-            RetValue = Llb_NonlinQuantify1( p, pPart2, 1 );
-        if ( RetValue )
-            Limit = Limit + 1000;
-        Llb_NonlinQuantify2( p, pPart1, pPart2, Limit, TimeOut );
-        return 0;
-    }
-    Cudd_Ref( bFunc );
-*/
-
-//    bFunc = Extra_bddAndAbstractTime( p->dd, pPart1->bFunc, pPart2->bFunc, bCube, TimeOut );  
-    bFunc = Cudd_bddAndAbstract( p->dd, pPart1->bFunc, pPart2->bFunc, bCube );  
-    if ( bFunc == NULL )
-    {
-        Cudd_RecursiveDeref( p->dd, bCube );
-        return 0;
-    }
-    Cudd_Ref( bFunc );
-    Cudd_RecursiveDeref( p->dd, bCube );
-
-    // create new partition
-    pTemp = p->pParts[p->iPartFree] = ABC_CALLOC( Llb_Prt_t, 1 );
-    pTemp->iPart = p->iPartFree++;
-    pTemp->nSize = Cudd_DagSize(bFunc);
-    pTemp->bFunc = bFunc;
-    pTemp->vVars = Vec_IntAlloc( 8 );
-    // update variables
-    Llb_PartForEachVar( p, pPart1, pVar, i )
-    {
-        RetValue = Vec_IntRemove( pVar->vParts, pPart1->iPart );
-        assert( RetValue );
-        pVar->nScore -= pPart1->nSize;
-    }
-    // update variables
-    Llb_PartForEachVar( p, pPart2, pVar, i )
-    {
-        RetValue = Vec_IntRemove( pVar->vParts, pPart2->iPart );
-        assert( RetValue );
-        pVar->nScore -= pPart2->nSize;
-    }
-    // add variables to the new partition
-    nSuppSize = 0;
-    Extra_SupportArray( p->dd, bFunc, p->pSupp );
-    for ( i = 0; i < p->nVars; i++ )
-    {
-        nSuppSize += p->pSupp[i];
-        if ( p->pSupp[i] && p->pVars2Q[i] )
-        {
-            pVar = Llb_MgrVar( p, i );
-            pVar->nScore += pTemp->nSize;
-            Vec_IntPush( pVar->vParts, pTemp->iPart );
-            Vec_IntPush( pTemp->vVars, i );
-        }
-    }
-    p->nSuppMax = ABC_MAX( p->nSuppMax, nSuppSize ); 
-    // remove variables and collect partitions with singleton variables
-    vSingles = Vec_PtrAlloc( 0 );
-    Llb_PartForEachVar( p, pPart1, pVar, i )
-    {
-        if ( Vec_IntSize(pVar->vParts) == 0 )
-            Llb_NonlinRemoveVar( p, pVar );
-        else if ( Vec_IntSize(pVar->vParts) == 1 )
-        {
-            if ( fVerbose )
-                printf( "Adding partition %d because of var %d.\n", 
-                    Llb_MgrPart(p, Vec_IntEntry(pVar->vParts,0))->iPart, pVar->iVar );
-            Vec_PtrPushUnique( vSingles, Llb_MgrPart(p, Vec_IntEntry(pVar->vParts,0)) );
-        }
-    }
-    Llb_PartForEachVar( p, pPart2, pVar, i )
-    {
-        if ( pVar == NULL )
-            continue;
-        if ( Vec_IntSize(pVar->vParts) == 0 )
-            Llb_NonlinRemoveVar( p, pVar );
-        else if ( Vec_IntSize(pVar->vParts) == 1 )
-        {
-            if ( fVerbose )
-                printf( "Adding partition %d because of var %d.\n", 
-                    Llb_MgrPart(p, Vec_IntEntry(pVar->vParts,0))->iPart, pVar->iVar );
-            Vec_PtrPushUnique( vSingles, Llb_MgrPart(p, Vec_IntEntry(pVar->vParts,0)) );
-        }
-    }
-    // remove partitions
-    Llb_NonlinRemovePart( p, pPart1 );
-    Llb_NonlinRemovePart( p, pPart2 );
-    // remove other variables
-if ( fVerbose )
-Llb_NonlinPrint( p );
-    Vec_PtrForEachEntry( Llb_Prt_t *, vSingles, pTemp, i )
-    {
-if ( fVerbose )
-printf( "Updating partitiong %d with singlton vars.\n", pTemp->iPart );
-        Llb_NonlinQuantify1( p, pTemp, 0 );
-    }
-if ( fVerbose )
-Llb_NonlinPrint( p );
-    Vec_PtrFree( vSingles );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes volume of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinCutNodes_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vNodes )
-{
-    if ( Aig_ObjIsTravIdCurrent(p, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent(p, pObj);
-    if ( Saig_ObjIsLi(p, pObj) )
-    {
-        Llb_NonlinCutNodes_rec(p, Aig_ObjFanin0(pObj), vNodes);
-        return;
-    }
-    if ( Aig_ObjIsConst1(pObj) )
-        return;
-    assert( Aig_ObjIsNode(pObj) );
-    Llb_NonlinCutNodes_rec(p, Aig_ObjFanin0(pObj), vNodes);
-    Llb_NonlinCutNodes_rec(p, Aig_ObjFanin1(pObj), vNodes);
-    Vec_PtrPush( vNodes, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes volume of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_NonlinCutNodes( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper )
-{
-    Vec_Ptr_t * vNodes;
-    Aig_Obj_t * pObj;
-    int i;
-    // mark the lower cut with the traversal ID
-    Aig_ManIncrementTravId(p);
-    Vec_PtrForEachEntry( Aig_Obj_t *, vLower, pObj, i )
-        Aig_ObjSetTravIdCurrent( p, pObj );
-    // count the upper cut
-    vNodes = Vec_PtrAlloc( 100 );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vUpper, pObj, i )
-        Llb_NonlinCutNodes_rec( p, pObj, vNodes );
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns array of BDDs for the roots in terms of the leaves.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_NonlinBuildBdds( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper, DdManager * dd, int TimeOut )
-{
-    Vec_Ptr_t * vNodes, * vResult;
-    Aig_Obj_t * pObj;
-    DdNode * bBdd0, * bBdd1, * bProd;
-    int i, k;
-
-    Aig_ManConst1(p)->pData = Cudd_ReadOne( dd );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vLower, pObj, i )
-        pObj->pData = Cudd_bddIthVar( dd, Aig_ObjId(pObj) );
-
-    vNodes = Llb_NonlinCutNodes( p, vLower, vUpper );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-    {
-        bBdd0 = Cudd_NotCond( (DdNode *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-        bBdd1 = Cudd_NotCond( (DdNode *)Aig_ObjFanin1(pObj)->pData, Aig_ObjFaninC1(pObj) );
-//        pObj->pData = Extra_bddAndTime( dd, bBdd0, bBdd1, TimeOut );
-        pObj->pData = Cudd_bddAnd( dd, bBdd0, bBdd1 );
-        if ( pObj->pData == NULL )
-        {
-            Vec_PtrForEachEntryStop( Aig_Obj_t *, vNodes, pObj, k, i )
-                if ( pObj->pData )
-                    Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-            Vec_PtrFree( vNodes );
-            return NULL;
-        }
-        Cudd_Ref( (DdNode *)pObj->pData );
-    }
-
-    vResult = Vec_PtrAlloc( 100 );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vUpper, pObj, i )
-    {
-        if ( Aig_ObjIsNode(pObj) )
-        {
-            bProd = Cudd_bddXnor( dd, Cudd_bddIthVar(dd, Aig_ObjId(pObj)), (DdNode *)pObj->pData );  Cudd_Ref( bProd );
-        }
-        else
-        {
-            assert( Saig_ObjIsLi(p, pObj) );
-            bBdd0 = Cudd_NotCond( (DdNode *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-            bProd = Cudd_bddXnor( dd, Cudd_bddIthVar(dd, Aig_ObjId(pObj)), bBdd0 );                  Cudd_Ref( bProd );
-        }
-        Vec_PtrPush( vResult, bProd );
-    }
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-        Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-
-    Vec_PtrFree( vNodes );
-    return vResult;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts non-linear quantification scheduling.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinAddPair( Llb_Mgr_t * p, DdNode * bFunc, int iPart, int iVar )
-{
-    if ( p->pVars[iVar] == NULL )
-    {
-        p->pVars[iVar] = ABC_CALLOC( Llb_Var_t, 1 );
-        p->pVars[iVar]->iVar   = iVar;
-        p->pVars[iVar]->nScore = 0;
-        p->pVars[iVar]->vParts = Vec_IntAlloc( 8 );
-    }
-    Vec_IntPush( p->pVars[iVar]->vParts, iPart );
-    Vec_IntPush( p->pParts[iPart]->vVars, iVar );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts non-linear quantification scheduling.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinAddPartition( Llb_Mgr_t * p, int i, DdNode * bFunc )
-{
-    int k, nSuppSize;
-    assert( !Cudd_IsConstant(bFunc) );
-    // create partition
-    p->pParts[i] = ABC_CALLOC( Llb_Prt_t, 1 );
-    p->pParts[i]->iPart = i;
-    p->pParts[i]->bFunc = bFunc;
-    p->pParts[i]->vVars = Vec_IntAlloc( 8 );
-    // add support dependencies
-    nSuppSize = 0;
-    Extra_SupportArray( p->dd, bFunc, p->pSupp );
-    for ( k = 0; k < p->nVars; k++ )
-    {
-        nSuppSize += p->pSupp[k];
-        if ( p->pSupp[k] && p->pVars2Q[k] )
-            Llb_NonlinAddPair( p, bFunc, i, k );
-    }
-    p->nSuppMax = ABC_MAX( p->nSuppMax, nSuppSize ); 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts non-linear quantification scheduling.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_NonlinStart( Llb_Mgr_t * p, int TimeOut )
-{
-    Vec_Ptr_t * vRootBdds;
-    DdNode * bFunc;
-    int i;
-    // create and collect BDDs
-    vRootBdds = Llb_NonlinBuildBdds( p->pAig, p->vLeaves, p->vRoots, p->dd, TimeOut ); // come referenced
-    if ( vRootBdds == NULL )
-        return 0;
-    // add pairs (refs are consumed inside)
-    Vec_PtrForEachEntry( DdNode *, vRootBdds, bFunc, i )
-        Llb_NonlinAddPartition( p, i, bFunc );
-    Vec_PtrFree( vRootBdds );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks that each var appears in at least one partition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-**********************************************************************/
-void Llb_NonlinCheckVars( Llb_Mgr_t * p )
-{
-    Llb_Var_t * pVar;
-    int i;
-    Llb_MgrForEachVar( p, pVar, i )
-        assert( Vec_IntSize(pVar->vParts) > 1 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find next partition to quantify]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_NonlinNextPartitions( Llb_Mgr_t * p, Llb_Prt_t ** ppPart1, Llb_Prt_t ** ppPart2 )
-{
-    Llb_Var_t * pVar, * pVarBest = NULL;
-    Llb_Prt_t * pPart, * pPart1Best = NULL, * pPart2Best = NULL;
-    int i;
-    Llb_NonlinCheckVars( p );
-    // find variable with minimum score
-    Llb_MgrForEachVar( p, pVar, i )
-        if ( pVarBest == NULL || pVarBest->nScore > pVar->nScore )
-            pVarBest = pVar;
-    if ( pVarBest == NULL )
-        return 0;
-    // find two partitions with minimum size
-    Llb_VarForEachPart( p, pVarBest, pPart, i )
-    {
-        if ( pPart1Best == NULL )
-            pPart1Best = pPart;
-        else if ( pPart2Best == NULL )
-            pPart2Best = pPart;
-        else if ( pPart1Best->nSize > pPart->nSize || pPart2Best->nSize > pPart->nSize )
-        {
-            if ( pPart1Best->nSize > pPart2Best->nSize )
-                pPart1Best = pPart;
-            else
-                pPart2Best = pPart;
-        }
-    }
-    *ppPart1 = pPart1Best;
-    *ppPart2 = pPart2Best;
-    return 1; 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reorders BDDs in the working manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinReorder( DdManager * dd, int fTwice, int fVerbose )
-{
-    int clk = clock();
-    if ( fVerbose )
-        Abc_Print( 1, "Reordering... Before =%5d. ", Cudd_ReadKeys(dd) - Cudd_ReadDead(dd) );
-    Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 100 );
-    if ( fVerbose )
-        Abc_Print( 1, "After =%5d. ", Cudd_ReadKeys(dd) - Cudd_ReadDead(dd) );
-    if ( fTwice )
-    {
-        Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 100 );
-        if ( fVerbose )
-            Abc_Print( 1, "After =%5d. ", Cudd_ReadKeys(dd) - Cudd_ReadDead(dd) );
-    }
-    if ( fVerbose )
-        Abc_PrintTime( 1, "Time", clock() - clk );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recomputes scores after variable reordering.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinRecomputeScores( Llb_Mgr_t * p )
-{
-    Llb_Prt_t * pPart;
-    Llb_Var_t * pVar;
-    int i, k;
-    Llb_MgrForEachPart( p, pPart, i )
-        pPart->nSize = Cudd_DagSize(pPart->bFunc);
-    Llb_MgrForEachVar( p, pVar, i )
-    {
-        pVar->nScore = 0;
-        Llb_VarForEachPart( p, pVar, pPart, k )
-            pVar->nScore += pPart->nSize;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recomputes scores after variable reordering.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinVerifyScores( Llb_Mgr_t * p )
-{
-    Llb_Prt_t * pPart;
-    Llb_Var_t * pVar;
-    int i, k, nScore;
-    Llb_MgrForEachPart( p, pPart, i )
-        assert( pPart->nSize == Cudd_DagSize(pPart->bFunc) );
-    Llb_MgrForEachVar( p, pVar, i )
-    {
-        nScore = 0;
-        Llb_VarForEachPart( p, pVar, pPart, k )
-            nScore += pPart->nSize;
-        assert( nScore == pVar->nScore );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts non-linear quantification scheduling.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Mgr_t * Llb_NonlinAlloc( Aig_Man_t * pAig, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vRoots, int * pVars2Q, DdManager * dd )
-{
-    Llb_Mgr_t * p;
-    p = ABC_CALLOC( Llb_Mgr_t, 1 );
-    p->pAig      = pAig;
-    p->vLeaves   = vLeaves;
-    p->vRoots    = vRoots;
-    p->dd        = dd;
-    p->pVars2Q   = pVars2Q;
-    p->nVars     = Cudd_ReadSize(dd);
-    p->iPartFree = Vec_PtrSize(vRoots);
-    p->pVars     = ABC_CALLOC( Llb_Var_t *, p->nVars );
-    p->pParts    = ABC_CALLOC( Llb_Prt_t *, 2 * p->iPartFree + 2 );
-    p->pSupp     = ABC_ALLOC( int, Cudd_ReadSize(dd) );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops non-linear quantification scheduling.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinFree( Llb_Mgr_t * p )
-{
-    Llb_Prt_t * pPart;
-    Llb_Var_t * pVar;
-    int i;
-    Llb_MgrForEachVar( p, pVar, i )
-        Llb_NonlinRemoveVar( p, pVar );
-    Llb_MgrForEachPart( p, pPart, i )
-        Llb_NonlinRemovePart( p, pPart );
-    ABC_FREE( p->pVars );
-    ABC_FREE( p->pParts );
-    ABC_FREE( p->pSupp );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs image computation.]
-
-  Description [Computes image of BDDs (vFuncs).]
-               
-  SideEffects [BDDs in vFuncs are derefed inside. The result is refed.]
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_NonlinImage( Aig_Man_t * pAig, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vRoots, int * pVars2Q, 
-    DdManager * dd, DdNode * bCurrent, int fReorder, int fVerbose, int * pOrder, int Limit, int TimeOut )
-{
-    Llb_Prt_t * pPart, * pPart1, * pPart2;
-    Llb_Mgr_t * p;
-    DdNode * bFunc, * bTemp;
-    int i, nReorders, timeInside;
-    int clk = clock(), clk2;
-    // start the manager
-    clk2 = clock();
-    p = Llb_NonlinAlloc( pAig, vLeaves, vRoots, pVars2Q, dd );
-    if ( !Llb_NonlinStart( p, TimeOut ) )
-    {
-        Llb_NonlinFree( p );
-        return NULL;
-    }
-    // add partition
-    Llb_NonlinAddPartition( p, p->iPartFree++, bCurrent );
-    // remove singles
-    Llb_MgrForEachPart( p, pPart, i )
-        if ( Llb_NonlinHasSingletonVars(p, pPart) )
-            Llb_NonlinQuantify1( p, pPart, 0 );
-    timeBuild += clock() - clk2;
-    timeInside = clock() - clk2;
-    // compute scores
-    Llb_NonlinRecomputeScores( p );
-    // save permutation
-    if ( pOrder )
-    memcpy( pOrder, dd->invperm, sizeof(int) * dd->size );
-    // iteratively quantify variables
-    while ( Llb_NonlinNextPartitions(p, &pPart1, &pPart2) )
-    {
-        clk2 = clock();
-        nReorders = Cudd_ReadReorderings(dd);
-        if ( !Llb_NonlinQuantify2( p, pPart1, pPart2, Limit, TimeOut ) )
-        {
-            Llb_NonlinFree( p );
-            return NULL;
-        }
-        timeAndEx  += clock() - clk2;
-        timeInside += clock() - clk2;
-        if ( nReorders < Cudd_ReadReorderings(dd) )
-            Llb_NonlinRecomputeScores( p );
-//        else
-//            Llb_NonlinVerifyScores( p );
-    }
-    // load partitions
-    bFunc = Cudd_ReadOne(p->dd);   Cudd_Ref( bFunc );
-    Llb_MgrForEachPart( p, pPart, i )
-    {
-        bFunc = Cudd_bddAnd( p->dd, bTemp = bFunc, pPart->bFunc );   Cudd_Ref( bFunc );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-    }
-    nSuppMax = p->nSuppMax;
-    Llb_NonlinFree( p );
-    // reorder variables
-    if ( fReorder )
-        Llb_NonlinReorder( dd, 0, fVerbose );
-    timeOther += clock() - clk - timeInside;
-    // return
-    Cudd_Deref( bFunc );
-    return bFunc;
-}
-
-
-
-static Llb_Mgr_t * p = NULL;
-
-/**Function*************************************************************
-
-  Synopsis    [Starts image computation manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdManager * Llb_NonlinImageStart( Aig_Man_t * pAig, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vRoots, int * pVars2Q, int * pOrder, int fFirst, int TimeTarget )
-{
-    DdManager * dd;
-    int clk = clock();
-    assert( p == NULL );
-    // start a new manager (disable reordering)
-    dd = Cudd_Init( Aig_ManObjNumMax(pAig), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    dd->TimeStop = TimeTarget;
-    Cudd_ShuffleHeap( dd, pOrder );
-//    if ( fFirst )
-        Cudd_AutodynEnable( dd,  CUDD_REORDER_SYMM_SIFT );
-    // start the manager
-    p = Llb_NonlinAlloc( pAig, vLeaves, vRoots, pVars2Q, dd );
-    if ( !Llb_NonlinStart( p, 0 ) )
-    {
-        Llb_NonlinFree( p );
-        p = NULL;
-        return NULL;
-    }
-    timeBuild += clock() - clk;
-//    if ( !fFirst )
-//        Cudd_AutodynEnable( dd,  CUDD_REORDER_SYMM_SIFT );
-    return dd;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs image computation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_NonlinImageCompute( DdNode * bCurrent, int fReorder, int fDrop, int fVerbose, int * pOrder )
-{
-    Llb_Prt_t * pPart, * pPart1, * pPart2;
-    DdNode * bFunc, * bTemp;
-    int i, nReorders, timeInside = 0;
-    int clk = clock(), clk2;
-
-    // add partition
-    Llb_NonlinAddPartition( p, p->iPartFree++, bCurrent );
-    // remove singles
-    Llb_MgrForEachPart( p, pPart, i )
-        if ( Llb_NonlinHasSingletonVars(p, pPart) )
-            Llb_NonlinQuantify1( p, pPart, 0 );
-    // reorder
-    if ( fReorder )
-        Llb_NonlinReorder( p->dd, 0, 0 );
-    // save permutation
-    memcpy( pOrder, p->dd->invperm, sizeof(int) * p->dd->size );
-
-    // compute scores
-    Llb_NonlinRecomputeScores( p );
-    // iteratively quantify variables
-    while ( Llb_NonlinNextPartitions(p, &pPart1, &pPart2) )
-    {
-        clk2 = clock();
-        nReorders = Cudd_ReadReorderings(p->dd);
-        if ( !Llb_NonlinQuantify2( p, pPart1, pPart2, 0, 0 ) )
-        {
-            Llb_NonlinFree( p );
-            return NULL;
-        }
-        timeAndEx  += clock() - clk2;
-        timeInside += clock() - clk2;
-        if ( nReorders < Cudd_ReadReorderings(p->dd) )
-            Llb_NonlinRecomputeScores( p );
-//        else
-//            Llb_NonlinVerifyScores( p );
-    }
-    // load partitions
-    bFunc = Cudd_ReadOne(p->dd);   Cudd_Ref( bFunc );
-    Llb_MgrForEachPart( p, pPart, i )
-    {
-        bFunc = Cudd_bddAnd( p->dd, bTemp = bFunc, pPart->bFunc );
-        if ( bFunc == NULL )
-        {
-            Cudd_RecursiveDeref( p->dd, bTemp );
-            Llb_NonlinFree( p );
-            return NULL;
-        }
-        Cudd_Ref( bFunc );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-    }
-    nSuppMax = p->nSuppMax;
-    // reorder variables
-//    if ( fReorder )
-//        Llb_NonlinReorder( p->dd, 0, fVerbose );
-    // save permutation
-//    memcpy( pOrder, p->dd->invperm, sizeof(int) * Cudd_ReadSize(p->dd) );
-
-    timeOther += clock() - clk - timeInside;
-    // return
-    Cudd_Deref( bFunc );
-    return bFunc;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Quits image computation manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinImageQuit()
-{
-    DdManager * dd;
-    if ( p == NULL )
-        return;
-    dd = p->dd;
-    Llb_NonlinFree( p );
-    if ( dd->bFunc )
-        Cudd_RecursiveDeref( dd, dd->bFunc );
-    Extra_StopManager( dd );
-//    Cudd_Quit ( dd );
-    p = NULL;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb3Nonlin.c b/src/aig/llb/llb3Nonlin.c
deleted file mode 100644
index e20a1541..00000000
--- a/src/aig/llb/llb3Nonlin.c
+++ /dev/null
@@ -1,871 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb2Nonlin.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Non-linear quantification scheduling.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb2Nonlin.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
- 
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Llb_Mnn_t_ Llb_Mnn_t;
-struct Llb_Mnn_t_
-{
-    Aig_Man_t *     pInit;          // AIG manager
-    Aig_Man_t *     pAig;           // AIG manager
-    Gia_ParLlb_t *  pPars;          // parameters
-
-    DdManager *     dd;             // BDD manager
-    DdManager *     ddG;            // BDD manager
-    DdManager *     ddR;            // BDD manager
-    Vec_Ptr_t *     vRings;         // onion rings in ddR
-
-    Vec_Ptr_t *     vLeaves;        
-    Vec_Ptr_t *     vRoots;
-    int *           pVars2Q;
-    int *           pOrderL;
-    int *           pOrderL2;
-    int *           pOrderG;
-
-    Vec_Int_t *     vCs2Glo;        // cur state variables into global variables
-    Vec_Int_t *     vNs2Glo;        // next state variables into global variables
-    Vec_Int_t *     vGlo2Cs;        // global variables into cur state variables
-    Vec_Int_t *     vGlo2Ns;        // global variables into next state variables
-
-    int             ddLocReos;
-    int             ddLocGrbs;
-
-    int             timeImage;
-    int             timeTran1;
-    int             timeTran2;
-    int             timeGloba;
-    int             timeOther;
-    int             timeTotal;
-    int             timeReo;
-    int             timeReoG;
-
-};
-
-extern int timeBuild, timeAndEx, timeOther;
-extern int nSuppMax;
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Finds variable whose 0-cofactor is the smallest.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_NonlinFindBestVar( DdManager * dd, DdNode * bFunc, Aig_Man_t * pAig )
-{
-    int fVerbose = 0;
-    Aig_Obj_t * pObj;
-    DdNode * bCof, * bVar;
-    int i, iVar, iVarBest = -1, iValue, iValueBest = ABC_INFINITY, Size0Best = -1;
-    int Size, Size0, Size1;
-    int clk = clock();
-    Size = Cudd_DagSize(bFunc);
-//    printf( "Original = %6d.  SuppSize = %3d. Vars = %3d.\n", 
-//        Size = Cudd_DagSize(bFunc), Cudd_SupportSize(dd, bFunc), Aig_ManRegNum(pAig) );
-    Saig_ManForEachLo( pAig, pObj, i )
-    {
-        iVar = Aig_ObjId(pObj);
-
-if ( fVerbose )
-printf( "Var =%3d : ", iVar );
-        bVar = Cudd_bddIthVar(dd, iVar);
-
-        bCof = Cudd_bddAnd( dd, bFunc, Cudd_Not(bVar) );          Cudd_Ref( bCof );
-        Size0 = Cudd_DagSize(bCof);
-if ( fVerbose )
-printf( "Supp0 =%3d  ",  Cudd_SupportSize(dd, bCof) );
-if ( fVerbose )
-printf( "Size0 =%6d   ", Size0 );
-        Cudd_RecursiveDeref( dd, bCof );
-
-        bCof = Cudd_bddAnd( dd, bFunc, bVar );                    Cudd_Ref( bCof );
-        Size1 = Cudd_DagSize(bCof);
-if ( fVerbose )
-printf( "Supp1 =%3d  ",  Cudd_SupportSize(dd, bCof) );
-if ( fVerbose )
-printf( "Size1 =%6d   ", Size1 );
-        Cudd_RecursiveDeref( dd, bCof );
-
-        iValue = ABC_MAX(Size0, Size1) - ABC_MIN(Size0, Size1) + Size0 + Size1 - Size;
-if ( fVerbose )
-printf( "D =%6d  ", Size0 + Size1 - Size );
-if ( fVerbose )
-printf( "B =%6d  ", ABC_MAX(Size0, Size1) - ABC_MIN(Size0, Size1) );
-if ( fVerbose )
-printf( "S =%6d\n", iValue );
-        if ( Size0 > 1 && Size1 > 1 && iValueBest > iValue )
-        {
-            iValueBest = iValue;
-            iVarBest   = i;
-            Size0Best  = Size0;
-        }
-    }
-    printf( "BestVar = %4d/%4d.  Value =%6d.  Orig =%6d. Size0 =%6d. ", 
-        iVarBest, Aig_ObjId(Saig_ManLo(pAig,iVarBest)), iValueBest, Size, Size0Best );
-    Abc_PrintTime( 1, "Time", clock() - clk );
-    return iVarBest;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Finds variable whose 0-cofactor is the smallest.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinTrySubsetting( DdManager * dd, DdNode * bFunc )
-{
-    DdNode * bNew;
-    printf( "Original = %6d.  SuppSize = %3d.    ", 
-        Cudd_DagSize(bFunc), Cudd_SupportSize(dd, bFunc) );
-    bNew = Cudd_SubsetHeavyBranch( dd, bFunc, Cudd_SupportSize(dd, bFunc), 1000 );  Cudd_Ref( bNew );
-    printf( "Result   = %6d.  SuppSize = %3d.\n", 
-        Cudd_DagSize(bNew), Cudd_SupportSize(dd, bNew) );
-    Cudd_RecursiveDeref( dd, bNew );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinPrepareVarMap( Llb_Mnn_t * p )
-{
-    Aig_Obj_t * pObjLi, * pObjLo, * pObj;
-    int i, iVarLi, iVarLo;
-    p->vCs2Glo = Vec_IntStartFull( Aig_ManObjNumMax(p->pAig) );
-    p->vNs2Glo = Vec_IntStartFull( Aig_ManObjNumMax(p->pAig) );
-    p->vGlo2Cs = Vec_IntStartFull( Aig_ManRegNum(p->pAig) );
-    p->vGlo2Ns = Vec_IntStartFull( Aig_ManRegNum(p->pAig) );
-    Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-    {
-        iVarLi = Aig_ObjId(pObjLi);
-        iVarLo = Aig_ObjId(pObjLo);
-        assert( iVarLi >= 0 && iVarLi < Aig_ManObjNumMax(p->pAig) );
-        assert( iVarLo >= 0 && iVarLo < Aig_ManObjNumMax(p->pAig) );
-        Vec_IntWriteEntry( p->vCs2Glo, iVarLo, i );
-        Vec_IntWriteEntry( p->vNs2Glo, iVarLi, i );
-        Vec_IntWriteEntry( p->vGlo2Cs, i, iVarLo );
-        Vec_IntWriteEntry( p->vGlo2Ns, i, iVarLi );
-    }
-    // add mapping of the PIs
-    Saig_ManForEachPi( p->pAig, pObj, i )
-    {
-        Vec_IntWriteEntry( p->vCs2Glo, Aig_ObjId(pObj), Aig_ManRegNum(p->pAig)+i );
-        Vec_IntWriteEntry( p->vNs2Glo, Aig_ObjId(pObj), Aig_ManRegNum(p->pAig)+i );
-    }
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_NonlinComputeInitState( Aig_Man_t * pAig, DdManager * dd )
-{
-    Aig_Obj_t * pObj;
-    DdNode * bRes, * bVar, * bTemp;
-    int i, iVar, TimeStop;
-    TimeStop = dd->TimeStop;  dd->TimeStop = 0;
-    bRes = Cudd_ReadOne( dd );   Cudd_Ref( bRes );
-    Saig_ManForEachLo( pAig, pObj, i )
-    {
-        iVar = (Cudd_ReadSize(dd) == Aig_ManRegNum(pAig)) ? i : Aig_ObjId(pObj);
-        bVar = Cudd_bddIthVar( dd, iVar );
-        bRes = Cudd_bddAnd( dd, bTemp = bRes, Cudd_Not(bVar) );  Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( dd, bTemp );
-    }
-    Cudd_Deref( bRes );
-    dd->TimeStop = TimeStop;
-    return bRes;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Derives counter-example by backward reachability.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Abc_Cex_t * Llb_NonlinDeriveCex( Llb_Mnn_t * p )
-{
-    Abc_Cex_t * pCex;
-    Aig_Obj_t * pObj;
-    Vec_Int_t * vVarsNs;
-    DdNode * bState, * bImage, * bOneCube, * bTemp, * bRing;
-    int i, v, RetValue, nPiOffset;
-    char * pValues = ABC_ALLOC( char, Cudd_ReadSize(p->ddR) );
-    assert( Vec_PtrSize(p->vRings) > 0 );
-
-    p->dd->TimeStop  = 0;
-    p->ddR->TimeStop = 0;
-
-    // update quantifiable vars
-    memset( p->pVars2Q, 0, sizeof(int) * Cudd_ReadSize(p->dd) );
-    vVarsNs = Vec_IntAlloc( Aig_ManRegNum(p->pAig) );
-    Saig_ManForEachLi( p->pAig, pObj, i )
-    {
-        p->pVars2Q[Aig_ObjId(pObj)] = 1;
-        Vec_IntPush( vVarsNs, Aig_ObjId(pObj) );
-    }
-/*
-    Saig_ManForEachLo( p->pAig, pObj, i )
-        printf( "%d ", pObj->Id );
-    printf( "\n" );
-    Saig_ManForEachLi( p->pAig, pObj, i )
-        printf( "%d(%d) ", pObj->Id, Aig_ObjFaninId0(pObj) );
-    printf( "\n" );
-*/
-    // allocate room for the counter-example
-    pCex = Abc_CexAlloc( Saig_ManRegNum(p->pAig), Saig_ManPiNum(p->pAig), Vec_PtrSize(p->vRings) );
-    pCex->iFrame = Vec_PtrSize(p->vRings) - 1;
-    pCex->iPo = -1;
-
-    // get the last cube
-    bOneCube = Cudd_bddIntersect( p->ddR, (DdNode *)Vec_PtrEntryLast(p->vRings), p->ddR->bFunc );  Cudd_Ref( bOneCube );
-    RetValue = Cudd_bddPickOneCube( p->ddR, bOneCube, pValues );
-    Cudd_RecursiveDeref( p->ddR, bOneCube );
-    assert( RetValue );
-
-    // write PIs of counter-example
-    nPiOffset = Saig_ManRegNum(p->pAig) + Saig_ManPiNum(p->pAig) * (Vec_PtrSize(p->vRings) - 1);
-    Saig_ManForEachPi( p->pAig, pObj, i )
-        if ( pValues[Saig_ManRegNum(p->pAig)+i] == 1 )
-            Aig_InfoSetBit( pCex->pData, nPiOffset + i );
-
-    // write state in terms of NS variables
-    if ( Vec_PtrSize(p->vRings) > 1 )
-    {
-        bState = Llb_CoreComputeCube( p->dd, vVarsNs, 1, pValues );   Cudd_Ref( bState );
-    }
-    // perform backward analysis
-    Vec_PtrForEachEntryReverse( DdNode *, p->vRings, bRing, v )
-    { 
-        if ( v == Vec_PtrSize(p->vRings) - 1 )
-            continue;
-//Extra_bddPrintSupport( p->dd, bState );  printf( "\n" );
-//Extra_bddPrintSupport( p->dd, bRing );   printf( "\n" );
-        // compute the next states
-        bImage = Llb_NonlinImage( p->pAig, p->vLeaves, p->vRoots, p->pVars2Q, p->dd, bState, 
-            p->pPars->fReorder, p->pPars->fVeryVerbose, NULL, ABC_INFINITY, ABC_INFINITY ); // consumed reference
-        assert( bImage != NULL );
-        Cudd_Ref( bImage );
-//Extra_bddPrintSupport( p->dd, bImage );  printf( "\n" );
-
-        // move reached states into ring manager
-        bImage = Extra_TransferPermute( p->dd, p->ddR, bTemp = bImage, Vec_IntArray(p->vCs2Glo) );    Cudd_Ref( bImage );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-
-        // intersect with the previous set
-        bOneCube = Cudd_bddIntersect( p->ddR, bImage, bRing );                Cudd_Ref( bOneCube );
-        Cudd_RecursiveDeref( p->ddR, bImage );
-
-        // find any assignment of the BDD
-        RetValue = Cudd_bddPickOneCube( p->ddR, bOneCube, pValues );
-        Cudd_RecursiveDeref( p->ddR, bOneCube );
-        assert( RetValue );
-
-        // write PIs of counter-example
-        nPiOffset -= Saig_ManPiNum(p->pAig);
-        Saig_ManForEachPi( p->pAig, pObj, i )
-            if ( pValues[Saig_ManRegNum(p->pAig)+i] == 1 )
-                Aig_InfoSetBit( pCex->pData, nPiOffset + i );
-
-        // check that we get the init state
-        if ( v == 0 )
-        {
-            Saig_ManForEachLo( p->pAig, pObj, i )
-                assert( pValues[i] == 0 );
-            break;
-        }
-
-        // write state in terms of NS variables
-        bState = Llb_CoreComputeCube( p->dd, vVarsNs, 1, pValues );   Cudd_Ref( bState );
-    }
-    assert( nPiOffset == Saig_ManRegNum(p->pAig) );
-    // update the output number
-//Abc_CexPrint( pCex );
-    RetValue = Saig_ManFindFailedPoCex( p->pInit, pCex );
-    assert( RetValue >= 0 && RetValue < Saig_ManPoNum(p->pInit) ); // invalid CEX!!!
-    pCex->iPo = RetValue;
-    // cleanup
-    ABC_FREE( pValues );
-    Vec_IntFree( vVarsNs );
-    return pCex;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Perform reachability with hints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_NonlinReoHook( DdManager * dd, char * Type, void * Method )
-{
-    Aig_Man_t * pAig = (Aig_Man_t *)dd->bFunc;
-    Aig_Obj_t * pObj;
-    int i;
-    printf( "Order: " );
-    for ( i = 0; i < Cudd_ReadSize(dd); i++ )
-    {
-        pObj = Aig_ManObj( pAig, i );
-        if ( pObj == NULL )
-            continue;
-        if ( Saig_ObjIsPi(pAig, pObj) )
-            printf( "pi" );
-        else if ( Saig_ObjIsLo(pAig, pObj) )
-            printf( "lo" );
-        else if ( Saig_ObjIsPo(pAig, pObj) )
-            printf( "po" );
-        else if ( Saig_ObjIsLi(pAig, pObj) )
-            printf( "li" );
-        else continue;
-        printf( "%d=%d ", i, dd->perm[i] );
-    }
-    printf( "\n" );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Perform reachability with hints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_NonlinCompPerms( DdManager * dd, int * pVar2Lev )
-{
-    DdSubtable * pSubt;
-    int i, Sum = 0, Entry;
-    for ( i = 0; i < dd->size; i++ )
-    {
-        pSubt = &(dd->subtables[dd->perm[i]]);
-        if ( pSubt->keys == pSubt->dead + 1 )
-            continue;
-        Entry = ABC_MAX(dd->perm[i], pVar2Lev[i]) - ABC_MIN(dd->perm[i], pVar2Lev[i]);
-        Sum += Entry;
-//printf( "%d-%d(%d) ", dd->perm[i], pV2L[i], Entry );
-    }
-    return Sum;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Perform reachability with hints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_NonlinReachability( Llb_Mnn_t * p )
-{ 
-    DdNode * bTemp, * bNext;
-    int nIters, nBddSize0, nBddSize, NumCmp, Limit = p->pPars->nBddMax;
-    int clk2, clk3, clk = clock();
-    assert( Aig_ManRegNum(p->pAig) > 0 );
-
-    // compute time to stop
-    p->pPars->TimeTarget = p->pPars->TimeLimit ? time(NULL) + p->pPars->TimeLimit : 0;
-
-    // set the stop time parameter
-    p->dd->TimeStop  = p->pPars->TimeTarget;
-    p->ddG->TimeStop = p->pPars->TimeTarget;
-    p->ddR->TimeStop = p->pPars->TimeTarget;
-
-    // set reordering hooks
-    assert( p->dd->bFunc == NULL );
-//    p->dd->bFunc = (DdNode *)p->pAig;
-//    Cudd_AddHook( p->dd, Llb_NonlinReoHook, CUDD_POST_REORDERING_HOOK );
-
-    // create bad state in the ring manager
-    p->ddR->bFunc  = Llb_BddComputeBad( p->pInit, p->ddR, p->pPars->TimeTarget );          
-    if ( p->ddR->bFunc == NULL )
-    {
-        if ( !p->pPars->fSilent )
-            printf( "Reached timeout (%d seconds) during constructing the bad states.\n", p->pPars->TimeLimit );
-        p->pPars->iFrame = -1;
-        return -1;
-    }
-    Cudd_Ref( p->ddR->bFunc );
-    // compute the starting set of states
-    Cudd_Quit( p->dd );
-    p->dd = Llb_NonlinImageStart( p->pAig, p->vLeaves, p->vRoots, p->pVars2Q, p->pOrderL, 1, p->pPars->TimeTarget );
-    if ( p->dd == NULL )
-    {
-        if ( !p->pPars->fSilent )
-            printf( "Reached timeout (%d seconds) during constructing the bad states.\n", p->pPars->TimeLimit );
-        p->pPars->iFrame = -1;
-        return -1;
-    }
-    p->dd->bFunc   = Llb_NonlinComputeInitState( p->pAig, p->dd );   Cudd_Ref( p->dd->bFunc );   // current
-    p->ddG->bFunc  = Llb_NonlinComputeInitState( p->pAig, p->ddG );  Cudd_Ref( p->ddG->bFunc );  // reached
-    p->ddG->bFunc2 = Llb_NonlinComputeInitState( p->pAig, p->ddG );  Cudd_Ref( p->ddG->bFunc2 ); // frontier 
-    for ( nIters = 0; nIters < p->pPars->nIterMax; nIters++ )
-    { 
-        // check the runtime limit
-        clk2 = clock();
-        if ( p->pPars->TimeLimit && time(NULL) > p->pPars->TimeTarget )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Llb_NonlinImageQuit();
-            return -1;
-        }
-
-        // save the onion ring
-        bTemp = Extra_TransferPermute( p->dd, p->ddR, p->dd->bFunc, Vec_IntArray(p->vCs2Glo) );
-        if ( bTemp == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during ring transfer.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Llb_NonlinImageQuit();
-            return -1;
-        }
-        Cudd_Ref( bTemp );
-        Vec_PtrPush( p->vRings, bTemp );
-
-        // check it for bad states
-        if ( !p->pPars->fSkipOutCheck && !Cudd_bddLeq( p->ddR, bTemp, Cudd_Not(p->ddR->bFunc) ) ) 
-        {
-            assert( p->pInit->pSeqModel == NULL );
-            if ( !p->pPars->fBackward )
-                p->pInit->pSeqModel = Llb_NonlinDeriveCex( p ); 
-            if ( !p->pPars->fSilent )
-            {
-                if ( !p->pPars->fBackward )
-                    printf( "Output %d was asserted in frame %d (use \"write_counter\" to dump a witness).  ", p->pInit->pSeqModel->iPo, nIters );
-                else
-                    printf( "Output ??? was asserted in frame %d (counter-example is not produced).  ", nIters );
-                Abc_PrintTime( 1, "Time", clock() - clk );
-            }
-            p->pPars->iFrame = nIters - 1;
-            Llb_NonlinImageQuit();
-            return 0;
-        }
-
-        // compute the next states
-        clk3 = clock();
-        nBddSize0 = Cudd_DagSize( p->dd->bFunc );
-        bNext = Llb_NonlinImageCompute( p->dd->bFunc, p->pPars->fReorder, 0, 1, p->pOrderL ); // consumes ref   
-//        bNext = Llb_NonlinImage( p->pAig, p->vLeaves, p->vRoots, p->pVars2Q, p->dd, bCurrent, 
-//            p->pPars->fReorder, p->pPars->fVeryVerbose, NULL, ABC_INFINITY, p->pPars->TimeTarget );
-        if ( bNext == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation in quantification.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Llb_NonlinImageQuit();
-            return -1;
-        }
-        Cudd_Ref( bNext );
-        nBddSize = Cudd_DagSize( bNext );
-        p->timeImage += clock() - clk3;
-
-
-        // transfer to the state manager
-        clk3 = clock();
-        Cudd_RecursiveDeref( p->ddG, p->ddG->bFunc2 );
-        p->ddG->bFunc2 = Extra_TransferPermute( p->dd, p->ddG, bNext, Vec_IntArray(p->vNs2Glo) );    
-//        p->ddG->bFunc2 = Extra_bddAndPermute( p->ddG, Cudd_Not(p->ddG->bFunc), p->dd, bNext, Vec_IntArray(p->vNs2Glo) );    
-        if ( p->ddG->bFunc2 == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation in transfer 1.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->dd,  bNext );  
-            Llb_NonlinImageQuit();
-            return -1;
-        }
-        Cudd_Ref( p->ddG->bFunc2 );
-        Cudd_RecursiveDeref( p->dd, bNext );
-        p->timeTran1 += clock() - clk3;
-
-        // save permutation
-        NumCmp = Llb_NonlinCompPerms( p->dd, p->pOrderL2 );
-        // save order before image computation
-        memcpy( p->pOrderL2, p->dd->perm, sizeof(int) * p->dd->size );
-        // update the image computation manager
-        p->timeReo   += Cudd_ReadReorderingTime(p->dd);
-        p->ddLocReos += Cudd_ReadReorderings(p->dd);
-        p->ddLocGrbs += Cudd_ReadGarbageCollections(p->dd);
-        Llb_NonlinImageQuit();
-        p->dd = Llb_NonlinImageStart( p->pAig, p->vLeaves, p->vRoots, p->pVars2Q, p->pOrderL, 0, p->pPars->TimeTarget );
-        if ( p->dd == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during constructing the bad states.\n", p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            return -1;
-        }
-        //Extra_TestAndPerm( p->ddG, Cudd_Not(p->ddG->bFunc), p->ddG->bFunc2 );    
-
-        // derive new states
-        clk3 = clock();
-        p->ddG->bFunc2 = Cudd_bddAnd( p->ddG, bTemp = p->ddG->bFunc2, Cudd_Not(p->ddG->bFunc) );     
-        if ( p->ddG->bFunc2 == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation in transfer 1.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->ddG, bTemp );  
-            Llb_NonlinImageQuit();
-            return -1;
-        }
-        Cudd_Ref( p->ddG->bFunc2 );
-        Cudd_RecursiveDeref( p->ddG, bTemp );
-        p->timeGloba += clock() - clk3;
-
-        if ( Cudd_IsConstant(p->ddG->bFunc2) )
-            break;
-        // add to the reached set
-        clk3 = clock();
-        p->ddG->bFunc = Cudd_bddOr( p->ddG, bTemp = p->ddG->bFunc, p->ddG->bFunc2 );                 
-        if ( p->ddG->bFunc == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation in transfer 1.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->ddG, bTemp );  
-            Llb_NonlinImageQuit();
-            return -1;
-        }
-        Cudd_Ref( p->ddG->bFunc );
-        Cudd_RecursiveDeref( p->ddG, bTemp );
-        p->timeGloba += clock() - clk3;
-
-        // reset permutation
-//        RetValue = Cudd_CheckZeroRef( dd );
-//        assert( RetValue == 0 );
-//        Cudd_ShuffleHeap( dd, pOrderG );
-
-        // move new states to the working manager
-        clk3 = clock();
-        p->dd->bFunc = Extra_TransferPermute( p->ddG, p->dd, p->ddG->bFunc2, Vec_IntArray(p->vGlo2Cs) ); 
-        if ( p->dd->bFunc == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation in transfer 2.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Llb_NonlinImageQuit();
-            return -1;
-        }
-        Cudd_Ref( p->dd->bFunc );
-        p->timeTran2 += clock() - clk3;
-
-        // report the results
-        if ( p->pPars->fVerbose )
-        {
-            printf( "I =%3d : ",   nIters );
-            printf( "Fr =%7d ",    nBddSize0 );
-            printf( "Im =%7d  ",   nBddSize );
-            printf( "(%4d %4d)  ", p->ddLocReos, p->ddLocGrbs );
-            printf( "Rea =%6d  ",  Cudd_DagSize(p->ddG->bFunc) );
-            printf( "(%4d %4d)  ", Cudd_ReadReorderings(p->ddG), Cudd_ReadGarbageCollections(p->ddG) );
-            printf( "S =%4d ",     nSuppMax );
-            printf( "cL =%5d ",    NumCmp );
-            printf( "cG =%5d ",    Llb_NonlinCompPerms( p->ddG, p->pOrderG ) );
-            Abc_PrintTime( 1, "T", clock() - clk2 );
-            memcpy( p->pOrderG, p->ddG->perm, sizeof(int) * p->ddG->size );
-        }
-/*
-        if ( pPars->fVerbose )
-        {
-            double nMints = Cudd_CountMinterm(ddG, bReached, Saig_ManRegNum(pAig) );
-//            Extra_bddPrint( ddG, bReached );printf( "\n" );
-            printf( "Reachable states = %.0f. (Ratio = %.4f %%)\n", nMints, 100.0*nMints/pow(2.0, Saig_ManRegNum(pAig)) );
-            fflush( stdout ); 
-        }
-*/
-        if ( nIters == p->pPars->nIterMax - 1 )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached limit on the number of timeframes (%d).\n",  p->pPars->nIterMax );
-            p->pPars->iFrame = nIters;
-            Llb_NonlinImageQuit();
-            return -1;
-        }
-    }
-    Llb_NonlinImageQuit();
-    
-    // report the stats
-    if ( p->pPars->fVerbose )
-    {
-        double nMints = Cudd_CountMinterm(p->ddG, p->ddG->bFunc, Saig_ManRegNum(p->pAig) );
-        if ( nIters >= p->pPars->nIterMax || nBddSize > p->pPars->nBddMax )
-            printf( "Reachability analysis is stopped after %d frames.\n", nIters );
-        else
-            printf( "Reachability analysis completed after %d frames.\n", nIters );
-        printf( "Reachable states = %.0f. (Ratio = %.4f %%)\n", nMints, 100.0*nMints/pow(2.0, Saig_ManRegNum(p->pAig)) );
-        fflush( stdout ); 
-    }
-    if ( nIters >= p->pPars->nIterMax || nBddSize > p->pPars->nBddMax )
-    {
-        if ( !p->pPars->fSilent )
-            printf( "Verified only for states reachable in %d frames.  ", nIters );
-        p->pPars->iFrame = p->pPars->nIterMax;
-        return -1; // undecided
-    }
-    // report
-    if ( !p->pPars->fSilent )
-        printf( "The miter is proved unreachable after %d iterations.  ", nIters );
-    p->pPars->iFrame = nIters - 1;
-    Abc_PrintTime( 1, "Time", clock() - clk );
-    return 1; // unreachable
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Mnn_t * Llb_MnnStart( Aig_Man_t * pInit, Aig_Man_t * pAig, Gia_ParLlb_t *  pPars )
-{
-    Llb_Mnn_t * p;
-    Aig_Obj_t * pObj;
-    int i;
-    p = ABC_CALLOC( Llb_Mnn_t, 1 );
-    p->pInit = pInit;
-    p->pAig  = pAig;
-    p->pPars = pPars;
-    p->dd    = Cudd_Init( Aig_ManObjNumMax(pAig), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    p->ddG   = Cudd_Init( Aig_ManRegNum(pAig),    0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    p->ddR   = Cudd_Init( Aig_ManPiNum(pAig),     0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    Cudd_AutodynEnable( p->dd,  CUDD_REORDER_SYMM_SIFT );
-    Cudd_AutodynEnable( p->ddG, CUDD_REORDER_SYMM_SIFT );
-    Cudd_AutodynEnable( p->ddR, CUDD_REORDER_SYMM_SIFT );
-    p->vRings = Vec_PtrAlloc( 100 );
-    // create leaves
-    p->vLeaves = Vec_PtrAlloc( Aig_ManPiNum(pAig) );
-    Aig_ManForEachPi( pAig, pObj, i )
-        Vec_PtrPush( p->vLeaves, pObj );
-    // create roots
-    p->vRoots = Vec_PtrAlloc( Aig_ManPoNum(pAig) );
-    Saig_ManForEachLi( pAig, pObj, i )
-        Vec_PtrPush( p->vRoots, pObj );
-    // variables to quantify
-    p->pOrderL = ABC_CALLOC( int, Aig_ManObjNumMax(pAig) );
-    p->pOrderL2= ABC_CALLOC( int, Aig_ManObjNumMax(pAig) );
-    p->pOrderG = ABC_CALLOC( int, Aig_ManObjNumMax(pAig) );
-    p->pVars2Q = ABC_CALLOC( int, Aig_ManObjNumMax(pAig) );
-    Aig_ManForEachPi( pAig, pObj, i )
-        p->pVars2Q[Aig_ObjId(pObj)] = 1;
-    for ( i = 0; i < Aig_ManObjNumMax(pAig); i++ )
-        p->pOrderL[i] = p->pOrderL2[i] = p->pOrderG[i] = i;
-    Llb_NonlinPrepareVarMap( p ); 
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MnnStop( Llb_Mnn_t * p )
-{
-    DdNode * bTemp;
-    int i;
-    if ( p->pPars->fVerbose ) 
-    {
-        p->timeOther = p->timeTotal - p->timeImage - p->timeTran1 - p->timeTran2 - p->timeGloba;
-        p->timeReoG  = Cudd_ReadReorderingTime(p->ddG);
-        ABC_PRTP( "Image    ", p->timeImage, p->timeTotal );
-        ABC_PRTP( "  build  ",    timeBuild, p->timeTotal );
-        ABC_PRTP( "  and-ex ",    timeAndEx, p->timeTotal );
-        ABC_PRTP( "  other  ",    timeOther, p->timeTotal );
-        ABC_PRTP( "Transfer1", p->timeTran1, p->timeTotal );
-        ABC_PRTP( "Transfer2", p->timeTran2, p->timeTotal );
-        ABC_PRTP( "Global   ", p->timeGloba, p->timeTotal );
-        ABC_PRTP( "Other    ", p->timeOther, p->timeTotal );
-        ABC_PRTP( "TOTAL    ", p->timeTotal, p->timeTotal );
-        ABC_PRTP( "  reo    ", p->timeReo,   p->timeTotal );
-        ABC_PRTP( "  reoG   ", p->timeReoG,  p->timeTotal );
-    }
-    if ( p->ddR->bFunc )
-        Cudd_RecursiveDeref( p->ddR, p->ddR->bFunc );
-    Vec_PtrForEachEntry( DdNode *, p->vRings, bTemp, i )
-        Cudd_RecursiveDeref( p->ddR, bTemp );
-    Vec_PtrFree( p->vRings );
-    if ( p->ddG->bFunc )
-        Cudd_RecursiveDeref( p->ddG, p->ddG->bFunc );
-    if ( p->ddG->bFunc2 )
-        Cudd_RecursiveDeref( p->ddG, p->ddG->bFunc2 );
-//    printf( "manager1\n" );
-//    Extra_StopManager( p->dd );
-//    printf( "manager2\n" );
-    Extra_StopManager( p->ddG );
-//    printf( "manager3\n" );
-    Extra_StopManager( p->ddR );
-    Vec_IntFreeP( &p->vCs2Glo );
-    Vec_IntFreeP( &p->vNs2Glo );
-    Vec_IntFreeP( &p->vGlo2Cs );
-    Vec_IntFreeP( &p->vGlo2Ns );
-    Vec_PtrFree( p->vLeaves );
-    Vec_PtrFree( p->vRoots );
-    ABC_FREE( p->pVars2Q );
-    ABC_FREE( p->pOrderL );
-    ABC_FREE( p->pOrderL2 );
-    ABC_FREE( p->pOrderG );
-    ABC_FREE( p );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Finds balanced cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_NonlinExperiment( Aig_Man_t * pAig, int Num )
-{
-    Llb_Mnn_t * pMnn;
-    Gia_ParLlb_t Pars, * pPars = &Pars;
-    Aig_Man_t * p;
-    int clk = clock();
-
-    Llb_ManSetDefaultParams( pPars );
-    pPars->fVerbose = 1;
-
-    p = Aig_ManDupFlopsOnly( pAig );
-//Aig_ManShow( p, 0, NULL );
-    Aig_ManPrintStats( pAig );
-    Aig_ManPrintStats( p );
-
-    pMnn = Llb_MnnStart( pAig, p, pPars );
-    Llb_NonlinReachability( pMnn );
-    pMnn->timeTotal = clock() - clk;
-    Llb_MnnStop( pMnn );
-
-    Aig_ManStop( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds balanced cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_NonlinCoreReach( Aig_Man_t * pAig, Gia_ParLlb_t * pPars )
-{
-    Llb_Mnn_t * pMnn;
-    Aig_Man_t * p;
-    int RetValue = -1;
-
-    p = Aig_ManDupFlopsOnly( pAig );
-//Aig_ManShow( p, 0, NULL );
-    if ( pPars->fVerbose )
-    Aig_ManPrintStats( pAig );
-    if ( pPars->fVerbose )
-    Aig_ManPrintStats( p );
-
-    if ( !pPars->fSkipReach )
-    {
-        int clk = clock();
-        pMnn = Llb_MnnStart( pAig, p, pPars );
-        RetValue = Llb_NonlinReachability( pMnn );
-        pMnn->timeTotal = clock() - clk;
-        Llb_MnnStop( pMnn );
-    }
-
-    Aig_ManStop( p );
-    return RetValue;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb4Cex.c b/src/aig/llb/llb4Cex.c
deleted file mode 100644
index 4f06b8c6..00000000
--- a/src/aig/llb/llb4Cex.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb2Cex.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Non-linear quantification scheduling.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb2Cex.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-#include "cnf.h"
-#include "satSolver.h"
-
-ABC_NAMESPACE_IMPL_START
- 
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Translates a sequence of states into a counter-example.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Abc_Cex_t * Llb4_Nonlin4TransformCex( Aig_Man_t * pAig, Vec_Ptr_t * vStates, int iCexPo, int fVerbose )
-{
-    Abc_Cex_t * pCex;
-    Cnf_Dat_t * pCnf;
-    Vec_Int_t * vAssumps;
-    sat_solver * pSat;
-    Aig_Obj_t * pObj;
-    unsigned * pNext, * pThis;
-    int i, k, iBit, status, nRegs, clk = clock();
-/*
-    Vec_PtrForEachEntry( unsigned *, vStates, pNext, i )
-    {
-        printf( "%4d : ", i );
-        Extra_PrintBinary( stdout, pNext, Aig_ManRegNum(pAig) );
-        printf( "\n" );
-    }
-*/
-    // derive SAT solver
-    nRegs = Aig_ManRegNum(pAig); pAig->nRegs = 0;
-    pCnf = Cnf_Derive( pAig, Aig_ManPoNum(pAig) );
-    pAig->nRegs = nRegs;
-//    Cnf_DataTranformPolarity( pCnf, 0 );
-    // convert into SAT solver
-    pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
-    if ( pSat == NULL )
-    {
-        printf( "Llb4_Nonlin4TransformCex(): Counter-example generation has failed.\n" );
-        Cnf_DataFree( pCnf );
-        return NULL;
-    }
-    // simplify the problem
-    status = sat_solver_simplify(pSat);
-    if ( status == 0 )
-    {
-        printf( "Llb4_Nonlin4TransformCex(): SAT solver is invalid.\n" );
-        sat_solver_delete( pSat );
-        Cnf_DataFree( pCnf );
-        return NULL;
-    }
-    // start the counter-example
-    pCex = Abc_CexAlloc( Saig_ManRegNum(pAig), Saig_ManPiNum(pAig), Vec_PtrSize(vStates) );
-    pCex->iFrame = Vec_PtrSize(vStates)-1;
-    pCex->iPo = -1;
-
-    // solve each time frame
-    iBit = Saig_ManRegNum(pAig);
-    pThis = (unsigned *)Vec_PtrEntry( vStates, 0 );
-    vAssumps = Vec_IntAlloc( 2 * Aig_ManRegNum(pAig) );
-    Vec_PtrForEachEntryStart( unsigned *, vStates, pNext, i, 1 )
-    {
-        // create assumptions
-        Vec_IntClear( vAssumps );
-        Saig_ManForEachLo( pAig, pObj, k )
-            Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], !Aig_InfoHasBit(pThis,k) ) );
-        Saig_ManForEachLi( pAig, pObj, k )
-            Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], !Aig_InfoHasBit(pNext,k) ) );
-        // solve SAT problem
-        status = sat_solver_solve( pSat, Vec_IntArray(vAssumps), Vec_IntArray(vAssumps) + Vec_IntSize(vAssumps), 
-            (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-        // if the problem is SAT, get the counterexample
-        if ( status != l_True )
-        {
-            printf( "Llb4_Nonlin4TransformCex(): There is no transition between state %d and %d.\n", i-1, i );
-            Vec_IntFree( vAssumps );
-            sat_solver_delete( pSat );
-            Cnf_DataFree( pCnf );
-            ABC_FREE( pCex );
-            return NULL;
-        }
-        // get the assignment of PIs
-        Saig_ManForEachPi( pAig, pObj, k )
-            if ( sat_solver_var_value(pSat, pCnf->pVarNums[Aig_ObjId(pObj)]) )
-                Aig_InfoSetBit( pCex->pData, iBit + k );
-        // update the counter
-        iBit += Saig_ManPiNum(pAig);
-        pThis = pNext;
-    }
-
-    // add the last frame when the property fails
-    Vec_IntClear( vAssumps );
-    if ( iCexPo >= 0 )
-    {
-        Saig_ManForEachPo( pAig, pObj, k )
-            if ( k == iCexPo )
-                Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], 0 ) );
-    }
-    else
-    {
-        Saig_ManForEachPo( pAig, pObj, k )
-            Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], 0 ) );
-    }
-
-    // add clause
-    status = sat_solver_addclause( pSat, Vec_IntArray(vAssumps), Vec_IntArray(vAssumps) + Vec_IntSize(vAssumps) );
-    if ( status == 0 )
-    {
-        printf( "Llb4_Nonlin4TransformCex(): The SAT solver is unsat after adding last clause.\n" );
-        Vec_IntFree( vAssumps );
-        sat_solver_delete( pSat );
-        Cnf_DataFree( pCnf );
-        ABC_FREE( pCex );
-        return NULL;
-    }
-    // create assumptions
-    Vec_IntClear( vAssumps );
-    Saig_ManForEachLo( pAig, pObj, k )
-        Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], !Aig_InfoHasBit(pThis,k) ) );
-    // solve the last frame
-    status = sat_solver_solve( pSat, Vec_IntArray(vAssumps), Vec_IntArray(vAssumps) + Vec_IntSize(vAssumps), 
-        (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    if ( status != l_True )
-    {
-        printf( "Llb4_Nonlin4TransformCex(): There is no last transition that makes the property fail.\n" );
-        Vec_IntFree( vAssumps );
-        sat_solver_delete( pSat );
-        Cnf_DataFree( pCnf );
-        ABC_FREE( pCex );
-        return NULL;
-    }
-    // get the assignment of PIs
-    Saig_ManForEachPi( pAig, pObj, k )
-        if ( sat_solver_var_value(pSat, pCnf->pVarNums[Aig_ObjId(pObj)]) )
-            Aig_InfoSetBit( pCex->pData, iBit + k );
-    iBit += Saig_ManPiNum(pAig);
-    assert( iBit == pCex->nBits );
-
-    // free the sat_solver
-    Vec_IntFree( vAssumps );
-    sat_solver_delete( pSat );
-    Cnf_DataFree( pCnf );
-
-    // verify counter-example
-    status = Saig_ManFindFailedPoCex( pAig, pCex );
-    if ( status >= 0 && status < Saig_ManPoNum(pAig) )
-        pCex->iPo = status;
-    else
-    {
-        printf( "Llb4_Nonlin4TransformCex(): Counter-example verification has FAILED.\n" );
-        ABC_FREE( pCex );
-        return NULL;
-    }
-    // report the results
-//    if ( fVerbose )
-//       Abc_PrintTime( 1, "SAT-based cex generation time", clock() - clk );
-    return pCex;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Resimulates the counter-example.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb4_Nonlin4VerifyCex( Aig_Man_t * pAig, Abc_Cex_t * p )
-{
-    Vec_Ptr_t * vStates;
-    Aig_Obj_t * pObj, * pObjRi, * pObjRo;
-    int i, k, iBit = 0;
-    // create storage for states
-    vStates = Vec_PtrAllocSimInfo( p->iFrame+1, Aig_BitWordNum(Aig_ManRegNum(pAig)) );
-    Vec_PtrCleanSimInfo( vStates, 0, Aig_BitWordNum(Aig_ManRegNum(pAig)) );
-    // verify counter-example
-    Aig_ManCleanMarkB(pAig);
-    Aig_ManConst1(pAig)->fMarkB = 1;
-    Saig_ManForEachLo( pAig, pObj, i )
-        pObj->fMarkB = 0; //Aig_InfoHasBit(p->pData, iBit++);
-    // do not require equal flop count in the AIG and in the CEX
-    iBit = p->nRegs;
-    for ( i = 0; i <= p->iFrame; i++ )
-    {
-        // save current state
-        Saig_ManForEachLo( pAig, pObj, k )
-            if ( pObj->fMarkB )
-                Aig_InfoSetBit( (unsigned *)Vec_PtrEntry(vStates, i), k );
-        // compute new state
-        Saig_ManForEachPi( pAig, pObj, k )
-            pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
-        Aig_ManForEachNode( pAig, pObj, k )
-            pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) & 
-                           (Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj));
-        Aig_ManForEachPo( pAig, pObj, k )
-            pObj->fMarkB = Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj);
-        if ( i == p->iFrame )
-            break;
-        Saig_ManForEachLiLo( pAig, pObjRi, pObjRo, k )
-            pObjRo->fMarkB = pObjRi->fMarkB;
-    }
-/*
-    {
-        unsigned * pNext;
-        Vec_PtrForEachEntry( unsigned *, vStates, pNext, i )
-        {
-            printf( "%4d : ", i );
-            Extra_PrintBinary( stdout, pNext, Aig_ManRegNum(pAig) );
-            printf( "\n" );
-        }
-    }
-*/
-    assert( iBit == p->nBits );
-//    if ( Aig_ManPo(pAig, p->iPo)->fMarkB == 0 )
-//        Vec_PtrFreeP( &vStates );
-    for ( i = Saig_ManPoNum(pAig) - 1; i >= 0; i-- )
-    {
-        if ( Aig_ManPo(pAig, i)->fMarkB )
-        {
-            p->iPo = i;
-            break;
-        }
-    }
-    if ( i == -1 )
-        Vec_PtrFreeP( &vStates );
-    Aig_ManCleanMarkB(pAig);
-    return vStates;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Translates a sequence of states into a counter-example.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Abc_Cex_t * Llb4_Nonlin4NormalizeCex( Aig_Man_t * pAigOrg, Aig_Man_t * pAigRpm, Abc_Cex_t * pCexRpm )
-{
-    Abc_Cex_t * pCexOrg;
-    Vec_Ptr_t * vStates;
-    // check parameters of the AIG
-    if ( Saig_ManRegNum(pAigOrg) != Saig_ManRegNum(pAigRpm) )
-    {
-        printf( "Llb4_Nonlin4NormalizeCex(): The number of flops in the original and reparametrized AIGs do not agree.\n" );
-        return NULL;
-    }
-/*
-    if ( Saig_ManRegNum(pAigRpm) != pCexRpm->nRegs )
-    {
-        printf( "Llb4_Nonlin4NormalizeCex(): The number of flops in the reparametrized AIG and in the CEX do not agree.\n" );
-        return NULL;
-    }
-*/
-    if ( Saig_ManPiNum(pAigRpm) != pCexRpm->nPis )
-    {
-        printf( "Llb4_Nonlin4NormalizeCex(): The number of PIs in the reparametrized AIG and in the CEX do not agree.\n" );
-        return NULL;
-    }
-    // get the sequence of states
-    vStates = Llb4_Nonlin4VerifyCex( pAigRpm, pCexRpm );
-    if ( vStates == NULL )
-    {
-        Abc_Print( 1, "Llb4_Nonlin4NormalizeCex(): The given CEX does not fail outputs of pAigRpm.\n" );
-        return NULL;
-    }
-    // derive updated counter-example
-    pCexOrg = Llb4_Nonlin4TransformCex( pAigOrg, vStates, pCexRpm->iPo, 0 );
-    Vec_PtrFree( vStates );
-    return pCexOrg;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb4Cluster.c b/src/aig/llb/llb4Cluster.c
deleted file mode 100644
index 8d29eed4..00000000
--- a/src/aig/llb/llb4Cluster.c
+++ /dev/null
@@ -1,452 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb2Cluster.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Non-linear quantification scheduling.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb2Cluster.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
- 
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Find good static variable ordering.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4FindOrder_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Int_t * vOrder, int * pCounter )
-{
-    Aig_Obj_t * pFanin0, * pFanin1;
-    if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent( pAig, pObj );
-    assert( Llb_ObjBddVar(vOrder, pObj) < 0 );
-    if ( Aig_ObjIsPi(pObj) )
-    {
-        Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), (*pCounter)++ );
-        return;
-    }
-    // try fanins with higher level first
-    pFanin0 = Aig_ObjFanin0(pObj);
-    pFanin1 = Aig_ObjFanin1(pObj);
-//    if ( pFanin0->Level > pFanin1->Level || (pFanin0->Level == pFanin1->Level && pFanin0->Id < pFanin1->Id) )
-    if ( pFanin0->Level > pFanin1->Level )
-    {
-        Llb_Nonlin4FindOrder_rec( pAig, pFanin0, vOrder, pCounter );
-        Llb_Nonlin4FindOrder_rec( pAig, pFanin1, vOrder, pCounter );
-    }
-    else
-    {
-        Llb_Nonlin4FindOrder_rec( pAig, pFanin1, vOrder, pCounter );
-        Llb_Nonlin4FindOrder_rec( pAig, pFanin0, vOrder, pCounter );
-    }
-    if ( pObj->fMarkA )
-        Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), (*pCounter)++ );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find good static variable ordering.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_Nonlin4FindOrder( Aig_Man_t * pAig, int * pCounter )
-{
-    Vec_Int_t * vNodes = NULL;
-    Vec_Int_t * vOrder;
-    Aig_Obj_t * pObj;
-    int i, Counter = 0;
-    // mark nodes to exclude:  AND with low level and CO drivers
-    Aig_ManCleanMarkA( pAig );
-    Aig_ManForEachNode( pAig, pObj, i )
-        if ( Aig_ObjLevel(pObj) > 3 )
-            pObj->fMarkA = 1;
-    Aig_ManForEachPo( pAig, pObj, i )
-        Aig_ObjFanin0(pObj)->fMarkA = 0;
-
-    // collect nodes in the order
-    vOrder = Vec_IntStartFull( Aig_ManObjNumMax(pAig) );
-    Aig_ManIncrementTravId( pAig );
-    Aig_ObjSetTravIdCurrent( pAig, Aig_ManConst1(pAig) );
-//    Aig_ManForEachPo( pAig, pObj, i )
-    Saig_ManForEachLi( pAig, pObj, i )
-    {
-        Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), Counter++ );
-        Llb_Nonlin4FindOrder_rec( pAig, Aig_ObjFanin0(pObj), vOrder, &Counter );
-    }
-    Aig_ManForEachPi( pAig, pObj, i )
-        if ( Llb_ObjBddVar(vOrder, pObj) < 0 )
-            Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), Counter++ );
-    Aig_ManCleanMarkA( pAig );
-    Vec_IntFreeP( &vNodes );
-//    assert( Counter == Aig_ManObjNum(pAig) - 1 );
-
-/*
-    Saig_ManForEachPi( pAig, pObj, i )
-        printf( "pi%d ", Llb_ObjBddVar(vOrder, pObj) );
-    printf( "\n" );
-    Saig_ManForEachLo( pAig, pObj, i )
-        printf( "lo%d ", Llb_ObjBddVar(vOrder, pObj) );
-    printf( "\n" );
-    Saig_ManForEachPo( pAig, pObj, i )
-        printf( "po%d ", Llb_ObjBddVar(vOrder, pObj) );
-    printf( "\n" );
-    Saig_ManForEachLi( pAig, pObj, i )
-        printf( "li%d ", Llb_ObjBddVar(vOrder, pObj) );
-    printf( "\n" );
-    Aig_ManForEachNode( pAig, pObj, i )
-        printf( "n%d ", Llb_ObjBddVar(vOrder, pObj) );
-    printf( "\n" );
-*/
-    if ( pCounter )
-        *pCounter = Counter;
-    return vOrder;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives BDDs for the partitions.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_Nonlin4FindPartitions_rec( DdManager * dd, Aig_Obj_t * pObj, Vec_Int_t * vOrder, Vec_Ptr_t * vRoots )
-{
-    DdNode * bBdd, * bBdd0, * bBdd1, * bPart, * vVar;
-    if ( Aig_ObjIsConst1(pObj) )
-        return Cudd_ReadOne(dd); 
-    if ( Aig_ObjIsPi(pObj) )
-        return Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );
-    if ( pObj->pData )
-        return (DdNode *)pObj->pData;
-    if ( Aig_ObjIsPo(pObj) )
-    {
-        bBdd0 = Cudd_NotCond( Llb_Nonlin4FindPartitions_rec(dd, Aig_ObjFanin0(pObj), vOrder, vRoots), Aig_ObjFaninC0(pObj) );
-        bPart = Cudd_bddXnor( dd, Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) ), bBdd0 );  Cudd_Ref( bPart );
-        Vec_PtrPush( vRoots, bPart );
-        return NULL;
-    }
-    bBdd0 = Cudd_NotCond( Llb_Nonlin4FindPartitions_rec(dd, Aig_ObjFanin0(pObj), vOrder, vRoots), Aig_ObjFaninC0(pObj) );
-    bBdd1 = Cudd_NotCond( Llb_Nonlin4FindPartitions_rec(dd, Aig_ObjFanin1(pObj), vOrder, vRoots), Aig_ObjFaninC1(pObj) );
-    bBdd  = Cudd_bddAnd( dd, bBdd0, bBdd1 );   Cudd_Ref( bBdd );
-    if ( Llb_ObjBddVar(vOrder, pObj) >= 0 )
-    {
-        vVar  = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );
-        bPart = Cudd_bddXnor( dd, vVar, bBdd );  Cudd_Ref( bPart );
-        Vec_PtrPush( vRoots, bPart );
-        Cudd_RecursiveDeref( dd, bBdd );
-        bBdd = vVar;  Cudd_Ref( vVar );
-    }
-    pObj->pData = bBdd;
-    return bBdd;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives BDDs for the partitions.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_Nonlin4FindPartitions( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vOrder, int fOutputs )
-{
-    Vec_Ptr_t * vRoots;
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManCleanData( pAig );
-    vRoots = Vec_PtrAlloc( 100 );
-    if ( fOutputs )
-    {
-        Saig_ManForEachPo( pAig, pObj, i )
-            Llb_Nonlin4FindPartitions_rec( dd, pObj, vOrder, vRoots );
-    }
-    else
-    {
-        Saig_ManForEachLi( pAig, pObj, i )
-            Llb_Nonlin4FindPartitions_rec( dd, pObj, vOrder, vRoots );
-    }
-    Aig_ManForEachNode( pAig, pObj, i )
-        if ( pObj->pData )
-            Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-    return vRoots;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates quantifiable variables for both types of traversal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_Nonlin4FindVars2Q( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vOrder )
-{
-    Vec_Int_t * vVars2Q;
-    Aig_Obj_t * pObj;
-    int i;
-    vVars2Q = Vec_IntAlloc( 0 );
-    Vec_IntFill( vVars2Q, Cudd_ReadSize(dd), 1 );
-    Saig_ManForEachLo( pAig, pObj, i )
-        Vec_IntWriteEntry( vVars2Q, Llb_ObjBddVar(vOrder, pObj), 0 );
-//    Aig_ManForEachPo( pAig, pObj, i )
-    Saig_ManForEachLi( pAig, pObj, i )
-        Vec_IntWriteEntry( vVars2Q, Llb_ObjBddVar(vOrder, pObj), 0 );
-    return vVars2Q;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates quantifiable variables for both types of traversal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_Nonlin4CountTerms( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vOrder, DdNode * bFunc, int fCo, int fFlop )
-{
-    DdNode * bSupp;
-    Aig_Obj_t * pObj;
-    int i, Counter = 0;
-    bSupp = Cudd_Support( dd, bFunc );  Cudd_Ref( bSupp );
-    if ( !fCo && !fFlop )
-    {
-        Saig_ManForEachPi( pAig, pObj, i )
-            if ( Llb_ObjBddVar(vOrder, pObj) >= 0 )
-                Counter += Cudd_bddLeq( dd, bSupp, Cudd_bddIthVar(dd, Llb_ObjBddVar(vOrder, pObj)) );
-    }
-    else if ( fCo && !fFlop )
-    {
-        Saig_ManForEachPo( pAig, pObj, i )
-            if ( Llb_ObjBddVar(vOrder, pObj) >= 0 )
-                Counter += Cudd_bddLeq( dd, bSupp, Cudd_bddIthVar(dd, Llb_ObjBddVar(vOrder, pObj)) );
-    }
-    else if ( !fCo && fFlop )
-    {
-        Saig_ManForEachLo( pAig, pObj, i )
-            if ( Llb_ObjBddVar(vOrder, pObj) >= 0 )
-                Counter += Cudd_bddLeq( dd, bSupp, Cudd_bddIthVar(dd, Llb_ObjBddVar(vOrder, pObj)) );
-    }
-    else if ( fCo && fFlop )
-    {
-        Saig_ManForEachLi( pAig, pObj, i )
-            if ( Llb_ObjBddVar(vOrder, pObj) >= 0 )
-                Counter += Cudd_bddLeq( dd, bSupp, Cudd_bddIthVar(dd, Llb_ObjBddVar(vOrder, pObj)) );
-    }
-    Cudd_RecursiveDeref( dd, bSupp );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates quantifiable variables for both types of traversal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4PrintGroups( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vOrder, Vec_Ptr_t * vGroups )
-{
-    DdNode * bTemp;
-    int i, nSuppAll, nSuppPi, nSuppPo, nSuppLi, nSuppLo, nSuppAnd;
-    Vec_PtrForEachEntry( DdNode *, vGroups, bTemp, i )
-    {
-//Extra_bddPrintSupport(dd, bTemp);  printf("\n" );
-        nSuppAll = Cudd_SupportSize(dd,bTemp);
-        nSuppPi  = Llb_Nonlin4CountTerms(dd, pAig, vOrder, bTemp, 0, 0);
-        nSuppPo  = Llb_Nonlin4CountTerms(dd, pAig, vOrder, bTemp, 1, 0);
-        nSuppLi  = Llb_Nonlin4CountTerms(dd, pAig, vOrder, bTemp, 0, 1);
-        nSuppLo  = Llb_Nonlin4CountTerms(dd, pAig, vOrder, bTemp, 1, 1);
-        nSuppAnd = nSuppAll - (nSuppPi+nSuppPo+nSuppLi+nSuppLo);
-
-        if ( Cudd_DagSize(bTemp) <= 10 )
-            continue;
-
-        printf( "%4d : bdd =%6d  supp =%3d  ", i, Cudd_DagSize(bTemp), nSuppAll );
-        printf( "pi =%3d ",  nSuppPi );
-        printf( "po =%3d ",  nSuppPo );
-        printf( "lo =%3d ",  nSuppLo );
-        printf( "li =%3d ",  nSuppLi );
-        printf( "and =%3d",  nSuppAnd );
-        printf( "\n" );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates quantifiable variables for both types of traversal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4PrintSuppProfile( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vOrder, Vec_Ptr_t * vGroups )
-{
-    Aig_Obj_t * pObj;
-    int i, * pSupp;
-    int nSuppAll = 0, nSuppPi = 0, nSuppPo = 0, nSuppLi = 0, nSuppLo = 0, nSuppAnd = 0;
-
-    pSupp = ABC_CALLOC( int, Cudd_ReadSize(dd) );
-    Extra_VectorSupportArray( dd, (DdNode **)Vec_PtrArray(vGroups), Vec_PtrSize(vGroups), pSupp );
-
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        if ( Llb_ObjBddVar(vOrder, pObj) < 0 )
-            continue;
-        // remove variables that do not participate
-        if ( pSupp[Llb_ObjBddVar(vOrder, pObj)] == 0 )
-        {
-            if ( Aig_ObjIsNode(pObj) )
-                Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), -1 );
-            continue;
-        }
-        nSuppAll++;
-        if ( Saig_ObjIsPi(pAig, pObj) )
-            nSuppPi++;
-        else if ( Saig_ObjIsLo(pAig, pObj) )
-            nSuppLo++;
-        else if ( Saig_ObjIsPo(pAig, pObj) )
-            nSuppPo++;
-        else if ( Saig_ObjIsLi(pAig, pObj) )
-            nSuppLi++;
-        else
-            nSuppAnd++;
-    }
-    ABC_FREE( pSupp );
-
-    printf( "Groups =%3d  ", Vec_PtrSize(vGroups) );
-    printf( "Variables: all =%4d ",  nSuppAll );
-    printf( "pi =%4d ",  nSuppPi );
-    printf( "po =%4d ",  nSuppPo );
-    printf( "lo =%4d ",  nSuppLo );
-    printf( "li =%4d ",  nSuppLi );
-    printf( "and =%4d",  nSuppAnd );
-    printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4Cluster( Aig_Man_t * pAig, DdManager ** pdd, Vec_Int_t ** pvOrder, Vec_Ptr_t ** pvGroups, int nBddMax, int fVerbose )
-{
-    DdManager * dd;
-    Vec_Int_t * vOrder, * vVars2Q;
-    Vec_Ptr_t * vParts, * vGroups;
-    DdNode * bTemp;
-    int i, nVarNum;
-
-    // create the BDD manager
-    vOrder  = Llb_Nonlin4FindOrder( pAig, &nVarNum );
-    dd      = Cudd_Init( nVarNum, 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-//    Cudd_AutodynEnable( dd,  CUDD_REORDER_SYMM_SIFT );
-
-    vVars2Q = Llb_Nonlin4FindVars2Q( dd, pAig, vOrder );
-    vParts  = Llb_Nonlin4FindPartitions( dd, pAig, vOrder, 0 );
-
-    vGroups = Llb_Nonlin4Group( dd, vParts, vVars2Q, nBddMax );
-    Vec_IntFree( vVars2Q );
-
-    Vec_PtrForEachEntry( DdNode *, vParts, bTemp, i )
-        Cudd_RecursiveDeref( dd, bTemp );
-    Vec_PtrFree( vParts );
-
-
-//    if ( fVerbose )
-    Llb_Nonlin4PrintSuppProfile( dd, pAig, vOrder, vGroups );
-    if ( fVerbose )
-    printf( "Before reordering\n" );
-    if ( fVerbose )
-    Llb_Nonlin4PrintGroups( dd, pAig, vOrder, vGroups );
-
-//    Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 1 );
-//    printf( "After reordering\n" );
-//    Llb_Nonlin4PrintGroups( dd, pAig, vOrder, vGroups );
-
-    if ( pvOrder )
-        *pvOrder = vOrder;
-    else
-        Vec_IntFree( vOrder );
-
-    if ( pvGroups )
-        *pvGroups = vGroups;
-    else
-    {
-        Vec_PtrForEachEntry( DdNode *, vGroups, bTemp, i )
-            Cudd_RecursiveDeref( dd, bTemp );
-        Vec_PtrFree( vGroups );
-    }
-
-    if ( pdd )
-        *pdd = dd;
-    else
-        Extra_StopManager( dd );
-//    Cudd_Quit( dd );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb4Image.c b/src/aig/llb/llb4Image.c
deleted file mode 100644
index 031c8830..00000000
--- a/src/aig/llb/llb4Image.c
+++ /dev/null
@@ -1,861 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb3Image.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Computes image using partitioned structure.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb3Image.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Llb_Var_t_ Llb_Var_t;
-struct Llb_Var_t_ 
-{
-    int           iVar;      // variable number
-    int           nScore;    // variable score
-    Vec_Int_t *   vParts;    // partitions
-};
-
-typedef struct Llb_Prt_t_ Llb_Prt_t;
-struct Llb_Prt_t_ 
-{
-    int           iPart;     // partition number
-    int           nSize;     // the number of BDD nodes
-    DdNode *      bFunc;     // the partition
-    Vec_Int_t *   vVars;     // support
-};
-
-typedef struct Llb_Mgr_t_ Llb_Mgr_t;
-struct Llb_Mgr_t_
-{
-    DdManager *   dd;        // working BDD manager
-    Vec_Int_t *   vVars2Q;   // variables to quantify
-    int           nSizeMax;  // maximum size of the cluster
-    // internal
-    Llb_Prt_t **  pParts;    // partitions
-    Llb_Var_t **  pVars;     // variables
-    int           iPartFree; // next free partition
-    int           nVars;     // the number of BDD variables
-    int           nSuppMax;  // maximum support size
-    // temporary
-    int *         pSupp;     // temporary support storage
-};
-
-static inline Llb_Var_t * Llb_MgrVar( Llb_Mgr_t * p, int i )   { return p->pVars[i];  }
-static inline Llb_Prt_t * Llb_MgrPart( Llb_Mgr_t * p, int i )  { return p->pParts[i]; }
-
-// iterator over vars
-#define Llb_MgrForEachVar( p, pVar, i )     \
-    for ( i = 0; (i < p->nVars) && (((pVar) = Llb_MgrVar(p, i)), 1); i++ ) if ( pVar == NULL ) {} else
-// iterator over parts
-#define Llb_MgrForEachPart( p, pPart, i )   \
-    for ( i = 0; (i < p->iPartFree) && (((pPart) = Llb_MgrPart(p, i)), 1); i++ ) if ( pPart == NULL ) {} else
-
-// iterator over vars of one partition
-#define Llb_PartForEachVar( p, pPart, pVar, i )   \
-    for ( i = 0; (i < Vec_IntSize(pPart->vVars)) && (((pVar) = Llb_MgrVar(p, Vec_IntEntry(pPart->vVars,i))), 1); i++ )
-// iterator over parts of one variable
-#define Llb_VarForEachPart( p, pVar, pPart, i )   \
-    for ( i = 0; (i < Vec_IntSize(pVar->vParts)) && (((pPart) = Llb_MgrPart(p, Vec_IntEntry(pVar->vParts,i))), 1); i++ )
-
-// statistics
-//int timeBuild, timeAndEx, timeOther;
-//int nSuppMax;
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Removes one variable.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4RemoveVar( Llb_Mgr_t * p, Llb_Var_t * pVar )
-{
-    assert( p->pVars[pVar->iVar] == pVar );
-    p->pVars[pVar->iVar] = NULL;
-    Vec_IntFree( pVar->vParts );
-    ABC_FREE( pVar );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes one partition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4RemovePart( Llb_Mgr_t * p, Llb_Prt_t * pPart )
-{
-//printf( "Removing %d\n", pPart->iPart );
-    assert( p->pParts[pPart->iPart] == pPart );
-    p->pParts[pPart->iPart] = NULL;
-    Vec_IntFree( pPart->vVars );
-    Cudd_RecursiveDeref( p->dd, pPart->bFunc );
-    ABC_FREE( pPart );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Create cube with singleton variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_Nonlin4CreateCube1( Llb_Mgr_t * p, Llb_Prt_t * pPart )
-{
-    DdNode * bCube, * bTemp;
-    Llb_Var_t * pVar;
-    int i, TimeStop;
-    TimeStop = p->dd->TimeStop; p->dd->TimeStop = 0;
-    bCube = Cudd_ReadOne(p->dd);   Cudd_Ref( bCube );
-    Llb_PartForEachVar( p, pPart, pVar, i )
-    {
-        assert( Vec_IntSize(pVar->vParts) > 0 );
-        if ( Vec_IntSize(pVar->vParts) != 1 )
-            continue;
-        assert( Vec_IntEntry(pVar->vParts, 0) == pPart->iPart );
-        bCube = Cudd_bddAnd( p->dd, bTemp = bCube, Cudd_bddIthVar(p->dd, pVar->iVar) );    Cudd_Ref( bCube );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-    }
-    Cudd_Deref( bCube );
-    p->dd->TimeStop = TimeStop;
-    return bCube;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Create cube of variables appearing only in two partitions.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_Nonlin4CreateCube2( Llb_Mgr_t * p, Llb_Prt_t * pPart1, Llb_Prt_t * pPart2 )
-{
-    DdNode * bCube, * bTemp;
-    Llb_Var_t * pVar;
-    int i, TimeStop;
-    TimeStop = p->dd->TimeStop; p->dd->TimeStop = 0;
-    bCube = Cudd_ReadOne(p->dd);   Cudd_Ref( bCube );
-    Llb_PartForEachVar( p, pPart1, pVar, i )
-    {
-        assert( Vec_IntSize(pVar->vParts) > 0 );
-        if ( Vec_IntSize(pVar->vParts) != 2 )
-            continue;
-        if ( (Vec_IntEntry(pVar->vParts, 0) == pPart1->iPart && Vec_IntEntry(pVar->vParts, 1) == pPart2->iPart) ||
-             (Vec_IntEntry(pVar->vParts, 0) == pPart2->iPart && Vec_IntEntry(pVar->vParts, 1) == pPart1->iPart) )
-        {
-            bCube = Cudd_bddAnd( p->dd, bTemp = bCube, Cudd_bddIthVar(p->dd, pVar->iVar) );   Cudd_Ref( bCube );
-            Cudd_RecursiveDeref( p->dd, bTemp );
-        }
-    }
-    Cudd_Deref( bCube );
-    p->dd->TimeStop = TimeStop;
-    return bCube;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if partition has singleton variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_Nonlin4HasSingletonVars( Llb_Mgr_t * p, Llb_Prt_t * pPart )
-{
-    Llb_Var_t * pVar;
-    int i;
-    Llb_PartForEachVar( p, pPart, pVar, i )
-        if ( Vec_IntSize(pVar->vParts) == 1 )
-            return 1;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if partition has singleton variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4Print( Llb_Mgr_t * p )
-{
-    Llb_Prt_t * pPart;
-    Llb_Var_t * pVar;
-    int i, k;
-    printf( "\n" );
-    Llb_MgrForEachVar( p, pVar, i )
-    {
-        printf( "Var %3d : ", i );
-        Llb_VarForEachPart( p, pVar, pPart, k )
-            printf( "%d ", pPart->iPart );
-        printf( "\n" );
-    }
-    Llb_MgrForEachPart( p, pPart, i )
-    {
-        printf( "Part %3d : ", i );
-        Llb_PartForEachVar( p, pPart, pVar, k )
-            printf( "%d ", pVar->iVar );
-        printf( "\n" );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Quantifies singles belonging to one partition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_Nonlin4Quantify1( Llb_Mgr_t * p, Llb_Prt_t * pPart )
-{
-    Llb_Var_t * pVar;
-    Llb_Prt_t * pTemp;
-    Vec_Ptr_t * vSingles;
-    DdNode * bCube, * bTemp;
-    int i, RetValue, nSizeNew;
-    // create cube to be quantified
-    bCube = Llb_Nonlin4CreateCube1( p, pPart );   Cudd_Ref( bCube );
-//    assert( !Cudd_IsConstant(bCube) );
-    // derive new function
-    pPart->bFunc = Cudd_bddExistAbstract( p->dd, bTemp = pPart->bFunc, bCube );  Cudd_Ref( pPart->bFunc );
-    Cudd_RecursiveDeref( p->dd, bTemp );
-    Cudd_RecursiveDeref( p->dd, bCube );
-    // get support
-    vSingles = Vec_PtrAlloc( 0 );
-    nSizeNew = Cudd_DagSize(pPart->bFunc);
-    Extra_SupportArray( p->dd, pPart->bFunc, p->pSupp );
-    Llb_PartForEachVar( p, pPart, pVar, i )
-        if ( p->pSupp[pVar->iVar] )
-        {
-            assert( Vec_IntSize(pVar->vParts) > 1 );
-            pVar->nScore -= pPart->nSize - nSizeNew;
-        }
-        else
-        {
-            RetValue = Vec_IntRemove( pVar->vParts, pPart->iPart );
-            assert( RetValue );
-            pVar->nScore -= pPart->nSize;
-            if ( Vec_IntSize(pVar->vParts) == 0 )
-                Llb_Nonlin4RemoveVar( p, pVar );
-            else if ( Vec_IntSize(pVar->vParts) == 1 )
-                Vec_PtrPushUnique( vSingles, Llb_MgrPart(p, Vec_IntEntry(pVar->vParts,0)) );
-        }
-
-    // update partition
-    pPart->nSize = nSizeNew;
-    Vec_IntClear( pPart->vVars );
-    for ( i = 0; i < p->nVars; i++ )
-        if ( p->pSupp[i] && Vec_IntEntry(p->vVars2Q, i) )
-            Vec_IntPush( pPart->vVars, i );
-    // remove other variables
-    Vec_PtrForEachEntry( Llb_Prt_t *, vSingles, pTemp, i )
-        Llb_Nonlin4Quantify1( p, pTemp );
-    Vec_PtrFree( vSingles );
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Quantifies singles belonging to one partition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_Nonlin4Quantify2( Llb_Mgr_t * p, Llb_Prt_t * pPart1, Llb_Prt_t * pPart2 )
-{
-    int fVerbose = 0;
-    Llb_Var_t * pVar;
-    Llb_Prt_t * pTemp;
-    Vec_Ptr_t * vSingles;
-    DdNode * bCube, * bFunc;
-    int i, RetValue, nSuppSize;
-    int iPart1 = pPart1->iPart;
-    int iPart2 = pPart2->iPart;
-    int liveBeg, liveEnd;
-
-    // create cube to be quantified
-    bCube = Llb_Nonlin4CreateCube2( p, pPart1, pPart2 );   Cudd_Ref( bCube );
-
-//printf( "Quantifying  " ); Extra_bddPrintSupport( p->dd, bCube );  printf( "\n" );
-
-if ( fVerbose )
-{
-printf( "\n" );
-printf( "\n" );
-Llb_Nonlin4Print( p );
-printf( "Conjoining partitions %d and %d.\n", pPart1->iPart, pPart2->iPart );
-Extra_bddPrintSupport( p->dd, bCube );  printf( "\n" );
-}
-liveBeg = p->dd->keys - p->dd->dead;
-    bFunc = Cudd_bddAndAbstract( p->dd, pPart1->bFunc, pPart2->bFunc, bCube );  
-liveEnd = p->dd->keys - p->dd->dead;
-//printf( "%d ", liveEnd-liveBeg );
-
-    if ( bFunc == NULL )
-    {
-        Cudd_RecursiveDeref( p->dd, bCube );
-        return 0;
-    }
-    Cudd_Ref( bFunc );
-    Cudd_RecursiveDeref( p->dd, bCube );
-
-//printf( "Creating part %d ", p->iPartFree ); Extra_bddPrintSupport( p->dd, bFunc );  printf( "\n" );
-
-//printf( "Creating %d\n", p->iPartFree );
-
-    // create new partition
-    pTemp = p->pParts[p->iPartFree] = ABC_CALLOC( Llb_Prt_t, 1 );
-    pTemp->iPart = p->iPartFree++;
-    pTemp->nSize = Cudd_DagSize(bFunc);
-    pTemp->bFunc = bFunc;
-    pTemp->vVars = Vec_IntAlloc( 8 );
-    // update variables
-    Llb_PartForEachVar( p, pPart1, pVar, i )
-    {
-        RetValue = Vec_IntRemove( pVar->vParts, pPart1->iPart );
-        assert( RetValue );
-        pVar->nScore -= pPart1->nSize;
-    }
-    // update variables
-    Llb_PartForEachVar( p, pPart2, pVar, i )
-    {
-        RetValue = Vec_IntRemove( pVar->vParts, pPart2->iPart );
-        assert( RetValue );
-        pVar->nScore -= pPart2->nSize;
-    }
-    // add variables to the new partition
-    nSuppSize = 0;
-    Extra_SupportArray( p->dd, bFunc, p->pSupp );
-    for ( i = 0; i < p->nVars; i++ )
-    {
-        nSuppSize += p->pSupp[i];
-        if ( p->pSupp[i] && Vec_IntEntry(p->vVars2Q, i) )
-        {
-            pVar = Llb_MgrVar( p, i );
-            pVar->nScore += pTemp->nSize;
-            Vec_IntPush( pVar->vParts, pTemp->iPart );
-            Vec_IntPush( pTemp->vVars, i );
-        }
-    }
-    p->nSuppMax = ABC_MAX( p->nSuppMax, nSuppSize ); 
-    // remove variables and collect partitions with singleton variables
-    vSingles = Vec_PtrAlloc( 0 );
-    Llb_PartForEachVar( p, pPart1, pVar, i )
-    {
-        if ( Vec_IntSize(pVar->vParts) == 0 )
-            Llb_Nonlin4RemoveVar( p, pVar );
-        else if ( Vec_IntSize(pVar->vParts) == 1 )
-        {
-            if ( fVerbose )
-                printf( "Adding partition %d because of var %d.\n", 
-                    Llb_MgrPart(p, Vec_IntEntry(pVar->vParts,0))->iPart, pVar->iVar );
-            Vec_PtrPushUnique( vSingles, Llb_MgrPart(p, Vec_IntEntry(pVar->vParts,0)) );
-        }
-    }
-    Llb_PartForEachVar( p, pPart2, pVar, i )
-    {
-        if ( pVar == NULL )
-            continue;
-        if ( Vec_IntSize(pVar->vParts) == 0 )
-            Llb_Nonlin4RemoveVar( p, pVar );
-        else if ( Vec_IntSize(pVar->vParts) == 1 )
-        {
-            if ( fVerbose )
-                printf( "Adding partition %d because of var %d.\n", 
-                    Llb_MgrPart(p, Vec_IntEntry(pVar->vParts,0))->iPart, pVar->iVar );
-            Vec_PtrPushUnique( vSingles, Llb_MgrPart(p, Vec_IntEntry(pVar->vParts,0)) );
-        }
-    }
-    // remove partitions
-    Llb_Nonlin4RemovePart( p, pPart1 );
-    Llb_Nonlin4RemovePart( p, pPart2 );
-    // remove other variables
-if ( fVerbose )
-Llb_Nonlin4Print( p );
-    Vec_PtrForEachEntry( Llb_Prt_t *, vSingles, pTemp, i )
-    {
-if ( fVerbose )
-printf( "Updating partitiong %d with singlton vars.\n", pTemp->iPart );
-        Llb_Nonlin4Quantify1( p, pTemp );
-    }
-if ( fVerbose )
-Llb_Nonlin4Print( p );
-    Vec_PtrFree( vSingles );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes volume of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4CutNodes_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vNodes )
-{
-    if ( Aig_ObjIsTravIdCurrent(p, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent(p, pObj);
-    if ( Saig_ObjIsLi(p, pObj) )
-    {
-        Llb_Nonlin4CutNodes_rec(p, Aig_ObjFanin0(pObj), vNodes);
-        return;
-    }
-    if ( Aig_ObjIsConst1(pObj) )
-        return;
-    assert( Aig_ObjIsNode(pObj) );
-    Llb_Nonlin4CutNodes_rec(p, Aig_ObjFanin0(pObj), vNodes);
-    Llb_Nonlin4CutNodes_rec(p, Aig_ObjFanin1(pObj), vNodes);
-    Vec_PtrPush( vNodes, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes volume of the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_Nonlin4CutNodes( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper )
-{
-    Vec_Ptr_t * vNodes;
-    Aig_Obj_t * pObj;
-    int i;
-    // mark the lower cut with the traversal ID
-    Aig_ManIncrementTravId(p);
-    Vec_PtrForEachEntry( Aig_Obj_t *, vLower, pObj, i )
-        Aig_ObjSetTravIdCurrent( p, pObj );
-    // count the upper cut
-    vNodes = Vec_PtrAlloc( 100 );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vUpper, pObj, i )
-        Llb_Nonlin4CutNodes_rec( p, pObj, vNodes );
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts non-linear quantification scheduling.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4AddPair( Llb_Mgr_t * p, int iPart, int iVar )
-{
-    if ( p->pVars[iVar] == NULL )
-    {
-        p->pVars[iVar] = ABC_CALLOC( Llb_Var_t, 1 );
-        p->pVars[iVar]->iVar   = iVar;
-        p->pVars[iVar]->nScore = 0;
-        p->pVars[iVar]->vParts = Vec_IntAlloc( 8 );
-    }
-    Vec_IntPush( p->pVars[iVar]->vParts, iPart );
-    Vec_IntPush( p->pParts[iPart]->vVars, iVar );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts non-linear quantification scheduling.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4AddPartition( Llb_Mgr_t * p, int i, DdNode * bFunc )
-{
-    int k, nSuppSize;
-    assert( !Cudd_IsConstant(bFunc) );
-//printf( "Creating init %d\n", i );
-    // create partition
-    p->pParts[i] = ABC_CALLOC( Llb_Prt_t, 1 );
-    p->pParts[i]->iPart = i;
-    p->pParts[i]->bFunc = bFunc;  Cudd_Ref( bFunc );
-    p->pParts[i]->vVars = Vec_IntAlloc( 8 );
-    // add support dependencies
-    nSuppSize = 0;
-    Extra_SupportArray( p->dd, bFunc, p->pSupp );
-    for ( k = 0; k < p->nVars; k++ )
-    {
-        nSuppSize += p->pSupp[k];
-        if ( p->pSupp[k] && Vec_IntEntry(p->vVars2Q, k) )
-            Llb_Nonlin4AddPair( p, i, k );
-    }
-    p->nSuppMax = ABC_MAX( p->nSuppMax, nSuppSize ); 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks that each var appears in at least one partition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-**********************************************************************/
-void Llb_Nonlin4CheckVars( Llb_Mgr_t * p )
-{
-    Llb_Var_t * pVar;
-    int i;
-    Llb_MgrForEachVar( p, pVar, i )
-        assert( Vec_IntSize(pVar->vParts) > 1 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find next partition to quantify]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_Nonlin4NextPartitions( Llb_Mgr_t * p, Llb_Prt_t ** ppPart1, Llb_Prt_t ** ppPart2 )
-{
-    Llb_Var_t * pVar, * pVarBest = NULL;
-    Llb_Prt_t * pPart, * pPart1Best = NULL, * pPart2Best = NULL;
-    int i;
-    Llb_Nonlin4CheckVars( p );
-    // find variable with minimum score
-    Llb_MgrForEachVar( p, pVar, i )
-    {
-        if ( p->nSizeMax && pVar->nScore > p->nSizeMax )
-            continue;
-//        if ( pVarBest == NULL || Vec_IntSize(pVarBest->vParts) * pVarBest->nScore > Vec_IntSize(pVar->vParts) * pVar->nScore )
-        if ( pVarBest == NULL || pVarBest->nScore > pVar->nScore )
-            pVarBest = pVar;
-//        printf( "%d ", pVar->nScore );
-    }
-//printf( "\n" );
-    if ( pVarBest == NULL )
-        return 0;
-    // find two partitions with minimum size
-    Llb_VarForEachPart( p, pVarBest, pPart, i )
-    {
-        if ( pPart1Best == NULL )
-            pPart1Best = pPart;
-        else if ( pPart2Best == NULL )
-            pPart2Best = pPart;
-        else if ( pPart1Best->nSize > pPart->nSize || pPart2Best->nSize > pPart->nSize )
-        {
-            if ( pPart1Best->nSize > pPart2Best->nSize )
-                pPart1Best = pPart;
-            else
-                pPart2Best = pPart;
-        }
-    }
-//printf( "Selecting %d and parts %d and %d\n", pVarBest->iVar, pPart1Best->nSize, pPart2Best->nSize );
-//Extra_bddPrintSupport( p->dd, pPart1Best->bFunc ); printf( "\n" );
-//Extra_bddPrintSupport( p->dd, pPart2Best->bFunc ); printf( "\n" );
-
-    *ppPart1 = pPart1Best;
-    *ppPart2 = pPart2Best;
-    return 1; 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recomputes scores after variable reordering.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4RecomputeScores( Llb_Mgr_t * p )
-{
-    Llb_Prt_t * pPart;
-    Llb_Var_t * pVar;
-    int i, k;
-    Llb_MgrForEachPart( p, pPart, i )
-        pPart->nSize = Cudd_DagSize(pPart->bFunc);
-    Llb_MgrForEachVar( p, pVar, i )
-    {
-        pVar->nScore = 0;
-        Llb_VarForEachPart( p, pVar, pPart, k )
-            pVar->nScore += pPart->nSize;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recomputes scores after variable reordering.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4VerifyScores( Llb_Mgr_t * p )
-{
-    Llb_Prt_t * pPart;
-    Llb_Var_t * pVar;
-    int i, k, nScore;
-    Llb_MgrForEachPart( p, pPart, i )
-        assert( pPart->nSize == Cudd_DagSize(pPart->bFunc) );
-    Llb_MgrForEachVar( p, pVar, i )
-    {
-        nScore = 0;
-        Llb_VarForEachPart( p, pVar, pPart, k )
-            nScore += pPart->nSize;
-        assert( nScore == pVar->nScore );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts non-linear quantification scheduling.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Mgr_t * Llb_Nonlin4Alloc( DdManager * dd, Vec_Ptr_t * vParts, DdNode * bCurrent, Vec_Int_t * vVars2Q, int nSizeMax )
-{
-    Llb_Mgr_t * p;
-    DdNode * bFunc;
-    int i;
-    p = ABC_CALLOC( Llb_Mgr_t, 1 );
-    p->dd        = dd;
-    p->nSizeMax  = nSizeMax;
-    p->vVars2Q   = vVars2Q;
-    p->nVars     = Cudd_ReadSize(dd);
-    p->iPartFree = Vec_PtrSize(vParts);
-    p->pVars     = ABC_CALLOC( Llb_Var_t *, p->nVars );
-    p->pParts    = ABC_CALLOC( Llb_Prt_t *, 2 * p->iPartFree + 2 );
-    p->pSupp     = ABC_ALLOC( int, Cudd_ReadSize(dd) );
-    // add pairs (refs are consumed inside)
-    Vec_PtrForEachEntry( DdNode *, vParts, bFunc, i )
-        Llb_Nonlin4AddPartition( p, i, bFunc );
-    // add partition
-    if ( bCurrent )
-        Llb_Nonlin4AddPartition( p, p->iPartFree++, bCurrent );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops non-linear quantification scheduling.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4Free( Llb_Mgr_t * p )
-{
-    Llb_Prt_t * pPart;
-    Llb_Var_t * pVar;
-    int i;
-    Llb_MgrForEachVar( p, pVar, i )
-        Llb_Nonlin4RemoveVar( p, pVar );
-    Llb_MgrForEachPart( p, pPart, i )
-        Llb_Nonlin4RemovePart( p, pPart );
-    ABC_FREE( p->pVars );
-    ABC_FREE( p->pParts );
-    ABC_FREE( p->pSupp );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_Nonlin4Image( DdManager * dd, Vec_Ptr_t * vParts, DdNode * bCurrent, Vec_Int_t * vVars2Q )
-{
-    Llb_Prt_t * pPart, * pPart1, * pPart2;
-    Llb_Mgr_t * p;
-    DdNode * bFunc, * bTemp;
-    int i, nReorders;
-    // start the manager
-    p = Llb_Nonlin4Alloc( dd, vParts, bCurrent, vVars2Q, 0 );
-    // remove singles
-    Llb_MgrForEachPart( p, pPart, i )
-        if ( Llb_Nonlin4HasSingletonVars(p, pPart) )
-            Llb_Nonlin4Quantify1( p, pPart );
-    // compute scores
-    Llb_Nonlin4RecomputeScores( p );
-    // iteratively quantify variables
-    while ( Llb_Nonlin4NextPartitions(p, &pPart1, &pPart2) )
-    {
-        nReorders = Cudd_ReadReorderings(dd);
-        if ( !Llb_Nonlin4Quantify2( p, pPart1, pPart2 ) )
-        {
-            Llb_Nonlin4Free( p );
-            return NULL;
-        }
-        if ( nReorders < Cudd_ReadReorderings(dd) )
-            Llb_Nonlin4RecomputeScores( p );
-//        else
-//            Llb_Nonlin4VerifyScores( p );
-    }
-    // load partitions
-    bFunc = Cudd_ReadOne(p->dd);   Cudd_Ref( bFunc );
-    Llb_MgrForEachPart( p, pPart, i )
-    {
-        bFunc = Cudd_bddAnd( p->dd, bTemp = bFunc, pPart->bFunc );   Cudd_Ref( bFunc );
-        Cudd_RecursiveDeref( p->dd, bTemp );
-    }
-//    nSuppMax = p->nSuppMax;
-    Llb_Nonlin4Free( p );
-//printf( "\n" );
-    // return
-    Cudd_Deref( bFunc );
-    return bFunc;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_Nonlin4Group( DdManager * dd, Vec_Ptr_t * vParts, Vec_Int_t * vVars2Q, int nSizeMax )
-{
-    Vec_Ptr_t * vGroups;
-    Llb_Prt_t * pPart, * pPart1, * pPart2;
-    Llb_Mgr_t * p;
-    int i, nReorders, clk = clock();
-    // start the manager
-    p = Llb_Nonlin4Alloc( dd, vParts, NULL, vVars2Q, nSizeMax );
-    // remove singles
-    Llb_MgrForEachPart( p, pPart, i )
-        if ( Llb_Nonlin4HasSingletonVars(p, pPart) )
-            Llb_Nonlin4Quantify1( p, pPart );
-    // compute scores
-    Llb_Nonlin4RecomputeScores( p );
-    // iteratively quantify variables
-    while ( Llb_Nonlin4NextPartitions(p, &pPart1, &pPart2) )
-    {
-        nReorders = Cudd_ReadReorderings(dd);
-        if ( !Llb_Nonlin4Quantify2( p, pPart1, pPart2 ) )
-        {
-            Llb_Nonlin4Free( p );
-            return NULL;
-        }
-        if ( nReorders < Cudd_ReadReorderings(dd) )
-            Llb_Nonlin4RecomputeScores( p );
-//        else
-//            Llb_Nonlin4VerifyScores( p );
-    }
-    // load partitions
-    vGroups = Vec_PtrAlloc( 1000 );
-    Llb_MgrForEachPart( p, pPart, i )
-    {
-//printf( "Iteration %d ", pPart->iPart );
-        if ( Cudd_IsConstant(pPart->bFunc) )
-        {
-//printf( "Constant\n" );
-            assert( !Cudd_IsComplement(pPart->bFunc) );
-            continue;
-        }
-//printf( "\n" );
-        Vec_PtrPush( vGroups, pPart->bFunc );
-        Cudd_Ref( pPart->bFunc );
-//printf( "Part %d  ", pPart->iPart );
-//Extra_bddPrintSupport( p->dd, pPart->bFunc ); printf( "\n" );
-    }
-    Llb_Nonlin4Free( p );
-//Abc_PrintTime( 1, "Reparametrization time", clock() - clk );
-    return vGroups;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb4Map.c b/src/aig/llb/llb4Map.c
deleted file mode 100644
index 9dabb19d..00000000
--- a/src/aig/llb/llb4Map.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb2Map.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Non-linear quantification scheduling.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb2Map.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-#include "abc.h"
-#include "if.h"
-
-ABC_NAMESPACE_IMPL_START
- 
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns internal nodes used in the mapping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_AigMap( Aig_Man_t * pAig, int nLutSize, int nLutMin )
-{
-    extern Abc_Ntk_t * Abc_NtkFromAigPhase( Aig_Man_t * pMan );
-    extern If_Man_t *  Abc_NtkToIf( Abc_Ntk_t * pNtk, If_Par_t * pPars );
-    extern void        Gia_ManSetIfParsDefault( If_Par_t * pPars );
-    If_Par_t Pars, * pPars = &Pars;
-    If_Man_t * pIfMan;
-    If_Obj_t * pAnd;
-    Abc_Ntk_t * pNtk;
-    Abc_Obj_t * pNode;
-    Vec_Int_t * vNodes;
-    Aig_Obj_t * pObj;
-    int i;
-
-    // create ABC network
-    pNtk = Abc_NtkFromAigPhase( pAig );
-    assert( Abc_NtkIsStrash(pNtk) );
-
-    // derive mapping parameters
-    Gia_ManSetIfParsDefault( pPars );
-    pPars->nLutSize = nLutSize;
-
-    // get timing information
-    pPars->pTimesArr = Abc_NtkGetCiArrivalFloats(pNtk);
-    pPars->pTimesReq = NULL;
-
-    // perform LUT mapping
-    pIfMan = Abc_NtkToIf( pNtk, pPars );    
-    if ( pIfMan == NULL )
-    {
-        Abc_NtkDelete( pNtk );
-        return NULL;
-    }
-    if ( !If_ManPerformMapping( pIfMan ) )
-    {
-        Abc_NtkDelete( pNtk );
-        If_ManStop( pIfMan );
-        return NULL;
-    }
-
-    // mark nodes in the AIG used in the mapping
-    Aig_ManCleanMarkA( pAig );
-    Aig_ManForEachNode( pAig, pObj, i )
-    {
-        pNode = (Abc_Obj_t *)pObj->pData;
-        if ( pNode == NULL )
-            continue;
-        pAnd = (If_Obj_t *)pNode->pCopy;
-        if ( pAnd == NULL )
-            continue;
-        if ( pAnd->nRefs > 0 && (int)If_ObjCutBest(pAnd)->nLeaves >= nLutMin )
-            pObj->fMarkA = 1;
-    }
-    Abc_NtkDelete( pNtk );
-    If_ManStop( pIfMan );
-
-    // unmark flop drivers
-    Saig_ManForEachLi( pAig, pObj, i )
-        Aig_ObjFanin0(pObj)->fMarkA = 0;
-
-    // collect mapping
-    vNodes = Vec_IntAlloc( 100 );
-    Aig_ManForEachNode( pAig, pObj, i )
-        if ( pObj->fMarkA )
-            Vec_IntPush( vNodes, Aig_ObjId(pObj) );
-    Aig_ManCleanMarkA( pAig );
-    return vNodes;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb4Nonlin.c b/src/aig/llb/llb4Nonlin.c
deleted file mode 100644
index b29796f1..00000000
--- a/src/aig/llb/llb4Nonlin.c
+++ /dev/null
@@ -1,1080 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb2Nonlin.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Non-linear quantification scheduling.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb2Nonlin.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
- 
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Llb_Mnx_t_ Llb_Mnx_t;
-struct Llb_Mnx_t_
-{
-    // user info
-    Aig_Man_t *     pAig;           // AIG manager
-    Gia_ParLlb_t *  pPars;          // parameters
-
-    // intermediate BDDs
-    DdManager *     dd;             // BDD manager
-    DdNode *        bBad;           // bad states in terms of CIs
-    DdNode *        bReached;       // reached states 
-    DdNode *        bCurrent;       // from states
-    DdNode *        bNext;          // to states
-    Vec_Ptr_t *     vRings;         // onion rings in ddR
-    Vec_Ptr_t *     vRoots;         // BDDs for partitions
-
-    // structural info
-    Vec_Int_t *     vOrder;         // for each object ID, its BDD variable number or -1
-    Vec_Int_t *     vVars2Q;        // 1 if variable is quantifiable; 0 othervise
-
-    int             timeImage;
-    int             timeRemap;
-    int             timeReo;
-    int             timeOther;
-    int             timeTotal;
-};
-
-//extern int timeBuild, timeAndEx, timeOther;
-//extern int nSuppMax;
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
- 
-/**Function*************************************************************
-
-  Synopsis    [Computes bad in working manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_Nonlin4ComputeBad( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vOrder )
-{
-    Vec_Ptr_t * vNodes;
-    DdNode * bBdd, * bBdd0, * bBdd1, * bTemp, * bResult, * bCube;
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManCleanData( pAig );
-    // assign elementary variables
-    Aig_ManConst1(pAig)->pData = Cudd_ReadOne(dd); 
-    Aig_ManForEachPi( pAig, pObj, i )
-        pObj->pData = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );
-    // compute internal nodes
-    vNodes = Aig_ManDfsNodes( pAig, (Aig_Obj_t **)Vec_PtrArray(pAig->vPos), Saig_ManPoNum(pAig) );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-    {
-        if ( !Aig_ObjIsNode(pObj) )
-            continue;
-        bBdd0 = Cudd_NotCond( (DdNode *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-        bBdd1 = Cudd_NotCond( (DdNode *)Aig_ObjFanin1(pObj)->pData, Aig_ObjFaninC1(pObj) );
-        bBdd  = Cudd_bddAnd( dd, bBdd0, bBdd1 );
-        if ( bBdd == NULL )
-        {
-            Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-                if ( Aig_ObjIsNode(pObj) && pObj->pData != NULL )
-                    Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-            Vec_PtrFree( vNodes );
-            return NULL;
-        }
-        Cudd_Ref( bBdd );
-        pObj->pData = bBdd;
-    }
-    // quantify PIs of each PO
-    bResult = Cudd_ReadLogicZero( dd );  Cudd_Ref( bResult );
-    Saig_ManForEachPo( pAig, pObj, i )
-    {
-        bBdd0   = Cudd_NotCond( (DdNode *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-        bResult = Cudd_bddOr( dd, bTemp = bResult, bBdd0 );     
-        if ( bResult == NULL )
-        {
-            Cudd_RecursiveDeref( dd, bTemp );
-            break;
-        }
-        Cudd_Ref( bResult );
-        Cudd_RecursiveDeref( dd, bTemp );
-    }
-    // deref
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pObj, i )
-        if ( Aig_ObjIsNode(pObj) && pObj->pData != NULL )
-            Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-    Vec_PtrFree( vNodes );
-    if ( bResult )
-    {
-        bCube = Cudd_ReadOne(dd);  Cudd_Ref( bCube );
-        Saig_ManForEachPi( pAig, pObj, i )
-        {
-            bCube = Cudd_bddAnd( dd, bTemp = bCube, (DdNode *)pObj->pData );  Cudd_Ref( bCube );
-            Cudd_RecursiveDeref( dd, bTemp );
-        }
-        bResult = Cudd_bddExistAbstract( dd, bTemp = bResult, bCube );  Cudd_Ref( bResult );
-        Cudd_RecursiveDeref( dd, bTemp );
-        Cudd_RecursiveDeref( dd, bCube );
-        Cudd_Deref( bResult );
-    }
-//if ( bResult )
-//printf( "Bad state = %d.\n", Cudd_DagSize(bResult) );
-    return bResult;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives BDDs for the partitions.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_Nonlin4DerivePartitions( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vOrder )
-{
-    Vec_Ptr_t * vRoots;
-    Aig_Obj_t * pObj;
-    DdNode * bBdd, * bBdd0, * bBdd1, * bPart;
-    int i;
-    Aig_ManCleanData( pAig );
-    // assign elementary variables
-    Aig_ManConst1(pAig)->pData = Cudd_ReadOne(dd); 
-    Aig_ManForEachPi( pAig, pObj, i )
-        pObj->pData = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );
-    Aig_ManForEachNode( pAig, pObj, i )
-        if ( Llb_ObjBddVar(vOrder, pObj) >= 0 )
-        {
-            pObj->pData = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );
-            Cudd_Ref( (DdNode *)pObj->pData );
-        }
-    Saig_ManForEachLi( pAig, pObj, i )
-        pObj->pData = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );
-    // compute intermediate BDDs
-    vRoots = Vec_PtrAlloc( 100 );
-    Aig_ManForEachNode( pAig, pObj, i )
-    {
-        bBdd0 = Cudd_NotCond( (DdNode *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-        bBdd1 = Cudd_NotCond( (DdNode *)Aig_ObjFanin1(pObj)->pData, Aig_ObjFaninC1(pObj) );
-        bBdd  = Cudd_bddAnd( dd, bBdd0, bBdd1 );
-        if ( bBdd == NULL )
-            goto finish;
-        Cudd_Ref( bBdd );
-        if ( pObj->pData == NULL )
-        {
-            pObj->pData = bBdd;
-            continue;
-        }
-        // create new partition
-        bPart = Cudd_bddXnor( dd, (DdNode *)pObj->pData, bBdd );  
-        if ( bPart == NULL )
-            goto finish;
-        Cudd_Ref( bPart );
-        Cudd_RecursiveDeref( dd, bBdd );
-        Vec_PtrPush( vRoots, bPart );
-//printf( "%d ", Cudd_DagSize(bPart) );
-    }
-    // compute register output BDDs
-    Saig_ManForEachLi( pAig, pObj, i )
-    {
-        bBdd0 = Cudd_NotCond( (DdNode *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-        bPart = Cudd_bddXnor( dd, (DdNode *)pObj->pData, bBdd0 );  
-        if ( bPart == NULL )
-            goto finish;
-        Cudd_Ref( bPart );
-        Vec_PtrPush( vRoots, bPart );
-//printf( "%d ", Cudd_DagSize(bPart) );
-    }
-//printf( "\n" );
-    Aig_ManForEachNode( pAig, pObj, i )
-        Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-    return vRoots;
-    // early termination
-finish:
-    Aig_ManForEachNode( pAig, pObj, i )
-        if ( pObj->pData )
-            Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-    Vec_PtrForEachEntry( DdNode *, vRoots, bPart, i )
-        Cudd_RecursiveDeref( dd, bPart );
-    Vec_PtrFree( vRoots );
-    return NULL;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find simple variable ordering.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_Nonlin4CreateOrderSimple( Aig_Man_t * pAig )
-{
-    Vec_Int_t * vOrder;
-    Aig_Obj_t * pObj;
-    int i, Counter = 0;
-    vOrder = Vec_IntStartFull( Aig_ManObjNumMax(pAig) );
-    Aig_ManForEachPi( pAig, pObj, i )
-        Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), Counter++ );
-    Saig_ManForEachLi( pAig, pObj, i )
-        Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), Counter++ );
-    return vOrder;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find good static variable ordering.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4CreateOrder_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Int_t * vOrder, int * pCounter )
-{
-    Aig_Obj_t * pFanin0, * pFanin1;
-    if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent( pAig, pObj );
-    assert( Llb_ObjBddVar(vOrder, pObj) < 0 );
-    if ( Aig_ObjIsPi(pObj) )
-    {
-//        if ( Saig_ObjIsLo(pAig, pObj) )
-//            Vec_IntWriteEntry( vOrder, Aig_ObjId(Saig_ObjLoToLi(pAig, pObj)), (*pCounter)++ );
-        Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), (*pCounter)++ );
-        return;
-    }
-    // try fanins with higher level first
-    pFanin0 = Aig_ObjFanin0(pObj);
-    pFanin1 = Aig_ObjFanin1(pObj);
-//    if ( pFanin0->Level > pFanin1->Level || (pFanin0->Level == pFanin1->Level && pFanin0->Id < pFanin1->Id) )
-    if ( pFanin0->Level > pFanin1->Level )
-    {
-        Llb_Nonlin4CreateOrder_rec( pAig, pFanin0, vOrder, pCounter );
-        Llb_Nonlin4CreateOrder_rec( pAig, pFanin1, vOrder, pCounter );
-    }
-    else
-    {
-        Llb_Nonlin4CreateOrder_rec( pAig, pFanin1, vOrder, pCounter );
-        Llb_Nonlin4CreateOrder_rec( pAig, pFanin0, vOrder, pCounter );
-    }
-    if ( pObj->fMarkA )
-        Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), (*pCounter)++ );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collect nodes with the given fanout count.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_Nonlin4CollectHighRefNodes( Aig_Man_t * pAig, int nFans )
-{
-    Vec_Int_t * vNodes;
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManCleanMarkA( pAig );
-    Aig_ManForEachNode( pAig, pObj, i )
-        if ( Aig_ObjRefs(pObj) >= nFans )
-            pObj->fMarkA = 1;
-    // unmark flop drivers
-    Saig_ManForEachLi( pAig, pObj, i )
-        Aig_ObjFanin0(pObj)->fMarkA = 0;
-    // collect mapping
-    vNodes = Vec_IntAlloc( 100 );
-    Aig_ManForEachNode( pAig, pObj, i )
-        if ( pObj->fMarkA )
-            Vec_IntPush( vNodes, Aig_ObjId(pObj) );
-    Aig_ManCleanMarkA( pAig );
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find good static variable ordering.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_Nonlin4CreateOrder( Aig_Man_t * pAig )
-{
-    Vec_Int_t * vNodes = NULL;
-    Vec_Int_t * vOrder;
-    Aig_Obj_t * pObj;
-    int i, Counter = 0;
-/*
-    // mark internal nodes to be used
-    Aig_ManCleanMarkA( pAig );
-    vNodes = Llb_Nonlin4CollectHighRefNodes( pAig, 4 );
-    Aig_ManForEachObjVec( vNodes, pAig, pObj, i )
-        pObj->fMarkA = 1;
-printf( "Techmapping added %d pivots.\n", Vec_IntSize(vNodes) );
-*/
-    // collect nodes in the order
-    vOrder = Vec_IntStartFull( Aig_ManObjNumMax(pAig) );
-    Aig_ManIncrementTravId( pAig );
-    Aig_ObjSetTravIdCurrent( pAig, Aig_ManConst1(pAig) );
-    Saig_ManForEachLi( pAig, pObj, i )
-    {
-        Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), Counter++ );
-        Llb_Nonlin4CreateOrder_rec( pAig, Aig_ObjFanin0(pObj), vOrder, &Counter );
-    }
-    Aig_ManForEachPi( pAig, pObj, i )
-        if ( Llb_ObjBddVar(vOrder, pObj) < 0 )
-        {
-//            if ( Saig_ObjIsLo(pAig, pObj) )
-//                Vec_IntWriteEntry( vOrder, Aig_ObjId(Saig_ObjLoToLi(pAig, pObj)), Counter++ );
-            Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), Counter++ );
-        }
-    assert( Counter <= Aig_ManPiNum(pAig) + Aig_ManRegNum(pAig) + (vNodes?Vec_IntSize(vNodes):0) );
-    Aig_ManCleanMarkA( pAig );
-    Vec_IntFreeP( &vNodes );
-    return vOrder;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Creates quantifiable varaibles for both types of traversal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_Nonlin4CreateVars2Q( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vOrder, int fBackward )
-{
-    Vec_Int_t * vVars2Q;
-    Aig_Obj_t * pObjLi, * pObjLo;
-    int i;
-    vVars2Q = Vec_IntAlloc( 0 );
-    Vec_IntFill( vVars2Q, Cudd_ReadSize(dd), 1 );
-    Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
-        Vec_IntWriteEntry( vVars2Q, Llb_ObjBddVar(vOrder, fBackward ? pObjLo : pObjLi), 0 );
-    return vVars2Q;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compute initial state in terms of current state variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4SetupVarMap( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vOrder )
-{
-    DdNode ** pVarsX, ** pVarsY;
-    Aig_Obj_t * pObjLo, * pObjLi;
-    int i;
-    pVarsX = ABC_ALLOC( DdNode *, Cudd_ReadSize(dd) );
-    pVarsY = ABC_ALLOC( DdNode *, Cudd_ReadSize(dd) );
-    Saig_ManForEachLiLo( pAig, pObjLo, pObjLi, i )
-    {
-        assert( Llb_ObjBddVar(vOrder, pObjLo) >= 0 );
-        assert( Llb_ObjBddVar(vOrder, pObjLi) >= 0 );
-        pVarsX[i] = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObjLo) );
-        pVarsY[i] = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObjLi) );
-    }
-    Cudd_SetVarMap( dd, pVarsX, pVarsY, Aig_ManRegNum(pAig) );
-    ABC_FREE( pVarsX );
-    ABC_FREE( pVarsY );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compute initial state in terms of current state variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_Nonlin4ComputeInitState( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vOrder, int fBackward )
-{
-    Aig_Obj_t * pObjLi, * pObjLo;
-    DdNode * bRes, * bVar, * bTemp;
-    int i, TimeStop;
-    TimeStop = dd->TimeStop;  dd->TimeStop = 0;
-    bRes = Cudd_ReadOne( dd );   Cudd_Ref( bRes );
-    Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
-    {
-        bVar = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, fBackward? pObjLi : pObjLo) );
-        bRes = Cudd_bddAnd( dd, bTemp = bRes, Cudd_Not(bVar) );  Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( dd, bTemp );
-    }
-    Cudd_Deref( bRes );
-    dd->TimeStop = TimeStop;
-    return bRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compute initial state in terms of current state variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_Nonlin4ComputeCube( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vOrder, char * pValues, int Flag )
-{
-    Aig_Obj_t * pObjLo, * pObjLi, * pObjTemp;
-    DdNode * bRes, * bVar, * bTemp;
-    int i, TimeStop;
-    TimeStop = dd->TimeStop;  dd->TimeStop = 0;
-    bRes = Cudd_ReadOne( dd );   Cudd_Ref( bRes );
-    Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
-    {
-        if ( Flag )
-            pObjTemp = pObjLo, pObjLo = pObjLi, pObjLi = pObjTemp;
-        // get the correspoding flop input variable
-        bVar = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObjLi) );
-        if ( pValues[Llb_ObjBddVar(vOrder, pObjLo)] != 1 )
-            bVar = Cudd_Not(bVar);
-        // create cube
-        bRes = Cudd_bddAnd( dd, bTemp = bRes, bVar );  Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( dd, bTemp );
-    }
-    Cudd_Deref( bRes );
-    dd->TimeStop = TimeStop;
-    return bRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Compute initial state in terms of current state variables.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4RecordState( Aig_Man_t * pAig, Vec_Int_t * vOrder, unsigned * pState, char * pValues, int fBackward )
-{
-    Aig_Obj_t * pObjLo, * pObjLi;
-    int i;
-    Saig_ManForEachLiLo( pAig, pObjLi, pObjLo, i )
-        if ( pValues[Llb_ObjBddVar(vOrder, fBackward? pObjLi : pObjLo)] == 1 )
-            Aig_InfoSetBit( pState, i );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Multiply every partition by the cube.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_Nonlin4Multiply( DdManager * dd, DdNode * bCube, Vec_Ptr_t * vParts )
-{
-    Vec_Ptr_t * vNew;
-    DdNode * bTemp, * bFunc;
-    int i;
-    vNew = Vec_PtrAlloc( Vec_PtrSize(vParts) );
-    Vec_PtrForEachEntry( DdNode *, vParts, bFunc, i )
-    {
-        bTemp = Cudd_bddAnd( dd, bFunc, bCube );  Cudd_Ref( bTemp );
-        Vec_PtrPush( vNew, bTemp );
-    }
-    return vNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Multiply every partition by the cube.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4Deref( DdManager * dd, Vec_Ptr_t * vParts )
-{
-    DdNode * bFunc;
-    int i;
-    Vec_PtrForEachEntry( DdNode *, vParts, bFunc, i )
-        Cudd_RecursiveDeref( dd, bFunc );
-    Vec_PtrFree( vParts );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives counter-example by backward reachability.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_Nonlin4DeriveCex( Llb_Mnx_t * p, int fBackward, int fVerbose )
-{
-    Vec_Int_t * vVars2Q;
-    Vec_Ptr_t * vStates, * vRootsNew;
-    Aig_Obj_t * pObj;
-    DdNode * bState, * bImage, * bOneCube, * bRing;
-    int i, v, RetValue, clk = clock();
-    char * pValues;
-    assert( Vec_PtrSize(p->vRings) > 0 );
-    // disable the timeout
-    p->dd->TimeStop  = 0;
-
-    // start the state set
-    vStates = Vec_PtrAllocSimInfo( Vec_PtrSize(p->vRings), Aig_BitWordNum(Aig_ManRegNum(p->pAig)) );
-    Vec_PtrCleanSimInfo( vStates, 0, Aig_BitWordNum(Aig_ManRegNum(p->pAig)) );
-    if ( fBackward )
-        Vec_PtrReverseOrder( vStates );
-
-    // get the last cube
-    pValues = ABC_ALLOC( char, Cudd_ReadSize(p->dd) );
-    bOneCube = Cudd_bddIntersect( p->dd, (DdNode *)Vec_PtrEntryLast(p->vRings), p->bBad );  Cudd_Ref( bOneCube );
-    RetValue = Cudd_bddPickOneCube( p->dd, bOneCube, pValues );
-    Cudd_RecursiveDeref( p->dd, bOneCube );
-    assert( RetValue );
-
-    // record the cube
-    Llb_Nonlin4RecordState( p->pAig, p->vOrder, (unsigned *)Vec_PtrEntryLast(vStates), pValues, fBackward );
-
-    // write state in terms of NS variables
-    if ( Vec_PtrSize(p->vRings) > 1 )
-    {
-        bState = Llb_Nonlin4ComputeCube( p->dd, p->pAig, p->vOrder, pValues, fBackward );   Cudd_Ref( bState );
-    }
-    // perform backward analysis
-    vVars2Q = Llb_Nonlin4CreateVars2Q( p->dd, p->pAig, p->vOrder, !fBackward );
-    Vec_PtrForEachEntryReverse( DdNode *, p->vRings, bRing, v )
-    { 
-        if ( v == Vec_PtrSize(p->vRings) - 1 )
-            continue;
-
-        // preprocess partitions
-        vRootsNew = Llb_Nonlin4Multiply( p->dd, bState, p->vRoots );
-        Cudd_RecursiveDeref( p->dd, bState );
-
-        // compute the next states
-        bImage = Llb_Nonlin4Image( p->dd, vRootsNew, NULL, vVars2Q ); Cudd_Ref( bImage );
-        Llb_Nonlin4Deref( p->dd, vRootsNew );
-
-        // intersect with the previous set
-        bOneCube = Cudd_bddIntersect( p->dd, bImage, bRing );  Cudd_Ref( bOneCube );
-        Cudd_RecursiveDeref( p->dd, bImage );
-
-        // find any assignment of the BDD
-        RetValue = Cudd_bddPickOneCube( p->dd, bOneCube, pValues );
-        Cudd_RecursiveDeref( p->dd, bOneCube );
-        assert( RetValue );
-
-        // record the cube
-        Llb_Nonlin4RecordState( p->pAig, p->vOrder, (unsigned *)Vec_PtrEntry(vStates, v), pValues, fBackward );
-
-        // check that we get the init state
-        if ( v == 0 )
-        {
-            Saig_ManForEachLo( p->pAig, pObj, i )
-                assert( fBackward || pValues[Llb_ObjBddVar(p->vOrder, pObj)] == 0 );
-            break;
-        } 
-
-        // write state in terms of NS variables
-        bState = Llb_Nonlin4ComputeCube( p->dd, p->pAig, p->vOrder, pValues, fBackward );   Cudd_Ref( bState );
-    }
-    Vec_IntFree( vVars2Q );
-    ABC_FREE( pValues );
-    if ( fBackward )
-        Vec_PtrReverseOrder( vStates );
-//    if ( fVerbose )
-//        Abc_PrintTime( 1, "BDD-based cex generation time", clock() - clk );
-    return vStates;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Perform reachability with hints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_Nonlin4Reachability( Llb_Mnx_t * p )
-{ 
-    DdNode * bAux;
-    int nIters, nBddSizeFr, nBddSizeTo, nBddSizeTo2;
-    int clkTemp, clkIter, clk = clock();
-    assert( Aig_ManRegNum(p->pAig) > 0 );
-
-    if ( p->pPars->fBackward )
-    {
-        // create bad state in the ring manager
-        if ( !p->pPars->fSkipOutCheck )
-        {
-            p->bBad = Llb_Nonlin4ComputeInitState( p->dd, p->pAig, p->vOrder, p->pPars->fBackward );  Cudd_Ref( p->bBad );
-        }
-        // create init state
-        if ( p->pPars->fCluster )
-            p->bCurrent = p->dd->bFunc, p->dd->bFunc = NULL; 
-        else
-        {
-            p->bCurrent = Llb_Nonlin4ComputeBad( p->dd, p->pAig, p->vOrder );          
-            if ( p->bCurrent == NULL )
-            {
-                if ( !p->pPars->fSilent )
-                    printf( "Reached timeout (%d seconds) during constructing the bad states.\n", p->pPars->TimeLimit );
-                p->pPars->iFrame = -1;
-                return -1;
-            }
-            Cudd_Ref( p->bCurrent );
-        }
-        // remap into the next states
-        p->bCurrent = Cudd_bddVarMap( p->dd, bAux = p->bCurrent );
-        if ( p->bCurrent == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during remapping bad states.\n",  p->pPars->TimeLimit );
-            Cudd_RecursiveDeref( p->dd, bAux );
-            p->pPars->iFrame = -1;
-            return -1;
-        }
-        Cudd_Ref( p->bCurrent );
-        Cudd_RecursiveDeref( p->dd, bAux );
-    }
-    else
-    {
-        // create bad state in the ring manager
-        if ( !p->pPars->fSkipOutCheck )
-        {
-            if ( p->pPars->fCluster )
-                p->bBad = p->dd->bFunc, p->dd->bFunc = NULL; 
-            else
-            {
-                p->bBad = Llb_Nonlin4ComputeBad( p->dd, p->pAig, p->vOrder );          
-                if ( p->bBad == NULL )
-                {
-                    if ( !p->pPars->fSilent )
-                        printf( "Reached timeout (%d seconds) during constructing the bad states.\n", p->pPars->TimeLimit );
-                    p->pPars->iFrame = -1;
-                    return -1;
-                }
-                Cudd_Ref( p->bBad );
-            }
-        }
-        else if ( p->dd->bFunc )
-            Cudd_RecursiveDeref( p->dd, p->dd->bFunc ), p->dd->bFunc = NULL;
-        // compute the starting set of states
-        p->bCurrent = Llb_Nonlin4ComputeInitState( p->dd, p->pAig, p->vOrder, p->pPars->fBackward );  Cudd_Ref( p->bCurrent );
-    }
-    // perform iterations
-    p->bReached = p->bCurrent; Cudd_Ref( p->bReached );
-    for ( nIters = 0; nIters < p->pPars->nIterMax; nIters++ )
-    { 
-        clkIter = clock();
-        // check the runtime limit
-        if ( p->pPars->TimeLimit && time(NULL) > p->pPars->TimeTarget )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            return -1;
-        }
-
-        // save the onion ring
-        Vec_PtrPush( p->vRings, p->bCurrent );   Cudd_Ref( p->bCurrent );
-
-        // check it for bad states
-        if ( !p->pPars->fSkipOutCheck && !Cudd_bddLeq( p->dd, p->bCurrent, Cudd_Not(p->bBad) ) ) 
-        {
-            Vec_Ptr_t * vStates;
-            assert( p->pAig->pSeqModel == NULL );
-            vStates = Llb_Nonlin4DeriveCex( p, p->pPars->fBackward, p->pPars->fVerbose ); 
-            p->pAig->pSeqModel = Llb4_Nonlin4TransformCex( p->pAig, vStates, -1, p->pPars->fVerbose );
-            Vec_PtrFreeP( &vStates );
-            if ( !p->pPars->fSilent )
-            {
-                printf( "Output %d was asserted in frame %d (use \"write_counter\" to dump a witness).  ", p->pAig->pSeqModel->iPo, nIters );
-                Abc_PrintTime( 1, "Time", clock() - clk );
-            }
-            p->pPars->iFrame = nIters - 1;
-            return 0;
-        }
-
-        // compute the next states
-        clkTemp = clock();
-        p->bNext = Llb_Nonlin4Image( p->dd, p->vRoots, p->bCurrent, p->vVars2Q );
-        if ( p->bNext == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation in quantification.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            return -1;
-        }
-        Cudd_Ref( p->bNext );
-        p->timeImage += clock() - clkTemp;
-
-        // remap into current states
-        clkTemp = clock();
-        p->bNext = Cudd_bddVarMap( p->dd, bAux = p->bNext );
-        if ( p->bNext == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during remapping next states.\n",  p->pPars->TimeLimit );
-            Cudd_RecursiveDeref( p->dd, bAux );
-            p->pPars->iFrame = nIters - 1;
-            return -1;
-        }
-        Cudd_Ref( p->bNext );
-        Cudd_RecursiveDeref( p->dd, bAux );
-        p->timeRemap += clock() - clkTemp;
-
-        // collect statistics
-        if ( p->pPars->fVerbose )
-        {
-            nBddSizeFr  = Cudd_DagSize( p->bCurrent );
-            nBddSizeTo  = Cudd_DagSize( bAux );
-            nBddSizeTo2 = Cudd_DagSize( p->bNext );
-        }
-        Cudd_RecursiveDeref( p->dd, p->bCurrent ); p->bCurrent = NULL;
-
-        // derive new states
-        p->bCurrent = Cudd_bddAnd( p->dd, p->bNext, Cudd_Not(p->bReached) );     
-        if ( p->bCurrent == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation in transfer 1.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            return -1;
-        }
-        Cudd_Ref( p->bCurrent );
-        Cudd_RecursiveDeref( p->dd, p->bNext ); p->bNext = NULL;
-        if ( Cudd_IsConstant(p->bCurrent) )
-            break;
-/*
-        // reduce BDD size using constrain // Cudd_bddRestrict
-        p->bCurrent = Cudd_bddRestrict( p->dd, bAux = p->bCurrent, Cudd_Not(p->bReached) );   
-        Cudd_Ref( p->bCurrent );
-printf( "Before = %d.  After = %d.\n", Cudd_DagSize(bAux), Cudd_DagSize(p->bCurrent) );
-        Cudd_RecursiveDeref( p->dd, bAux );
-*/
-
-        // add to the reached set
-        p->bReached = Cudd_bddOr( p->dd, bAux = p->bReached, p->bCurrent );                 
-        if ( p->bReached == NULL )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached timeout (%d seconds) during image computation in transfer 1.\n",  p->pPars->TimeLimit );
-            p->pPars->iFrame = nIters - 1;
-            Cudd_RecursiveDeref( p->dd, bAux );  
-            return -1;
-        }
-        Cudd_Ref( p->bReached );
-        Cudd_RecursiveDeref( p->dd, bAux );  
-
-
-        // report the results
-        if ( p->pPars->fVerbose )
-        {
-            printf( "I =%5d : ",   nIters );
-            printf( "Fr =%7d  ",   nBddSizeFr );
-            printf( "ImNs =%7d  ", nBddSizeTo );
-            printf( "ImCs =%7d  ", nBddSizeTo2 );
-            printf( "Rea =%7d   ", Cudd_DagSize(p->bReached) );
-            printf( "(%4d %4d)  ", Cudd_ReadReorderings(p->dd), Cudd_ReadGarbageCollections(p->dd) );
-            Abc_PrintTime( 1, "T", clock() - clkIter );
-        }
-/*
-        if ( pPars->fVerbose )
-        {
-            double nMints = Cudd_CountMinterm(p->dd, bReached, Saig_ManRegNum(p->pAig) );
-//            Extra_bddPrint( p->dd, bReached );printf( "\n" );
-            printf( "Reachable states = %.0f. (Ratio = %.4f %%)\n", nMints, 100.0*nMints/pow(2.0, Saig_ManRegNum(p->pAig)) );
-            fflush( stdout ); 
-        }
-*/
-        if ( nIters == p->pPars->nIterMax - 1 )
-        {
-            if ( !p->pPars->fSilent )
-                printf( "Reached limit on the number of timeframes (%d).\n",  p->pPars->nIterMax );
-            p->pPars->iFrame = nIters;
-            return -1;
-        }
-    }
-    
-    // report the stats
-    if ( p->pPars->fVerbose )
-    {
-        double nMints = Cudd_CountMinterm(p->dd, p->bReached, Saig_ManRegNum(p->pAig) );
-        if ( p->bCurrent && Cudd_IsConstant(p->bCurrent) )
-            printf( "Reachability analysis completed after %d frames.\n", nIters );
-        else
-            printf( "Reachability analysis is stopped after %d frames.\n", nIters );
-        printf( "Reachable states = %.0f. (Ratio = %.4f %%)\n", nMints, 100.0*nMints/pow(2.0, Saig_ManRegNum(p->pAig)) );
-        fflush( stdout ); 
-    }
-    if ( p->bCurrent == NULL || !Cudd_IsConstant(p->bCurrent) )
-    {
-        if ( !p->pPars->fSilent )
-            printf( "Verified only for states reachable in %d frames.  ", nIters );
-        p->pPars->iFrame = p->pPars->nIterMax;
-        return -1; // undecided
-    }
-    // report
-    if ( !p->pPars->fSilent )
-        printf( "The miter is proved unreachable after %d iterations.  ", nIters );
-    p->pPars->iFrame = nIters - 1;
-    Abc_PrintTime( 1, "Time", clock() - clk );
-    return 1; // unreachable
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reorders BDDs in the working manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4Reorder( DdManager * dd, int fTwice, int fVerbose )
-{
-    int clk = clock();
-    if ( fVerbose )
-        Abc_Print( 1, "Reordering... Before =%5d. ", Cudd_ReadKeys(dd) - Cudd_ReadDead(dd) );
-    Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 100 );
-    if ( fVerbose )
-        Abc_Print( 1, "After =%5d. ", Cudd_ReadKeys(dd) - Cudd_ReadDead(dd) );
-    if ( fTwice )
-    {
-        Cudd_ReduceHeap( dd, CUDD_REORDER_SYMM_SIFT, 100 );
-        if ( fVerbose )
-            Abc_Print( 1, "After =%5d. ", Cudd_ReadKeys(dd) - Cudd_ReadDead(dd) );
-    }
-    if ( fVerbose )
-        Abc_PrintTime( 1, "Time", clock() - clk );
-}
- 
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Llb_Mnx_t * Llb_MnxStart( Aig_Man_t * pAig, Gia_ParLlb_t * pPars )
-{
-    Llb_Mnx_t * p;
-
-    p = ABC_CALLOC( Llb_Mnx_t, 1 );
-    p->pAig    = pAig;
-    p->pPars   = pPars;
-
-    // compute time to stop
-    p->pPars->TimeTarget = p->pPars->TimeLimit ? time(NULL) + p->pPars->TimeLimit : 0;
-
-    if ( pPars->fCluster )
-    {
-//        Llb_Nonlin4Cluster( p->pAig, &p->dd, &p->vOrder, &p->vRoots, pPars->nBddMax, pPars->fVerbose );
-//        Cudd_AutodynEnable( p->dd,  CUDD_REORDER_SYMM_SIFT );
-        Llb4_Nonlin4Sweep( p->pAig, pPars->nBddMax, pPars->nClusterMax, &p->dd, &p->vOrder, &p->vRoots, pPars->fVerbose );
-        // set the stop time parameter
-        p->dd->TimeStop  = p->pPars->TimeTarget;
-    }
-    else
-    {
-//    p->vOrder  = Llb_Nonlin4CreateOrderSimple( pAig );
-        p->vOrder  = Llb_Nonlin4CreateOrder( pAig );
-        p->dd      = Cudd_Init( Vec_IntCountPositive(p->vOrder) + 1, 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-        Cudd_AutodynEnable( p->dd,  CUDD_REORDER_SYMM_SIFT );
-        Cudd_SetMaxGrowth( p->dd, 1.05 );
-        // set the stop time parameter
-        p->dd->TimeStop  = p->pPars->TimeTarget;
-        p->vRoots  = Llb_Nonlin4DerivePartitions( p->dd, pAig, p->vOrder );
-    }
-
-    Llb_Nonlin4SetupVarMap( p->dd, pAig, p->vOrder );
-    p->vVars2Q = Llb_Nonlin4CreateVars2Q( p->dd, pAig, p->vOrder, p->pPars->fBackward );
-    p->vRings  = Vec_PtrAlloc( 100 );
-
-    if ( pPars->fReorder )
-        Llb_Nonlin4Reorder( p->dd, 0, 1 );
-    return p;
-}
- 
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MnxStop( Llb_Mnx_t * p )
-{
-    DdNode * bTemp;
-    int i;
-    if ( p->pPars->fVerbose ) 
-    {
-        p->timeReo = Cudd_ReadReorderingTime(p->dd);
-        p->timeOther = p->timeTotal - p->timeImage - p->timeRemap;
-        ABC_PRTP( "Image    ", p->timeImage, p->timeTotal );
-        ABC_PRTP( "Remap    ", p->timeRemap, p->timeTotal );
-        ABC_PRTP( "Other    ", p->timeOther, p->timeTotal );
-        ABC_PRTP( "TOTAL    ", p->timeTotal, p->timeTotal );
-        ABC_PRTP( "  reo    ", p->timeReo,   p->timeTotal );
-    }
-    // remove BDDs
-    if ( p->bBad )
-        Cudd_RecursiveDeref( p->dd, p->bBad );
-    if ( p->bReached )
-        Cudd_RecursiveDeref( p->dd, p->bReached );
-    if ( p->bCurrent )
-        Cudd_RecursiveDeref( p->dd, p->bCurrent );
-    if ( p->bNext )
-        Cudd_RecursiveDeref( p->dd, p->bNext );
-    if ( p->vRings )
-    Vec_PtrForEachEntry( DdNode *, p->vRings, bTemp, i )
-        Cudd_RecursiveDeref( p->dd, bTemp );
-    if ( p->vRoots )
-    Vec_PtrForEachEntry( DdNode *, p->vRoots, bTemp, i )
-        Cudd_RecursiveDeref( p->dd, bTemp );
-    // remove arrays
-    Vec_PtrFreeP( &p->vRings );
-    Vec_PtrFreeP( &p->vRoots );
-//Cudd_PrintInfo( p->dd, stdout );
-    Extra_StopManager( p->dd );
-    Vec_IntFreeP( &p->vOrder );
-    Vec_IntFreeP( &p->vVars2Q );
-    ABC_FREE( p );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_MnxCheckNextStateVars( Llb_Mnx_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i, Counter0 = 0, Counter1 = 0;
-    Saig_ManForEachLi( p->pAig, pObj, i )
-        if ( Saig_ObjIsLo(p->pAig, Aig_ObjFanin0(pObj)) )
-        {
-            if ( Aig_ObjFaninC0(pObj) )
-                Counter0++;
-            else
-                Counter1++;
-        }
-    printf( "Total = %d.  Direct LO = %d. Compl LO = %d.\n", Aig_ManRegNum(p->pAig), Counter1, Counter0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds balanced cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb_Nonlin4CoreReach( Aig_Man_t * pAig, Gia_ParLlb_t * pPars )
-{
-    Llb_Mnx_t * pMnn;
-    int RetValue = -1;
-    if ( pPars->fVerbose )
-    Aig_ManPrintStats( pAig );
-    if ( pPars->fCluster && Aig_ManObjNum(pAig) >= (1 << 15) )
-    {
-        printf( "The number of objects is more than 2^15.  Clustering cannot be used.\n" );
-        return RetValue;
-    }
-    {
-        int clk = clock();
-        pMnn = Llb_MnxStart( pAig, pPars );
-//Llb_MnxCheckNextStateVars( pMnn );
-        if ( !pPars->fSkipReach )
-            RetValue = Llb_Nonlin4Reachability( pMnn );
-        pMnn->timeTotal = clock() - clk;
-        Llb_MnxStop( pMnn );
-    }
-    return RetValue;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llb4Sweep.c b/src/aig/llb/llb4Sweep.c
deleted file mode 100644
index d13c366f..00000000
--- a/src/aig/llb/llb4Sweep.c
+++ /dev/null
@@ -1,588 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llb2Sweep.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD based reachability.]
-
-  Synopsis    [Non-linear quantification scheduling.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: llb2Sweep.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "llbInt.h"
-
-ABC_NAMESPACE_IMPL_START
- 
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Find good static variable ordering.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4SweepOrder_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj, Vec_Int_t * vOrder, int * pCounter, int fSaveAll )
-{
-    Aig_Obj_t * pFanin0, * pFanin1;
-    if ( Aig_ObjIsTravIdCurrent(pAig, pObj) )
-        return;
-    Aig_ObjSetTravIdCurrent( pAig, pObj );
-    assert( Llb_ObjBddVar(vOrder, pObj) < 0 );
-    if ( Aig_ObjIsPi(pObj) )
-    {
-        Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), (*pCounter)++ );
-        return;
-    }
-    // try fanins with higher level first
-    pFanin0 = Aig_ObjFanin0(pObj);
-    pFanin1 = Aig_ObjFanin1(pObj);
-//    if ( pFanin0->Level > pFanin1->Level || (pFanin0->Level == pFanin1->Level && pFanin0->Id < pFanin1->Id) )
-    if ( pFanin0->Level > pFanin1->Level )
-    {
-        Llb_Nonlin4SweepOrder_rec( pAig, pFanin0, vOrder, pCounter, fSaveAll );
-        Llb_Nonlin4SweepOrder_rec( pAig, pFanin1, vOrder, pCounter, fSaveAll );
-    }
-    else
-    {
-        Llb_Nonlin4SweepOrder_rec( pAig, pFanin1, vOrder, pCounter, fSaveAll );
-        Llb_Nonlin4SweepOrder_rec( pAig, pFanin0, vOrder, pCounter, fSaveAll );
-    }
-    if ( fSaveAll || pObj->fMarkA )
-        Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), (*pCounter)++ );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find good static variable ordering.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_Nonlin4SweepOrder( Aig_Man_t * pAig, int * pCounter, int fSaveAll )
-{
-    Vec_Int_t * vOrder;
-    Aig_Obj_t * pObj;
-    int i, Counter = 0;
-    // collect nodes in the order
-    vOrder = Vec_IntStartFull( Aig_ManObjNumMax(pAig) );
-    Aig_ManIncrementTravId( pAig );
-    Aig_ObjSetTravIdCurrent( pAig, Aig_ManConst1(pAig) );
-    Aig_ManForEachPo( pAig, pObj, i )
-    {
-        Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), Counter++ );
-        Llb_Nonlin4SweepOrder_rec( pAig, Aig_ObjFanin0(pObj), vOrder, &Counter, fSaveAll );
-    }
-    Aig_ManForEachPi( pAig, pObj, i )
-        if ( Llb_ObjBddVar(vOrder, pObj) < 0 )
-            Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), Counter++ );
-//    assert( Counter == Aig_ManObjNum(pAig) - 1 ); // no dangling nodes
-    if ( pCounter )
-        *pCounter = Counter - Aig_ManPiNum(pAig) - Aig_ManPoNum(pAig);
-    return vOrder;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs BDD sweep on the netlist.]
-
-  Description [Returns AIG with internal cut points labeled with fMarkA.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Llb4_Nonlin4SweepCutpoints( Aig_Man_t * pAig, Vec_Int_t * vOrder, int nBddLimit, int fVerbose )
-{
-    DdManager * dd;
-    DdNode * bFunc0, * bFunc1, * bFunc;
-    Aig_Obj_t * pObj;
-    int i, Counter = 0, Counter1 = 0;
-    dd = Cudd_Init( Aig_ManObjNumMax(pAig), 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    // assign elementary variables
-    Aig_ManCleanData( pAig );
-    Aig_ManForEachPi( pAig, pObj, i )
-        pObj->pData = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );
-    // sweep internal nodes
-    Aig_ManForEachNode( pAig, pObj, i )
-    {
-/*
-        if ( pObj->nRefs >= 4 )
-        {
-            bFunc = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );  Cudd_Ref( bFunc );
-            pObj->pData = bFunc;
-            Counter1++;
-            continue;
-        }
-*/
-        bFunc0 = Cudd_NotCond( (DdNode *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-        bFunc1 = Cudd_NotCond( (DdNode *)Aig_ObjFanin1(pObj)->pData, Aig_ObjFaninC1(pObj) );
-        bFunc  = Cudd_bddAnd( dd, bFunc0, bFunc1 );  Cudd_Ref( bFunc );
-        if ( Cudd_DagSize(bFunc) > nBddLimit )
-        {
-//            if ( fVerbose )
-//                printf( "Node %5d : Beg =%5d. ", i, Cudd_DagSize(bFunc) );
-
-            // add cutpoint at a larger one
-            Cudd_RecursiveDeref( dd, bFunc );
-            if ( Cudd_DagSize(bFunc0) >= Cudd_DagSize(bFunc1) )
-            {
-                Cudd_RecursiveDeref( dd, (DdNode *)Aig_ObjFanin0(pObj)->pData );
-                bFunc = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, Aig_ObjFanin0(pObj)) );
-                Aig_ObjFanin0(pObj)->pData = bFunc;  Cudd_Ref( bFunc );
-                Aig_ObjFanin0(pObj)->fMarkA = 1;
-
-//                if ( fVerbose )
-//                    printf( "Ref =%3d  ", Aig_ObjFanin0(pObj)->nRefs );
-            }
-            else
-            {
-                Cudd_RecursiveDeref( dd, (DdNode *)Aig_ObjFanin1(pObj)->pData );
-                bFunc = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, Aig_ObjFanin1(pObj)) );
-                Aig_ObjFanin1(pObj)->pData = bFunc;  Cudd_Ref( bFunc );
-                Aig_ObjFanin1(pObj)->fMarkA = 1;
-
-//                if ( fVerbose )
-//                    printf( "Ref =%3d  ", Aig_ObjFanin1(pObj)->nRefs );
-            }
-            // perform new operation
-            bFunc0 = Cudd_NotCond( (DdNode *)Aig_ObjFanin0(pObj)->pData, Aig_ObjFaninC0(pObj) );
-            bFunc1 = Cudd_NotCond( (DdNode *)Aig_ObjFanin1(pObj)->pData, Aig_ObjFaninC1(pObj) );
-            bFunc  = Cudd_bddAnd( dd, bFunc0, bFunc1 );  Cudd_Ref( bFunc );
-//            assert( Cudd_DagSize(bFunc) <= nBddLimit );
-
-//            if ( fVerbose )
-//                printf( "End =%5d.\n", Cudd_DagSize(bFunc) );
-            Counter++;
-        }
-        pObj->pData = bFunc;
-//printf( "%d ", Cudd_DagSize(bFunc) );
-    }
-//printf( "\n" );
-    // clean up
-    Aig_ManForEachNode( pAig, pObj, i )
-        Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-    Extra_StopManager( dd );
-//    Aig_ManCleanMarkA( pAig );
-    if ( fVerbose )
-    printf( "Added %d cut points.  Used %d high fanout points.\n", Counter, Counter1 );
-    return Counter + Counter1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives BDDs for the partitions.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb_Nonlin4SweepPartitions_rec( DdManager * dd, Aig_Obj_t * pObj, Vec_Int_t * vOrder, Vec_Ptr_t * vRoots )
-{
-    DdNode * bBdd, * bBdd0, * bBdd1, * bPart, * vVar;
-    if ( Aig_ObjIsConst1(pObj) )
-        return Cudd_ReadOne(dd); 
-    if ( Aig_ObjIsPi(pObj) )
-        return Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );
-    if ( pObj->pData )
-        return (DdNode *)pObj->pData;
-    if ( Aig_ObjIsPo(pObj) )
-    {
-        bBdd0 = Cudd_NotCond( Llb_Nonlin4SweepPartitions_rec(dd, Aig_ObjFanin0(pObj), vOrder, vRoots), Aig_ObjFaninC0(pObj) );
-        bPart = Cudd_bddXnor( dd, Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) ), bBdd0 );  Cudd_Ref( bPart );
-        Vec_PtrPush( vRoots, bPart );
-        return NULL;
-    }
-    bBdd0 = Cudd_NotCond( Llb_Nonlin4SweepPartitions_rec(dd, Aig_ObjFanin0(pObj), vOrder, vRoots), Aig_ObjFaninC0(pObj) );
-    bBdd1 = Cudd_NotCond( Llb_Nonlin4SweepPartitions_rec(dd, Aig_ObjFanin1(pObj), vOrder, vRoots), Aig_ObjFaninC1(pObj) );
-    bBdd  = Cudd_bddAnd( dd, bBdd0, bBdd1 );   Cudd_Ref( bBdd );
-    if ( Llb_ObjBddVar(vOrder, pObj) >= 0 )
-    {
-        vVar  = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );
-        bPart = Cudd_bddXnor( dd, vVar, bBdd );  Cudd_Ref( bPart );
-        Vec_PtrPush( vRoots, bPart );
-        Cudd_RecursiveDeref( dd, bBdd );
-        bBdd = vVar;  Cudd_Ref( vVar );
-    }
-    pObj->pData = bBdd;
-    return bBdd;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives BDDs for the partitions.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Llb_Nonlin4SweepPartitions( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vOrder, int fTransition )
-{
-    Vec_Ptr_t * vRoots;
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManCleanData( pAig );
-    vRoots = Vec_PtrAlloc( 100 );
-    if ( fTransition )
-    {
-        Saig_ManForEachLi( pAig, pObj, i )
-            Llb_Nonlin4SweepPartitions_rec( dd, pObj, vOrder, vRoots );
-    }
-    else
-    {
-        Saig_ManForEachPo( pAig, pObj, i )
-            Llb_Nonlin4SweepPartitions_rec( dd, pObj, vOrder, vRoots );
-    }
-    Aig_ManForEachNode( pAig, pObj, i )
-        if ( pObj->pData )
-            Cudd_RecursiveDeref( dd, (DdNode *)pObj->pData );
-    return vRoots;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Get bad state monitor.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdNode * Llb4_Nonlin4SweepBadMonitor( Aig_Man_t * pAig, Vec_Int_t * vOrder, DdManager * dd )
-{
-    Aig_Obj_t * pObj;
-    DdNode * bRes, * bVar, * bTemp;
-    int i, TimeStop;
-    TimeStop = dd->TimeStop;  dd->TimeStop = 0;
-    bRes = Cudd_ReadOne( dd );   Cudd_Ref( bRes );
-    Saig_ManForEachPo( pAig, pObj, i )
-    {
-        bVar = Cudd_bddIthVar( dd, Llb_ObjBddVar(vOrder, pObj) );
-        bRes = Cudd_bddAnd( dd, bTemp = bRes, Cudd_Not(bVar) );  Cudd_Ref( bRes );
-        Cudd_RecursiveDeref( dd, bTemp );
-    }
-    Cudd_Deref( bRes );
-    dd->TimeStop = TimeStop;
-    return Cudd_Not(bRes);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates quantifiable variables for both types of traversal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Llb_Nonlin4SweepVars2Q( Aig_Man_t * pAig, Vec_Int_t * vOrder, int fAddLis )
-{
-    Vec_Int_t * vVars2Q;
-    Aig_Obj_t * pObj;
-    int i;
-    vVars2Q = Vec_IntAlloc( 0 );
-    Vec_IntFill( vVars2Q, Aig_ManObjNumMax(pAig), 1 );
-    // add flop outputs
-    Saig_ManForEachLo( pAig, pObj, i )
-        Vec_IntWriteEntry( vVars2Q, Llb_ObjBddVar(vOrder, pObj), 0 );
-    // add flop inputs
-    if ( fAddLis )
-    Saig_ManForEachLi( pAig, pObj, i )
-        Vec_IntWriteEntry( vVars2Q, Llb_ObjBddVar(vOrder, pObj), 0 );
-    return vVars2Q;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Multiply every partition by the cube.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4SweepDeref( DdManager * dd, Vec_Ptr_t * vParts )
-{
-    DdNode * bFunc;
-    int i;
-    Vec_PtrForEachEntry( DdNode *, vParts, bFunc, i )
-        Cudd_RecursiveDeref( dd, bFunc );
-    Vec_PtrFree( vParts );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Multiply every partition by the cube.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4SweepPrint( Vec_Ptr_t * vFuncs )
-{
-    DdNode * bFunc;
-    int i;
-    printf( "(%d) ", Vec_PtrSize(vFuncs) );
-    Vec_PtrForEachEntry( DdNode *, vFuncs, bFunc, i )
-        printf( "%d ", Cudd_DagSize(bFunc) );
-    printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes bad states.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdManager * Llb4_Nonlin4SweepBadStates( Aig_Man_t * pAig, Vec_Int_t * vOrder, int nVars )
-{
-    DdManager * dd;
-    Vec_Ptr_t * vParts;
-    Vec_Int_t * vVars2Q;
-    DdNode * bMonitor, * bImage;
-    // get quantifiable variables
-    vVars2Q = Llb_Nonlin4SweepVars2Q( pAig, vOrder, 0 );
-    // start BDD manager and create partitions 
-    dd = Cudd_Init( nVars, 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    vParts = Llb_Nonlin4SweepPartitions( dd, pAig, vOrder, 0 );
-//printf( "Outputs: " );
-//Llb_Nonlin4SweepPrint( vParts );
-    // compute image of the partitions
-    bMonitor = Llb4_Nonlin4SweepBadMonitor( pAig, vOrder, dd );  Cudd_Ref( bMonitor );
-    Cudd_AutodynEnable( dd,  CUDD_REORDER_SYMM_SIFT );
-    bImage = Llb_Nonlin4Image( dd, vParts, bMonitor, vVars2Q );  Cudd_Ref( bImage );
-    Cudd_RecursiveDeref( dd, bMonitor );
-    Llb_Nonlin4SweepDeref( dd, vParts );
-    Vec_IntFree( vVars2Q );
-    // save image and return
-    dd->bFunc = bImage;
-    return dd;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes clusters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-DdManager * Llb4_Nonlin4SweepGroups( Aig_Man_t * pAig, Vec_Int_t * vOrder, int nVars, Vec_Ptr_t ** pvGroups, int nBddLimitClp, int fVerbose )
-{
-    DdManager * dd;
-    Vec_Ptr_t * vParts;
-    Vec_Int_t * vVars2Q;
-    // get quantifiable variables
-    vVars2Q = Llb_Nonlin4SweepVars2Q( pAig, vOrder, 1 );
-    // start BDD manager and create partitions 
-    dd = Cudd_Init( nVars, 0, CUDD_UNIQUE_SLOTS, CUDD_CACHE_SLOTS, 0 );
-    vParts = Llb_Nonlin4SweepPartitions( dd, pAig, vOrder, 1 );
-//printf( "Transitions: " );
-//Llb_Nonlin4SweepPrint( vParts );
-    // compute image of the partitions
-
-    Cudd_AutodynEnable( dd,  CUDD_REORDER_SYMM_SIFT );
-    *pvGroups = Llb_Nonlin4Group( dd, vParts, vVars2Q, nBddLimitClp );
-    Llb_Nonlin4SweepDeref( dd, vParts );
-//    *pvGroups = vParts;
-
-if ( fVerbose )
-{
-printf( "Groups: " );
-Llb_Nonlin4SweepPrint( *pvGroups );
-}
-
-    Vec_IntFree( vVars2Q );
-    return dd;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Creates quantifiable variables for both types of traversal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb_Nonlin4SweepPrintSuppProfile( DdManager * dd, Aig_Man_t * pAig, Vec_Int_t * vOrder, Vec_Ptr_t * vGroups, int fVerbose )
-{
-    Aig_Obj_t * pObj;
-    int i, * pSupp;
-    int nSuppAll = 0, nSuppPi = 0, nSuppPo = 0, nSuppLi = 0, nSuppLo = 0, nSuppAnd = 0;
-
-    pSupp = ABC_CALLOC( int, Cudd_ReadSize(dd) );
-    Extra_VectorSupportArray( dd, (DdNode **)Vec_PtrArray(vGroups), Vec_PtrSize(vGroups), pSupp );
-
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        if ( Llb_ObjBddVar(vOrder, pObj) < 0 )
-            continue;
-        // remove variables that do not participate
-        if ( pSupp[Llb_ObjBddVar(vOrder, pObj)] == 0 )
-        {
-            if ( Aig_ObjIsNode(pObj) )
-                Vec_IntWriteEntry( vOrder, Aig_ObjId(pObj), -1 );
-            continue;
-        }
-        nSuppAll++;
-        if ( Saig_ObjIsPi(pAig, pObj) )
-            nSuppPi++;
-        else if ( Saig_ObjIsLo(pAig, pObj) )
-            nSuppLo++;
-        else if ( Saig_ObjIsPo(pAig, pObj) )
-            nSuppPo++;
-        else if ( Saig_ObjIsLi(pAig, pObj) )
-            nSuppLi++;
-        else
-            nSuppAnd++;
-    }
-    ABC_FREE( pSupp );
-
-    if ( fVerbose )
-    {
-    printf( "Groups =%3d  ", Vec_PtrSize(vGroups) );
-    printf( "Variables: all =%4d ",  nSuppAll );
-    printf( "pi =%4d ",  nSuppPi );
-    printf( "po =%4d ",  nSuppPo );
-    printf( "lo =%4d ",  nSuppLo );
-    printf( "li =%4d ",  nSuppLi );
-    printf( "and =%4d",  nSuppAnd );
-    printf( "\n" );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs BDD sweep on the netlist.]
-
-  Description [Returns BDD manager, ordering, clusters, and bad states 
-  inside dd->bFunc.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb4_Nonlin4Sweep( Aig_Man_t * pAig, int nSweepMax, int nClusterMax, DdManager ** pdd, Vec_Int_t ** pvOrder, Vec_Ptr_t ** pvGroups, int fVerbose )
-{
-    DdManager * ddBad, * ddWork;
-    Vec_Ptr_t * vGroups;
-    Vec_Int_t * vOrder;
-    int Counter, nCutPoints;
-
-    // get the original ordering
-    Aig_ManCleanMarkA( pAig );
-    vOrder = Llb_Nonlin4SweepOrder( pAig, &Counter, 1 );
-    assert( Counter == Aig_ManNodeNum(pAig) );
-    // mark the nodes
-    nCutPoints = Llb4_Nonlin4SweepCutpoints( pAig, vOrder, nSweepMax, fVerbose );
-    Vec_IntFree( vOrder );
-    // get better ordering
-    vOrder = Llb_Nonlin4SweepOrder( pAig, &Counter, 0 );
-    assert( Counter == nCutPoints );
-    Aig_ManCleanMarkA( pAig );
-    // compute the BAD states
-    ddBad = Llb4_Nonlin4SweepBadStates( pAig, vOrder, nCutPoints + Aig_ManPiNum(pAig) + Aig_ManPoNum(pAig) );
-    // compute the clusters
-    ddWork = Llb4_Nonlin4SweepGroups( pAig, vOrder, nCutPoints + Aig_ManPiNum(pAig) + Aig_ManPoNum(pAig), &vGroups, nClusterMax, fVerbose );
-    // transfer the result from the Bad manager
-//printf( "Bad before = %d.\n", Cudd_DagSize(ddBad->bFunc) );
-    ddWork->bFunc = Cudd_bddTransfer( ddBad, ddWork, ddBad->bFunc );   Cudd_Ref( ddWork->bFunc );
-    Cudd_RecursiveDeref( ddBad, ddBad->bFunc );  ddBad->bFunc = NULL;
-    Extra_StopManager( ddBad );
-    // update ordering to exclude quantified variables
-//printf( "Bad after = %d.\n", Cudd_DagSize(ddWork->bFunc) );
-
-    Llb_Nonlin4SweepPrintSuppProfile( ddWork, pAig, vOrder, vGroups, fVerbose );
-
-    // return the result
-    *pdd = ddWork;
-    *pvOrder = vOrder;
-    *pvGroups = vGroups;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs BDD sweep on the netlist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Llb4_Nonlin4SweepExperiment( Aig_Man_t * pAig )
-{
-    DdManager * dd;
-    Vec_Int_t * vOrder;
-    Vec_Ptr_t * vGroups;
-    Llb4_Nonlin4Sweep( pAig, 100, 500, &dd, &vOrder, &vGroups, 1 );
-
-    Llb_Nonlin4SweepDeref( dd, vGroups );
-
-    Cudd_RecursiveDeref( dd, dd->bFunc );
-    Extra_StopManager( dd );
-    Vec_IntFree( vOrder );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/llb/llbInt.h b/src/aig/llb/llbInt.h
deleted file mode 100644
index 4bc2496d..00000000
--- a/src/aig/llb/llbInt.h
+++ /dev/null
@@ -1,212 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [llbInt.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [BDD-based reachability.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - May 8, 2010.]
-
-  Revision    [$Id: llbInt.h,v 1.00 2010/05/08 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __LLB_INT_H__
-#define __LLB_INT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include <stdio.h>
-#include "aig.h"
-#include "saig.h"
-#include "ssw.h"
-#include "cuddInt.h"
-#include "extra.h"
-#include "llb.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-ABC_NAMESPACE_HEADER_START
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Llb_Man_t_ Llb_Man_t;
-typedef struct Llb_Mtr_t_ Llb_Mtr_t;
-typedef struct Llb_Grp_t_ Llb_Grp_t;
-
-struct Llb_Man_t_
-{
-    Gia_ParLlb_t *  pPars;          // parameters
-    Aig_Man_t *     pAigGlo;        // initial AIG manager (owned by the caller)
-    Aig_Man_t *     pAig;           // derived AIG manager (created in this package)
-    DdManager *     dd;             // BDD manager
-    DdManager *     ddG;            // BDD manager
-    DdManager *     ddR;            // BDD manager
-    Vec_Int_t *     vObj2Var;       // mapping AIG ObjId into BDD var index
-    Vec_Int_t *     vVar2Obj;       // mapping BDD var index into AIG ObjId
-    Vec_Ptr_t *     vGroups;        // group Id into group pointer
-    Llb_Mtr_t *     pMatrix;        // dependency matrix
-    // image computation
-    Vec_Ptr_t *     vRings;         // onion rings
-    Vec_Int_t *     vVarBegs;       // the first group where the var appears  
-    Vec_Int_t *     vVarEnds;       // the last group where the var appears 
-    // variable mapping
-    Vec_Int_t *     vNs2Glo;        // next state variables into global variables
-    Vec_Int_t *     vCs2Glo;        // next state variables into global variables
-    Vec_Int_t *     vGlo2Cs;        // global variables into current state variables
-    Vec_Int_t *     vGlo2Ns;        // global variables into current state variables
-    // flow computation
-//    Vec_Int_t *     vMem;
-//    Vec_Ptr_t *     vTops;
-//    Vec_Ptr_t *     vBots;
-//    Vec_Ptr_t *     vCuts;
-};
-
-struct Llb_Mtr_t_
-{
-    int             nPis;           // number of primary inputs
-    int             nFfs;           // number of flip-flops
-    int             nRows;          // number of rows
-    int             nCols;          // number of columns
-    int *           pColSums;       // sum of values in a column
-    Llb_Grp_t **    pColGrps;       // group structure for each col
-    int *           pRowSums;       // sum of values in a row
-    char **         pMatrix;        // dependency matrix
-    Llb_Man_t *     pMan;           // manager
-    // partial product
-    char *          pProdVars;      // variables in the partial product
-    int *           pProdNums;      // var counts in the remaining partitions
-};
-
-struct Llb_Grp_t_
-{
-    int             Id;             // group ID
-    Vec_Ptr_t *     vIns;           // input AIG objs
-    Vec_Ptr_t *     vOuts;          // output AIG objs
-    Vec_Ptr_t *     vNodes;         // internal AIG objs
-    Llb_Man_t *     pMan;           // manager
-    Llb_Grp_t *     pPrev;          // previous group
-    Llb_Grp_t *     pNext;          // next group
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-static inline int Llb_ObjBddVar( Vec_Int_t * vOrder, Aig_Obj_t * pObj ) { return Vec_IntEntry(vOrder, Aig_ObjId(pObj)); }
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== llbConstr.c ======================================================*/
-extern Vec_Int_t *     Llb_ManDeriveConstraints( Aig_Man_t * p );
-extern void            Llb_ManPrintEntries( Aig_Man_t * p, Vec_Int_t * vCands );
-/*=== llbCore.c ======================================================*/
-extern int             Llb_ManModelCheckAig( Aig_Man_t * pAigGlo, Gia_ParLlb_t * pPars, Vec_Int_t * vHints, DdManager ** pddGlo );
-/*=== llbCluster.c ======================================================*/
-extern void            Llb_ManCluster( Llb_Mtr_t * p );
-/*=== llbDump.c ======================================================*/
-extern void            Llb_ManDumpReached( DdManager * ddG, DdNode * bReached, char * pModel, char * pFileName );
-/*=== llbFlow.c ======================================================*/
-extern Vec_Ptr_t *     Llb_ManFlow( Aig_Man_t * p, Vec_Ptr_t * vSources, int * pnFlow );
-/*=== llbHint.c ======================================================*/
-extern int             Llb_ManReachabilityWithHints( Llb_Man_t * p );
-extern int             Llb_ManModelCheckAigWithHints( Aig_Man_t * pAigGlo, Gia_ParLlb_t * pPars );
-/*=== llbMan.c =======================================================*/
-extern void            Llb_ManPrepareVarMap( Llb_Man_t * p );
-extern Llb_Man_t *     Llb_ManStart( Aig_Man_t * pAigGlo, Aig_Man_t * pAig, Gia_ParLlb_t *  pPars );
-extern void            Llb_ManStop( Llb_Man_t * p );
-/*=== llbMatrix.c ====================================================*/
-extern void            Llb_MtrVerifyMatrix( Llb_Mtr_t * p );
-extern Llb_Mtr_t *     Llb_MtrCreate( Llb_Man_t * p );
-extern void            Llb_MtrFree( Llb_Mtr_t * p );
-extern void            Llb_MtrPrint( Llb_Mtr_t * p, int fOrder );
-extern void            Llb_MtrPrintMatrixStats( Llb_Mtr_t * p ); 
-/*=== llbPart.c ======================================================*/
-extern Llb_Grp_t *     Llb_ManGroupAlloc( Llb_Man_t * pMan );
-extern void            Llb_ManGroupStop( Llb_Grp_t * p );
-extern void            Llb_ManPrepareGroups( Llb_Man_t * pMan );
-extern Llb_Grp_t *     Llb_ManGroupsCombine( Llb_Grp_t * p1, Llb_Grp_t * p2 );
-extern Llb_Grp_t *     Llb_ManGroupCreateFromCuts( Llb_Man_t * pMan, Vec_Int_t * vCut1, Vec_Int_t * vCut2 );
-extern void            Llb_ManPrepareVarLimits( Llb_Man_t * p );
-/*=== llbPivot.c =====================================================*/
-extern int             Llb_ManTracePaths( Aig_Man_t * p, Aig_Obj_t * pPivot );
-extern Vec_Int_t *     Llb_ManMarkPivotNodes( Aig_Man_t * p, int fUseInternal );
-/*=== llbReach.c =====================================================*/
-extern int             Llb_ManReachability( Llb_Man_t * p, Vec_Int_t * vHints, DdManager ** pddGlo );
-/*=== llbSched.c =====================================================*/
-extern void            Llb_MtrSchedule( Llb_Mtr_t * p );
-
-/*=== llb2Bad.c ======================================================*/
-extern DdNode *        Llb_BddComputeBad( Aig_Man_t * pInit, DdManager * dd, int TimeOut );
-extern DdNode *        Llb_BddQuantifyPis( Aig_Man_t * pInit, DdManager * dd, DdNode * bFunc );
-/*=== llb2Core.c ======================================================*/
-extern DdNode *        Llb_CoreComputeCube( DdManager * dd, Vec_Int_t * vVars, int fUseVarIndex, char * pValues );
-extern int             Llb_CoreExperiment( Aig_Man_t * pInit, Aig_Man_t * pAig, Gia_ParLlb_t * pPars, Vec_Ptr_t * vResult, int TimeTarget ); 
-/*=== llb2Driver.c ======================================================*/
-extern Vec_Int_t *     Llb_DriverCountRefs( Aig_Man_t * p );
-extern Vec_Int_t *     Llb_DriverCollectNs( Aig_Man_t * pAig, Vec_Int_t * vDriRefs );
-extern Vec_Int_t *     Llb_DriverCollectCs( Aig_Man_t * pAig );
-extern DdNode *        Llb_DriverPhaseCube( Aig_Man_t * pAig, Vec_Int_t * vDriRefs, DdManager * dd );
-extern DdManager *     Llb_DriverLastPartition( Aig_Man_t * p, Vec_Int_t * vVarsNs, int TimeTarget );
-/*=== llb2Image.c ======================================================*/
-extern Vec_Ptr_t *     Llb_ImgSupports( Aig_Man_t * p, Vec_Ptr_t * vDdMans, Vec_Int_t * vStart, Vec_Int_t * vStop, int fAddPis, int fVerbose );
-extern void            Llb_ImgSchedule( Vec_Ptr_t * vSupps, Vec_Ptr_t ** pvQuant0, Vec_Ptr_t ** pvQuant1, int fVerbose );
-extern DdManager *     Llb_ImgPartition( Aig_Man_t * p, Vec_Ptr_t * vLower, Vec_Ptr_t * vUpper, int TimeTarget );
-extern void            Llb_ImgQuantifyFirst( Aig_Man_t * pAig, Vec_Ptr_t * vDdMans, Vec_Ptr_t * vQuant0, int fVerbose );
-extern void            Llb_ImgQuantifyReset( Vec_Ptr_t * vDdMans );
-extern DdNode *        Llb_ImgComputeImage( Aig_Man_t * pAig, Vec_Ptr_t * vDdMans, DdManager * dd, DdNode * bInit, 
-                           Vec_Ptr_t * vQuant0, Vec_Ptr_t * vQuant1, Vec_Int_t * vDriRefs, 
-                           int TimeTarget, int fBackward, int fReorder, int fVerbose );
-
-extern DdManager *     Llb_NonlinImageStart( Aig_Man_t * pAig, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vRoots, int * pVars2Q, int * pOrder, int fFirst, int TimeTarget );
-extern DdNode *        Llb_NonlinImageCompute( DdNode * bCurrent, int fReorder, int fDrop, int fVerbose, int * pOrder );
-extern void            Llb_NonlinImageQuit();
-
-/*=== llb3Image.c =======================================================*/
-extern DdNode *        Llb_NonlinImage( Aig_Man_t * pAig, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vRoots, int * pVars2Q, 
-                           DdManager * dd, DdNode * bCurrent, int fReorder, int fVerbose, int * pOrder, int Limit, int TimeTarget );
-/*=== llb3Nonlin.c ======================================================*/
-extern DdNode *        Llb_NonlinComputeInitState( Aig_Man_t * pAig, DdManager * dd );
-
-
-/*=== llb4Cex.c =======================================================*/
-extern Abc_Cex_t *     Llb4_Nonlin4TransformCex( Aig_Man_t * pAig, Vec_Ptr_t * vStates, int iCexPo, int fVerbose );
-/*=== llb4Cluster.c =======================================================*/
-//extern void            Llb_Nonlin4Cluster( Aig_Man_t * pAig, DdManager ** pdd, Vec_Int_t ** pvOrder, Vec_Ptr_t ** pvGroups, int nBddMax, int fVerbose );
-/*=== llb4Image.c =======================================================*/
-extern DdNode *        Llb_Nonlin4Image( DdManager * dd, Vec_Ptr_t * vParts, DdNode * bCurrent, Vec_Int_t * vVars2Q );
-extern Vec_Ptr_t *     Llb_Nonlin4Group( DdManager * dd, Vec_Ptr_t * vParts, Vec_Int_t * vVars2Q, int nSizeMax );
-/*=== llb4Map.c =========================================================*/
-//extern Vec_Int_t *     Llb_AigMap( Aig_Man_t * pAig, int nLutSize, int nLutMin );
-/*=== llb4Nonlin.c ======================================================*/
-//extern int             Llb_Nonlin4CoreReach( Aig_Man_t * pAig, Gia_ParLlb_t * pPars );
-/*=== llb4Sweep.c ======================================================*/
-extern void            Llb4_Nonlin4Sweep( Aig_Man_t * pAig, int nSweepMax, int nClusterMax, DdManager ** pdd, Vec_Int_t ** pvOrder, Vec_Ptr_t ** pvGroups, int fVerbose );
- 
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/llb/module.make b/src/aig/llb/module.make
deleted file mode 100644
index 1e8ea974..00000000
--- a/src/aig/llb/module.make
+++ /dev/null
@@ -1,23 +0,0 @@
-SRC +=    src/aig/llb/llb.c \
-    src/aig/llb/llb1Cluster.c \
-    src/aig/llb/llb1Constr.c \
-    src/aig/llb/llb1Core.c \
-    src/aig/llb/llb1Group.c \
-    src/aig/llb/llb1Hint.c \
-    src/aig/llb/llb1Man.c \
-    src/aig/llb/llb1Matrix.c \
-    src/aig/llb/llb1Pivot.c \
-    src/aig/llb/llb1Reach.c \
-    src/aig/llb/llb1Sched.c \
-    src/aig/llb/llb2Bad.c \
-    src/aig/llb/llb2Core.c \
-    src/aig/llb/llb2Driver.c \
-    src/aig/llb/llb2Dump.c \
-    src/aig/llb/llb2Flow.c \
-    src/aig/llb/llb2Image.c \
-    src/aig/llb/llb3Image.c \
-    src/aig/llb/llb3Nonlin.c \
-    src/aig/llb/llb4Cex.c \
-    src/aig/llb/llb4Image.c \
-    src/aig/llb/llb4Nonlin.c \
-    src/aig/llb/llb4Sweep.c
diff --git a/src/aig/mem/mem.c b/src/aig/mem/mem.c
deleted file mode 100644
index 23d8d7ec..00000000
--- a/src/aig/mem/mem.c
+++ /dev/null
@@ -1,605 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [esopMem.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Cover manipulation package.]
-
-  Synopsis    [Memory managers.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: esopMem.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-
-#include "mem.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-struct Mem_Fixed_t_
-{
-    // information about individual entries
-    int           nEntrySize;    // the size of one entry
-    int           nEntriesAlloc; // the total number of entries allocated
-    int           nEntriesUsed;  // the number of entries in use
-    int           nEntriesMax;   // the max number of entries in use
-    char *        pEntriesFree;  // the linked list of free entries
-
-    // this is where the memory is stored
-    int           nChunkSize;    // the size of one chunk
-    int           nChunksAlloc;  // the maximum number of memory chunks 
-    int           nChunks;       // the current number of memory chunks 
-    char **       pChunks;       // the allocated memory
-
-    // statistics
-    int           nMemoryUsed;   // memory used in the allocated entries
-    int           nMemoryAlloc;  // memory allocated
-};
-
-struct Mem_Flex_t_
-{
-    // information about individual entries
-    int           nEntriesUsed;  // the number of entries allocated
-    char *        pCurrent;      // the current pointer to free memory
-    char *        pEnd;          // the first entry outside the free memory
-
-    // this is where the memory is stored
-    int           nChunkSize;    // the size of one chunk
-    int           nChunksAlloc;  // the maximum number of memory chunks 
-    int           nChunks;       // the current number of memory chunks 
-    char **       pChunks;       // the allocated memory
-
-    // statistics
-    int           nMemoryUsed;   // memory used in the allocated entries
-    int           nMemoryAlloc;  // memory allocated
-};
-
-struct Mem_Step_t_
-{
-    int             nMems;              // the number of fixed memory managers employed
-    Mem_Fixed_t **  pMems;              // memory managers: 2^1 words, 2^2 words, etc
-    int             nMapSize;           // the size of the memory array
-    Mem_Fixed_t **  pMap;               // maps the number of bytes into its memory manager
-    int             nLargeChunksAlloc;  // the maximum number of large memory chunks
-    int             nLargeChunks;       // the current number of large memory chunks
-    void **         pLargeChunks;       // the allocated large memory chunks
-};
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates memory pieces of fixed size.]
-
-  Description [The size of the chunk is computed as the minimum of
-  1024 entries and 64K. Can only work with entry size at least 4 byte long.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Mem_Fixed_t * Mem_FixedStart( int nEntrySize )
-{
-    Mem_Fixed_t * p;
-
-    p = ABC_ALLOC( Mem_Fixed_t, 1 );
-    memset( p, 0, sizeof(Mem_Fixed_t) );
-
-    p->nEntrySize    = nEntrySize;
-    p->nEntriesAlloc = 0;
-    p->nEntriesUsed  = 0;
-    p->pEntriesFree  = NULL;
-
-    if ( nEntrySize * (1 << 10) < (1<<16) )
-        p->nChunkSize = (1 << 10);
-    else
-        p->nChunkSize = (1<<16) / nEntrySize;
-    if ( p->nChunkSize < 8 )
-        p->nChunkSize = 8;
-
-    p->nChunksAlloc  = 64;
-    p->nChunks       = 0;
-    p->pChunks       = ABC_ALLOC( char *, p->nChunksAlloc );
-
-    p->nMemoryUsed   = 0;
-    p->nMemoryAlloc  = 0;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Mem_FixedStop( Mem_Fixed_t * p, int fVerbose )
-{
-    int i;
-    if ( p == NULL )
-        return;
-    if ( fVerbose )
-    {
-        printf( "Fixed memory manager: Entry = %5d. Chunk = %5d. Chunks used = %5d.\n",
-            p->nEntrySize, p->nChunkSize, p->nChunks );
-        printf( "   Entries used = %8d. Entries peak = %8d. Memory used = %8d. Memory alloc = %8d.\n",
-            p->nEntriesUsed, p->nEntriesMax, p->nEntrySize * p->nEntriesUsed, p->nMemoryAlloc );
-    }
-    for ( i = 0; i < p->nChunks; i++ )
-        ABC_FREE( p->pChunks[i] );
-    ABC_FREE( p->pChunks );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Mem_FixedEntryFetch( Mem_Fixed_t * p )
-{
-    char * pTemp;
-    int i;
-
-    // check if there are still free entries
-    if ( p->nEntriesUsed == p->nEntriesAlloc )
-    { // need to allocate more entries
-        assert( p->pEntriesFree == NULL );
-        if ( p->nChunks == p->nChunksAlloc )
-        {
-            p->nChunksAlloc *= 2;
-            p->pChunks = ABC_REALLOC( char *, p->pChunks, p->nChunksAlloc ); 
-        }
-        p->pEntriesFree = ABC_ALLOC( char, p->nEntrySize * p->nChunkSize );
-        p->nMemoryAlloc += p->nEntrySize * p->nChunkSize;
-        // transform these entries into a linked list
-        pTemp = p->pEntriesFree;
-        for ( i = 1; i < p->nChunkSize; i++ )
-        {
-            *((char **)pTemp) = pTemp + p->nEntrySize;
-            pTemp += p->nEntrySize;
-        }
-        // set the last link
-        *((char **)pTemp) = NULL;
-        // add the chunk to the chunk storage
-        p->pChunks[ p->nChunks++ ] = p->pEntriesFree;
-        // add to the number of entries allocated
-        p->nEntriesAlloc += p->nChunkSize;
-    }
-    // incrememt the counter of used entries
-    p->nEntriesUsed++;
-    if ( p->nEntriesMax < p->nEntriesUsed )
-        p->nEntriesMax = p->nEntriesUsed;
-    // return the first entry in the free entry list
-    pTemp = p->pEntriesFree;
-    p->pEntriesFree = *((char **)pTemp);
-    return pTemp;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Mem_FixedEntryRecycle( Mem_Fixed_t * p, char * pEntry )
-{
-    // decrement the counter of used entries
-    p->nEntriesUsed--;
-    // add the entry to the linked list of free entries
-    *((char **)pEntry) = p->pEntriesFree;
-    p->pEntriesFree = pEntry;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description [Relocates all the memory except the first chunk.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Mem_FixedRestart( Mem_Fixed_t * p )
-{
-    int i;
-    char * pTemp;
-
-    // deallocate all chunks except the first one
-    for ( i = 1; i < p->nChunks; i++ )
-        ABC_FREE( p->pChunks[i] );
-    p->nChunks = 1;
-    // transform these entries into a linked list
-    pTemp = p->pChunks[0];
-    for ( i = 1; i < p->nChunkSize; i++ )
-    {
-        *((char **)pTemp) = pTemp + p->nEntrySize;
-        pTemp += p->nEntrySize;
-    }
-    // set the last link
-    *((char **)pTemp) = NULL;
-    // set the free entry list
-    p->pEntriesFree  = p->pChunks[0];
-    // set the correct statistics
-    p->nMemoryAlloc  = p->nEntrySize * p->nChunkSize;
-    p->nMemoryUsed   = 0;
-    p->nEntriesAlloc = p->nChunkSize;
-    p->nEntriesUsed  = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mem_FixedReadMemUsage( Mem_Fixed_t * p )
-{
-    return p->nMemoryAlloc;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mem_FixedReadMaxEntriesUsed( Mem_Fixed_t * p )
-{
-    return p->nEntriesMax;
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates entries of flexible size.]
-
-  Description [Can only work with entry size at least 4 byte long.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Mem_Flex_t * Mem_FlexStart()
-{
-    Mem_Flex_t * p;
-
-    p = ABC_ALLOC( Mem_Flex_t, 1 );
-    memset( p, 0, sizeof(Mem_Flex_t) );
-
-    p->nEntriesUsed  = 0;
-    p->pCurrent      = NULL;
-    p->pEnd          = NULL;
-
-    p->nChunkSize    = (1 << 12);
-    p->nChunksAlloc  = 64;
-    p->nChunks       = 0;
-    p->pChunks       = ABC_ALLOC( char *, p->nChunksAlloc );
-
-    p->nMemoryUsed   = 0;
-    p->nMemoryAlloc  = 0;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Mem_FlexStop( Mem_Flex_t * p, int fVerbose )
-{
-    int i;
-    if ( p == NULL )
-        return;
-    if ( fVerbose )
-    {
-        printf( "Flexible memory manager: Chunk size = %d. Chunks used = %d.\n",
-            p->nChunkSize, p->nChunks );
-        printf( "   Entries used = %d. Memory used = %d. Memory alloc = %d.\n",
-            p->nEntriesUsed, p->nMemoryUsed, p->nMemoryAlloc );
-    }
-    for ( i = 0; i < p->nChunks; i++ )
-        ABC_FREE( p->pChunks[i] );
-    ABC_FREE( p->pChunks );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Mem_FlexEntryFetch( Mem_Flex_t * p, int nBytes )
-{
-    char * pTemp;
-    // check if there are still free entries
-    if ( p->pCurrent == NULL || p->pCurrent + nBytes > p->pEnd )
-    { // need to allocate more entries
-        if ( p->nChunks == p->nChunksAlloc )
-        {
-            p->nChunksAlloc *= 2;
-            p->pChunks = ABC_REALLOC( char *, p->pChunks, p->nChunksAlloc ); 
-        }
-        if ( nBytes > p->nChunkSize )
-        {
-            // resize the chunk size if more memory is requested than it can give
-            // (ideally, this should never happen)
-            p->nChunkSize = 2 * nBytes;
-        }
-        p->pCurrent = ABC_ALLOC( char, p->nChunkSize );
-        p->pEnd     = p->pCurrent + p->nChunkSize;
-        p->nMemoryAlloc += p->nChunkSize;
-        // add the chunk to the chunk storage
-        p->pChunks[ p->nChunks++ ] = p->pCurrent;
-    }
-    assert( p->pCurrent + nBytes <= p->pEnd );
-    // increment the counter of used entries
-    p->nEntriesUsed++;
-    // keep track of the memory used
-    p->nMemoryUsed += nBytes;
-    // return the next entry
-    pTemp = p->pCurrent;
-    p->pCurrent += nBytes;
-    return pTemp;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description [Relocates all the memory except the first chunk.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Mem_FlexRestart( Mem_Flex_t * p )
-{
-    int i;
-    if ( p->nChunks == 0 )
-        return;
-    // deallocate all chunks except the first one
-    for ( i = 1; i < p->nChunks; i++ )
-        ABC_FREE( p->pChunks[i] );
-    p->nChunks  = 1;
-    p->nMemoryAlloc = p->nChunkSize;
-    // transform these entries into a linked list
-    p->pCurrent = p->pChunks[0];
-    p->pEnd     = p->pCurrent + p->nChunkSize;
-    p->nEntriesUsed = 0;
-    p->nMemoryUsed = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mem_FlexReadMemUsage( Mem_Flex_t * p )
-{
-    return p->nMemoryUsed;
-}
-
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the hierarchical memory manager.]
-
-  Description [This manager can allocate entries of any size.
-  Iternally they are mapped into the entries with the number of bytes
-  equal to the power of 2. The smallest entry size is 8 bytes. The
-  next one is 16 bytes etc. So, if the user requests 6 bytes, he gets 
-  8 byte entry. If we asks for 25 bytes, he gets 32 byte entry etc.
-  The input parameters "nSteps" says how many fixed memory managers
-  are employed internally. Calling this procedure with nSteps equal
-  to 10 results in 10 hierarchically arranged internal memory managers, 
-  which can allocate up to 4096 (1Kb) entries. Requests for larger 
-  entries are handed over to malloc() and then ABC_FREE()ed.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Mem_Step_t * Mem_StepStart( int nSteps )
-{
-    Mem_Step_t * p;
-    int i, k;
-    p = ABC_ALLOC( Mem_Step_t, 1 );
-    memset( p, 0, sizeof(Mem_Step_t) );
-    p->nMems = nSteps;
-    // start the fixed memory managers
-    p->pMems = ABC_ALLOC( Mem_Fixed_t *, p->nMems );
-    for ( i = 0; i < p->nMems; i++ )
-        p->pMems[i] = Mem_FixedStart( (8<<i) );
-    // set up the mapping of the required memory size into the corresponding manager
-    p->nMapSize = (4<<p->nMems);
-    p->pMap = ABC_ALLOC( Mem_Fixed_t *, p->nMapSize+1 );
-    p->pMap[0] = NULL;
-    for ( k = 1; k <= 4; k++ )
-        p->pMap[k] = p->pMems[0];
-    for ( i = 0; i < p->nMems; i++ )
-        for ( k = (4<<i)+1; k <= (8<<i); k++ )
-            p->pMap[k] = p->pMems[i];
-//for ( i = 1; i < 100; i ++ )
-//printf( "%10d: size = %10d\n", i, p->pMap[i]->nEntrySize );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the memory manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Mem_StepStop( Mem_Step_t * p, int fVerbose )
-{
-    int i;
-    for ( i = 0; i < p->nMems; i++ )
-        Mem_FixedStop( p->pMems[i], fVerbose );
-    if ( p->pLargeChunks ) 
-    {
-        for ( i = 0; i < p->nLargeChunks; i++ )
-            ABC_FREE( p->pLargeChunks[i] );
-        ABC_FREE( p->pLargeChunks );
-    }
-    ABC_FREE( p->pMems );
-    ABC_FREE( p->pMap );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the entry.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Mem_StepEntryFetch( Mem_Step_t * p, int nBytes )
-{
-    if ( nBytes == 0 )
-        return NULL;
-    if ( nBytes > p->nMapSize )
-    {
-//        printf( "Allocating %d bytes.\n", nBytes );
-//        return ABC_ALLOC( char, nBytes );
-        if ( p->nLargeChunks == p->nLargeChunksAlloc )
-        {
-            if ( p->nLargeChunksAlloc == 0 )
-                p->nLargeChunksAlloc = 32;
-            p->nLargeChunksAlloc *= 2;
-            p->pLargeChunks = (void **)ABC_REALLOC( char *, p->pLargeChunks, p->nLargeChunksAlloc ); 
-        }
-        p->pLargeChunks[ p->nLargeChunks++ ] = ABC_ALLOC( char, nBytes );
-        return (char *)p->pLargeChunks[ p->nLargeChunks - 1 ];
-    }
-    return Mem_FixedEntryFetch( p->pMap[nBytes] );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Recycles the entry.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Mem_StepEntryRecycle( Mem_Step_t * p, char * pEntry, int nBytes )
-{
-    if ( nBytes == 0 )
-        return;
-    if ( nBytes > p->nMapSize )
-    {
-//        ABC_FREE( pEntry );
-        return;
-    }
-    Mem_FixedEntryRecycle( p->pMap[nBytes], pEntry );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mem_StepReadMemUsage( Mem_Step_t * p )
-{
-    int i, nMemTotal = 0;
-    for ( i = 0; i < p->nMems; i++ )
-        nMemTotal += p->pMems[i]->nMemoryAlloc;
-    return nMemTotal;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mem/mem.h b/src/aig/mem/mem.h
deleted file mode 100644
index 15cb56fe..00000000
--- a/src/aig/mem/mem.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [mem.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Memory management.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: mem.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#ifndef __MEM_H__
-#define __MEM_H__
-
-#include "abc_global.h"
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Mem_Fixed_t_    Mem_Fixed_t;    
-typedef struct Mem_Flex_t_     Mem_Flex_t;     
-typedef struct Mem_Step_t_     Mem_Step_t;     
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
- 
-/*=== mem.c ===========================================================*/
-// fixed-size-block memory manager
-extern Mem_Fixed_t * Mem_FixedStart( int nEntrySize );
-extern void          Mem_FixedStop( Mem_Fixed_t * p, int fVerbose );
-extern char *        Mem_FixedEntryFetch( Mem_Fixed_t * p );
-extern void          Mem_FixedEntryRecycle( Mem_Fixed_t * p, char * pEntry );
-extern void          Mem_FixedRestart( Mem_Fixed_t * p );
-extern int           Mem_FixedReadMemUsage( Mem_Fixed_t * p );
-extern int           Mem_FixedReadMaxEntriesUsed( Mem_Fixed_t * p );
-// flexible-size-block memory manager
-extern Mem_Flex_t *  Mem_FlexStart();
-extern void          Mem_FlexStop( Mem_Flex_t * p, int fVerbose );
-extern char *        Mem_FlexEntryFetch( Mem_Flex_t * p, int nBytes );
-extern void          Mem_FlexRestart( Mem_Flex_t * p );
-extern int           Mem_FlexReadMemUsage( Mem_Flex_t * p );
-// hierarchical memory manager
-extern Mem_Step_t *  Mem_StepStart( int nSteps );
-extern void          Mem_StepStop( Mem_Step_t * p, int fVerbose );
-extern char *        Mem_StepEntryFetch( Mem_Step_t * p, int nBytes );
-extern void          Mem_StepEntryRecycle( Mem_Step_t * p, char * pEntry, int nBytes );
-extern int           Mem_StepReadMemUsage( Mem_Step_t * p );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
diff --git a/src/aig/mem/module.make b/src/aig/mem/module.make
deleted file mode 100644
index ae6fcbe4..00000000
--- a/src/aig/mem/module.make
+++ /dev/null
@@ -1 +0,0 @@
-SRC +=    src/aig/mem/mem.c 
diff --git a/src/aig/mfx/mfx.h b/src/aig/mfx/mfx.h
deleted file mode 100644
index 9d2c6795..00000000
--- a/src/aig/mfx/mfx.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [mfx.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [The good old minimization with complete don't-cares.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: mfx.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __MFX_H__
-#define __MFX_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Mfx_Par_t_ Mfx_Par_t;
-struct Mfx_Par_t_
-{
-    // general parameters
-    int           nWinTfoLevs;   // the maximum fanout levels
-    int           nFanoutsMax;   // the maximum number of fanouts
-    int           nDepthMax;     // the maximum number of logic levels
-    int           nDivMax;       // the maximum number of divisors
-    int           nWinSizeMax;   // the maximum size of the window
-    int           nGrowthLevel;  // the maximum allowed growth in level
-    int           nBTLimit;      // the maximum number of conflicts in one SAT run
-    int           fResub;        // performs resubstitution
-    int           fArea;         // performs optimization for area
-    int           fMoreEffort;   // performs high-affort minimization
-    int           fSwapEdge;     // performs edge swapping
-    int           fDelay;        // performs optimization for delay
-    int           fPower;        // performs power-aware optimization 
-    int           fVerbose;      // enable basic stats
-    int           fVeryVerbose;  // enable detailed stats
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== mfxCore.c ==========================================================*/
-extern void        Mfx_ParsDefault( Mfx_Par_t * pPars );
-extern int         Mfx_Perform( Nwk_Man_t * pNtk, Mfx_Par_t * pPars, If_Lib_t * pLutLib );
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/mfx/mfxCore.c b/src/aig/mfx/mfxCore.c
deleted file mode 100644
index 77f35580..00000000
--- a/src/aig/mfx/mfxCore.c
+++ /dev/null
@@ -1,393 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [mfxCore.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [The good old minimization with complete don't-cares.]
-
-  Synopsis    [Core procedures of this package.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: mfxCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-#include "bar.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
- 
-***********************************************************************/
-void Mfx_ParsDefault( Mfx_Par_t * pPars )
-{
-    pPars->nWinTfoLevs  =    2;
-    pPars->nFanoutsMax  =   10;
-    pPars->nDepthMax    =   20;
-    pPars->nDivMax      =  250;
-    pPars->nWinSizeMax  =  300;
-    pPars->nGrowthLevel =    0;
-    pPars->nBTLimit     = 5000;
-    pPars->fResub       =    1;
-    pPars->fArea        =    0;
-    pPars->fMoreEffort  =    0;
-    pPars->fSwapEdge    =    0;
-    pPars->fPower       =    0;
-    pPars->fVerbose     =    0;
-    pPars->fVeryVerbose =    0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mfx_Resub( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
-    int clk;
-    p->nNodesTried++;
-    // prepare data structure for this node
-    Mfx_ManClean( p ); 
-    // compute window roots, window support, and window nodes
-clk = clock();
-    p->vRoots = Mfx_ComputeRoots( pNode, p->pPars->nWinTfoLevs, p->pPars->nFanoutsMax );
-    p->vSupp  = Nwk_ManSupportNodes( p->pNtk, (Nwk_Obj_t **)Vec_PtrArray(p->vRoots), Vec_PtrSize(p->vRoots) );
-    p->vNodes = Nwk_ManDfsNodes( p->pNtk, (Nwk_Obj_t **)Vec_PtrArray(p->vRoots), Vec_PtrSize(p->vRoots) );
-p->timeWin += clock() - clk;
-    if ( p->pPars->nWinSizeMax && Vec_PtrSize(p->vNodes) > p->pPars->nWinSizeMax )
-        return 1;
-    // compute the divisors of the window
-clk = clock();
-    p->vDivs  = Mfx_ComputeDivisors( p, pNode, Nwk_ObjRequired(pNode) - If_LutLibSlowestPinDelay(pNode->pMan->pLutLib) );
-//    p->vDivs  = Mfx_ComputeDivisors( p, pNode, ABC_INFINITY );
-    p->nTotalDivs += Vec_PtrSize(p->vDivs);
-p->timeDiv += clock() - clk;
-    // construct AIG for the window
-clk = clock();
-    p->pAigWin = Mfx_ConstructAig( p, pNode );
-p->timeAig += clock() - clk;
-    // translate it into CNF
-clk = clock();
-    p->pCnf = Cnf_DeriveSimple( p->pAigWin, 1 + Vec_PtrSize(p->vDivs) );
-p->timeCnf += clock() - clk;
-    // create the SAT problem
-clk = clock();
-    p->pSat = Mfx_CreateSolverResub( p, NULL, 0, 0 );
-    if ( p->pSat == NULL )
-    {
-        p->nNodesBad++;
-        return 1;
-    }
-    // solve the SAT problem
-    if ( p->pPars->fPower )
-        Mfx_EdgePower( p, pNode );
-    else if ( p->pPars->fSwapEdge )
-        Mfx_EdgeSwapEval( p, pNode );
-    else
-    {
-        Mfx_ResubNode( p, pNode );
-        if ( p->pPars->fMoreEffort )
-            Mfx_ResubNode2( p, pNode );
-    }
-p->timeSat += clock() - clk;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mfx_Node( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
-    Hop_Obj_t * pObj;
-    int RetValue;
-    float dProb;
-    int nGain, clk;
-    p->nNodesTried++;
-    // prepare data structure for this node
-    Mfx_ManClean( p );
-    // compute window roots, window support, and window nodes
-clk = clock();
-    p->vRoots = Mfx_ComputeRoots( pNode, p->pPars->nWinTfoLevs, p->pPars->nFanoutsMax );
-    p->vSupp  = Nwk_ManSupportNodes( p->pNtk, (Nwk_Obj_t **)Vec_PtrArray(p->vRoots), Vec_PtrSize(p->vRoots) );
-    p->vNodes = Nwk_ManDfsNodes( p->pNtk, (Nwk_Obj_t **)Vec_PtrArray(p->vRoots), Vec_PtrSize(p->vRoots) );
-p->timeWin += clock() - clk;
-    // count the number of patterns
-//    p->dTotalRatios += Mfx_ConstraintRatio( p, pNode );
-    // construct AIG for the window
-clk = clock();
-    p->pAigWin = Mfx_ConstructAig( p, pNode );
-p->timeAig += clock() - clk;
-    // translate it into CNF
-clk = clock();
-    p->pCnf = Cnf_DeriveSimple( p->pAigWin, Nwk_ObjFaninNum(pNode) );
-p->timeCnf += clock() - clk;
-    // create the SAT problem
-clk = clock();
-    p->pSat = (sat_solver *)Cnf_DataWriteIntoSolver( p->pCnf, 1, 0 );
-    if ( p->pSat == NULL )
-        return 0;
-    // solve the SAT problem
-    RetValue = Mfx_SolveSat( p, pNode );
-    p->nTotConfLevel += p->pSat->stats.conflicts;
-p->timeSat += clock() - clk;
-    if ( RetValue == 0 )
-    {
-        p->nTimeOutsLevel++;
-        p->nTimeOuts++;
-        return 0;
-    }
-    // minimize the local function of the node using bi-decomposition
-    assert( p->nFanins == Nwk_ObjFaninNum(pNode) );
-    dProb = p->pPars->fPower? ((float *)p->vProbs->pArray)[pNode->Id] : -1.0;
-    pObj = Nwk_NodeIfNodeResyn( p->pManDec, pNode->pMan->pManHop, pNode->pFunc, p->nFanins, p->vTruth, p->uCare, dProb );
-    nGain = Hop_DagSize(pNode->pFunc) - Hop_DagSize(pObj);
-    if ( nGain >= 0 )
-    {
-        p->nNodesDec++;
-        p->nNodesGained += nGain;
-        p->nNodesGainedLevel += nGain;
-        pNode->pFunc = pObj;    
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Marks nodes for power-optimization.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Nwk_ManPowerEstimate( Nwk_Man_t * pNtk, int fProbOne )
-{
-    extern Vec_Int_t * Saig_ManComputeSwitchProbs( Aig_Man_t * p, int nFrames, int nPref, int fProbOne );
-    Vec_Int_t * vProbs;
-    Vec_Int_t * vSwitching;
-    float * pProbability;
-    float * pSwitching;
-    Aig_Man_t * pAig;
-    Aig_Obj_t * pObjAig;
-    Nwk_Obj_t * pObjAbc;
-    int i;
-    // start the resulting array
-    vProbs = Vec_IntStart( Nwk_ManObjNumMax(pNtk) );
-    pProbability = (float *)vProbs->pArray;
-    // map network into an AIG
-    pAig = Nwk_ManStrash( pNtk );
-    vSwitching = Saig_ManComputeSwitchProbs( pAig, 48, 16, fProbOne );
-    pSwitching = (float *)vSwitching->pArray;
-    Nwk_ManForEachObj( pNtk, pObjAbc, i )
-    {
-        if ( (pObjAig = Aig_Regular((Aig_Obj_t *)pObjAbc->pCopy)) )
-            pProbability[pObjAbc->Id] = pSwitching[pObjAig->Id];
-    }
-    Vec_IntFree( vSwitching );
-    Aig_ManStop( pAig );
-    return vProbs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mfx_Perform( Nwk_Man_t * pNtk, Mfx_Par_t * pPars, If_Lib_t * pLutLib )
-{
-    Bdc_Par_t Pars = {0}, * pDecPars = &Pars;
-    Bar_Progress_t * pProgress;
-    Mfx_Man_t * p;
-    Nwk_Obj_t * pObj;
-    Vec_Vec_t * vLevels;
-    Vec_Ptr_t * vNodes;
-    int i, k, nNodes, nFaninMax, clk = clock(), clk2;
-    int nTotalNodesBeg = Nwk_ManNodeNum(pNtk);
-    int nTotalEdgesBeg = Nwk_ManGetTotalFanins(pNtk);
-
-    // prepare the network for processing
-    Nwk_ManRemoveDupFanins( pNtk, 0 );
-    assert( Nwk_ManCheck( pNtk ) );
-
-    // check limits on the number of fanins
-    nFaninMax = Nwk_ManGetFaninMax(pNtk);
-    if ( pPars->fResub )
-    {
-        if ( nFaninMax > 8 )
-        {
-            printf( "Nodes with more than %d fanins will node be processed.\n", 8 );
-            nFaninMax = 8;
-        }
-    }
-    else
-    {
-        if ( nFaninMax > MFX_FANIN_MAX )
-        {
-            printf( "Nodes with more than %d fanins will node be processed.\n", MFX_FANIN_MAX );
-            nFaninMax = MFX_FANIN_MAX;
-        }
-    }
-    if ( pLutLib && pLutLib->LutMax < nFaninMax )
-    {
-        printf( "The selected LUT library with max LUT size (%d) cannot be used to compute timing for network with %d-input nodes. Using unit-delay model.\n", pLutLib->LutMax, nFaninMax );
-        pLutLib = NULL;
-    }
-    pNtk->pLutLib = pLutLib;
-
-    // compute levels
-    Nwk_ManLevel( pNtk );
-    assert( Nwk_ManVerifyLevel( pNtk ) );
-    // compute delay trace with white-boxes
-    Nwk_ManDelayTraceLut( pNtk );
-    assert( Nwk_ManVerifyTiming( pNtk ) );
-
-    // start the manager
-    p = Mfx_ManAlloc( pPars );
-    p->pNtk = pNtk;
-    p->nFaninMax = nFaninMax;
-    if ( !pPars->fResub )
-    {
-        pDecPars->nVarsMax = (nFaninMax < 3) ? 3 : nFaninMax;
-        pDecPars->fVerbose = pPars->fVerbose;
-        p->vTruth = Vec_IntAlloc( 0 );
-        p->pManDec = Bdc_ManAlloc( pDecPars );
-    }
-
-    // precomputer power-aware metrics
-    if ( pPars->fPower )
-    {
-        extern Vec_Int_t * Nwk_ManPowerEstimate( Nwk_Man_t * pNtk, int fProbOne );
-        if ( pPars->fResub )
-            p->vProbs = Nwk_ManPowerEstimate( pNtk, 0 );
-        else
-            p->vProbs = Nwk_ManPowerEstimate( pNtk, 1 );
-        printf( "Total switching before = %7.2f.\n", Nwl_ManComputeTotalSwitching(pNtk) );
-    }
-
-    // compute don't-cares for each node
-    nNodes = 0;
-    p->nTotalNodesBeg = nTotalNodesBeg;
-    p->nTotalEdgesBeg = nTotalEdgesBeg;
-    if ( pPars->fResub )
-    {
-        pProgress = Bar_ProgressStart( stdout, Nwk_ManObjNumMax(pNtk) );
-        Nwk_ManForEachNode( pNtk, pObj, i )
-        {
-            if ( p->pPars->nDepthMax && pObj->Level > p->pPars->nDepthMax )
-                continue;
-            if ( Nwk_ObjFaninNum(pObj) < 2 || Nwk_ObjFaninNum(pObj) > nFaninMax )
-                continue;
-            if ( !p->pPars->fVeryVerbose )
-                Bar_ProgressUpdate( pProgress, i, NULL );
-            Mfx_Resub( p, pObj );
-        }
-        Bar_ProgressStop( pProgress );
-    }
-    else
-    {
-        pProgress = Bar_ProgressStart( stdout, Nwk_ManNodeNum(pNtk) );
-        vLevels = Nwk_ManLevelize( pNtk );
-
-        Vec_VecForEachLevelStart( vLevels, vNodes, k, 1 )
-        {
-            if ( !p->pPars->fVeryVerbose )
-                Bar_ProgressUpdate( pProgress, nNodes, NULL );
-            p->nNodesGainedLevel = 0;
-            p->nTotConfLevel = 0;
-            p->nTimeOutsLevel = 0;
-            clk2 = clock();
-            Vec_PtrForEachEntry( Nwk_Obj_t *, vNodes, pObj, i )
-            {
-                if ( p->pPars->nDepthMax && pObj->Level > p->pPars->nDepthMax )
-                    break;
-                if ( Nwk_ObjFaninNum(pObj) < 2 || Nwk_ObjFaninNum(pObj) > nFaninMax )
-                    continue;
-                Mfx_Node( p, pObj );
-            }
-            nNodes += Vec_PtrSize(vNodes);
-            if ( pPars->fVerbose )
-            {
-            printf( "Lev = %2d. Node = %5d. Ave gain = %5.2f. Ave conf = %5.2f. T/o = %6.2f %%  ", 
-                k, Vec_PtrSize(vNodes),
-                1.0*p->nNodesGainedLevel/Vec_PtrSize(vNodes),
-                1.0*p->nTotConfLevel/Vec_PtrSize(vNodes),
-                100.0*p->nTimeOutsLevel/Vec_PtrSize(vNodes) );
-            ABC_PRT( "Time", clock() - clk2 );
-            }
-        }
-
-        Bar_ProgressStop( pProgress );
-        Vec_VecFree( vLevels );
-    }
-    p->nTotalNodesEnd = Nwk_ManNodeNum(pNtk);
-    p->nTotalEdgesEnd = Nwk_ManGetTotalFanins(pNtk);
-
-    assert( Nwk_ManVerifyLevel( pNtk ) );
-    assert( Nwk_ManVerifyTiming( pNtk ) );
-
-    if ( pPars->fPower )
-        printf( "Total switching after  = %7.2f.\n", Nwl_ManComputeTotalSwitching(pNtk) );
-
-    // free the manager
-    p->timeTotal = clock() - clk;
-    Mfx_ManStop( p );
-
-    // update network into the topological order
-//    if ( pPars->fResub )
-//        Nwk_ManTopological( pNtk );
-    return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxDiv.c b/src/aig/mfx/mfxDiv.c
deleted file mode 100644
index 35872da2..00000000
--- a/src/aig/mfx/mfxDiv.c
+++ /dev/null
@@ -1,308 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [mfxDiv.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [The good old minimization with complete don't-cares.]
-
-  Synopsis    [Procedures to compute candidate divisors.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: mfxDiv.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Marks and collects the TFI cone of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Abc_MfxWinMarkTfi_rec( Nwk_Obj_t * pObj, Vec_Ptr_t * vCone )
-{
-    Nwk_Obj_t * pFanin;
-    int i;
-    if ( Nwk_ObjIsTravIdCurrent(pObj) )
-        return;
-    Nwk_ObjSetTravIdCurrent( pObj );
-    if ( Nwk_ObjIsCi(pObj) )
-    {
-        Vec_PtrPush( vCone, pObj );
-        return;
-    }
-    assert( Nwk_ObjIsNode(pObj) );
-    // visit the fanins of the node
-    Nwk_ObjForEachFanin( pObj, pFanin, i )
-        Abc_MfxWinMarkTfi_rec( pFanin, vCone );
-    Vec_PtrPush( vCone, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Marks and collects the TFI cone of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Abc_MfxWinMarkTfi( Nwk_Obj_t * pNode )
-{
-    Vec_Ptr_t * vCone;
-    vCone = Vec_PtrAlloc( 100 );
-    Abc_MfxWinMarkTfi_rec( pNode, vCone );
-    return vCone;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Marks the TFO of the collected nodes up to the given level.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Abc_MfxWinSweepLeafTfo_rec( Nwk_Obj_t * pObj, float tArrivalMax )
-{
-    Nwk_Obj_t * pFanout;
-    int i;
-    if ( Nwk_ObjIsCo(pObj) || Nwk_ObjArrival(pObj) > tArrivalMax )
-        return;
-    if ( Nwk_ObjIsTravIdCurrent(pObj) )
-        return;
-    Nwk_ObjSetTravIdCurrent( pObj );
-    Nwk_ObjForEachFanout( pObj, pFanout, i )
-        Abc_MfxWinSweepLeafTfo_rec( pFanout, tArrivalMax );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Dereferences the node's MFFC.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Abc_MfxNodeDeref_rec( Nwk_Obj_t * pNode )
-{
-    Nwk_Obj_t * pFanin;
-    int i, Counter = 1;
-    if ( Nwk_ObjIsCi(pNode) )
-        return 0;
-    Nwk_ObjSetTravIdCurrent( pNode );
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-    {
-        assert( pFanin->nFanouts > 0 );
-        if ( --pFanin->nFanouts == 0 )
-            Counter += Abc_MfxNodeDeref_rec( pFanin );
-    }
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [References the node's MFFC.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Abc_MfxNodeRef_rec( Nwk_Obj_t * pNode )
-{
-    Nwk_Obj_t * pFanin;
-    int i, Counter = 1;
-    if ( Nwk_ObjIsCi(pNode) )
-        return 0;
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-    {
-        if ( pFanin->nFanouts++ == 0 )
-            Counter += Abc_MfxNodeRef_rec( pFanin );
-    }
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Labels MFFC of the node with the current trav ID.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Abc_MfxWinVisitMffc( Nwk_Obj_t * pNode )
-{
-    int Count1, Count2;
-    assert( Nwk_ObjIsNode(pNode) );
-    // dereference the node (mark with the current trav ID)
-    Count1 = Abc_MfxNodeDeref_rec( pNode );
-    // reference it back
-    Count2 = Abc_MfxNodeRef_rec( pNode );
-    assert( Count1 == Count2 );
-    return Count1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes divisors and add them to nodes in the window.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Mfx_ComputeDivisors( Mfx_Man_t * p, Nwk_Obj_t * pNode, float tArrivalMax )
-{
-    Vec_Ptr_t * vCone, * vDivs;
-    Nwk_Obj_t * pObj, * pFanout, * pFanin;
-    int k, f, m;
-    int nDivsPlus = 0, nTrueSupp;
-    assert( p->vDivs == NULL );
-
-    // mark the TFI with the current trav ID
-    Nwk_ManIncrementTravId( pNode->pMan );
-    vCone = Abc_MfxWinMarkTfi( pNode );
-
-    // count the number of PIs
-    nTrueSupp = 0;
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vCone, pObj, k )
-        nTrueSupp += Nwk_ObjIsCi(pObj);
-//    printf( "%d(%d) ", Vec_PtrSize(p->vSupp), m );
-
-    // mark with the current trav ID those nodes that should not be divisors:
-    // (1) the node and its TFO
-    // (2) the MFFC of the node
-    // (3) the node's fanins (these are treated as a special case)
-    Nwk_ManIncrementTravId( pNode->pMan );
-    Abc_MfxWinSweepLeafTfo_rec( pNode, tArrivalMax );
-    Abc_MfxWinVisitMffc( pNode );
-    Nwk_ObjForEachFanin( pNode, pObj, k )
-        Nwk_ObjSetTravIdCurrent( pObj );
-
-    // at this point the nodes are marked with two trav IDs:
-    // nodes to be collected as divisors are marked with previous trav ID
-    // nodes to be avoided as divisors are marked with current trav ID
-
-    // start collecting the divisors
-    vDivs = Vec_PtrAlloc( p->pPars->nDivMax );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vCone, pObj, k )
-    {
-        if ( !Nwk_ObjIsTravIdPrevious(pObj) )
-            continue;
-        if ( Nwk_ObjArrival(pObj) > tArrivalMax )
-            continue;
-        Vec_PtrPush( vDivs, pObj );
-        if ( Vec_PtrSize(vDivs) >= p->pPars->nDivMax )
-            break;
-    }
-    Vec_PtrFree( vCone );
-
-    // explore the fanouts of already collected divisors
-    if ( Vec_PtrSize(vDivs) < p->pPars->nDivMax )
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vDivs, pObj, k )
-    {
-        // consider fanouts of this node
-        Nwk_ObjForEachFanout( pObj, pFanout, f )
-        {
-            // stop if there are too many fanouts
-            if ( f > 20 )
-                break;
-            // skip nodes that are already added
-            if ( Nwk_ObjIsTravIdPrevious(pFanout) )
-                continue;
-            // skip nodes in the TFO or in the MFFC of node
-            if ( Nwk_ObjIsTravIdCurrent(pFanout) )
-                continue;
-            // skip COs
-            if ( !Nwk_ObjIsNode(pFanout) ) 
-                continue;
-            // skip nodes with large level
-            if ( Nwk_ObjArrival(pFanout) > tArrivalMax )
-                continue;
-            // skip nodes whose fanins are not divisors
-            Nwk_ObjForEachFanin( pFanout, pFanin, m )
-                if ( !Nwk_ObjIsTravIdPrevious(pFanin) )
-                    break;
-            if ( m < Nwk_ObjFaninNum(pFanout) )
-                continue;
-            // make sure this divisor in not among the nodes
-//            Vec_PtrForEachEntry( Aig_Obj_t *, p->vNodes, pFanin, m )
-//                assert( pFanout != pFanin );
-            // add the node to the divisors
-            Vec_PtrPush( vDivs, pFanout );
-//            Vec_PtrPush( p->vNodes, pFanout );
-            Vec_PtrPushUnique( p->vNodes, pFanout );
-            Nwk_ObjSetTravIdPrevious( pFanout );
-            nDivsPlus++;
-            if ( Vec_PtrSize(vDivs) >= p->pPars->nDivMax )
-                break;
-        }
-        if ( Vec_PtrSize(vDivs) >= p->pPars->nDivMax )
-            break;
-    }
-
-    // sort the divisors by level in the increasing order
-    Vec_PtrSort( vDivs, (int (*)(void))Nwk_NodeCompareLevelsIncrease );
-
-    // add the fanins of the node
-    Nwk_ObjForEachFanin( pNode, pFanin, k )
-        Vec_PtrPush( vDivs, pFanin );
-
-/*
-    printf( "Node level = %d.  ", Nwk_ObjLevel(p->pNode) );
-    Vec_PtrForEachEntryStart( vDivs, pObj, k, Vec_PtrSize(vDivs)-p->nDivsPlus )
-        printf( "%d ", Nwk_ObjLevel(pObj) );
-    printf( "\n" );
-*/
-//printf( "%d ", p->nDivsPlus );
-//    printf( "(%d+%d)(%d+%d+%d) ", Vec_PtrSize(p->vSupp), Vec_PtrSize(p->vNodes), 
-//        nTrueSupp, Vec_PtrSize(vDivs)-nTrueSupp-nDivsPlus, nDivsPlus );
-    return vDivs;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxInt.h b/src/aig/mfx/mfxInt.h
deleted file mode 100644
index 320e7a8e..00000000
--- a/src/aig/mfx/mfxInt.h
+++ /dev/null
@@ -1,168 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [mfxInt.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [The good old minimization with complete don't-cares.]
-
-  Synopsis    [Internal declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: mfxInt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __MFX_INT_H__
-#define __MFX_INT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include "nwk.h"
-#include "mfx.h"
-#include "aig.h"
-#include "cnf.h"
-#include "satSolver.h"
-#include "satStore.h"
-#include "bdc.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-#define MFX_FANIN_MAX   12
-
-typedef struct Mfx_Man_t_ Mfx_Man_t;
-struct Mfx_Man_t_
-{
-    // input data
-    Mfx_Par_t *         pPars;
-    Nwk_Man_t *         pNtk;
-    Aig_Man_t *         pCare;
-    Vec_Ptr_t *         vSuppsInv;
-    int                 nFaninMax;
-    // intermeditate data for the node
-    Vec_Ptr_t *         vRoots;    // the roots of the window
-    Vec_Ptr_t *         vSupp;     // the support of the window
-    Vec_Ptr_t *         vNodes;    // the internal nodes of the window
-    Vec_Ptr_t *         vDivs;     // the divisors of the node
-    Vec_Int_t *         vDivLits;  // the SAT literals of divisor nodes
-    Vec_Int_t *         vProjVarsCnf; // the projection variables
-    Vec_Int_t *         vProjVarsSat; // the projection variables
-    // intermediate simulation data
-    Vec_Ptr_t *         vDivCexes; // the counter-example for dividors
-    int                 nDivWords; // the number of words
-    int                 nCexes;    // the numbe rof current counter-examples
-    int                 nSatCalls; 
-    int                 nSatCexes;
-    // used for bidecomposition
-    Vec_Int_t *         vTruth;
-    Bdc_Man_t *         pManDec;
-    int                 nNodesDec;
-    int                 nNodesGained;
-    int                 nNodesGainedLevel;
-    // solving data
-    Aig_Man_t *         pAigWin;   // window AIG with constraints
-    Cnf_Dat_t *         pCnf;      // the CNF for the window
-    sat_solver *        pSat;      // the SAT solver used 
-    Int_Man_t *         pMan;      // interpolation manager;
-    Vec_Int_t *         vMem;      // memory for intermediate SOPs
-    Vec_Vec_t *         vLevels;   // levelized structure for updating
-    Vec_Ptr_t *         vFanins;   // the new set of fanins
-    int                 nTotConfLim; // total conflict limit
-    int                 nTotConfLevel; // total conflicts on this level
-    // switching activity
-    Vec_Int_t *         vProbs; 
-    // the result of solving
-    int                 nFanins;   // the number of fanins
-    int                 nWords;    // the number of words
-    int                 nCares;    // the number of care minterms
-    unsigned            uCare[(MFX_FANIN_MAX<=5)?1:1<<(MFX_FANIN_MAX-5)];  // the computed care-set
-    // performance statistics
-    int                 nNodesTried;
-    int                 nNodesResub;
-    int                 nMintsCare;
-    int                 nMintsTotal;
-    int                 nNodesBad;
-    int                 nTotalDivs;
-    int                 nTimeOuts;
-    int                 nTimeOutsLevel;
-    int                 nDcMints;
-    double              dTotalRatios;
-    // node/edge stats
-    int                 nTotalNodesBeg;
-    int                 nTotalNodesEnd;
-    int                 nTotalEdgesBeg;
-    int                 nTotalEdgesEnd;
-    // statistics
-    int                 timeWin;
-    int                 timeDiv;
-    int                 timeAig;
-    int                 timeCnf;
-    int                 timeSat;
-    int                 timeInt;
-    int                 timeTotal;
-};
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== mfxDiv.c ==========================================================*/
-extern Vec_Ptr_t *      Mfx_ComputeDivisors( Mfx_Man_t * p, Nwk_Obj_t * pNode, float tArrivalMax );
-/*=== mfxInter.c ==========================================================*/
-extern sat_solver *     Mfx_CreateSolverResub( Mfx_Man_t * p, int * pCands, int nCands, int fInvert );
-extern Hop_Obj_t *      Mfx_Interplate( Mfx_Man_t * p, int * pCands, int nCands );
-extern int              Mfx_InterplateEval( Mfx_Man_t * p, int * pCands, int nCands );
-/*=== mfxMan.c ==========================================================*/
-extern Mfx_Man_t *      Mfx_ManAlloc( Mfx_Par_t * pPars );
-extern void             Mfx_ManStop( Mfx_Man_t * p );
-extern void             Mfx_ManClean( Mfx_Man_t * p );
-/*=== mfxResub.c ==========================================================*/
-extern void             Mfx_PrintResubStats( Mfx_Man_t * p );
-extern int              Mfx_EdgePower( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-extern int              Mfx_EdgeSwapEval( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-extern int              Mfx_ResubNode( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-extern int              Mfx_ResubNode2( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-/*=== mfxSat.c ==========================================================*/
-extern int              Mfx_SolveSat( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-/*=== mfxStrash.c ==========================================================*/
-extern Aig_Man_t *      Mfx_ConstructAig( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-extern double           Mfx_ConstraintRatio( Mfx_Man_t * p, Nwk_Obj_t * pNode );
-/*=== mfxWin.c ==========================================================*/
-extern Vec_Ptr_t *      Mfx_ComputeRoots( Nwk_Obj_t * pNode, int nWinTfoMax, int nFanoutLimit );
-
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/mfx/mfxInter.c b/src/aig/mfx/mfxInter.c
deleted file mode 100644
index db2e5e7e..00000000
--- a/src/aig/mfx/mfxInter.c
+++ /dev/null
@@ -1,368 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [mfxInter.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [The good old minimization with complete don't-cares.]
-
-  Synopsis    [Procedures for computing resub function by interpolation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: mfxInter.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Adds constraints for the two-input AND-gate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mfx_SatAddXor( sat_solver * pSat, int iVarA, int iVarB, int iVarC )
-{
-    lit Lits[3];
-
-    Lits[0] = toLitCond( iVarA, 1 );
-    Lits[1] = toLitCond( iVarB, 1 );
-    Lits[2] = toLitCond( iVarC, 1 );
-    if ( !sat_solver_addclause( pSat, Lits, Lits + 3 ) )
-        return 0;
-
-    Lits[0] = toLitCond( iVarA, 1 );
-    Lits[1] = toLitCond( iVarB, 0 );
-    Lits[2] = toLitCond( iVarC, 0 );
-    if ( !sat_solver_addclause( pSat, Lits, Lits + 3 ) )
-        return 0;
-
-    Lits[0] = toLitCond( iVarA, 0 );
-    Lits[1] = toLitCond( iVarB, 1 );
-    Lits[2] = toLitCond( iVarC, 0 );
-    if ( !sat_solver_addclause( pSat, Lits, Lits + 3 ) )
-        return 0;
-
-    Lits[0] = toLitCond( iVarA, 0 );
-    Lits[1] = toLitCond( iVarB, 0 );
-    Lits[2] = toLitCond( iVarC, 1 );
-    if ( !sat_solver_addclause( pSat, Lits, Lits + 3 ) )
-        return 0;
-
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates miter for checking resubsitution.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-sat_solver * Mfx_CreateSolverResub( Mfx_Man_t * p, int * pCands, int nCands, int fInvert )
-{
-    sat_solver * pSat;
-    Aig_Obj_t * pObjPo;
-    int Lits[2], status, iVar, i, c;
-
-    // get the literal for the output of F
-    pObjPo = Aig_ManPo( p->pAigWin, Aig_ManPoNum(p->pAigWin) - Vec_PtrSize(p->vDivs) - 1 );
-    Lits[0] = toLitCond( p->pCnf->pVarNums[pObjPo->Id], fInvert );
-
-    // collect the outputs of the divisors
-    Vec_IntClear( p->vProjVarsCnf );
-    Vec_PtrForEachEntryStart( Aig_Obj_t *, p->pAigWin->vPos, pObjPo, i, Aig_ManPoNum(p->pAigWin) - Vec_PtrSize(p->vDivs) )
-    {
-        assert( p->pCnf->pVarNums[pObjPo->Id] >= 0 );
-        Vec_IntPush( p->vProjVarsCnf, p->pCnf->pVarNums[pObjPo->Id] );
-    }
-    assert( Vec_IntSize(p->vProjVarsCnf) == Vec_PtrSize(p->vDivs) );
-
-    // start the solver
-    pSat = sat_solver_new();
-    sat_solver_setnvars( pSat, 2 * p->pCnf->nVars + Vec_PtrSize(p->vDivs) );
-    if ( pCands )
-        sat_solver_store_alloc( pSat );
-
-    // load the first copy of the clauses
-    for ( i = 0; i < p->pCnf->nClauses; i++ )
-    {
-        if ( !sat_solver_addclause( pSat, p->pCnf->pClauses[i], p->pCnf->pClauses[i+1] ) )
-        {
-            sat_solver_delete( pSat );
-            return NULL;
-        }
-    }
-    // add the clause for the first output of F
-    if ( !sat_solver_addclause( pSat, Lits, Lits+1 ) )
-    {
-        sat_solver_delete( pSat );
-        return NULL;
-    }
-
-    // bookmark the clauses of A
-    if ( pCands )
-        sat_solver_store_mark_clauses_a( pSat );
-
-    // transform the literals
-    for ( i = 0; i < p->pCnf->nLiterals; i++ )
-        p->pCnf->pClauses[0][i] += 2 * p->pCnf->nVars;
-    // load the second copy of the clauses
-    for ( i = 0; i < p->pCnf->nClauses; i++ )
-    {
-        if ( !sat_solver_addclause( pSat, p->pCnf->pClauses[i], p->pCnf->pClauses[i+1] ) )
-        {
-            sat_solver_delete( pSat );
-            return NULL;
-        }
-    }
-    // transform the literals
-    for ( i = 0; i < p->pCnf->nLiterals; i++ )
-        p->pCnf->pClauses[0][i] -= 2 * p->pCnf->nVars;
-    // add the clause for the second output of F
-    Lits[0] = 2 * p->pCnf->nVars + lit_neg( Lits[0] );
-    if ( !sat_solver_addclause( pSat, Lits, Lits+1 ) )
-    {
-        sat_solver_delete( pSat );
-        return NULL;
-    }
-
-    if ( pCands )
-    {
-        // add relevant clauses for EXOR gates
-        for ( c = 0; c < nCands; c++ )
-        {
-            // get the variable number of this divisor
-            i = lit_var( pCands[c] ) - 2 * p->pCnf->nVars;
-            // get the corresponding SAT variable
-            iVar = Vec_IntEntry( p->vProjVarsCnf, i );
-            // add the corresponding EXOR gate
-            if ( !Mfx_SatAddXor( pSat, iVar, iVar + p->pCnf->nVars, 2 * p->pCnf->nVars + i ) )
-            {
-                sat_solver_delete( pSat );
-                return NULL;
-            }
-            // add the corresponding clause
-            if ( !sat_solver_addclause( pSat, pCands + c, pCands + c + 1 ) )
-            {
-                sat_solver_delete( pSat );
-                return NULL;
-            }
-        }
-        // bookmark the roots
-        sat_solver_store_mark_roots( pSat );
-    }
-    else
-    {
-        // add the clauses for the EXOR gates - and remember their outputs
-        Vec_IntClear( p->vProjVarsSat );
-        Vec_IntForEachEntry( p->vProjVarsCnf, iVar, i )
-        {
-            if ( !Mfx_SatAddXor( pSat, iVar, iVar + p->pCnf->nVars, 2 * p->pCnf->nVars + i ) )
-            {
-                sat_solver_delete( pSat );
-                return NULL;
-            }
-            Vec_IntPush( p->vProjVarsSat, 2 * p->pCnf->nVars + i );
-        }
-        assert( Vec_IntSize(p->vProjVarsCnf) == Vec_IntSize(p->vProjVarsSat) );
-        // simplify the solver
-        status = sat_solver_simplify(pSat);
-        if ( status == 0 )
-        {
-//            printf( "Mfx_CreateSolverResub(): SAT solver construction has failed. Skipping node.\n" );
-            sat_solver_delete( pSat );
-            return NULL;
-        }
-    }
-    return pSat;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs interpolation.]
-
-  Description [Derives the new function of the node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Mfx_InterplateTruth( Mfx_Man_t * p, int * pCands, int nCands, int fInvert )
-{
-    sat_solver * pSat;
-    Sto_Man_t * pCnf = NULL;
-    unsigned * puTruth;
-    int nFanins, status;
-    int c, i, * pGloVars;
-
-    // derive the SAT solver for interpolation
-    pSat = Mfx_CreateSolverResub( p, pCands, nCands, fInvert );
-
-    // solve the problem
-    status = sat_solver_solve( pSat, NULL, NULL, (ABC_INT64_T)p->pPars->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    if ( status != l_False )
-    {
-        p->nTimeOuts++;
-        return NULL;
-    }
-    // get the learned clauses
-    pCnf = (Sto_Man_t *)sat_solver_store_release( pSat );
-    sat_solver_delete( pSat );
-
-    // set the global variables
-    pGloVars = Int_ManSetGlobalVars( p->pMan, nCands );
-    for ( c = 0; c < nCands; c++ )
-    {
-        // get the variable number of this divisor
-        i = lit_var( pCands[c] ) - 2 * p->pCnf->nVars;
-        // get the corresponding SAT variable
-        pGloVars[c] = Vec_IntEntry( p->vProjVarsCnf, i );
-    }
-
-    // derive the interpolant
-    nFanins = Int_ManInterpolate( p->pMan, pCnf, 0, &puTruth );
-    Sto_ManFree( pCnf );
-    assert( nFanins == nCands );
-    return puTruth;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs interpolation.]
-
-  Description [Derives the new function of the node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mfx_InterplateEval( Mfx_Man_t * p, int * pCands, int nCands )
-{
-    unsigned * pTruth, uTruth0[2], uTruth1[2];
-    int nCounter;
-    pTruth = Mfx_InterplateTruth( p, pCands, nCands, 0 );
-    if ( nCands == 6 )
-    {
-        uTruth1[0] = pTruth[0];
-        uTruth1[1] = pTruth[1];
-    }
-    else
-    {
-        uTruth1[0] = pTruth[0];
-        uTruth1[1] = pTruth[0];
-    }
-    pTruth = Mfx_InterplateTruth( p, pCands, nCands, 1 );
-    if ( nCands == 6 )
-    {
-        uTruth0[0] = ~pTruth[0];
-        uTruth0[1] = ~pTruth[1];
-    }
-    else
-    {
-        uTruth0[0] = ~pTruth[0];
-        uTruth0[1] = ~pTruth[0];
-    }
-    nCounter  = Extra_WordCountOnes( uTruth0[0] ^ uTruth1[0] );
-    nCounter += Extra_WordCountOnes( uTruth0[1] ^ uTruth1[1] );
-//    printf( "%d ", nCounter );
-    return nCounter;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs interpolation.]
-
-  Description [Derives the new function of the node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Hop_Obj_t * Mfx_Interplate( Mfx_Man_t * p, int * pCands, int nCands )
-{
-    extern Hop_Obj_t * Kit_GraphToHop( Hop_Man_t * pMan, Kit_Graph_t * pGraph );
-
-    sat_solver * pSat;
-    Sto_Man_t * pCnf = NULL;
-    unsigned * puTruth;
-    Kit_Graph_t * pGraph;
-    Hop_Obj_t * pFunc;
-    int nFanins, status;
-    int c, i, * pGloVars;
-
-//    p->nDcMints += Mfx_InterplateEval( p, pCands, nCands );
-
-    // derive the SAT solver for interpolation
-    pSat = Mfx_CreateSolverResub( p, pCands, nCands, 0 );
-
-    // solve the problem
-    status = sat_solver_solve( pSat, NULL, NULL, (ABC_INT64_T)p->pPars->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    if ( status != l_False )
-    {
-        p->nTimeOuts++;
-        return NULL;
-    }
-    // get the learned clauses
-    pCnf = (Sto_Man_t *)sat_solver_store_release( pSat );
-    sat_solver_delete( pSat );
-
-    // set the global variables
-    pGloVars = Int_ManSetGlobalVars( p->pMan, nCands );
-    for ( c = 0; c < nCands; c++ )
-    {
-        // get the variable number of this divisor
-        i = lit_var( pCands[c] ) - 2 * p->pCnf->nVars;
-        // get the corresponding SAT variable
-        pGloVars[c] = Vec_IntEntry( p->vProjVarsCnf, i );
-    }
-
-    // derive the interpolant
-    nFanins = Int_ManInterpolate( p->pMan, pCnf, 0, &puTruth );
-    Sto_ManFree( pCnf );
-    assert( nFanins == nCands );
-
-    // transform interpolant into AIG
-    pGraph = Kit_TruthToGraph( puTruth, nFanins, p->vMem );
-    pFunc = Kit_GraphToHop( p->pNtk->pManHop, pGraph );
-    Kit_GraphFree( pGraph );
-    return pFunc;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxMan.c b/src/aig/mfx/mfxMan.c
deleted file mode 100644
index ff8b02fd..00000000
--- a/src/aig/mfx/mfxMan.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [mfxMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [The good old minimization with complete don't-cares.]
-
-  Synopsis    [Procedures working with the manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: mfxMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Mfx_Man_t * Mfx_ManAlloc( Mfx_Par_t * pPars )
-{
-    Mfx_Man_t * p;
-    // start the manager
-    p = ABC_ALLOC( Mfx_Man_t, 1 );
-    memset( p, 0, sizeof(Mfx_Man_t) );
-    p->pPars     = pPars;
-    p->vProjVarsCnf = Vec_IntAlloc( 100 );
-    p->vProjVarsSat = Vec_IntAlloc( 100 );
-    p->vDivLits  = Vec_IntAlloc( 100 );
-    p->nDivWords = Aig_BitWordNum(p->pPars->nDivMax + MFX_FANIN_MAX);
-    p->vDivCexes = Vec_PtrAllocSimInfo( p->pPars->nDivMax+MFX_FANIN_MAX+1, p->nDivWords );
-    p->pMan      = Int_ManAlloc();
-    p->vMem      = Vec_IntAlloc( 0 );
-    p->vLevels   = Vec_VecStart( 32 );
-    p->vFanins   = Vec_PtrAlloc( 32 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Mfx_ManClean( Mfx_Man_t * p )
-{
-    if ( p->pAigWin )
-        Aig_ManStop( p->pAigWin );
-    if ( p->pCnf )
-        Cnf_DataFree( p->pCnf );
-    if ( p->pSat )
-        sat_solver_delete( p->pSat );
-    if ( p->vRoots )
-        Vec_PtrFree( p->vRoots );
-    if ( p->vSupp )
-        Vec_PtrFree( p->vSupp );
-    if ( p->vNodes )
-        Vec_PtrFree( p->vNodes );
-    if ( p->vDivs )
-        Vec_PtrFree( p->vDivs );
-    p->pAigWin = NULL;
-    p->pCnf    = NULL;
-    p->pSat    = NULL;
-    p->vRoots  = NULL;
-    p->vSupp   = NULL;
-    p->vNodes  = NULL;
-    p->vDivs   = NULL;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Mfx_ManPrint( Mfx_Man_t * p )
-{
-    if ( p->pPars->fResub )
-    {
-        printf( "Reduction in nodes = %5d. (%.2f %%) ", 
-            p->nTotalNodesBeg-p->nTotalNodesEnd, 
-            100.0*(p->nTotalNodesBeg-p->nTotalNodesEnd)/p->nTotalNodesBeg );
-        printf( "Reduction in edges = %5d. (%.2f %%) ", 
-            p->nTotalEdgesBeg-p->nTotalEdgesEnd, 
-            100.0*(p->nTotalEdgesBeg-p->nTotalEdgesEnd)/p->nTotalEdgesBeg );
-        printf( "\n" );
-        printf( "Nodes = %d. Try = %d. Resub = %d. Div = %d. SAT calls = %d. Timeouts = %d.\n", 
-            Nwk_ManNodeNum(p->pNtk), p->nNodesTried, p->nNodesResub, p->nTotalDivs, p->nSatCalls, p->nTimeOuts );
-        if ( p->pPars->fSwapEdge )
-            printf( "Swappable edges = %d. Total edges = %d. Ratio = %5.2f.\n", 
-                p->nNodesResub, Nwk_ManGetTotalFanins(p->pNtk), 1.00 * p->nNodesResub / Nwk_ManGetTotalFanins(p->pNtk) );
-//        else
-//            Mfx_PrintResubStats( p );
-//        printf( "Average ratio of DCs in the resubed nodes = %.2f.\n", 1.0*p->nDcMints/(64 * p->nNodesResub) );
-    }
-    else
-    {
-        printf( "Nodes = %d. Try = %d. Total mints = %d. Local DC mints = %d. Ratio = %5.2f.\n", 
-            Nwk_ManNodeNum(p->pNtk), p->nNodesTried, p->nMintsTotal, p->nMintsTotal-p->nMintsCare, 
-            1.0 * (p->nMintsTotal-p->nMintsCare) / p->nMintsTotal );
-//        printf( "Average ratio of sequential DCs in the global space = %5.2f.\n", 
-//            1.0-(p->dTotalRatios/p->nNodesTried) );
-        printf( "Nodes resyn = %d. Ratio = %5.2f.  Total AIG node gain = %d. Timeouts = %d.\n", 
-            p->nNodesDec, 1.0 * p->nNodesDec / p->nNodesTried, p->nNodesGained, p->nTimeOuts );
-    }
-/*
-    ABC_PRTP( "Win", p->timeWin            ,  p->timeTotal );
-    ABC_PRTP( "Div", p->timeDiv            ,  p->timeTotal );
-    ABC_PRTP( "Aig", p->timeAig            ,  p->timeTotal );
-    ABC_PRTP( "Cnf", p->timeCnf            ,  p->timeTotal );
-    ABC_PRTP( "Sat", p->timeSat-p->timeInt ,  p->timeTotal );
-    ABC_PRTP( "Int", p->timeInt            ,  p->timeTotal );
-    ABC_PRTP( "ALL", p->timeTotal          ,  p->timeTotal );
-*/
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Mfx_ManStop( Mfx_Man_t * p )
-{
-    if ( p->pPars->fVerbose )
-        Mfx_ManPrint( p );
-    if ( p->vTruth )
-        Vec_IntFree( p->vTruth );
-    if ( p->pManDec )
-        Bdc_ManFree( p->pManDec );
-    if ( p->pCare )
-        Aig_ManStop( p->pCare );
-    if ( p->vSuppsInv )
-        Vec_VecFree( (Vec_Vec_t *)p->vSuppsInv );
-    if ( p->vProbs )
-        Vec_IntFree( p->vProbs );
-    Mfx_ManClean( p );
-    Int_ManFree( p->pMan );
-    Vec_IntFree( p->vMem );
-    Vec_VecFree( p->vLevels );
-    Vec_PtrFree( p->vFanins );
-    Vec_IntFree( p->vProjVarsCnf );
-    Vec_IntFree( p->vProjVarsSat );
-    Vec_IntFree( p->vDivLits );
-    Vec_PtrFree( p->vDivCexes );
-    ABC_FREE( p );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxResub.c b/src/aig/mfx/mfxResub.c
deleted file mode 100644
index 5a4786d6..00000000
--- a/src/aig/mfx/mfxResub.c
+++ /dev/null
@@ -1,566 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [mfxResub.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [The good old minimization with complete don't-cares.]
-
-  Synopsis    [Procedures to perform resubstitution.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: mfxResub.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the network after resubstitution.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Mfx_UpdateNetwork( Mfx_Man_t * p, Nwk_Obj_t * pObj, Vec_Ptr_t * vFanins, Hop_Obj_t * pFunc )
-{
-    Nwk_Obj_t * pObjNew, * pFanin;
-    int k;
-    // create the new node
-    pObjNew = Nwk_ManCreateNode( pObj->pMan, Vec_PtrSize(vFanins), Nwk_ObjFanoutNum(pObj) );
-    pObjNew->pFunc = pFunc;
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vFanins, pFanin, k )
-        Nwk_ObjAddFanin( pObjNew, pFanin );
-    // replace the old node by the new node
-    Nwk_ManUpdate( pObj, pObjNew, p->vLevels );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints resub candidate stats.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Mfx_PrintResubStats( Mfx_Man_t * p )
-{
-    Nwk_Obj_t * pFanin, * pNode;
-    int i, k, nAreaCrits = 0, nAreaExpanse = 0;
-    int nFaninMax = Nwk_ManGetFaninMax(p->pNtk);
-    Nwk_ManForEachNode( p->pNtk, pNode, i )
-        Nwk_ObjForEachFanin( pNode, pFanin, k )
-        {
-            if ( !Nwk_ObjIsCi(pFanin) && Nwk_ObjFanoutNum(pFanin) == 1 )
-            {
-                nAreaCrits++;
-                nAreaExpanse += (int)(Nwk_ObjFaninNum(pNode) < nFaninMax);
-            }
-        }
-    printf( "Total area-critical fanins = %d. Belonging to expandable nodes = %d.\n", 
-        nAreaCrits, nAreaExpanse );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Tries resubstitution.]
-
-  Description [Returns 1 if it is feasible, or 0 if c-ex is found.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mfx_TryResubOnce( Mfx_Man_t * p, int * pCands, int nCands )
-{
-    unsigned * pData;
-    int RetValue, iVar, i;
-    p->nSatCalls++;
-    RetValue = sat_solver_solve( p->pSat, pCands, pCands + nCands, (ABC_INT64_T)p->pPars->nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-//    assert( RetValue == l_False || RetValue == l_True );
-    if ( RetValue == l_False )
-        return 1;
-    if ( RetValue != l_True )
-    {
-        p->nTimeOuts++;
-        return -1;
-    }
-    p->nSatCexes++;
-    // store the counter-example
-    Vec_IntForEachEntry( p->vProjVarsSat, iVar, i )
-    {
-        pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, i );
-        if ( !sat_solver_var_value( p->pSat, iVar ) ) // remove 0s!!!
-        {
-            assert( Aig_InfoHasBit(pData, p->nCexes) );
-            Aig_InfoXorBit( pData, p->nCexes );
-        }
-    }
-    p->nCexes++;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs resubstitution for the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mfx_SolveSatResub( Mfx_Man_t * p, Nwk_Obj_t * pNode, int iFanin, int fOnlyRemove, int fSkipUpdate )
-{
-    int fVeryVerbose = p->pPars->fVeryVerbose && Vec_PtrSize(p->vDivs) < 80;
-    unsigned * pData;
-    int pCands[MFX_FANIN_MAX];
-    int RetValue, iVar, i, nCands, nWords, w, clk;
-    Nwk_Obj_t * pFanin;
-    Hop_Obj_t * pFunc;
-    assert( iFanin >= 0 );
-
-    // clean simulation info
-    Vec_PtrFillSimInfo( p->vDivCexes, 0, p->nDivWords ); 
-    p->nCexes = 0;
-    if ( fVeryVerbose )
-    {
-        printf( "\n" );
-        printf( "Node %5d : Level = %2d. Divs = %3d.  Fanin = %d (out of %d). MFFC = %d\n", 
-            pNode->Id, pNode->Level, Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode), 
-            iFanin, Nwk_ObjFaninNum(pNode), 
-            Nwk_ObjFanoutNum(Nwk_ObjFanin(pNode, iFanin)) == 1 ? Nwk_ObjMffcLabel(Nwk_ObjFanin(pNode, iFanin)) : 0 );
-    }
-
-    // try fanins without the critical fanin
-    nCands = 0;
-    Vec_PtrClear( p->vFanins );
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-    {
-        if ( i == iFanin )
-            continue;
-        Vec_PtrPush( p->vFanins, pFanin );
-        iVar = Vec_PtrSize(p->vDivs) - Nwk_ObjFaninNum(pNode) + i;
-        pCands[nCands++] = toLitCond( Vec_IntEntry( p->vProjVarsSat, iVar ), 1 );
-    }
-    RetValue = Mfx_TryResubOnce( p, pCands, nCands );
-    if ( RetValue == -1 )
-        return 0;
-    if ( RetValue == 1 )
-    {
-        if ( fVeryVerbose )
-        printf( "Node %d: Fanin %d can be removed.\n", pNode->Id, iFanin );
-        p->nNodesResub++;
-        p->nNodesGainedLevel++;
-        if ( fSkipUpdate )
-            return 1;
-clk = clock();
-        // derive the function
-        pFunc = Mfx_Interplate( p, pCands, nCands );
-        if ( pFunc == NULL )
-            return 0;
-        // update the network
-        Mfx_UpdateNetwork( p, pNode, p->vFanins, pFunc );
-p->timeInt += clock() - clk;
-        return 1;
-    }
-
-    if ( fOnlyRemove )
-        return 0;
-
-    if ( fVeryVerbose )
-    {
-        for ( i = 0; i < 8; i++ )
-            printf( " " );
-        for ( i = 0; i < Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode); i++ )
-            printf( "%d", i % 10 );
-        for ( i = 0; i < Nwk_ObjFaninNum(pNode); i++ )
-            if ( i == iFanin )
-                printf( "*" );
-            else
-                printf( "%c", 'a' + i );
-        printf( "\n" );
-    }
-    iVar = -1;
-    while ( 1 )
-    {
-        float * pProbab = (float *)(p->vProbs? p->vProbs->pArray : NULL);
-        assert( (pProbab != NULL) == p->pPars->fPower );
-        if ( fVeryVerbose )
-        {
-            printf( "%3d: %2d ", p->nCexes, iVar );
-            for ( i = 0; i < Vec_PtrSize(p->vDivs); i++ )
-            {
-                pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, i );
-                printf( "%d", Aig_InfoHasBit(pData, p->nCexes-1) );
-            }
-            printf( "\n" );
-        }
-
-        // find the next divisor to try
-        nWords = Aig_BitWordNum(p->nCexes);
-        assert( nWords <= p->nDivWords );
-        for ( iVar = 0; iVar < Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode); iVar++ )
-        {
-            if ( p->pPars->fPower )
-            {
-                Nwk_Obj_t * pDiv = (Nwk_Obj_t *)Vec_PtrEntry(p->vDivs, iVar);
-                // only accept the divisor if it is "cool"
-                if ( pProbab[Nwk_ObjId(pDiv)] >= 0.2 )
-                    continue;
-            }
-            pData  = (unsigned *)Vec_PtrEntry( p->vDivCexes, iVar );
-            for ( w = 0; w < nWords; w++ )
-                if ( pData[w] != ~0 )
-                    break;
-            if ( w == nWords )
-                break;
-        }
-        if ( iVar == Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode) )
-            return 0;
-
-        pCands[nCands] = toLitCond( Vec_IntEntry(p->vProjVarsSat, iVar), 1 );
-        RetValue = Mfx_TryResubOnce( p, pCands, nCands+1 );
-        if ( RetValue == -1 )
-            return 0;
-        if ( RetValue == 1 )
-        {
-            if ( fVeryVerbose )
-            printf( "Node %d: Fanin %d can be replaced by divisor %d.\n", pNode->Id, iFanin, iVar );
-            p->nNodesResub++;
-            p->nNodesGainedLevel++;
-            if ( fSkipUpdate )
-                return 1;
-clk = clock();
-            // derive the function
-            pFunc = Mfx_Interplate( p, pCands, nCands+1 );
-            if ( pFunc == NULL )
-                return 0;
-            // update the network
-            Vec_PtrPush( p->vFanins, Vec_PtrEntry(p->vDivs, iVar) );
-            Mfx_UpdateNetwork( p, pNode, p->vFanins, pFunc );
-p->timeInt += clock() - clk;
-            return 1;
-        }
-        if ( p->nCexes >= p->pPars->nDivMax )
-            break;
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs resubstitution for the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mfx_SolveSatResub2( Mfx_Man_t * p, Nwk_Obj_t * pNode, int iFanin, int iFanin2 )
-{
-    int fVeryVerbose = p->pPars->fVeryVerbose && Vec_PtrSize(p->vDivs) < 80;
-    unsigned * pData, * pData2;
-    int pCands[MFX_FANIN_MAX];
-    int RetValue, iVar, iVar2, i, w, nCands, clk, nWords, fBreak;
-    Nwk_Obj_t * pFanin;
-    Hop_Obj_t * pFunc;
-    assert( iFanin >= 0 );
-    assert( iFanin2 >= 0 || iFanin2 == -1 );
-
-    // clean simulation info
-    Vec_PtrFillSimInfo( p->vDivCexes, 0, p->nDivWords ); 
-    p->nCexes = 0;
-    if ( fVeryVerbose )
-    {
-        printf( "\n" );
-        printf( "Node %5d : Level = %2d. Divs = %3d.  Fanins = %d/%d (out of %d). MFFC = %d\n", 
-            pNode->Id, pNode->Level, Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode), 
-            iFanin, iFanin2, Nwk_ObjFaninNum(pNode), 
-            Nwk_ObjFanoutNum(Nwk_ObjFanin(pNode, iFanin)) == 1 ? Nwk_ObjMffcLabel(Nwk_ObjFanin(pNode, iFanin)) : 0 );
-    }
-
-    // try fanins without the critical fanin
-    nCands = 0;
-    Vec_PtrClear( p->vFanins );
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-    {
-        if ( i == iFanin || i == iFanin2 )
-            continue;
-        Vec_PtrPush( p->vFanins, pFanin );
-        iVar = Vec_PtrSize(p->vDivs) - Nwk_ObjFaninNum(pNode) + i;
-        pCands[nCands++] = toLitCond( Vec_IntEntry( p->vProjVarsSat, iVar ), 1 );
-    }
-    RetValue = Mfx_TryResubOnce( p, pCands, nCands );
-    if ( RetValue == -1 )
-        return 0;
-    if ( RetValue == 1 )
-    {
-        if ( fVeryVerbose )
-        printf( "Node %d: Fanins %d/%d can be removed.\n", pNode->Id, iFanin, iFanin2 );
-        p->nNodesResub++;
-        p->nNodesGainedLevel++;
-clk = clock();
-        // derive the function
-        pFunc = Mfx_Interplate( p, pCands, nCands );
-        if ( pFunc == NULL )
-            return 0;
-        // update the network
-        Mfx_UpdateNetwork( p, pNode, p->vFanins, pFunc );
-p->timeInt += clock() - clk;
-        return 1;
-    }
-
-    if ( fVeryVerbose )
-    {
-        for ( i = 0; i < 11; i++ )
-            printf( " " );
-        for ( i = 0; i < Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode); i++ )
-            printf( "%d", i % 10 );
-        for ( i = 0; i < Nwk_ObjFaninNum(pNode); i++ )
-            if ( i == iFanin || i == iFanin2 )
-                printf( "*" );
-            else
-                printf( "%c", 'a' + i );
-        printf( "\n" );
-    }
-    iVar = iVar2 = -1;
-    while ( 1 )
-    {
-        if ( fVeryVerbose )
-        {
-            printf( "%3d: %2d %2d ", p->nCexes, iVar, iVar2 );
-            for ( i = 0; i < Vec_PtrSize(p->vDivs); i++ )
-            {
-                pData = (unsigned *)Vec_PtrEntry( p->vDivCexes, i );
-                printf( "%d", Aig_InfoHasBit(pData, p->nCexes-1) );
-            }
-            printf( "\n" );
-        }
-
-        // find the next divisor to try
-        nWords = Aig_BitWordNum(p->nCexes);
-        assert( nWords <= p->nDivWords );
-        fBreak = 0;
-        for ( iVar = 1; iVar < Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode); iVar++ )
-        {
-            pData  = (unsigned *)Vec_PtrEntry( p->vDivCexes, iVar );
-            for ( iVar2 = 0; iVar2 < iVar; iVar2++ )
-            {
-                pData2 = (unsigned *)Vec_PtrEntry( p->vDivCexes, iVar2 );
-                for ( w = 0; w < nWords; w++ )
-                    if ( (pData[w] | pData2[w]) != ~0 )
-                        break;
-                if ( w == nWords )
-                {
-                    fBreak = 1;
-                    break;
-                }
-            }
-            if ( fBreak )
-                break;
-        }
-        if ( iVar == Vec_PtrSize(p->vDivs)-Nwk_ObjFaninNum(pNode) )
-            return 0;
-
-        pCands[nCands]   = toLitCond( Vec_IntEntry(p->vProjVarsSat, iVar2), 1 );
-        pCands[nCands+1] = toLitCond( Vec_IntEntry(p->vProjVarsSat, iVar), 1 );
-        RetValue = Mfx_TryResubOnce( p, pCands, nCands+2 );
-        if ( RetValue == -1 )
-            return 0;
-        if ( RetValue == 1 )
-        {
-            if ( fVeryVerbose )
-            printf( "Node %d: Fanins %d/%d can be replaced by divisors %d/%d.\n", pNode->Id, iFanin, iFanin2, iVar, iVar2 );
-            p->nNodesResub++;
-            p->nNodesGainedLevel++;
-clk = clock();
-            // derive the function
-            pFunc = Mfx_Interplate( p, pCands, nCands+2 );
-            if ( pFunc == NULL )
-                return 0;
-            // update the network
-            Vec_PtrPush( p->vFanins, Vec_PtrEntry(p->vDivs, iVar2) );
-            Vec_PtrPush( p->vFanins, Vec_PtrEntry(p->vDivs, iVar) );
-            assert( Vec_PtrSize(p->vFanins) == nCands + 2 );
-            Mfx_UpdateNetwork( p, pNode, p->vFanins, pFunc );
-p->timeInt += clock() - clk;
-            return 1;
-        }
-        if ( p->nCexes >= p->pPars->nDivMax )
-            break;
-    }
-    return 0;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Evaluates the possibility of replacing given edge by another edge.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mfx_EdgeSwapEval( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
-    Nwk_Obj_t * pFanin;
-    int i;
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-        Mfx_SolveSatResub( p, pNode, i, 0, 1 );
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Evaluates the possibility of replacing given edge by another edge.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mfx_EdgePower( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
-    Nwk_Obj_t * pFanin;
-    float * pProbab = (float *)p->vProbs->pArray;
-    int i;
-    // try replacing area critical fanins
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-        if ( pProbab[pFanin->Id] >= 0.4 )
-        {
-            if ( Mfx_SolveSatResub( p, pNode, i, 0, 0 ) )
-                return 1;
-        }
-    return 0;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs resubstitution for the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mfx_ResubNode( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
-    Nwk_Obj_t * pFanin;
-    int i;
-    // try replacing area critical fanins
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-        if ( !Nwk_ObjIsCi(pFanin) && Nwk_ObjFanoutNum(pFanin) == 1 )
-        {
-            if ( Mfx_SolveSatResub( p, pNode, i, 0, 0 ) )
-                return 1;
-        }
-    // try removing redundant edges
-    if ( !p->pPars->fArea )
-    {
-        Nwk_ObjForEachFanin( pNode, pFanin, i )
-            if ( Nwk_ObjIsCi(pFanin) || Nwk_ObjFanoutNum(pFanin) != 1 )
-            {
-                if ( Mfx_SolveSatResub( p, pNode, i, 1, 0 ) )
-                    return 1;
-            }
-    }
-    if ( Nwk_ObjFaninNum(pNode) == p->nFaninMax )
-        return 0;
-
-    return 0; /// !!!!! temporary workaround
-
-    // try replacing area critical fanins while adding two new fanins
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-        if ( !Nwk_ObjIsCi(pFanin) && Nwk_ObjFanoutNum(pFanin) == 1 )
-        {
-            if ( Mfx_SolveSatResub2( p, pNode, i, -1 ) )
-                return 1;
-        }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs resubstitution for the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mfx_ResubNode2( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
-    Nwk_Obj_t * pFanin, * pFanin2;
-    int i, k;
-/*
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-        if ( !Nwk_ObjIsCi(pFanin) && Nwk_ObjFanoutNum(pFanin) == 1 )
-        {
-            if ( Mfx_SolveSatResub( p, pNode, i, 0, 0 ) )
-                return 1;
-        }
-*/
-    if ( Nwk_ObjFaninNum(pNode) < 2 )
-        return 0;
-    // try replacing one area critical fanin and one other fanin while adding two new fanins
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-    {
-        if ( !Nwk_ObjIsCi(pFanin) && Nwk_ObjFanoutNum(pFanin) == 1 )
-        {
-            // consider second fanin to remove at the same time
-            Nwk_ObjForEachFanin( pNode, pFanin2, k )
-            {
-                if ( i != k && Mfx_SolveSatResub2( p, pNode, i, k ) )
-                    return 1;
-            }
-        }
-    }
-    return 0;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxSat.c b/src/aig/mfx/mfxSat.c
deleted file mode 100644
index 974563ab..00000000
--- a/src/aig/mfx/mfxSat.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [mfxSat.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [The good old minimization with complete don't-cares.]
-
-  Synopsis    [Procedures to compute don't-cares using SAT.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: mfxSat.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Enumerates through the SAT assignments.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Mfx_SolveSat_iter( Mfx_Man_t * p )
-{
-    int Lits[MFX_FANIN_MAX];
-    int RetValue, nBTLimit, iVar, b, Mint;
-    if ( p->nTotConfLim && p->nTotConfLim <= p->pSat->stats.conflicts )
-        return -1;
-    nBTLimit = p->nTotConfLim? p->nTotConfLim - p->pSat->stats.conflicts : 0;
-    RetValue = sat_solver_solve( p->pSat, NULL, NULL, (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    assert( RetValue == l_Undef || RetValue == l_True || RetValue == l_False );
-    if ( RetValue == l_Undef )
-        return -1;
-    if ( RetValue == l_False )
-        return 0;
-    p->nCares++;
-    // add SAT assignment to the solver
-    Mint = 0;
-    Vec_IntForEachEntry( p->vProjVarsSat, iVar, b )
-    {
-        Lits[b] = toLit( iVar );
-        if ( sat_solver_var_value( p->pSat, iVar ) )
-        {
-            Mint |= (1 << b);
-            Lits[b] = lit_neg( Lits[b] );
-        }
-    }
-    assert( !Aig_InfoHasBit(p->uCare, Mint) );
-    Aig_InfoSetBit( p->uCare, Mint );
-    // add the blocking clause
-    RetValue = sat_solver_addclause( p->pSat, Lits, Lits + Vec_IntSize(p->vProjVarsSat) );
-    if ( RetValue == 0 )
-        return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Enumerates through the SAT assignments.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
- 
-***********************************************************************/
-int Mfx_SolveSat( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
-    Aig_Obj_t * pObjPo;
-    int RetValue, i;
-    // collect projection variables
-    Vec_IntClear( p->vProjVarsSat );
-    Vec_PtrForEachEntryStart( Aig_Obj_t *, p->pAigWin->vPos, pObjPo, i, Aig_ManPoNum(p->pAigWin) - Nwk_ObjFaninNum(pNode) )
-    {
-        assert( p->pCnf->pVarNums[pObjPo->Id] >= 0 );
-        Vec_IntPush( p->vProjVarsSat, p->pCnf->pVarNums[pObjPo->Id] );
-    }
-
-    // prepare the truth table of care set
-    p->nFanins = Vec_IntSize( p->vProjVarsSat );
-    p->nWords = Aig_TruthWordNum( p->nFanins );
-    memset( p->uCare, 0, sizeof(unsigned) * p->nWords );
-
-    // iterate through the SAT assignments
-    p->nCares = 0;
-    p->nTotConfLim = p->pPars->nBTLimit;
-    while ( (RetValue = Mfx_SolveSat_iter(p)) == 1 );
-    if ( RetValue == -1 )
-        return 0;
-
-    // write statistics
-    p->nMintsCare  += p->nCares;
-    p->nMintsTotal += (1<<p->nFanins);
-
-    if ( p->pPars->fVeryVerbose )
-    {
-        printf( "Node %4d : Care = %2d. Total = %2d.  ", pNode->Id, p->nCares, (1<<p->nFanins) );
-//        Kit_TruthPrintBinary( stdout, p->uCare, (1<<p->nFanins) );
-        printf( "\n" );
-    }
-
-    // map the care 
-    if ( p->nFanins > 4 )
-        return 1;
-    if ( p->nFanins == 4 )
-        p->uCare[0] = p->uCare[0] | (p->uCare[0] << 16);
-    if ( p->nFanins == 3 )
-        p->uCare[0] = p->uCare[0] | (p->uCare[0] << 8) | (p->uCare[0] << 16) | (p->uCare[0] << 24);
-    if ( p->nFanins == 2 )
-        p->uCare[0] = p->uCare[0] | (p->uCare[0] <<  4) | (p->uCare[0] <<  8) | (p->uCare[0] << 12) |
-              (p->uCare[0] << 16) | (p->uCare[0] << 20) | (p->uCare[0] << 24) | (p->uCare[0] << 28);
-    assert( p->nFanins != 1 );
-    return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxStrash.c b/src/aig/mfx/mfxStrash.c
deleted file mode 100644
index f750523d..00000000
--- a/src/aig/mfx/mfxStrash.c
+++ /dev/null
@@ -1,344 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [mfxStrash.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [The good old minimization with complete don't-cares.]
-
-  Synopsis    [Structural hashing of the window with ODCs.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: mfxStrash.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Construct BDDs and mark AIG nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ConvertHopToAig_rec( Hop_Obj_t * pObj, Aig_Man_t * pMan )
-{
-    assert( !Hop_IsComplement(pObj) );
-    if ( !Hop_ObjIsNode(pObj) || Hop_ObjIsMarkA(pObj) )
-        return;
-    Nwk_ConvertHopToAig_rec( Hop_ObjFanin0(pObj), pMan ); 
-    Nwk_ConvertHopToAig_rec( Hop_ObjFanin1(pObj), pMan );
-    pObj->pData = Aig_And( pMan, (Aig_Obj_t *)Hop_ObjChild0Copy(pObj), (Aig_Obj_t *)Hop_ObjChild1Copy(pObj) ); 
-    assert( !Hop_ObjIsMarkA(pObj) ); // loop detection
-    Hop_ObjSetMarkA( pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Converts the network from AIG to BDD representation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ConvertHopToAig( Nwk_Obj_t * pObjOld, Aig_Man_t * pMan )
-{
-    Hop_Man_t * pHopMan;
-    Hop_Obj_t * pRoot;
-    Nwk_Obj_t * pFanin;
-    int i;
-    // get the local AIG
-    pHopMan = pObjOld->pMan->pManHop;
-    pRoot = pObjOld->pFunc;
-    // check the case of a constant
-    if ( Hop_ObjIsConst1( Hop_Regular(pRoot) ) )
-    {
-        pObjOld->pCopy = (Nwk_Obj_t *)Aig_NotCond( Aig_ManConst1(pMan), Hop_IsComplement(pRoot) );
-        pObjOld->pNext = pObjOld->pCopy;
-        return;
-    }
-
-    // assign the fanin nodes
-    Nwk_ObjForEachFanin( pObjOld, pFanin, i )
-        Hop_ManPi(pHopMan, i)->pData = pFanin->pCopy;
-    // construct the AIG
-    Nwk_ConvertHopToAig_rec( Hop_Regular(pRoot), pMan );
-    pObjOld->pCopy = (Nwk_Obj_t *)Aig_NotCond( (Aig_Obj_t *)Hop_Regular(pRoot)->pData, Hop_IsComplement(pRoot) );  
-    Hop_ConeUnmark_rec( Hop_Regular(pRoot) );
-
-    // assign the fanin nodes
-    Nwk_ObjForEachFanin( pObjOld, pFanin, i )
-        Hop_ManPi(pHopMan, i)->pData = pFanin->pNext;
-    // construct the AIG
-    Nwk_ConvertHopToAig_rec( Hop_Regular(pRoot), pMan );
-    pObjOld->pNext = (Nwk_Obj_t *)Aig_NotCond( (Aig_Obj_t *)Hop_Regular(pRoot)->pData, Hop_IsComplement(pRoot) );  
-    Hop_ConeUnmark_rec( Hop_Regular(pRoot) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the care set of the node under ODCs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Mfx_ConstructAig_rec( Mfx_Man_t * p, Nwk_Obj_t * pNode, Aig_Man_t * pMan )
-{
-    Aig_Obj_t * pRoot, * pExor;
-    Nwk_Obj_t * pObj;
-    int i;
-    // assign AIG nodes to the leaves
-    Vec_PtrForEachEntry( Nwk_Obj_t *, p->vSupp, pObj, i )
-        pObj->pCopy = pObj->pNext = (Nwk_Obj_t *)Aig_ObjCreatePi( pMan );
-    // strash intermediate nodes
-    Nwk_ManIncrementTravId( pNode->pMan );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, p->vNodes, pObj, i )
-    {
-        Nwk_ConvertHopToAig( pObj, pMan );
-        if ( pObj == pNode )
-            pObj->pNext = Aig_Not((Aig_Obj_t *)pObj->pNext);
-    }
-    // create the observability condition
-    pRoot = Aig_ManConst0(pMan);
-    Vec_PtrForEachEntry( Nwk_Obj_t *, p->vRoots, pObj, i )
-    {
-        pExor = Aig_Exor( pMan, (Aig_Obj_t *)pObj->pCopy, (Aig_Obj_t *)pObj->pNext );
-        pRoot = Aig_Or( pMan, pRoot, pExor );
-    }
-    return pRoot;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds relevant constraints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Mfx_ConstructCare_rec( Aig_Man_t * pCare, Aig_Obj_t * pObj, Aig_Man_t * pMan )
-{
-    Aig_Obj_t * pObj0, * pObj1;
-    if ( Aig_ObjIsTravIdCurrent( pCare, pObj ) )
-        return (Aig_Obj_t *)pObj->pData;
-    Aig_ObjSetTravIdCurrent( pCare, pObj );
-    if ( Aig_ObjIsPi(pObj) )
-        return (Aig_Obj_t *)(pObj->pData = NULL);
-    pObj0 = Mfx_ConstructCare_rec( pCare, Aig_ObjFanin0(pObj), pMan );
-    if ( pObj0 == NULL )
-        return (Aig_Obj_t *)(pObj->pData = NULL);
-    pObj1 = Mfx_ConstructCare_rec( pCare, Aig_ObjFanin1(pObj), pMan );
-    if ( pObj1 == NULL )
-        return (Aig_Obj_t *)(pObj->pData = NULL);
-    pObj0 = Aig_NotCond( pObj0, Aig_ObjFaninC0(pObj) );
-    pObj1 = Aig_NotCond( pObj1, Aig_ObjFaninC1(pObj) );
-    return (Aig_Obj_t *)(pObj->pData = Aig_And( pMan, pObj0, pObj1 ));
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManVerifyManager( Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pObj;
-    int i;
-    Nwk_ManForEachObj( pNtk, pObj, i )
-    {
-        assert( pObj->pMan == pNtk );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates AIG for the window with constraints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Mfx_ConstructAig( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
-    Aig_Man_t * pMan;
-    Nwk_Obj_t * pFanin;
-    Aig_Obj_t * pObjAig, * pPi, * pPo;
-    Vec_Int_t * vOuts;
-    int i, k, iOut;
-//    Nwk_ManVerifyManager( p->pNtk );
-    // start the new manager
-    pMan = Aig_ManStart( 1000 );
-    // construct the root node's AIG cone
-    pObjAig = Mfx_ConstructAig_rec( p, pNode, pMan );
-//    assert( Aig_ManConst1(pMan) == pObjAig );
-    Aig_ObjCreatePo( pMan, pObjAig );
-    if ( p->pCare )
-    {
-        // mark the care set
-        Aig_ManIncrementTravId( p->pCare );
-        Vec_PtrForEachEntry( Nwk_Obj_t *, p->vSupp, pFanin, i )
-        {
-            pPi = Aig_ManPi( p->pCare, pFanin->PioId );
-            Aig_ObjSetTravIdCurrent( p->pCare, pPi );
-            pPi->pData = pFanin->pCopy;
-        }
-        // construct the constraints
-        Vec_PtrForEachEntry( Nwk_Obj_t *, p->vSupp, pFanin, i )
-        {
-            vOuts = (Vec_Int_t *)Vec_PtrEntry( p->vSuppsInv, pFanin->PioId );
-            Vec_IntForEachEntry( vOuts, iOut, k )
-            {
-                pPo = Aig_ManPo( p->pCare, iOut );
-                if ( Aig_ObjIsTravIdCurrent( p->pCare, pPo ) )
-                    continue;
-                Aig_ObjSetTravIdCurrent( p->pCare, pPo );
-                if ( Aig_ObjFanin0(pPo) == Aig_ManConst1(p->pCare) )
-                    continue;
-                pObjAig = Mfx_ConstructCare_rec( p->pCare, Aig_ObjFanin0(pPo), pMan );
-                if ( pObjAig == NULL )
-                    continue;
-                pObjAig = Aig_NotCond( pObjAig, Aig_ObjFaninC0(pPo) );
-                Aig_ObjCreatePo( pMan, pObjAig );
-            }
-        }
-/*
-        Aig_ManForEachPo( p->pCare, pPo, i )
-        {
-//            assert( Aig_ObjFanin0(pPo) != Aig_ManConst1(p->pCare) );
-            if ( Aig_ObjFanin0(pPo) == Aig_ManConst1(p->pCare) )
-                continue;
-            pObjAig = Mfx_ConstructCare_rec( p->pCare, Aig_ObjFanin0(pPo), pMan );
-            if ( pObjAig == NULL )
-                continue;
-            pObjAig = Aig_NotCond( pObjAig, Aig_ObjFaninC0(pPo) );
-            Aig_ObjCreatePo( pMan, pObjAig );
-        }
-*/
-    }
-    if ( p->pPars->fResub )
-    {
-        // construct the node
-        pObjAig = (Aig_Obj_t *)pNode->pCopy;
-        Aig_ObjCreatePo( pMan, pObjAig );
-        // construct the divisors
-        Vec_PtrForEachEntry( Nwk_Obj_t *, p->vDivs, pFanin, i )
-        {
-            pObjAig = (Aig_Obj_t *)pFanin->pCopy;
-            Aig_ObjCreatePo( pMan, pObjAig );
-        }
-    }
-    else
-    {
-        // construct the fanins
-        Nwk_ObjForEachFanin( pNode, pFanin, i )
-        {
-            pObjAig = (Aig_Obj_t *)pFanin->pCopy;
-            Aig_ObjCreatePo( pMan, pObjAig );
-        }
-    }
-    Aig_ManCleanup( pMan );
-    return pMan;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates AIG for the window with constraints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Nwk_AigForConstraints( Mfx_Man_t * p, Nwk_Obj_t * pNode )
-{
-    Nwk_Obj_t * pFanin;
-    Aig_Man_t * pMan;
-    Aig_Obj_t * pPi, * pPo, * pObjAig, * pObjRoot;
-    Vec_Int_t * vOuts;
-    int i, k, iOut;
-    if ( p->pCare == NULL )
-        return NULL;
-    pMan = Aig_ManStart( 1000 );
-    // mark the care set
-    Aig_ManIncrementTravId( p->pCare );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, p->vSupp, pFanin, i )
-    {
-        pPi = Aig_ManPi( p->pCare, pFanin->PioId );
-        Aig_ObjSetTravIdCurrent( p->pCare, pPi );
-        pPi->pData = Aig_ObjCreatePi(pMan);
-    }
-    // construct the constraints
-    pObjRoot = Aig_ManConst1(pMan);
-    Vec_PtrForEachEntry( Nwk_Obj_t *, p->vSupp, pFanin, i )
-    {
-        vOuts = (Vec_Int_t *)Vec_PtrEntry( p->vSuppsInv, pFanin->PioId );
-        Vec_IntForEachEntry( vOuts, iOut, k )
-        {
-            pPo = Aig_ManPo( p->pCare, iOut );
-            if ( Aig_ObjIsTravIdCurrent( p->pCare, pPo ) )
-                continue;
-            Aig_ObjSetTravIdCurrent( p->pCare, pPo );
-            if ( Aig_ObjFanin0(pPo) == Aig_ManConst1(p->pCare) )
-                continue;
-            pObjAig = Mfx_ConstructCare_rec( p->pCare, Aig_ObjFanin0(pPo), pMan );
-            if ( pObjAig == NULL )
-                continue;
-            pObjAig = Aig_NotCond( pObjAig, Aig_ObjFaninC0(pPo) );
-            pObjRoot = Aig_And( pMan, pObjRoot, pObjAig );
-        }
-    }
-    Aig_ObjCreatePo( pMan, pObjRoot );
-    Aig_ManCleanup( pMan );
-    return pMan;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfxWin.c b/src/aig/mfx/mfxWin.c
deleted file mode 100644
index 7cb3c53d..00000000
--- a/src/aig/mfx/mfxWin.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [mfxWin.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [The good old minimization with complete don't-cares.]
-
-  Synopsis    [Procedures to compute windows stretching to the PIs.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: mfxWin.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfxInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the node should be a root.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Mfx_ComputeRootsCheck( Nwk_Obj_t * pNode, int nLevelMax, int nFanoutLimit )
-{
-    Nwk_Obj_t * pFanout;
-    int i;
-    // the node is the root if one of the following is true:
-    // (1) the node has more than fanouts than the limit
-    if ( Nwk_ObjFanoutNum(pNode) > nFanoutLimit )
-        return 1;
-    // (2) the node has CO fanouts
-    // (3) the node has fanouts above the cutoff level
-    Nwk_ObjForEachFanout( pNode, pFanout, i )
-        if ( Nwk_ObjIsCo(pFanout) || pFanout->Level > nLevelMax )
-            return 1;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recursively collects the root candidates.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Mfx_ComputeRoots_rec( Nwk_Obj_t * pNode, int nLevelMax, int nFanoutLimit, Vec_Ptr_t * vRoots )
-{
-    Nwk_Obj_t * pFanout;
-    int i;
-    assert( Nwk_ObjIsNode(pNode) );
-    if ( Nwk_ObjIsTravIdCurrent(pNode) )
-        return;
-    Nwk_ObjSetTravIdCurrent( pNode );
-    // check if the node should be the root
-    if ( Mfx_ComputeRootsCheck( pNode, nLevelMax, nFanoutLimit ) )
-        Vec_PtrPush( vRoots, pNode );
-    else // if not, explore its fanouts
-        Nwk_ObjForEachFanout( pNode, pFanout, i )
-            Mfx_ComputeRoots_rec( pFanout, nLevelMax, nFanoutLimit, vRoots );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recursively collects the root candidates.]
-
-  Description [Returns 1 if the only root is this node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Mfx_ComputeRoots( Nwk_Obj_t * pNode, int nWinTfoMax, int nFanoutLimit )
-{
-    Vec_Ptr_t * vRoots;
-    vRoots = Vec_PtrAlloc( 10 );
-    Nwk_ManIncrementTravId( pNode->pMan );
-    Mfx_ComputeRoots_rec( pNode, pNode->Level + nWinTfoMax, nFanoutLimit, vRoots );
-    assert( Vec_PtrSize(vRoots) > 0 );
-//    if ( Vec_PtrSize(vRoots) == 1 && Vec_PtrEntry(vRoots, 0) == pNode )
-//        return 0;
-    return vRoots;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/mfx_.c b/src/aig/mfx/mfx_.c
deleted file mode 100644
index 2682fa42..00000000
--- a/src/aig/mfx/mfx_.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [mfs_.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [The good old minimization with complete don't-cares.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: mfs_.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "mfsInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/mfx/module.make b/src/aig/mfx/module.make
deleted file mode 100644
index 22b9b72a..00000000
--- a/src/aig/mfx/module.make
+++ /dev/null
@@ -1,8 +0,0 @@
-SRC +=  src/aig/mfx/mfxCore.c \
-    src/aig/mfx/mfxDiv.c \
-    src/aig/mfx/mfxInter.c \
-    src/aig/mfx/mfxMan.c \
-    src/aig/mfx/mfxResub.c \
-    src/aig/mfx/mfxSat.c \
-    src/aig/mfx/mfxStrash.c \
-    src/aig/mfx/mfxWin.c
diff --git a/src/aig/ntl/module.make b/src/aig/ntl/module.make
deleted file mode 100644
index 2af0f4e0..00000000
--- a/src/aig/ntl/module.make
+++ /dev/null
@@ -1,17 +0,0 @@
-SRC +=    src/aig/ntl/ntlCheck.c \
-    src/aig/ntl/ntlCore.c \
-    src/aig/ntl/ntlEc.c \
-    src/aig/ntl/ntlExtract.c \
-    src/aig/ntl/ntlFraig.c \
-    src/aig/ntl/ntlInsert.c \
-    src/aig/ntl/ntlMan.c \
-    src/aig/ntl/ntlMap.c \
-    src/aig/ntl/ntlNames.c \
-    src/aig/ntl/ntlObj.c \
-    src/aig/ntl/ntlReadBlif.c \
-    src/aig/ntl/ntlSweep.c \
-    src/aig/ntl/ntlTable.c \
-    src/aig/ntl/ntlTime.c \
-    src/aig/ntl/ntlUtil.c \
-    src/aig/ntl/ntlWriteBlif.c
-
diff --git a/src/aig/ntl/ntl.h b/src/aig/ntl/ntl.h
deleted file mode 100644
index c0d701e0..00000000
--- a/src/aig/ntl/ntl.h
+++ /dev/null
@@ -1,426 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntl.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntl.h,v 1.3 2008/10/24 14:18:44 mjarvin Exp $]
-
-***********************************************************************/
- 
-#ifndef __NTL_H__
-#define __NTL_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include "aig.h"
-#include "tim.h"
-#include "nwk.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-ABC_NAMESPACE_HEADER_START
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Ntl_Mod_t_    Ntl_Mod_t;
-typedef struct Ntl_Reg_t_    Ntl_Reg_t;
-typedef struct Ntl_Obj_t_    Ntl_Obj_t;
-typedef struct Ntl_Net_t_    Ntl_Net_t;
-typedef struct Ntl_Lut_t_    Ntl_Lut_t;
-
-// object types
-typedef enum { 
-    NTL_OBJ_NONE,                      // 0: non-existent object
-    NTL_OBJ_PI,                        // 1: primary input
-    NTL_OBJ_PO,                        // 2: primary output
-    NTL_OBJ_LATCH,                     // 3: latch 
-    NTL_OBJ_NODE,                      // 4: logic node
-    NTL_OBJ_LUT1,                      // 5: inverter/buffer
-    NTL_OBJ_BOX,                       // 6: white box or black box
-    NTL_OBJ_VOID                       // 7: unused object
-} Ntl_Type_t;
-
-struct Ntl_Man_t_
-{
-    // models of this design
-    char *             pName;          // the name of this design
-    char *             pSpec;          // the name of input file
-    Vec_Ptr_t *        vModels;        // the array of all models used to represent boxes
-    int                BoxTypes[32];   // the array of box types among the models
-    // memory managers
-    Aig_MmFlex_t *     pMemObjs;       // memory for objects
-    Aig_MmFlex_t *     pMemSops;       // memory for SOPs
-    // extracted representation
-    Vec_Ptr_t *        vCis;           // the primary inputs of the extracted part
-    Vec_Ptr_t *        vCos;           // the primary outputs of the extracted part 
-    Vec_Ptr_t *        vVisNodes;      // the nodes of the abstracted part
-    Vec_Int_t *        vBox1Cios;      // the first COs of the boxes
-    Vec_Int_t *        vRegClasses;    // the classes of registers in the AIG
-    Vec_Int_t *        vRstClasses;    // the classes of reset registers in the AIG
-    Aig_Man_t *        pAig;           // the extracted AIG
-    Tim_Man_t *        pManTime;       // the timing manager
-    int                iLastCi;        // the last true CI
-    void *             pNal;           // additional data
-    void (*pNalF)(void *);             // additional data
-    void (*pNalD)(void *,void *);      // additional data
-    void (*pNalW)(void *,void *);      // additional data
-    void (*pNalR)(void *);             // additional data
-    // hashing names into models
-    Ntl_Mod_t **       pModTable;      // the hash table of names into models
-    int                nModTableSize;  // the allocated table size
-    int                nModEntries;    // the number of entries in the hash table
-};
-
-struct Ntl_Mod_t_
-{
-    // model description
-    Ntl_Man_t *        pMan;           // the model manager 
-    char *             pName;          // the model name
-    Vec_Ptr_t *        vObjs;          // the array of all objects
-    Vec_Ptr_t *        vPis;           // the array of PI objects
-    Vec_Ptr_t *        vPos;           // the array of PO objects
-    Vec_Ptr_t *        vNets;          // the array of nets
-    int                nObjs[NTL_OBJ_VOID]; // counter of objects of each type
-    // box attributes
-    unsigned int       attrWhite   :1; // box has known logic
-    unsigned int       attrBox     :1; // box is to remain unmapped
-    unsigned int       attrComb    :1; // box is combinational
-    unsigned int       attrKeep    :1; // box cannot be removed by structural sweep
-    unsigned int       attrNoMerge :1; // box outputs cannot be merged
-    // hashing names into nets
-    Ntl_Net_t **       pTable;         // the hash table of names into nets
-    int                nTableSize;     // the allocated table size
-    int                nEntries;       // the number of entries in the hash table
-    // clocks of the model
-    Vec_Ptr_t *        vClocks;        // the clock signals
-    Vec_Vec_t *        vClockFlops;    // the flops of each clock
-    // resets of the model
-    Vec_Ptr_t *        vResets;        // the reset signals
-    Vec_Vec_t *        vResetFlops;    // the ASYNC flops of each reset
-    // delay information
-    Vec_Int_t *        vDelays;
-    Vec_Int_t *        vTimeInputs;
-    Vec_Int_t *        vTimeOutputs;
-    float *            pDelayTable;   
-    // other data members
-    Ntl_Mod_t *        pNext;
-    void *             pCopy;
-    int                nUsed, nRems;
-};  
-
-struct Ntl_Reg_t_
-{
-    unsigned int       regInit   :  2; // register initial value
-    unsigned int       regType   :  3; // register type
-    unsigned int       regClass  : 28; // register class
-};
-
-struct Ntl_Obj_t_
-{
-//    Ntl_Mod_t *        pModel;         // the model  
-    void *             pCopy;          // the copy of this object
-    unsigned           Type   :  3;    // object type
-    unsigned           fMark  :  1;    // temporary mark  
-    unsigned           Id     : 28;    // object ID
-    int                nFanins;        // the number of fanins
-    int                nFanouts;       // the number of fanouts
-    int                Reset;          // reset of the flop
-    union {                            // functionality
-        Ntl_Mod_t *    pImplem;        // model (for boxes)
-        char *         pSop;           // SOP (for logic nodes)
-        Ntl_Reg_t      LatchId;        // init state + register class (for latches) 
-    };
-    union {                            // clock / other data
-        Ntl_Net_t *    pClock;         // clock (for registers)
-        void *         pTemp;          // other data 
-        int            iTemp;          // other data
-    };
-    Ntl_Net_t *        pFanio[0];      // fanins/fanouts
-};
-
-struct Ntl_Net_t_
-{
-    Ntl_Net_t *        pNext;          // next net in the hash table
-    void *             pCopy;          // the copy of this object
-    union {
-        void *         pCopy2;         // the copy of this object
-        float          dTemp;          // other data
-        int            iTemp;          // other data
-    };
-    Ntl_Obj_t *        pDriver;        // driver of the net
-    unsigned           NetId     : 27; // unique ID of the net
-    unsigned           nVisits   :  2; // the number of times the net is visted
-    unsigned           fMark     :  1; // temporary mark
-    unsigned           fMark2    :  1; // temporary mark
-    unsigned           fFixed    :  1; // the fixed net
-    char               pName[0];       // the name of this net
-};
-
-struct Ntl_Lut_t_
-{
-    int                Id;             // the ID of the root AIG node
-    int                nFanins;        // the number of fanins
-    int *              pFanins;        // the array of fanins
-    unsigned *         pTruth;         // the truth table
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-
-////////////////////////////////////////////////////////////////////////
-///                      INLINED FUNCTIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-static inline Ntl_Mod_t * Ntl_ManRootModel( Ntl_Man_t * p )       { return (Ntl_Mod_t *)Vec_PtrEntry( p->vModels, 0 );   } 
-
-static inline int         Ntl_ModelPiNum( Ntl_Mod_t * p )         { return p->nObjs[NTL_OBJ_PI];                } 
-static inline int         Ntl_ModelPoNum( Ntl_Mod_t * p )         { return p->nObjs[NTL_OBJ_PO];                } 
-static inline int         Ntl_ModelNodeNum( Ntl_Mod_t * p )       { return p->nObjs[NTL_OBJ_NODE];              } 
-static inline int         Ntl_ModelLut1Num( Ntl_Mod_t * p )       { return p->nObjs[NTL_OBJ_LUT1];              } 
-static inline int         Ntl_ModelLatchNum( Ntl_Mod_t * p )      { return p->nObjs[NTL_OBJ_LATCH];             } 
-static inline int         Ntl_ModelBoxNum( Ntl_Mod_t * p )        { return p->nObjs[NTL_OBJ_BOX];               } 
-
-static inline Ntl_Obj_t * Ntl_ModelPi( Ntl_Mod_t * p, int i )     { return (Ntl_Obj_t *)Vec_PtrEntry(p->vPis, i);        } 
-static inline Ntl_Obj_t * Ntl_ModelPo( Ntl_Mod_t * p, int i )     { return (Ntl_Obj_t *)Vec_PtrEntry(p->vPos, i);        } 
-static inline Ntl_Obj_t * Ntl_ModelObj( Ntl_Mod_t * p, int i )    { return (Ntl_Obj_t *)Vec_PtrEntry(p->vObjs, i);       } 
-static inline Ntl_Net_t * Ntl_ModelNet( Ntl_Mod_t * p, int i )    { return (Ntl_Net_t *)Vec_PtrEntry(p->vNets, i);       } 
-
-static inline char *      Ntl_ModelPiName( Ntl_Mod_t * p, int i ) { return Ntl_ModelPi(p, i)->pFanio[0]->pName; } 
-static inline char *      Ntl_ModelPoName( Ntl_Mod_t * p, int i ) { return Ntl_ModelPo(p, i)->pFanio[0]->pName; } 
-
-static inline int         Ntl_ObjFaninNum( Ntl_Obj_t * p )        { return p->nFanins;                          } 
-static inline int         Ntl_ObjFanoutNum( Ntl_Obj_t * p )       { return p->nFanouts;                         } 
-
-static inline int         Ntl_ObjIsPi( Ntl_Obj_t * p )            { return p->Type == NTL_OBJ_PI;               } 
-static inline int         Ntl_ObjIsPo( Ntl_Obj_t * p )            { return p->Type == NTL_OBJ_PO;               } 
-static inline int         Ntl_ObjIsNode( Ntl_Obj_t * p )          { return p->Type == NTL_OBJ_NODE;             } 
-static inline int         Ntl_ObjIsLatch( Ntl_Obj_t * p )         { return p->Type == NTL_OBJ_LATCH;            } 
-static inline int         Ntl_ObjIsBox( Ntl_Obj_t * p )           { return p->Type == NTL_OBJ_BOX;              } 
-static inline int         Ntl_ObjIsLutBox( Ntl_Obj_t * p )        { return Ntl_ObjIsBox(p) && strncmp("LUT", p->pImplem->pName, 3) == 0;  } 
-
-static inline Ntl_Net_t * Ntl_ObjFanin0( Ntl_Obj_t * p )          { return p->pFanio[0];                        } 
-static inline Ntl_Net_t * Ntl_ObjFanout0( Ntl_Obj_t * p )         { return p->pFanio[p->nFanins];               } 
-
-static inline Ntl_Net_t * Ntl_ObjFanin( Ntl_Obj_t * p, int i )    { return p->pFanio[i];                        } 
-static inline Ntl_Net_t * Ntl_ObjFanout( Ntl_Obj_t * p, int i )   { return p->pFanio[p->nFanins+i];             } 
-
-static inline void        Ntl_ObjSetFanin( Ntl_Obj_t * p, Ntl_Net_t * pNet, int i )    { p->pFanio[i] = pNet;   } 
-static inline void        Ntl_ObjSetFanout( Ntl_Obj_t * p, Ntl_Net_t * pNet, int i )   { p->pFanio[p->nFanins+i] = pNet; pNet->pDriver = p; } 
-
-static inline int         Ntl_ObjIsInit1( Ntl_Obj_t * p )         { assert( Ntl_ObjIsLatch(p) ); return p->LatchId.regInit == 1;   } 
-static inline void        Ntl_ObjSetInit0( Ntl_Obj_t * p )        { assert( Ntl_ObjIsLatch(p) ); p->LatchId.regInit = 0;           } 
-
-static inline int         Ntl_BoxIsWhite( Ntl_Obj_t * p )         { assert( Ntl_ObjIsBox(p) ); return p->pImplem->attrWhite;    } 
-static inline int         Ntl_BoxIsBlack( Ntl_Obj_t * p )         { assert( Ntl_ObjIsBox(p) ); return !p->pImplem->attrWhite;   } 
-static inline int         Ntl_BoxIsComb( Ntl_Obj_t * p )          { assert( Ntl_ObjIsBox(p) ); return p->pImplem->attrComb;     } 
-static inline int         Ntl_BoxIsSeq( Ntl_Obj_t * p )           { assert( Ntl_ObjIsBox(p) ); return !p->pImplem->attrComb;    } 
-static inline int         Ntl_BoxIsNoMerge( Ntl_Obj_t * p )       { assert( Ntl_ObjIsBox(p) ); return !p->pImplem->attrNoMerge; } 
-
-static inline int         Ntl_ObjIsMapLeaf( Ntl_Obj_t * p )       { return Ntl_ObjIsPi(p) || (Ntl_ObjIsBox(p) && Ntl_BoxIsSeq(p));   } 
-static inline int         Ntl_ObjIsMapRoot( Ntl_Obj_t * p )       { return Ntl_ObjIsPo(p) || (Ntl_ObjIsBox(p) && Ntl_BoxIsSeq(p));   } 
-
-static inline int         Ntl_ObjIsCombLeaf( Ntl_Obj_t * p )      { return Ntl_ObjIsPi(p) || (Ntl_ObjIsBox(p) && (Ntl_BoxIsSeq(p) || Ntl_BoxIsBlack(p)));   } 
-static inline int         Ntl_ObjIsCombRoot( Ntl_Obj_t * p )      { return Ntl_ObjIsPo(p) || (Ntl_ObjIsBox(p) && (Ntl_BoxIsSeq(p) || Ntl_BoxIsBlack(p)));   } 
-
-static inline int         Ntl_ObjIsSeqLeaf( Ntl_Obj_t * p )       { return Ntl_ObjIsPi(p) || (Ntl_ObjIsBox(p) && Ntl_BoxIsBlack(p));   } 
-static inline int         Ntl_ObjIsSeqRoot( Ntl_Obj_t * p )       { return Ntl_ObjIsPo(p) || (Ntl_ObjIsBox(p) && Ntl_BoxIsBlack(p));   } 
-
-////////////////////////////////////////////////////////////////////////
-///                         ITERATORS                                ///
-////////////////////////////////////////////////////////////////////////
-
-#define Ntl_ManForEachModel( p, pMod, i )                                       \
-    for ( i = 0; (i < Vec_PtrSize(p->vModels)) && (((pMod) = (Ntl_Mod_t*)Vec_PtrEntry(p->vModels, i)), 1); i++ )
-#define Ntl_ManForEachCiNet( p, pNet, i )                                       \
-    Vec_PtrForEachEntry( Ntl_Net_t *, p->vCis, pNet, i )
-#define Ntl_ManForEachCoNet( p, pNet, i )                                       \
-    Vec_PtrForEachEntry( Ntl_Net_t *, p->vCos, pNet, i )
-
-#define Ntl_ModelForEachPi( pNwk, pObj, i )                                     \
-    for ( i = 0; (i < Vec_PtrSize(pNwk->vPis)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vPis, i)), 1); i++ )
-#define Ntl_ModelForEachPo( pNwk, pObj, i )                                     \
-    for ( i = 0; (i < Vec_PtrSize(pNwk->vPos)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vPos, i)), 1); i++ )
-#define Ntl_ModelForEachNet( pNwk, pNet, i )                                    \
-    Vec_PtrForEachEntry( Ntl_Net_t *, pNwk->vNets, pNet, i )                                 \
-        if ( pNet == NULL ) {} else
-#define Ntl_ModelForEachObj( pNwk, pObj, i )                                    \
-    for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
-        if ( pObj == NULL ) {} else
-#define Ntl_ModelForEachLatch( pNwk, pObj, i )                                  \
-    for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
-        if ( (pObj) == NULL || !Ntl_ObjIsLatch((Ntl_Obj_t*)pObj) ) {} else
-#define Ntl_ModelForEachNode( pNwk, pObj, i )                                   \
-    for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
-        if ( (pObj) == NULL || !Ntl_ObjIsNode(pObj) ) {} else
-#define Ntl_ModelForEachBox( pNwk, pObj, i )                                    \
-    for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
-        if ( (pObj) == NULL || !Ntl_ObjIsBox(pObj) ) {} else
-
-#define Ntl_ObjForEachFanin( pObj, pFanin, i )                                  \
-    for ( i = 0; (i < (pObj)->nFanins) && (((pFanin) = (pObj)->pFanio[i]), 1); i++ )
-#define Ntl_ObjForEachFanout( pObj, pFanout, i )                                \
-    for ( i = 0; (i < (pObj)->nFanouts) && (((pFanout) = (pObj)->pFanio[(pObj)->nFanins+i]), 1); i++ )
-
-#define Ntl_ModelForEachMapLeaf( pNwk, pObj, i )                                \
-    for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
-        if ( (pObj) == NULL || !Ntl_ObjIsMapLeaf(pObj) ) {} else
-#define Ntl_ModelForEachMapRoot( pNwk, pObj, i )                                \
-    for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
-        if ( (pObj) == NULL || !Ntl_ObjIsMapRoot(pObj) ) {} else
-#define Ntl_ModelForEachCombLeaf( pNwk, pObj, i )                                \
-    for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
-        if ( (pObj) == NULL || !Ntl_ObjIsCombLeaf(pObj) ) {} else
-#define Ntl_ModelForEachCombRoot( pNwk, pObj, i )                                \
-    for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
-        if ( (pObj) == NULL || !Ntl_ObjIsCombRoot(pObj) ) {} else
-#define Ntl_ModelForEachSeqLeaf( pNwk, pObj, i )                                \
-    for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
-        if ( (pObj) == NULL || !Ntl_ObjIsSeqLeaf(pObj) ) {} else
-#define Ntl_ModelForEachSeqRoot( pNwk, pObj, i )                                \
-    for ( i = 0; (i < Vec_PtrSize(pNwk->vObjs)) && (((pObj) = (Ntl_Obj_t*)Vec_PtrEntry(pNwk->vObjs, i)), 1); i++ ) \
-        if ( (pObj) == NULL || !Ntl_ObjIsSeqRoot(pObj) ) {} else
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== ntlCore.c ==========================================================*/
-extern ABC_DLL int             Ntl_ManInsertTest( Ntl_Man_t * p, Aig_Man_t * pAig );
-extern ABC_DLL int             Ntl_ManInsertTestIf( Ntl_Man_t * p, Aig_Man_t * pAig );
-/*=== ntlEc.c ==========================================================*/
-extern ABC_DLL void            Ntl_ManPrepareCecMans( Ntl_Man_t * pMan1, Ntl_Man_t * pMan2, Aig_Man_t ** ppAig1, Aig_Man_t ** ppAig2 );
-extern ABC_DLL void            Ntl_ManPrepareCec( char * pFileName1, char * pFileName2, Aig_Man_t ** ppAig1, Aig_Man_t ** ppAig2 );
-extern ABC_DLL Aig_Man_t *     Ntl_ManPrepareSec( char * pFileName1, char * pFileName2 );
-/*=== ntlExtract.c ==========================================================*/
-extern ABC_DLL Aig_Man_t *     Ntl_ManExtract( Ntl_Man_t * p );
-extern ABC_DLL Aig_Man_t *     Ntl_ManCollapse( Ntl_Man_t * p, int fSeq );
-extern ABC_DLL Aig_Man_t *     Ntl_ManCollapseComb( Ntl_Man_t * p );
-extern ABC_DLL Aig_Man_t *     Ntl_ManCollapseSeq( Ntl_Man_t * p, int nMinDomSize, int fVerbose );
-extern ABC_DLL Nwk_Man_t *     Ntl_ManExtractNwk( Ntl_Man_t * p, Aig_Man_t * pAig, Tim_Man_t * pManTime );
-/*=== ntlInsert.c ==========================================================*/
-extern ABC_DLL Ntl_Man_t *     Ntl_ManInsertMapping( Ntl_Man_t * p, Vec_Ptr_t * vMapping, Aig_Man_t * pAig );
-extern ABC_DLL Ntl_Man_t *     Ntl_ManInsertAig( Ntl_Man_t * p, Aig_Man_t * pAig );
-extern ABC_DLL Ntl_Man_t *     Ntl_ManInsertNtk( Ntl_Man_t * p, Nwk_Man_t * pNtk );
-/*=== ntlCheck.c ==========================================================*/
-extern ABC_DLL int             Ntl_ManCheck( Ntl_Man_t * pMan );
-extern ABC_DLL int             Ntl_ModelCheck( Ntl_Mod_t * pModel, int fMain );
-extern ABC_DLL void            Ntl_ModelFixNonDrivenNets( Ntl_Mod_t * pModel );
-extern ABC_DLL void            Ntl_ModelTransformLatches( Ntl_Mod_t * pModel );
-/*=== ntlMan.c ============================================================*/
-extern ABC_DLL Ntl_Man_t *     Ntl_ManAlloc();
-extern ABC_DLL void            Ntl_ManCleanup( Ntl_Man_t * p );
-extern ABC_DLL Ntl_Man_t *     Ntl_ManStartFrom( Ntl_Man_t * p );
-extern ABC_DLL Ntl_Man_t *     Ntl_ManDup( Ntl_Man_t * p );
-extern ABC_DLL Ntl_Man_t *     Ntl_ManDupCollapseLuts( Ntl_Man_t * p );
-extern ABC_DLL void            Ntl_ManFree( Ntl_Man_t * p );
-extern ABC_DLL void            Ntl_ManPrintStats( Ntl_Man_t * p );
-extern ABC_DLL Tim_Man_t *     Ntl_ManReadTimeMan( Ntl_Man_t * p );
-extern ABC_DLL void            Ntl_ManPrintTypes( Ntl_Man_t * p );
-extern ABC_DLL int             Ntl_ManCompareClockClasses( Vec_Ptr_t ** pp1, Vec_Ptr_t ** pp2 );
-extern ABC_DLL void            Ntl_ManPrintClocks( Ntl_Man_t * p );
-extern ABC_DLL void            Ntl_ManPrintResets( Ntl_Man_t * p );
-extern ABC_DLL Ntl_Mod_t *     Ntl_ModelAlloc( Ntl_Man_t * pMan, char * pName );
-extern ABC_DLL Ntl_Mod_t *     Ntl_ModelStartFrom( Ntl_Man_t * pManNew, Ntl_Mod_t * pModelOld );
-extern ABC_DLL Ntl_Mod_t *     Ntl_ModelDup( Ntl_Man_t * pManNew, Ntl_Mod_t * pModelOld );
-extern ABC_DLL Ntl_Mod_t *     Ntl_ModelDupCollapseLuts( Ntl_Man_t * pManNew, Ntl_Mod_t * pModelOld );
-extern ABC_DLL void            Ntl_ModelFree( Ntl_Mod_t * p );
-extern ABC_DLL Ntl_Mod_t *     Ntl_ManCreateLatchModel( Ntl_Man_t * pMan, int Init );
-extern ABC_DLL int             Ntl_ModelCountLut0( Ntl_Mod_t * p );
-extern ABC_DLL int             Ntl_ModelCountLut1( Ntl_Mod_t * p );
-extern ABC_DLL int             Ntl_ModelCountBuf( Ntl_Mod_t * p );
-extern ABC_DLL int             Ntl_ModelCountInv( Ntl_Mod_t * p );
-/*=== ntlMap.c ============================================================*/
-extern ABC_DLL Vec_Ptr_t *     Ntl_MappingAlloc( int nLuts, int nVars );
-extern ABC_DLL Vec_Ptr_t *     Ntl_MappingFromAig( Aig_Man_t * p );
-extern ABC_DLL Vec_Ptr_t *     Ntl_MappingFpga( Aig_Man_t * p );
-extern ABC_DLL Vec_Ptr_t *     Ntl_MappingIf( Ntl_Man_t * pMan, Aig_Man_t * p );
-/*=== ntlObj.c ============================================================*/
-extern ABC_DLL Ntl_Obj_t *     Ntl_ModelCreatePi( Ntl_Mod_t * pModel );
-extern ABC_DLL Ntl_Obj_t *     Ntl_ModelCreatePo( Ntl_Mod_t * pModel, Ntl_Net_t * pNet );
-extern ABC_DLL Ntl_Obj_t *     Ntl_ModelCreateLatch( Ntl_Mod_t * pModel );
-extern ABC_DLL Ntl_Obj_t *     Ntl_ModelCreateNode( Ntl_Mod_t * pModel, int nFanins );
-extern ABC_DLL Ntl_Obj_t *     Ntl_ModelCreateBox( Ntl_Mod_t * pModel, int nFanins, int nFanouts );
-extern ABC_DLL Ntl_Obj_t *     Ntl_ModelDupObj( Ntl_Mod_t * pModel, Ntl_Obj_t * pOld );
-extern ABC_DLL Ntl_Obj_t *     Ntl_ModelCreatePiWithName( Ntl_Mod_t * pModel, char * pName );
-extern ABC_DLL char *          Ntl_ManStoreName( Ntl_Man_t * p, char * pName );
-extern ABC_DLL char *          Ntl_ManStoreSop( Aig_MmFlex_t * pMan, const char * pSop );
-extern ABC_DLL char *          Ntl_ManStoreFileName( Ntl_Man_t * p, char * pFileName );
-extern ABC_DLL int             Ntl_ManObjWhichFanout( Ntl_Obj_t * pNode, Ntl_Net_t * pFanout );
-/*=== ntlSweep.c ==========================================================*/
-extern ABC_DLL int             Ntl_ManSweep( Ntl_Man_t * p, int fVerbose );
-/*=== ntlTable.c ==========================================================*/
-extern ABC_DLL Ntl_Net_t *     Ntl_ModelFindNet( Ntl_Mod_t * p, const char * pName );
-extern ABC_DLL char *          Ntl_ModelCreateNetName( Ntl_Mod_t * p, const char * pName, int Num );
-extern ABC_DLL Ntl_Net_t *     Ntl_ModelFindOrCreateNet( Ntl_Mod_t * p, const char * pName );
-extern ABC_DLL Ntl_Net_t *     Ntl_ModelDontFindCreateNet( Ntl_Mod_t * p, const char * pName );
-extern ABC_DLL void            Ntl_ModelSetPioNumbers( Ntl_Mod_t * p );
-extern ABC_DLL int             Ntl_ModelFindPioNumber( Ntl_Mod_t * p, int fPiOnly, int fPoOnly, const char * pName, int * pNumber );
-extern ABC_DLL int             Ntl_ModelSetNetDriver( Ntl_Obj_t * pObj, Ntl_Net_t * pNet );
-extern ABC_DLL int             Ntl_ModelClearNetDriver( Ntl_Obj_t * pObj, Ntl_Net_t * pNet );
-extern ABC_DLL void            Ntl_ModelDeleteNet( Ntl_Mod_t * p, Ntl_Net_t * pNet );
-extern ABC_DLL void            Ntl_ModelInsertNet( Ntl_Mod_t * p, Ntl_Net_t * pNet );
-extern ABC_DLL int             Ntl_ModelCountNets( Ntl_Mod_t * p );
-extern ABC_DLL int             Ntl_ManAddModel( Ntl_Man_t * p, Ntl_Mod_t * pModel );
-extern ABC_DLL Ntl_Mod_t *     Ntl_ManFindModel( Ntl_Man_t * p, const char * pName );
-/*=== ntlTime.c ==========================================================*/
-extern ABC_DLL Tim_Man_t *     Ntl_ManCreateTiming( Ntl_Man_t * p );
-/*=== ntlReadBlif.c ==========================================================*/
-extern ABC_DLL Ntl_Man_t *     Ntl_ManReadBlif( char * pFileName, int fCheck );
-/*=== ntlWriteBlif.c ==========================================================*/
-extern ABC_DLL void            Ntl_ManWriteBlif( Ntl_Man_t * p, char * pFileName );
-extern ABC_DLL void            Ntl_WriteBlifLogic( Nwk_Man_t * pNtk, Ntl_Man_t * p, char * pFileName );
-/*=== ntlUtil.c ==========================================================*/
-extern ABC_DLL int             Ntl_FileIsType( char * pFileName, char * pS1, char * pS2, char * pS3 );
-extern ABC_DLL int             Ntl_ModelGetFaninMax( Ntl_Mod_t * pRoot );
-extern ABC_DLL Ntl_Net_t *     Ntl_ModelFindSimpleNet( Ntl_Net_t * pNetCo );
-extern ABC_DLL int             Ntl_ManCountSimpleCoDrivers( Ntl_Man_t * p );
-extern ABC_DLL Vec_Ptr_t *     Ntl_ManCollectCiNames( Ntl_Man_t * p );
-extern ABC_DLL Vec_Ptr_t *     Ntl_ManCollectCoNames( Ntl_Man_t * p );
-extern ABC_DLL void            Ntl_ManMarkCiCoNets( Ntl_Man_t * p );
-extern ABC_DLL void            Ntl_ManUnmarkCiCoNets( Ntl_Man_t * p );
-extern ABC_DLL void            Ntl_ManSetZeroInitValues( Ntl_Man_t * p );
-extern ABC_DLL void            Ntl_ManTransformInitValues( Ntl_Man_t * p );
-extern ABC_DLL Vec_Vec_t *     Ntl_ManTransformRegClasses( Ntl_Man_t * pMan, int nSizeMax, int fVerbose );
-extern ABC_DLL void            Ntl_ManFilterRegisterClasses( Aig_Man_t * pAig, Vec_Int_t * vRegClasses, int fVerbose );
-extern ABC_DLL int             Ntl_ManLatchNum( Ntl_Man_t * p );
-extern ABC_DLL int             Ntl_ManIsComb( Ntl_Man_t * p );
-extern ABC_DLL int             Ntl_ModelCombLeafNum( Ntl_Mod_t * p );
-extern ABC_DLL int             Ntl_ModelCombRootNum( Ntl_Mod_t * p );
-extern ABC_DLL int             Ntl_ModelSeqLeafNum( Ntl_Mod_t * p );
-extern ABC_DLL int             Ntl_ModelSeqRootNum( Ntl_Mod_t * p );
-extern ABC_DLL int             Ntl_ModelCheckNetsAreNotMarked( Ntl_Mod_t * pModel );
-extern ABC_DLL void            Ntl_ModelClearNets( Ntl_Mod_t * pModel );
-extern ABC_DLL void            Ntl_ManRemoveUselessNets( Ntl_Man_t * p );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/ntl/ntlCheck.c b/src/aig/ntl/ntlCheck.c
deleted file mode 100644
index 7aecf878..00000000
--- a/src/aig/ntl/ntlCheck.c
+++ /dev/null
@@ -1,379 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlCheck.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Checks consistency of the netlist.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlCheck.c,v 1.1 2008/10/10 14:09:29 mjarvin Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "aig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelCheckCombPoPaths_rec( Ntl_Mod_t * pModel, Ntl_Net_t * pNet )
-{
-    Ntl_Net_t * pFanin;
-    int i;
-    // skip visited nets
-    if ( pNet->nVisits == 2 ) 
-        return 1;
-    pNet->nVisits = 2;
-    // process PIs
-    if ( Ntl_ObjIsPi(pNet->pDriver) )
-        return 0;
-    // process registers
-    if ( Ntl_ObjIsLatch(pNet->pDriver) )
-        return 1;
-    assert( Ntl_ObjIsNode(pNet->pDriver) );
-    // call recursively
-    Ntl_ObjForEachFanin( pNet->pDriver, pFanin, i )
-        if ( !Ntl_ModelCheckCombPoPaths_rec( pModel, pFanin ) )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks the existence of combinational paths from POs to PIs.]
-
-  Description [Returns 0 if the path is found.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelCheckCombPoPaths( Ntl_Mod_t * pModel )
-{
-    Ntl_Obj_t * pObj;
-    int i;
-    Ntl_ModelClearNets( pModel );
-    Ntl_ModelForEachPo( pModel, pObj, i )
-        if ( !Ntl_ModelCheckCombPoPaths_rec( pModel, Ntl_ObjFanin0(pObj) ) )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks one model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelCheck( Ntl_Mod_t * pModel, int fMain )
-{
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet;
-    int i, k, fStatus = 1;
-
-    // check root level model
-    if ( fMain )
-    {
-        if ( Ntl_ModelLatchNum(pModel) > 0 )
-        {
-            printf( "Root level model %s has %d registers.\n", pModel->pName, Ntl_ModelLatchNum(pModel) );
-            fStatus = 0;
-        }
-        goto checkobjs;
-    }
-
-    // check delay information
-    if ( pModel->attrBox && pModel->attrComb )
-    {
-        if ( pModel->vDelays == NULL )
-        {
-            printf( "Warning: Comb model %s does not have delay info. Default 1.0 delays are assumed.\n", pModel->pName );
-            pModel->vDelays = Vec_IntAlloc( 3 );
-            Vec_IntPush( pModel->vDelays, -1 );
-            Vec_IntPush( pModel->vDelays, -1 );
-            Vec_IntPush( pModel->vDelays, Aig_Float2Int(1.0) );        
-        }
-        if ( pModel->vTimeInputs != NULL )
-        {
-            printf( "Combinational model %s has input arrival/required time information.\n", pModel->pName );
-            fStatus = 0;
-        }
-        if ( pModel->vTimeOutputs != NULL )
-        {
-            printf( "Combinational model %s has output arrival/required time information.\n", pModel->pName );
-            fStatus = 0;
-        }
-    }
-    if ( pModel->attrBox && !pModel->attrComb )
-    {
-        if ( pModel->vDelays != NULL )
-        {
-            printf( "Sequential model %s has delay info.\n", pModel->pName );
-            fStatus = 0;
-        }
-        if ( pModel->vTimeInputs == NULL )
-        {
-            printf( "Warning: Seq model %s does not have input arrival/required time info. Default 0.0 is assumed.\n", pModel->pName );
-            pModel->vTimeInputs = Vec_IntAlloc( 2 );
-            Vec_IntPush( pModel->vTimeInputs, -1 );
-            Vec_IntPush( pModel->vTimeInputs, Aig_Float2Int(0.0) );        
-        }
-        if ( pModel->vTimeOutputs == NULL )
-        {
-//            printf( "Warning: Seq model %s does not have output arrival/required time info. Default 0.0 is assumed.\n", pModel->pName );
-            pModel->vTimeOutputs = Vec_IntAlloc( 2 );
-            Vec_IntPush( pModel->vTimeOutputs, -1 );
-            Vec_IntPush( pModel->vTimeOutputs, Aig_Float2Int(0.0) );        
-        }
-    }
-
-    // check box attributes
-    if ( pModel->attrBox )
-    {
-        if ( !pModel->attrWhite )
-        {
-            if ( Ntl_ModelNodeNum(pModel) + Ntl_ModelLut1Num(pModel) > 0 )
-            {
-                printf( "Model %s is a blackbox, yet it has %d nodes.\n", pModel->pName, Ntl_ModelNodeNum(pModel) + Ntl_ModelLut1Num(pModel) );
-                fStatus = 0;
-            }
-            if ( Ntl_ModelLatchNum(pModel) > 0 )
-            {
-                printf( "Model %s is a blackbox, yet it has %d registers.\n", pModel->pName, Ntl_ModelLatchNum(pModel) );
-                fStatus = 0;
-            }
-            return fStatus;
-        }
-        // this is a white box
-        if ( pModel->attrComb && Ntl_ModelNodeNum(pModel) + Ntl_ModelLut1Num(pModel) == 0 )
-        {
-            printf( "Model %s is a comb white box, yet it has no nodes.\n", pModel->pName );
-            fStatus = 0;
-        }
-        if ( pModel->attrComb && Ntl_ModelLatchNum(pModel) > 0 )
-        {
-            printf( "Model %s is a comb white box, yet it has registers.\n", pModel->pName );
-            fStatus = 0;
-        }
-        if ( !pModel->attrComb && Ntl_ModelLatchNum(pModel) == 0 )
-        {
-            printf( "Model %s is a seq white box, yet it has no registers.\n", pModel->pName );
-            fStatus = 0;
-        }
-        if ( !pModel->attrComb && !Ntl_ModelCheckCombPoPaths(pModel) )
-        {
-            printf( "Model %s is a seq white box with comb paths from PIs to POs.\n", pModel->pName );
-            fStatus = 0;
-        }
-    }
-
-checkobjs:
-    // check nets
-    Ntl_ModelForEachNet( pModel, pNet, i )
-    {
-        if ( pNet->pName == NULL )
-        {
-            printf( "Net in bin %d does not have a name\n", i );
-            fStatus = 0;
-        }
-/*
-        if ( pNet->pDriver == NULL )
-        {
-            printf( "Net %s does not have a driver\n", pNet->pName );
-            fStatus = 0;
-        }
-*/
-    }
-
-    // check objects
-    Ntl_ModelForEachObj( pModel, pObj, i )
-    {
-        Ntl_ObjForEachFanin( pObj, pNet, k )
-            if ( pNet == NULL )
-            {
-                printf( "Object %d does not have fanin net %d\n", i, k );
-                fStatus = 0;
-            }
-        Ntl_ObjForEachFanout( pObj, pNet, k )
-            if ( pNet == NULL )
-            {
-                printf( "Object %d does not have fanout net %d\n", i, k );
-                fStatus = 0;
-            }
-    }
-    return fStatus;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks the netlist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManCheck( Ntl_Man_t * pMan )
-{
-    Ntl_Mod_t * pMod1;
-    int i, fStatus = 1;
-    // check that the models have unique names
-    Ntl_ManForEachModel( pMan, pMod1, i )
-    {
-        if ( pMod1->pName == NULL )
-        {
-            printf( "Model %d does not have a name\n", i );
-            fStatus = 0;
-        }
-    }
-    // check that the models (except the first one) do not have boxes
-    Ntl_ManForEachModel( pMan, pMod1, i )
-    {
-        if ( i == 0 )
-            continue;
-        if ( Ntl_ModelBoxNum(pMod1) > 0 )
-        {
-            printf( "Non-root model %d (%s) has %d boxes.\n", i, pMod1->pName, Ntl_ModelBoxNum(pMod1) );
-            fStatus = 0;
-        }
-    }
-    // check models
-    Ntl_ManForEachModel( pMan, pMod1, i )
-    {
-        if ( !Ntl_ModelCheck( pMod1, i==0 ) )
-            fStatus = 0;
-    }
-    return fStatus;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Fixed problems with non-driven nets in the model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ModelFixNonDrivenNets( Ntl_Mod_t * pModel )
-{ 
-    Vec_Ptr_t * vNets;
-    Ntl_Net_t * pNet;
-    Ntl_Obj_t * pNode;
-    int i;
-
-    if ( !pModel->attrWhite )
-        return;
-
-    // check for non-driven nets
-    vNets = Vec_PtrAlloc( 100 );
-    Ntl_ModelForEachNet( pModel, pNet, i )
-    {
-        if ( pNet->pDriver != NULL )
-            continue;
-        // add the constant 0 driver
-        pNode = Ntl_ModelCreateNode( pModel, 0 );
-        pNode->pSop = Ntl_ManStoreSop( pModel->pMan->pMemSops, " 0\n" );
-        Ntl_ModelSetNetDriver( pNode, pNet );
-        // add the net to those for which the warning will be printed
-        Vec_PtrPush( vNets, pNet );
-    }
-
-#if 0  // sjang
-    // print the warning
-    if ( Vec_PtrSize(vNets) > 0 )
-    {
-        printf( "Warning: Constant-0 drivers added to %d non-driven nets in network \"%s\": ", Vec_PtrSize(vNets), pModel->pName );
-        Vec_PtrForEachEntry( Ntl_Net_t *, vNets, pNet, i )
-        {
-            printf( "%s%s", (i? ", ": ""), pNet->pName );
-            if ( i == 3 )
-            {
-                if ( Vec_PtrSize(vNets) > 3 )
-                    printf( " ..." );
-                break;
-            }
-        }
-        printf( "\n" );
-    }
-#endif
-    Vec_PtrFree( vNets );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Fixed problems with non-driven nets in the model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ModelTransformLatches( Ntl_Mod_t * pModel )
-{ 
-    Ntl_Mod_t * pMod[3] = { NULL };
-    Ntl_Obj_t * pLatch;
-    int i, Init;
-    if ( Ntl_ModelLatchNum(pModel) == 0 )
-        return;
-    Ntl_ModelForEachLatch( pModel, pLatch, i )
-    {
-        Init = pLatch->LatchId.regInit;
-        if ( pMod[Init] == NULL )
-            pMod[Init] = Ntl_ManCreateLatchModel( pModel->pMan, Init );
-        pLatch->pImplem = pMod[Init];
-        pLatch->Type = NTL_OBJ_BOX;
-    }
-    printf( "In the main model \"%s\", %d latches are transformed into white seq boxes.\n", pModel->pName, Ntl_ModelLatchNum(pModel) );
-    pModel->nObjs[NTL_OBJ_BOX] += Ntl_ModelLatchNum(pModel);
-    pModel->nObjs[NTL_OBJ_LATCH] = 0;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlCore.c b/src/aig/ntl/ntlCore.c
deleted file mode 100644
index c09bac0f..00000000
--- a/src/aig/ntl/ntlCore.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlCore.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [DFS traversal.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "dch.h"
-#include "dar.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Extracts AIG from the netlist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManPerformChoicing( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fConstruct, int nConfMax, int nLevelMax, int fVerbose )
-{
-//    extern Aig_Man_t * Dar_ManBalance( Aig_Man_t * pAig, int fUpdateLevel );
-//    extern Aig_Man_t * Dar_ManCompress( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fPower, int fVerbose );
-//    extern Aig_Man_t * Dar_ManChoice( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fConstruct, int nConfMax, int nLevelMax, int fVerbose );
-    Aig_Man_t * pTemp;
-
-    // perform synthesis
-//printf( "Pre-synthesis AIG:  " );
-//Aig_ManPrintStats( pAig );
-//    pTemp = Dar_ManBalance( pAig, 1 );
-//    pTemp = Dar_ManCompress( pAig, 1, 1, 0, 0 );
-    pTemp = Dar_ManChoice( pAig, fBalance, fUpdateLevel, fConstruct, nConfMax, nLevelMax, fVerbose );
-//printf( "Post-synthesis AIG: " );
-//Aig_ManPrintStats( pTemp );
-
-    return pTemp;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Extracts AIG from the netlist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManPerformChoicingNew( Aig_Man_t * pAig, Dch_Pars_t * pPars )
-{
-//    extern Aig_Man_t * Dar_ManChoiceNew( Aig_Man_t * pAig, Dch_Pars_t * pPars );
-    Aig_Man_t * pTemp;
-/*
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManForEachPi( pAig, pObj, i )
-        printf( "%d ", pObj->Level );
-    printf( "\n" );
-*/
-    pTemp = Dar_ManChoiceNew( pAig, pPars );
-/*
-    Aig_ManForEachPi( pTemp, pObj, i )
-        printf( "%d ", pObj->Level );
-    printf( "\n" );
-*/
-    return pTemp;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Testing procedure for insertion of mapping into the netlist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManInsertTest( Ntl_Man_t * p, Aig_Man_t * pAig )
-{
-    Ntl_Man_t * pNew;
-    Vec_Ptr_t * vMapping;
-    int RetValue;
-    vMapping = Ntl_MappingFromAig( pAig );
-    pNew = Ntl_ManInsertMapping( p, vMapping, pAig );
-    RetValue = (pNew != NULL);
-    Ntl_ManFree( pNew );
-    Vec_PtrFree( vMapping );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Testing procedure for insertion of mapping into the netlist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManInsertTestIf( Ntl_Man_t * p, Aig_Man_t * pAig )
-{
-    Ntl_Man_t * pNew;
-    Vec_Ptr_t * vMapping;
-    int RetValue;
-    vMapping = Ntl_MappingIf( p, pAig );
-    pNew = Ntl_ManInsertMapping( p, vMapping, pAig );
-    RetValue = (pNew != NULL);
-    Ntl_ManFree( pNew );
-    Vec_PtrFree( vMapping );
-    return RetValue;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlEc.c b/src/aig/ntl/ntlEc.c
deleted file mode 100644
index 331cd906..00000000
--- a/src/aig/ntl/ntlEc.c
+++ /dev/null
@@ -1,370 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlEc.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Equivalence checking procedures.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlEc.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "saig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Adds PIs to both models, so that they have the same PIs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManCreateMissingInputs( Ntl_Mod_t * p1, Ntl_Mod_t * p2, int fSeq )
-{
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet, * pNext;
-    int i, k;
-    if ( fSeq )
-    {
-        Ntl_ModelForEachSeqLeaf( p1, pObj, i )
-        {
-            Ntl_ObjForEachFanout( pObj, pNext, k )
-            {
-                pNet = Ntl_ModelFindNet( p2, pNext->pName );
-                if ( pNet == NULL )
-                    Ntl_ModelCreatePiWithName( p2, pNext->pName );
-            }
-        }
-        Ntl_ModelForEachSeqLeaf( p2, pObj, i )
-        {
-            Ntl_ObjForEachFanout( pObj, pNext, k )
-            {
-                pNet = Ntl_ModelFindNet( p1, pNext->pName );
-                if ( pNet == NULL )
-                    Ntl_ModelCreatePiWithName( p1, pNext->pName );
-            }
-        }
-    }
-    else
-    {
-        Ntl_ModelForEachCombLeaf( p1, pObj, i )
-        {
-            Ntl_ObjForEachFanout( pObj, pNext, k )
-            {
-                pNet = Ntl_ModelFindNet( p2, pNext->pName );
-                if ( pNet == NULL )
-                    Ntl_ModelCreatePiWithName( p2, pNext->pName );
-            }
-        }
-        Ntl_ModelForEachCombLeaf( p2, pObj, i )
-        {
-            Ntl_ObjForEachFanout( pObj, pNext, k )
-            {
-                pNet = Ntl_ModelFindNet( p1, pNext->pName );
-                if ( pNet == NULL )
-                    Ntl_ModelCreatePiWithName( p1, pNext->pName );
-            }
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates arrays of combinational inputs in the same order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManDeriveCommonCis( Ntl_Man_t * pMan1, Ntl_Man_t * pMan2, int fSeq )
-{
-    Ntl_Mod_t * p1 = Ntl_ManRootModel(pMan1);
-    Ntl_Mod_t * p2 = Ntl_ManRootModel(pMan2);
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet, * pNext;
-    int i, k;
-    // order the CIs 
-    Vec_PtrClear( pMan1->vCis );
-    Vec_PtrClear( pMan2->vCis );
-    if ( fSeq ) 
-    {
-        assert( Ntl_ModelSeqLeafNum(p1) == Ntl_ModelSeqLeafNum(p2) );
-        Ntl_ModelForEachSeqLeaf( p1, pObj, i )
-        {
-            Ntl_ObjForEachFanout( pObj, pNext, k )
-            {
-                pNet = Ntl_ModelFindNet( p2, pNext->pName );
-                if ( pNet == NULL )
-                {
-                    printf( "Ntl_ManDeriveCommonCis(): Internal error!\n" );
-                    return;
-                }
-                Vec_PtrPush( pMan1->vCis, pNext );    
-                Vec_PtrPush( pMan2->vCis, pNet );  
-            }
-        }
-    }
-    else
-    {
-        assert( Ntl_ModelCombLeafNum(p1) == Ntl_ModelCombLeafNum(p2) );
-        Ntl_ModelForEachCombLeaf( p1, pObj, i )
-        {
-            Ntl_ObjForEachFanout( pObj, pNext, k )
-            {
-                pNet = Ntl_ModelFindNet( p2, pNext->pName );
-                if ( pNet == NULL )
-                {
-                    printf( "Ntl_ManDeriveCommonCis(): Internal error!\n" );
-                    return;
-                }
-                Vec_PtrPush( pMan1->vCis, pNext );    
-                Vec_PtrPush( pMan2->vCis, pNet );  
-            }
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates arrays of combinational outputs in the same order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManDeriveCommonCos( Ntl_Man_t * pMan1, Ntl_Man_t * pMan2, int fSeq )
-{
-    Ntl_Mod_t * p1 = Ntl_ManRootModel(pMan1);
-    Ntl_Mod_t * p2 = Ntl_ManRootModel(pMan2);
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet, * pNext;
-    int i, k;
-    // order the COs 
-    Vec_PtrClear( pMan1->vCos );
-    Vec_PtrClear( pMan2->vCos );
-    if ( fSeq ) 
-    {
-        Ntl_ModelForEachSeqRoot( p1, pObj, i )
-        {
-            Ntl_ObjForEachFanin( pObj, pNext, k )
-            {
-                pNet = Ntl_ModelFindNet( p2, pNext->pName );
-                if ( pNet == NULL )
-                {
-                    printf( "Ntl_ManDeriveCommonCos(): Cannot find output %s in the second design. Skipping it!\n", 
-                        pNext->pName );
-                    continue;
-                }
-                Vec_PtrPush( pMan1->vCos, pNext );    
-                Vec_PtrPush( pMan2->vCos, pNet );  
-            }
-        }
-    }
-    else
-    {
-        Ntl_ModelForEachCombRoot( p1, pObj, i )
-        {
-            Ntl_ObjForEachFanin( pObj, pNext, k )
-            {
-                pNet = Ntl_ModelFindNet( p2, pNext->pName );
-                if ( pNet == NULL )
-                {
-                    printf( "Ntl_ManDeriveCommonCos(): Cannot find output %s in the second design. Skipping it!\n", 
-                        pNext->pName );
-                    continue;
-                }
-                Vec_PtrPush( pMan1->vCos, pNext );    
-                Vec_PtrPush( pMan2->vCos, pNet );  
-            }
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares AIGs for combinational equivalence checking.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManPrepareCecMans( Ntl_Man_t * pMan1, Ntl_Man_t * pMan2, Aig_Man_t ** ppAig1, Aig_Man_t ** ppAig2 )
-{
-    Ntl_Mod_t * pModel1, * pModel2;
-    *ppAig1 = NULL;
-    *ppAig2 = NULL;
-    // make sure they are compatible
-    pModel1 = Ntl_ManRootModel( pMan1 );
-    pModel2 = Ntl_ManRootModel( pMan2 );
-    if ( Ntl_ModelCombLeafNum(pModel1) != Ntl_ModelCombLeafNum(pModel2) )
-    {
-        printf( "Warning: The number of inputs in the designs is different (%d and %d).\n", 
-            Ntl_ModelCombLeafNum(pModel1), Ntl_ModelCombLeafNum(pModel2) );
-    }
-    if ( Ntl_ModelCombRootNum(pModel1) != Ntl_ModelCombRootNum(pModel2) )
-    {
-        printf( "Warning: The number of outputs in the designs is different (%d and %d).\n", 
-            Ntl_ModelCombRootNum(pModel1), Ntl_ModelCombRootNum(pModel2) );
-    }
-    // normalize inputs/outputs
-    Ntl_ManCreateMissingInputs( pModel1, pModel2, 0 );
-    if ( Ntl_ModelCombLeafNum(pModel1) != Ntl_ModelCombLeafNum(pModel2) )
-    {
-        printf( "Ntl_ManPrepareCec(): Cannot verify designs with too many different CIs.\n" );
-        return;
-    }
-    Ntl_ManDeriveCommonCis( pMan1, pMan2, 0 );
-    Ntl_ManDeriveCommonCos( pMan1, pMan2, 0 );
-    if ( Vec_PtrSize(pMan1->vCos) == 0 )
-    {
-        printf( "Ntl_ManPrepareCec(): There is no identically-named primary outputs to compare.\n" );
-        return;
-    }
-    // derive AIGs
-    *ppAig1 = Ntl_ManCollapse( pMan1, 0 );
-    *ppAig2 = Ntl_ManCollapse( pMan2, 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares AIGs for combinational equivalence checking.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManPrepareCec( char * pFileName1, char * pFileName2, Aig_Man_t ** ppAig1, Aig_Man_t ** ppAig2 )
-{
-    Ntl_Man_t * pMan1, * pMan2;
-    // read the netlists
-    pMan1 = Ntl_ManReadBlif( pFileName1, 1 );
-    pMan2 = Ntl_ManReadBlif( pFileName2, 1 );
-    if ( !pMan1 || !pMan2 )
-    {
-        if ( pMan1 )  Ntl_ManFree( pMan1 );
-        if ( pMan2 )  Ntl_ManFree( pMan2 );
-        printf( "Ntl_ManPrepareCec(): Reading designs from file has failed.\n" );
-        return;
-    }
-    Ntl_ManPrepareCecMans( pMan1, pMan2, ppAig1, ppAig2 );
-    // cleanup 
-    Ntl_ManFree( pMan1 );
-    Ntl_ManFree( pMan2 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares AIGs for sequential equivalence checking.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManPrepareSec( char * pFileName1, char * pFileName2 )
-{
-//    extern Aig_Man_t * Saig_ManCreateMiter( Aig_Man_t * p1, Aig_Man_t * p2, int Oper );
-
-    Aig_Man_t * pAig1, * pAig2, * pAig;
-    Ntl_Man_t * pMan1, * pMan2;
-    Ntl_Mod_t * pModel1, * pModel2;
-    // read the netlists
-    pMan1 = Ntl_ManReadBlif( pFileName1, 1 );
-    pMan2 = Ntl_ManReadBlif( pFileName2, 1 );
-    if ( !pMan1 || !pMan2 )
-    {
-        if ( pMan1 )  Ntl_ManFree( pMan1 );
-        if ( pMan2 )  Ntl_ManFree( pMan2 );
-        printf( "Ntl_ManPrepareSec(): Reading designs from file has failed.\n" );
-        return NULL;
-    }
-    // make sure they are compatible
-    if ( Ntl_ManLatchNum(pMan1) == 0 || Ntl_ManLatchNum(pMan2) == 0 )
-    {
-        if ( pMan1 )  Ntl_ManFree( pMan1 );
-        if ( pMan2 )  Ntl_ManFree( pMan2 );
-        printf( "Ntl_ManPrepareSec(): The designs have no latches. Use combinational command \"*cec\".\n" );
-        return NULL;
-    }
-    pModel1 = Ntl_ManRootModel( pMan1 );
-    pModel2 = Ntl_ManRootModel( pMan2 );
-    if ( Ntl_ModelSeqLeafNum(pModel1) != Ntl_ModelSeqLeafNum(pModel2) )
-    {
-        printf( "Warning: The number of inputs in the designs is different (%d and %d).\n", 
-            Ntl_ModelPiNum(pModel1), Ntl_ModelPiNum(pModel2) );
-    }
-    if ( Ntl_ModelSeqRootNum(pModel1) != Ntl_ModelSeqRootNum(pModel2) )
-    {
-        printf( "Warning: The number of outputs in the designs is different (%d and %d).\n", 
-            Ntl_ModelPoNum(pModel1), Ntl_ModelPoNum(pModel2) );
-    }
-    // normalize inputs/outputs
-    Ntl_ManCreateMissingInputs( pModel1, pModel2, 1 );
-    Ntl_ManDeriveCommonCis( pMan1, pMan2, 1 );
-    Ntl_ManDeriveCommonCos( pMan1, pMan2, 1 );
-    if ( Vec_PtrSize(pMan1->vCos) == 0 )
-    {
-        printf( "Ntl_ManPrepareSec(): There is no identically-named primary outputs to compare.\n" );
-        if ( pMan1 )  Ntl_ManFree( pMan1 );
-        if ( pMan2 )  Ntl_ManFree( pMan2 );
-        return NULL;
-    }
-    // derive AIGs
-    pAig1 = Ntl_ManCollapse( pMan1, 1 );
-    pAig2 = Ntl_ManCollapse( pMan2, 1 );
-    pAig = Saig_ManCreateMiter( pAig1, pAig2, 0 );
-    Aig_ManCleanup( pAig );
-    Aig_ManStop( pAig1 );
-    Aig_ManStop( pAig2 );
-    // cleanup
-    Ntl_ManFree( pMan1 );
-    Ntl_ManFree( pMan2 );
-    return pAig;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlExtract.c b/src/aig/ntl/ntlExtract.c
deleted file mode 100644
index a6268b2c..00000000
--- a/src/aig/ntl/ntlExtract.c
+++ /dev/null
@@ -1,877 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlExtract.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Netlist SOP to AIG conversion.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlExtract.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "dec.h"
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Strashes one logic node using its SOP.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Ntl_ConvertSopToAigInternal( Aig_Man_t * pMan, Ntl_Obj_t * pNode, char * pSop )
-{
-    Ntl_Net_t * pNet;
-    Aig_Obj_t * pAnd, * pSum;
-    int i, Value, nFanins;
-    char * pCube;
-    // get the number of variables
-    nFanins = Kit_PlaGetVarNum(pSop);
-    // go through the cubes of the node's SOP
-    pSum = Aig_ManConst0(pMan);
-    Kit_PlaForEachCube( pSop, nFanins, pCube )
-    {
-        // create the AND of literals
-        pAnd = Aig_ManConst1(pMan);
-        Kit_PlaCubeForEachVar( pCube, Value, i )
-        {
-            pNet = Ntl_ObjFanin( pNode, i );
-            if ( Value == '1' )
-                pAnd = Aig_And( pMan, pAnd, (Aig_Obj_t *)pNet->pCopy );
-            else if ( Value == '0' )
-                pAnd = Aig_And( pMan, pAnd, Aig_Not((Aig_Obj_t *)pNet->pCopy) );
-        }
-        // add to the sum of cubes
-        pSum = Aig_Or( pMan, pSum, pAnd );
-    }
-    // decide whether to complement the result
-    if ( Kit_PlaIsComplement(pSop) )
-        pSum = Aig_Not(pSum);
-    return pSum;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transforms the decomposition graph into the AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Ntl_GraphToNetworkAig( Aig_Man_t * pMan, Dec_Graph_t * pGraph )
-{
-    Dec_Node_t * pNode = NULL; // Suppress "might be used uninitialized"
-    Aig_Obj_t * pAnd0, * pAnd1;
-    int i;
-    // check for constant function
-    if ( Dec_GraphIsConst(pGraph) )
-        return Aig_NotCond( Aig_ManConst1(pMan), Dec_GraphIsComplement(pGraph) );
-    // check for a literal
-    if ( Dec_GraphIsVar(pGraph) )
-        return Aig_NotCond( (Aig_Obj_t *)Dec_GraphVar(pGraph)->pFunc, Dec_GraphIsComplement(pGraph) );
-    // build the AIG nodes corresponding to the AND gates of the graph
-    Dec_GraphForEachNode( pGraph, pNode, i )
-    {
-        pAnd0 = Aig_NotCond( (Aig_Obj_t *)Dec_GraphNode(pGraph, pNode->eEdge0.Node)->pFunc, pNode->eEdge0.fCompl ); 
-        pAnd1 = Aig_NotCond( (Aig_Obj_t *)Dec_GraphNode(pGraph, pNode->eEdge1.Node)->pFunc, pNode->eEdge1.fCompl ); 
-        pNode->pFunc = Aig_And( pMan, pAnd0, pAnd1 );
-    }
-    // complement the result if necessary
-    return Aig_NotCond( (Aig_Obj_t *)pNode->pFunc, Dec_GraphIsComplement(pGraph) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Converts the network from AIG to BDD representation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Ntl_ManBuildNodeAig( Ntl_Man_t * p, Ntl_Obj_t * pNode )
-{
-    int fUseFactor = 1;
-    // consider the constant node
-    if ( Kit_PlaGetVarNum(pNode->pSop) == 0 )
-        return Aig_NotCond( Aig_ManConst1(p->pAig), Kit_PlaIsConst0(pNode->pSop) );
-    // decide when to use factoring
-    if ( fUseFactor && Kit_PlaGetVarNum(pNode->pSop) > 2 && Kit_PlaGetCubeNum(pNode->pSop) > 1 )
-    {
-        Dec_Graph_t * pFForm;
-        Dec_Node_t * pFFNode;
-        Aig_Obj_t * pFunc;
-        int i;
-        // perform factoring
-        pFForm = Dec_Factor( pNode->pSop );
-        // collect the fanins
-        Dec_GraphForEachLeaf( pFForm, pFFNode, i )
-            pFFNode->pFunc = Ntl_ObjFanin(pNode, i)->pCopy;
-        // perform strashing
-        pFunc = Ntl_GraphToNetworkAig( p->pAig, pFForm );
-        Dec_GraphFree( pFForm );
-        return pFunc;
-    }
-    return Ntl_ConvertSopToAigInternal( p->pAig, pNode, pNode->pSop );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the nodes in a topological order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManExtract_rec( Ntl_Man_t * p, Ntl_Net_t * pNet )
-{
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNetFanin;
-    int i;
-    // skip visited
-    if ( pNet->nVisits == 2 ) 
-        return 1;
-    // if the node is on the path, this is a combinational loop
-    if ( pNet->nVisits == 1 )
-        return 0; 
-    // mark the node as the one on the path
-    pNet->nVisits = 1;
-    // derive the box
-    pObj = pNet->pDriver;
-    assert( Ntl_ObjIsNode(pObj) || Ntl_ObjIsBox(pObj) );
-    // visit the input nets of the box
-    Ntl_ObjForEachFanin( pObj, pNetFanin, i )
-        if ( !Ntl_ManExtract_rec( p, pNetFanin ) )
-            return 0;
-    // add box inputs/outputs to COs/CIs
-    if ( Ntl_ObjIsBox(pObj) ) 
-    {
-        int LevelCur, LevelMax = -TIM_ETERNITY;
-        assert( Ntl_BoxIsComb(pObj) );
-        assert( Ntl_ModelLatchNum(pObj->pImplem) == 0 );
-        assert( pObj->pImplem->vDelays != NULL );
-        Vec_IntPush( p->vBox1Cios, Aig_ManPoNum(p->pAig) );
-        Ntl_ObjForEachFanin( pObj, pNetFanin, i )
-        {
-            LevelCur = Aig_ObjLevel( Aig_Regular((Aig_Obj_t *)pNetFanin->pCopy) );
-            LevelMax = ABC_MAX( LevelMax, LevelCur );
-            Vec_PtrPush( p->vCos, pNetFanin );
-            Aig_ObjCreatePo( p->pAig, (Aig_Obj_t *)pNetFanin->pCopy );
-        }
-        Ntl_ObjForEachFanout( pObj, pNetFanin, i )
-        {
-            Vec_PtrPush( p->vCis, pNetFanin );
-            pNetFanin->pCopy = Aig_ObjCreatePi( p->pAig );
-            Aig_ObjSetLevel( (Aig_Obj_t *)pNetFanin->pCopy, LevelMax + 1 );
-        }
-    }
-    Vec_PtrPush( p->vVisNodes, pObj );
-    if ( Ntl_ObjIsNode(pObj) )
-        pNet->pCopy = Ntl_ManBuildNodeAig( p, pObj );
-    pNet->nVisits = 2;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs DFS.]
-
-  Description [Checks for combinational loops. Collects PI/PO nets.
-  Collects nodes in the topological order.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManExtract( Ntl_Man_t * p )
-{
-    Aig_Man_t * pAig;
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet;
-    int i, k, nUselessObjects;
-    Ntl_ManCleanup( p );
-    Vec_PtrClear( p->vCis );
-    Vec_PtrClear( p->vCos );
-    Vec_PtrClear( p->vVisNodes );
-    Vec_IntClear( p->vBox1Cios );
-    // start the AIG manager
-    assert( p->pAig == NULL );
-    p->pAig = Aig_ManStart( 10000 );
-    p->pAig->pName = Aig_UtilStrsav( p->pName );
-    p->pAig->pSpec = Aig_UtilStrsav( p->pSpec );
-    // get the root model
-    pRoot = Ntl_ManRootModel( p );
-    assert( Ntl_ModelLatchNum(pRoot) == 0 );
-    // clear net visited flags
-    Ntl_ModelClearNets( pRoot );
-    // collect mapping leafs
-    Ntl_ModelForEachMapLeaf( pRoot, pObj, i )
-    {
-        assert( !Ntl_ObjIsBox(pObj) || Ntl_BoxIsBlack(pObj) || Ntl_ModelLatchNum(pObj->pImplem) > 0 );
-        Ntl_ObjForEachFanout( pObj, pNet, k )
-        {
-            Vec_PtrPush( p->vCis, pNet );
-            pNet->pCopy = Aig_ObjCreatePi( p->pAig );
-            if ( pNet->nVisits )
-            {
-                printf( "Ntl_ManExtract(): Seq leaf is duplicated or defined as a primary input.\n" );
-                return 0;
-            }
-            pNet->nVisits = 2;
-        }
-    }
-    p->iLastCi = Aig_ManPiNum(p->pAig);
-    // collect mapping roots
-    Ntl_ModelForEachMapRoot( pRoot, pObj, i )
-    {
-        Ntl_ObjForEachFanin( pObj, pNet, k )
-        {
-            if ( !Ntl_ManExtract_rec( p, pNet ) )
-            {
-                printf( "Ntl_ManExtract(): Error: Combinational loop is detected.\n" );
-                return 0;
-            }
-            Vec_PtrPush( p->vCos, pNet );
-            Aig_ObjCreatePo( p->pAig, (Aig_Obj_t *)pNet->pCopy );
-        }
-    }
-    // visit dangling boxes
-    Ntl_ModelForEachBox( pRoot, pObj, i )
-    {
-        pNet = Ntl_ObjFanout0(pObj);
-        if ( !Ntl_ManExtract_rec( p, pNet ) )
-        {
-            printf( "Ntl_ManExtract(): Error: Combinational loop is detected.\n" );
-            return 0;
-        }
-    }
-    // report the number of dangling objects
-    nUselessObjects = Ntl_ModelNodeNum(pRoot) + Ntl_ModelLut1Num(pRoot) + Ntl_ModelBoxNum(pRoot) - Vec_PtrSize(p->vVisNodes);
-//    if ( nUselessObjects )
-//        printf( "The number of dangling objects = %d.\n", nUselessObjects );
-    // cleanup the AIG
-    Aig_ManCleanup( p->pAig );
-    // extract the timing manager
-    assert( p->pManTime == NULL );
-    p->pManTime = Ntl_ManCreateTiming( p );
-    // discretize timing info
-    p->pAig->pManTime = Tim_ManDup( p->pManTime, 1 );
-    pAig = p->pAig; p->pAig = NULL;
-    return pAig;    
-}
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the nodes in a topological order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManCollapseBoxComb_rec( Ntl_Man_t * p, Ntl_Obj_t * pBox )
-{
-    extern int Ntl_ManCollapse_rec( Ntl_Man_t * p, Ntl_Net_t * pNet );
-    Ntl_Mod_t * pModel = pBox->pImplem;
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet, * pNetBox;
-    int i;
-    assert( Ntl_ObjFaninNum(pBox) == Ntl_ModelPiNum(pModel) );
-    assert( Ntl_ObjFanoutNum(pBox) == Ntl_ModelPoNum(pModel) );
-    // clear net visited flags
-    Ntl_ModelClearNets( pModel );
-    // transfer from the box to the PIs of the model
-    Ntl_ModelForEachPi( pModel, pObj, i )
-    {
-        pNet = Ntl_ObjFanout0(pObj);
-        pNetBox = Ntl_ObjFanin( pBox, i );
-        pNet->pCopy = pNetBox->pCopy;
-        pNet->nVisits = 2;
-    }
-    // compute AIG for the internal nodes
-    Ntl_ModelForEachPo( pModel, pObj, i )
-    {
-        pNet = Ntl_ObjFanin0(pObj);
-        if ( !Ntl_ManCollapse_rec( p, pNet ) )
-            return 0;
-        pNetBox = Ntl_ObjFanout( pBox, i );
-        pNetBox->pCopy = pNet->pCopy;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the nodes in a topological order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManCollapseBoxSeq1_rec( Ntl_Man_t * p, Ntl_Obj_t * pBox )
-{
-    extern int Ntl_ManCollapse_rec( Ntl_Man_t * p, Ntl_Net_t * pNet );
-    Ntl_Mod_t * pModel = pBox->pImplem;
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet, * pNetBox;
-    int i;
-    assert( Ntl_ModelLatchNum(pModel) > 0 );
-    assert( Ntl_ObjFaninNum(pBox) == Ntl_ModelPiNum(pModel) );
-    assert( Ntl_ObjFanoutNum(pBox) == Ntl_ModelPoNum(pModel) );
-    // clear net visited flags
-    Ntl_ModelClearNets( pModel );
-    // initialize the registers
-    Ntl_ModelForEachLatch( pModel, pObj, i )
-    {
-        pNet = Ntl_ObjFanout0(pObj);
-        pNet->pCopy = Aig_ObjCreatePi( p->pAig );
-        if ( Ntl_ObjIsInit1( pObj ) )
-            pNet->pCopy = Aig_Not((Aig_Obj_t *)pNet->pCopy);
-        pNet->nVisits = 2;
-        // remember the class of this register
-        Vec_IntPush( p->vRegClasses, p->pNal ? pBox->iTemp : pObj->LatchId.regClass );
-        Vec_IntPush( p->vRstClasses, p->pNal ? pBox->Reset : -1 );
-    }
-    // compute AIG for the internal nodes
-    Ntl_ModelForEachPo( pModel, pObj, i )
-    {
-        pNet = Ntl_ObjFanin0(pObj);
-        if ( !Ntl_ManCollapse_rec( p, pNet ) )
-            return 0;
-        pNetBox = Ntl_ObjFanout( pBox, i );
-        pNetBox->pCopy = pNet->pCopy;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the nodes in a topological order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManCollapseBoxSeq2_rec( Ntl_Man_t * p, Ntl_Obj_t * pBox, int iFirstPi )
-{
-    extern int Ntl_ManCollapse_rec( Ntl_Man_t * p, Ntl_Net_t * pNet );
-    Ntl_Mod_t * pModel = pBox->pImplem;
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet, * pNetBox;
-    int i;
-    assert( Ntl_ModelLatchNum(pModel) > 0 );
-    assert( Ntl_ObjFaninNum(pBox) == Ntl_ModelPiNum(pModel) );
-    assert( Ntl_ObjFanoutNum(pBox) == Ntl_ModelPoNum(pModel) );
-    // clear net visited flags
-    Ntl_ModelClearNets( pModel );
-    // transfer from the box to the PIs of the model
-    Ntl_ModelForEachPi( pModel, pObj, i )
-    {
-        pNet = Ntl_ObjFanout0(pObj);
-        pNetBox = Ntl_ObjFanin( pBox, i );
-        pNet->pCopy = pNetBox->pCopy;
-        pNet->nVisits = 2;
-    }
-    // initialize the registers
-    Ntl_ModelForEachLatch( pModel, pObj, i )
-    {
-        pNet = Ntl_ObjFanout0(pObj);
-        pNet->pCopy = Aig_ManPi( p->pAig, iFirstPi++ );
-        if ( Ntl_ObjIsInit1( pObj ) )
-            pNet->pCopy = Aig_Not((Aig_Obj_t *)pNet->pCopy);
-        pNet->nVisits = 2;
-    }
-    // compute AIGs for the registers
-    Ntl_ModelForEachLatch( pModel, pObj, i )
-    {
-        pNet = Ntl_ObjFanin0(pObj);
-        if ( !Ntl_ManCollapse_rec( p, pNet ) )
-            return 0;
-        if ( Ntl_ObjIsInit1( pObj ) )
-            Aig_ObjCreatePo( p->pAig, Aig_Not((Aig_Obj_t *)pNet->pCopy) );
-        else
-            Aig_ObjCreatePo( p->pAig, (Aig_Obj_t *)pNet->pCopy );
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the nodes in a topological order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManCollapse_rec( Ntl_Man_t * p, Ntl_Net_t * pNet )
-{
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNetFanin;
-    int i;
-    // skip visited
-    if ( pNet->nVisits == 2 ) 
-        return 1;
-    // if the node is on the path, this is a combinational loop
-    if ( pNet->nVisits == 1 )
-        return 0; 
-    // mark the node as the one on the path
-    pNet->nVisits = 1;
-    // derive the box
-    pObj = pNet->pDriver;
-    assert( Ntl_ObjIsNode(pObj) || Ntl_ObjIsBox(pObj) );
-    // visit the input nets of the box
-    Ntl_ObjForEachFanin( pObj, pNetFanin, i )
-        if ( !Ntl_ManCollapse_rec( p, pNetFanin ) )
-            return 0;
-    // add box inputs/outputs to COs/CIs
-    if ( Ntl_ObjIsBox(pObj) )
-    {
-        assert( Ntl_BoxIsWhite(pObj) && Ntl_BoxIsComb(pObj) );
-        if ( !Ntl_ManCollapseBoxComb_rec( p, pObj ) )
-            return 0;
-    }
-    if ( Ntl_ObjIsNode(pObj) )
-        pNet->pCopy = Ntl_ManBuildNodeAig( p, pObj );
-    pNet->nVisits = 2;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs DFS.]
-
-  Description [Checks for combinational loops. Collects PI/PO nets.
-  Collects nodes in the topological order.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManCollapse( Ntl_Man_t * p, int fSeq )
-{
-    Aig_Man_t * pAig;
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pBox;
-    Ntl_Net_t * pNet;
-    int i, k, nTruePis, nTruePos, iBox = 0;
-    assert( Vec_PtrSize(p->vCis) != 0 );
-    assert( Vec_PtrSize(p->vCos) != 0 );
-    Vec_IntClear( p->vBox1Cios );
-    Vec_IntClear( p->vRegClasses );
-    Vec_IntClear( p->vRstClasses );
-    // clear net visited flags
-    pRoot = Ntl_ManRootModel(p);
-    assert( Ntl_ModelLatchNum(pRoot) == 0 );
-    Ntl_ModelClearNets( pRoot );
-    // create the manager
-    p->pAig = Aig_ManStart( 10000 );
-    p->pAig->pName = Aig_UtilStrsav( p->pName );
-    p->pAig->pSpec = Aig_UtilStrsav( p->pSpec );
-    // set the inputs
-    Ntl_ManForEachCiNet( p, pNet, i )
-    {
-        pNet->pCopy = Aig_ObjCreatePi( p->pAig );
-        if ( pNet->nVisits )
-        {
-            printf( "Ntl_ManCollapse(): Primary input appears twice in the list.\n" );
-            return 0;
-        }
-        pNet->nVisits = 2;
-    }
-    nTruePis = Aig_ManPiNum(p->pAig);
-    // create inputs of seq boxes
-    if ( fSeq ) {
-      Ntl_ModelForEachBox( pRoot, pBox, i )
-      {
-          if ( !(Ntl_BoxIsSeq(pBox) && Ntl_BoxIsWhite(pBox)) )
-              continue;
-          Vec_IntPush( p->vBox1Cios, Aig_ManPiNum(p->pAig) );
-          Ntl_ManCollapseBoxSeq1_rec( p, pBox );
-          Ntl_ObjForEachFanout( pBox, pNet, k )
-              pNet->nVisits = 2;
-      }
-    }
-    // derive the outputs
-    Ntl_ManForEachCoNet( p, pNet, i )
-    {
-        if ( !Ntl_ManCollapse_rec( p, pNet ) )
-        {
-            printf( "Ntl_ManCollapse(): Error: Combinational loop is detected.\n" );
-            return 0;
-        }
-        Aig_ObjCreatePo( p->pAig, (Aig_Obj_t *)pNet->pCopy );
-    }
-    nTruePos = Aig_ManPoNum(p->pAig);
-    // create outputs of seq boxes
-    if ( fSeq ) {
-      Ntl_ModelForEachBox( pRoot, pBox, i )
-      {
-          if ( !(Ntl_BoxIsSeq(pBox) && Ntl_BoxIsWhite(pBox)) )
-              continue;
-          Ntl_ObjForEachFanin( pBox, pNet, k )
-              if ( !Ntl_ManCollapse_rec( p, pNet ) )
-              {
-                  printf( "Ntl_ManCollapse(): Error: Combinational loop is detected.\n" );
-                  return 0;
-              }
-          Ntl_ManCollapseBoxSeq2_rec( p, pBox, Vec_IntEntry(p->vBox1Cios, iBox++) );
-      }
-    }
-    // make sure registers are added correctly
-    if ( Aig_ManPiNum(p->pAig) - nTruePis != Aig_ManPoNum(p->pAig) - nTruePos )
-    {
-        printf( "Ntl_ManCollapse(): Error: Registers are created incorrectly.\n" );
-        return 0;
-    }
-    // cleanup the AIG
-    Aig_ManSetRegNum( p->pAig, Aig_ManPiNum(p->pAig) - nTruePis );
-    Aig_ManCleanup( p->pAig );
-    pAig = p->pAig; p->pAig = NULL;
-    return pAig;    
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Collapses the netlist combinationally.]
-
-  Description [Checks for combinational loops. Collects PI/PO nets.
-  Collects nodes in the topological order.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManCollapseComb( Ntl_Man_t * p )
-{
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet;
-    int i, k;
-    Vec_PtrClear( p->vCis );
-    Vec_PtrClear( p->vCos );
-    // prepare the model
-    pRoot = Ntl_ManRootModel(p);
-    // collect the leaves for this traversal
-    Ntl_ModelForEachCombLeaf( pRoot, pObj, i )
-        Ntl_ObjForEachFanout( pObj, pNet, k )
-            Vec_PtrPush( p->vCis, pNet );
-    // collect the roots for this traversal
-    Ntl_ModelForEachCombRoot( pRoot, pObj, i )
-        Ntl_ObjForEachFanin( pObj, pNet, k )
-            Vec_PtrPush( p->vCos, pNet );
-    // perform the traversal
-    return Ntl_ManCollapse( p, 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collapses the netlist combinationally.]
-
-  Description [Checks for combinational loops. Collects PI/PO nets.
-  Collects nodes in the topological order.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManCollapseSeq( Ntl_Man_t * p, int nMinDomSize, int fVerbose )
-{
-    Aig_Man_t * pAig;
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet;
-    int i, k;
-    Vec_PtrClear( p->vCis );
-    Vec_PtrClear( p->vCos );
-    // prepare the model
-    pRoot = Ntl_ManRootModel(p);
-    // collect the leaves for this traversal
-    Ntl_ModelForEachSeqLeaf( pRoot, pObj, i )
-        Ntl_ObjForEachFanout( pObj, pNet, k )
-            Vec_PtrPush( p->vCis, pNet );
-    // collect the roots for this traversal
-    Ntl_ModelForEachSeqRoot( pRoot, pObj, i )
-        Ntl_ObjForEachFanin( pObj, pNet, k )
-            Vec_PtrPush( p->vCos, pNet );
-    // perform the traversal
-    pAig = Ntl_ManCollapse( p, 1 );
-    // check if there are register classes
-    pAig->vClockDoms = Ntl_ManTransformRegClasses( p, nMinDomSize, fVerbose );
-    if ( pAig->vClockDoms )
-    {
-        if ( Vec_VecSize(pAig->vClockDoms) == 0 )
-        {
-            printf( "Register classes are below the limit (%d). Seq synthesis is not performed.\n", nMinDomSize );
-            Aig_ManStop( pAig );
-            pAig = NULL;
-        }
-        else if ( fVerbose )
-            printf( "Performing seq synthesis for %d register classes.\n", Vec_VecSize(pAig->vClockDoms) );
-        if ( fVerbose )
-            printf( "\n" );
-    }
-    return pAig;
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Increments reference counter of the net.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Ntl_NetIncrementRefs( Ntl_Net_t * pNet )
-{
-    int nRefs = (int)(long)pNet->pCopy;
-    pNet->pCopy = (void *)(long)(nRefs + 1);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Extracts logic newtork out of the netlist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Obj_t * Ntl_ManExtractNwk_rec( Ntl_Man_t * p, Ntl_Net_t * pNet, Nwk_Man_t * pNtk, Vec_Int_t * vCover, Vec_Int_t * vMemory )
-{
-    extern Hop_Obj_t * Kit_CoverToHop( Hop_Man_t * pMan, Vec_Int_t * vCover, int nVars, Vec_Int_t * vMemory );
-    Ntl_Net_t * pFaninNet;
-    Nwk_Obj_t * pNode;
-    int i;
-    if ( pNet->fMark )
-        return (Nwk_Obj_t *)pNet->pCopy2;
-    pNet->fMark = 1;
-    pNode = Nwk_ManCreateNode( pNtk, Ntl_ObjFaninNum(pNet->pDriver), (int)(long)pNet->pCopy );
-    Ntl_ObjForEachFanin( pNet->pDriver, pFaninNet, i )
-    {
-        Ntl_ManExtractNwk_rec( p, pFaninNet, pNtk, vCover, vMemory );
-        Nwk_ObjAddFanin( pNode, (Nwk_Obj_t *)pFaninNet->pCopy2 );
-    }
-    if ( Ntl_ObjFaninNum(pNet->pDriver) == 0 || Kit_PlaGetVarNum(pNet->pDriver->pSop) == 0 )
-        pNode->pFunc = Hop_NotCond( Hop_ManConst1(pNtk->pManHop), Kit_PlaIsConst0(pNet->pDriver->pSop) );
-    else
-    {
-        Kit_PlaToIsop( pNet->pDriver->pSop, vCover );
-        pNode->pFunc = Kit_CoverToHop( pNtk->pManHop, vCover, Ntl_ObjFaninNum(pNet->pDriver), vMemory );
-        if ( Kit_PlaIsComplement(pNet->pDriver->pSop) )
-            pNode->pFunc = Hop_Not(pNode->pFunc);
-    }
-    return (Nwk_Obj_t *)(pNet->pCopy2 = pNode);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Extracts logic network out of the netlist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Man_t * Ntl_ManExtractNwk( Ntl_Man_t * p, Aig_Man_t * pAig, Tim_Man_t * pManTime )
-{
-    Nwk_Man_t * pNtk;
-    Nwk_Obj_t * pNode;
-    Ntl_Mod_t * pRoot;
-    Ntl_Net_t * pNet, * pNetSimple;
-    Ntl_Obj_t * pObj;
-    Aig_Obj_t * pAnd;
-    Vec_Int_t * vCover, * vMemory;
-    int i, k;
-    pRoot = Ntl_ManRootModel( p );
-    if ( Ntl_ModelGetFaninMax(pRoot) > 6 )
-    {
-        printf( "The network contains logic nodes with more than 6 inputs.\n" );
-        return NULL;
-    }
-    vCover = Vec_IntAlloc( 100 );
-    vMemory = Vec_IntAlloc( 1 << 16 );
-    // count the number of fanouts of each net
-    Ntl_ModelClearNets( pRoot );
-    Ntl_ModelForEachObj( pRoot, pObj, i )
-        Ntl_ObjForEachFanin( pObj, pNet, k )
-            Ntl_NetIncrementRefs( pNet );
-    // remember netlist objects int the AIG nodes
-    if ( pManTime != NULL ) // logic netlist
-    {
-        assert( Ntl_ModelPiNum(pRoot) == Aig_ManPiNum(pAig) );
-        assert( Ntl_ModelPoNum(pRoot) == Aig_ManPoNum(pAig) );
-        Aig_ManForEachPi( pAig, pAnd, i )
-            pAnd->pData = Ntl_ObjFanout0( Ntl_ModelPi(pRoot, i) );
-        Aig_ManForEachPo( pAig, pAnd, i )
-            pAnd->pData = Ntl_ObjFanin0(Ntl_ModelPo(pRoot, i) );
-    }
-    else // real netlist
-    {
-        assert( p->vCis && p->vCos );
-        Aig_ManForEachPi( pAig, pAnd, i )
-            pAnd->pData = Vec_PtrEntry( p->vCis, i );
-        Aig_ManForEachPo( pAig, pAnd, i )
-            pAnd->pData = Vec_PtrEntry( p->vCos, i );
-    }
-    // construct the network
-    pNtk = Nwk_ManAlloc();
-    pNtk->pName = Aig_UtilStrsav( pAig->pName );
-    pNtk->pSpec = Aig_UtilStrsav( pAig->pSpec );
-    Aig_ManForEachObj( pAig, pAnd, i )
-    {
-        if ( Aig_ObjIsPi(pAnd) )
-        {
-            pNet = (Ntl_Net_t *)pAnd->pData;
-            pNet->fMark = 1;
-            pNet->pCopy2 = Nwk_ManCreateCi( pNtk, (int)(long)pNet->pCopy ); 
-        }
-        else if ( Aig_ObjIsPo(pAnd) )
-        {
-            pNet = (Ntl_Net_t *)pAnd->pData;
-            pNode = Nwk_ManCreateCo( pNtk );
-            if ( (pNetSimple = Ntl_ModelFindSimpleNet( pNet )) )
-            {
-                pNetSimple->pCopy2 = Ntl_ManExtractNwk_rec( p, pNetSimple, pNtk, vCover, vMemory ); 
-                Nwk_ObjAddFanin( pNode, (Nwk_Obj_t *)pNetSimple->pCopy2 );
-                pNode->fInvert = Kit_PlaIsInv( pNet->pDriver->pSop );
-            }
-            else
-            {
-                pNet->pCopy2 = Ntl_ManExtractNwk_rec( p, pNet, pNtk, vCover, vMemory ); 
-                Nwk_ObjAddFanin( pNode, (Nwk_Obj_t *)pNet->pCopy2 );
-                pNode->fInvert = (Nwk_ObjFanin0(pNode)->pFunc == Hop_ManConst0(pNtk->pManHop)); // fixed on June 7, 2009
-            }
-        }
-    }
-    Ntl_ModelClearNets( pRoot );
-    Vec_IntFree( vCover );
-    Vec_IntFree( vMemory );
-    // create timing manager from the current design
-    if ( pManTime )
-        pNtk->pManTime = Tim_ManDup( pManTime, 0 );
-    else
-        pNtk->pManTime = Tim_ManDup( p->pManTime, 0 );
-    Nwk_ManRemoveDupFanins( pNtk, 0 );
-    assert( Nwk_ManCheck( pNtk ) );
-    return pNtk;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Extracts logic newtork out of the netlist.]
- 
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Man_t * Ntl_ManReadNwk( char * pFileName, Aig_Man_t * pAig, Tim_Man_t * pManTime )
-{
-    Nwk_Man_t * pNtk;
-    Ntl_Man_t * pNtl;
-    Ntl_Mod_t * pRoot;
-    pNtl = Ntl_ManReadBlif( pFileName, 1 );
-    if ( pNtl == NULL )
-    {
-        printf( "Ntl_ManReadNwk(): Reading BLIF has failed.\n" );
-        return NULL;
-    }
-    pRoot = Ntl_ManRootModel( pNtl );
-    if ( Ntl_ModelLatchNum(pRoot) != 0 )
-    {
-        printf( "Ntl_ManReadNwk(): The input network has %d registers.\n", Ntl_ModelLatchNum(pRoot) );
-        return NULL;
-    }
-    if ( Ntl_ModelBoxNum(pRoot) != 0 )
-    {
-        printf( "Ntl_ManReadNwk(): The input network has %d boxes.\n", Ntl_ModelBoxNum(pRoot) );
-        return NULL;
-    }
-    if ( Ntl_ModelPiNum(pRoot) != Aig_ManPiNum(pAig) )
-    {
-        printf( "Ntl_ManReadNwk(): The number of primary inputs does not match (%d and %d).\n",
-            Ntl_ModelPiNum(pRoot), Aig_ManPiNum(pAig) );
-        return NULL;
-    }
-    if ( Ntl_ModelPoNum(pRoot) != Aig_ManPoNum(pAig) )
-    {
-        printf( "Ntl_ManReadNwk(): The number of primary outputs does not match (%d and %d).\n",
-            Ntl_ModelPoNum(pRoot), Aig_ManPoNum(pAig) );
-        return NULL;
-    }
-    pNtk = Ntl_ManExtractNwk( pNtl, pAig, pManTime );
-    Ntl_ManFree( pNtl );
-    return pNtk;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlFraig.c b/src/aig/ntl/ntlFraig.c
deleted file mode 100644
index 9470df3e..00000000
--- a/src/aig/ntl/ntlFraig.c
+++ /dev/null
@@ -1,1004 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlFraig.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Performing fraiging with white-boxes.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlFraig.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "fra.h"
-#include "ssw.h"
-#include "dch.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Remaps representatives of the equivalence classes.]
-
-  Description [For each equivalence class, if the current representative 
-  of the class cannot be used because its corresponding net has no-merge 
-  attribute, find the topologically-shallowest node, which can be used 
-  as a representative.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManUpdateNoMergeReprs( Aig_Man_t * pAig, Aig_Obj_t ** pReprs )
-{
-    Aig_Obj_t ** pReprsNew = NULL;
-    Aig_Obj_t * pObj, * pRepres, * pRepresNew;
-    Ntl_Net_t * pNet, * pNetObj;
-    int i;
-
-    // allocate room for the new representative
-    pReprsNew = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
-    memset( pReprsNew, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(pAig) );
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        // get the old representative node
-        pRepres = pReprs[pObj->Id];
-        if ( pRepres == NULL )
-            continue;
-        // if this representative node is already remapped, skip it
-        pRepresNew = pReprsNew[ pRepres->Id ];
-        if ( pRepresNew != NULL )
-            continue;
-        // get the net of the representative node
-        pNet = (Ntl_Net_t *)pRepres->pData;
-        assert( pRepres->pData != NULL );
-        if ( Ntl_ObjIsBox(pNet->pDriver) && pNet->pDriver->pImplem->attrNoMerge )
-        {
-            // the net belongs to the no-merge box
-            pNetObj = (Ntl_Net_t *)pObj->pData;
-            if ( Ntl_ObjIsBox(pNetObj->pDriver) && pNetObj->pDriver->pImplem->attrNoMerge )
-                continue;
-            // the object's net does not belong to the no-merge box
-            // pObj can be used instead of pRepres
-            pReprsNew[ pRepres->Id ] = pObj;
-        }
-        else
-        {
-            // otherwise, it is fine to use pRepres
-            pReprsNew[ pRepres->Id ] = pRepres;
-        }
-    }
-    // update the representatives
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        // get the representative node
-        pRepres = pReprs[ pObj->Id ];
-        if ( pRepres == NULL )
-            continue;
-        // if the representative has no mapping, undo the mapping of the node
-        pRepresNew = pReprsNew[ pRepres->Id ];
-        if ( pRepresNew == NULL || pRepresNew == pObj )
-        {
-            pReprs[ pObj->Id ] = NULL;
-            continue;
-        }
-        // remap the representative
-//        assert( pObj->Id > pRepresNew->Id );        
-//        pReprs[ pObj->Id ] = pRepresNew;
-        if ( pObj->Id > pRepresNew->Id )
-            pReprs[ pObj->Id ] = pRepresNew;
-        else
-            pReprs[ pObj->Id ] = NULL;
-    }
-    ABC_FREE( pReprsNew );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transfers equivalence class info from pAigCol to pAig.]
-
-  Description [pAig points to the nodes of netlist (pNew) derived using it.
-  pNew points to the nodes of the collapsed AIG (pAigCol) derived using it.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t ** Ntl_ManFraigDeriveClasses( Aig_Man_t * pAig, Ntl_Man_t * pNew, Aig_Man_t * pAigCol )
-{
-    Ntl_Net_t * pNet;
-    Aig_Obj_t ** pReprs = NULL, ** pMapBack = NULL;
-    Aig_Obj_t * pObj, * pObjCol, * pObjColRepr, * pCorresp;
-    int i;
-
-    // remember pointers to the nets of pNew
-    Aig_ManForEachObj( pAig, pObj, i )
-        pObj->pNext = (Aig_Obj_t *)pObj->pData;
-
-    // map the AIG managers
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        if ( Aig_ObjIsConst1(pObj) )
-            pObj->pData = Aig_ManConst1(pAigCol);
-        else if ( !Aig_ObjIsPo(pObj) )
-        {
-            pNet = (Ntl_Net_t *)pObj->pData;
-            pObjCol = Aig_Regular((Aig_Obj_t *)pNet->pCopy);
-            pObj->pData = pObjCol;
-        }
-    }
-
-    // create mapping from the collapsed manager into the original manager
-    // (each node in the collapsed manager may have more than one equivalent node 
-    // in the original manager; this procedure finds the first node in the original 
-    // manager that is equivalent to the given node in the collapsed manager) 
-    pMapBack = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAigCol) );
-    memset( pMapBack, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(pAigCol) );
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        if ( Aig_ObjIsPo(pObj) )
-            continue;
-        pObjCol = (Aig_Obj_t *)pObj->pData;
-        if ( pObjCol == NULL )
-            continue;
-        if ( pMapBack[pObjCol->Id] == NULL )
-            pMapBack[pObjCol->Id] = pObj;
-    }
-
-    // create the equivalence classes for the original manager
-    pReprs = ABC_ALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
-    memset( pReprs, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(pAig) );
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        if ( Aig_ObjIsPo(pObj) )
-            continue;
-        // get the collapsed node
-        pObjCol = (Aig_Obj_t *)pObj->pData;
-        if ( pObjCol == NULL )
-            continue;
-        // get the representative of the collapsed node
-        pObjColRepr = pAigCol->pReprs[pObjCol->Id];
-        if ( pObjColRepr == NULL )
-            pObjColRepr = pObjCol;
-        // get the corresponding original node
-        pCorresp = pMapBack[pObjColRepr->Id];
-        if ( pCorresp == NULL || pCorresp == pObj )
-            continue;
-        // set the representative
-        if ( pCorresp->Id < pObj->Id )
-            pReprs[pObj->Id] = pCorresp;
-        else
-            pReprs[pCorresp->Id] = pObj;
-    }
-    ABC_FREE( pMapBack );
-
-    // recall pointers to the nets of pNew
-    Aig_ManForEachObj( pAig, pObj, i )
-        pObj->pData = pObj->pNext, pObj->pNext = NULL;
-
-    // remap no-merge representatives to point to 
-    // the shallowest nodes in the class without no-merge
-    Ntl_ManUpdateNoMergeReprs( pAig, pReprs );
-    return pReprs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Uses equivalences in the AIG to reduce the design.]
-
-  Description [The AIG (pAig) was extracted from the netlist and still 
-  points to it (pObj->pData is the pointer to the nets in the netlist).
-  Equivalences have been computed for the collapsed AIG and transfered
-  to this AIG (pAig). This procedure reduces the corresponding nets.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManReduce( Ntl_Man_t * p, Aig_Man_t * pAig )
-{
-    Aig_Obj_t * pObj, * pObjRepr;
-    Ntl_Net_t * pNet, * pNetRepr, * pNetNew;
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pNode, * pNodeOld;
-    int i, fCompl, Counter = 0;
-    char * pNameNew;
-//    int Lenght;
-    assert( pAig->pReprs );
-    pRoot = Ntl_ManRootModel( p );
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        pObjRepr = Aig_ObjRepr( pAig, pObj );
-        if ( pObjRepr == NULL )
-            continue;
-        assert( pObj != pObjRepr );
-        pNet = (Ntl_Net_t *)pObj->pData;
-        pNetRepr = (Ntl_Net_t *)pObjRepr->pData;
-        // consider special cases, when the net should not be reduced
-        if ( Ntl_ObjIsBox(pNet->pDriver) )
-        {
-            // do not reduce the net if it is driven by a multi-output box
-            if ( Ntl_ObjFanoutNum(pNet->pDriver) > 1 )
-                continue;
-            // do not reduce the net if it has no-merge attribute
-            if ( pNet->pDriver->pImplem->attrNoMerge )
-                continue;
-            // do not reduce the net if the replacement net has no-merge attribute
-            if ( pNetRepr != NULL && Ntl_ObjIsBox(pNetRepr->pDriver) && 
-                 pNetRepr->pDriver->pImplem->attrNoMerge )
-                continue;
-        }
-        if ( pNetRepr == NULL )
-        {
-            // this is the constant node
-            assert( Aig_ObjIsConst1(pObjRepr) );
-            pNode = Ntl_ModelCreateNode( pRoot, 0 );
-            pNode->pSop = Ntl_ManStoreSop( p->pMemSops, " 1\n" );
-            if ( (pNetRepr = Ntl_ModelFindNet( pRoot, "Const1" )) )
-            {
-                printf( "Ntl_ManReduce(): Internal error: Intermediate net name is not unique.\n" );
-                return;
-            }
-            pNetRepr = Ntl_ModelFindOrCreateNet( pRoot, "Const1" );
-            if ( !Ntl_ModelSetNetDriver( pNode, pNetRepr ) )
-            {
-                printf( "Ntl_ManReduce(): Internal error: Net has more than one fanin.\n" );
-                return;
-            }
-            pObjRepr->pData = pNetRepr;
-            pNetRepr->pCopy = Aig_ManConst1(pAig);
-        }
-        // get the complemented attributes of the nets
-        fCompl = Aig_IsComplement((Aig_Obj_t *)pNet->pCopy) ^ Aig_Regular((Aig_Obj_t *)pNet->pCopy)->fPhase ^
-                 Aig_IsComplement((Aig_Obj_t *)pNetRepr->pCopy) ^ Aig_Regular((Aig_Obj_t *)pNetRepr->pCopy)->fPhase;
-        // create interter/buffer driven by the representative net
-        pNode = Ntl_ModelCreateNode( pRoot, 1 );
-        pNode->pSop = fCompl? Ntl_ManStoreSop( p->pMemSops, "0 1\n" ) : Ntl_ManStoreSop( p->pMemSops, "1 1\n" );
-        Ntl_ObjSetFanin( pNode, pNetRepr, 0 );
-        // make the new node drive the equivalent net (pNet)
-        pNodeOld = pNet->pDriver;
-        if ( !Ntl_ModelClearNetDriver( pNet->pDriver, pNet ) )
-            printf( "Ntl_ManReduce(): Internal error! Net already has no driver.\n" );
-        if ( !Ntl_ModelSetNetDriver( pNode, pNet ) )
-            printf( "Ntl_ManReduce(): Internal error! Net already has a driver.\n" );
-/*
-        // remove this net from the hash table (but do not remove from the array)
-        Ntl_ModelDeleteNet( pRoot, pNet );
-        // create new net with the same name
-        pNetNew = Ntl_ModelFindOrCreateNet( pRoot, pNet->pName );
-        // clean the name
-        pNet->pName[0] = 0;
-*/
-        // create new net with a new name
-        pNameNew = Ntl_ModelCreateNetName( pRoot, "noname", (int)(ABC_PTRINT_T)pNet );
-        pNetNew = Ntl_ModelFindOrCreateNet( pRoot, pNameNew );
-
-        // make the old node drive the new net without fanouts
-        if ( !Ntl_ModelSetNetDriver( pNodeOld, pNetNew ) )
-            printf( "Ntl_ManReduce(): Internal error! Net already has a driver.\n" );
-
-        Counter++;
-    }
-//    printf( "Nets without names = %d.\n", Counter );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resets complemented attributes of the collapsed AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManResetComplemented( Ntl_Man_t * p, Aig_Man_t * pAigCol )
-{
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pObj;
-    Aig_Obj_t * pObjCol;
-    int i;
-    pRoot = Ntl_ManRootModel(p);
-    Ntl_ModelForEachLatch( pRoot, pObj, i )
-    {
-        if ( Ntl_ObjIsInit1( pObj ) )
-        {
-            pObjCol = (Aig_Obj_t *)Ntl_ObjFanout0(pObj)->pCopy;
-            assert( pObjCol->fPhase == 0 );
-            pObjCol->fPhase = 1;
-        }
-    }
-}
- 
-/**Function*************************************************************
-
-  Synopsis    [Finalizes the transformation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManFinalize( Ntl_Man_t * pNew, Aig_Man_t * pAig, Aig_Man_t * pAigCol, int fVerbose )
-{
-    int fUseExtraSweep = 1;
-    Ntl_Man_t * pSwept;
-    Aig_Man_t * pTemp;
-    assert( pAig->pReprs == NULL );
-    assert( pAigCol->pReprs != NULL );
-
-    // transfer equivalence classes to the original AIG
-    pAig->pReprs = Ntl_ManFraigDeriveClasses( pAig, pNew, pAigCol );
-    pAig->nReprsAlloc = Aig_ManObjNumMax(pAig);
-if ( fVerbose )
-    printf( "Equivalences:  Collapsed = %5d.  Extracted = %5d.\n", Aig_ManCountReprs(pAigCol), Aig_ManCountReprs(pAig) );
-/*
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManForEachObj( pAig, pObj, i )
-        if ( pAig->pReprs[i] != NULL )
-            printf( "%s%d->%s%d  ", 
-                (Aig_ObjIsPi(pObj)? "pi": ""), 
-                pObj->Id, 
-                (Aig_ObjIsPi(pAig->pReprs[i])? "pi": ""),
-                pAig->pReprs[i]->Id ); 
-    printf( "\n" );
-}
-*/
-    // implement equivalence classes and remove dangling nodes
-    Ntl_ManReduce( pNew, pAig );
-    Ntl_ManSweep( pNew, fVerbose );
-
-    // perform one more sweep
-    if ( fUseExtraSweep )
-    {
-        pTemp = Ntl_ManExtract( pNew );
-        pSwept = Ntl_ManInsertAig( pNew, pTemp );
-        Aig_ManStop( pTemp );
-        Ntl_ManSweep( pSwept, fVerbose );
-        return pSwept;
-    }
-    return Ntl_ManDup(pNew);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns AIG with WB after fraiging.]
-
-  Description [Consumes the input NTL to save memory.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManFraig( Ntl_Man_t * p, int nPartSize, int nConfLimit, int nLevelMax, int fUseCSat, int fVerbose )
-{
-    Ntl_Man_t * pNew, * pAux;
-    Aig_Man_t * pAig, * pAigCol, * pTemp;
-
-    if ( Ntl_ModelNodeNum(Ntl_ManRootModel(p)) == 0 )
-        return p;
-
-    // collapse the AIG
-    pAig = Ntl_ManExtract( p );
-    pNew = Ntl_ManInsertAig( p, pAig );
-    Ntl_ManFree( p );
-    pAigCol = Ntl_ManCollapseComb( pNew );
-    if ( pAigCol == NULL )
-    {
-        Aig_ManStop( pAig );
-        return pNew;
-    }
-
-    // perform fraiging for the given design
-    if ( fUseCSat )
-    {
-//        extern Aig_Man_t * Cec_FraigCombinational( Aig_Man_t * pAig, int nConfs, int fVerbose );
-//        pTemp = Cec_FraigCombinational( pAigCol, nConfLimit, fVerbose );
-//        Aig_ManStop( pTemp );
-        extern void Dch_ComputeEquivalences( Aig_Man_t * pAig, Dch_Pars_t * pPars );
-        Dch_Pars_t Pars, * pPars = &Pars;
-        Dch_ManSetDefaultParams( pPars );
-        pPars->nBTLimit = nConfLimit;
-        pPars->fVerbose = fVerbose;
-        Dch_ComputeEquivalences( pAigCol, pPars );
-    }
-    else
-    {
-        nPartSize = nPartSize? nPartSize : Aig_ManPoNum(pAigCol);
-        pTemp = Aig_ManFraigPartitioned( pAigCol, nPartSize, nConfLimit, nLevelMax, fVerbose );
-        Aig_ManStop( pTemp );
-    }
-
-    // finalize the transformation
-    pNew = Ntl_ManFinalize( pAux = pNew, pAig, pAigCol, fVerbose );
-    Ntl_ManFree( pAux );
-    Aig_ManStop( pAig );
-    Aig_ManStop( pAigCol );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of resets.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManAigCountResets( Ntl_Man_t * pNtl )
-{
-/*
-    Ntl_Mod_t * pModel = Ntl_ManRootModel(pNtl);
-    Ntl_Obj_t * pBox;
-    int i, Counter = -1;
-    Ntl_ModelForEachObj( pModel, pBox, i )
-        Counter = ABC_MAX( Counter, pBox->Reset );
-    return Counter + 1;
-*/
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transforms sequential AIG to allow for async reset.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ntl_ManAigToRst( Ntl_Man_t * pNtl, Aig_Man_t * p )
-{
-    Ntl_Mod_t * pModel = Ntl_ManRootModel(pNtl);
-    Aig_Man_t * pNew;
-    Aig_Obj_t * pObj;
-    int i, iRegNum, iRstNum, Counter = 0;
-    int nResets = Ntl_ManAigCountResets( pNtl );
-    assert( pNtl->pNal != NULL );
-    assert( Aig_ManRegNum(p) > 0 );
-    assert( Vec_IntSize(pNtl->vRstClasses) == Aig_ManRegNum(p) );
-//printf( "Number of resets before synthesis = %d.\n", nResets );
-    // create the PIs
-    Aig_ManCleanData( p );
-    Aig_ManSetPioNumbers( p );
-    // create the new manager
-    pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
-    // create special PIs
-    for ( i = 0; i < nResets; i++ )
-        Aig_ObjCreatePi( pNew );
-    // duplicate internal nodes
-    Aig_ManForEachPi( p, pObj, i )
-        pObj->pData = Aig_ObjCreatePi( pNew );
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        if ( Aig_ObjIsNode(pObj) )
-            pObj->pData = Aig_And( pNew, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) );
-        else if ( Aig_ObjIsPo(pObj) )
-            pObj->pData = Aig_ObjCreatePo( pNew, Aig_ObjChild0Copy(pObj) );
-        else if ( Aig_ObjIsPi(pObj) )
-        {
-//            pObj->pData = Aig_ObjCreatePi( pNew );
-            iRegNum = Aig_ObjPioNum(pObj) - (Aig_ManPiNum(p) - Aig_ManRegNum(p));
-            if ( iRegNum < 0 )
-                continue;
-            iRstNum = Vec_IntEntry(pNtl->vRstClasses, iRegNum);
-            if ( iRstNum < 0 )
-                continue;
-            assert( iRstNum < nResets );
-            pObj->pData = Aig_And( pNew, (Aig_Obj_t *)pObj->pData, Aig_ManPi(pNew, iRstNum) ); // could be NOT(pi)
-            Counter++;
-        }
-        else if ( Aig_ObjIsConst1(pObj) )
-            pObj->pData = Aig_ManConst1(pNew);
-        else
-            assert( 0 );
-    }
-    assert( Aig_ManNodeNum(p) + Counter == Aig_ManNodeNum(pNew) );
-    if ( (Counter = Aig_ManCleanup( pNew )) )
-        printf( "Aig_ManDupOrdered(): Cleanup after AIG duplication removed %d nodes.\n", Counter );
-    Aig_ManSetRegNum( pNew, Aig_ManRegNum(p) );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Remaps equivalence classes from the new nodes to the old ones.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManRemapClassesLcorr( Ntl_Man_t * pNtl, Aig_Man_t * p, Aig_Man_t * pNew )
-{
-    Ntl_Mod_t * pModel = Ntl_ManRootModel(pNtl);
-    Aig_Obj_t * pObj, * pObjRepr, * pObjNew, * pObjNewRepr;
-    int i, nResets = Ntl_ManAigCountResets( pNtl );
-    int nTruePis = Aig_ManPiNum(p) - Aig_ManRegNum(p);
-    assert( pNew->pReprs != NULL );
-    assert( nResets == Aig_ManPiNum(pNew) - Aig_ManPiNum(p) );
-    Aig_ManReprStart( p, Aig_ManObjNumMax(p) );
-    Aig_ManForEachLoSeq( pNew, pObjNew, i )
-    {
-        pObj = Aig_ManPi( p, i - nResets );
-        pObjNewRepr = pNew->pReprs[pObjNew->Id];
-        if ( pObjNewRepr == NULL )
-            continue;
-        if ( pObjNewRepr == Aig_ManConst1(pNew) )
-        {
-            Aig_ObjCreateRepr( p, Aig_ManConst1(p), pObj );
-            continue;
-        }
-        assert( Aig_ObjIsPi(pObjNewRepr) );
-        // find the corresponding representative node
-        pObjRepr = Aig_ManPi( p, Aig_ObjPioNum(pObjNewRepr) - nResets );
-        // if they belong to different domains, quit
-        if ( Vec_IntEntry( pNtl->vRstClasses, Aig_ObjPioNum(pObj) - nTruePis ) != 
-             Vec_IntEntry( pNtl->vRstClasses, Aig_ObjPioNum(pObjRepr) - nTruePis ) )
-            continue;
-        Aig_ObjCreateRepr( p, pObjRepr, pObj );
-    }
-} 
-
-/**Function*************************************************************
-
-  Synopsis    [Remaps equivalence classes from the new nodes to the old ones.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManRemapClassesScorr( Ntl_Man_t * pNtl, Aig_Man_t * p, Aig_Man_t * pNew )
-{
-    Aig_Obj_t * pObj, * pObjRepr, * pObjNew, * pObjNewRepr;
-    int i;
-    // map things back
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        pObjNew = (Aig_Obj_t *)pObj->pData;
-        assert( pObjNew != NULL && !Aig_IsComplement(pObjNew) );
-        pObjNew->pData = pObj;
-    }
-    // remap the classes
-    Aig_ManForEachObj( pNew, pObjNew, i )
-    {
-        pObjNewRepr = pNew->pReprs[pObjNew->Id];
-        if ( pObjNewRepr == NULL )
-            continue;
-        pObj = (Aig_Obj_t *)pObjNew->pData;
-        pObjRepr = (Aig_Obj_t *)pObjNewRepr->pData;    
-        assert( Aig_ObjId(pObjRepr) < Aig_ObjId(pObj) );
-        Aig_ObjCreateRepr( p, pObjRepr, pObj );
-    }
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs sequential cleanup.]
-
-  Description [Consumes the input NTL to save memory.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManScl( Ntl_Man_t * p, int fLatchConst, int fLatchEqual, int fVerbose )
-{
-    Ntl_Man_t * pNew, * pAux;
-    Aig_Man_t * pAig, * pAigCol, * pTemp;
-
-    // collapse the AIG
-    pAig = Ntl_ManExtract( p );
-//Ntl_ManPrintStats( p );
-//Aig_ManPrintStats( pAig );
-    pNew = Ntl_ManInsertAig( p, pAig );
-    Ntl_ManFree( p );
-    pAigCol = Ntl_ManCollapseSeq( pNew, 0, fVerbose );
-    if ( pAigCol == NULL )
-    {
-        Aig_ManStop( pAig );
-        return pNew;
-    }
-//Ntl_ManPrintStats( pNew );
-//Aig_ManPrintStats( pAigCol );
-
-    // perform SCL
-    if ( pNew->pNal )
-    {
-        Aig_Man_t * pAigRst;
-        pAigRst = Ntl_ManAigToRst( pNew, pAigCol );
-        pTemp = Aig_ManScl( pAigRst, fLatchConst, fLatchEqual, 0, -1, -1, fVerbose, 0 );
-        Aig_ManStop( pTemp );
-        Ntl_ManRemapClassesLcorr( pNew, pAigCol, pAigRst );
-        Aig_ManStop( pAigRst );
-    }
-    else
-    {
-        pTemp = Aig_ManScl( pAigCol, fLatchConst, fLatchEqual, 0, -1, -1, fVerbose, 0 );
-        Aig_ManStop( pTemp );
-    }
-
-    // finalize the transformation
-    pNew = Ntl_ManFinalize( pAux = pNew, pAig, pAigCol, fVerbose );
-    Ntl_ManFree( pAux );
-    Aig_ManStop( pAig );
-    Aig_ManStop( pAigCol );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns AIG with WB after fraiging.]
-
-  Description [Consumes the input NTL to save memory.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManLcorr( Ntl_Man_t * p, int nConfMax, int fScorrGia, int fUseCSat, int fVerbose )
-{
-    Ntl_Man_t * pNew, * pAux;
-    Aig_Man_t * pAig, * pAigCol, * pTemp;
-    Ssw_Pars_t Pars, * pPars = &Pars;
-    Ssw_ManSetDefaultParamsLcorr( pPars );
-    pPars->nBTLimit = nConfMax;
-    pPars->fVerbose = fVerbose;
-
-    // collapse the AIG
-    pAig = Ntl_ManExtract( p );
-    pNew = Ntl_ManInsertAig( p, pAig );
-    Ntl_ManFree( p );
-    pAigCol = Ntl_ManCollapseSeq( pNew, pPars->nMinDomSize, pPars->fVerbose );
-    if ( pAigCol == NULL )
-    {
-        Aig_ManStop( pAig );
-        return pNew;
-    }
-
-    // perform LCORR
-    pPars->fScorrGia = fScorrGia;
-    pPars->fUseCSat  = fUseCSat;
-    if ( pNew->pNal )
-    {
-        Aig_Man_t * pAigRst;
-        pAigRst = Ntl_ManAigToRst( pNew, pAigCol );
-        pTemp = Ssw_LatchCorrespondence( pAigRst, pPars );
-        Aig_ManStop( pTemp );
-        Ntl_ManRemapClassesLcorr( pNew, pAigCol, pAigRst );
-        Aig_ManStop( pAigRst );
-    }
-    else
-    {
-        pTemp = Ssw_LatchCorrespondence( pAigCol, pPars );
-        Aig_ManStop( pTemp );
-    }
-
-    // finalize the transformation
-    pNew = Ntl_ManFinalize( pAux = pNew, pAig, pAigCol, fVerbose );
-    Ntl_ManFree( pAux );
-    Aig_ManStop( pAig );
-    Aig_ManStop( pAigCol );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns AIG with WB after fraiging.]
-
-  Description [Consumes the input NTL to save memory.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManSsw( Ntl_Man_t * p, Fra_Ssw_t * pPars )
-{
-    Ntl_Man_t * pNew, * pAux;
-    Aig_Man_t * pAig, * pAigCol, * pTemp;
-    assert( 0 ); // not updated for nal
-
-    // collapse the AIG
-    pAig = Ntl_ManExtract( p );
-    pNew = Ntl_ManInsertAig( p, pAig );
-    Ntl_ManFree( p );
-    pAigCol = Ntl_ManCollapseSeq( pNew, pPars->nMinDomSize, pPars->fVerbose );
-    if ( pAigCol == NULL )
-    {
-        Aig_ManStop( pAig );
-        return pNew;
-    }
-
-    // perform SCL for the given design
-    pTemp = Fra_FraigInduction( pAigCol, pPars );
-    Aig_ManStop( pTemp );
-
-    // finalize the transformation
-    pNew = Ntl_ManFinalize( pAux = pNew, pAig, pAigCol, pPars->fVerbose );
-    Ntl_ManFree( pAux );
-    Aig_ManStop( pAig );
-    Aig_ManStop( pAigCol );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns AIG with WB after fraiging.]
-
-  Description [Consumes the input NTL to save memory.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManScorr( Ntl_Man_t * p, Ssw_Pars_t * pPars )
-{
-    Ntl_Man_t * pNew, * pAux;
-    Aig_Man_t * pAig, * pAigCol, * pTemp;
-
-    // collapse the AIG
-    pAig = Ntl_ManExtract( p );
-    pNew = Ntl_ManInsertAig( p, pAig );
-    Ntl_ManFree( p );
-    pAigCol = Ntl_ManCollapseSeq( pNew, pPars->nMinDomSize, pPars->fVerbose );
-    if ( pAigCol == NULL )
-    {
-        Aig_ManStop( pAig );
-        return pNew;
-    }
-
-    // perform SCL
-    if ( pNew->pNal )
-    {
-        Aig_Man_t * pAigRst;
-        pAigRst = Ntl_ManAigToRst( pNew, pAigCol );
-        pTemp = Ssw_SignalCorrespondence( pAigRst, pPars );
-        Aig_ManStop( pTemp );
-        Ntl_ManRemapClassesLcorr( pNew, pAigCol, pAigRst );
-        Aig_ManStop( pAigRst );
-    }
-    else
-    {
-        pPars->fVerbose = 1;
-
-        pTemp = Ssw_SignalCorrespondence( pAigCol, pPars );
-        Aig_ManStop( pTemp );
-    }
-
-    // finalize the transformation
-    pNew = Ntl_ManFinalize( pAux = pNew, pAig, pAigCol, pPars->fVerbose );
-    Ntl_ManFree( pAux );
-    Aig_ManStop( pAig );
-    Aig_ManStop( pAigCol );
-    return pNew;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Transfers the copy field into the second copy field.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManTransferCopy( Ntl_Man_t * p )
-{
-    Ntl_Net_t * pNet;
-    Ntl_Mod_t * pRoot;
-    int i;
-    pRoot = Ntl_ManRootModel( p );
-    Ntl_ModelForEachNet( pRoot, pNet, i )
-    {
-        pNet->pCopy2 = pNet->pCopy;
-        pNet->pCopy = NULL;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reattaches one white-box.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManAttachWhiteBox( Ntl_Man_t * p, Aig_Man_t * pAigCol, Aig_Man_t * pAigRed, Ntl_Man_t * pNew, Ntl_Obj_t * pBox )
-{
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reattaches white-boxes after reducing the netlist.]
-
-  Description [The following parameters are given:
-  Original netlist (p) whose nets point to the nodes of collapsed AIG.
-  Collapsed AIG (pAigCol) whose objects point to those of reduced AIG.
-  Reduced AIG (pAigRed) whose objects point to the nets of the new netlist.
-  The new netlist is changed by this procedure to have those white-boxes
-  from the original AIG (p) those outputs are preserved after reduction.
-  Note that if outputs are preserved, the inputs are also preserved.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManAttachWhiteBoxes( Ntl_Man_t * p, Aig_Man_t * pAigCol, Aig_Man_t * pAigRed, Ntl_Man_t * pNew, int fVerbose )
-{
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pBox;
-    Ntl_Net_t * pNet;
-    int i, k, Counter = 0;
-    // go through the white-boxes and check if they are preserved
-    pRoot = Ntl_ManRootModel( p );
-    Ntl_ModelForEachBox( pRoot, pBox, i )
-    {
-        Ntl_ObjForEachFanout( pBox, pNet, k )
-        {
-            // skip dangling outputs of the box
-            if ( pNet->pCopy == NULL )
-                continue;
-            // skip the outputs that are not preserved after merging equivalence
-            if ( Aig_Regular((Aig_Obj_t *)pNet->pCopy2)->pData == NULL )
-                continue;
-            break;
-        }
-        if ( k == Ntl_ObjFanoutNum(pBox) )
-            continue;
-        // the box is preserved
-        Ntl_ManAttachWhiteBox( p, pAigCol, pAigRed, pNew, pBox );
-        Counter++;
-    }
-    if ( fVerbose )
-        printf( "Attached %d boxed (out of %d).\n", Counter, Ntl_ModelBoxNum(pRoot) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Flip complemented edges.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManFlipEdges( Ntl_Man_t * p, Aig_Man_t * pAigCol )
-{
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pObj;
-    Aig_Obj_t * pObjCol, * pFanin;
-    int i, iLatch;
-    pRoot = Ntl_ManRootModel(p);
-    iLatch = 0;
-    Ntl_ModelForEachLatch( pRoot, pObj, i )
-    {
-        if ( Ntl_ObjIsInit1( pObj ) )
-        {
-            pObjCol = Aig_ManPi( pAigCol, Ntl_ModelPiNum(pRoot) + iLatch );
-            assert( pObjCol->fMarkA == 0 );
-            pObjCol->fMarkA = 1;
-        }
-        iLatch++;
-    }
-    // flip pointers to the complemented edges
-    Aig_ManForEachObj( pAigCol, pObjCol, i )
-    {
-        pFanin = Aig_ObjFanin0(pObjCol);
-        if ( pFanin && pFanin->fMarkA )
-            pObjCol->pFanin0 = Aig_Not(pObjCol->pFanin0);
-        pFanin = Aig_ObjFanin1(pObjCol);
-        if ( pFanin && pFanin->fMarkA )
-            pObjCol->pFanin1 = Aig_Not(pObjCol->pFanin1);
-    }
-    // flip complemented latch derivers and undo the marks
-    iLatch = 0;
-    Ntl_ModelForEachLatch( pRoot, pObj, i )
-    {
-        if ( Ntl_ObjIsInit1( pObj ) )
-        {
-            // flip the latch input
-            pObjCol = Aig_ManPo( pAigCol, Ntl_ModelPoNum(pRoot) + iLatch );
-            pObjCol->pFanin0 = Aig_Not(pObjCol->pFanin0);
-            // unmark the latch output
-            pObjCol = Aig_ManPi( pAigCol, Ntl_ModelPiNum(pRoot) + iLatch );
-            assert( pObjCol->fMarkA == 1 );
-            pObjCol->fMarkA = 0;
-        }
-        iLatch++;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns AIG with WB after sequential SAT sweeping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManSsw2( Ntl_Man_t * p, Fra_Ssw_t * pPars )
-{
-    Ntl_Man_t * pNew;
-    Aig_Man_t * pAigRed, * pAigCol;
-    // collapse the AIG
-    pAigCol = Ntl_ManCollapseSeq( p, pPars->nMinDomSize, pPars->fVerbose );
-    // transform the collapsed AIG
-    pAigRed = Fra_FraigInduction( pAigCol, pPars );
-    Aig_ManStop( pAigRed );
-    pAigRed = Aig_ManDupReprBasic( pAigCol );
-    // insert the result back
-    Ntl_ManFlipEdges( p, pAigRed );
-    Ntl_ManTransferCopy( p );
-    pNew = Ntl_ManInsertAig( p, pAigRed );
-    // attach the white-boxes
-    Ntl_ManAttachWhiteBoxes( p, pAigCol, pAigRed, pNew, pPars->fVerbose );
-    Ntl_ManSweep( pNew, pPars->fVerbose );
-    // cleanup
-    Aig_ManStop( pAigRed );
-    Aig_ManStop( pAigCol );
-    return pNew;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlInsert.c b/src/aig/ntl/ntlInsert.c
deleted file mode 100644
index 8b0e3493..00000000
--- a/src/aig/ntl/ntlInsert.c
+++ /dev/null
@@ -1,614 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlInsert.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Procedures to insert mapping into a design.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlInsert.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts the given mapping into the netlist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManInsertMapping( Ntl_Man_t * p, Vec_Ptr_t * vMapping, Aig_Man_t * pAig )
-{
-    char Buffer[1000];
-    Vec_Ptr_t * vCopies;
-    Vec_Int_t * vCover;
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pNode;
-    Ntl_Net_t * pNet, * pNetCo;
-    Ntl_Lut_t * pLut;
-    int i, k, nDigits;
-    assert( Vec_PtrSize(p->vCis) == Aig_ManPiNum(pAig) );
-    assert( Vec_PtrSize(p->vCos) == Aig_ManPoNum(pAig) );
-    p = Ntl_ManStartFrom( p );
-    pRoot = Ntl_ManRootModel( p );
-    assert( Ntl_ModelNodeNum(pRoot) == 0 );
-    // map the AIG back onto the design
-    Ntl_ManForEachCiNet( p, pNet, i )
-        pNet->pCopy = Aig_ManPi( pAig, i );
-    // start mapping of AIG nodes into their copies
-    vCopies = Vec_PtrStart( Aig_ManObjNumMax(pAig) );
-    Ntl_ManForEachCiNet( p, pNet, i )
-        Vec_PtrWriteEntry( vCopies, ((Aig_Obj_t *)pNet->pCopy)->Id, pNet );
-    // create a new node for each LUT
-    vCover = Vec_IntAlloc( 1 << 16 );
-    nDigits = Aig_Base10Log( Vec_PtrSize(vMapping) );
-    Vec_PtrForEachEntry( Ntl_Lut_t *, vMapping, pLut, i )
-    {
-        pNode = Ntl_ModelCreateNode( pRoot, pLut->nFanins );
-        pNode->pSop = Kit_PlaFromTruth( p->pMemSops, pLut->pTruth, pLut->nFanins, vCover );
-        if ( !Kit_TruthIsConst0(pLut->pTruth, pLut->nFanins) && !Kit_TruthIsConst1(pLut->pTruth, pLut->nFanins) )
-        {
-            for ( k = 0; k < pLut->nFanins; k++ )
-            {
-                pNet = (Ntl_Net_t *)Vec_PtrEntry( vCopies, pLut->pFanins[k] );
-                if ( pNet == NULL )
-                {
-                    printf( "Ntl_ManInsert(): Internal error: Net not found.\n" );
-                    return 0;
-                }
-                Ntl_ObjSetFanin( pNode, pNet, k );
-            }
-        }
-        else
-            pNode->nFanins = 0;
-        sprintf( Buffer, "lut%0*d", nDigits, i );
-        if ( (pNet = Ntl_ModelFindNet( pRoot, Buffer )) )
-        {
-            printf( "Ntl_ManInsert(): Internal error: Intermediate net name is not unique.\n" );
-            return 0;
-        }
-        pNet = Ntl_ModelFindOrCreateNet( pRoot, Buffer );
-        if ( !Ntl_ModelSetNetDriver( pNode, pNet ) )
-        {
-            printf( "Ntl_ManInsert(): Internal error: Net has more than one fanin.\n" );
-            return 0;
-        }
-        Vec_PtrWriteEntry( vCopies, pLut->Id, pNet );
-    }
-    Vec_IntFree( vCover );
-    // mark CIs and outputs of the registers
-    Ntl_ManForEachCiNet( p, pNetCo, i )
-        pNetCo->fMark = 1;
-    // update the CO pointers
-    Ntl_ManForEachCoNet( p, pNetCo, i )
-    {
-        if ( pNetCo->fMark )
-            continue;
-        pNetCo->fMark = 1;
-        pNet = (Ntl_Net_t *)Vec_PtrEntry( vCopies, Aig_Regular((Aig_Obj_t *)pNetCo->pCopy)->Id );
-        pNode = Ntl_ModelCreateNode( pRoot, 1 );
-        pNode->pSop = Aig_IsComplement((Aig_Obj_t *)pNetCo->pCopy)? Ntl_ManStoreSop( p->pMemSops, "0 1\n" ) : Ntl_ManStoreSop( p->pMemSops, "1 1\n" );
-        Ntl_ObjSetFanin( pNode, pNet, 0 );
-        // update the CO driver net
-        assert( pNetCo->pDriver == NULL );
-        if ( !Ntl_ModelSetNetDriver( pNode, pNetCo ) )
-        {
-            printf( "Ntl_ManInsert(): Internal error: PO net has more than one fanin.\n" );
-            return 0;
-        }
-    }
-    Vec_PtrFree( vCopies );
-    // clean CI/CO marks
-    Ntl_ManUnmarkCiCoNets( p );
-    if ( !Ntl_ManCheck( p ) )
-        printf( "Ntl_ManInsertNtk: The check has failed for design %s.\n", p->pName );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts the given mapping into the netlist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManInsertAig( Ntl_Man_t * p, Aig_Man_t * pAig )
-{
-    char Buffer[1000];
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pNode;
-    Ntl_Net_t * pNet, * pNetCo;
-    Aig_Obj_t * pObj, * pFanin;
-    int i, nDigits, Counter;
-    assert( Vec_PtrSize(p->vCis) == Aig_ManPiNum(pAig) );
-    assert( Vec_PtrSize(p->vCos) == Aig_ManPoNum(pAig) );
-    p = Ntl_ManStartFrom( p );
-    pRoot = Ntl_ManRootModel( p );
-    assert( Ntl_ModelNodeNum(pRoot) == 0 );
-    // set the correspondence between the PI/PO nodes
-    Aig_ManCleanData( pAig );
-    Ntl_ManForEachCiNet( p, pNet, i )
-        Aig_ManPi( pAig, i )->pData = pNet;
-    // create constant node if needed
-    if ( Aig_ManConst1(pAig)->nRefs > 0 )
-    {
-        pNode = Ntl_ModelCreateNode( pRoot, 0 );
-        pNode->pSop = Ntl_ManStoreSop( p->pMemSops, " 1\n" );
-        if ( (pNet = Ntl_ModelFindNet( pRoot, "Const1" )) )
-        {
-            printf( "Ntl_ManInsertAig(): Internal error: Intermediate net name is not unique.\n" );
-            return 0;
-        }
-        pNet = Ntl_ModelFindOrCreateNet( pRoot, "Const1" );
-        if ( !Ntl_ModelSetNetDriver( pNode, pNet ) )
-        {
-            printf( "Ntl_ManInsertAig(): Internal error: Net has more than one fanin.\n" );
-            return 0;
-        }
-        Aig_ManConst1(pAig)->pData = pNet;
-    }
-    // create a new node for each LUT
-    Counter = 0;
-    nDigits = Aig_Base10Log( Aig_ManNodeNum(pAig) );
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        if ( !Aig_ObjIsNode(pObj) )
-            continue;
-        if ( Aig_ObjFanin0(pObj)->pData == NULL || Aig_ObjFanin1(pObj)->pData == NULL )
-        {
-            printf( "Ntl_ManInsertAig(): Internal error: Net not found.\n" );
-            return 0;
-        }
-        pNode = Ntl_ModelCreateNode( pRoot, 2 );
-        Ntl_ObjSetFanin( pNode, (Ntl_Net_t *)Aig_ObjFanin0(pObj)->pData, 0 );
-        Ntl_ObjSetFanin( pNode, (Ntl_Net_t *)Aig_ObjFanin1(pObj)->pData, 1 );
-        if ( Aig_ObjFaninC0(pObj) && Aig_ObjFaninC1(pObj) )
-            pNode->pSop = Ntl_ManStoreSop( p->pMemSops, "00 1\n" );
-        else if ( Aig_ObjFaninC0(pObj) && !Aig_ObjFaninC1(pObj) )
-            pNode->pSop = Ntl_ManStoreSop( p->pMemSops, "01 1\n" );
-        else if ( !Aig_ObjFaninC0(pObj) && Aig_ObjFaninC1(pObj) )
-            pNode->pSop = Ntl_ManStoreSop( p->pMemSops, "10 1\n" );
-        else // if ( Aig_ObjFaninC0(pObj) && Aig_ObjFaninC1(pObj) )
-            pNode->pSop = Ntl_ManStoreSop( p->pMemSops, "11 1\n" );
-        sprintf( Buffer, "and%0*d", nDigits, Counter++ );
-        if ( (pNet = Ntl_ModelFindNet( pRoot, Buffer )) )
-        {
-            printf( "Ntl_ManInsertAig(): Internal error: Intermediate net name is not unique.\n" );
-            return 0;
-        }
-        pNet = Ntl_ModelFindOrCreateNet( pRoot, Buffer );
-        if ( !Ntl_ModelSetNetDriver( pNode, pNet ) )
-        {
-            printf( "Ntl_ManInsertAig(): Internal error: Net has more than one fanin.\n" );
-            return 0;
-        }
-        pObj->pData = pNet;
-    }
-    // mark CIs and outputs of the registers
-    Ntl_ManForEachCiNet( p, pNetCo, i )
-        pNetCo->fMark = 1;
-    // update the CO pointers
-    Ntl_ManForEachCoNet( p, pNetCo, i )
-    {
-        if ( pNetCo->fMark )
-            continue;
-        pNetCo->fMark = 1;
-        // get the corresponding PO and its driver
-        pObj = Aig_ManPo( pAig, i );
-        pFanin = Aig_ObjFanin0( pObj );
-        // get the net driving the driver
-        pNet = (Ntl_Net_t *)pFanin->pData; 
-        pNode = Ntl_ModelCreateNode( pRoot, 1 );
-        pNode->pSop = Aig_ObjFaninC0(pObj)? Ntl_ManStoreSop( p->pMemSops, "0 1\n" ) : Ntl_ManStoreSop( p->pMemSops, "1 1\n" );
-        Ntl_ObjSetFanin( pNode, pNet, 0 );
-        // update the CO driver net
-        assert( pNetCo->pDriver == NULL );
-        if ( !Ntl_ModelSetNetDriver( pNode, pNetCo ) )
-        {
-            printf( "Ntl_ManInsertAig(): Internal error: PO net has more than one fanin.\n" );
-            return 0;
-        }
-    }
-    // clean CI/CO marks
-    Ntl_ManUnmarkCiCoNets( p );
-    if ( !Ntl_ManCheck( p ) )
-        printf( "Ntl_ManInsertAig: The check has failed for design %s.\n", p->pName );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Find drivers of the given net.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManFindDriver( Ntl_Man_t * p, char * pName )
-{
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pNode;
-    Ntl_Net_t * pNet, * pNetThis;
-    int i, k;
-    pRoot = Ntl_ManRootModel( p );
-    pNetThis = Ntl_ModelFindNet( pRoot, pName );
-    printf( "\n*** Net %d \"%s\":\n", pNetThis->NetId, pName );
-    // mark from the nodes
-    Ntl_ModelForEachPo( pRoot, pNode, i )
-        if ( pNetThis == Ntl_ObjFanin0(pNode) )
-            printf( "driven by PO %d\n", i );
-    Ntl_ModelForEachNode( pRoot, pNode, i )
-        Ntl_ObjForEachFanin( pNode, pNet, k )
-            if ( pNetThis == pNet )
-                printf( "driven by node %d with %d fanins and %d fanouts\n (%s)\n", 
-                    pNode->Id, Ntl_ObjFaninNum(pNode), Ntl_ObjFanoutNum(pNode), Ntl_ObjFanout(pNode,0)->pName );
-    Ntl_ModelForEachBox( pRoot, pNode, i )
-        Ntl_ObjForEachFanin( pNode, pNet, k )
-            if ( pNetThis == pNet )
-                printf( "driven by box %d with %d fanins and %d fanouts\n (%s)\n", 
-                    pNode->Id, Ntl_ObjFaninNum(pNode), Ntl_ObjFanoutNum(pNode), Ntl_ObjFanout(pNode,0)->pName );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts the given mapping into the netlist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManInsertNtk2( Ntl_Man_t * p, Nwk_Man_t * pNtk )
-{
-    int fWriteConstants = 1;
-    char Buffer[1000]; 
-    Vec_Ptr_t * vObjs;
-    Vec_Int_t * vTruth;
-    Vec_Int_t * vCover;
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pNode;
-    Ntl_Net_t * pNet, * pNetCo;
-    Nwk_Obj_t * pObj, * pFanin;
-    int i, k, nDigits;
-    unsigned * pTruth;
-    assert( Vec_PtrSize(p->vCis) == Nwk_ManCiNum(pNtk) );
-    assert( Vec_PtrSize(p->vCos) == Nwk_ManCoNum(pNtk) );
-    p = Ntl_ManStartFrom( p );
-    pRoot = Ntl_ManRootModel( p );
-    assert( Ntl_ModelNodeNum(pRoot) == 0 );
-    // set the correspondence between the PI/PO nodes
-    Ntl_ManForEachCiNet( p, pNet, i )
-        Nwk_ManCi( pNtk, i )->pCopy = pNet;
-    // create a new node for each LUT
-    vTruth  = Vec_IntAlloc( 1 << 16 );
-    vCover  = Vec_IntAlloc( 1 << 16 );
-    nDigits = Aig_Base10Log( Nwk_ManNodeNum(pNtk) );
-    // go through the nodes in the topological order
-    vObjs = Nwk_ManDfs( pNtk );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vObjs, pObj, i )
-    {
-        if ( !Nwk_ObjIsNode(pObj) )
-            continue;
-/*
-        if ( fWriteConstants && Nwk_ObjFaninNum(pObj) == 0 )
-        {
-            pObj->pCopy = NULL;
-            continue;
-        }
-*/
-        // skip constant drivers if they only drive COs
-        if ( fWriteConstants && Nwk_ObjFaninNum(pObj) == 0 )
-        {
-            Nwk_Obj_t * pFanout;
-            int i;
-            Nwk_ObjForEachFanout( pObj, pFanout, i )
-                if ( Nwk_ObjIsNode(pFanout) )
-                    break;
-            if ( i == Nwk_ObjFanoutNum(pObj) )
-            {
-                pObj->pCopy = NULL;
-                continue;
-            }
-        }
-
-        pNode = Ntl_ModelCreateNode( pRoot, Nwk_ObjFaninNum(pObj) );
-        pTruth = Hop_ManConvertAigToTruth( pNtk->pManHop, Hop_Regular(pObj->pFunc), Nwk_ObjFaninNum(pObj), vTruth, 0 );
-        if ( Hop_IsComplement(pObj->pFunc) )
-            Kit_TruthNot( pTruth, pTruth, Nwk_ObjFaninNum(pObj) );
-        if ( !Kit_TruthIsConst0(pTruth, Nwk_ObjFaninNum(pObj)) && !Kit_TruthIsConst1(pTruth, Nwk_ObjFaninNum(pObj)) )
-        {
-            Nwk_ObjForEachFanin( pObj, pFanin, k )
-            {
-                pNet = (Ntl_Net_t *)pFanin->pCopy;
-                if ( pNet == NULL )
-                {
-                    printf( "Ntl_ManInsertNtk(): Internal error: Net not found.\n" );
-                    return 0;
-                }
-                Ntl_ObjSetFanin( pNode, pNet, k );
-            }
-        }
-        else if ( Kit_TruthIsConst0(pTruth, Nwk_ObjFaninNum(pObj)) )
-        {
-            pObj->pFunc = Hop_ManConst0(pNtk->pManHop);
-            pNode->nFanins = 0;
-        }
-        else if ( Kit_TruthIsConst1(pTruth, Nwk_ObjFaninNum(pObj)) )
-        {
-            pObj->pFunc = Hop_ManConst1(pNtk->pManHop);
-            pNode->nFanins = 0;
-        }
-        pNode->pSop = Kit_PlaFromTruth( p->pMemSops, pTruth, Nwk_ObjFaninNum(pObj), vCover );
-        sprintf( Buffer, "lut%0*d", nDigits, i );
-        if ( (pNet = Ntl_ModelFindNet( pRoot, Buffer )) )
-        {
-            printf( "Ntl_ManInsertNtk(): Internal error: Intermediate net name is not unique.\n" );
-            return 0;
-        }
-        pNet = Ntl_ModelFindOrCreateNet( pRoot, Buffer );
-        if ( !Ntl_ModelSetNetDriver( pNode, pNet ) )
-        {
-            printf( "Ntl_ManInsertNtk(): Internal error: Net has more than one fanin.\n" );
-            return 0;
-        }
-        pObj->pCopy = pNet;
-    }
-    Vec_PtrFree( vObjs );
-    Vec_IntFree( vCover );
-    Vec_IntFree( vTruth );
-    // mark the nets driving special boxes
-    if ( p->pNalR )
-        p->pNalR( p );
-    // mark CIs and outputs of the registers
-    Ntl_ManForEachCiNet( p, pNetCo, i )
-        pNetCo->fMark = 1;
-    // update the CO pointers
-    Ntl_ManForEachCoNet( p, pNetCo, i )
-    {
-        if ( pNetCo->fMark )
-            continue; 
-        pNetCo->fMark = 1;
-        // get the corresponding PO and its driver
-        pObj = Nwk_ManCo( pNtk, i );
-        pFanin = Nwk_ObjFanin0( pObj );
-        // get the net driving this PO
-        pNet = (Ntl_Net_t *)pFanin->pCopy; 
-        if ( pNet == NULL ) // constant net
-        {
-            assert( fWriteConstants );
-            pNode = Ntl_ModelCreateNode( pRoot, 0 );
-            pNode->pSop = pObj->fInvert? Ntl_ManStoreSop( p->pMemSops, " 0\n" ) : Ntl_ManStoreSop( p->pMemSops, " 1\n" );
-        }
-        else 
-        if ( Nwk_ObjFanoutNum(pFanin) == 1 && Ntl_ObjIsNode(pNet->pDriver) && !pNet->fMark2 )
-        {
-            pNode = pNet->pDriver;
-            if ( !Ntl_ModelClearNetDriver( pNode, pNet ) )
-            {
-                printf( "Ntl_ManInsertNtk(): Internal error! Net already has no driver.\n" );
-                return NULL;
-            }
-            // remove this net 
-            Ntl_ModelDeleteNet( pRoot, pNet );
-            Vec_PtrWriteEntry( pRoot->vNets, pNet->NetId, NULL );
-            // update node's function
-            if ( pObj->fInvert )
-                Kit_PlaComplement( pNode->pSop );
-        }
-        else
-        {
-/*
-            if ( fWriteConstants && Ntl_ObjFaninNum(pNet->pDriver) == 0 )
-            {
-                pNode = Ntl_ModelCreateNode( pRoot, 0 );
-                pNode->pSop = pObj->fInvert? Ntl_ManStoreSop( p->pMemSops, " 0\n" ) : Ntl_ManStoreSop( p->pMemSops, " 1\n" );
-            }
-            else
-*/
-            {
-//                assert( Ntl_ObjFaninNum(pNet->pDriver) != 0 );
-                pNode = Ntl_ModelCreateNode( pRoot, 1 );
-                pNode->pSop = pObj->fInvert? Ntl_ManStoreSop( p->pMemSops, "0 1\n" ) : Ntl_ManStoreSop( p->pMemSops, "1 1\n" );
-                Ntl_ObjSetFanin( pNode, pNet, 0 );
-            }
-        }
-        // update the CO driver net
-        assert( pNetCo->pDriver == NULL );
-        if ( !Ntl_ModelSetNetDriver( pNode, pNetCo ) )
-        {
-            printf( "Ntl_ManInsertNtk(): Internal error: PO net has more than one fanin.\n" );
-            return NULL;
-        }
-    }
-    // clean CI/CO marks
-    Ntl_ManUnmarkCiCoNets( p );
-    if ( !Ntl_ManCheck( p ) )
-    {
-        printf( "Ntl_ManInsertNtk: The check has failed for design %s.\n", p->pName );
-        return NULL;
-    }
-    return p;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts the given mapping into the netlist.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManInsertNtk( Ntl_Man_t * p, Nwk_Man_t * pNtk )
-{
-    char Buffer[1000]; 
-    Vec_Ptr_t * vObjs;
-    Vec_Int_t * vTruth;
-    Vec_Int_t * vCover;
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pNode;
-    Ntl_Net_t * pNet, * pNetCo;
-    Nwk_Obj_t * pObj, * pFanin;
-    int i, k, nDigits;
-    unsigned * pTruth;
-    assert( Vec_PtrSize(p->vCis) == Nwk_ManCiNum(pNtk) );
-    assert( Vec_PtrSize(p->vCos) == Nwk_ManCoNum(pNtk) );
-    p = Ntl_ManStartFrom( p );
-    pRoot = Ntl_ManRootModel( p );
-    assert( Ntl_ModelNodeNum(pRoot) == 0 );
-    // set the correspondence between the PI/PO nodes
-    Ntl_ManForEachCiNet( p, pNet, i )
-        Nwk_ManCi( pNtk, i )->pCopy = pNet;
-    // create a new node for each LUT
-    vTruth  = Vec_IntAlloc( 1 << 16 );
-    vCover  = Vec_IntAlloc( 1 << 16 );
-    nDigits = Aig_Base10Log( Nwk_ManNodeNum(pNtk) );
-    // go through the nodes in the topological order
-    vObjs = Nwk_ManDfs( pNtk );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vObjs, pObj, i )
-    {
-        if ( !Nwk_ObjIsNode(pObj) )
-            continue;
-        pNode = Ntl_ModelCreateNode( pRoot, Nwk_ObjFaninNum(pObj) );
-        pTruth = Hop_ManConvertAigToTruth( pNtk->pManHop, Hop_Regular(pObj->pFunc), Nwk_ObjFaninNum(pObj), vTruth, 0 );
-        if ( Hop_IsComplement(pObj->pFunc) )
-            Kit_TruthNot( pTruth, pTruth, Nwk_ObjFaninNum(pObj) );
-        if ( !Kit_TruthIsConst0(pTruth, Nwk_ObjFaninNum(pObj)) && !Kit_TruthIsConst1(pTruth, Nwk_ObjFaninNum(pObj)) )
-        {
-            Nwk_ObjForEachFanin( pObj, pFanin, k )
-            {
-                pNet = (Ntl_Net_t *)pFanin->pCopy;
-                if ( pNet == NULL )
-                {
-                    printf( "Ntl_ManInsertNtk(): Internal error: Net not found.\n" );
-                    return 0;
-                }
-                Ntl_ObjSetFanin( pNode, pNet, k );
-            }
-        }
-        else if ( Kit_TruthIsConst0(pTruth, Nwk_ObjFaninNum(pObj)) )
-        {
-            pObj->pFunc = Hop_ManConst0(pNtk->pManHop);
-            pNode->nFanins = 0;
-        }
-        else if ( Kit_TruthIsConst1(pTruth, Nwk_ObjFaninNum(pObj)) )
-        {
-            pObj->pFunc = Hop_ManConst1(pNtk->pManHop);
-            pNode->nFanins = 0;
-        }
-        pNode->pSop = Kit_PlaFromTruth( p->pMemSops, pTruth, Nwk_ObjFaninNum(pObj), vCover );
-        sprintf( Buffer, "lut%0*d", nDigits, i );
-        if ( (pNet = Ntl_ModelFindNet( pRoot, Buffer )) )
-        {
-            printf( "Ntl_ManInsertNtk(): Internal error: Intermediate net name is not unique.\n" );
-            return 0;
-        }
-        pNet = Ntl_ModelFindOrCreateNet( pRoot, Buffer );
-        if ( !Ntl_ModelSetNetDriver( pNode, pNet ) )
-        {
-            printf( "Ntl_ManInsertNtk(): Internal error: Net has more than one fanin.\n" );
-            return 0;
-        }
-        pObj->pCopy = pNet;
-    }
-    Vec_PtrFree( vObjs );
-    Vec_IntFree( vCover );
-    Vec_IntFree( vTruth );
-    // mark CIs and outputs of the registers
-    Ntl_ManForEachCiNet( p, pNetCo, i )
-        pNetCo->fMark = 1;
-    // update the CO pointers
-    Ntl_ManForEachCoNet( p, pNetCo, i )
-    {
-        if ( pNetCo->fMark )
-            continue;
-        pNetCo->fMark = 1;
-        // get the corresponding PO and its driver
-        pObj = Nwk_ManCo( pNtk, i );
-        pFanin = Nwk_ObjFanin0( pObj );
-        // get the net driving this PO
-        pNet = (Ntl_Net_t *)pFanin->pCopy; 
-        if ( Nwk_ObjFanoutNum(pFanin) == 1 && Ntl_ObjIsNode(pNet->pDriver) )
-        {
-            pNode = pNet->pDriver;
-            if ( !Ntl_ModelClearNetDriver( pNode, pNet ) )
-            {
-                printf( "Ntl_ManInsertNtk(): Internal error! Net already has no driver.\n" );
-                return NULL;
-            }
-            // remove this net 
-            Ntl_ModelDeleteNet( pRoot, pNet );
-            Vec_PtrWriteEntry( pRoot->vNets, pNet->NetId, NULL );
-            // update node's function
-            if ( pObj->fInvert )
-                Kit_PlaComplement( pNode->pSop );
-        }
-        else
-        {
-            pNode = Ntl_ModelCreateNode( pRoot, 1 );
-            pNode->pSop = pObj->fInvert? Ntl_ManStoreSop( p->pMemSops, "0 1\n" ) : Ntl_ManStoreSop( p->pMemSops, "1 1\n" );
-            Ntl_ObjSetFanin( pNode, pNet, 0 );
-        }
-        // update the CO driver net
-        assert( pNetCo->pDriver == NULL );
-        if ( !Ntl_ModelSetNetDriver( pNode, pNetCo ) )
-        {
-            printf( "Ntl_ManInsertNtk(): Internal error: PO net has more than one fanin.\n" );
-            return NULL;
-        }
-    }
-    // clean CI/CO marks
-    Ntl_ManUnmarkCiCoNets( p );
-    if ( !Ntl_ManCheck( p ) )
-    {
-        printf( "Ntl_ManInsertNtk: The check has failed for design %s.\n", p->pName );
-        return NULL;
-    }
-    return p;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlMan.c b/src/aig/ntl/ntlMan.c
deleted file mode 100644
index 45fb7226..00000000
--- a/src/aig/ntl/ntlMan.c
+++ /dev/null
@@ -1,1068 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Netlist manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates the netlist manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManAlloc()
-{
-    Ntl_Man_t * p;
-    // start the manager
-    p = ABC_ALLOC( Ntl_Man_t, 1 );
-    memset( p, 0, sizeof(Ntl_Man_t) );
-    p->vModels = Vec_PtrAlloc( 1000 );
-    p->vCis = Vec_PtrAlloc( 1000 );
-    p->vCos = Vec_PtrAlloc( 1000 );
-    p->vVisNodes = Vec_PtrAlloc( 1000 );
-    p->vBox1Cios = Vec_IntAlloc( 1000 );
-    p->vRegClasses = Vec_IntAlloc( 1000 );
-    p->vRstClasses = Vec_IntAlloc( 1000 );
-    // start the manager
-    p->pMemObjs = Aig_MmFlexStart();
-    p->pMemSops = Aig_MmFlexStart();
-    // allocate model table
-    p->nModTableSize = Aig_PrimeCudd( 100 );
-    p->pModTable = ABC_ALLOC( Ntl_Mod_t *, p->nModTableSize );
-    memset( p->pModTable, 0, sizeof(Ntl_Mod_t *) * p->nModTableSize );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Cleanups extended representation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManCleanup( Ntl_Man_t * p )
-{
-    if ( p->pAig )
-    {
-        Aig_ManStop( p->pAig );
-        p->pAig = NULL;
-    }
-    if ( p->pManTime )
-    {
-        Tim_ManStop( p->pManTime );
-        p->pManTime = NULL;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates the design without the nodes of the root model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManStartFrom( Ntl_Man_t * pOld )
-{
-    Ntl_Man_t * pNew;
-    Ntl_Mod_t * pModel;
-    Ntl_Obj_t * pBox;
-    Ntl_Net_t * pNet;
-    int i, k;
-    pNew = Ntl_ManAlloc();
-    pNew->pName = Ntl_ManStoreFileName( pNew, pOld->pName );
-    pNew->pSpec = Ntl_ManStoreName( pNew, pOld->pName );
-    Vec_PtrForEachEntry( Ntl_Mod_t *, pOld->vModels, pModel, i )
-    {
-        if ( i == 0 )
-        {
-            Ntl_ManMarkCiCoNets( pOld );
-            pModel->pCopy = Ntl_ModelStartFrom( pNew, pModel );
-            Ntl_ManUnmarkCiCoNets( pOld );
-        }
-        else
-            pModel->pCopy = Ntl_ModelDup( pNew, pModel );
-    }
-    Vec_PtrForEachEntry( Ntl_Mod_t *, pOld->vModels, pModel, i )
-        Ntl_ModelForEachBox( pModel, pBox, k )
-        {
-            ((Ntl_Obj_t *)pBox->pCopy)->pImplem = (Ntl_Mod_t *)pBox->pImplem->pCopy;
-            ((Ntl_Obj_t *)pBox->pCopy)->iTemp = pBox->iTemp;
-//            ((Ntl_Obj_t *)pBox->pCopy)->Reset = pBox->Reset;
-        }
-    Ntl_ManForEachCiNet( pOld, pNet, i )
-        Vec_PtrPush( pNew->vCis, pNet->pCopy );
-    Ntl_ManForEachCoNet( pOld, pNet, i )
-        Vec_PtrPush( pNew->vCos, pNet->pCopy );
-    if ( pOld->pManTime )
-        pNew->pManTime = Tim_ManDup( pOld->pManTime, 0 );
-    if ( pOld->pNal )
-        pOld->pNalD( pOld, pNew );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates the design.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManDup( Ntl_Man_t * pOld )
-{
-    Ntl_Man_t * pNew;
-    Ntl_Mod_t * pModel;
-    Ntl_Obj_t * pBox;
-    Ntl_Net_t * pNet;
-    int i, k;
-    pNew = Ntl_ManAlloc();
-    pNew->pName = Ntl_ManStoreFileName( pNew, pOld->pName );
-    pNew->pSpec = Ntl_ManStoreName( pNew, pOld->pName );
-    Vec_PtrForEachEntry( Ntl_Mod_t *, pOld->vModels, pModel, i )
-        pModel->pCopy = Ntl_ModelDup( pNew, pModel );
-    Vec_PtrForEachEntry( Ntl_Mod_t *, pOld->vModels, pModel, i )
-        Ntl_ModelForEachBox( pModel, pBox, k )
-            ((Ntl_Obj_t *)pBox->pCopy)->pImplem = (Ntl_Mod_t *)pBox->pImplem->pCopy;
-    Ntl_ManForEachCiNet( pOld, pNet, i )
-        Vec_PtrPush( pNew->vCis, pNet->pCopy );
-    Ntl_ManForEachCoNet( pOld, pNet, i )
-        Vec_PtrPush( pNew->vCos, pNet->pCopy );
-    if ( pOld->pManTime )
-        pNew->pManTime = Tim_ManDup( pOld->pManTime, 0 );
-    if ( !Ntl_ManCheck( pNew ) )
-        printf( "Ntl_ManDup: The check has failed for design %s.\n", pNew->pName );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates the design.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManDupCollapseLuts( Ntl_Man_t * pOld )
-{
-    Ntl_Man_t * pNew;
-    Ntl_Mod_t * pModel;
-    Ntl_Obj_t * pBox;
-//    Ntl_Net_t * pNet;
-    int i, k;
-    pNew = Ntl_ManAlloc();
-    pNew->pName = Ntl_ManStoreFileName( pNew, pOld->pName );
-    pNew->pSpec = Ntl_ManStoreName( pNew, pOld->pName );
-    Vec_PtrForEachEntry( Ntl_Mod_t *, pOld->vModels, pModel, i )
-        pModel->pCopy = Ntl_ModelDupCollapseLuts( pNew, pModel );
-    Vec_PtrForEachEntry( Ntl_Mod_t *, pOld->vModels, pModel, i )
-        Ntl_ModelForEachBox( pModel, pBox, k )
-            if ( pBox->pCopy )
-                ((Ntl_Obj_t *)pBox->pCopy)->pImplem = (Ntl_Mod_t *)pBox->pImplem->pCopy;
-//    Ntl_ManForEachCiNet( pOld, pNet, i )
-//        Vec_PtrPush( pNew->vCis, pNet->pCopy );
-//    Ntl_ManForEachCoNet( pOld, pNet, i )
-//        Vec_PtrPush( pNew->vCos, pNet->pCopy );
-//    if ( pOld->pManTime )
-//        pNew->pManTime = Tim_ManDup( pOld->pManTime, 0 );
-    if ( !Ntl_ManCheck( pNew ) )
-        printf( "Ntl_ManDup: The check has failed for design %s.\n", pNew->pName );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocates the netlist manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManFree( Ntl_Man_t * p )
-{
-    if ( p->vModels )
-    {
-        Ntl_Mod_t * pModel;
-        int i;
-        Ntl_ManForEachModel( p, pModel, i )
-            Ntl_ModelFree( pModel );
-        Vec_PtrFree( p->vModels );
-    }
-    if ( p->vCis )       Vec_PtrFree( p->vCis );
-    if ( p->vCos )       Vec_PtrFree( p->vCos );
-    if ( p->vVisNodes )  Vec_PtrFree( p->vVisNodes );
-    if ( p->vRegClasses) Vec_IntFree( p->vRegClasses );
-    if ( p->vRstClasses) Vec_IntFree( p->vRstClasses );
-    if ( p->vBox1Cios )  Vec_IntFree( p->vBox1Cios );
-    if ( p->pMemObjs )   Aig_MmFlexStop( p->pMemObjs, 0 );
-    if ( p->pMemSops )   Aig_MmFlexStop( p->pMemSops, 0 );
-    if ( p->pAig )       Aig_ManStop( p->pAig );
-    if ( p->pManTime )   Tim_ManStop( p->pManTime );
-    if ( p->pNal )       p->pNalF( p->pNal );
-    ABC_FREE( p->pModTable );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManPrintStats( Ntl_Man_t * p )
-{
-    Ntl_Mod_t * pRoot;
-    pRoot = Ntl_ManRootModel( p );
-    printf( "%-15s : ",        p->pName );
-    printf( "pi = %5d  ",      Ntl_ModelPiNum(pRoot) );
-    printf( "po = %5d  ",      Ntl_ModelPoNum(pRoot) );
-    printf( "lat = %5d  ",     Ntl_ModelLatchNum(pRoot) );
-    printf( "node = %5d  ",    Ntl_ModelNodeNum(pRoot) );
-    printf( "\n    " );
-    printf( "inv/buf = %5d  ", Ntl_ModelLut1Num(pRoot) );
-    printf( "box = %4d  ",     Ntl_ModelBoxNum(pRoot) );
-    printf( "mod = %3d  ",     Vec_PtrSize(p->vModels) );
-    printf( "net = %d",        Ntl_ModelCountNets(pRoot) );
-    printf( "\n" );
-    fflush( stdout );
-    assert( Ntl_ModelLut1Num(pRoot) == Ntl_ModelCountLut1(pRoot) );
-    Ntl_ManPrintTypes( p );
-    fflush( stdout );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManPrintStatsShort( Ntl_Man_t * p, Aig_Man_t * pAig, Nwk_Man_t * pNtk )
-{
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pObj;
-    int i, Counter = 0;
-    pRoot = Ntl_ManRootModel( p );
-    Ntl_ModelForEachBox( pRoot, pObj, i )
-        if ( strcmp(pObj->pImplem->pName, "dff") == 0 )
-            Counter++;
-    if ( Counter == 0 )
-    {
-        Ntl_ModelForEachBox( pRoot, pObj, i )
-            Counter += (pObj->pImplem->attrWhite && !pObj->pImplem->attrComb);
-    }
-    printf( "%-15s : ",  p->pName );
-    printf( "pi =%5d  ", Ntl_ModelPiNum(pRoot) );
-    printf( "po =%5d  ", Ntl_ModelPoNum(pRoot) );
-    printf( "ff =%5d  ", Counter );
-    printf( "box =%6d  ", Ntl_ModelBoxNum(pRoot) );
-    if ( pAig != NULL )
-    {
-        Counter = Aig_ManChoiceNum( pAig );
-        if ( Counter )
-            printf( "cho =%7d  ", Counter );
-        else
-            printf( "aig =%7d  ", Aig_ManNodeNum(pAig) );
-    }
-    if ( pNtk == NULL )
-        printf( "No mapping.\n" );
-    else
-    {
-        printf( "lut =%5d  ",  Nwk_ManNodeNum(pNtk) );
-        printf( "lev =%3d  ",  Nwk_ManLevel(pNtk) );
-//        printf( "del =%5.2f ", Nwk_ManDelayTraceLut(pNtk) );
-        printf( "\n" );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManStatsRegs( Ntl_Man_t * p )
-{
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pObj;
-    int i, Counter = 0;
-    pRoot = Ntl_ManRootModel( p );
-    Ntl_ModelForEachBox( pRoot, pObj, i )
-        if ( strcmp(pObj->pImplem->pName, "m_dff") == 0 )
-            Counter++;
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManStatsLuts( Ntl_Man_t * p )
-{
-    return Ntl_ModelLut1Num( Ntl_ManRootModel(p) ) + Ntl_ModelNodeNum( Ntl_ManRootModel(p) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManStatsLuts( Nwk_Man_t * pNtk )
-{
-    return pNtk ? Nwk_ManNodeNum(pNtk) : -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManStatsLevs( Nwk_Man_t * pNtk )
-{
-    return pNtk ? Nwk_ManLevel(pNtk) : -1;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManPrintStatsUpdate( Ntl_Man_t * p, Aig_Man_t * pAig, Nwk_Man_t * pNtk,
-     int nRegInit, int nLutInit, int nLevInit, int Time )
-{
-    printf( "FF =%7d (%5.1f%%)  ",  Ntl_ManStatsRegs(p),    nRegInit ? (100.0*(nRegInit-Ntl_ManStatsRegs(p))/nRegInit) : 0.0 );
-    if ( pNtk == NULL )
-        printf( "Mapping is not available.                    " );
-    else
-    {
-        printf( "Lut =%7d (%5.1f%%)  ", Ntl_ManStatsLuts(p), nLutInit ? (100.0*(nLutInit-Ntl_ManStatsLuts(p))/nLutInit) : 0.0 );
-        printf( "Lev =%4d (%5.1f%%)    ", Nwk_ManStatsLevs(pNtk), nLevInit ? (100.0*(nLevInit-Nwk_ManStatsLevs(pNtk))/nLevInit) : 0.0 );
-    }
-    ABC_PRT( "Time", clock() - Time );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocates the netlist manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Tim_Man_t * Ntl_ManReadTimeMan( Ntl_Man_t * p )
-{
-    return p->pManTime;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Saves the model type.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManSaveBoxType( Ntl_Obj_t * pObj )
-{
-    Ntl_Mod_t * pModel = pObj->pImplem;
-    int Number = 0;
-    assert( Ntl_ObjIsBox(pObj) );
-    Number |= (pModel->attrWhite   << 0);
-    Number |= (pModel->attrBox     << 1);
-    Number |= (pModel->attrComb    << 2);
-    Number |= (pModel->attrKeep    << 3);
-    Number |= (pModel->attrNoMerge << 4);
-    pModel->pMan->BoxTypes[Number]++;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Saves the model type.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManPrintTypes( Ntl_Man_t * p )
-{
-    Vec_Ptr_t * vFlops;
-    Ntl_Net_t * pNet;
-    Ntl_Mod_t * pModel;
-    Ntl_Obj_t * pObj;
-    int i;
-    pModel = Ntl_ManRootModel( p );
-    if ( Ntl_ModelBoxNum(pModel) == 0 )
-        return;
-    printf( "BOX STATISTICS:\n" );
-    Ntl_ModelForEachBox( pModel, pObj, i )
-        Ntl_ManSaveBoxType( pObj );
-    for ( i = 0; i < 32; i++ )
-    {
-        if ( !p->BoxTypes[i] )
-            continue;
-        printf( "Type %2d  Num = %7d :", i, p->BoxTypes[i] );
-        printf( " %s", ((i &  1) > 0)? "white   ": "black   " );
-        printf( " %s", ((i &  2) > 0)? "box     ": "logic   " );
-        printf( " %s", ((i &  4) > 0)? "comb    ": "seq     " );
-        printf( " %s", ((i &  8) > 0)? "keep    ": "sweep   " );
-        printf( " %s", ((i & 16) > 0)? "no_merge": "merge   " );
-        printf( "\n" );
-    }
-    printf( "MODEL STATISTICS:\n" );
-    Ntl_ManForEachModel( p, pModel, i )
-        if ( i ) printf( "Model %2d :  Name = %10s  Used = %6d.\n", i, pModel->pName, pModel->nUsed );
-    for ( i = 0; i < 32; i++ )
-        p->BoxTypes[i] = 0;
-    pModel = Ntl_ManRootModel( p );
-    if ( pModel->vClockFlops )
-    {
-        printf( "CLOCK STATISTICS:\n" );
-        Vec_VecForEachLevel( pModel->vClockFlops, vFlops, i )
-        {
-            pNet = (Ntl_Net_t *)Vec_PtrEntry( pModel->vClocks, i );
-            printf( "Clock %2d :  Name = %30s   Flops = %6d.\n", i+1, pNet->pName, Vec_PtrSize(vFlops) );
-        }
-    }
-    printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Procedure used for sorting the nodes in decreasing order of levels.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManCompareClockClasses( Vec_Ptr_t ** pp1, Vec_Ptr_t ** pp2 )
-{
-    int Diff = Vec_PtrSize(*pp1) - Vec_PtrSize(*pp2);
-    if ( Diff > 0 )
-        return -1;
-    if ( Diff < 0 ) 
-        return 1;
-    return 0; 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Saves the model type.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManPrintClocks( Ntl_Man_t * p )
-{
-    Vec_Ptr_t * vFlops;
-    Ntl_Net_t * pNet;
-    Ntl_Mod_t * pModel;
-    int i;
-    pModel = Ntl_ManRootModel( p );
-    if ( Ntl_ModelBoxNum(pModel) == 0 )
-        return;
-    if ( pModel->vClockFlops )
-    {
-        printf( "CLOCK STATISTICS:\n" );
-        Vec_VecForEachLevel( pModel->vClockFlops, vFlops, i )
-        {
-            pNet = (Ntl_Net_t *)Vec_PtrEntry( pModel->vClocks, i );
-            printf( "Clock %2d :  Name = %30s   Flops = %6d.\n", i+1, pNet->pName, Vec_PtrSize(vFlops) );
-            if ( i == 10 )
-            {
-                printf( "Skipping... (the total is %d)\n", Vec_VecSize(pModel->vClockFlops) );
-                break;
-            }
-        }
-    }
-//    printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Saves the model type.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManPrintResets( Ntl_Man_t * p )
-{
-    Vec_Ptr_t * vFlops;
-    Ntl_Net_t * pNet;
-    Ntl_Mod_t * pModel;
-    int i;
-    pModel = Ntl_ManRootModel( p );
-    if ( Ntl_ModelBoxNum(pModel) == 0 )
-        return;
-    if ( pModel->vResetFlops )
-    {
-        printf( "RESET STATISTICS:\n" );
-        Vec_VecForEachLevel( pModel->vResetFlops, vFlops, i )
-        {
-            pNet = (Ntl_Net_t *)Vec_PtrEntry( pModel->vResets, i );
-            printf( "Reset %2d :  Name = %30s   Flops = %6d.\n", i+1, pNet->pName, Vec_PtrSize(vFlops) );
-            if ( i == 10 )
-            {
-                printf( "Skipping... (the total is %d)\n", Vec_VecSize(pModel->vResetFlops) );
-                break;
-            }
-        }
-    }
-//    printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates the model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Mod_t * Ntl_ModelAlloc( Ntl_Man_t * pMan, char * pName )
-{
-    Ntl_Mod_t * p;
-    // start the manager
-    p = ABC_ALLOC( Ntl_Mod_t, 1 );
-    memset( p, 0, sizeof(Ntl_Mod_t) );
-    p->attrBox     = 1;
-    p->attrComb    = 1;
-    p->attrWhite   = 1;
-    p->attrKeep    = 0;
-    p->attrNoMerge = 0;
-    p->pMan  = pMan;
-    p->pName = Ntl_ManStoreName( p->pMan, pName );
-    p->vObjs = Vec_PtrAlloc( 100 );
-    p->vPis  = Vec_PtrAlloc( 10 );
-    p->vPos  = Vec_PtrAlloc( 10 ); 
-    p->vNets = Vec_PtrAlloc( 100 ); 
-    // start the table
-    p->nTableSize = Aig_PrimeCudd( 100 );
-    p->pTable = ABC_ALLOC( Ntl_Net_t *, p->nTableSize );
-    memset( p->pTable, 0, sizeof(Ntl_Net_t *) * p->nTableSize );
-    // add model to the table
-    if ( !Ntl_ManAddModel( pMan, p ) )
-    {
-        Ntl_ModelFree( p );
-        return NULL;
-    }
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates the model without nodes but with CI/CO nets.]
-
-  Description [The CI/CO nets of the old model should be marked before 
-  calling this procedure.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Mod_t * Ntl_ModelStartFrom( Ntl_Man_t * pManNew, Ntl_Mod_t * pModelOld )
-{
-    Ntl_Mod_t * pModelNew;
-    Ntl_Net_t * pNet;
-    Ntl_Obj_t * pObj;
-    int i, k;
-    pModelNew = Ntl_ModelAlloc( pManNew, pModelOld->pName );
-    pModelNew->attrWhite   = pModelOld->attrWhite;
-    pModelNew->attrBox       = pModelOld->attrBox;
-    pModelNew->attrComb       = pModelOld->attrComb;
-    pModelNew->attrKeep       = pModelOld->attrKeep;
-    pModelNew->attrNoMerge = pModelOld->attrNoMerge;
-    Ntl_ModelForEachObj( pModelOld, pObj, i )
-    {
-        if ( Ntl_ObjIsNode(pObj) )
-            pObj->pCopy = NULL;
-        else
-            pObj->pCopy = Ntl_ModelDupObj( pModelNew, pObj );
-    }
-    Ntl_ModelForEachNet( pModelOld, pNet, i )
-    {
-        if ( pNet->pDriver == NULL )
-            pNet->pCopy = Ntl_ModelFindOrCreateNet( pModelNew, pNet->pName );
-        else if ( pNet->fMark )
-        {
-            pNet->pCopy = Ntl_ModelFindOrCreateNet( pModelNew, pNet->pName );
-            ((Ntl_Net_t *)pNet->pCopy)->pDriver = (Ntl_Obj_t *)pNet->pDriver->pCopy;
-        }
-        else
-            pNet->pCopy = NULL;
-        if ( pNet->pCopy )
-            ((Ntl_Net_t *)pNet->pCopy)->fFixed = pNet->fFixed;
-    }
-    Ntl_ModelForEachObj( pModelOld, pObj, i )
-    {
-        if ( Ntl_ObjIsNode(pObj) )
-            continue;
-        Ntl_ObjForEachFanin( pObj, pNet, k )
-            if ( pNet->pCopy != NULL )
-                Ntl_ObjSetFanin( (Ntl_Obj_t *)pObj->pCopy, (Ntl_Net_t *)pNet->pCopy, k );
-        Ntl_ObjForEachFanout( pObj, pNet, k )
-            if ( pNet->pCopy != NULL )
-                Ntl_ObjSetFanout( (Ntl_Obj_t *)pObj->pCopy, (Ntl_Net_t *)pNet->pCopy, k );
-        if ( Ntl_ObjIsLatch(pObj) )
-        {
-            ((Ntl_Obj_t *)pObj->pCopy)->LatchId = pObj->LatchId;
-            ((Ntl_Obj_t *)pObj->pCopy)->pClock = (Ntl_Net_t *)pObj->pClock->pCopy;
-        }
-    }
-    pModelNew->vDelays = pModelOld->vDelays? Vec_IntDup( pModelOld->vDelays ) : NULL;
-    pModelNew->vTimeInputs = pModelOld->vTimeInputs? Vec_IntDup( pModelOld->vTimeInputs ) : NULL;
-    pModelNew->vTimeOutputs = pModelOld->vTimeOutputs? Vec_IntDup( pModelOld->vTimeOutputs ) : NULL;
-    return pModelNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates the model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Mod_t * Ntl_ModelDup( Ntl_Man_t * pManNew, Ntl_Mod_t * pModelOld )
-{
-    Ntl_Mod_t * pModelNew;
-    Ntl_Net_t * pNet;
-    Ntl_Obj_t * pObj;
-    int i, k;
-    pModelNew = Ntl_ModelAlloc( pManNew, pModelOld->pName );
-    pModelNew->attrWhite   = pModelOld->attrWhite;
-    pModelNew->attrBox       = pModelOld->attrBox;
-    pModelNew->attrComb       = pModelOld->attrComb;
-    pModelNew->attrKeep       = pModelOld->attrKeep;
-    pModelNew->attrNoMerge = pModelOld->attrNoMerge;
-    Ntl_ModelForEachObj( pModelOld, pObj, i )
-        pObj->pCopy = Ntl_ModelDupObj( pModelNew, pObj );
-    Ntl_ModelForEachNet( pModelOld, pNet, i )
-    {
-        pNet->pCopy = Ntl_ModelFindOrCreateNet( pModelNew, pNet->pName );
-        ((Ntl_Net_t *)pNet->pCopy)->fFixed = pNet->fFixed;
-        if ( pNet->pDriver == NULL )
-        {
-            assert( !pModelOld->attrWhite );
-            continue;
-        }
-        ((Ntl_Net_t *)pNet->pCopy)->pDriver = (Ntl_Obj_t *)pNet->pDriver->pCopy;
-        assert( pNet->pDriver->pCopy != NULL );
-    }
-    Ntl_ModelForEachObj( pModelOld, pObj, i )
-    {
-        Ntl_ObjForEachFanin( pObj, pNet, k )
-            Ntl_ObjSetFanin( (Ntl_Obj_t *)pObj->pCopy, (Ntl_Net_t *)pNet->pCopy, k );
-        Ntl_ObjForEachFanout( pObj, pNet, k )
-            Ntl_ObjSetFanout( (Ntl_Obj_t *)pObj->pCopy, (Ntl_Net_t *)pNet->pCopy, k );
-        if ( Ntl_ObjIsLatch(pObj) )
-        {
-            ((Ntl_Obj_t *)pObj->pCopy)->LatchId = pObj->LatchId;
-            ((Ntl_Obj_t *)pObj->pCopy)->pClock = pObj->pClock? (Ntl_Net_t *)pObj->pClock->pCopy : NULL;
-        }
-        if ( Ntl_ObjIsNode(pObj) )
-            ((Ntl_Obj_t *)pObj->pCopy)->pSop = Ntl_ManStoreSop( pManNew->pMemSops, pObj->pSop );
-    }
-    pModelNew->vDelays = pModelOld->vDelays? Vec_IntDup( pModelOld->vDelays ) : NULL;
-    pModelNew->vTimeInputs = pModelOld->vTimeInputs? Vec_IntDup( pModelOld->vTimeInputs ) : NULL;
-    pModelNew->vTimeOutputs = pModelOld->vTimeOutputs? Vec_IntDup( pModelOld->vTimeOutputs ) : NULL;
-    return pModelNew;
-}
-
-
-// *r x\large\club_u2.blif.bz2;     *ps; *clplut; *ps
-// *r x\large\amazon_core.blif.bz2; *ps; *clplut; *ps
-
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates the model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Mod_t * Ntl_ModelDupCollapseLuts( Ntl_Man_t * pManNew, Ntl_Mod_t * pModelOld )
-{
-    Ntl_Mod_t * pModelNew, * pModelBox;
-    Ntl_Net_t * pNet;
-    Ntl_Obj_t * pObj, * pObjBox;
-    char * pNameBuf = ABC_ALLOC( char, 10000 );
-    int i, k, m, Counter = 0;
-    pModelNew = Ntl_ModelAlloc( pManNew, pModelOld->pName );
-    pModelNew->attrWhite   = pModelOld->attrWhite;
-    pModelNew->attrBox       = pModelOld->attrBox;
-    pModelNew->attrComb       = pModelOld->attrComb;
-    pModelNew->attrKeep       = pModelOld->attrKeep;
-    pModelNew->attrNoMerge = pModelOld->attrNoMerge;
-    Ntl_ModelForEachObj( pModelOld, pObj, i )
-        if ( Ntl_ObjIsLutBox(pObj) ) // skip collapsible LUT boxes
-            pObj->pCopy = NULL;
-        else
-            pObj->pCopy = Ntl_ModelDupObj( pModelNew, pObj );
-    Ntl_ModelForEachNet( pModelOld, pNet, i )
-    {
-        pNet->pCopy = Ntl_ModelFindOrCreateNet( pModelNew, pNet->pName );
-        ((Ntl_Net_t *)pNet->pCopy)->fFixed = pNet->fFixed;
-        if ( pNet->pDriver == NULL )
-        {
-            assert( !pModelOld->attrWhite );
-            continue;
-        }
-        if ( Ntl_ObjIsLutBox(pNet->pDriver) ) 
-            continue;
-        ((Ntl_Net_t *)pNet->pCopy)->pDriver = (Ntl_Obj_t *)pNet->pDriver->pCopy;
-        assert( pNet->pDriver->pCopy != NULL );
-    }
-    Ntl_ModelForEachObj( pModelOld, pObj, i )
-    {
-        if ( Ntl_ObjIsLutBox(pObj) ) // collapse LUT boxes
-        {
-            pModelBox = pObj->pImplem;
-            assert( pModelBox->attrComb );
-            assert( Ntl_ObjFaninNum(pObj) == Ntl_ModelPiNum(pModelBox) );
-            assert( Ntl_ObjFanoutNum(pObj) == Ntl_ModelPoNum(pModelBox) );
-            Ntl_ModelClearNets( pModelBox );
-            // attach PI/PO nets
-            Ntl_ModelForEachPi( pModelBox, pObjBox, k )
-                Ntl_ObjFanout0(pObjBox)->pCopy = Ntl_ObjFanin(pObj, k)->pCopy;
-            Ntl_ModelForEachPo( pModelBox, pObjBox, k )
-                Ntl_ObjFanin0(pObjBox)->pCopy = Ntl_ObjFanout(pObj, k)->pCopy;
-            // duplicate internal nodes
-            Ntl_ModelForEachNode( pModelBox, pObjBox, k )
-                pObjBox->pCopy = Ntl_ModelDupObj( pModelNew, pObjBox );
-            // duplicate and connect nets
-            Ntl_ModelForEachNet( pModelBox, pNet, k )
-            {
-                if ( pNet->pCopy != NULL )
-                    continue;
-                sprintf( pNameBuf, "box%d_%s", i, pNet->pName );
-                pNet->pCopy = Ntl_ModelFindOrCreateNet( pModelNew, pNameBuf ); // change name!!!
-                ((Ntl_Net_t *)pNet->pCopy)->pDriver = (Ntl_Obj_t *)pNet->pDriver->pCopy;
-            }
-            // connect nodes
-            Ntl_ModelForEachNode( pModelBox, pObjBox, k )
-            {
-                Ntl_ObjForEachFanin( pObjBox, pNet, m )
-                    Ntl_ObjSetFanin( (Ntl_Obj_t *)pObjBox->pCopy, (Ntl_Net_t *)pNet->pCopy, m );
-                Ntl_ObjForEachFanout( pObjBox, pNet, m )
-                    Ntl_ObjSetFanout( (Ntl_Obj_t *)pObjBox->pCopy, (Ntl_Net_t *)pNet->pCopy, m );
-                ((Ntl_Obj_t *)pObjBox->pCopy)->pSop = Ntl_ManStoreSop( pManNew->pMemSops, pObjBox->pSop );
-            }
-            // connect the PO nets
-            Ntl_ModelForEachPo( pModelBox, pObjBox, k )
-                ((Ntl_Net_t *)Ntl_ObjFanin0(pObjBox)->pCopy)->pDriver = (Ntl_Obj_t *)Ntl_ObjFanin0(pObjBox)->pDriver->pCopy;
-            assert( pObj->pCopy == NULL );
-            Counter++;
-        }
-        else
-        {
-            Ntl_ObjForEachFanin( pObj, pNet, k )
-                Ntl_ObjSetFanin( (Ntl_Obj_t *)pObj->pCopy, (Ntl_Net_t *)pNet->pCopy, k );
-            Ntl_ObjForEachFanout( pObj, pNet, k )
-                Ntl_ObjSetFanout( (Ntl_Obj_t *)pObj->pCopy, (Ntl_Net_t *)pNet->pCopy, k );
-            if ( Ntl_ObjIsLatch(pObj) )
-            {
-                ((Ntl_Obj_t *)pObj->pCopy)->LatchId = pObj->LatchId;
-                ((Ntl_Obj_t *)pObj->pCopy)->pClock = pObj->pClock? (Ntl_Net_t *)pObj->pClock->pCopy : NULL;
-            }
-            if ( Ntl_ObjIsNode(pObj) )
-                ((Ntl_Obj_t *)pObj->pCopy)->pSop = Ntl_ManStoreSop( pManNew->pMemSops, pObj->pSop );
-        }
-    }
-    pModelNew->vDelays = pModelOld->vDelays? Vec_IntDup( pModelOld->vDelays ) : NULL;
-    pModelNew->vTimeInputs = pModelOld->vTimeInputs? Vec_IntDup( pModelOld->vTimeInputs ) : NULL;
-    pModelNew->vTimeOutputs = pModelOld->vTimeOutputs? Vec_IntDup( pModelOld->vTimeOutputs ) : NULL;
-    ABC_FREE( pNameBuf );
-    if ( Counter )
-    printf( "Collapsed %d LUT boxes.\n", Counter );
-    return pModelNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocates the model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ModelFree( Ntl_Mod_t * p )
-{
-    assert( Ntl_ModelCheckNetsAreNotMarked(p) );
-    if ( p->vTimeOutputs )  Vec_IntFree( p->vTimeOutputs );
-    if ( p->vTimeInputs )   Vec_IntFree( p->vTimeInputs );
-    if ( p->vDelays )       Vec_IntFree( p->vDelays );
-    if ( p->vClocks )       Vec_PtrFree( p->vClocks );
-    if ( p->vClockFlops )   Vec_VecFree( p->vClockFlops );
-    if ( p->vResets )       Vec_PtrFree( p->vResets );
-    if ( p->vResetFlops )   Vec_VecFree( p->vResetFlops );
-    Vec_PtrFree( p->vNets );
-    Vec_PtrFree( p->vObjs );
-    Vec_PtrFree( p->vPis );
-    Vec_PtrFree( p->vPos );
-    ABC_FREE( p->pTable );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Create model equal to the latch with the given init value.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Mod_t * Ntl_ManCreateLatchModel( Ntl_Man_t * pMan, int Init )
-{
-    char Name[100];
-    Ntl_Mod_t * pModel;
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNetLi, * pNetLo;
-    // create model
-    sprintf( Name, "%s%d", "latch", Init );
-    pModel = Ntl_ModelAlloc( pMan, Name );
-    pModel->attrWhite   = 1;
-    pModel->attrBox     = 1;
-    pModel->attrComb    = 0;
-    pModel->attrKeep    = 0;
-    pModel->attrNoMerge = 0;
-    // create primary input
-    pObj = Ntl_ModelCreatePi( pModel );
-    pNetLi = Ntl_ModelFindOrCreateNet( pModel, "li" );
-    Ntl_ModelSetNetDriver( pObj, pNetLi );
-    // create latch 
-    pObj = Ntl_ModelCreateLatch( pModel );
-    pObj->LatchId.regInit = Init;
-    pObj->pFanio[0] = pNetLi;
-    // create primary output
-    pNetLo = Ntl_ModelFindOrCreateNet( pModel, "lo" );
-    Ntl_ModelSetNetDriver( pObj, pNetLo );
-    pObj = Ntl_ModelCreatePo( pModel, pNetLo );
-    // set timing information
-    pModel->vTimeInputs = Vec_IntAlloc( 2 );
-    Vec_IntPush( pModel->vTimeInputs, -1 );
-    Vec_IntPush( pModel->vTimeInputs, Aig_Float2Int(0.0) );        
-    pModel->vTimeOutputs = Vec_IntAlloc( 2 );
-    Vec_IntPush( pModel->vTimeOutputs, -1 );
-    Vec_IntPush( pModel->vTimeOutputs, Aig_Float2Int(0.0) );        
-    return pModel;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Count constant nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelCountLut0( Ntl_Mod_t * p )
-{
-    Ntl_Obj_t * pNode;
-    int i, Counter = 0;
-    Ntl_ModelForEachNode( p, pNode, i )
-        if ( Ntl_ObjFaninNum(pNode) == 0 )
-            Counter++;
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Count single-output nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelCountLut1( Ntl_Mod_t * p )
-{
-    Ntl_Obj_t * pNode;
-    int i, Counter = 0;
-    Ntl_ModelForEachNode( p, pNode, i )
-        if ( Ntl_ObjFaninNum(pNode) == 1 )
-            Counter++;
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Count buffers]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelCountBuf( Ntl_Mod_t * p )
-{
-    Ntl_Obj_t * pNode;
-    int i, Counter = 0;
-    Ntl_ModelForEachNode( p, pNode, i )
-        if ( Ntl_ObjFaninNum(pNode) == 1 && pNode->pSop[0] == '1' )
-            Counter++;
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Count inverters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelCountInv( Ntl_Mod_t * p )
-{
-    Ntl_Obj_t * pNode;
-    int i, Counter = 0;
-    Ntl_ModelForEachNode( p, pNode, i )
-        if ( Ntl_ObjFaninNum(pNode) == 1 && pNode->pSop[0] == '0' )
-            Counter++;
-    return Counter;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlMap.c b/src/aig/ntl/ntlMap.c
deleted file mode 100644
index 0ce8549d..00000000
--- a/src/aig/ntl/ntlMap.c
+++ /dev/null
@@ -1,346 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlMap.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Derives mapped network from AIG.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlMap.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-#include "kit.h"
-#include "if.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates mapping for the given AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Ntl_MappingAlloc( int nLuts, int nVars )
-{
-    char * pMemory;
-    Ntl_Lut_t ** pArray;
-    int nEntrySize, i;
-    nEntrySize = sizeof(Ntl_Lut_t) + sizeof(int) * nVars + sizeof(unsigned) * Aig_TruthWordNum(nVars);
-    pArray = (Ntl_Lut_t **)ABC_ALLOC( char, (sizeof(Ntl_Lut_t *) + nEntrySize) * nLuts );
-    pMemory = (char *)(pArray + nLuts);
-    memset( pMemory, 0, nEntrySize * nLuts );
-    for ( i = 0; i < nLuts; i++ )
-    {
-        pArray[i] = (Ntl_Lut_t *)pMemory;
-        pArray[i]->pFanins = (int *)(pMemory + sizeof(Ntl_Lut_t));
-        pArray[i]->pTruth = (unsigned *)(pMemory + sizeof(Ntl_Lut_t) + sizeof(int) * nVars);
-        pMemory += nEntrySize;
-    }
-    return Vec_PtrAllocArray( (void **)pArray, nLuts );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives trivial mapping from the AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Ntl_MappingFromAig( Aig_Man_t * p )
-{
-    Vec_Ptr_t * vMapping;
-    Ntl_Lut_t * pLut;
-    Aig_Obj_t * pObj;
-    int i, k = 0, nBytes = 4;
-    vMapping = Ntl_MappingAlloc( Aig_ManAndNum(p) + (int)(Aig_ManConst1(p)->nRefs > 0), 2 );
-    if ( Aig_ManConst1(p)->nRefs > 0 )
-    {
-        pLut = (Ntl_Lut_t *)Vec_PtrEntry( vMapping, k++ );
-        pLut->Id = 0;
-        pLut->nFanins = 0;
-        memset( pLut->pTruth, 0xFF, nBytes );
-    }
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        pLut = (Ntl_Lut_t *)Vec_PtrEntry( vMapping, k++ );
-        pLut->Id = pObj->Id;
-        pLut->nFanins = 2;
-        pLut->pFanins[0] = Aig_ObjFaninId0(pObj);
-        pLut->pFanins[1] = Aig_ObjFaninId1(pObj);
-        if      (  Aig_ObjFaninC0(pObj) &&  Aig_ObjFaninC1(pObj) ) 
-            memset( pLut->pTruth, 0x11, nBytes );
-        else if ( !Aig_ObjFaninC0(pObj) &&  Aig_ObjFaninC1(pObj) )
-            memset( pLut->pTruth, 0x22, nBytes );
-        else if (  Aig_ObjFaninC0(pObj) && !Aig_ObjFaninC1(pObj) )
-            memset( pLut->pTruth, 0x44, nBytes );
-        else if ( !Aig_ObjFaninC0(pObj) && !Aig_ObjFaninC1(pObj) )
-            memset( pLut->pTruth, 0x88, nBytes );
-    }
-    assert( k == Vec_PtrSize(vMapping) );
-    return vMapping;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Load the network into FPGA manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManSetIfParsDefault( If_Par_t * pPars )
-{
-//    extern void * Abc_FrameReadLibLut();
-    // set defaults
-    memset( pPars, 0, sizeof(If_Par_t) );
-    // user-controlable paramters
-//    pPars->nLutSize    = -1;
-    pPars->nLutSize    =  6;
-    pPars->nCutsMax    =  8;
-    pPars->nFlowIters  =  1;
-    pPars->nAreaIters  =  2;
-    pPars->DelayTarget = -1;
-    pPars->Epsilon     =  (float)0.005;
-    pPars->fPreprocess =  1;
-    pPars->fArea       =  0;
-    pPars->fFancy      =  0;
-    pPars->fExpRed     =  0;
-    pPars->fLatchPaths =  0;
-    pPars->fEdge       =  1;
-    pPars->fCutMin     =  0;
-    pPars->fSeqMap     =  0;
-    pPars->fVerbose    =  1;
-    // internal parameters
-    pPars->fTruth      =  1;
-    pPars->nLatches    =  0;
-    pPars->fLiftLeaves =  0;
-//    pPars->pLutLib     =  Abc_FrameReadLibLut();
-    pPars->pLutLib     =  NULL;
-    pPars->pTimesArr   =  NULL; 
-    pPars->pTimesArr   =  NULL;   
-    pPars->pFuncCost   =  NULL;   
-/*
-    if ( pPars->nLutSize == -1 )
-    {
-        if ( pPars->pLutLib == NULL )
-        {
-            printf( "The LUT library is not given.\n" );
-            return;
-        }
-        // get LUT size from the library
-        pPars->nLutSize = pPars->pLutLib->LutMax;
-    }
-*/
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Load the network into FPGA manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-If_Man_t * Ntl_ManToIf( Aig_Man_t * p, If_Par_t * pPars )
-{
-    If_Man_t * pIfMan;
-    Aig_Obj_t * pNode;//, * pFanin, * pPrev;
-    int i;
-    // start the mapping manager and set its parameters
-    pIfMan = If_ManStart( pPars );
-    // print warning about excessive memory usage
-    if ( 1.0 * Aig_ManObjNum(p) * pIfMan->nObjBytes / (1<<30) > 1.0 )
-        printf( "Warning: The mapper will allocate %.1f Gb for to represent the subject graph with %d AIG nodes.\n", 
-            1.0 * Aig_ManObjNum(p) * pIfMan->nObjBytes / (1<<30), Aig_ManObjNum(p) );
-    // load the AIG into the mapper
-    Aig_ManForEachObj( p, pNode, i )
-    {
-        if ( Aig_ObjIsAnd(pNode) )
-            pNode->pData = (Aig_Obj_t *)If_ManCreateAnd( pIfMan, 
-                If_NotCond( (If_Obj_t *)Aig_ObjFanin0(pNode)->pData, Aig_ObjFaninC0(pNode) ), 
-                If_NotCond( (If_Obj_t *)Aig_ObjFanin1(pNode)->pData, Aig_ObjFaninC1(pNode) ) );
-        else if ( Aig_ObjIsPi(pNode) )
-        {
-            pNode->pData = If_ManCreateCi( pIfMan );
-            ((If_Obj_t *)pNode->pData)->Level = pNode->Level;
-            if ( pIfMan->nLevelMax < (int)pNode->Level )
-                pIfMan->nLevelMax = (int)pNode->Level;
-        }
-        else if ( Aig_ObjIsPo(pNode) )
-            pNode->pData = If_ManCreateCo( pIfMan, If_NotCond( (If_Obj_t *)Aig_ObjFanin0(pNode)->pData, Aig_ObjFaninC0(pNode) ) );
-        else if ( Aig_ObjIsConst1(pNode) )
-            Aig_ManConst1(p)->pData = If_ManConst1( pIfMan );
-        else // add the node to the mapper
-            assert( 0 );
-        // set up the choice node
-//        if ( Aig_AigNodeIsChoice( pNode ) )
-//        {
-//            pIfMan->nChoices++;
-//            for ( pPrev = pNode, pFanin = pNode->pData; pFanin; pPrev = pFanin, pFanin = pFanin->pData )
-//                If_ObjSetChoice( (If_Obj_t *)pPrev->pData, (If_Obj_t *)pFanin->pData );
-//            If_ManCreateChoice( pIfMan, (If_Obj_t *)pNode->pData );
-//        }
-        {
-            If_Obj_t * pIfObj = (If_Obj_t *)pNode->pData;
-            assert( !If_IsComplement(pIfObj) );
-            assert( pIfObj->Id == pNode->Id );
-        }
-    }
-    return pIfMan;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the mapped network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Ntl_ManFromIf( Aig_Man_t * p, If_Man_t * pMan )
-{
-    Vec_Ptr_t * vIfMap;
-    If_Obj_t * pNode, * pLeaf; 
-    If_Cut_t * pCutBest;
-    Vec_Ptr_t * vMapping;
-    Vec_Int_t * vIfToAig;
-    Aig_Obj_t * pObj;
-    Ntl_Lut_t * pLut;
-    int * ppLeaves;
-    int i, k, nLuts, nLeaves, nWords, nVarsMax;
-    // create mapping of If nodes into AIG nodes
-    vIfToAig = Vec_IntStart( Aig_ManObjNumMax(p) );
-    Vec_IntFill( vIfToAig, Aig_ManObjNumMax(p), -1 );
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        if ( Aig_ObjIsPo(pObj) )
-            continue;
-        if ( Aig_ObjIsConst1(pObj) && pObj->pData == NULL )
-            continue;
-        if ( Aig_ObjIsPi(pObj) && pObj->pData == NULL )
-            continue;
-        pNode = (If_Obj_t *)pObj->pData;
-        assert( pNode != NULL );
-        Vec_IntWriteEntry( vIfToAig, pNode->Id, pObj->Id );
-    }
-    // create the mapping
-    vIfMap   = If_ManCollectMappingDirect( pMan );
-    nVarsMax = pMan->pPars->nLutSize;
-    nWords   = Aig_TruthWordNum( nVarsMax );
-    vMapping = Ntl_MappingAlloc( Vec_PtrSize(vIfMap) + (int)(Aig_ManConst1(p)->nRefs > 0), nVarsMax );
-    nLuts    = 0;
-    if ( Aig_ManConst1(p)->nRefs > 0 )
-    {
-        pLut = (Ntl_Lut_t *)Vec_PtrEntry( vMapping, nLuts++ );
-        pLut->Id = 0;
-        pLut->nFanins = 0;
-        memset( pLut->pTruth, 0xFF, 4 * nWords );
-    }
-    Vec_PtrForEachEntry( If_Obj_t *, vIfMap, pNode, i )
-    {
-        // get the best cut
-        pCutBest = If_ObjCutBest(pNode);
-        nLeaves  = If_CutLeaveNum( pCutBest ); 
-        ppLeaves = If_CutLeaves( pCutBest );
-        // fill the LUT
-        pLut = (Ntl_Lut_t *)Vec_PtrEntry( vMapping, nLuts++ );
-        pLut->Id = Vec_IntEntry( vIfToAig, pNode->Id );
-        pLut->nFanins = nLeaves;
-        If_CutForEachLeaf( pMan, pCutBest, pLeaf, k )
-            pLut->pFanins[k] = Vec_IntEntry( vIfToAig, pLeaf->Id );
-        // compute the truth table
-        memcpy( pLut->pTruth, If_CutTruth(pCutBest), 4 * nWords );
-    }
-    assert( nLuts == Vec_PtrSize(vMapping) );
-    Vec_IntFree( vIfToAig );
-    Vec_PtrFree( vIfMap );
-    return vMapping;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Interface with the FPGA mapping package.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Ntl_MappingIf( Ntl_Man_t * pMan, Aig_Man_t * p )
-{
-    Vec_Ptr_t * vMapping;
-    If_Par_t Pars, * pPars = &Pars;
-    If_Man_t * pIfMan;
-    // perform FPGA mapping
-    Ntl_ManSetIfParsDefault( pPars );
-    // set the arrival times
-    pPars->pTimesArr = ABC_ALLOC( float, Aig_ManPiNum(p) );
-    memset( pPars->pTimesArr, 0, sizeof(float) * Aig_ManPiNum(p) );
-    // translate into the mapper
-    pIfMan = Ntl_ManToIf( p, pPars );    
-    if ( pIfMan == NULL )
-        return NULL;
-    pIfMan->pManTim = Tim_ManDup( pMan->pManTime, 0 );
-    if ( !If_ManPerformMapping( pIfMan ) )
-    {
-        If_ManStop( pIfMan );
-        return NULL;
-    }
-    // transform the result of mapping into the new network
-    vMapping = Ntl_ManFromIf( p, pIfMan );
-    If_ManStop( pIfMan );
-    if ( vMapping == NULL )
-        return NULL;
-    return vMapping;
-}
-
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlNames.c b/src/aig/ntl/ntlNames.c
deleted file mode 100644
index fa91711d..00000000
--- a/src/aig/ntl/ntlNames.c
+++ /dev/null
@@ -1,471 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlNames.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Data-structure for storing hiNamrchical object names.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlNames.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// name object
-typedef struct Ntl_ObjNam_t_ Ntl_ObjNam_t;
-struct Ntl_ObjNam_t_
-{
-    int            iPrev;        // prefix of this name
-    int            iNext;        // the next name in the hash table
-    char           pName[0];     // name characters
-};
-
-// name manager
-typedef struct Ntl_ManNam_t_ Ntl_ManNam_t;
-struct Ntl_ManNam_t_
-{
-    // info storage for names
-    char *         pStore;       // storage for name objects
-    int            nStore;       // the size of allocated storage
-    int            iHandle;      // the current free handle
-    int            nHandles;     // the number of handles
-    int            nRefs;        // reference counter for the manager
-    // hash table for names
-    int            nBins;         
-    unsigned *     pBins;
-    // temporaries
-    Vec_Str_t *    vName;        // storage for returned name
-};
-
-static inline Ntl_ObjNam_t * Ntl_ManNamObj( Ntl_ManNam_t * p, int h )                      { assert( !(h & 3) ); return (Ntl_ObjNam_t *)(p->pStore + h);  }
-static inline int            Ntl_ManNamObjHandle( Ntl_ManNam_t * p, Ntl_ObjNam_t * pObj )  { return ((char *)pObj) - p->pStore;                           }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_ManNam_t * Ntl_ManNamStart()
-{
-    Ntl_ManNam_t * p;
-    p = ABC_CALLOC( Ntl_ManNam_t, 1 );
-    p->nStore  = (1 << 20);
-    p->pStore  = ABC_ALLOC( char, p->nStore );
-    p->iHandle = 4;
-    p->nBins   = Aig_PrimeCudd( 500000 );
-    p->pBins   = ABC_CALLOC( unsigned, p->nBins );
-    p->vName   = Vec_StrAlloc( 1000 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deletes manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManNamStop( Ntl_ManNam_t * p )
-{
-    Vec_StrFree( p->vName );
-    ABC_FREE( p->pStore );
-    ABC_FREE( p->pBins );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deletes manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManNamReportMemUsage( Ntl_ManNam_t * p )
-{
-    return sizeof(Ntl_ManNam_t) + p->nStore + sizeof(int) * p->nBins + sizeof(int) * Vec_StrSize(p->vName);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [References the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManNamRef( Ntl_ManNam_t * p )
-{
-    p->nRefs++;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Dereferences the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManNamDeref( Ntl_ManNam_t * p )
-{
-    if ( --p->nRefs == 0 )
-        Ntl_ManNamStop( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns object with the given handle.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-
-/**Function*************************************************************
-
-  Synopsis    [Computes hash value of the node using its simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManNamStrHash( char * pStr, int Length, int nTableSize )
-{
-    static int s_FPrimes[128] = { 
-        1009, 1049, 1093, 1151, 1201, 1249, 1297, 1361, 1427, 1459, 
-        1499, 1559, 1607, 1657, 1709, 1759, 1823, 1877, 1933, 1997, 
-        2039, 2089, 2141, 2213, 2269, 2311, 2371, 2411, 2467, 2543, 
-        2609, 2663, 2699, 2741, 2797, 2851, 2909, 2969, 3037, 3089, 
-        3169, 3221, 3299, 3331, 3389, 3461, 3517, 3557, 3613, 3671, 
-        3719, 3779, 3847, 3907, 3943, 4013, 4073, 4129, 4201, 4243, 
-        4289, 4363, 4441, 4493, 4549, 4621, 4663, 4729, 4793, 4871, 
-        4933, 4973, 5021, 5087, 5153, 5227, 5281, 5351, 5417, 5471, 
-        5519, 5573, 5651, 5693, 5749, 5821, 5861, 5923, 6011, 6073, 
-        6131, 6199, 6257, 6301, 6353, 6397, 6481, 6563, 6619, 6689, 
-        6737, 6803, 6863, 6917, 6977, 7027, 7109, 7187, 7237, 7309, 
-        7393, 7477, 7523, 7561, 7607, 7681, 7727, 7817, 7877, 7933, 
-        8011, 8039, 8059, 8081, 8093, 8111, 8123, 8147
-    };
-    unsigned uHash;
-    int i;
-    uHash = 0;
-    for ( i = 0; i < Length; i++ )
-        if ( i & 1 ) 
-            uHash *= pStr[i] * s_FPrimes[i & 0x7F];
-        else
-            uHash ^= pStr[i] * s_FPrimes[i & 0x7F];
-    return uHash % nTableSize;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Compares two strings to be equal.]
-
-  Description [Returns 1 if the strings match.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManNamStrCompare_rec( Ntl_ManNam_t * p, char * pStr, int Length, Ntl_ObjNam_t * pThis )
-{
-    Ntl_ObjNam_t * pNext = (pThis->iPrev)? Ntl_ManNamObj(p, pThis->iPrev) : NULL;
-    int LengthNew = strlen(pThis->pName);
-    if ( !strncmp( pThis->pName, pStr + Length - LengthNew, LengthNew ) )
-        return 0;
-    if ( pNext == NULL )
-        return 1;
-    return Ntl_ManNamStrCompare_rec( p, pStr, Length - LengthNew, pNext );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the place of this state in the table or NULL if it exists.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline unsigned * Ntl_ManNamStrHashFind( Ntl_ManNam_t * p, char * pStr, int Length, int * pHandle )
-{
-    Ntl_ObjNam_t * pThis;
-    unsigned * pPlace = p->pBins + Ntl_ManNamStrHash( pStr, Length, p->nBins );
-    for ( pThis = (*pPlace)? Ntl_ManNamObj(p, *pPlace) : NULL; pThis; 
-          pPlace = (unsigned *)&pThis->iNext, pThis = (*pPlace)? Ntl_ManNamObj(p, *pPlace) : NULL )
-              if ( !Ntl_ManNamStrCompare_rec( p, pStr, Length, pThis ) )
-              {
-                  *pHandle = Ntl_ManNamObjHandle( p, pThis );
-                  return NULL;
-              }
-    *pHandle = -1;
-    return pPlace;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resizes the hash table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManNamStrHashResize( Ntl_ManNam_t * p )
-{
-    Ntl_ObjNam_t * pThis;
-    unsigned * pBinsOld, * piPlace;
-    int nBinsOld, iNext, iHandle, Counter, i;
-    assert( p->pBins != NULL );
-    // replace the table
-    pBinsOld = p->pBins;
-    nBinsOld = p->nBins;
-    p->nBins = Aig_PrimeCudd( 3 * p->nBins ); 
-    p->pBins = ABC_CALLOC( unsigned, p->nBins );
-    // rehash the entries from the old table
-    Counter = 0;
-    for ( i = 0; i < nBinsOld; i++ )
-    for ( pThis = (pBinsOld[i]? Ntl_ManNamObj(p, pBinsOld[i]) : NULL),
-          iNext = (pThis? pThis->iNext : 0);  
-          pThis;  pThis = (iNext? Ntl_ManNamObj(p, iNext) : NULL),   
-          iNext = (pThis? pThis->iNext : 0)  )
-    {
-        pThis->iNext = 0;
-        piPlace = Ntl_ManNamStrHashFind( p, pThis->pName, strlen(pThis->pName), &iHandle );
-        assert( *piPlace == 0 ); // should not be there
-        *piPlace = Ntl_ManNamObjHandle( p, pThis );
-        Counter++;
-    }
-    assert( Counter == p->nHandles );
-    ABC_FREE( pBinsOld );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the handle of a new object to represent the name.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManNamStrGrow_rec( Ntl_ManNam_t * p, char * pStr, int Length, unsigned * piPlace )
-{
-    Ntl_ObjNam_t * pThis;
-    char * pStrNew;
-    int Separ, LengthNew;
-    int iHandle;
-    assert( Length > 0 );
-    // find the separator symbol
-    for ( Separ = Length - 2; Separ >= 0 && pStr[Separ] != '/'; Separ-- );
-    pStrNew = (Separ == -1) ? pStr : pStr + Separ + 1;
-    LengthNew = Length - (pStrNew - pStr);
-    // realloc memory if needed
-    if ( p->iHandle + (int)sizeof(Ntl_ObjNam_t) + LengthNew+5 > p->nStore )
-    {
-        int OffSet;
-        if ( (char *)piPlace > p->pStore && (char *)piPlace < p->pStore + p->nStore )
-            OffSet = (char *)piPlace - p->pStore;
-        else
-            OffSet = -1;
-        p->nStore *= 2;
-        p->pStore = ABC_REALLOC( char, p->pStore, p->nStore );
-        if ( OffSet >= 0 )
-            piPlace = (unsigned *)(p->pStore + OffSet);
-    }
-    // new entry is created
-    p->nHandles++;
-    *piPlace = p->iHandle;
-    pThis = Ntl_ManNamObj( p, p->iHandle );
-    p->iHandle += sizeof(Ntl_ObjNam_t) + 4 * Aig_BitWordNum( 8*(LengthNew+1) );
-    pThis->iNext = 0;
-    pThis->iPrev = 0;
-    strncpy( pThis->pName, pStrNew, LengthNew );
-    pThis->pName[LengthNew] = 0;
-    // expand hash table if needed
-//    if ( p->nHandles > 2 * p->nBins )
-//        Ntl_ManNamStrHashResize( p );
-    // create previous object if needed
-    if ( Separ >= 0 )
-    {
-        assert( pStr[Separ] == '/' );
-        Separ++;
-        piPlace = Ntl_ManNamStrHashFind( p, pStr, Separ, &iHandle );
-        if ( piPlace != NULL )
-            iHandle = Ntl_ManNamStrGrow_rec( p, pStr, Separ, piPlace );
-        pThis->iPrev = iHandle;
-    }
-    return Ntl_ManNamObjHandle( p, pThis );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds or adds the given name to storage.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManNamStrFind( Ntl_ManNam_t * p, char * pStr )
-{
-    int iHandle;
-    Ntl_ManNamStrHashFind( p, pStr, strlen(pStr), &iHandle );
-    return iHandle;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds or adds the given name to storage.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Ntl_ManNamStrFindOrAdd( Ntl_ManNam_t * p, char * pStr )
-{
-    unsigned * piPlace;
-    int iHandle, Length = strlen(pStr);
-    assert( Length > 0 );
-    piPlace = Ntl_ManNamStrHashFind( p, pStr, Length, &iHandle );
-    if ( piPlace == NULL )
-        return iHandle;
-    assert( *piPlace == 0 );
-    return Ntl_ManNamStrGrow_rec( p, pStr, Length, piPlace );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns name from handle.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Ntl_ManNamStr( Ntl_ManNam_t * p, int h )
-{
-    Ntl_ObjNam_t * pObj;
-    int k;
-    assert( h && h < p->iHandle );
-    Vec_StrClear( p->vName );
-    for ( pObj = Ntl_ManNamObj( p, h ); pObj; pObj = pObj->iPrev ? Ntl_ManNamObj(p, pObj->iPrev) : NULL )
-        for ( k = strlen(pObj->pName) - 1; k >= 0; k-- )
-            Vec_StrPush( p->vName, pObj->pName[k] );
-    Vec_StrReverseOrder( p->vName );
-    Vec_StrPush( p->vName, 0 );
-    return Vec_StrArray( p->vName );
-}
- 
-/**Function*************************************************************
-
-  Synopsis    [Testing procedure for the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManNamTest( Ntl_Man_t * pNtl )
-{
-    Ntl_ManNam_t * p;
-    Ntl_Mod_t * pRoot;
-    Ntl_Net_t * pNet;
-    int Memory;
-    int i, iHandle;
-    int clk = clock();
-
-    p = Ntl_ManNamStart();
-printf( "a" );
-    Memory = 0;
-    pRoot = Ntl_ManRootModel( pNtl );
-    Ntl_ModelForEachNet( pRoot, pNet, i )
-    {
-        Memory += strlen(pNet->pName) + 1;
-        iHandle = Ntl_ManNamStrFindOrAdd( p, pNet->pName );
-
-//        printf( "Before = %s\n", pNet->pName );
-//        printf( "After  = %s\n", Ntl_ManNamStr(p, iHandle) );
-    }
-    printf( "Net =%7d. Handle =%8d. ", Vec_PtrSize(pRoot->vNets), p->nHandles );
-    printf( "Mem old = %7.2f Mb.  Mem new = %7.2f Mb.\n",
-        1.0 * Memory / (1 << 20), 1.0 * Ntl_ManNamReportMemUsage(p) / (1 << 20) );
-    ABC_PRT( "Time", clock() - clk );
-printf( "b" );
-
-    Ntl_ManNamStop( p );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlObj.c b/src/aig/ntl/ntlObj.c
deleted file mode 100644
index 209974aa..00000000
--- a/src/aig/ntl/ntlObj.c
+++ /dev/null
@@ -1,319 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: .c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the primary input.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelCreatePi( Ntl_Mod_t * pModel )
-{
-    Ntl_Obj_t * p;
-    p = (Ntl_Obj_t *)Aig_MmFlexEntryFetch( pModel->pMan->pMemObjs, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) );
-    memset( p, 0, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) );
-    p->Id = Vec_PtrSize( pModel->vObjs );
-    Vec_PtrPush( pModel->vObjs, p );
-    Vec_PtrPush( pModel->vPis, p );
-//    p->pModel   = pModel;
-    p->Type     = NTL_OBJ_PI;
-    p->nFanins  = 0;
-    p->nFanouts = 1;
-    pModel->nObjs[NTL_OBJ_PI]++;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the primary output.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelCreatePo( Ntl_Mod_t * pModel, Ntl_Net_t * pNet )
-{
-    Ntl_Obj_t * p;
-    p = (Ntl_Obj_t *)Aig_MmFlexEntryFetch( pModel->pMan->pMemObjs, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) );
-    memset( p, 0, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) );
-    p->Id = Vec_PtrSize( pModel->vObjs );
-    Vec_PtrPush( pModel->vObjs, p );
-    Vec_PtrPush( pModel->vPos, p );
-//    p->pModel    = pModel;
-    p->Type      = NTL_OBJ_PO;
-    p->nFanins   = 1;
-    p->nFanouts  = 0;
-    p->pFanio[0] = pNet;
-    pModel->nObjs[NTL_OBJ_PO]++;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the primary output.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelCreateLatch( Ntl_Mod_t * pModel )
-{
-    Ntl_Obj_t * p;
-    p = (Ntl_Obj_t *)Aig_MmFlexEntryFetch( pModel->pMan->pMemObjs, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) * 3 );
-    memset( p, 0, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) * 3 );
-    p->Id = Vec_PtrSize( pModel->vObjs );
-    Vec_PtrPush( pModel->vObjs, p );
-//    p->pModel   = pModel;
-    p->Type     = NTL_OBJ_LATCH;
-    p->nFanins  = 1;
-    p->nFanouts = 1;
-    pModel->nObjs[NTL_OBJ_LATCH]++;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelCreateNode( Ntl_Mod_t * pModel, int nFanins )
-{
-    Ntl_Obj_t * p;
-    p = (Ntl_Obj_t *)Aig_MmFlexEntryFetch( pModel->pMan->pMemObjs, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) * (nFanins + 1) );
-    memset( p, 0, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) * (nFanins + 1) );
-    p->Id = Vec_PtrSize( pModel->vObjs );
-    Vec_PtrPush( pModel->vObjs, p );
-//    p->pModel   = pModel;
-    p->Type     = NTL_OBJ_NODE;
-    p->nFanins  = nFanins;
-    p->nFanouts = 1;
-    if ( nFanins == 1 )
-        pModel->nObjs[NTL_OBJ_LUT1]++;
-    else
-        pModel->nObjs[NTL_OBJ_NODE]++;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Create the latch.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelCreateBox( Ntl_Mod_t * pModel, int nFanins, int nFanouts )
-{
-    Ntl_Obj_t * p;
-    p = (Ntl_Obj_t *)Aig_MmFlexEntryFetch( pModel->pMan->pMemObjs, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) * (nFanins + nFanouts) );
-    memset( p, 0, sizeof(Ntl_Obj_t) + sizeof(Ntl_Net_t *) * (nFanins + nFanouts) );
-    p->Id = Vec_PtrSize( pModel->vObjs );
-    Vec_PtrPush( pModel->vObjs, p );
-//    p->pModel   = pModel;
-    p->Type     = NTL_OBJ_BOX;
-    p->nFanins  = nFanins;
-    p->nFanouts = nFanouts;
-    p->Reset    = -1;
-    pModel->nObjs[NTL_OBJ_BOX]++;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Create the latch.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelDupObj( Ntl_Mod_t * pModel, Ntl_Obj_t * pOld )
-{
-    Ntl_Obj_t * pNew = NULL; // Supprses "might be used uninitialized"
-    if ( Ntl_ObjIsPi( pOld ) )
-        pNew = Ntl_ModelCreatePi( pModel ); 
-    else if ( Ntl_ObjIsPo( pOld ) )
-        pNew = Ntl_ModelCreatePo( pModel, NULL ); 
-    else if ( Ntl_ObjIsLatch( pOld ) )
-        pNew = Ntl_ModelCreateLatch( pModel ); 
-    else if ( Ntl_ObjIsNode( pOld ) )
-        pNew = Ntl_ModelCreateNode( pModel, Ntl_ObjFaninNum(pOld) ); 
-    else if ( Ntl_ObjIsBox( pOld ) )
-        pNew = Ntl_ModelCreateBox( pModel, Ntl_ObjFaninNum(pOld), Ntl_ObjFanoutNum(pOld) ); 
-    return pNew;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the primary input with the given name.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Obj_t * Ntl_ModelCreatePiWithName( Ntl_Mod_t * pModel, char * pName )
-{
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet;
-    pNet = Ntl_ModelFindOrCreateNet( pModel, pName );
-    if ( pNet->pDriver )
-        return NULL;
-    pObj = Ntl_ModelCreatePi( pModel );
-    Ntl_ModelSetNetDriver( pObj, pNet );
-    return pObj;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates memory and copies the name into it.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Ntl_ManStoreName( Ntl_Man_t * p, char * pName )
-{
-    char * pStore;
-    pStore = Aig_MmFlexEntryFetch( p->pMemObjs, strlen(pName) + 1 );
-    strcpy( pStore, pName );
-    return pStore;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates memory and copies the SOP into it.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Ntl_ManStoreSop( Aig_MmFlex_t * pMan, const char * pSop )
-{
-    char * pStore;
-    pStore = Aig_MmFlexEntryFetch( pMan, strlen(pSop) + 1 );
-    strcpy( pStore, pSop );
-    return pStore;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates memory and copies the root of file name there.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Ntl_ManStoreFileName( Ntl_Man_t * p, char * pFileName )
-{
-    char * pBeg, * pEnd, * pStore, * pCur;
-    // find the first dot
-    for ( pEnd = pFileName; *pEnd; pEnd++ )
-        if ( *pEnd == '.' )
-            break;
-    // find the first char
-    for ( pBeg = pEnd - 1; pBeg >= pFileName; pBeg-- )
-        if ( !((*pBeg >= 'a' && *pBeg <= 'z') || (*pBeg >= 'A' && *pBeg <= 'Z') || (*pBeg >= '0' && *pBeg <= '9') || *pBeg == '_') )
-            break;
-    pBeg++;
-    // fill up storage
-    pStore = Aig_MmFlexEntryFetch( p->pMemSops, pEnd - pBeg + 1 );
-    for ( pCur = pStore; pBeg < pEnd; pBeg++, pCur++ )
-        *pCur = *pBeg;
-    *pCur = 0;
-    return pStore;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the index of the fanin in the fanin list of the fanout.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManObjWhichFanout( Ntl_Obj_t * pNode, Ntl_Net_t * pFanout )
-{
-    Ntl_Net_t * pObj;
-    int i;
-    Ntl_ObjForEachFanout( pNode, pObj, i )
-        if ( pObj == pFanout )
-            return i;
-    return -1;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlReadBlif.c b/src/aig/ntl/ntlReadBlif.c
deleted file mode 100644
index 88962efa..00000000
--- a/src/aig/ntl/ntlReadBlif.c
+++ /dev/null
@@ -1,1446 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlReadBlif.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Command processing package.]
-
-  Synopsis    [Procedures to read BLIF file.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - January 8, 2007.]
-
-  Revision    [$Id: ntlReadBlif.c,v 1.1 2008/10/10 14:09:30 mjarvin Exp $]
-
-***********************************************************************/
-
-// The code in this file is developed in collaboration with Mark Jarvin of Toronto.
-
-#include "ntl.h"
-#include "bzlib.h"
-#include "zlib.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Ntl_ReadMod_t_ Ntl_ReadMod_t;   // parsing model
-typedef struct Ntl_ReadMan_t_ Ntl_ReadMan_t;   // parsing manager
-
-struct Ntl_ReadMod_t_
-{
-    // file lines
-    char *               pFirst;       // .model line
-    char *               pAttrib;      // .attrib line
-    Vec_Ptr_t *          vInputs;      // .inputs lines
-    Vec_Ptr_t *          vOutputs;     // .outputs lines
-    Vec_Ptr_t *          vLatches;     // .latch lines
-    Vec_Ptr_t *          vNames;       // .names lines
-    Vec_Ptr_t *          vSubckts;     // .subckt lines
-    Vec_Ptr_t *          vDelays;      // .delay lines
-    Vec_Ptr_t *          vTimeInputs;  // .input_arrival/required lines
-    Vec_Ptr_t *          vTimeOutputs; // .output_required/arrival lines
-    int                  fBlackBox;    // indicates blackbox model
-    int                  fNoMerge;     // indicates no-merge model
-    char                 fInArr;     
-    char                 fInReq;     
-    char                 fOutArr;     
-    char                 fOutReq;     
-    // the resulting network
-    Ntl_Mod_t *          pNtk;   
-    // the parent manager
-    Ntl_ReadMan_t *      pMan;         
-};
-
-struct Ntl_ReadMan_t_
-{
-    // general info about file
-    char *               pFileName;    // the name of the file
-    char *               pBuffer;      // the contents of the file
-    Vec_Ptr_t *          vLines;       // the line beginnings
-    // the results of reading
-    Ntl_Man_t *          pDesign;      // the design under construction
-    // intermediate storage for models
-    Vec_Ptr_t *          vModels;      // vector of models
-    Ntl_ReadMod_t *      pLatest;      // the current model
-    // current processing info
-    Vec_Ptr_t *          vTokens;      // the current tokens
-    Vec_Ptr_t *          vTokens2;     // the current tokens
-    Vec_Str_t *          vFunc;        // the local function
-    // error reporting
-    char                 sError[512];  // the error string generated during parsing
-    // statistics 
-    int                  nTablesRead;  // the number of processed tables
-    int                  nTablesLeft;  // the number of dangling tables
-};
-
-// static functions
-static Ntl_ReadMan_t *   Ntl_ReadAlloc();
-static void              Ntl_ReadFree( Ntl_ReadMan_t * p );
-static Ntl_ReadMod_t *   Ntl_ReadModAlloc();
-static void              Ntl_ReadModFree( Ntl_ReadMod_t * p );
-static char *            Ntl_ReadLoadFile( char * pFileName );
-static char *            Ntl_ReadLoadFileBz2( char * pFileName );
-static char *            Ntl_ReadLoadFileGz( char * pFileName );
-static void              Ntl_ReadReadPreparse( Ntl_ReadMan_t * p );
-static int               Ntl_ReadReadInterfaces( Ntl_ReadMan_t * p );
-static Ntl_Man_t *       Ntl_ReadParse( Ntl_ReadMan_t * p );
-static int               Ntl_ReadParseLineModel( Ntl_ReadMod_t * p, char * pLine );
-static int               Ntl_ReadParseLineAttrib( Ntl_ReadMod_t * p, char * pLine );
-static int               Ntl_ReadParseLineInputs( Ntl_ReadMod_t * p, char * pLine );
-static int               Ntl_ReadParseLineOutputs( Ntl_ReadMod_t * p, char * pLine );
-static int               Ntl_ReadParseLineLatch( Ntl_ReadMod_t * p, char * pLine );
-static int               Ntl_ReadParseLineSubckt( Ntl_ReadMod_t * p, char * pLine );
-static int               Ntl_ReadParseLineDelay( Ntl_ReadMod_t * p, char * pLine );
-static int               Ntl_ReadParseLineTimes( Ntl_ReadMod_t * p, char * pLine, int fOutput );
-static int               Ntl_ReadParseLineNamesBlif( Ntl_ReadMod_t * p, char * pLine );
-
-static int               Ntl_ReadCharIsSpace( char s )   { return s == ' ' || s == '\t' || s == '\r' || s == '\n';             }
-static int               Ntl_ReadCharIsSopSymb( char s ) { return s == '0' || s == '1' || s == '-' || s == '\r' || s == '\n';  }
-
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Reads the network from the BLIF file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Man_t * Ntl_ManReadBlif( char * pFileName, int fCheck )
-{
-    FILE * pFile;
-    Ntl_ReadMan_t * p;
-    Ntl_Man_t * pDesign;
-    if ( !Ntl_FileIsType(pFileName, ".blif", ".blif.gz", ".blif.bz2") )
-    {     
-        printf( "Wrong file format\n" );
-        return NULL;
-    }
-    // check that the file is available
-    pFile = fopen( pFileName, "rb" );
-    if ( pFile == NULL )
-    {
-        printf( "Ntl_ManReadBlif(): The file is unavailable (absent or open).\n" );
-        return 0;
-    }
-    fclose( pFile );
-
-    // start the file reader
-    p = Ntl_ReadAlloc();
-    p->pFileName = pFileName;
-    if ( !strncmp(pFileName+strlen(pFileName)-4,".bz2",4) )
-        p->pBuffer = Ntl_ReadLoadFileBz2( pFileName );
-    else if ( !strncmp(pFileName+strlen(pFileName)-3,".gz",3) )
-        p->pBuffer = Ntl_ReadLoadFileGz( pFileName );
-    else
-        p->pBuffer = Ntl_ReadLoadFile( pFileName );
-    if ( p->pBuffer == NULL )
-    {
-        Ntl_ReadFree( p );
-        return NULL;
-    }
-    // set the design name
-    p->pDesign = Ntl_ManAlloc();
-    p->pDesign->pName = Ntl_ManStoreFileName( p->pDesign, pFileName );
-    p->pDesign->pSpec = Ntl_ManStoreName( p->pDesign, pFileName );
-    // prepare the file for parsing
-    Ntl_ReadReadPreparse( p );
-    // parse interfaces of each network
-    if ( !Ntl_ReadReadInterfaces( p ) )
-    {
-        if ( p->sError[0] )
-            fprintf( stdout, "%s\n", p->sError );
-        Ntl_ReadFree( p );
-        return NULL;
-    }
-    // construct the network
-    pDesign = Ntl_ReadParse( p );
-    if ( p->sError[0] )
-        fprintf( stdout, "%s\n", p->sError );
-    if ( pDesign == NULL )
-    {
-        Ntl_ReadFree( p );
-        return NULL;
-    }
-    p->pDesign = NULL;
-    Ntl_ReadFree( p );
-// pDesign should be linked to all models of the design
-
-    // make sure that everything is okay with the network structure
-    if ( fCheck )
-    {
-        if ( !Ntl_ManCheck( pDesign ) )
-        {
-            printf( "Ntl_ReadBlif: The check has failed for design %s.\n", pDesign->pName );
-            Ntl_ManFree( pDesign );
-            return NULL;
-        }
-
-    }
-    // transform the design by removing the CO drivers
-//    if ( (nNodes = Ntl_ManReconnectCoDrivers(pDesign)) )
-//        printf( "The design was transformed by removing %d buf/inv CO drivers.\n", nNodes );
-//Ntl_ManWriteBlif( pDesign, "_temp_.blif" );
-/*
-    {   
-        Aig_Man_t * p = Ntl_ManCollapseSeq( pDesign );
-        Aig_ManStop( p );
-    }
-*/
-    return pDesign;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates the BLIF parsing structure.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static Ntl_ReadMan_t * Ntl_ReadAlloc()
-{
-    Ntl_ReadMan_t * p;
-    p = ABC_ALLOC( Ntl_ReadMan_t, 1 );
-    memset( p, 0, sizeof(Ntl_ReadMan_t) );
-    p->vLines   = Vec_PtrAlloc( 512 );
-    p->vModels  = Vec_PtrAlloc( 512 );
-    p->vTokens  = Vec_PtrAlloc( 512 );
-    p->vTokens2 = Vec_PtrAlloc( 512 );
-    p->vFunc    = Vec_StrAlloc( 512 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Frees the BLIF parsing structure.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static void Ntl_ReadFree( Ntl_ReadMan_t * p )
-{
-    Ntl_ReadMod_t * pMod;
-    int i;
-    if ( p->pDesign )
-        Ntl_ManFree( p->pDesign );
-    if ( p->pBuffer )  
-        ABC_FREE( p->pBuffer );
-    if ( p->vLines )
-        Vec_PtrFree( p->vLines );
-    if ( p->vModels )
-    {
-        Vec_PtrForEachEntry( Ntl_ReadMod_t *, p->vModels, pMod, i )
-            Ntl_ReadModFree( pMod );
-        Vec_PtrFree( p->vModels );
-    }
-    Vec_PtrFree( p->vTokens );
-    Vec_PtrFree( p->vTokens2 );
-    Vec_StrFree( p->vFunc );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates the BLIF parsing structure for one model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static Ntl_ReadMod_t * Ntl_ReadModAlloc()
-{
-    Ntl_ReadMod_t * p;
-    p = ABC_ALLOC( Ntl_ReadMod_t, 1 );
-    memset( p, 0, sizeof(Ntl_ReadMod_t) );
-    p->vInputs      = Vec_PtrAlloc( 8 );
-    p->vOutputs     = Vec_PtrAlloc( 8 );
-    p->vLatches     = Vec_PtrAlloc( 8 );
-    p->vNames       = Vec_PtrAlloc( 8 );
-    p->vSubckts     = Vec_PtrAlloc( 8 );
-    p->vDelays      = Vec_PtrAlloc( 8 );
-    p->vTimeInputs  = Vec_PtrAlloc( 8 );
-    p->vTimeOutputs = Vec_PtrAlloc( 8 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocates the BLIF parsing structure for one model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static void Ntl_ReadModFree( Ntl_ReadMod_t * p )
-{
-    Vec_PtrFree( p->vInputs );
-    Vec_PtrFree( p->vOutputs );
-    Vec_PtrFree( p->vLatches );
-    Vec_PtrFree( p->vNames );
-    Vec_PtrFree( p->vSubckts );
-    Vec_PtrFree( p->vDelays );
-    Vec_PtrFree( p->vTimeInputs );
-    Vec_PtrFree( p->vTimeOutputs );
-    ABC_FREE( p );
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of given chars.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static int Ntl_ReadCountChars( char * pLine, char Char )
-{
-    char * pCur;
-    int Counter = 0;
-    for ( pCur = pLine; *pCur; pCur++ )
-        if ( *pCur == Char )
-            Counter++;
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the already split tokens.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static void Ntl_ReadCollectTokens( Vec_Ptr_t * vTokens, char * pInput, char * pOutput )
-{
-    char * pCur;
-    Vec_PtrClear( vTokens );
-    for ( pCur = pInput; pCur < pOutput; pCur++ )
-    {
-        if ( *pCur == 0 )
-            continue;
-        Vec_PtrPush( vTokens, pCur );
-        while ( *++pCur );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Splits the line into tokens.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static void Ntl_ReadSplitIntoTokens( Vec_Ptr_t * vTokens, char * pLine, char Stop )
-{
-    char * pCur;
-    // clear spaces
-    for ( pCur = pLine; *pCur != Stop; pCur++ )
-        if ( Ntl_ReadCharIsSpace(*pCur) )
-            *pCur = 0;
-    // collect tokens
-    Ntl_ReadCollectTokens( vTokens, pLine, pCur );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Splits the line into tokens.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static void Ntl_ReadSplitIntoTokensAndClear( Vec_Ptr_t * vTokens, char * pLine, char Stop, char Char )
-{
-    char * pCur;
-    // clear spaces
-    for ( pCur = pLine; *pCur != Stop; pCur++ )
-        if ( Ntl_ReadCharIsSpace(*pCur) || *pCur == Char )
-            *pCur = 0;
-    // collect tokens
-    Ntl_ReadCollectTokens( vTokens, pLine, pCur );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the 1-based number of the line in which the token occurs.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static int Ntl_ReadGetLine( Ntl_ReadMan_t * p, char * pToken )
-{
-    char * pLine;
-    int i;
-    Vec_PtrForEachEntry( char *, p->vLines, pLine, i )
-        if ( pToken < pLine )
-            return i;
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads the file into a character buffer.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static char * Ntl_ReadLoadFile( char * pFileName )
-{
-    FILE * pFile;
-    int nFileSize;
-    char * pContents;
-    pFile = fopen( pFileName, "rb" );
-    if ( pFile == NULL )
-    {
-        fclose( pFile );
-        printf( "Ntl_ReadLoadFile(): The file is unavailable (absent or open).\n" );
-        return NULL;
-    }
-    fseek( pFile, 0, SEEK_END );  
-    nFileSize = ftell( pFile ); 
-    if ( nFileSize == 0 )
-    {
-        fclose( pFile );
-        printf( "Ntl_ReadLoadFile(): The file is empty.\n" );
-        return NULL;
-    }
-    pContents = ABC_ALLOC( char, nFileSize + 10 );
-    rewind( pFile );
-    fread( pContents, nFileSize, 1, pFile );
-    fclose( pFile );
-    // finish off the file with the spare .end line
-    // some benchmarks suddenly break off without this line
-    strcpy( pContents + nFileSize, "\n.end\n" );
-    return pContents;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads the file into a character buffer.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-typedef struct buflist {
-  char buf[1<<20];
-  int nBuf;
-  struct buflist * next;
-} buflist;
-
-static char * Ntl_ReadLoadFileBz2( char * pFileName )
-{
-    FILE    * pFile;
-    int       nFileSize = 0;
-    char    * pContents;
-    BZFILE  * b;
-    int       bzError;
-    struct buflist * pNext;
-    buflist * bufHead = NULL, * buf = NULL;
-
-    pFile = fopen( pFileName, "rb" );
-    if ( pFile == NULL )
-    {
-        printf( "Ntl_ReadLoadFileBz2(): The file is unavailable (absent or open).\n" );
-        return NULL;
-    }
-    b = BZ2_bzReadOpen(&bzError,pFile,0,0,NULL,0);
-    if (bzError != BZ_OK) {
-        printf( "Ntl_ReadLoadFileBz2(): BZ2_bzReadOpen() failed with error %d.\n",bzError );
-        return NULL;
-    }
-    do {
-        if (!bufHead)
-            buf = bufHead = ABC_ALLOC( buflist, 1 );
-        else
-            buf = buf->next = ABC_ALLOC( buflist, 1 );
-        nFileSize += buf->nBuf = BZ2_bzRead(&bzError,b,buf->buf,1<<20);
-        buf->next = NULL;
-    } while (bzError == BZ_OK);
-    if (bzError == BZ_STREAM_END) {
-        // we're okay
-        char * p;
-        int nBytes = 0;
-        BZ2_bzReadClose(&bzError,b);
-        p = pContents = ABC_ALLOC( char, nFileSize + 10 );
-        buf = bufHead;
-        do {
-            memcpy(p+nBytes,buf->buf,buf->nBuf);
-            nBytes += buf->nBuf;
-//        } while((buf = buf->next));
-            pNext = buf->next;
-            ABC_FREE( buf );
-        } while((buf = pNext));
-    } else if (bzError == BZ_DATA_ERROR_MAGIC) {
-        // not a BZIP2 file
-        BZ2_bzReadClose(&bzError,b);
-        fseek( pFile, 0, SEEK_END );
-        nFileSize = ftell( pFile );
-        if ( nFileSize == 0 )
-        {
-            printf( "Ntl_ReadLoadFileBz2(): The file is empty.\n" );
-            return NULL;
-        }
-        pContents = ABC_ALLOC( char, nFileSize + 10 );
-        rewind( pFile );
-        fread( pContents, nFileSize, 1, pFile );
-    } else { 
-        // Some other error.
-        printf( "Ntl_ReadLoadFileBz2(): Unable to read the compressed BLIF.\n" );
-        return NULL;
-    }
-    fclose( pFile );
-    // finish off the file with the spare .end line
-    // some benchmarks suddenly break off without this line
-    strcpy( pContents + nFileSize, "\n.end\n" );
-    return pContents;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads the file into a character buffer.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static char * Ntl_ReadLoadFileGz( char * pFileName )
-{
-    const int READ_BLOCK_SIZE = 100000;
-    FILE * pFile;
-    char * pContents;
-    int amtRead, readBlock, nFileSize = READ_BLOCK_SIZE;
-    pFile = (FILE *)gzopen( pFileName, "rb" ); // if pFileName doesn't end in ".gz" then this acts as a passthrough to fopen
-    pContents = ABC_ALLOC( char, nFileSize );        
-    readBlock = 0;
-    while ((amtRead = gzread(pFile, pContents + readBlock * READ_BLOCK_SIZE, READ_BLOCK_SIZE)) == READ_BLOCK_SIZE) {
-        //printf("%d: read %d bytes\n", readBlock, amtRead);
-        nFileSize += READ_BLOCK_SIZE;
-        pContents = ABC_REALLOC(char, pContents, nFileSize);
-        ++readBlock;
-    }
-    //printf("%d: read %d bytes\n", readBlock, amtRead);
-    assert( amtRead != -1 ); // indicates a zlib error
-    nFileSize -= (READ_BLOCK_SIZE - amtRead);
-    gzclose(pFile);
-    return pContents;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares the parsing.]
-
-  Description [Performs several preliminary operations:
-  - Cuts the file buffer into separate lines.
-  - Removes comments and line extenders.
-  - Sorts lines by directives.
-  - Estimates the number of objects.
-  - Allocates room for the objects.
-  - Allocates room for the hash table.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static void Ntl_ReadReadPreparse( Ntl_ReadMan_t * p )
-{
-    char * pCur, * pPrev;
-    int i, fComment = 0;
-    // parse the buffer into lines and remove comments
-    Vec_PtrPush( p->vLines, p->pBuffer );
-    for ( pCur = p->pBuffer; *pCur; pCur++ )
-    {
-        if ( *pCur == '\n' )
-        {
-            *pCur = 0;
-//            if ( *(pCur-1) == '\r' )
-//                *(pCur-1) = 0;
-            fComment = 0;
-            Vec_PtrPush( p->vLines, pCur + 1 );
-        }
-        else if ( *pCur == '#' )
-            fComment = 1;
-        // remove comments
-        if ( fComment )
-            *pCur = 0;
-    }
-
-    // unfold the line extensions and sort lines by directive
-    Vec_PtrForEachEntry( char *, p->vLines, pCur, i )
-    {
-        if ( *pCur == 0 )
-            continue;
-        // find previous non-space character
-        for ( pPrev = pCur - 2; pPrev >= p->pBuffer; pPrev-- )
-            if ( !Ntl_ReadCharIsSpace(*pPrev) )
-                break;
-        // if it is the line extender, overwrite it with spaces
-        if ( pPrev >= p->pBuffer && *pPrev == '\\' )
-        {
-            for ( ; *pPrev; pPrev++ )
-                *pPrev = ' ';
-            *pPrev = ' ';
-            continue;
-        }
-        // skip spaces at the beginning of the line
-        while ( Ntl_ReadCharIsSpace(*pCur++) );
-        // parse directives
-        if ( *(pCur-1) != '.' )
-            continue;
-        if ( !strncmp(pCur, "names", 5) )
-            Vec_PtrPush( p->pLatest->vNames, pCur );
-        else if ( !strncmp(pCur, "latch", 5) )
-            Vec_PtrPush( p->pLatest->vLatches, pCur );
-        else if ( !strncmp(pCur, "inputs", 6) )
-            Vec_PtrPush( p->pLatest->vInputs, pCur );
-        else if ( !strncmp(pCur, "outputs", 7) )
-            Vec_PtrPush( p->pLatest->vOutputs, pCur );
-        else if ( !strncmp(pCur, "subckt", 6) )
-            Vec_PtrPush( p->pLatest->vSubckts, pCur );
-        else if ( !strncmp(pCur, "delay", 5) )
-            Vec_PtrPush( p->pLatest->vDelays, pCur );
-        else if ( !strncmp(pCur, "input_arrival", 13) ||
-                  !strncmp(pCur, "input_required", 14) )
-        {
-            if ( !strncmp(pCur, "input_arrival", 13) )
-                p->pLatest->fInArr = 1;
-            if ( !strncmp(pCur, "input_required", 14) )
-                p->pLatest->fInReq = 1;
-            Vec_PtrPush( p->pLatest->vTimeInputs, pCur );
-        }
-        else if ( !strncmp(pCur, "output_required", 15) ||
-                  !strncmp(pCur, "output_arrival", 14) )
-        {
-            if ( !strncmp(pCur, "output_required", 15) )
-                p->pLatest->fOutReq = 1;
-            if ( !strncmp(pCur, "output_arrival", 14) )
-                p->pLatest->fOutArr = 1;
-            Vec_PtrPush( p->pLatest->vTimeOutputs, pCur );
-        }
-        else if ( !strncmp(pCur, "blackbox", 8) )
-            p->pLatest->fBlackBox = 1;
-        else if ( !strncmp(pCur, "model", 5) ) 
-        {
-            p->pLatest = Ntl_ReadModAlloc();
-            p->pLatest->pFirst = pCur;
-            p->pLatest->pMan = p;
-        }
-        else if ( !strncmp(pCur, "attrib", 6) ) 
-        {
-            if ( p->pLatest->pAttrib != NULL )
-                fprintf( stdout, "Line %d: Skipping second .attrib line for this model.\n", Ntl_ReadGetLine(p, pCur) );
-            else
-                p->pLatest->pAttrib = pCur;
-        }
-        else if ( !strncmp(pCur, "end", 3) )
-        {
-            if ( p->pLatest )
-                Vec_PtrPush( p->vModels, p->pLatest );
-            p->pLatest = NULL;
-        }
-        else if ( !strncmp(pCur, "exdc", 4) )
-        {
-            fprintf( stdout, "Line %d: Skipping EXDC network.\n", Ntl_ReadGetLine(p, pCur) );
-            break;
-        }
-        else if ( !strncmp(pCur, "no_merge", 8) ) 
-        {
-            p->pLatest->fNoMerge = 1;
-        }
-        else
-        {
-            pCur--;
-            if ( pCur[strlen(pCur)-1] == '\r' )
-                pCur[strlen(pCur)-1] = 0;
-            fprintf( stdout, "Line %d: Skipping line \"%s\".\n", Ntl_ReadGetLine(p, pCur), pCur );
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Parses interfaces of the models.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static int Ntl_ReadReadInterfaces( Ntl_ReadMan_t * p )
-{
-    Ntl_ReadMod_t * pMod;
-    char * pLine;
-    int i, k;
-    // iterate through the models
-    Vec_PtrForEachEntry( Ntl_ReadMod_t *, p->vModels, pMod, i )
-    {
-        // parse the model
-        if ( !Ntl_ReadParseLineModel( pMod, pMod->pFirst ) )
-            return 0;
-        // parse the model attributes
-        if ( pMod->pAttrib && !Ntl_ReadParseLineAttrib( pMod, pMod->pAttrib ) )
-            return 0;
-        // parse no-merge
-        if ( pMod->fNoMerge )
-            pMod->pNtk->attrNoMerge = 1;
-        // parse the inputs
-        Vec_PtrForEachEntry( char *, pMod->vInputs, pLine, k )
-            if ( !Ntl_ReadParseLineInputs( pMod, pLine ) )
-                return 0;
-        // parse the outputs
-        Vec_PtrForEachEntry( char *, pMod->vOutputs, pLine, k )
-            if ( !Ntl_ReadParseLineOutputs( pMod, pLine ) )
-                return 0;
-        // parse the delay info
-        Ntl_ModelSetPioNumbers( pMod->pNtk );
-        Vec_PtrForEachEntry( char *, pMod->vDelays, pLine, k )
-            if ( !Ntl_ReadParseLineDelay( pMod, pLine ) )
-                return 0;
-        Vec_PtrForEachEntry( char *, pMod->vTimeInputs, pLine, k )
-            if ( !Ntl_ReadParseLineTimes( pMod, pLine, 0 ) )
-                return 0;
-        Vec_PtrForEachEntry( char *, pMod->vTimeOutputs, pLine, k )
-            if ( !Ntl_ReadParseLineTimes( pMod, pLine, 1 ) )
-                return 0;
-        // report timing line stats
-        if ( pMod->fInArr && pMod->fInReq )
-            printf( "Model %s has both .input_arrival and .input_required.\n", pMod->pNtk->pName );
-        if ( pMod->fOutArr && pMod->fOutReq )
-            printf( "Model %s has both .output_arrival and .output_required.\n", pMod->pNtk->pName );
-        if ( !pMod->vDelays && !pMod->fInArr && !pMod->fInReq )
-            printf( "Model %s has neither .input_arrival nor .input_required.\n", pMod->pNtk->pName );
-        if ( !pMod->vDelays && !pMod->fOutArr && !pMod->fOutReq )
-            printf( "Model %s has neither .output_arrival nor .output_required.\n", pMod->pNtk->pName );
-    }
-    return 1;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static Ntl_Man_t * Ntl_ReadParse( Ntl_ReadMan_t * p )
-{
-    Ntl_Man_t * pDesign;
-    Ntl_ReadMod_t * pMod;
-    char * pLine;
-    int i, k;
-    // iterate through the models
-    Vec_PtrForEachEntry( Ntl_ReadMod_t *, p->vModels, pMod, i )
-    {
-        // parse the latches
-        Vec_PtrForEachEntry( char *, pMod->vLatches, pLine, k )
-            if ( !Ntl_ReadParseLineLatch( pMod, pLine ) )
-                return NULL;
-        // parse the nodes
-        Vec_PtrForEachEntry( char *, pMod->vNames, pLine, k )
-            if ( !Ntl_ReadParseLineNamesBlif( pMod, pLine ) )
-                return NULL;
-        // parse the subcircuits
-        Vec_PtrForEachEntry( char *, pMod->vSubckts, pLine, k )
-            if ( !Ntl_ReadParseLineSubckt( pMod, pLine ) )
-                return NULL;
-        // finalize the network
-        Ntl_ModelFixNonDrivenNets( pMod->pNtk );
-    }
-    if ( i == 0 )
-        return NULL;
-    // update the design name
-    pMod = (Ntl_ReadMod_t *)Vec_PtrEntry( p->vModels, 0 );
-    if ( Ntl_ModelLatchNum(pMod->pNtk) > 0 )
-        Ntl_ModelTransformLatches( pMod->pNtk );
-    p->pDesign->pName = Ntl_ManStoreName( p->pDesign, pMod->pNtk->pName );
-    // return the network
-    pDesign = p->pDesign;
-    p->pDesign = NULL;
-    return pDesign;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Parses the model line.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static int Ntl_ReadParseLineModel( Ntl_ReadMod_t * p, char * pLine )
-{
-    Vec_Ptr_t * vTokens = p->pMan->vTokens;
-    char * pToken;
-    Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
-    pToken = (char *)Vec_PtrEntry( vTokens, 0 );
-    assert( !strcmp(pToken, "model") );
-    if ( Vec_PtrSize(vTokens) != 2 )
-    {
-        sprintf( p->pMan->sError, "Line %d: The number of entries (%d) in .model line is different from two.", Ntl_ReadGetLine(p->pMan, pToken), Vec_PtrSize(vTokens) );
-        return 0;
-    }
-    p->pNtk = Ntl_ModelAlloc( p->pMan->pDesign, (char *)Vec_PtrEntry(vTokens, 1) );
-    if ( p->pNtk == NULL )
-    {
-        sprintf( p->pMan->sError, "Line %d: Model %s already exists.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
-        return 0;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Parses the model line.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static int Ntl_ReadParseLineAttrib( Ntl_ReadMod_t * p, char * pLine )
-{
-    Vec_Ptr_t * vTokens = p->pMan->vTokens;
-    char * pToken;
-    int i;
-    Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
-    pToken = (char *)Vec_PtrEntry( vTokens, 0 );
-    assert( !strncmp(pToken, "attrib", 6) );
-    Vec_PtrForEachEntryStart( char *, vTokens, pToken, i, 1 )
-    {
-        pToken = (char *)Vec_PtrEntry( vTokens, i );
-        if ( strcmp( pToken, "white" ) == 0 )
-            p->pNtk->attrWhite = 1;
-        else if ( strcmp( pToken, "black" ) == 0 )
-            p->pNtk->attrWhite = 0;
-        else if ( strcmp( pToken, "box" ) == 0 )
-            p->pNtk->attrBox = 1;
-        else if ( strcmp( pToken, "logic" ) == 0 )
-            p->pNtk->attrBox = 0;
-        else if ( strcmp( pToken, "comb" ) == 0 )
-            p->pNtk->attrComb = 1;
-        else if ( strcmp( pToken, "seq" ) == 0 )
-            p->pNtk->attrComb = 0;
-        else if ( strcmp( pToken, "keep" ) == 0 )
-            p->pNtk->attrKeep = 1;
-        else if ( strcmp( pToken, "sweep" ) == 0 )
-            p->pNtk->attrKeep = 0;
-        else 
-        {
-            sprintf( p->pMan->sError, "Line %d: Unknown attribute (%s) in the .attrib line of model %s.", Ntl_ReadGetLine(p->pMan, pToken), pToken, p->pNtk->pName );
-            return 0;
-        }
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Parses the inputs line.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static int Ntl_ReadParseLineInputs( Ntl_ReadMod_t * p, char * pLine )
-{
-    Ntl_Net_t * pNet;
-    Ntl_Obj_t * pObj;
-    Vec_Ptr_t * vTokens = p->pMan->vTokens;
-    char * pToken;
-    int i;
-    Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
-    pToken = (char *)Vec_PtrEntry(vTokens, 0);
-    assert( !strcmp(pToken, "inputs") );
-    Vec_PtrForEachEntryStart( char *, vTokens, pToken, i, 1 )
-    {
-        pObj = Ntl_ModelCreatePi( p->pNtk );
-        pNet = Ntl_ModelFindOrCreateNet( p->pNtk, pToken );
-        if ( !Ntl_ModelSetNetDriver( pObj, pNet ) )
-        {
-            sprintf( p->pMan->sError, "Line %d: Net %s already has a driver.", Ntl_ReadGetLine(p->pMan, pToken), pNet->pName );
-            return 0;
-        }
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Parses the outputs line.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static int Ntl_ReadParseLineOutputs( Ntl_ReadMod_t * p, char * pLine )
-{
-    Ntl_Net_t * pNet;
-    Ntl_Obj_t * pObj;
-    Vec_Ptr_t * vTokens = p->pMan->vTokens;
-    char * pToken;
-    int i;
-    Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
-    pToken = (char *)Vec_PtrEntry(vTokens, 0);
-    assert( !strcmp(pToken, "outputs") );
-    Vec_PtrForEachEntryStart( char *, vTokens, pToken, i, 1 )
-    {
-        pNet = Ntl_ModelFindOrCreateNet( p->pNtk, pToken );
-        pObj = Ntl_ModelCreatePo( p->pNtk, pNet );
-        pNet->pCopy = pObj;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Parses the latches line.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static int Ntl_ReadParseLineLatch( Ntl_ReadMod_t * p, char * pLine )
-{
-    Vec_Ptr_t * vTokens = p->pMan->vTokens;
-    Ntl_Net_t * pNetLi, * pNetLo;
-    Ntl_Obj_t * pObj;
-    char * pToken, * pNameLi, * pNameLo;
-    Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
-    pToken = (char *)Vec_PtrEntry(vTokens,0);
-    assert( !strcmp(pToken, "latch") );
-    if ( Vec_PtrSize(vTokens) < 3 )
-    {
-        sprintf( p->pMan->sError, "Line %d: Latch does not have input name and output name.", Ntl_ReadGetLine(p->pMan, pToken) );
-        return 0;
-    }
-    // create latch
-    pNameLi = (char *)Vec_PtrEntry( vTokens, 1 );
-    pNameLo = (char *)Vec_PtrEntry( vTokens, 2 );
-    pNetLi  = Ntl_ModelFindOrCreateNet( p->pNtk, pNameLi );
-    pNetLo  = Ntl_ModelFindOrCreateNet( p->pNtk, pNameLo );
-    pObj    = Ntl_ModelCreateLatch( p->pNtk );
-    pObj->pFanio[0] = pNetLi;
-    if ( !Ntl_ModelSetNetDriver( pObj, pNetLo ) )
-    {
-        sprintf( p->pMan->sError, "Line %d: Net %s already has a driver.", Ntl_ReadGetLine(p->pMan, pToken), pNetLo->pName );
-        return 0;
-    }
-    // get initial value
-    if ( Vec_PtrSize(vTokens) > 3 )
-        pObj->LatchId.regInit = atoi( (char *)Vec_PtrEntry(vTokens,Vec_PtrSize(vTokens)-1) );
-    else
-        pObj->LatchId.regInit = 2;
-    if ( pObj->LatchId.regInit < 0 || pObj->LatchId.regInit > 2 )
-    {
-        sprintf( p->pMan->sError, "Line %d: Initial state of the latch is incorrect \"%s\".", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens,3) );
-        return 0;
-    }
-    // get the register class
-//    if ( Vec_PtrSize(vTokens) == 6 )
-    if ( Vec_PtrSize(vTokens) == 5 || Vec_PtrSize(vTokens) == 6 )
-    {
-        pToken = (char *)Vec_PtrEntry(vTokens,3);
-        if ( strcmp( pToken, "fe" ) == 0 )
-            pObj->LatchId.regType = 1;
-        else if ( strcmp( pToken, "re" ) == 0 )
-            pObj->LatchId.regType = 2;
-        else if ( strcmp( pToken, "ah" ) == 0 )
-            pObj->LatchId.regType = 3;
-        else if ( strcmp( pToken, "al" ) == 0 )
-            pObj->LatchId.regType = 4;
-        else if ( strcmp( pToken, "as" ) == 0 )
-            pObj->LatchId.regType = 5;
-        else if ( pToken[0] >= '0' && pToken[0] <= '9' )
-            pObj->LatchId.regClass = atoi(pToken);
-        else
-        {
-            sprintf( p->pMan->sError, "Line %d: Type/class of the latch is incorrect \"%s\".", Ntl_ReadGetLine(p->pMan, pToken), pToken );
-            return 0;
-        }
-    }
-    if ( pObj->LatchId.regClass < 0 || pObj->LatchId.regClass > (1<<24) )
-    {
-        sprintf( p->pMan->sError, "Line %d: Class of the latch is incorrect \"%s\".", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens,3) );
-        return 0;
-    }
-    // get the clock
-//    if ( Vec_PtrSize(vTokens) == 5 || Vec_PtrSize(vTokens) == 6 )
-    if ( Vec_PtrSize(vTokens) == 6 )
-    {
-        pToken = (char *)Vec_PtrEntry(vTokens,Vec_PtrSize(vTokens)-2);
-        pNetLi = Ntl_ModelFindOrCreateNet( p->pNtk, pToken );
-        pObj->pClock = pNetLi;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Parses the subckt line.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static int Ntl_ReadParseLineSubckt( Ntl_ReadMod_t * p, char * pLine )
-{
-    Vec_Ptr_t * vTokens = p->pMan->vTokens;
-    Ntl_Mod_t * pModel;
-    Ntl_Obj_t * pBox, * pTerm;
-    Ntl_Net_t * pNet;
-    char * pToken, * pName, ** ppNames;
-    int nEquals, i, k;
-
-    // split the line into tokens
-    nEquals = Ntl_ReadCountChars( pLine, '=' );
-    Ntl_ReadSplitIntoTokensAndClear( vTokens, pLine, '\0', '=' );
-    pToken = (char *)Vec_PtrEntry(vTokens,0);
-    assert( !strcmp(pToken, "subckt") );
-
-    // get the model for this box
-    pName = (char *)Vec_PtrEntry(vTokens,1);
-    pModel = Ntl_ManFindModel( p->pMan->pDesign, pName );
-    if ( pModel == NULL )
-    {
-        sprintf( p->pMan->sError, "Line %d: Cannot find the model for subcircuit %s.", Ntl_ReadGetLine(p->pMan, pToken), pName );
-        return 0;
-    }
-/*
-    // temporary fix for splitting the .subckt line
-    if ( nEquals < Ntl_ModelPiNum(pModel) + Ntl_ModelPoNum(pModel) )
-    { 
-        Vec_Ptr_t * vTokens2 = Vec_PtrAlloc( 10 );
-        // get one additional token
-        pToken = Vec_PtrEntry( vTokens, Vec_PtrSize(vTokens) - 1 );
-        for ( ; *pToken; pToken++ );
-        for ( ; *pToken == 0; pToken++ );
-        Ntl_ReadSplitIntoTokensAndClear( vTokens2, pToken, '\0', '=' );
-//        assert( Vec_PtrSize( vTokens2 ) == 2 );
-        Vec_PtrForEachEntry( char *, vTokens2, pToken, i )
-            Vec_PtrPush( vTokens, pToken );
-        nEquals += Vec_PtrSize(vTokens2)/2;
-        Vec_PtrFree( vTokens2 );
-    }
-*/    
-    // check if the number of tokens is correct
-    if ( nEquals != Ntl_ModelPiNum(pModel) + Ntl_ModelPoNum(pModel) )
-    {
-        sprintf( p->pMan->sError, "Line %d: The number of ports (%d) in .subckt %s differs from the sum of PIs and POs of the model (%d).", 
-            Ntl_ReadGetLine(p->pMan, pToken), nEquals, pName, Ntl_ModelPiNum(pModel) + Ntl_ModelPoNum(pModel) );
-        return 0;
-    }
-
-    // get the names
-    ppNames = (char **)Vec_PtrArray(vTokens) + 2;
-
-    // create the box with these terminals
-    pBox = Ntl_ModelCreateBox( p->pNtk, Ntl_ModelPiNum(pModel), Ntl_ModelPoNum(pModel) );
-    pBox->pImplem = pModel;
-    Ntl_ModelForEachPi( pModel, pTerm, i )
-    {
-        // find this terminal among the formal inputs of the subcircuit
-        pName = Ntl_ObjFanout0(pTerm)->pName;
-        for ( k = 0; k < nEquals; k++ )
-            if ( !strcmp( ppNames[2*k], pName ) )
-                break;
-        if ( k == nEquals )
-        {
-            sprintf( p->pMan->sError, "Line %d: Cannot find PI \"%s\" of the model \"%s\" as a formal input of the subcircuit.", 
-                Ntl_ReadGetLine(p->pMan, pToken), pName, pModel->pName );
-            return 0;
-        }
-        // create the BI with the actual name
-        pNet = Ntl_ModelFindOrCreateNet( p->pNtk, ppNames[2*k+1] );
-        Ntl_ObjSetFanin( pBox, pNet, i );
-    }
-    Ntl_ModelForEachPo( pModel, pTerm, i )
-    {
-        // find this terminal among the formal outputs of the subcircuit
-        pName = Ntl_ObjFanin0(pTerm)->pName;
-        for ( k = 0; k < nEquals; k++ )
-            if ( !strcmp( ppNames[2*k], pName ) )
-                break;
-        if ( k == nEquals )
-        {
-            sprintf( p->pMan->sError, "Line %d: Cannot find PO \"%s\" of the model \"%s\" as a formal output of the subcircuit.", 
-                Ntl_ReadGetLine(p->pMan, pToken), pName, pModel->pName );
-            return 0;
-        }
-        // create the BI with the actual name
-        pNet = Ntl_ModelFindOrCreateNet( p->pNtk, ppNames[2*k+1] );
-        Ntl_ObjSetFanout( pBox, pNet, i );
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Parses the subckt line.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static int Ntl_ReadParseLineDelay( Ntl_ReadMod_t * p, char * pLine )
-{
-    Vec_Ptr_t * vTokens = p->pMan->vTokens;
-    int RetValue1, RetValue2, Number1, Number2, Temp;
-    char * pToken, * pTokenNum;
-    float Delay;
-    assert( sizeof(float) == sizeof(int) );
-    Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
-    pToken = (char *)Vec_PtrEntry(vTokens,0);
-    assert( !strcmp(pToken, "delay") );
-    if ( Vec_PtrSize(vTokens) < 2 && Vec_PtrSize(vTokens) > 4 )
-    {
-        sprintf( p->pMan->sError, "Line %d: Delay line does not have a valid number of parameters (1, 2, or 3).", Ntl_ReadGetLine(p->pMan, pToken) );
-        return 0;
-    }
-    // find the delay number
-    pTokenNum = (char *)Vec_PtrEntryLast(vTokens);
-    Delay = atof( pTokenNum );
-    if ( Delay == 0.0 && pTokenNum[0] != '0' )
-    {
-        sprintf( p->pMan->sError, "Line %d: Delay value (%s) appears to be invalid.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntryLast(vTokens) );
-        return 0;
-    }
-    // find the PI/PO numbers
-    RetValue1 = 0; Number1 = -1;
-    if ( Vec_PtrSize(vTokens) > 2 )
-    {
-        RetValue1 = Ntl_ModelFindPioNumber( p->pNtk, 0, 0, (char *)Vec_PtrEntry(vTokens, 1), &Number1 );
-        if ( RetValue1 == 0 )
-        {
-            sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs/POs.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
-            return 0;
-        }
-    }
-    RetValue2 = 0; Number2 = -1;
-    if ( Vec_PtrSize(vTokens) > 3 )
-    {
-        RetValue2 = Ntl_ModelFindPioNumber( p->pNtk, 0, 0, (char *)Vec_PtrEntry(vTokens, 2), &Number2 );
-        if ( RetValue2 == 0 )
-        {
-            sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs/POs.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 2) );
-            return 0;
-        }
-    }
-    if ( RetValue1 == RetValue2 && RetValue1 )
-    {
-        sprintf( p->pMan->sError, "Line %d: Both signals \"%s\" and \"%s\" listed appear to be PIs or POs.", 
-            Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1), (char*)Vec_PtrEntry(vTokens, 2) );
-        return 0;
-    }
-    if ( RetValue2 < RetValue1 )
-    {
-        Temp = RetValue2; RetValue2 = RetValue1; RetValue1 = Temp;
-        Temp = Number2;   Number2 = Number1;     Number1 = Temp;
-    }
-    assert( RetValue1 == 0 || RetValue1 == -1 );
-    assert( RetValue2 == 0 || RetValue2 ==  1 );
-    // store the values
-    if ( p->pNtk->vDelays == NULL )
-        p->pNtk->vDelays = Vec_IntAlloc( 100 );
-    Vec_IntPush( p->pNtk->vDelays, Number1 );
-    Vec_IntPush( p->pNtk->vDelays, Number2 );
-    Vec_IntPush( p->pNtk->vDelays, Aig_Float2Int(Delay) );        
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Parses the subckt line.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static int Ntl_ReadParseLineTimes( Ntl_ReadMod_t * p, char * pLine, int fOutput )
-{
-    Vec_Ptr_t * vTokens = p->pMan->vTokens;
-    int RetValue, Number = -1;
-    char * pToken, * pTokenNum;
-    float Delay;
-    assert( sizeof(float) == sizeof(int) );
-    Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
-    pToken = (char *)Vec_PtrEntry(vTokens,0);
-    if ( fOutput )
-        assert( !strncmp(pToken, "output_", 7) );
-    else
-        assert( !strncmp(pToken, "input_", 6) );
-    if ( Vec_PtrSize(vTokens) != 2 && Vec_PtrSize(vTokens) != 3 )
-    {
-        sprintf( p->pMan->sError, "Line %d: Delay line does not have a valid number of parameters (2 or 3).", Ntl_ReadGetLine(p->pMan, pToken) );
-        return 0;
-    }
-    // find the delay number
-    pTokenNum = (char *)Vec_PtrEntryLast(vTokens);
-    if ( !strcmp( pTokenNum, "-inf" ) )
-        Delay = -TIM_ETERNITY;
-    else if ( !strcmp( pTokenNum, "inf" ) ) 
-        Delay = TIM_ETERNITY;
-    else
-        Delay = atof( pTokenNum );
-    if ( Delay == 0.0 && pTokenNum[0] != '0' )
-    {
-        sprintf( p->pMan->sError, "Line %d: Delay value (%s) appears to be invalid.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntryLast(vTokens) );
-        return 0;
-    }
-    // find the PI/PO numbers
-    if ( fOutput )
-    {
-        if ( Vec_PtrSize(vTokens) == 3 )
-        {
-            RetValue = Ntl_ModelFindPioNumber( p->pNtk, 0, 1, (char *)Vec_PtrEntry(vTokens, 1), &Number );
-            if ( RetValue == 0 )
-            {
-                sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among POs.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
-                return 0;
-            }
-        }
-        // store the values
-        if ( p->pNtk->vTimeOutputs == NULL )
-            p->pNtk->vTimeOutputs = Vec_IntAlloc( 100 );
-        Vec_IntPush( p->pNtk->vTimeOutputs, Number );
-        Vec_IntPush( p->pNtk->vTimeOutputs, Aig_Float2Int(Delay) );        
-    }
-    else
-    {
-        if ( Vec_PtrSize(vTokens) == 3 )
-        {
-            RetValue = Ntl_ModelFindPioNumber( p->pNtk, 1, 0, (char *)Vec_PtrEntry(vTokens, 1), &Number );
-            if ( RetValue == 0 )
-            {
-                sprintf( p->pMan->sError, "Line %d: Cannot find signal \"%s\" among PIs.", Ntl_ReadGetLine(p->pMan, pToken), (char*)Vec_PtrEntry(vTokens, 1) );
-                return 0;
-            }
-        }
-        // store the values
-        if ( p->pNtk->vTimeInputs == NULL )
-            p->pNtk->vTimeInputs = Vec_IntAlloc( 100 );
-        Vec_IntPush( p->pNtk->vTimeInputs, Number );
-        Vec_IntPush( p->pNtk->vTimeInputs, Aig_Float2Int(Delay) );        
-    }
-    return 1;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Constructs the SOP cover from the file parsing info.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static char * Ntl_ReadParseTableBlif( Ntl_ReadMod_t * p, char * pTable, int nFanins )
-{
-    Vec_Ptr_t * vTokens = p->pMan->vTokens;
-    Vec_Str_t * vFunc = p->pMan->vFunc;
-    char * pProduct, * pOutput;
-    int i, Polarity = -1;
-
-
-    p->pMan->nTablesRead++;
-    // get the tokens
-    Ntl_ReadSplitIntoTokens( vTokens, pTable, '.' );
-    if ( Vec_PtrSize(vTokens) == 0 )
-        return Ntl_ManStoreSop( p->pMan->pDesign->pMemSops, " 0\n" );
-    if ( Vec_PtrSize(vTokens) == 1 )
-    {
-        pOutput = (char *)Vec_PtrEntry( vTokens, 0 );
-        if ( *pOutput == '\"' )
-            return Ntl_ManStoreSop( p->pMan->pDesign->pMemSops, pOutput );
-        if ( ((pOutput[0] - '0') & 0x8E) || pOutput[1] )
-        {
-            sprintf( p->pMan->sError, "Line %d: Constant table has wrong output value \"%s\".", Ntl_ReadGetLine(p->pMan, pOutput), pOutput );
-            return NULL;
-        }
-        return Ntl_ManStoreSop( p->pMan->pDesign->pMemSops, (pOutput[0] == '0') ? " 0\n" : " 1\n" );
-    }
-    pProduct = (char *)Vec_PtrEntry( vTokens, 0 );
-    if ( Vec_PtrSize(vTokens) % 2 == 1 )
-    {
-        sprintf( p->pMan->sError, "Line %d: Table has odd number of tokens (%d).", Ntl_ReadGetLine(p->pMan, pProduct), Vec_PtrSize(vTokens) );
-        return NULL;
-    }
-    // parse the table
-    Vec_StrClear( vFunc );
-    for ( i = 0; i < Vec_PtrSize(vTokens)/2; i++ )
-    {
-        pProduct = (char *)Vec_PtrEntry( vTokens, 2*i + 0 );
-        pOutput  = (char *)Vec_PtrEntry( vTokens, 2*i + 1 );
-        if ( strlen(pProduct) != (unsigned)nFanins )
-        {
-            sprintf( p->pMan->sError, "Line %d: Cube \"%s\" has size different from the fanin count (%d).", Ntl_ReadGetLine(p->pMan, pProduct), pProduct, nFanins );
-            return NULL;
-        }
-        if ( ((pOutput[0] - '0') & 0x8E) || pOutput[1] )
-        {
-            sprintf( p->pMan->sError, "Line %d: Output value \"%s\" is incorrect.", Ntl_ReadGetLine(p->pMan, pProduct), pOutput );
-            return NULL;
-        }
-        if ( Polarity == -1 )
-            Polarity = pOutput[0] - '0';
-        else if ( Polarity != pOutput[0] - '0' )
-        {
-            sprintf( p->pMan->sError, "Line %d: Output value \"%s\" differs from the value in the first line of the table (%d).", Ntl_ReadGetLine(p->pMan, pProduct), pOutput, Polarity );
-            return NULL;
-        }
-        // parse one product 
-        Vec_StrPrintStr( vFunc, pProduct );
-        Vec_StrPush( vFunc, ' ' );
-        Vec_StrPush( vFunc, pOutput[0] );
-        Vec_StrPush( vFunc, '\n' );
-    }
-    Vec_StrPush( vFunc, '\0' );
-    return Vec_StrArray( vFunc );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Parses the nodes line.]
-
-  Description []
-  
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static int Ntl_ReadParseLineNamesBlif( Ntl_ReadMod_t * p, char * pLine )
-{
-    Vec_Ptr_t * vTokens = p->pMan->vTokens;
-    Ntl_Obj_t * pNode;
-    Ntl_Net_t * pNetOut, * pNetIn;
-    char * pNameOut, * pNameIn;
-    int i;
-    Ntl_ReadSplitIntoTokens( vTokens, pLine, '\0' );
-    // parse the mapped node
-//    if ( !strcmp(Vec_PtrEntry(vTokens,0), "gate") )
-//        return Ntl_ReadParseLineGateBlif( p, vTokens );
-    // parse the regular name line
-    assert( !strcmp((char *)Vec_PtrEntry(vTokens,0), "names") );
-    pNameOut = (char *)Vec_PtrEntryLast( vTokens );
-    pNetOut = Ntl_ModelFindOrCreateNet( p->pNtk, pNameOut );
-    // create fanins
-    pNode = Ntl_ModelCreateNode( p->pNtk, Vec_PtrSize(vTokens) - 2 );
-    for ( i = 0; i < Vec_PtrSize(vTokens) - 2; i++ )
-    {
-        pNameIn = (char *)Vec_PtrEntry(vTokens, i+1);
-        pNetIn = Ntl_ModelFindOrCreateNet( p->pNtk, pNameIn );
-        Ntl_ObjSetFanin( pNode, pNetIn, i );
-    }
-    if ( !Ntl_ModelSetNetDriver( pNode, pNetOut ) )
-    {
-        sprintf( p->pMan->sError, "Line %d: Signal \"%s\" is defined more than once.", Ntl_ReadGetLine(p->pMan, pNameOut), pNameOut );
-        return 0;
-    }
-    // parse the table of this node
-    pNode->pSop = Ntl_ReadParseTableBlif( p, pNameOut + strlen(pNameOut), pNode->nFanins );
-    if ( pNode->pSop == NULL )
-        return 0;
-    pNode->pSop = Ntl_ManStoreSop( p->pNtk->pMan->pMemSops, pNode->pSop );
-    return 1;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlSweep.c b/src/aig/ntl/ntlSweep.c
deleted file mode 100644
index 29e40f30..00000000
--- a/src/aig/ntl/ntlSweep.c
+++ /dev/null
@@ -1,214 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlSweep.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Performs structural sweep of the netlist.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlSweep.c,v 1.1 2008/10/10 14:09:30 mjarvin Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Detects logic that does not fanout into POs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManSweepMark_rec( Ntl_Man_t * p, Ntl_Obj_t * pObj )
-{
-    Ntl_Net_t * pNet;
-    int i;
-    if ( pObj->fMark )
-        return;
-    pObj->fMark = 1;
-    Ntl_ObjForEachFanin( pObj, pNet, i )
-        Ntl_ManSweepMark_rec( p, pNet->pDriver );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Detects logic that does not fanout into POs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManSweepMark( Ntl_Man_t * p )
-{
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pObj;
-    int i;
-    // get the root model
-    pRoot = Ntl_ManRootModel( p );
-    // clear net visited flags
-    Ntl_ModelForEachObj( pRoot, pObj, i )
-        assert( pObj->fMark == 0 );
-    // label the primary inputs
-    Ntl_ModelForEachPi( pRoot, pObj, i )
-        pObj->fMark = 1;
-    // start from the primary outputs
-    Ntl_ModelForEachPo( pRoot, pObj, i )
-        Ntl_ManSweepMark_rec( p, pObj );
-    // start from the persistant boxes
-    Ntl_ModelForEachBox( pRoot, pObj, i )
-        if ( pObj->pImplem->attrKeep )
-            Ntl_ManSweepMark_rec( p, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes logic that does not fanout into POs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManSweep( Ntl_Man_t * p, int fVerbose )
-{
-    int nObjsOld[NTL_OBJ_VOID];
-    Ntl_Mod_t * pRoot, * pMod;
-    Ntl_Net_t * pNet;
-    Ntl_Obj_t * pObj;
-    int i, k, nNetsOld;
-    int ModelCounter = 0, Counter = 0;
-
-    // remember the number of objects
-    pRoot = Ntl_ManRootModel( p );
-    for ( i = 0; i < NTL_OBJ_VOID; i++ )
-        nObjsOld[i] = pRoot->nObjs[i];
-    nNetsOld = Ntl_ModelCountNets(pRoot);
-
-    // mark the nets that do not fanout into POs
-    Ntl_ManSweepMark( p );
-
-    // count how many boxes of each type are swept away
-    if ( fVerbose )
-    {
-    Ntl_ManForEachModel( p, pMod, i )
-        pMod->nUsed = pMod->nRems = 0;
-    Ntl_ModelForEachObj( pRoot, pObj, i )
-        if ( Ntl_ObjIsBox(pObj) && pObj->pImplem )
-        {
-            pObj->pImplem->nUsed++;
-            if ( !pObj->fMark )
-            {
-                if ( pObj->pImplem->nRems++ == 0 )
-                    ModelCounter++;
-            }
-        }
-    }
-
-    // remove the useless objects and their nets
-    Ntl_ModelForEachObj( pRoot, pObj, i )
-    {
-        if ( pObj->fMark )
-        {
-            pObj->fMark = 0;
-            continue;
-        }
-        // remove the fanout nets
-        Ntl_ObjForEachFanout( pObj, pNet, k )
-            if ( pNet != NULL && pNet->pName[0] != 0 )
-            {
-                Ntl_ModelDeleteNet( pRoot, pNet );
-                Vec_PtrWriteEntry( pRoot->vNets, pNet->NetId, NULL );
-            }
-        // remove the object
-        if ( Ntl_ObjIsNode(pObj) && Ntl_ObjFaninNum(pObj) == 1 )
-            pRoot->nObjs[NTL_OBJ_LUT1]--;
-        else 
-            pRoot->nObjs[pObj->Type]--;
-        Vec_PtrWriteEntry( pRoot->vObjs, pObj->Id, NULL );
-        pObj->Type = NTL_OBJ_NONE;
-        Counter++;
-    }
- 
-
-
-    // print detailed statistics of sweeping
-    if ( fVerbose && Counter > 0)
-    {
-        int numLutBox = 0;
-
-        printf( "Swept away:" );
-        printf( "  Node = %d (%4.1f %%)", 
-            nObjsOld[NTL_OBJ_NODE] - pRoot->nObjs[NTL_OBJ_NODE],
-            !nObjsOld[NTL_OBJ_NODE]? 0.0: 100.0 * (nObjsOld[NTL_OBJ_NODE] - pRoot->nObjs[NTL_OBJ_NODE]) / nObjsOld[NTL_OBJ_NODE] );
-        printf( "  Buf/Inv = %d (%4.1f %%)", 
-            nObjsOld[NTL_OBJ_LUT1] - pRoot->nObjs[NTL_OBJ_LUT1],
-            !nObjsOld[NTL_OBJ_LUT1]? 0.0: 100.0 * (nObjsOld[NTL_OBJ_LUT1] - pRoot->nObjs[NTL_OBJ_LUT1]) / nObjsOld[NTL_OBJ_LUT1] );
-        printf( "  Lat = %d (%4.1f %%)", 
-            nObjsOld[NTL_OBJ_LATCH] - pRoot->nObjs[NTL_OBJ_LATCH],
-            !nObjsOld[NTL_OBJ_LATCH]? 0.0: 100.0 * (nObjsOld[NTL_OBJ_LATCH] - pRoot->nObjs[NTL_OBJ_LATCH]) / nObjsOld[NTL_OBJ_LATCH] );
-        printf( "  Box = %d (%4.1f %%)", 
-            nObjsOld[NTL_OBJ_BOX] - pRoot->nObjs[NTL_OBJ_BOX],
-            !nObjsOld[NTL_OBJ_BOX]? 0.0: 100.0 * (nObjsOld[NTL_OBJ_BOX] - pRoot->nObjs[NTL_OBJ_BOX]) / nObjsOld[NTL_OBJ_BOX] );
-        printf( "\n" );
-        if ( ModelCounter )
-        {
-            printf( "Sweep removed %d boxed of %d types (out of %d types):\n", 
-                nObjsOld[NTL_OBJ_BOX] - pRoot->nObjs[NTL_OBJ_BOX], ModelCounter, Vec_PtrSize(p->vModels)-1 );
-            Ntl_ManForEachModel( p, pMod, i )
-            {
-                if ( i && (pMod->nRems + pMod->nUsed-pMod->nRems) > 0)
-                {
-
-                    if (strncmp(pMod->pName, "LUT", 3) != 0)
-                    {
-                        //printf( "( M%d: %s,  S=%d, L=%d ) ", i, pMod->pName, pMod->nRems, pMod->nUsed-pMod->nRems );
-                        //printf( "Model %3d : %-40s  Swept = %5d. Left = %5d.\n", i, pMod->pName, pMod->nRems, pMod->nUsed-pMod->nRems );
-                    } else
-                    {
-                        numLutBox++;
-                    }
-                }
-            }
-//            printf("\nLUTboxType =%d\n", numLutBox);
-        }
-    }
-    if ( !Ntl_ManCheck( p ) )
-        printf( "Ntl_ManSweep: The check has failed for design %s.\n", p->pName );
-    return Counter;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlTable.c b/src/aig/ntl/ntlTable.c
deleted file mode 100644
index 23207081..00000000
--- a/src/aig/ntl/ntlTable.c
+++ /dev/null
@@ -1,554 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlTable.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Name table manipulation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlTable.c,v 1.3 2008/10/24 14:18:44 mjarvin Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// hashing for strings
-static unsigned Ntl_HashString( const char * pName, int TableSize ) 
-{
-    static int s_Primes[10] = { 
-        1291, 1699, 2357, 4177, 5147, 
-        5647, 6343, 7103, 7873, 8147
-    };
-    unsigned i, Key = 0;
-    for ( i = 0; pName[i] != '\0'; i++ )
-        Key ^= s_Primes[i%10]*pName[i]*pName[i];
-    return Key % TableSize;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates memory for the net.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Net_t * Ntl_ModelCreateNet( Ntl_Mod_t * p, const char * pName )
-{
-    Ntl_Net_t * pNet;
-    int nSize = sizeof(Ntl_Net_t) + strlen(pName) + 1;
-    nSize = (nSize / sizeof(char*) + ((nSize % sizeof(char*)) > 0)) * sizeof(char*); // added by Saurabh on Sep 3, 2009
-    pNet = (Ntl_Net_t *)Aig_MmFlexEntryFetch( p->pMan->pMemObjs, nSize );
-    memset( pNet, 0, sizeof(Ntl_Net_t) );
-    strcpy( pNet->pName, pName );
-    pNet->NetId = Vec_PtrSize( p->vNets );
-    Vec_PtrPush( p->vNets, pNet );
-    return pNet;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates memory for the net.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Ntl_ModelCreateNetName( Ntl_Mod_t * p, const char * pName, int Num )
-{
-    char * pResult;
-    char Buffer[1000];
-    assert( strlen(pName) < 900 );
-    do {
-        sprintf( Buffer, "%s%d", pName, Num++ );
-    } while ( Ntl_ModelFindNet( p, Buffer ) != NULL );
-    pResult = (char *)Aig_MmFlexEntryFetch( p->pMan->pMemObjs, strlen(Buffer) + 1 );
-    strcpy( pResult, Buffer );
-    return pResult;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resizes the table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ModelTableResize( Ntl_Mod_t * p )
-{
-    Ntl_Net_t ** pTableNew, ** ppSpot, * pEntry, * pEntry2;
-    int nTableSizeNew, Counter, e, clk;
-clk = clock();
-    // get the new table size
-    nTableSizeNew = Aig_PrimeCudd( 3 * p->nTableSize ); 
-    // allocate a new array
-    pTableNew = ABC_ALLOC( Ntl_Net_t *, nTableSizeNew );
-    memset( pTableNew, 0, sizeof(Ntl_Net_t *) * nTableSizeNew );
-    // rehash entries 
-    Counter = 0;
-    for ( e = 0; e < p->nTableSize; e++ )
-        for ( pEntry = p->pTable[e], pEntry2 = pEntry? pEntry->pNext : NULL; 
-              pEntry; pEntry = pEntry2, pEntry2 = pEntry? pEntry->pNext : NULL )
-            {
-                ppSpot = pTableNew + Ntl_HashString( pEntry->pName, nTableSizeNew );
-                pEntry->pNext = *ppSpot;
-                *ppSpot = pEntry;
-                Counter++;
-            }
-    assert( Counter == p->nEntries );
-//    printf( "Increasing the structural table size from %6d to %6d. ", p->nTableSize, nTableSizeNew );
-//    ABC_PRT( "Time", clock() - clk );
-    // replace the table and the parameters
-    ABC_FREE( p->pTable );
-    p->pTable = pTableNew;
-    p->nTableSize = nTableSizeNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds net.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Net_t * Ntl_ModelFindNet( Ntl_Mod_t * p, const char * pName )
-{
-    Ntl_Net_t * pEnt;
-    unsigned Key = Ntl_HashString( pName, p->nTableSize );
-    for ( pEnt = p->pTable[Key]; pEnt; pEnt = pEnt->pNext )
-        if ( !strcmp( pEnt->pName, pName ) )
-            return pEnt;
-    return NULL;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deletes net from the hash table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ModelDeleteNet( Ntl_Mod_t * p, Ntl_Net_t * pNet )
-{
-    Ntl_Net_t * pEnt, * pPrev;
-    unsigned Key = Ntl_HashString( pNet->pName, p->nTableSize );
-    for ( pPrev = NULL, pEnt = p->pTable[Key]; pEnt; pPrev = pEnt, pEnt = pEnt->pNext )
-        if ( pEnt == pNet )
-            break;
-    if ( pEnt == NULL )
-    {
-        printf( "Ntl_ModelDeleteNet(): Net to be deleted is not found in the hash table.\n" );
-        return;
-    }
-    if ( pPrev == NULL )
-        p->pTable[Key] = pEnt->pNext;
-    else
-        pPrev->pNext = pEnt->pNext;
-    p->nEntries--;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts net into the hash table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ModelInsertNet( Ntl_Mod_t * p, Ntl_Net_t * pNet )
-{
-    unsigned Key = Ntl_HashString( pNet->pName, p->nTableSize );
-    assert( Ntl_ModelFindNet( p, pNet->pName ) == NULL );
-    pNet->pNext = p->pTable[Key];
-    p->pTable[Key] = pNet;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds or creates the net.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Net_t * Ntl_ModelFindOrCreateNet( Ntl_Mod_t * p, const char * pName )
-{
-    Ntl_Net_t * pEnt;
-    unsigned Key = Ntl_HashString( pName, p->nTableSize );
-    for ( pEnt = p->pTable[Key]; pEnt; pEnt = pEnt->pNext )
-        if ( !strcmp( pEnt->pName, pName ) )
-            return pEnt;
-    pEnt = Ntl_ModelCreateNet( p, pName );
-    pEnt->pNext = p->pTable[Key];
-    p->pTable[Key] = pEnt;
-    if ( ++p->nEntries > 2 * p->nTableSize )
-        Ntl_ModelTableResize( p );
-    return pEnt;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates new net.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Net_t * Ntl_ModelDontFindCreateNet( Ntl_Mod_t * p, const char * pName )
-{
-    Ntl_Net_t * pEnt;
-    unsigned Key = Ntl_HashString( pName, p->nTableSize );
-    pEnt = Ntl_ModelCreateNet( p, pName );
-    pEnt->pNext = p->pTable[Key];
-    p->pTable[Key] = pEnt;
-    if ( ++p->nEntries > 2 * p->nTableSize )
-        Ntl_ModelTableResize( p );
-    return pEnt;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Assigns numbers to PIs and POs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ModelSetPioNumbers( Ntl_Mod_t * p )
-{
-    Ntl_Obj_t * pObj;
-    int i;
-    Ntl_ModelForEachPi( p, pObj, i )
-        pObj->iTemp = i;
-    Ntl_ModelForEachPo( p, pObj, i )
-        pObj->iTemp = i;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns -1, 0, +1 (when it is PI, not found, or PO).]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelFindPioNumber_old( Ntl_Mod_t * p, int fPiOnly, int fPoOnly, const char * pName, int * pNumber )
-{
-    Ntl_Net_t * pNet;
-    Ntl_Obj_t * pObj;
-    int i;
-    *pNumber = -1;
-    pNet = Ntl_ModelFindNet( p, pName );
-    if ( pNet == NULL )
-        return 0;
-    if ( fPiOnly )
-    {
-        Ntl_ModelForEachPi( p, pObj, i )
-        {
-            if ( Ntl_ObjFanout0(pObj) == pNet )
-            {
-                *pNumber = i;
-                return -1;
-            }
-        }
-        return 0;
-    }
-    if ( fPoOnly )
-    {
-        Ntl_ModelForEachPo( p, pObj, i )
-        {
-            if ( Ntl_ObjFanin0(pObj) == pNet )
-            {
-                *pNumber = i;
-                return 1;
-            }
-        }
-        return 0;
-    }
-    Ntl_ModelForEachPo( p, pObj, i )
-    {
-        if ( Ntl_ObjFanin0(pObj) == pNet )
-        {
-            *pNumber = i;
-            return 1;
-        }
-    }
-    Ntl_ModelForEachPi( p, pObj, i )
-    {
-        if ( Ntl_ObjFanout0(pObj) == pNet )
-        {
-            *pNumber = i;
-            return -1;
-        }
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns -1, 0, +1 (when it is PI, not found, or PO).]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelFindPioNumber( Ntl_Mod_t * p, int fPiOnly, int fPoOnly, const char * pName, int * pNumber )
-{
-    Ntl_Net_t * pNet;
-    Ntl_Obj_t * pTerm;
-    *pNumber = -1;
-    pNet = Ntl_ModelFindNet( p, pName );
-    if ( pNet == NULL )
-        return 0;
-    if ( fPiOnly )
-    {
-        pTerm = pNet->pDriver;
-        if ( pTerm && Ntl_ObjIsPi(pTerm) )
-        {
-            *pNumber = pTerm->iTemp;
-            return -1;
-        }
-        return 0;
-    }
-    if ( fPoOnly )
-    {
-        pTerm = (Ntl_Obj_t *)pNet->pCopy;
-        if ( pTerm && Ntl_ObjIsPo(pTerm) )
-        {
-            *pNumber = pTerm->iTemp;
-            return 1;
-        }
-        return 0;
-    }
-    pTerm = (Ntl_Obj_t *)pNet->pCopy;
-    if ( pTerm && Ntl_ObjIsPo(pTerm) )
-    {
-        *pNumber = pTerm->iTemp;
-        return 1;
-    }
-    pTerm = pNet->pDriver;
-    if ( pTerm && Ntl_ObjIsPi(pTerm) )
-    {
-        *pNumber = pTerm->iTemp;
-        return -1;
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sets the driver of the net.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelSetNetDriver( Ntl_Obj_t * pObj, Ntl_Net_t * pNet )
-{
-    if ( pObj->pFanio[pObj->nFanins] != NULL )
-        return 0;
-    if ( pNet->pDriver != NULL )
-        return 0;
-    pObj->pFanio[pObj->nFanins] = pNet;
-    pNet->pDriver = pObj;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Clears the driver of the net.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelClearNetDriver( Ntl_Obj_t * pObj, Ntl_Net_t * pNet )
-{
-    if ( pObj->pFanio[pObj->nFanins] == NULL )
-        return 0;
-    if ( pNet->pDriver == NULL )
-        return 0;
-    pObj->pFanio[pObj->nFanins] = NULL;
-    pNet->pDriver = NULL;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of nets.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelCountNets( Ntl_Mod_t * p )
-{
-    Ntl_Net_t * pNet;
-    int i, Counter = 0;
-    Ntl_ModelForEachNet( p, pNet, i )
-        Counter++;
-    return Counter;
-}
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Resizes the table.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManModelTableResize( Ntl_Man_t * p )
-{
-    Ntl_Mod_t ** pModTableNew, ** ppSpot, * pEntry, * pEntry2;
-    int nModTableSizeNew, Counter, e, clk;
-clk = clock();
-    // get the new table size
-    nModTableSizeNew = Aig_PrimeCudd( 3 * p->nModTableSize ); 
-    // allocate a new array
-    pModTableNew = ABC_ALLOC( Ntl_Mod_t *, nModTableSizeNew );
-    memset( pModTableNew, 0, sizeof(Ntl_Mod_t *) * nModTableSizeNew );
-    // rehash entries 
-    Counter = 0;
-    for ( e = 0; e < p->nModTableSize; e++ )
-        for ( pEntry = p->pModTable[e], pEntry2 = pEntry? pEntry->pNext : NULL; 
-              pEntry; pEntry = pEntry2, pEntry2 = pEntry? pEntry->pNext : NULL )
-            {
-                ppSpot = pModTableNew + Ntl_HashString( pEntry->pName, nModTableSizeNew );
-                pEntry->pNext = *ppSpot;
-                *ppSpot = pEntry;
-                Counter++;
-            }
-    assert( Counter == p->nModEntries );
-//    printf( "Increasing the structural table size from %6d to %6d. ", p->nTableSize, nTableSizeNew );
-//    ABC_PRT( "Time", clock() - clk );
-    // replace the table and the parameters
-    ABC_FREE( p->pModTable );
-    p->pModTable = pModTableNew;
-    p->nModTableSize = nModTableSizeNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds or creates the net.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManAddModel( Ntl_Man_t * p, Ntl_Mod_t * pModel )
-{
-    Ntl_Mod_t * pEnt;
-    unsigned Key = Ntl_HashString( pModel->pName, p->nModTableSize );
-    for ( pEnt = p->pModTable[Key]; pEnt; pEnt = pEnt->pNext )
-        if ( !strcmp( pEnt->pName, pModel->pName ) )
-            return 0;
-    pModel->pNext = p->pModTable[Key];
-    p->pModTable[Key] = pModel;
-    if ( ++p->nModEntries > 2 * p->nModTableSize )
-        Ntl_ManModelTableResize( p );
-    Vec_PtrPush( p->vModels, pModel );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds or creates the net.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Mod_t * Ntl_ManFindModel( Ntl_Man_t * p, const char * pName )
-{
-    Ntl_Mod_t * pEnt;
-    unsigned Key = Ntl_HashString( pName, p->nModTableSize );
-    for ( pEnt = p->pModTable[Key]; pEnt; pEnt = pEnt->pNext )
-        if ( !strcmp( pEnt->pName, pName ) )
-            return pEnt;
-    return NULL;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlTime.c b/src/aig/ntl/ntlTime.c
deleted file mode 100644
index 7a531482..00000000
--- a/src/aig/ntl/ntlTime.c
+++ /dev/null
@@ -1,245 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlTime.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Creates timing manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlTime.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-float * Ntl_ManCreateDelayTable( Vec_Int_t * vDelays, int nIns, int nOuts )
-{
-    float * pDelayTable, Delay;
-    int iIn, iOut, i, k;
-    assert( Vec_IntSize(vDelays) % 3 == 0 );
-    pDelayTable = ABC_ALLOC( float, nIns * nOuts );
-    memset( pDelayTable, 0, sizeof(float) * nIns * nOuts );
-    Vec_IntForEachEntry( vDelays, iIn, i )
-    {
-        iOut = Vec_IntEntry(vDelays, ++i);
-        Delay = Aig_Int2Float( Vec_IntEntry(vDelays, ++i) );
-        if ( iIn == -1 && iOut == -1 )
-            for ( k = 0; k < nIns * nOuts; k++ )
-                pDelayTable[k] = Delay;
-        else if ( iIn == -1 )
-            for ( k = 0; k < nIns; k++ )
-                pDelayTable[iOut * nIns + k] = Delay;
-        else if ( iOut == -1 )
-            for ( k = 0; k < nOuts; k++ )
-                pDelayTable[k * nIns + iIn] = Delay;
-        else 
-            pDelayTable[iOut * nIns + iIn] = Delay;
-    }
-    return pDelayTable;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Records the arrival times for the map leaves.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManUnpackLeafTiming( Ntl_Man_t * p, Tim_Man_t * pMan )
-{
-    Vec_Int_t * vTimes;
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet;
-    float dTime;
-    int i, k, v, Entry, Counter;
-    // clean the place
-    pRoot = Ntl_ManRootModel( p );
-    Ntl_ModelForEachMapLeaf( pRoot, pObj, i )
-        Ntl_ObjForEachFanout( pObj, pNet, k )
-            pNet->dTemp = 0;
-    // store the PI timing
-    vTimes = pRoot->vTimeInputs;
-    if ( vTimes ) {
-      Vec_IntForEachEntry( vTimes, Entry, i )
-      {
-          dTime = Aig_Int2Float( Vec_IntEntry(vTimes,++i) );
-          if ( Entry == -1 )
-          {
-              Ntl_ModelForEachPi( pRoot, pObj, v )
-                  Ntl_ObjFanout0(pObj)->dTemp = dTime;
-          }
-          else
-          {
-              pObj = Ntl_ModelPi( pRoot, Entry );
-              Ntl_ObjFanout0(pObj)->dTemp = dTime;
-          }
-      }
-    }
-    // store box timing
-    Ntl_ModelForEachMapLeaf( pRoot, pObj, k )
-    {
-        if ( !(Ntl_ObjIsBox(pObj) && Ntl_BoxIsSeq(pObj)) )
-            continue;
-        vTimes = pObj->pImplem->vTimeOutputs;
-        if ( vTimes == NULL )
-            continue;
-        Vec_IntForEachEntry( vTimes, Entry, i )
-        {
-            dTime = Aig_Int2Float( Vec_IntEntry(vTimes,++i) );
-            if ( Entry == -1 )
-            {
-                Ntl_ObjForEachFanout( pObj, pNet, v )
-                    pNet->dTemp = dTime;
-            }
-            else
-            {
-                pNet = Ntl_ObjFanout( pObj, Entry );
-                pNet->dTemp = dTime;
-            }
-        }
-    }
-    // load them into the timing manager
-    Counter = 0;
-    Ntl_ModelForEachMapLeaf( pRoot, pObj, i )
-        Ntl_ObjForEachFanout( pObj, pNet, k )
-        {
-            if ( pNet->dTemp == TIM_ETERNITY )
-                pNet->dTemp = -TIM_ETERNITY;
-            Tim_ManInitCiArrival( pMan, Counter++, pNet->dTemp );
-        }
-    assert( Counter == p->iLastCi );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Records the required times for the map leaves.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManUnpackRootTiming( Ntl_Man_t * p, Tim_Man_t * pMan )
-{
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Tim_Man_t * Ntl_ManCreateTiming( Ntl_Man_t * p )
-{
-    Tim_Man_t * pMan;
-    Vec_Ptr_t * vDelayTables;
-    Ntl_Mod_t * pRoot, * pModel;
-    Ntl_Obj_t * pObj;
-    int i, curPi, iBox;//, Entry;
-    assert( p->pAig != NULL );
-    pRoot = Ntl_ManRootModel( p );
-    // start the timing manager
-    pMan = Tim_ManStart( Aig_ManPiNum(p->pAig), Aig_ManPoNum(p->pAig) );
-    // unpack the timing data
-    Ntl_ManUnpackLeafTiming( p, pMan );
-//    Ntl_ManUnpackRootTiming( p, pMan );
-/*
-    if ( pRoot->vTimeInputs )
-    {
-        Vec_IntForEachEntry( pRoot->vTimeInputs, Entry, i )
-        {
-            if ( Entry == -1 )
-                Tim_ManSetCiArrivalAll( pMan, Aig_Int2Float(Vec_IntEntry(pRoot->vTimeInputs,++i)) );
-            else
-                Tim_ManInitCiArrival( pMan, Entry, Aig_Int2Float(Vec_IntEntry(pRoot->vTimeInputs,++i)) );
-        }
-    }
-    // unpack the data in the required times
-    if ( pRoot->vTimeOutputs )
-    {
-        Vec_IntForEachEntry( pRoot->vTimeOutputs, Entry, i )
-        {
-            if ( Entry == -1 )
-                Tim_ManSetCoRequiredAll( pMan, Aig_Int2Float(Vec_IntEntry(pRoot->vTimeOutputs,++i)) );
-            else
-                Tim_ManInitCoRequired( pMan, Entry, Aig_Int2Float(Vec_IntEntry(pRoot->vTimeOutputs,++i)) );
-        }
-    }
-*/
-    // derive timing tables for the whilte comb boxes
-    vDelayTables = Vec_PtrAlloc( Vec_PtrSize(p->vModels) );
-    Ntl_ManForEachModel( p, pModel, i )
-    {
-        if ( pModel->vDelays )
-            pModel->pDelayTable = Ntl_ManCreateDelayTable( pModel->vDelays, Ntl_ModelPiNum(pModel), Ntl_ModelPoNum(pModel) );
-        Vec_PtrPush( vDelayTables, pModel->pDelayTable );
-    }
-    Tim_ManSetDelayTables( pMan, vDelayTables );
-    // set up the boxes
-    iBox = 0;
-    curPi = p->iLastCi;
-    Vec_PtrForEachEntry( Ntl_Obj_t *, p->vVisNodes, pObj, i )
-    {
-        if ( !Ntl_ObjIsBox(pObj) )
-            continue;
-        Tim_ManCreateBoxFirst( pMan, Vec_IntEntry(p->vBox1Cios, iBox), Ntl_ObjFaninNum(pObj), curPi, Ntl_ObjFanoutNum(pObj), pObj->pImplem->pDelayTable );
-        curPi += Ntl_ObjFanoutNum(pObj);
-        iBox++;
-    }
-    // forget refs to the delay tables in the network
-    Ntl_ManForEachModel( p, pModel, i )
-        pModel->pDelayTable = NULL;
-//    Tim_ManPrint( pMan );
-    return pMan;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlUtil.c b/src/aig/ntl/ntlUtil.c
deleted file mode 100644
index c3c6fd49..00000000
--- a/src/aig/ntl/ntlUtil.c
+++ /dev/null
@@ -1,737 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlUtil.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Various utilities.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlUtil.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Returns one if the file has a given extension.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_FileIsType( char * pFileName, char * pS1, char * pS2, char * pS3 )
-{
-    int lenS, lenF = strlen(pFileName);
-    lenS = pS1 ? strlen(pS1) : 0;
-    if ( lenS && lenF > lenS && !strncmp( pFileName+lenF-lenS, pS1, lenS ) )
-        return 1;
-    lenS = pS2 ? strlen(pS2) : 0;
-    if ( lenS && lenF > lenS && !strncmp( pFileName+lenF-lenS, pS2, lenS ) )
-        return 1;
-    lenS = pS3 ? strlen(pS3) : 0;
-    if ( lenS && lenF > lenS && !strncmp( pFileName+lenF-lenS, pS3, lenS ) )
-        return 1;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads the maximum number of fanins.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelGetFaninMax( Ntl_Mod_t * pRoot )
-{
-    Ntl_Obj_t * pNode;
-    int i, nFaninsMax = 0;
-    Ntl_ModelForEachNode( pRoot, pNode, i )
-    {
-        if ( nFaninsMax < Ntl_ObjFaninNum(pNode) )
-            nFaninsMax = Ntl_ObjFaninNum(pNode);
-    }
-    return nFaninsMax;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [If the net is driven by an inv/buf, returns its fanin.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ntl_Net_t * Ntl_ModelFindSimpleNet( Ntl_Net_t * pNetCo )
-{
-    // skip the case when the net is not driven by a node
-    if ( !Ntl_ObjIsNode(pNetCo->pDriver) )
-        return NULL;
-    // skip the case when the node is not an inv/buf
-    if ( Ntl_ObjFaninNum(pNetCo->pDriver) != 1 )
-        return NULL;
-    return Ntl_ObjFanin0(pNetCo->pDriver);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Connects COs to the internal nodes other than inv/bufs.]
-
-  Description [Should be called immediately after reading from file.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManCountSimpleCoDriversOne( Ntl_Net_t * pNetCo )
-{
-    Ntl_Net_t * pNetFanin;
-    // skip the case when the net is not driven by a node
-    if ( !Ntl_ObjIsNode(pNetCo->pDriver) )
-        return 0;
-    // skip the case when the node is not an inv/buf
-    if ( Ntl_ObjFaninNum(pNetCo->pDriver) != 1 )
-        return 0;
-    // skip the case when the second-generation driver is not a node
-    pNetFanin = Ntl_ObjFanin0(pNetCo->pDriver);
-    if ( !Ntl_ObjIsNode(pNetFanin->pDriver) )
-        return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts COs that are connected to the internal nodes through invs/bufs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManCountSimpleCoDrivers( Ntl_Man_t * p )
-{
-    Ntl_Net_t * pNetCo;
-    Ntl_Obj_t * pObj;
-    Ntl_Mod_t * pRoot;
-    int i, k, Counter;
-    Counter = 0;
-    pRoot = Ntl_ManRootModel( p );
-    Ntl_ModelForEachPo( pRoot, pObj, i )
-        Counter += Ntl_ManCountSimpleCoDriversOne( Ntl_ObjFanin0(pObj) );
-    Ntl_ModelForEachLatch( pRoot, pObj, i )
-        Counter += Ntl_ManCountSimpleCoDriversOne( Ntl_ObjFanin0(pObj) );
-    Ntl_ModelForEachBox( pRoot, pObj, i )
-        Ntl_ObjForEachFanin( pObj, pNetCo, k )
-            Counter += Ntl_ManCountSimpleCoDriversOne( pNetCo );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the array of CI names.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Ntl_ManCollectCiNames( Ntl_Man_t * p )
-{
-    Vec_Ptr_t * vNames;
-    Ntl_Net_t * pNet;
-    int i;
-    vNames = Vec_PtrAlloc( 1000 );
-    Ntl_ManForEachCiNet( p, pNet, i )
-        Vec_PtrPush( vNames, pNet->pName );
-    return vNames;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the array of CI names.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Ntl_ManCollectCoNames( Ntl_Man_t * p )
-{
-    Vec_Ptr_t * vNames;
-    Ntl_Net_t * pNet;
-    int i;
-    vNames = Vec_PtrAlloc( 1000 );
-    Ntl_ManForEachCoNet( p, pNet, i )
-        Vec_PtrPush( vNames, pNet->pName );
-    return vNames;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Marks the CI/CO nets.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManMarkCiCoNets( Ntl_Man_t * p )
-{
-    Ntl_Net_t * pNet;
-    int i;
-    Ntl_ManForEachCiNet( p, pNet, i )
-        pNet->fMark = 1;
-    Ntl_ManForEachCoNet( p, pNet, i )
-        pNet->fMark = 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Unmarks the CI/CO nets.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManUnmarkCiCoNets( Ntl_Man_t * p )
-{
-    Ntl_Net_t * pNet;
-    int i;
-    Ntl_ManForEachCiNet( p, pNet, i )
-        pNet->fMark = 0;
-    Ntl_ManForEachCoNet( p, pNet, i )
-        pNet->fMark = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Convert initial values of registers to be zero.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManSetZeroInitValues( Ntl_Man_t * p )
-{
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pObj;
-    int i;
-    pRoot = Ntl_ManRootModel(p);
-    Ntl_ModelForEachLatch( pRoot, pObj, i )
-        pObj->LatchId.regInit = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transforms the netlist to have latches with const-0 init-values.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManAddInverters( Ntl_Mod_t * pRoot, Ntl_Obj_t * pObj )
-{
-    char * pStore;
-//    Ntl_Mod_t * pRoot = pObj->pModel;
-    Ntl_Man_t * pMan = pRoot->pMan;
-    Ntl_Net_t * pNetLo, * pNetLi, * pNetLoInv, * pNetLiInv;
-    Ntl_Obj_t * pNode;
-    int nLength, RetValue;
-    assert( Ntl_ObjIsInit1( pObj ) );
-    // get the nets
-    pNetLi = Ntl_ObjFanin0(pObj);
-    pNetLo = Ntl_ObjFanout0(pObj);
-    // get storage for net names
-    nLength = strlen(pNetLi->pName) + strlen(pNetLo->pName) + 10; 
-    pStore = Aig_MmFlexEntryFetch( pMan->pMemSops, nLength );
-    // create input interter
-    pNode = Ntl_ModelCreateNode( pRoot, 1 );
-    pNode->pSop = Ntl_ManStoreSop( pMan->pMemSops, "0 1\n" );
-    Ntl_ObjSetFanin( pNode, pNetLi, 0 );
-    // create input net
-    strcpy( pStore, pNetLi->pName );
-    strcat( pStore, "_inv" );
-    if ( Ntl_ModelFindNet( pRoot, pStore ) )
-    {
-        printf( "Ntl_ManTransformInitValues(): Internal error! Cannot create net with LI-name + _inv\n" );
-        return;
-    }
-    pNetLiInv = Ntl_ModelFindOrCreateNet( pRoot, pStore );
-    RetValue = Ntl_ModelSetNetDriver( pNode, pNetLiInv );
-    assert( RetValue );
-    // connect latch to the input net
-    Ntl_ObjSetFanin( pObj, pNetLiInv, 0 );
-    // disconnect latch from the output net
-    RetValue = Ntl_ModelClearNetDriver( pObj, pNetLo );
-    assert( RetValue );
-    // create the output net
-    strcpy( pStore, pNetLo->pName );
-    strcat( pStore, "_inv" );
-    if ( Ntl_ModelFindNet( pRoot, pStore ) )
-    {
-        printf( "Ntl_ManTransformInitValues(): Internal error! Cannot create net with LO-name + _inv\n" );
-        return;
-    }
-    pNetLoInv = Ntl_ModelFindOrCreateNet( pRoot, pStore );
-    RetValue = Ntl_ModelSetNetDriver( pObj, pNetLoInv );
-    assert( RetValue );
-    // create output interter
-    pNode = Ntl_ModelCreateNode( pRoot, 1 );
-    pNode->pSop = Ntl_ManStoreSop( pMan->pMemSops, "0 1\n" );
-    Ntl_ObjSetFanin( pNode, pNetLoInv, 0 );
-    // redirect the old output net
-    RetValue = Ntl_ModelSetNetDriver( pNode, pNetLo );
-    assert( RetValue );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transforms the netlist to have latches with const-0 init-values.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManTransformInitValues( Ntl_Man_t * p )
-{
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pObj;
-    int i;
-    pRoot = Ntl_ManRootModel(p);
-    Ntl_ModelForEachLatch( pRoot, pObj, i )
-    {
-        if ( Ntl_ObjIsInit1( pObj ) )
-            Ntl_ManAddInverters( pRoot, pObj );
-        pObj->LatchId.regInit = 0;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transforms register classes.]
-
-  Description [Returns the vector of vectors containing the numbers
-  of registers belonging to the same class. Skips classes containing
-  less than the given number of registers.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Vec_t * Ntl_ManTransformRegClasses( Ntl_Man_t * pMan, int nSizeMax, int fVerbose )
-{
-    Vec_Ptr_t * vParts;
-    Vec_Int_t * vPart;
-    int * pClassNums, nClasses;
-    int Class, ClassMax, i, k;
-    if ( Vec_IntSize(pMan->vRegClasses) == 0 )
-    {
-        printf( "Ntl_ManReportRegClasses(): Register classes are not defined.\n" );
-//        return (Vec_Vec_t *)Vec_PtrAlloc(0);
-        return NULL;
-    }
-    // find the largest class
-    ClassMax = -1;
-    Vec_IntForEachEntry( pMan->vRegClasses, Class, k )
-    {
-        if ( Class < 0 )
-        {
-            printf( "Ntl_ManReportRegClasses(): Register class (%d) is negative.\n", Class );
-            return NULL;
-        }
-        if ( ClassMax < Class )
-            ClassMax = Class;
-    }
-    if ( ClassMax > 1000000 )
-    {
-        printf( "Ntl_ManReportRegClasses(): The largest number of a register class (%d) is too large (> 1000000).\n", ClassMax );
-        return NULL;
-    }
-    // count the number of classes
-    pClassNums = ABC_CALLOC( int, ClassMax + 1 );
-    Vec_IntForEachEntry( pMan->vRegClasses, Class, k )
-        pClassNums[Class]++;
-    // count the number of classes
-    nClasses = 0;
-    for ( i = 0; i <= ClassMax; i++ )
-        nClasses += (int)(pClassNums[i] > 0);
-    // report the classes
-    if ( fVerbose && nClasses > 1 )
-    {
-        printf( "The number of register clases = %d.\n", nClasses );
-        for ( i = 0; i <= ClassMax; i++ )
-            if ( pClassNums[i] )
-                printf( "(%d, %d)  ", i, pClassNums[i] );
-        printf( "\n" );
-    }
-    // skip if there is only one class
-    if ( nClasses == 1 )
-    {
-        vParts = NULL;
-        if ( Vec_IntSize(pMan->vRegClasses) >= nSizeMax )
-        {
-            vParts = Vec_PtrAlloc( 100 );
-            vPart = Vec_IntStartNatural( Vec_IntSize(pMan->vRegClasses) );
-            Vec_PtrPush( vParts, vPart );
-        }
-        printf( "There is only one class with %d registers.\n", Vec_IntSize(pMan->vRegClasses) );
-        ABC_FREE( pClassNums );
-        return (Vec_Vec_t *)vParts;
-    }
-    // create classes
-    vParts = Vec_PtrAlloc( 100 );
-    for ( i = 0; i <= ClassMax; i++ )
-    {
-        if ( pClassNums[i] == 0 || pClassNums[i] < nSizeMax )
-            continue;
-        vPart = Vec_IntAlloc( pClassNums[i] );
-        Vec_IntForEachEntry( pMan->vRegClasses, Class, k )
-            if ( Class == i )
-                Vec_IntPush( vPart, k );
-        assert( Vec_IntSize(vPart) == pClassNums[i] );
-        Vec_PtrPush( vParts, vPart );
-    }
-    ABC_FREE( pClassNums );
-    Vec_VecSort( (Vec_Vec_t *)vParts, 1 );
-    // report the selected classes
-    if ( fVerbose )
-    {
-        printf( "The number of selected register clases = %d.\n", Vec_PtrSize(vParts) );
-        Vec_PtrForEachEntry( Vec_Int_t *, vParts, vPart, i )
-            printf( "(%d, %d)  ", i, Vec_IntSize(vPart) );
-        printf( "\n" );
-    }
-    return (Vec_Vec_t *)vParts;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Filter register clases using clock-domain information.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManFilterRegisterClasses( Aig_Man_t * pAig, Vec_Int_t * vRegClasses, int fVerbose )
-{
-    Aig_Obj_t * pObj, * pRepr;
-    int i, k, nOmitted, nTotal;
-    if ( pAig->pReprs == NULL )
-        return;
-    assert( pAig->nRegs > 0 );
-    Aig_ManForEachPi( pAig, pObj, i )
-        pObj->PioNum = -1;
-    k = 0;
-    Aig_ManForEachLoSeq( pAig, pObj, i )
-        pObj->PioNum = k++;
-    // consider equivalences
-    nOmitted = nTotal = 0;
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        pRepr = pAig->pReprs[pObj->Id];
-        if ( pRepr == NULL )
-            continue;
-        nTotal++;
-        assert( Aig_ObjIsPi(pObj) );
-        assert( Aig_ObjIsPi(pRepr) || Aig_ObjIsConst1(pRepr) );
-        if ( Aig_ObjIsConst1(pRepr) )
-            continue;
-        assert( pObj->PioNum >= 0 && pRepr->PioNum >= 0 );
-        // remove equivalence if they belong to different classes
-        if ( Vec_IntEntry( vRegClasses, pObj->PioNum ) == 
-             Vec_IntEntry( vRegClasses, pRepr->PioNum ) )
-             continue;
-         pAig->pReprs[pObj->Id] = NULL;
-         nOmitted++;
-    }
-    Aig_ManForEachPi( pAig, pObj, i )
-        pObj->PioNum = -1;
-    if ( fVerbose )
-        printf( "Omitted %d (out of %d) equivs due to register class mismatch.\n", 
-            nOmitted, nTotal );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of CIs in the model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManLatchNum( Ntl_Man_t * p )
-{
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pObj;
-    int i, Counter = 0;
-    pRoot = Ntl_ManRootModel(p);
-    Ntl_ModelForEachBox( pRoot, pObj, i )
-        Counter += Ntl_ModelLatchNum( pObj->pImplem );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the design is combinational.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ManIsComb( Ntl_Man_t * p )          
-{ 
-    return Ntl_ManLatchNum(p) == 0; 
-} 
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of CIs in the model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelCombLeafNum( Ntl_Mod_t * p )
-{
-    Ntl_Obj_t * pObj;
-    int i, Counter = 0;
-    Ntl_ModelForEachCombLeaf( p, pObj, i )
-        Counter += Ntl_ObjFanoutNum( pObj );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of COs in the model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelCombRootNum( Ntl_Mod_t * p )
-{
-    Ntl_Obj_t * pObj;
-    int i, Counter = 0;
-    Ntl_ModelForEachCombRoot( p, pObj, i )
-        Counter += Ntl_ObjFaninNum( pObj );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of CIs in the model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelSeqLeafNum( Ntl_Mod_t * p )
-{
-    Ntl_Obj_t * pObj;
-    int i, Counter = 0;
-    Ntl_ModelForEachSeqLeaf( p, pObj, i )
-        Counter += Ntl_ObjFanoutNum( pObj );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of COs in the model.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelSeqRootNum( Ntl_Mod_t * p )
-{
-    Ntl_Obj_t * pObj;
-    int i, Counter = 0;
-    Ntl_ModelForEachSeqRoot( p, pObj, i )
-        Counter += Ntl_ObjFaninNum( pObj );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Unmarks the CI/CO nets.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ntl_ModelCheckNetsAreNotMarked( Ntl_Mod_t * pModel )
-{
-    Ntl_Net_t * pNet;
-    int i;
-    Ntl_ModelForEachNet( pModel, pNet, i )
-        assert( pNet->fMark == 0 );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Unmarks the CI/CO nets.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ModelClearNets( Ntl_Mod_t * pModel )
-{
-    Ntl_Net_t * pNet;
-    int i;
-    Ntl_ModelForEachNet( pModel, pNet, i )
-    {
-        pNet->nVisits = pNet->fMark = 0;
-        pNet->pCopy = pNet->pCopy2 = NULL;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes nets without fanins and fanouts.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManRemoveUselessNets( Ntl_Man_t * p )
-{
-    Ntl_Mod_t * pRoot;
-    Ntl_Obj_t * pNode;
-    Ntl_Net_t * pNet;
-    int i, k, Counter;
-    pRoot = Ntl_ManRootModel( p );
-    Ntl_ModelForEachNet( pRoot, pNet, i )
-        pNet->fMark = 0;
-    Ntl_ModelForEachPi( pRoot, pNode, i )
-    {
-        pNet = Ntl_ObjFanout0(pNode);
-        pNet->fMark = 1;
-    }
-    Ntl_ModelForEachPo( pRoot, pNode, i )
-    {
-        pNet = Ntl_ObjFanin0(pNode);
-        pNet->fMark = 1;
-    }
-    Ntl_ModelForEachNode( pRoot, pNode, i )
-    {
-        Ntl_ObjForEachFanin( pNode, pNet, k )
-            pNet->fMark = 1;
-        Ntl_ObjForEachFanout( pNode, pNet, k )
-            pNet->fMark = 1;
-    }
-    Ntl_ModelForEachBox( pRoot, pNode, i )
-    {
-        Ntl_ObjForEachFanin( pNode, pNet, k )
-            pNet->fMark = 1;
-        Ntl_ObjForEachFanout( pNode, pNet, k )
-            pNet->fMark = 1;
-    }
-    Counter = 0;
-    Ntl_ModelForEachNet( pRoot, pNet, i )
-    {
-        if ( pNet->fMark )
-        {
-            pNet->fMark = 0;
-            continue;
-        }
-        if ( pNet->fFixed )
-            continue;
-        Ntl_ModelDeleteNet( pRoot, pNet );
-        Vec_PtrWriteEntry( pRoot->vNets, pNet->NetId, NULL );
-        Counter++;
-    }
-    if ( Counter )
-        printf( "Deleted %d nets without fanins/fanouts.\n", Counter );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlWriteBlif.c b/src/aig/ntl/ntlWriteBlif.c
deleted file mode 100644
index f9b2781f..00000000
--- a/src/aig/ntl/ntlWriteBlif.c
+++ /dev/null
@@ -1,697 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlWriteBlif.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Command processing package.]
-
-  Synopsis    [Procedures to write BLIF files.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlWriteBlif.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-// The code in this file is developed in collaboration with Mark Jarvin of Toronto.
-
-#include "ntl.h"
-#include "ioa.h"
-
-#include <stdarg.h>
-#include "bzlib.h"
-#include "zlib.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-#ifdef _WIN32
-#define vsnprintf _vsnprintf
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
- 
-/**Function*************************************************************
-
-  Synopsis    [Writes one model into the BLIF file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManWriteBlifModel( FILE * pFile, Ntl_Mod_t * pModel, int fMain )
-{
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet;
-    float Delay;
-    int i, k;
-    fprintf( pFile, ".model %s\n", pModel->pName );
-    if ( pModel->attrWhite || pModel->attrBox || pModel->attrComb || pModel->attrKeep )
-    {
-        fprintf( pFile, ".attrib" );
-        fprintf( pFile, " %s", pModel->attrWhite? "white": "black" );
-        fprintf( pFile, " %s", pModel->attrBox?   "box"  : "logic" );
-        fprintf( pFile, " %s", pModel->attrComb?  "comb" : "seq"   );
-//        fprintf( pFile, " %s", pModel->attrKeep?  "keep" : "sweep" );
-        fprintf( pFile, "\n" );
-    }
-    if ( pModel->attrNoMerge )
-        fprintf( pFile, ".no_merge\n" );
-    fprintf( pFile, ".inputs" );
-    Ntl_ModelForEachPi( pModel, pObj, i )
-        fprintf( pFile, " %s", Ntl_ObjFanout0(pObj)->pName );
-    fprintf( pFile, "\n" );
-    fprintf( pFile, ".outputs" );
-    Ntl_ModelForEachPo( pModel, pObj, i )
-        fprintf( pFile, " %s", Ntl_ObjFanin0(pObj)->pName );
-    fprintf( pFile, "\n" );
-    // write delays
-    if ( pModel->vDelays )
-    {
-        for ( i = 0; i < Vec_IntSize(pModel->vDelays); i += 3 )
-        {
-            fprintf( pFile, ".delay" );
-            if ( Vec_IntEntry(pModel->vDelays,i) != -1 )
-                fprintf( pFile, " %s", Ntl_ObjFanout0(Ntl_ModelPi(pModel, Vec_IntEntry(pModel->vDelays,i)))->pName );
-            if ( Vec_IntEntry(pModel->vDelays,i+1) != -1 )
-                fprintf( pFile, " %s", Ntl_ObjFanin0(Ntl_ModelPo(pModel, Vec_IntEntry(pModel->vDelays,i+1)))->pName );
-            fprintf( pFile, " %.3f", Aig_Int2Float(Vec_IntEntry(pModel->vDelays,i+2)) );
-            fprintf( pFile, "\n" );
-        }
-    }
-    if ( pModel->vTimeInputs )
-    {
-        for ( i = 0; i < Vec_IntSize(pModel->vTimeInputs); i += 2 )
-        {
-            if ( fMain )
-                fprintf( pFile, ".input_arrival" );
-            else
-                fprintf( pFile, ".input_required" );
-            if ( Vec_IntEntry(pModel->vTimeInputs,i) != -1 )
-                fprintf( pFile, " %s", Ntl_ObjFanout0(Ntl_ModelPi(pModel, Vec_IntEntry(pModel->vTimeInputs,i)))->pName );
-            Delay = Aig_Int2Float(Vec_IntEntry(pModel->vTimeInputs,i+1));
-            if ( Delay == -TIM_ETERNITY )
-                fprintf( pFile, " -inf" );
-            else if ( Delay == TIM_ETERNITY )
-                fprintf( pFile, " inf" );
-            else
-                fprintf( pFile, " %.3f", Delay );
-            fprintf( pFile, "\n" );
-        }
-    }
-    if ( pModel->vTimeOutputs )
-    {
-        for ( i = 0; i < Vec_IntSize(pModel->vTimeOutputs); i += 2 )
-        {
-            if ( fMain )
-                fprintf( pFile, ".output_required" );
-            else
-                fprintf( pFile, ".output_arrival" );
-            if ( Vec_IntEntry(pModel->vTimeOutputs,i) != -1 )
-                fprintf( pFile, " %s", Ntl_ObjFanin0(Ntl_ModelPo(pModel, Vec_IntEntry(pModel->vTimeOutputs,i)))->pName );
-            Delay = Aig_Int2Float(Vec_IntEntry(pModel->vTimeOutputs,i+1));
-            if ( Delay == -TIM_ETERNITY )
-                fprintf( pFile, " -inf" );
-            else if ( Delay == TIM_ETERNITY )
-                fprintf( pFile, " inf" );
-            else
-                fprintf( pFile, " %.3f", Delay );
-            fprintf( pFile, "\n" );
-        }
-    }
-    // write objects
-    Ntl_ModelForEachObj( pModel, pObj, i )
-    {
-        if ( Ntl_ObjIsNode(pObj) )
-        {
-            fprintf( pFile, ".names" );
-            Ntl_ObjForEachFanin( pObj, pNet, k )
-                fprintf( pFile, " %s", pNet->pName );
-            fprintf( pFile, " %s\n", Ntl_ObjFanout0(pObj)->pName );
-            fprintf( pFile, "%s", pObj->pSop );
-            if ( *pObj->pSop == '\"' )
-                fprintf( pFile, "\n" );
-        }
-        else if ( Ntl_ObjIsLatch(pObj) )
-        {
-            fprintf( pFile, ".latch" );
-            fprintf( pFile, " %s", Ntl_ObjFanin0(pObj)->pName );
-            fprintf( pFile, " %s", Ntl_ObjFanout0(pObj)->pName );
-            assert( pObj->LatchId.regType == 0 || pObj->LatchId.regClass == 0 );
-            if ( pObj->LatchId.regType )
-            {
-                if ( pObj->LatchId.regType == 1 )
-                    fprintf( pFile, " fe" );
-                else if ( pObj->LatchId.regType == 2 )
-                    fprintf( pFile, " re" );
-                else if ( pObj->LatchId.regType == 3 )
-                    fprintf( pFile, " ah" );
-                else if ( pObj->LatchId.regType == 4 )
-                    fprintf( pFile, " al" );
-                else if ( pObj->LatchId.regType == 5 )
-                    fprintf( pFile, " as" );
-                else
-                    assert( 0 );
-            }
-            else if ( pObj->LatchId.regClass )
-                fprintf( pFile, " %d", pObj->LatchId.regClass );
-            if ( pObj->pClock )
-                fprintf( pFile, " %s", pObj->pClock->pName );
-            fprintf( pFile, " %d", pObj->LatchId.regInit );
-            fprintf( pFile, "\n" );
-        }
-        else if ( Ntl_ObjIsBox(pObj) )
-        {
-            fprintf( pFile, ".subckt %s", pObj->pImplem->pName );
-            Ntl_ObjForEachFanin( pObj, pNet, k )
-                fprintf( pFile, " %s=%s", Ntl_ModelPiName(pObj->pImplem, k), pNet->pName );
-            Ntl_ObjForEachFanout( pObj, pNet, k )
-                fprintf( pFile, " %s=%s", Ntl_ModelPoName(pObj->pImplem, k), pNet->pName );
-            fprintf( pFile, "\n" );
-        }
-    }
-    fprintf( pFile, ".end\n\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes the netlist into the BLIF file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManWriteBlif_old( Ntl_Man_t * p, char * pFileName )
-{
-    FILE * pFile;
-    Ntl_Mod_t * pModel;
-    int i;
-    // start the output stream
-    pFile = fopen( pFileName, "w" );
-    if ( pFile == NULL )
-    {
-        fprintf( stdout, "Ntl_ManWriteBlif(): Cannot open the output file \"%s\".\n", pFileName );
-        return;
-    }
-    fprintf( pFile, "# Benchmark \"%s\" written by ABC-8 on %s\n", p->pName, Aig_TimeStamp() );
-    // write the models
-    Ntl_ManForEachModel( p, pModel, i )
-        Ntl_ManWriteBlifModel( pFile, pModel, i==0 );
-    // close the file
-    fclose( pFile );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes the logic network into the BLIF file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManWriteBlifLogic( Nwk_Man_t * pNtk, Ntl_Man_t * p, char * pFileName )
-{
-    Ntl_Man_t * pNew;
-    pNew = Ntl_ManInsertNtk( p, pNtk );
-    Ntl_ManWriteBlif( pNew, pFileName );
-    Ntl_ManFree( pNew );
-}
-
-
- 
-/**Function*************************************************************
-
-  Synopsis    [Procedure to write data into BZ2 file.]
-
-  Description [Based on the vsnprintf() man page.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-typedef struct bz2file {
-  FILE   * f;
-  BZFILE * b;
-  char   * buf;
-  int      nBytes;
-  int      nBytesMax;
-} bz2file;
-
-int fprintfBz2(bz2file * b, char * fmt, ...) {
-    if (b->b) {
-        char * newBuf;
-        int bzError;
-        va_list ap;
-        while (1) {
-            va_start(ap,fmt);
-            b->nBytes = vsnprintf(b->buf,b->nBytesMax,fmt,ap);
-            va_end(ap);
-            if (b->nBytes > -1 && b->nBytes < b->nBytesMax)
-                break;
-            if (b->nBytes > -1)
-                b->nBytesMax = b->nBytes + 1;
-            else
-                b->nBytesMax *= 2;
-            if ((newBuf = ABC_REALLOC( char,b->buf,b->nBytesMax )) == NULL)
-                return -1;
-            else
-                b->buf = newBuf;
-        }
-        BZ2_bzWrite( &bzError, b->b, b->buf, b->nBytes );
-        if (bzError == BZ_IO_ERROR) {
-            fprintf( stdout, "Ntl_ManWriteBlif(): I/O error writing to compressed stream.\n" );
-            return -1;
-        }
-        return b->nBytes;
-    } else {
-        int n;
-        va_list ap;
-        va_start(ap,fmt);
-        n = vfprintf( b->f, fmt, ap);
-        va_end(ap);
-        return n;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes one model into the BLIF file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManWriteBlifModelGz( gzFile pFile, Ntl_Mod_t * pModel, int fMain )
-{
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet;
-    float Delay;
-    int i, k;
-    gzprintf( pFile, ".model %s\n", pModel->pName );
-    if ( pModel->attrWhite || pModel->attrBox || pModel->attrComb || pModel->attrKeep )
-    {
-        gzprintf( pFile, ".attrib" );
-        gzprintf( pFile, " %s", pModel->attrWhite? "white": "black" );
-        gzprintf( pFile, " %s", pModel->attrBox?   "box"  : "logic" );
-        gzprintf( pFile, " %s", pModel->attrComb?  "comb" : "seq"   );
-//        gzprintf( pFile, " %s", pModel->attrKeep?  "keep" : "sweep" );
-        gzprintf( pFile, "\n" );
-    }
-    if ( pModel->attrNoMerge )
-        gzprintf( pFile, ".no_merge\n" );    
-    gzprintf( pFile, ".inputs" );
-    Ntl_ModelForEachPi( pModel, pObj, i )
-        gzprintf( pFile, " %s", Ntl_ObjFanout0(pObj)->pName );
-    gzprintf( pFile, "\n" );
-    gzprintf( pFile, ".outputs" );
-    Ntl_ModelForEachPo( pModel, pObj, i )
-        gzprintf( pFile, " %s", Ntl_ObjFanin0(pObj)->pName );
-    gzprintf( pFile, "\n" );
-    // write delays
-    if ( pModel->vDelays )
-    {
-        for ( i = 0; i < Vec_IntSize(pModel->vDelays); i += 3 )
-        {
-            gzprintf( pFile, ".delay" );
-            if ( Vec_IntEntry(pModel->vDelays,i) != -1 )
-                gzprintf( pFile, " %s", Ntl_ObjFanout0(Ntl_ModelPi(pModel, Vec_IntEntry(pModel->vDelays,i)))->pName );
-            if ( Vec_IntEntry(pModel->vDelays,i+1) != -1 )
-                gzprintf( pFile, " %s", Ntl_ObjFanin0(Ntl_ModelPo(pModel, Vec_IntEntry(pModel->vDelays,i+1)))->pName );
-            gzprintf( pFile, " %.3f", Aig_Int2Float(Vec_IntEntry(pModel->vDelays,i+2)) );
-            gzprintf( pFile, "\n" );
-        }
-    }
-    if ( pModel->vTimeInputs )
-    {
-        for ( i = 0; i < Vec_IntSize(pModel->vTimeInputs); i += 2 )
-        {
-            if ( fMain )
-                gzprintf( pFile, ".input_arrival" );
-            else
-                gzprintf( pFile, ".input_required" );
-            if ( Vec_IntEntry(pModel->vTimeInputs,i) != -1 )
-                gzprintf( pFile, " %s", Ntl_ObjFanout0(Ntl_ModelPi(pModel, Vec_IntEntry(pModel->vTimeInputs,i)))->pName );
-            Delay = Aig_Int2Float(Vec_IntEntry(pModel->vTimeInputs,i+1));
-            if ( Delay == -TIM_ETERNITY )
-                gzprintf( pFile, " -inf" );
-            else if ( Delay == TIM_ETERNITY )
-                gzprintf( pFile, " inf" );
-            else
-                gzprintf( pFile, " %.3f", Delay );
-            gzprintf( pFile, "\n" );
-        }
-    }
-    if ( pModel->vTimeOutputs )
-    {
-        for ( i = 0; i < Vec_IntSize(pModel->vTimeOutputs); i += 2 )
-        {
-            if ( fMain )
-                gzprintf( pFile, ".output_required" );
-            else
-                gzprintf( pFile, ".output_arrival" );
-            if ( Vec_IntEntry(pModel->vTimeOutputs,i) != -1 )
-                gzprintf( pFile, " %s", Ntl_ObjFanin0(Ntl_ModelPo(pModel, Vec_IntEntry(pModel->vTimeOutputs,i)))->pName );
-            Delay = Aig_Int2Float(Vec_IntEntry(pModel->vTimeOutputs,i+1));
-            if ( Delay == -TIM_ETERNITY )
-                gzprintf( pFile, " -inf" );
-            else if ( Delay == TIM_ETERNITY )
-                gzprintf( pFile, " inf" );
-            else
-                gzprintf( pFile, " %.3f", Delay );
-            gzprintf( pFile, "\n" );
-        }
-    }
-    // write objects
-    Ntl_ModelForEachObj( pModel, pObj, i )
-    {
-        if ( Ntl_ObjIsNode(pObj) )
-        {
-            gzprintf( pFile, ".names" );
-            Ntl_ObjForEachFanin( pObj, pNet, k )
-                gzprintf( pFile, " %s", pNet->pName );
-            gzprintf( pFile, " %s\n", Ntl_ObjFanout0(pObj)->pName );
-            gzprintf( pFile, "%s", pObj->pSop );
-            if ( *pObj->pSop == '\"' )
-                gzprintf( pFile, "\n" );
-        }
-        else if ( Ntl_ObjIsLatch(pObj) )
-        {
-            gzprintf( pFile, ".latch" );
-            gzprintf( pFile, " %s", Ntl_ObjFanin0(pObj)->pName );
-            gzprintf( pFile, " %s", Ntl_ObjFanout0(pObj)->pName );
-            assert( pObj->LatchId.regType == 0 || pObj->LatchId.regClass == 0 );
-            if ( pObj->LatchId.regType )
-            {
-                if ( pObj->LatchId.regType == 1 )
-                    gzprintf( pFile, " fe" );
-                else if ( pObj->LatchId.regType == 2 )
-                    gzprintf( pFile, " re" );
-                else if ( pObj->LatchId.regType == 3 )
-                    gzprintf( pFile, " ah" );
-                else if ( pObj->LatchId.regType == 4 )
-                    gzprintf( pFile, " al" );
-                else if ( pObj->LatchId.regType == 5 )
-                    gzprintf( pFile, " as" );
-                else
-                    assert( 0 );
-            }
-            else if ( pObj->LatchId.regClass )
-                gzprintf( pFile, " %d", pObj->LatchId.regClass );
-            if ( pObj->pClock )
-                gzprintf( pFile, " %s", pObj->pClock->pName );
-            gzprintf( pFile, " %d", pObj->LatchId.regInit );
-            gzprintf( pFile, "\n" );
-        }
-        else if ( Ntl_ObjIsBox(pObj) )
-        {
-            gzprintf( pFile, ".subckt %s", pObj->pImplem->pName );
-            Ntl_ObjForEachFanin( pObj, pNet, k )
-                gzprintf( pFile, " %s=%s", Ntl_ModelPiName(pObj->pImplem, k), pNet->pName );
-            Ntl_ObjForEachFanout( pObj, pNet, k )
-                gzprintf( pFile, " %s=%s", Ntl_ModelPoName(pObj->pImplem, k), pNet->pName );
-            gzprintf( pFile, "\n" );
-        }
-    }
-    gzprintf( pFile, ".end\n\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes the logic network into the BLIF file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManWriteBlifGz( Ntl_Man_t * p, char * pFileName )
-{
-    Ntl_Mod_t * pModel;
-    int i;
-    gzFile pFile;
-
-    // start the output stream
-    pFile = gzopen( pFileName, "wb" ); // if pFileName doesn't end in ".gz" then this acts as a passthrough to fopen
-    if ( pFile == NULL )
-    {
-        fprintf( stdout, "Ntl_ManWriteBlif(): Cannot open the output file \"%s\".\n", pFileName );
-        return;
-    }
-
-    gzprintf( pFile, "# Benchmark \"%s\" written by ABC-8 on %s\n", p->pName, Aig_TimeStamp() );
-    // write the models
-    Ntl_ManForEachModel( p, pModel, i )
-        Ntl_ManWriteBlifModelGz( pFile, pModel, i==0 );
-    // close the file
-    gzclose( pFile );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Writes one model into the BLIF file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManWriteBlifModelBz2( bz2file * b, Ntl_Mod_t * pModel, int fMain )
-{
-    Ntl_Obj_t * pObj;
-    Ntl_Net_t * pNet;
-    float Delay;
-    int i, k;
-    fprintfBz2( b, ".model %s\n", pModel->pName );
-    if ( pModel->attrWhite || pModel->attrBox || pModel->attrComb || pModel->attrKeep )
-    {
-        fprintfBz2( b, ".attrib" );
-        fprintfBz2( b, " %s", pModel->attrWhite? "white": "black" );
-        fprintfBz2( b, " %s", pModel->attrBox?   "box"  : "logic" );
-        fprintfBz2( b, " %s", pModel->attrComb?  "comb" : "seq"   );
-//        fprintfBz2( b, " %s", pModel->attrKeep?  "keep" : "sweep" );
-        fprintfBz2( b, "\n" );
-    }
-    if ( pModel->attrNoMerge )
-        fprintfBz2( b, ".no_merge\n" );    
-    fprintfBz2( b, ".inputs" );
-    Ntl_ModelForEachPi( pModel, pObj, i )
-        fprintfBz2( b, " %s", Ntl_ObjFanout0(pObj)->pName );
-    fprintfBz2( b, "\n" );
-    fprintfBz2( b, ".outputs" );
-    Ntl_ModelForEachPo( pModel, pObj, i )
-        fprintfBz2( b, " %s", Ntl_ObjFanin0(pObj)->pName );
-    fprintfBz2( b, "\n" );
-    // write delays
-    if ( pModel->vDelays )
-    {
-        for ( i = 0; i < Vec_IntSize(pModel->vDelays); i += 3 )
-        {
-            fprintfBz2( b, ".delay" );
-            if ( Vec_IntEntry(pModel->vDelays,i) != -1 )
-                fprintfBz2( b, " %s", Ntl_ObjFanout0(Ntl_ModelPi(pModel, Vec_IntEntry(pModel->vDelays,i)))->pName );
-            if ( Vec_IntEntry(pModel->vDelays,i+1) != -1 )
-                fprintfBz2( b, " %s", Ntl_ObjFanin0(Ntl_ModelPo(pModel, Vec_IntEntry(pModel->vDelays,i+1)))->pName );
-            fprintfBz2( b, " %.3f", Aig_Int2Float(Vec_IntEntry(pModel->vDelays,i+2)) );
-            fprintfBz2( b, "\n" );
-        }
-    }
-    if ( pModel->vTimeInputs )
-    {
-        for ( i = 0; i < Vec_IntSize(pModel->vTimeInputs); i += 2 )
-        {
-            if ( fMain )
-                fprintfBz2( b, ".input_arrival" );
-            else
-                fprintfBz2( b, ".input_required" );
-            if ( Vec_IntEntry(pModel->vTimeInputs,i) != -1 )
-                fprintfBz2( b, " %s", Ntl_ObjFanout0(Ntl_ModelPi(pModel, Vec_IntEntry(pModel->vTimeInputs,i)))->pName );
-            Delay = Aig_Int2Float(Vec_IntEntry(pModel->vTimeInputs,i+1));
-            if ( Delay == -TIM_ETERNITY )
-                fprintfBz2( b, " -inf" );
-            else if ( Delay == TIM_ETERNITY )
-                fprintfBz2( b, " inf" );
-            else
-                fprintfBz2( b, " %.3f", Delay );
-            fprintfBz2( b, "\n" );
-        }
-    }
-    if ( pModel->vTimeOutputs )
-    {
-        for ( i = 0; i < Vec_IntSize(pModel->vTimeOutputs); i += 2 )
-        {
-            if ( fMain )
-                fprintfBz2( b, ".output_required" );
-            else
-                fprintfBz2( b, ".output_arrival" );
-            if ( Vec_IntEntry(pModel->vTimeOutputs,i) != -1 )
-                fprintfBz2( b, " %s", Ntl_ObjFanin0(Ntl_ModelPo(pModel, Vec_IntEntry(pModel->vTimeOutputs,i)))->pName );
-            Delay = Aig_Int2Float(Vec_IntEntry(pModel->vTimeOutputs,i+1));
-            if ( Delay == -TIM_ETERNITY )
-                fprintfBz2( b, " -inf" );
-            else if ( Delay == TIM_ETERNITY )
-                fprintfBz2( b, " inf" );
-            else
-                fprintfBz2( b, " %.3f", Delay );
-            fprintfBz2( b, "\n" );
-        }
-    }
-    // write objects
-    Ntl_ModelForEachObj( pModel, pObj, i )
-    {
-        if ( Ntl_ObjIsNode(pObj) )
-        {
-            fprintfBz2( b, ".names" );
-            Ntl_ObjForEachFanin( pObj, pNet, k )
-                fprintfBz2( b, " %s", pNet->pName );
-            fprintfBz2( b, " %s\n", Ntl_ObjFanout0(pObj)->pName );
-            fprintfBz2( b, "%s", pObj->pSop );
-            if ( *pObj->pSop == '\"' )
-                fprintfBz2( b, "\n" );
-        }
-        else if ( Ntl_ObjIsLatch(pObj) )
-        {
-            fprintfBz2( b, ".latch" );
-            fprintfBz2( b, " %s", Ntl_ObjFanin0(pObj)->pName );
-            fprintfBz2( b, " %s", Ntl_ObjFanout0(pObj)->pName );
-            assert( pObj->LatchId.regType == 0 || pObj->LatchId.regClass == 0 );
-            if ( pObj->LatchId.regType )
-            {
-                if ( pObj->LatchId.regType == 1 )
-                    fprintfBz2( b, " fe" );
-                else if ( pObj->LatchId.regType == 2 )
-                    fprintfBz2( b, " re" );
-                else if ( pObj->LatchId.regType == 3 )
-                    fprintfBz2( b, " ah" );
-                else if ( pObj->LatchId.regType == 4 )
-                    fprintfBz2( b, " al" );
-                else if ( pObj->LatchId.regType == 5 )
-                    fprintfBz2( b, " as" );
-                else
-                    assert( 0 );
-            }
-            else if ( pObj->LatchId.regClass )
-                fprintfBz2( b, " %d", pObj->LatchId.regClass );
-            if ( pObj->pClock )
-                fprintfBz2( b, " %s", pObj->pClock->pName );
-            fprintfBz2( b, " %d", pObj->LatchId.regInit );
-            fprintfBz2( b, "\n" );
-        }
-        else if ( Ntl_ObjIsBox(pObj) )
-        {
-            fprintfBz2( b, ".subckt %s", pObj->pImplem->pName );
-            Ntl_ObjForEachFanin( pObj, pNet, k )
-                fprintfBz2( b, " %s=%s", Ntl_ModelPiName(pObj->pImplem, k), pNet->pName );
-            Ntl_ObjForEachFanout( pObj, pNet, k )
-                fprintfBz2( b, " %s=%s", Ntl_ModelPoName(pObj->pImplem, k), pNet->pName );
-            fprintfBz2( b, "\n" );
-        }
-    }
-    fprintfBz2( b, ".end\n\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Writes the logic network into the BLIF file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ntl_ManWriteBlif( Ntl_Man_t * p, char * pFileName )
-{
-    Ntl_Mod_t * pModel;
-    int i, bzError;
-    bz2file b;
-    if ( p->pNal && !Ntl_FileIsType(pFileName, ".blif", ".blif.gz", ".blif.bz2") )
-    {
-        p->pNalW( p, pFileName );
-        return;
-    }
-    // write the GZ file
-    if (!strncmp(pFileName+strlen(pFileName)-3,".gz",3)) 
-    {
-        Ntl_ManWriteBlifGz( p, pFileName );
-        return;
-    }
-
-    memset(&b,0,sizeof(b));
-    b.nBytesMax = (1<<12);
-    b.buf = ABC_ALLOC( char,b.nBytesMax );
-
-    // start the output stream
-    b.f = fopen( pFileName, "wb" ); 
-    if ( b.f == NULL )
-    {
-        fprintf( stdout, "Ntl_ManWriteBlif(): Cannot open the output file \"%s\".\n", pFileName );
-        ABC_FREE(b.buf);
-        return;
-    }
-    if (!strncmp(pFileName+strlen(pFileName)-4,".bz2",4)) {
-        b.b = BZ2_bzWriteOpen( &bzError, b.f, 9, 0, 0 );
-        if ( bzError != BZ_OK ) {
-            BZ2_bzWriteClose( &bzError, b.b, 0, NULL, NULL );
-            fprintf( stdout, "Ntl_ManWriteBlif(): Cannot start compressed stream.\n" );
-            fclose( b.f );
-            ABC_FREE(b.buf);
-            return;
-        }
-    }
-
-    fprintfBz2( &b, "# Benchmark \"%s\" written by ABC-8 on %s\n", p->pName, Aig_TimeStamp() );
-    // write the models
-    Ntl_ManForEachModel( p, pModel, i )
-        Ntl_ManWriteBlifModelBz2( &b, pModel, i==0 );
-    // close the file
-    if (b.b) {
-        BZ2_bzWriteClose( &bzError, b.b, 0, NULL, NULL );
-        if (bzError == BZ_IO_ERROR) {
-            fprintf( stdout, "Ntl_ManWriteBlif(): I/O error closing compressed stream.\n" );
-            fclose( b.f );
-            ABC_FREE(b.buf);
-            return;
-        }
-    }
-    fclose( b.f );
-    ABC_FREE(b.buf);
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntl_.c b/src/aig/ntl/ntl_.c
deleted file mode 100644
index 9b0b1d0a..00000000
--- a/src/aig/ntl/ntl_.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntl_.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntl_.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "ntl.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ntl/ntlnwk.h b/src/aig/ntl/ntlnwk.h
deleted file mode 100644
index 0b07f243..00000000
--- a/src/aig/ntl/ntlnwk.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ntlnwk.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist and network representation.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: ntlnwk.h,v 1.3 2008/10/24 14:18:44 mjarvin Exp $]
-
-***********************************************************************/
- 
-#ifndef __NTLNWK_H__
-#define __NTLNWK_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Ntl_Man_t_    Ntl_Man_t;
-typedef struct Nwk_Man_t_    Nwk_Man_t;
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                      INLINED FUNCTIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         ITERATORS                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-extern ABC_DLL Ntl_Man_t * Ntl_ManReadBlif( char * pFileName, int fCheck );
-extern ABC_DLL void        Ntl_ManWriteBlif( Ntl_Man_t * p, char * pFileName );
-
-extern ABC_DLL Tim_Man_t * Ntl_ManReadTimeMan( Ntl_Man_t * p );
-extern ABC_DLL Ntl_Man_t * Ntl_ManDup( Ntl_Man_t * p );
-extern ABC_DLL void        Ntl_ManFree( Ntl_Man_t * p );
-extern ABC_DLL int         Ntl_ManIsComb( Ntl_Man_t * p );
-extern ABC_DLL void        Ntl_ManPrintStats( Ntl_Man_t * p );
-extern ABC_DLL int         Ntl_ManSweep( Ntl_Man_t * p, int fVerbose );
-extern ABC_DLL Ntl_Man_t * Ntl_ManInsertNtk( Ntl_Man_t * p, Nwk_Man_t * pNtk );
-extern ABC_DLL Ntl_Man_t * Ntl_ManInsertAig( Ntl_Man_t * p, Aig_Man_t * pAig );
-extern ABC_DLL Aig_Man_t * Ntl_ManExtract( Ntl_Man_t * p );
-extern ABC_DLL Aig_Man_t * Ntl_ManCollapse( Ntl_Man_t * p, int fSeq );
-extern ABC_DLL Aig_Man_t * Ntl_ManCollapseSeq( Ntl_Man_t * p, int nMinDomSize, int fVerbose );
-extern ABC_DLL Ntl_Man_t * Ntl_ManDupCollapseLuts( Ntl_Man_t * p );
-extern ABC_DLL Ntl_Man_t * Ntl_ManFraig( Ntl_Man_t * p, int nPartSize, int nConfLimit, int nLevelMax, int fUseCSat, int fVerbose );
-extern ABC_DLL void        Ntl_ManPrepareCecMans( Ntl_Man_t * pMan1, Ntl_Man_t * pMan2, Aig_Man_t ** ppAig1, Aig_Man_t ** ppAig2 );
-extern ABC_DLL Vec_Ptr_t * Ntl_ManCollectCiNames( Ntl_Man_t * p );
-extern ABC_DLL Vec_Ptr_t * Ntl_ManCollectCoNames( Ntl_Man_t * p );
-extern ABC_DLL Ntl_Man_t * Ntl_ManScl( Ntl_Man_t * p, int fLatchConst, int fLatchEqual, int fVerbose );
-extern ABC_DLL Ntl_Man_t * Ntl_ManLcorr( Ntl_Man_t * p, int nConfMax, int fScorrGia, int fUseCSat, int fVerbose );
-extern ABC_DLL Ntl_Man_t * Ntl_ManSsw( Ntl_Man_t * p, Fra_Ssw_t * pPars );
-extern ABC_DLL Ntl_Man_t * Ntl_ManScorr( Ntl_Man_t * p, Ssw_Pars_t * pPars );
-extern ABC_DLL void        Ntl_ManTransformInitValues( Ntl_Man_t * p );
-
-extern ABC_DLL void        Ntl_ManPrepareCec( char * pFileName1, char * pFileName2, Aig_Man_t ** ppMan1, Aig_Man_t ** ppMan2 );
-extern ABC_DLL Aig_Man_t * Ntl_ManPrepareSec( char * pFileName1, char * pFileName2 );
-
-extern ABC_DLL Nwk_Man_t * Ntl_ManExtractNwk( Ntl_Man_t * p, Aig_Man_t * pAig, Tim_Man_t * pManTime );
-extern ABC_DLL Nwk_Man_t * Ntl_ManReadNwk( char * pFileName, Aig_Man_t * pAig, Tim_Man_t * pManTime );
-extern ABC_DLL void        Nwk_ManPrintStats( Nwk_Man_t * p, If_Lib_t * pLutLib, int fSaveBest, int fDumpResult, int fPower, Ntl_Man_t * pNtl );
-extern ABC_DLL void        Nwk_ManPrintStatsShort( Ntl_Man_t * p, Aig_Man_t * pAig, Nwk_Man_t * pNtk );
-extern ABC_DLL void        Nwk_ManPrintFanioNew( Nwk_Man_t * p );
-extern ABC_DLL Nwk_Man_t * Nwk_MappingIf( Aig_Man_t * p, Tim_Man_t * pManTime, If_Par_t * pPars );
-extern ABC_DLL void        Nwk_ManSetIfParsDefault( If_Par_t * pPars );
-extern ABC_DLL void        Nwk_ManBidecResyn( Nwk_Man_t * p, int fVerbose );
-extern ABC_DLL Aig_Man_t * Nwk_ManSpeedup( Nwk_Man_t * p, int fUseLutLib, int Percentage, int Degree, int fVerbose, int fVeryVerbose );
-extern ABC_DLL Aig_Man_t * Nwk_ManStrash( Nwk_Man_t * p );
-extern ABC_DLL Vec_Int_t * Nwk_ManLutMerge( Nwk_Man_t * p, void * pPars );
-extern ABC_DLL int         Nwk_ManCheck( Nwk_Man_t * p );
-extern ABC_DLL void        Nwk_ManDumpBlif( Nwk_Man_t * p, char * pFileName, Vec_Ptr_t * vCiNames, Vec_Ptr_t * vCoNames );
-extern ABC_DLL void        Nwk_ManFree( Nwk_Man_t * p );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/nwk/module.make b/src/aig/nwk/module.make
deleted file mode 100644
index f4b19e1a..00000000
--- a/src/aig/nwk/module.make
+++ /dev/null
@@ -1,14 +0,0 @@
-SRC +=    src/aig/nwk/nwkAig.c \
-    src/aig/nwk/nwkCheck.c \
-    src/aig/nwk/nwkBidec.c \
-    src/aig/nwk/nwkDfs.c \
-    src/aig/nwk/nwkFanio.c \
-    src/aig/nwk/nwkFlow.c \
-    src/aig/nwk/nwkMan.c \
-    src/aig/nwk/nwkMap.c \
-    src/aig/nwk/nwkMerge.c \
-    src/aig/nwk/nwkObj.c \
-    src/aig/nwk/nwkSpeedup.c \
-    src/aig/nwk/nwkStrash.c \
-    src/aig/nwk/nwkTiming.c \
-    src/aig/nwk/nwkUtil.c
diff --git a/src/aig/nwk/nwk.h b/src/aig/nwk/nwk.h
deleted file mode 100644
index acbcbf4a..00000000
--- a/src/aig/nwk/nwk.h
+++ /dev/null
@@ -1,307 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwk.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Logic network representation.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwk.h,v 1.1 2008/05/14 22:13:09 wudenni Exp $]
-
-***********************************************************************/
- 
-#ifndef __NWK_H__
-#define __NWK_H__
-
- 
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include "aig.h"
-#include "hop.h"
-#include "tim.h"
-#include "if.h"
-#include "bdc.h"
-
-#include "fra.h"
-#include "ssw.h"
-#include "ntlnwk.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-ABC_NAMESPACE_HEADER_START
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Nwk_Obj_t_    Nwk_Obj_t;
-
-// object types
-typedef enum { 
-    NWK_OBJ_NONE,                      // 0: non-existant object
-    NWK_OBJ_CI,                        // 1: combinational input
-    NWK_OBJ_CO,                        // 2: combinational output
-    NWK_OBJ_NODE,                      // 3: logic node
-    NWK_OBJ_LATCH,                     // 4: register
-    NWK_OBJ_VOID                       // 5: unused object
-} Nwk_Type_t;
-
-struct Nwk_Man_t_
-{
-    // models of this design
-    char *             pName;          // the name of this design
-    char *             pSpec;          // the name of input file
-    // node representation
-    Vec_Ptr_t *        vCis;           // the primary inputs of the extracted part
-    Vec_Ptr_t *        vCos;           // the primary outputs of the extracted part 
-    Vec_Ptr_t *        vObjs;          // the objects in the topological order
-    int                nObjs[NWK_OBJ_VOID]; // counter of objects of each type
-    int                nFanioPlus;     // the number of extra fanins/fanouts alloc by default
-    // functionality, timing, memory, etc
-    Hop_Man_t *        pManHop;        // the functionality representation
-    Tim_Man_t *        pManTime;       // the timing manager
-    If_Lib_t *         pLutLib;        // the LUT library
-    Aig_MmFlex_t *     pMemObjs;       // memory for objects
-    Vec_Ptr_t *        vTemp;          // array used for incremental updates
-    int                nTravIds;       // the counter of traversal IDs
-    int                nRealloced;     // the number of realloced nodes
-    // sequential information
-    int                nLatches;       // the total number of latches 
-    int                nTruePis;       // the number of true primary inputs
-    int                nTruePos;       // the number of true primary outputs
-};
-
-struct Nwk_Obj_t_
-{
-    Nwk_Man_t *        pMan;           // the manager  
-    Hop_Obj_t *        pFunc;          // functionality
-    void *             pCopy;          // temporary pointer
-    union {
-        void *         pNext;          // temporary pointer
-        int            iTemp;          // temporary number
-    };
-    // node information
-    unsigned           Type     :  3;  // object type
-    unsigned           fInvert  :  1;  // complemented attribute
-    unsigned           MarkA    :  1;  // temporary mark  
-    unsigned           MarkB    :  1;  // temporary mark
-    unsigned           MarkC    :  1;  // temporary mark
-    unsigned           PioId    : 25;  // number of this node in the PI/PO list
-    int                Id;             // unique ID
-    int                TravId;         // traversal ID
-    // timing information
-    int                Level;          // the topological level
-    float              tArrival;       // the arrival time
-    float              tRequired;      // the required time
-    float              tSlack;         // the slack
-    // fanin/fanout representation
-    int                nFanins;        // the number of fanins
-    int                nFanouts;       // the number of fanouts
-    int                nFanioAlloc;    // the number of allocated fanins/fanouts
-    Nwk_Obj_t **       pFanio;         // fanins/fanouts
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-
-////////////////////////////////////////////////////////////////////////
-///                      INLINED FUNCTIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-static inline int         Nwk_ManCiNum( Nwk_Man_t * p )           { return p->nObjs[NWK_OBJ_CI];                } 
-static inline int         Nwk_ManCoNum( Nwk_Man_t * p )           { return p->nObjs[NWK_OBJ_CO];                } 
-static inline int         Nwk_ManNodeNum( Nwk_Man_t * p )         { return p->nObjs[NWK_OBJ_NODE];              } 
-static inline int         Nwk_ManLatchNum( Nwk_Man_t * p )        { return p->nObjs[NWK_OBJ_LATCH];             } 
-static inline int         Nwk_ManObjNumMax( Nwk_Man_t * p )       { return Vec_PtrSize(p->vObjs);               }
-
-static inline Nwk_Obj_t * Nwk_ManCi( Nwk_Man_t * p, int i )       { return (Nwk_Obj_t *)Vec_PtrEntry( p->vCis, i );          } 
-static inline Nwk_Obj_t * Nwk_ManCo( Nwk_Man_t * p, int i )       { return (Nwk_Obj_t *)Vec_PtrEntry( p->vCos, i );          } 
-static inline Nwk_Obj_t * Nwk_ManObj( Nwk_Man_t * p, int i )      { return (Nwk_Obj_t *)Vec_PtrEntry( p->vObjs, i );         } 
-
-static inline int         Nwk_ObjId( Nwk_Obj_t * p )              { return p->Id;                               } 
-static inline int         Nwk_ObjPioNum( Nwk_Obj_t * p )          { return p->PioId;                            } 
-static inline int         Nwk_ObjFaninNum( Nwk_Obj_t * p )        { return p->nFanins;                          } 
-static inline int         Nwk_ObjFanoutNum( Nwk_Obj_t * p )       { return p->nFanouts;                         } 
-
-static inline Nwk_Obj_t * Nwk_ObjFanin0( Nwk_Obj_t * p )          { return p->pFanio[0];                        } 
-static inline Nwk_Obj_t * Nwk_ObjFanout0( Nwk_Obj_t * p )         { return p->pFanio[p->nFanins];               } 
-static inline Nwk_Obj_t * Nwk_ObjFanin( Nwk_Obj_t * p, int i )    { return p->pFanio[i];                        } 
-static inline Nwk_Obj_t * Nwk_ObjFanout( Nwk_Obj_t * p, int i )   { return p->pFanio[p->nFanins+1];             } 
-
-static inline int         Nwk_ObjIsNone( Nwk_Obj_t * p )          { return p->Type == NWK_OBJ_NONE;             } 
-static inline int         Nwk_ObjIsCi( Nwk_Obj_t * p )            { return p->Type == NWK_OBJ_CI;               } 
-static inline int         Nwk_ObjIsCo( Nwk_Obj_t * p )            { return p->Type == NWK_OBJ_CO;               } 
-static inline int         Nwk_ObjIsNode( Nwk_Obj_t * p )          { return p->Type == NWK_OBJ_NODE;             } 
-static inline int         Nwk_ObjIsLatch( Nwk_Obj_t * p )         { return p->Type == NWK_OBJ_LATCH;            } 
-static inline int         Nwk_ObjIsPi( Nwk_Obj_t * p )            { return Nwk_ObjIsCi(p) && (p->pMan->pManTime == NULL || Tim_ManBoxForCi(p->pMan->pManTime, p->PioId) == -1); } 
-static inline int         Nwk_ObjIsPo( Nwk_Obj_t * p )            { return Nwk_ObjIsCo(p) && (p->pMan->pManTime == NULL || Tim_ManBoxForCo(p->pMan->pManTime, p->PioId) == -1);  }
-static inline int         Nwk_ObjIsLi( Nwk_Obj_t * p )            { return p->pMan->nTruePos && Nwk_ObjIsCo(p) && (int)p->PioId >= p->pMan->nTruePos;       } 
-static inline int         Nwk_ObjIsLo( Nwk_Obj_t * p )            { return p->pMan->nTruePis && Nwk_ObjIsCi(p) && (int)p->PioId >= p->pMan->nTruePis;       } 
-
-static inline float       Nwk_ObjArrival( Nwk_Obj_t * pObj )                 { return pObj->tArrival;           }
-static inline float       Nwk_ObjRequired( Nwk_Obj_t * pObj )                { return pObj->tRequired;          }
-static inline float       Nwk_ObjSlack( Nwk_Obj_t * pObj )                   { return pObj->tSlack;             }
-static inline void        Nwk_ObjSetArrival( Nwk_Obj_t * pObj, float Time )  { pObj->tArrival   = Time;         }
-static inline void        Nwk_ObjSetRequired( Nwk_Obj_t * pObj, float Time ) { pObj->tRequired  = Time;         }
-static inline void        Nwk_ObjSetSlack( Nwk_Obj_t * pObj, float Time )    { pObj->tSlack     = Time;         }
-
-static inline int         Nwk_ObjLevel( Nwk_Obj_t * pObj )                   { return pObj->Level;              }
-static inline void        Nwk_ObjSetLevel( Nwk_Obj_t * pObj, int Level )     { pObj->Level = Level;             }
-
-static inline void        Nwk_ObjSetTravId( Nwk_Obj_t * pObj, int TravId )   { pObj->TravId = TravId;                           }
-static inline void        Nwk_ObjSetTravIdCurrent( Nwk_Obj_t * pObj )        { pObj->TravId = pObj->pMan->nTravIds;             }
-static inline void        Nwk_ObjSetTravIdPrevious( Nwk_Obj_t * pObj )       { pObj->TravId = pObj->pMan->nTravIds - 1;         }
-static inline int         Nwk_ObjIsTravIdCurrent( Nwk_Obj_t * pObj )         { return pObj->TravId == pObj->pMan->nTravIds;     }
-static inline int         Nwk_ObjIsTravIdPrevious( Nwk_Obj_t * pObj )        { return pObj->TravId == pObj->pMan->nTravIds - 1; }
-
-static inline int         Nwk_ManTimeEqual( float f1, float f2, float Eps )  { return (f1 < f2 + Eps) && (f2 < f1 + Eps);  }
-static inline int         Nwk_ManTimeLess( float f1, float f2, float Eps )   { return (f1 < f2 + Eps);                     }
-static inline int         Nwk_ManTimeMore( float f1, float f2, float Eps )   { return (f1 + Eps > f2);                     }
-
-////////////////////////////////////////////////////////////////////////
-///                         ITERATORS                                ///
-////////////////////////////////////////////////////////////////////////
-
-#define Nwk_ManForEachCi( p, pObj, i )                                     \
-    Vec_PtrForEachEntry( Nwk_Obj_t *, p->vCis, pObj, i )
-#define Nwk_ManForEachCo( p, pObj, i )                                     \
-    Vec_PtrForEachEntry( Nwk_Obj_t *, p->vCos, pObj, i )
-#define Nwk_ManForEachPi( p, pObj, i )                                     \
-    Vec_PtrForEachEntry( Nwk_Obj_t *, p->vCis, pObj, i )                                \
-        if ( !Nwk_ObjIsPi(pObj) ) {} else
-#define Nwk_ManForEachPo( p, pObj, i )                                     \
-    Vec_PtrForEachEntry( Nwk_Obj_t *, p->vCos, pObj, i )                                \
-        if ( !Nwk_ObjIsPo(pObj) ) {} else
-#define Nwk_ManForEachObj( p, pObj, i )                                    \
-    for ( i = 0; (i < Vec_PtrSize(p->vObjs)) && (((pObj) = (Nwk_Obj_t *)Vec_PtrEntry(p->vObjs, i)), 1); i++ ) \
-        if ( pObj == NULL ) {} else
-#define Nwk_ManForEachNode( p, pObj, i )                                   \
-    for ( i = 0; (i < Vec_PtrSize(p->vObjs)) && (((pObj) = (Nwk_Obj_t *)Vec_PtrEntry(p->vObjs, i)), 1); i++ ) \
-        if ( (pObj) == NULL || !Nwk_ObjIsNode(pObj) ) {} else
-#define Nwk_ManForEachLatch( p, pObj, i )                                  \
-    for ( i = 0; (i < Vec_PtrSize(p->vObjs)) && (((pObj) = (Nwk_Obj_t *)Vec_PtrEntry(p->vObjs, i)), 1); i++ ) \
-        if ( (pObj) == NULL || !Nwk_ObjIsLatch(pObj) ) {} else
-
-#define Nwk_ObjForEachFanin( pObj, pFanin, i )                                  \
-    for ( i = 0; (i < (int)(pObj)->nFanins) && ((pFanin) = (pObj)->pFanio[i]); i++ )
-#define Nwk_ObjForEachFanout( pObj, pFanout, i )                                \
-    for ( i = 0; (i < (int)(pObj)->nFanouts) && ((pFanout) = (pObj)->pFanio[(pObj)->nFanins+i]); i++ )
-
-// sequential iterators
-#define Nwk_ManForEachPiSeq( p, pObj, i )                                           \
-    Vec_PtrForEachEntryStop( Nwk_Obj_t *, p->vCis, pObj, i, (p)->nTruePis )
-#define Nwk_ManForEachPoSeq( p, pObj, i )                                           \
-    Vec_PtrForEachEntryStop( Nwk_Obj_t *, p->vCos, pObj, i, (p)->nTruePos )
-#define Nwk_ManForEachLoSeq( p, pObj, i )                                           \
-    for ( i = 0; (i < (p)->nLatches) && (((pObj) = (Nwk_Obj_t *)Vec_PtrEntry(p->vCis, i+(p)->nTruePis)), 1); i++ )
-#define Nwk_ManForEachLiSeq( p, pObj, i )                                           \
-    for ( i = 0; (i < (p)->nLatches) && (((pObj) = (Nwk_Obj_t *)Vec_PtrEntry(p->vCos, i+(p)->nTruePos)), 1); i++ )
-#define Nwk_ManForEachLiLoSeq( p, pObjLi, pObjLo, i )                               \
-    for ( i = 0; (i < (p)->nLatches) && (((pObjLi) = Nwk_ManCo(p, i+(p)->nTruePos)), 1)        \
-        && (((pObjLo) = Nwk_ManCi(p, i+(p)->nTruePis)), 1); i++ )
-
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== nwkAig.c ==========================================================*/
-extern ABC_DLL Vec_Ptr_t *     Nwk_ManDeriveRetimingCut( Aig_Man_t * p, int fForward, int fVerbose );
-/*=== nwkBidec.c ==========================================================*/
-extern ABC_DLL void            Nwk_ManBidecResyn( Nwk_Man_t * pNtk, int fVerbose );
-extern ABC_DLL Hop_Obj_t *     Nwk_NodeIfNodeResyn( Bdc_Man_t * p, Hop_Man_t * pHop, Hop_Obj_t * pRoot, int nVars, Vec_Int_t * vTruth, unsigned * puCare, float dProb );
-/*=== nwkCheck.c ==========================================================*/
-extern ABC_DLL int             Nwk_ManCheck( Nwk_Man_t * p );
-/*=== nwkDfs.c ==========================================================*/
-extern ABC_DLL int             Nwk_ManVerifyTopoOrder( Nwk_Man_t * pNtk );
-extern ABC_DLL int             Nwk_ManLevelBackup( Nwk_Man_t * pNtk );
-extern ABC_DLL int             Nwk_ManLevel( Nwk_Man_t * pNtk );
-extern ABC_DLL int             Nwk_ManLevelMax( Nwk_Man_t * pNtk );
-extern ABC_DLL Vec_Vec_t *     Nwk_ManLevelize( Nwk_Man_t * pNtk );
-extern ABC_DLL Vec_Ptr_t *     Nwk_ManDfs( Nwk_Man_t * pNtk );
-extern ABC_DLL Vec_Ptr_t *     Nwk_ManDfsNodes( Nwk_Man_t * pNtk, Nwk_Obj_t ** ppNodes, int nNodes );
-extern ABC_DLL Vec_Ptr_t *     Nwk_ManDfsReverse( Nwk_Man_t * pNtk );
-extern ABC_DLL Vec_Ptr_t *     Nwk_ManSupportNodes( Nwk_Man_t * pNtk, Nwk_Obj_t ** ppNodes, int nNodes );
-extern ABC_DLL void            Nwk_ManSupportSum( Nwk_Man_t * pNtk );
-extern ABC_DLL int             Nwk_ObjMffcLabel( Nwk_Obj_t * pNode );
-/*=== nwkFanio.c ==========================================================*/
-extern ABC_DLL void            Nwk_ObjCollectFanins( Nwk_Obj_t * pNode, Vec_Ptr_t * vNodes );
-extern ABC_DLL void            Nwk_ObjCollectFanouts( Nwk_Obj_t * pNode, Vec_Ptr_t * vNodes );
-extern ABC_DLL int             Nwk_ObjFindFanin( Nwk_Obj_t * pObj, Nwk_Obj_t * pFanin );
-extern ABC_DLL int             Nwk_ObjFindFanout( Nwk_Obj_t * pObj, Nwk_Obj_t * pFanout );
-extern ABC_DLL void            Nwk_ObjAddFanin( Nwk_Obj_t * pObj, Nwk_Obj_t * pFanin );
-extern ABC_DLL void            Nwk_ObjDeleteFanin( Nwk_Obj_t * pObj, Nwk_Obj_t * pFanin );
-extern ABC_DLL void            Nwk_ObjPatchFanin( Nwk_Obj_t * pObj, Nwk_Obj_t * pFaninOld, Nwk_Obj_t * pFaninNew );
-extern ABC_DLL void            Nwk_ObjTransferFanout( Nwk_Obj_t * pNodeFrom, Nwk_Obj_t * pNodeTo );
-extern ABC_DLL void            Nwk_ObjReplace( Nwk_Obj_t * pNodeOld, Nwk_Obj_t * pNodeNew );
-/*=== nwkFlow.c ============================================================*/
-extern ABC_DLL Vec_Ptr_t *     Nwk_ManRetimeCutForward( Nwk_Man_t * pMan, int nLatches, int fVerbose );
-extern ABC_DLL Vec_Ptr_t *     Nwk_ManRetimeCutBackward( Nwk_Man_t * pMan, int nLatches, int fVerbose );
-/*=== nwkMan.c ============================================================*/
-extern ABC_DLL Nwk_Man_t *     Nwk_ManAlloc();
-extern ABC_DLL void            Nwk_ManFree( Nwk_Man_t * p );
-extern ABC_DLL float           Nwl_ManComputeTotalSwitching( Nwk_Man_t * pNtk );
-extern ABC_DLL void            Nwk_ManPrintStats( Nwk_Man_t * p, If_Lib_t * pLutLib, int fSaveBest, int fDumpResult, int fPower, Ntl_Man_t * pNtl );
-/*=== nwkMap.c ============================================================*/
-extern ABC_DLL Nwk_Man_t *     Nwk_MappingIf( Aig_Man_t * p, Tim_Man_t * pManTime, If_Par_t * pPars );
-/*=== nwkObj.c ============================================================*/
-extern ABC_DLL Nwk_Obj_t *     Nwk_ManCreateCi( Nwk_Man_t * pMan, int nFanouts );
-extern ABC_DLL Nwk_Obj_t *     Nwk_ManCreateCo( Nwk_Man_t * pMan );
-extern ABC_DLL Nwk_Obj_t *     Nwk_ManCreateNode( Nwk_Man_t * pMan, int nFanins, int nFanouts );
-extern ABC_DLL Nwk_Obj_t *     Nwk_ManCreateBox( Nwk_Man_t * pMan, int nFanins, int nFanouts );
-extern ABC_DLL Nwk_Obj_t *     Nwk_ManCreateLatch( Nwk_Man_t * pMan );
-extern ABC_DLL void            Nwk_ManDeleteNode( Nwk_Obj_t * pObj );
-extern ABC_DLL void            Nwk_ManDeleteNode_rec( Nwk_Obj_t * pObj );
-/*=== nwkSpeedup.c ============================================================*/
-extern ABC_DLL Aig_Man_t *     Nwk_ManSpeedup( Nwk_Man_t * pNtk, int fUseLutLib, int Percentage, int Degree, int fVerbose, int fVeryVerbose );
-/*=== nwkStrash.c ============================================================*/
-extern ABC_DLL Aig_Man_t *     Nwk_ManStrash( Nwk_Man_t * pNtk );
-/*=== nwkTiming.c ============================================================*/
-extern ABC_DLL int             Nwk_ManVerifyTiming(  Nwk_Man_t * pNtk );
-extern ABC_DLL void            Nwk_ManDelayTraceSortPins( Nwk_Obj_t * pNode, int * pPinPerm, float * pPinDelays );
-extern ABC_DLL float           Nwk_ManDelayTraceLut( Nwk_Man_t * pNtk );
-extern ABC_DLL void            Nwk_ManDelayTracePrint( Nwk_Man_t * pNtk );
-extern ABC_DLL void            Nwk_ManUpdate( Nwk_Obj_t * pObj, Nwk_Obj_t * pObjNew, Vec_Vec_t * vLevels );
-extern ABC_DLL int             Nwk_ManVerifyLevel( Nwk_Man_t * pNtk );
-/*=== nwkUtil.c ============================================================*/
-extern ABC_DLL void            Nwk_ManIncrementTravId( Nwk_Man_t * pNtk );
-extern ABC_DLL int             Nwk_ManGetFaninMax( Nwk_Man_t * pNtk );
-extern ABC_DLL int             Nwk_ManGetTotalFanins( Nwk_Man_t * pNtk );
-extern ABC_DLL int             Nwk_ManPiNum( Nwk_Man_t * pNtk );
-extern ABC_DLL int             Nwk_ManPoNum( Nwk_Man_t * pNtk );
-extern ABC_DLL int             Nwk_ManGetAigNodeNum( Nwk_Man_t * pNtk );
-extern ABC_DLL int             Nwk_NodeCompareLevelsIncrease( Nwk_Obj_t ** pp1, Nwk_Obj_t ** pp2 );
-extern ABC_DLL int             Nwk_NodeCompareLevelsDecrease( Nwk_Obj_t ** pp1, Nwk_Obj_t ** pp2 );
-extern ABC_DLL void            Nwk_ObjPrint( Nwk_Obj_t * pObj );
-extern ABC_DLL void            Nwk_ManDumpBlif( Nwk_Man_t * pNtk, char * pFileName, Vec_Ptr_t * vCiNames, Vec_Ptr_t * vCoNames );
-extern ABC_DLL void            Nwk_ManPrintFanioNew( Nwk_Man_t * pNtk );
-extern ABC_DLL void            Nwk_ManCleanMarks( Nwk_Man_t * pNtk );
-extern ABC_DLL void            Nwk_ManMinimumBase( Nwk_Man_t * pNtk, int fVerbose );
-extern ABC_DLL void            Nwk_ManRemoveDupFanins( Nwk_Man_t * pNtk, int fVerbose );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/nwk/nwkAig.c b/src/aig/nwk/nwkAig.c
deleted file mode 100644
index b38fbdfa..00000000
--- a/src/aig/nwk/nwkAig.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkAig.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Translating of AIG into the network.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkAig.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Converts AIG into the network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Man_t * Nwk_ManDeriveFromAig( Aig_Man_t * p )
-{
-    Nwk_Man_t * pNtk;
-    Aig_Obj_t * pObj;
-    int i;
-    pNtk = Nwk_ManAlloc();
-    pNtk->nFanioPlus = 0;
-    Hop_ManStop( pNtk->pManHop );
-    pNtk->pManHop = NULL;
-    pNtk->pName = Aig_UtilStrsav( p->pName );
-    pNtk->pSpec = Aig_UtilStrsav( p->pSpec );
-    pObj = Aig_ManConst1(p);
-    pObj->pData = Nwk_ManCreateNode( pNtk, 0, pObj->nRefs );
-    Aig_ManForEachPi( p, pObj, i )
-        pObj->pData = Nwk_ManCreateCi( pNtk, pObj->nRefs );
-    Aig_ManForEachNode( p, pObj, i )
-    {
-        pObj->pData = Nwk_ManCreateNode( pNtk, 2, pObj->nRefs );
-        Nwk_ObjAddFanin( (Nwk_Obj_t *)pObj->pData, (Nwk_Obj_t *)Aig_ObjFanin0(pObj)->pData );
-        Nwk_ObjAddFanin( (Nwk_Obj_t *)pObj->pData, (Nwk_Obj_t *)Aig_ObjFanin1(pObj)->pData );
-    }
-    Aig_ManForEachPo( p, pObj, i )
-    {
-        pObj->pData = Nwk_ManCreateCo( pNtk );
-        Nwk_ObjAddFanin( (Nwk_Obj_t *)pObj->pData, (Nwk_Obj_t *)Aig_ObjFanin0(pObj)->pData );
-    }
-    return pNtk;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Converts AIG into the network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Nwk_ManDeriveRetimingCut( Aig_Man_t * p, int fForward, int fVerbose )
-{ 
-    Vec_Ptr_t * vNodes;
-    Nwk_Man_t * pNtk;
-    Nwk_Obj_t * pNode;
-    Aig_Obj_t * pObj;
-    int i;
-    pNtk = Nwk_ManDeriveFromAig( p );
-    if ( fForward )
-        vNodes = Nwk_ManRetimeCutForward( pNtk, Aig_ManRegNum(p), fVerbose );
-    else
-        vNodes = Nwk_ManRetimeCutBackward( pNtk, Aig_ManRegNum(p), fVerbose );
-    Aig_ManForEachObj( p, pObj, i )
-        ((Nwk_Obj_t *)pObj->pData)->pCopy = pObj;
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vNodes, pNode, i )
-        Vec_PtrWriteEntry( vNodes, i, pNode->pCopy );
-    Nwk_ManFree( pNtk );
-//    assert( Vec_PtrSize(vNodes) <= Aig_ManRegNum(p) );
-    return vNodes;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkBidec.c b/src/aig/nwk/nwkBidec.c
deleted file mode 100644
index 567b904b..00000000
--- a/src/aig/nwk/nwkBidec.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkBidec.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Logic network representation.]
-
-  Synopsis    [Bi-decomposition of local functions.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkBidec.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static inline int  Extra_TruthWordNum( int nVars )  { return nVars <= 5 ? 1 : (1 << (nVars - 5)); }
-static inline void Extra_TruthNot( unsigned * pOut, unsigned * pIn, int nVars )
-{
-    int w;
-    for ( w = Extra_TruthWordNum(nVars)-1; w >= 0; w-- )
-        pOut[w] = ~pIn[w];
-}
-static inline void Extra_TruthOr( unsigned * pOut, unsigned * pIn0, unsigned * pIn1, int nVars )
-{
-    int w;
-    for ( w = Extra_TruthWordNum(nVars)-1; w >= 0; w-- )
-        pOut[w] = pIn0[w] | pIn1[w];
-}
-static inline void Extra_TruthSharp( unsigned * pOut, unsigned * pIn0, unsigned * pIn1, int nVars )
-{
-    int w;
-    for ( w = Extra_TruthWordNum(nVars)-1; w >= 0; w-- )
-        pOut[w] = pIn0[w] & ~pIn1[w];
-}
-
-static inline Hop_Obj_t * Bdc_FunCopyHop( Bdc_Fun_t * pObj )  { return Hop_NotCond( (Hop_Obj_t *)Bdc_FuncCopy(Bdc_Regular(pObj)), Bdc_IsComplement(pObj) );  }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Resynthesizes nodes using bi-decomposition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Hop_Obj_t * Nwk_NodeIfNodeResyn( Bdc_Man_t * p, Hop_Man_t * pHop, Hop_Obj_t * pRoot, int nVars, Vec_Int_t * vTruth, unsigned * puCare, float dProb )
-{
-    unsigned * pTruth;
-    Bdc_Fun_t * pFunc;
-    int nNodes, i;
-    assert( nVars <= 16 );
-    // derive truth table
-    pTruth = Hop_ManConvertAigToTruth( pHop, Hop_Regular(pRoot), nVars, vTruth, 0 );
-    if ( Hop_IsComplement(pRoot) )
-        for ( i = Aig_TruthWordNum(nVars)-1; i >= 0; i-- )
-            pTruth[i] = ~pTruth[i];
-    // perform power-aware decomposition
-    if ( dProb >= 0.0 )
-    {
-        float Prob = (float)2.0 * dProb * (1.0 - dProb);
-        assert( Prob >= 0.0 && Prob <= 0.5 );
-        if ( Prob >= 0.4 )
-        {
-            Extra_TruthNot( puCare, puCare, nVars );
-            if ( dProb > 0.5 ) // more 1s than 0s
-                Extra_TruthOr( pTruth, pTruth, puCare, nVars );
-            else
-                Extra_TruthSharp( pTruth, pTruth, puCare, nVars );
-            Extra_TruthNot( puCare, puCare, nVars );
-            // decompose truth table
-            Bdc_ManDecompose( p, pTruth, NULL, nVars, NULL, 1000 );
-        }
-        else
-        {
-            // decompose truth table
-            Bdc_ManDecompose( p, pTruth, puCare, nVars, NULL, 1000 );
-        }
-    }
-    else
-    {
-        // decompose truth table
-        Bdc_ManDecompose( p, pTruth, puCare, nVars, NULL, 1000 );
-    }
-    // convert back into HOP
-    Bdc_FuncSetCopy( Bdc_ManFunc( p, 0 ), Hop_ManConst1( pHop ) );
-    for ( i = 0; i < nVars; i++ )
-        Bdc_FuncSetCopy( Bdc_ManFunc( p, i+1 ), Hop_ManPi( pHop, i ) );
-    nNodes = Bdc_ManNodeNum(p);
-    for ( i = nVars + 1; i < nNodes; i++ )
-    {
-        pFunc = Bdc_ManFunc( p, i );
-        Bdc_FuncSetCopy( pFunc, Hop_And( pHop, Bdc_FunCopyHop(Bdc_FuncFanin0(pFunc)), Bdc_FunCopyHop(Bdc_FuncFanin1(pFunc)) ) );
-    }
-    return Bdc_FunCopyHop( Bdc_ManRoot(p) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Resynthesizes nodes using bi-decomposition.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManBidecResyn( Nwk_Man_t * pNtk, int fVerbose )
-{
-    Bdc_Par_t Pars = {0}, * pPars = &Pars;
-    Bdc_Man_t * p;
-    Nwk_Obj_t * pObj;
-    Vec_Int_t * vTruth;
-    int i, nGainTotal = 0, nNodes1, nNodes2;
-    int clk = clock();
-    pPars->nVarsMax = Nwk_ManGetFaninMax( pNtk );
-    pPars->fVerbose = fVerbose;
-    if ( pPars->nVarsMax < 2 )
-    {
-        printf( "Resynthesis is not performed for networks whose nodes are less than 2 inputs.\n" );
-        return;
-    }
-    if ( pPars->nVarsMax > 15 )
-    {
-        if ( fVerbose )
-        printf( "Resynthesis is not performed for nodes with more than 15 inputs.\n" );
-        pPars->nVarsMax = 15;
-    }
-    vTruth = Vec_IntAlloc( 0 );
-    p = Bdc_ManAlloc( pPars );
-    Nwk_ManForEachNode( pNtk, pObj, i )
-    {
-        if ( Nwk_ObjFaninNum(pObj) > 15 )
-            continue;
-        nNodes1 = Hop_DagSize(pObj->pFunc);
-        pObj->pFunc = Nwk_NodeIfNodeResyn( p, pNtk->pManHop, pObj->pFunc, Nwk_ObjFaninNum(pObj), vTruth, NULL, -1.0 );
-        nNodes2 = Hop_DagSize(pObj->pFunc);
-        nGainTotal += nNodes1 - nNodes2;
-    }
-    Bdc_ManFree( p );
-    Vec_IntFree( vTruth );
-    if ( fVerbose )
-    {
-    printf( "Total gain in AIG nodes = %d.  ", nGainTotal );
-    ABC_PRT( "Total runtime", clock() - clk );
-    }
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkCheck.c b/src/aig/nwk/nwkCheck.c
deleted file mode 100644
index 24a0d513..00000000
--- a/src/aig/nwk/nwkCheck.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkCheck.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Logic network representation.]
-
-  Synopsis    [Consistency checking procedures.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkCheck.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Checking the logic network for consistency.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManCheck( Nwk_Man_t * p )
-{
-    Nwk_Obj_t * pObj, * pNext;
-    int i, k, m;
-    // check if the nodes have duplicated fanins
-    Nwk_ManForEachNode( p, pObj, i )
-    {
-        for ( k = 0; k < pObj->nFanins; k++ )
-            for ( m = k + 1; m < pObj->nFanins; m++ )
-                if ( pObj->pFanio[k] == pObj->pFanio[m] )
-                    printf( "Node %d has duplicated fanin %d.\n", pObj->Id, pObj->pFanio[k]->Id );
-    }
-    // check if all nodes are in the correct fanin/fanout relationship
-    Nwk_ManForEachObj( p, pObj, i )
-    {
-        Nwk_ObjForEachFanin( pObj, pNext, k )
-            if ( Nwk_ObjFanoutNum(pNext) < 100 && Nwk_ObjFindFanout( pNext, pObj ) == -1 )
-                printf( "Nwk_ManCheck(): Object %d has fanin %d which does not have a corresponding fanout.\n", pObj->Id, pNext->Id );
-        Nwk_ObjForEachFanout( pObj, pNext, k )
-            if ( Nwk_ObjFindFanin( pNext, pObj ) == -1 )
-                printf( "Nwk_ManCheck(): Object %d has fanout %d which does not have a corresponding fanin.\n", pObj->Id, pNext->Id );
-    }
-    return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkDfs.c b/src/aig/nwk/nwkDfs.c
deleted file mode 100644
index 59752c59..00000000
--- a/src/aig/nwk/nwkDfs.c
+++ /dev/null
@@ -1,664 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkDfs.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Logic network representation.]
-
-  Synopsis    [DFS traversals.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkDfs.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Verifies that the objects are in a topo order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManVerifyTopoOrder( Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pObj, * pNext;
-    int i, k, iBox, iTerm1, nTerms;
-    Nwk_ManIncrementTravId( pNtk );
-    Nwk_ManForEachObj( pNtk, pObj, i )
-    {
-        if ( Nwk_ObjIsNode(pObj) || Nwk_ObjIsCo(pObj) )
-        {
-            Nwk_ObjForEachFanin( pObj, pNext, k )
-            {
-                if ( !Nwk_ObjIsTravIdCurrent(pNext) )
-                {
-                    printf( "Node %d has fanin %d that is not in a topological order.\n", pObj->Id, pNext->Id );
-                    return 0;
-                }
-            }
-        }
-        else if ( Nwk_ObjIsCi(pObj) )
-        {
-            if ( pNtk->pManTime )
-            {
-                iBox = Tim_ManBoxForCi( pNtk->pManTime, pObj->PioId );
-                if ( iBox >= 0 ) // this is not a true PI
-                {
-                    iTerm1 = Tim_ManBoxInputFirst( pNtk->pManTime, iBox );
-                    nTerms = Tim_ManBoxInputNum( pNtk->pManTime, iBox );
-                    for ( k = 0; k < nTerms; k++ )
-                    {
-                        pNext = Nwk_ManCo( pNtk, iTerm1 + k );
-                        if ( !Nwk_ObjIsTravIdCurrent(pNext) )
-                        {
-                            printf( "Box %d has input %d that is not in a topological order.\n", iBox, pNext->Id );
-                            return 0;
-                        }
-                    }
-                }
-            }
-        }
-        else
-            assert( 0 );
-        Nwk_ObjSetTravIdCurrent( pObj );
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the number of logic levels not counting PIs/POs.]
-
-  Description [Assumes that white boxes have unit level.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManLevelBackup( Nwk_Man_t * pNtk )
-{
-    Tim_Man_t * pManTimeUnit;
-    Nwk_Obj_t * pObj, * pFanin;
-    int i, k, LevelMax, Level;
-    assert( Nwk_ManVerifyTopoOrder(pNtk) );
-    // clean the levels
-    Nwk_ManForEachObj( pNtk, pObj, i )
-        Nwk_ObjSetLevel( pObj, 0 );
-    // perform level computation
-    LevelMax = 0;
-    pManTimeUnit = pNtk->pManTime ? Tim_ManDupUnit( pNtk->pManTime ) : NULL;
-    if ( pManTimeUnit )
-        Tim_ManIncrementTravId( pManTimeUnit );
-    Nwk_ManForEachObj( pNtk, pObj, i )
-    {
-        if ( Nwk_ObjIsCi(pObj) )
-        {
-            Level = pManTimeUnit? (int)Tim_ManGetCiArrival( pManTimeUnit, pObj->PioId ) : 0;
-            Nwk_ObjSetLevel( pObj, Level );
-        }
-        else if ( Nwk_ObjIsCo(pObj) )
-        {
-            Level = Nwk_ObjLevel( Nwk_ObjFanin0(pObj) );
-            if ( pManTimeUnit )
-                Tim_ManSetCoArrival( pManTimeUnit, pObj->PioId, (float)Level );
-            Nwk_ObjSetLevel( pObj, Level );
-            if ( LevelMax < Nwk_ObjLevel(pObj) )
-                LevelMax = Nwk_ObjLevel(pObj);
-        }
-        else if ( Nwk_ObjIsNode(pObj) )
-        {
-            Level = 0;
-            Nwk_ObjForEachFanin( pObj, pFanin, k )
-                if ( Level < Nwk_ObjLevel(pFanin) )
-                    Level = Nwk_ObjLevel(pFanin);
-            Nwk_ObjSetLevel( pObj, Level + 1 );
-        }
-        else
-            assert( 0 );
-    }
-    // set the old timing manager
-    if ( pManTimeUnit )
-        Tim_ManStop( pManTimeUnit );
-    return LevelMax;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the number of logic levels not counting PIs/POs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManLevel_rec( Nwk_Obj_t * pObj )
-{
-    Tim_Man_t * pManTime = pObj->pMan->pManTime;
-    Nwk_Obj_t * pNext;
-    int i, iBox, iTerm1, nTerms, LevelMax = 0;
-    if ( Nwk_ObjIsTravIdCurrent( pObj ) )
-        return;
-    Nwk_ObjSetTravIdCurrent( pObj );
-    if ( Nwk_ObjIsCi(pObj) )
-    {
-        if ( pManTime ) 
-        {
-            iBox = Tim_ManBoxForCi( pManTime, pObj->PioId );
-            if ( iBox >= 0 ) // this is not a true PI
-            {
-                iTerm1 = Tim_ManBoxInputFirst( pManTime, iBox );
-                nTerms = Tim_ManBoxInputNum( pManTime, iBox );
-                for ( i = 0; i < nTerms; i++ )
-                {
-                    pNext = Nwk_ManCo(pObj->pMan, iTerm1 + i);
-                    Nwk_ManLevel_rec( pNext );
-                    if ( LevelMax < Nwk_ObjLevel(pNext) )
-                        LevelMax = Nwk_ObjLevel(pNext);
-                }
-                LevelMax++;
-            }
-        }
-    }
-    else if ( Nwk_ObjIsNode(pObj) || Nwk_ObjIsCo(pObj) )
-    {
-        Nwk_ObjForEachFanin( pObj, pNext, i )
-        {
-            Nwk_ManLevel_rec( pNext );
-            if ( LevelMax < Nwk_ObjLevel(pNext) )
-                LevelMax = Nwk_ObjLevel(pNext);
-        }
-        if ( Nwk_ObjIsNode(pObj) && Nwk_ObjFaninNum(pObj) > 0 )
-            LevelMax++;
-    }
-    else
-        assert( 0 );
-    Nwk_ObjSetLevel( pObj, LevelMax );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the number of logic levels not counting PIs/POs.]
-
-  Description [Does not assume that the objects are in a topo order.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManLevel( Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pObj;
-    int i, LevelMax = 0;
-    Nwk_ManForEachObj( pNtk, pObj, i )
-        Nwk_ObjSetLevel( pObj, 0 );
-    Nwk_ManIncrementTravId( pNtk );
-    Nwk_ManForEachPo( pNtk, pObj, i )
-    {
-        Nwk_ManLevel_rec( pObj );
-        if ( LevelMax < Nwk_ObjLevel(pObj) )
-            LevelMax = Nwk_ObjLevel(pObj);
-    }
-    Nwk_ManForEachCi( pNtk, pObj, i )
-    {
-        Nwk_ManLevel_rec( pObj );
-        if ( LevelMax < Nwk_ObjLevel(pObj) )
-            LevelMax = Nwk_ObjLevel(pObj);
-    }
-    return LevelMax;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the number of logic levels not counting PIs/POs.]
-
-  Description [Does not assume that the objects are in a topo order.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManLevelMax( Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pObj;
-    int i, LevelMax = 0;
-    Nwk_ManForEachPo( pNtk, pObj, i )
-        if ( LevelMax < Nwk_ObjLevel(pObj) )
-            LevelMax = Nwk_ObjLevel(pObj);
-    return LevelMax;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the array of objects in the AIG manager ordered by level.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Vec_t * Nwk_ManLevelize( Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pObj;
-    Vec_Vec_t * vLevels;
-    int nLevels, i;
-    assert( Nwk_ManVerifyLevel(pNtk) );
-    nLevels = Nwk_ManLevelMax( pNtk );
-    vLevels = Vec_VecStart( nLevels + 1 );
-    Nwk_ManForEachNode( pNtk, pObj, i )
-    {
-        assert( Nwk_ObjLevel(pObj) <= nLevels );
-        Vec_VecPush( vLevels, Nwk_ObjLevel(pObj), pObj );
-    }
-    return vLevels;
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs DFS for one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManDfs_rec( Nwk_Obj_t * pObj, Vec_Ptr_t * vNodes )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( Nwk_ObjIsTravIdCurrent( pObj ) )
-        return;
-    Nwk_ObjSetTravIdCurrent( pObj );
-    Nwk_ObjForEachFanin( pObj, pNext, i )
-        Nwk_ManDfs_rec( pNext, vNodes );
-    Vec_PtrPush( vNodes, pObj );
-}
- 
-/**Function*************************************************************
-
-  Synopsis    [Returns the DFS ordered array of all objects except latches.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Nwk_ManDfs( Nwk_Man_t * pNtk )
-{
-    Vec_Ptr_t * vNodes;
-    Nwk_Obj_t * pObj;
-    int i;
-    Nwk_ManIncrementTravId( pNtk );
-    vNodes = Vec_PtrAlloc( 100 );
-    Nwk_ManForEachObj( pNtk, pObj, i )
-    {
-        if ( Nwk_ObjIsCi(pObj) )
-        {
-            Nwk_ObjSetTravIdCurrent( pObj );
-            Vec_PtrPush( vNodes, pObj );
-        }
-        else if ( Nwk_ObjIsCo(pObj) )
-            Nwk_ManDfs_rec( pObj, vNodes );
-    }
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs DFS for one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManDfsNodes_rec( Nwk_Obj_t * pObj, Vec_Ptr_t * vNodes )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( Nwk_ObjIsTravIdCurrent( pObj ) )
-        return;
-    Nwk_ObjSetTravIdCurrent( pObj );
-    if ( Nwk_ObjIsCi(pObj) )
-        return;
-    assert( Nwk_ObjIsNode(pObj) );
-    Nwk_ObjForEachFanin( pObj, pNext, i )
-        Nwk_ManDfsNodes_rec( pNext, vNodes );
-    Vec_PtrPush( vNodes, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the set of internal nodes rooted in the given nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Nwk_ManDfsNodes( Nwk_Man_t * pNtk, Nwk_Obj_t ** ppNodes, int nNodes )
-{
-    Vec_Ptr_t * vNodes;
-    int i;
-    // set the traversal ID
-    Nwk_ManIncrementTravId( pNtk );
-    // start the array of nodes
-    vNodes = Vec_PtrAlloc( 100 );
-    // go through the PO nodes and call for each of them
-    for ( i = 0; i < nNodes; i++ )
-        if ( Nwk_ObjIsCo(ppNodes[i]) )
-            Nwk_ManDfsNodes_rec( Nwk_ObjFanin0(ppNodes[i]), vNodes );
-        else
-            Nwk_ManDfsNodes_rec( ppNodes[i], vNodes );
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs DFS for one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManDfsReverse_rec( Nwk_Obj_t * pObj, Vec_Ptr_t * vNodes )
-{
-    Nwk_Obj_t * pNext;
-    int i, iBox, iTerm1, nTerms;
-    if ( Nwk_ObjIsTravIdCurrent( pObj ) )
-        return;
-    Nwk_ObjSetTravIdCurrent( pObj );
-    if ( Nwk_ObjIsCo(pObj) )
-    {
-        if ( pObj->pMan->pManTime )
-        {
-            iBox = Tim_ManBoxForCo( pObj->pMan->pManTime, pObj->PioId );
-            if ( iBox >= 0 ) // this is not a true PO
-            {
-                iTerm1 = Tim_ManBoxOutputFirst( pObj->pMan->pManTime, iBox );
-                nTerms = Tim_ManBoxOutputNum( pObj->pMan->pManTime, iBox );
-                for ( i = 0; i < nTerms; i++ )
-                {
-                    pNext = Nwk_ManCi(pObj->pMan, iTerm1 + i);
-                    Nwk_ManDfsReverse_rec( pNext, vNodes );
-                }
-            }
-        }
-    }
-    else if ( Nwk_ObjIsNode(pObj) || Nwk_ObjIsCi(pObj) )
-    {
-        Nwk_ObjForEachFanout( pObj, pNext, i )
-            Nwk_ManDfsReverse_rec( pNext, vNodes );
-    }
-    else
-        assert( 0 );
-    Vec_PtrPush( vNodes, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the DFS ordered array of all objects except latches.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Nwk_ManDfsReverse( Nwk_Man_t * pNtk )
-{
-    Vec_Ptr_t * vNodes;
-    Nwk_Obj_t * pObj;
-    int i;
-    Nwk_ManIncrementTravId( pNtk );
-    vNodes = Vec_PtrAlloc( 100 );
-    Nwk_ManForEachPi( pNtk, pObj, i )
-        Nwk_ManDfsReverse_rec( pObj, vNodes );
-    // add nodes without fanins
-    Nwk_ManForEachNode( pNtk, pObj, i )
-        if ( Nwk_ObjFaninNum(pObj) == 0 && !Nwk_ObjIsTravIdCurrent(pObj) )
-            Vec_PtrPush( vNodes, pObj );
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs DFS for one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManSupportNodes_rec( Nwk_Obj_t * pNode, Vec_Ptr_t * vNodes )
-{
-    Nwk_Obj_t * pFanin;
-    int i;
-    // if this node is already visited, skip
-    if ( Nwk_ObjIsTravIdCurrent( pNode ) )
-        return;
-    // mark the node as visited
-    Nwk_ObjSetTravIdCurrent( pNode );
-    // collect the CI
-    if ( Nwk_ObjIsCi(pNode) )
-    {
-        Vec_PtrPush( vNodes, pNode );
-        return;
-    }
-    assert( Nwk_ObjIsNode( pNode ) );
-    // visit the transitive fanin of the node
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-        Nwk_ManSupportNodes_rec( pFanin, vNodes );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the set of CI nodes in the support of the given nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Nwk_ManSupportNodes( Nwk_Man_t * pNtk, Nwk_Obj_t ** ppNodes, int nNodes )
-{
-    Vec_Ptr_t * vNodes;
-    int i;
-    // set the traversal ID
-    Nwk_ManIncrementTravId( pNtk );
-    // start the array of nodes
-    vNodes = Vec_PtrAlloc( 100 );
-    // go through the PO nodes and call for each of them
-    for ( i = 0; i < nNodes; i++ )
-        if ( Nwk_ObjIsCo(ppNodes[i]) )
-            Nwk_ManSupportNodes_rec( Nwk_ObjFanin0(ppNodes[i]), vNodes );
-        else
-            Nwk_ManSupportNodes_rec( ppNodes[i], vNodes );
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the sum total of supports of all outputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManSupportSum( Nwk_Man_t * pNtk )
-{
-    Vec_Ptr_t * vSupp;
-    Nwk_Obj_t * pObj;
-    int i, nTotalSupps = 0;
-    Nwk_ManForEachCo( pNtk, pObj, i )
-    {
-        vSupp = Nwk_ManSupportNodes( pNtk, &pObj, 1 );
-        nTotalSupps += Vec_PtrSize( vSupp );
-        Vec_PtrFree( vSupp );
-    }
-    printf( "Total supports = %d.\n", nTotalSupps );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Dereferences the node's MFFC.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ObjDeref_rec( Nwk_Obj_t * pNode )
-{
-    Nwk_Obj_t * pFanin;
-    int i, Counter = 1;
-    if ( Nwk_ObjIsCi(pNode) )
-        return 0;
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-    {
-        assert( pFanin->nFanouts > 0 );
-        if ( --pFanin->nFanouts == 0 )
-            Counter += Nwk_ObjDeref_rec( pFanin );
-    }
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [References the node's MFFC.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ObjRef_rec( Nwk_Obj_t * pNode )
-{
-    Nwk_Obj_t * pFanin;
-    int i, Counter = 1;
-    if ( Nwk_ObjIsCi(pNode) )
-        return 0;
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-    {
-        if ( pFanin->nFanouts++ == 0 )
-            Counter += Nwk_ObjRef_rec( pFanin );
-    }
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the internal and boundary nodes in the derefed MFFC.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ObjMffcLabel_rec( Nwk_Obj_t * pNode, int fTopmost )
-{
-    Nwk_Obj_t * pFanin;
-    int i;
-    // add to the new support nodes
-    if ( !fTopmost && (Nwk_ObjIsCi(pNode) || pNode->nFanouts > 0) )
-        return;
-    // skip visited nodes
-    if ( Nwk_ObjIsTravIdCurrent(pNode) )
-        return;
-    Nwk_ObjSetTravIdCurrent(pNode);
-    // recur on the children
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-        Nwk_ObjMffcLabel_rec( pFanin, 0 );
-    // collect the internal node
-//    printf( "%d ", pNode->Id );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the internal nodes of the MFFC limited by cut.]
-
-  Description []
-               
-  SideEffects [Increments the trav ID and marks visited nodes.]
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ObjMffcLabel( Nwk_Obj_t * pNode )
-{
-    int Count1, Count2;
-    // dereference the node
-    Count1 = Nwk_ObjDeref_rec( pNode );
-    // collect the nodes inside the MFFC
-    Nwk_ManIncrementTravId( pNode->pMan );
-    Nwk_ObjMffcLabel_rec( pNode, 1 );
-    // reference it back
-    Count2 = Nwk_ObjRef_rec( pNode );
-    assert( Count1 == Count2 );
-    return Count1;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkFanio.c b/src/aig/nwk/nwkFanio.c
deleted file mode 100644
index 2a12f5bf..00000000
--- a/src/aig/nwk/nwkFanio.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkFanio.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Logic network representation.]
-
-  Synopsis    [Manipulation of fanins/fanouts.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkFanio.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Collects fanins of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ObjCollectFanins( Nwk_Obj_t * pNode, Vec_Ptr_t * vNodes )
-{
-    Nwk_Obj_t * pFanin;
-    int i;
-    Vec_PtrClear(vNodes);
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-        Vec_PtrPush( vNodes, pFanin );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects fanouts of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ObjCollectFanouts( Nwk_Obj_t * pNode, Vec_Ptr_t * vNodes )
-{
-    Nwk_Obj_t * pFanout;
-    int i;
-    Vec_PtrClear(vNodes);
-    Nwk_ObjForEachFanout( pNode, pFanout, i )
-        Vec_PtrPush( vNodes, pFanout );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of the fanin of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ObjFindFanin( Nwk_Obj_t * pObj, Nwk_Obj_t * pFanin )
-{  
-    Nwk_Obj_t * pTemp;
-    int i;
-    Nwk_ObjForEachFanin( pObj, pTemp, i )
-        if ( pTemp == pFanin )
-            return i;
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of the fanout of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ObjFindFanout( Nwk_Obj_t * pObj, Nwk_Obj_t * pFanout )
-{  
-    Nwk_Obj_t * pTemp;
-    int i;
-    Nwk_ObjForEachFanout( pObj, pTemp, i )
-        if ( pTemp == pFanout )
-            return i;
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the node has to be reallocated.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline int Nwk_ObjReallocIsNeeded( Nwk_Obj_t * pObj )
-{  
-    return pObj->nFanins + pObj->nFanouts == pObj->nFanioAlloc;
-}
- 
-/**Function*************************************************************
-
-  Synopsis    [Reallocates the object.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static Nwk_Obj_t * Nwk_ManReallocNode( Nwk_Obj_t * pObj )
-{  
-    Nwk_Obj_t ** pFanioOld = pObj->pFanio;
-    assert( Nwk_ObjReallocIsNeeded(pObj) );
-    pObj->pFanio = (Nwk_Obj_t **)Aig_MmFlexEntryFetch( pObj->pMan->pMemObjs, 2 * pObj->nFanioAlloc * sizeof(Nwk_Obj_t *) );
-    memmove( pObj->pFanio, pFanioOld, pObj->nFanioAlloc * sizeof(Nwk_Obj_t *) );
-    pObj->nFanioAlloc *= 2;
-    pObj->pMan->nRealloced++;
-    return NULL;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates fanout/fanin relationship between the nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ObjAddFanin( Nwk_Obj_t * pObj, Nwk_Obj_t * pFanin )
-{
-    int i;
-    assert( pObj->pMan == pFanin->pMan );
-    assert( pObj->Id >= 0 && pFanin->Id >= 0 );
-    if ( Nwk_ObjReallocIsNeeded(pObj) )
-        Nwk_ManReallocNode( pObj );
-    if ( Nwk_ObjReallocIsNeeded(pFanin) )
-        Nwk_ManReallocNode( pFanin );
-    for ( i = pObj->nFanins + pObj->nFanouts; i > pObj->nFanins; i-- )
-        pObj->pFanio[i] = pObj->pFanio[i-1];
-    pObj->pFanio[pObj->nFanins++] = pFanin;
-    pFanin->pFanio[pFanin->nFanins + pFanin->nFanouts++] = pObj;
-    pObj->Level = ABC_MAX( pObj->Level, pFanin->Level + Nwk_ObjIsNode(pObj) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes fanout/fanin relationship between the nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ObjDeleteFanin( Nwk_Obj_t * pObj, Nwk_Obj_t * pFanin )
-{
-    int i, k, Limit, fFound;
-    // remove pFanin from the fanin list of pObj
-    Limit = pObj->nFanins + pObj->nFanouts;
-    fFound = 0;
-    for ( k = i = 0; i < Limit; i++ )
-        if ( fFound || pObj->pFanio[i] != pFanin )
-            pObj->pFanio[k++] = pObj->pFanio[i];
-        else
-            fFound = 1;
-    assert( i == k + 1 ); // if it fails, likely because of duplicated fanin
-    pObj->nFanins--;
-    // remove pObj from the fanout list of pFanin
-    Limit = pFanin->nFanins + pFanin->nFanouts;
-    fFound = 0;
-    for ( k = i = pFanin->nFanins; i < Limit; i++ )
-        if ( fFound || pFanin->pFanio[i] != pObj )
-            pFanin->pFanio[k++] = pFanin->pFanio[i];
-        else
-            fFound = 1;
-    assert( i == k + 1 ); // if it fails, likely because of duplicated fanout
-    pFanin->nFanouts--; 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Replaces a fanin of the node.]
-
-  Description [The node is pObj. An old fanin of this node (pFaninOld) has to be
-  replaced by a new fanin (pFaninNew). Assumes that the node and the old fanin 
-  are not complemented. The new fanin can be complemented. In this case, the
-  polarity of the new fanin will change, compared to the polarity of the old fanin.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ObjPatchFanin( Nwk_Obj_t * pObj, Nwk_Obj_t * pFaninOld, Nwk_Obj_t * pFaninNew )
-{
-    int i, k, iFanin, Limit;
-    assert( pFaninOld != pFaninNew );
-    assert( pObj != pFaninOld );
-    assert( pObj != pFaninNew );
-    assert( pObj->pMan == pFaninOld->pMan );
-    assert( pObj->pMan == pFaninNew->pMan );
-    // update the fanin
-    iFanin = Nwk_ObjFindFanin( pObj, pFaninOld );
-    if ( iFanin == -1 )
-    {
-        printf( "Nwk_ObjPatchFanin(); Error! Node %d is not among", pFaninOld->Id );
-        printf( " the fanins of node %d...\n", pObj->Id );
-        return;
-    }
-    pObj->pFanio[iFanin] = pFaninNew;
-    // remove pObj from the fanout list of pFaninOld
-    Limit = pFaninOld->nFanins + pFaninOld->nFanouts;
-    for ( k = i = pFaninOld->nFanins; i < Limit; i++ )
-        if ( pFaninOld->pFanio[i] != pObj )
-            pFaninOld->pFanio[k++] = pFaninOld->pFanio[i];
-    pFaninOld->nFanouts--;
-    // add pObj to the fanout list of pFaninNew
-    if ( Nwk_ObjReallocIsNeeded(pFaninNew) )
-        Nwk_ManReallocNode( pFaninNew );
-    pFaninNew->pFanio[pFaninNew->nFanins + pFaninNew->nFanouts++] = pObj;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Transfers fanout from the old node to the new node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ObjTransferFanout( Nwk_Obj_t * pNodeFrom, Nwk_Obj_t * pNodeTo )
-{
-    Vec_Ptr_t * vFanouts = pNodeFrom->pMan->vTemp;
-    Nwk_Obj_t * pTemp;
-    int nFanoutsOld, i;
-    assert( !Nwk_ObjIsCo(pNodeFrom) && !Nwk_ObjIsCo(pNodeTo) );
-    assert( pNodeFrom->pMan == pNodeTo->pMan );
-    assert( pNodeFrom != pNodeTo );
-    assert( Nwk_ObjFanoutNum(pNodeFrom) > 0 );
-    // get the fanouts of the old node
-    nFanoutsOld = Nwk_ObjFanoutNum(pNodeTo);
-    Nwk_ObjCollectFanouts( pNodeFrom, vFanouts );
-    // patch the fanin of each of them
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vFanouts, pTemp, i )
-        Nwk_ObjPatchFanin( pTemp, pNodeFrom, pNodeTo );
-    assert( Nwk_ObjFanoutNum(pNodeFrom) == 0 );
-    assert( Nwk_ObjFanoutNum(pNodeTo) == nFanoutsOld + Vec_PtrSize(vFanouts) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Replaces the node by a new node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ObjReplace( Nwk_Obj_t * pNodeOld, Nwk_Obj_t * pNodeNew )
-{
-    assert( pNodeOld->pMan == pNodeNew->pMan );
-    assert( pNodeOld != pNodeNew );
-    assert( Nwk_ObjFanoutNum(pNodeOld) > 0 );
-    // transfer the fanouts to the old node
-    Nwk_ObjTransferFanout( pNodeOld, pNodeNew );
-    // remove the old node
-    Nwk_ManDeleteNode_rec( pNodeOld );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkFlow.c b/src/aig/nwk/nwkFlow.c
deleted file mode 100644
index 3961e5c2..00000000
--- a/src/aig/nwk/nwkFlow.c
+++ /dev/null
@@ -1,606 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkFlow.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Max-flow/min-cut computation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkFlow.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-/*
-    This code is based on the papers:
-    A. Hurst, A. Mishchenko, and R. Brayton, "Fast minimum-register retiming 
-    via binary maximum-flow", Proc. FMCAD '07, pp. 181-187. 
-    A. Hurst, A. Mishchenko, and R. Brayton, "Scalable min-area retiming 
-    under simultaneous delay and initial state constraints". Proc. DAC'08. 
-*/
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// predecessors
-static inline Nwk_Obj_t * Nwk_ObjPred( Nwk_Obj_t * pObj )                   { return (Nwk_Obj_t *)pObj->pCopy;        }
-static inline int         Nwk_ObjSetPred( Nwk_Obj_t * pObj, Nwk_Obj_t * p ) { pObj->pCopy = p; return 1; }
-// sink
-static inline int         Nwk_ObjIsSink( Nwk_Obj_t * pObj )                 { return pObj->MarkA;        }
-static inline void        Nwk_ObjSetSink( Nwk_Obj_t * pObj )                { pObj->MarkA = 1;           }
-// flow
-static inline int         Nwk_ObjHasFlow( Nwk_Obj_t * pObj )                { return pObj->MarkB;        }
-static inline void        Nwk_ObjSetFlow( Nwk_Obj_t * pObj )                { pObj->MarkB = 1;           }
-static inline void        Nwk_ObjClearFlow( Nwk_Obj_t * pObj )              { pObj->MarkB = 0;           }
- 
-// representation of visited nodes
-// pObj->TravId  < pNtk->nTravIds-2   --- not visited
-// pObj->TravId == pNtk->nTravIds-2   --- visited bot only
-// pObj->TravId == pNtk->nTravIds-1   --- visited top only
-// pObj->TravId == pNtk->nTravIds     --- visited bot and top
-static inline int  Nwk_ObjVisitedBotOnly( Nwk_Obj_t * pObj )   
-{
-    return pObj->TravId == pObj->pMan->nTravIds - 2;
-}
-static inline int  Nwk_ObjVisitedBot( Nwk_Obj_t * pObj )     
-{ 
-    return pObj->TravId == pObj->pMan->nTravIds - 2 || pObj->TravId == pObj->pMan->nTravIds; 
-}
-static inline int  Nwk_ObjVisitedTop( Nwk_Obj_t * pObj )     
-{ 
-    return pObj->TravId == pObj->pMan->nTravIds - 1 || pObj->TravId == pObj->pMan->nTravIds; 
-}
-static inline void Nwk_ObjSetVisitedBot( Nwk_Obj_t * pObj )  
-{
-    if ( pObj->TravId < pObj->pMan->nTravIds - 2 )
-        pObj->TravId = pObj->pMan->nTravIds - 2;
-    else if ( pObj->TravId == pObj->pMan->nTravIds - 1 )
-        pObj->TravId = pObj->pMan->nTravIds;
-    else
-        assert( 0 );
-}
-static inline void Nwk_ObjSetVisitedTop( Nwk_Obj_t * pObj )  
-{
-    if ( pObj->TravId < pObj->pMan->nTravIds - 2 )
-        pObj->TravId = pObj->pMan->nTravIds - 1;
-    else if ( pObj->TravId == pObj->pMan->nTravIds - 2 )
-        pObj->TravId = pObj->pMan->nTravIds;
-    else
-        assert( 0 );
-}
-static inline void Nwk_ManIncrementTravIdFlow( Nwk_Man_t * pMan )
-{
-    Nwk_ManIncrementTravId( pMan );
-    Nwk_ManIncrementTravId( pMan );
-    Nwk_ManIncrementTravId( pMan );
-}
-
-static int Nwk_ManPushForwardTop_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred );
-static int Nwk_ManPushForwardBot_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred );
-
-static int Nwk_ManPushBackwardTop_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred );
-static int Nwk_ManPushBackwardBot_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Marks TFI of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManMarkTfiCone_rec( Nwk_Obj_t * pObj )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( pObj->MarkA )
-        return;
-    pObj->MarkA = 1;
-    Nwk_ObjForEachFanin( pObj, pNext, i )
-        Nwk_ManMarkTfiCone_rec( pNext );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Marks TFO of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManMarkTfoCone_rec( Nwk_Obj_t * pObj )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( pObj->MarkA )
-        return;
-    pObj->MarkA = 1;
-    Nwk_ObjForEachFanout( pObj, pNext, i )
-        Nwk_ManMarkTfoCone_rec( pNext );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Fast forward flow pushing.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPushForwardFast_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( Nwk_ObjIsTravIdCurrent( pObj ) )
-        return 0;
-    Nwk_ObjSetTravIdCurrent( pObj );
-    if ( Nwk_ObjHasFlow(pObj) )
-        return 0;
-    if ( Nwk_ObjIsSink(pObj) )
-    {
-        Nwk_ObjSetFlow(pObj);
-        return Nwk_ObjSetPred( pObj, pPred );
-    }
-    Nwk_ObjForEachFanout( pObj, pNext, i )
-        if ( Nwk_ManPushForwardFast_rec( pNext, pObj ) )
-        {
-            Nwk_ObjSetFlow(pObj);
-            return Nwk_ObjSetPred( pObj, pPred );
-        }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Fast backward flow pushing.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPushBackwardFast_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( Nwk_ObjIsTravIdCurrent( pObj ) )
-        return 0;
-    Nwk_ObjSetTravIdCurrent( pObj );
-    if ( Nwk_ObjHasFlow(pObj) )
-        return 0;
-    if ( Nwk_ObjIsSink(pObj) )
-    {
-        Nwk_ObjSetFlow(pObj);
-        return Nwk_ObjSetPred( pObj, pPred );
-    }
-    Nwk_ObjForEachFanin( pObj, pNext, i )
-        if ( Nwk_ManPushBackwardFast_rec( pNext, pObj ) )
-        {
-            Nwk_ObjSetFlow(pObj);
-            return Nwk_ObjSetPred( pObj, pPred );
-        }
-    return 0;
-}
-  
-/**Function*************************************************************
-
-  Synopsis    [Pushing the flow through the bottom part of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPushForwardBot_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( Nwk_ObjVisitedBot(pObj) )
-        return 0;
-    Nwk_ObjSetVisitedBot(pObj);
-    // propagate through the internal edge
-    if ( Nwk_ObjHasFlow(pObj) )
-    {
-        if ( Nwk_ObjPred(pObj) )
-            if ( Nwk_ManPushForwardTop_rec( Nwk_ObjPred(pObj), Nwk_ObjPred(pObj) ) )
-                return Nwk_ObjSetPred( pObj, pPred ); 
-    }
-    else if ( Nwk_ManPushForwardTop_rec(pObj, pObj) )
-    {
-        Nwk_ObjSetFlow( pObj );
-        return Nwk_ObjSetPred( pObj, pPred );
-    }
-    // try to push through the fanins
-    Nwk_ObjForEachFanin( pObj, pNext, i )
-        if ( Nwk_ManPushForwardBot_rec( pNext, pPred ) )
-            return 1;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Pushing the flow through the top part of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPushForwardTop_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( Nwk_ObjVisitedTop(pObj) )
-        return 0;
-    Nwk_ObjSetVisitedTop(pObj);
-    // check if this is the sink
-    if ( Nwk_ObjIsSink(pObj) )
-        return 1;
-    // try to push through the fanouts
-    Nwk_ObjForEachFanout( pObj, pNext, i )
-        if ( Nwk_ManPushForwardBot_rec( pNext, pPred ) )
-            return 1;
-    // redirect the flow
-    if ( Nwk_ObjHasFlow(pObj) && !Nwk_ObjIsCi(pObj) )
-        if ( Nwk_ManPushForwardBot_rec( pObj, Nwk_ObjPred(pObj) ) )
-        {
-            Nwk_ObjClearFlow( pObj );
-            return Nwk_ObjSetPred( pObj, NULL );
-        }
-    return 0;
-}
-  
-/**Function*************************************************************
-
-  Synopsis    [Pushing the flow through the bottom part of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPushBackwardBot_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred )
-{
-    if ( Nwk_ObjVisitedBot(pObj) )
-        return 0;
-    Nwk_ObjSetVisitedBot(pObj);
-    // propagate through the internal edge
-    if ( Nwk_ObjHasFlow(pObj) )
-    {
-        if ( Nwk_ObjPred(pObj) )
-            if ( Nwk_ManPushBackwardTop_rec( Nwk_ObjPred(pObj), Nwk_ObjPred(pObj) ) )
-                return Nwk_ObjSetPred( pObj, pPred ); 
-    }
-    else if ( Nwk_ManPushBackwardTop_rec(pObj, pObj) )
-    {
-        Nwk_ObjSetFlow( pObj );
-        return Nwk_ObjSetPred( pObj, pPred );
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Pushing the flow through the top part of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPushBackwardTop_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( Nwk_ObjVisitedTop(pObj) )
-        return 0;
-    Nwk_ObjSetVisitedTop(pObj);
-    // check if this is the sink
-    if ( Nwk_ObjIsSink(pObj) )
-        return 1;
-    // try to push through the fanins
-    Nwk_ObjForEachFanin( pObj, pNext, i )
-        if ( Nwk_ManPushBackwardBot_rec( pNext, pPred ) )
-            return 1;
-    // try to push through the fanouts
-    Nwk_ObjForEachFanout( pObj, pNext, i )
-        if ( !Nwk_ObjIsCo(pObj) && Nwk_ManPushBackwardTop_rec( pNext, pPred ) )
-            return 1;
-    // redirect the flow
-    if ( Nwk_ObjHasFlow(pObj) )
-        if ( Nwk_ObjPred(pObj) && Nwk_ManPushBackwardBot_rec( pObj, Nwk_ObjPred(pObj) ) )
-        {
-            Nwk_ObjClearFlow( pObj );
-            return Nwk_ObjSetPred( pObj, NULL );
-        }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 0 if there is an unmarked path to a CI.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManVerifyCut_rec( Nwk_Obj_t * pObj )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( pObj->MarkA )
-        return 1;
-    if ( Nwk_ObjIsLo(pObj) )
-        return 0;
-    if ( Nwk_ObjIsTravIdCurrent( pObj ) )
-        return 1;
-    Nwk_ObjSetTravIdCurrent( pObj );
-    Nwk_ObjForEachFanin( pObj, pNext, i )
-        if ( !Nwk_ManVerifyCut_rec( pNext ) )
-            return 0;
-    return 1;
-}
- 
-/**Function*************************************************************
-
-  Synopsis    [Verifies the forward cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManRetimeVerifyCutForward( Nwk_Man_t * pMan, Vec_Ptr_t * vNodes )
-{
-    Nwk_Obj_t * pObj;
-    int i;
-    // mark the nodes
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vNodes, pObj, i )
-    {
-        assert( pObj->MarkA == 0 );
-        pObj->MarkA = 1;
-    }
-    // traverse from the COs
-    Nwk_ManIncrementTravId( pMan );
-    Nwk_ManForEachCo( pMan, pObj, i )
-        if ( !Nwk_ManVerifyCut_rec( pObj ) )
-            printf( "Nwk_ManRetimeVerifyCutForward(): Internal cut verification failed.\n" );
-    // unmark the nodes
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vNodes, pObj, i )
-        pObj->MarkA = 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Verifies the forward cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManRetimeVerifyCutBackward( Nwk_Man_t * pMan, Vec_Ptr_t * vNodes )
-{
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes minimum cut for forward retiming.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Nwk_ManRetimeCutForward( Nwk_Man_t * pMan, int nLatches, int fVerbose )
-{
-    Vec_Ptr_t * vNodes;
-    Nwk_Obj_t * pObj;
-    int i, RetValue, Counter = 0, Counter2 = 0;
-    int clk = clock();
-    // set the sequential parameters
-    pMan->nLatches = nLatches;
-    pMan->nTruePis = Nwk_ManCiNum(pMan) - nLatches;
-    pMan->nTruePos = Nwk_ManCoNum(pMan) - nLatches;
-    // mark the COs and the TFO of PIs
-    Nwk_ManForEachCo( pMan, pObj, i )
-        pObj->MarkA = 1;
-    Nwk_ManForEachPiSeq( pMan, pObj, i )
-        Nwk_ManMarkTfoCone_rec( pObj );
-    // start flow computation from each LO
-    Nwk_ManIncrementTravIdFlow( pMan );
-    Nwk_ManForEachLoSeq( pMan, pObj, i )
-    {
-        if ( !Nwk_ManPushForwardFast_rec( pObj, NULL ) )
-            continue;
-        Nwk_ManIncrementTravIdFlow( pMan );
-        Counter++;
-    }
-    if ( fVerbose )
-    printf( "Forward:  Max-flow = %4d -> ", Counter );
-    // continue flow computation from each LO
-    Nwk_ManIncrementTravIdFlow( pMan );
-    Nwk_ManForEachLoSeq( pMan, pObj, i )
-    {
-        if ( !Nwk_ManPushForwardBot_rec( pObj, NULL ) )
-            continue;
-        Nwk_ManIncrementTravIdFlow( pMan );
-        Counter2++;
-    }
-    if ( fVerbose )
-    printf( "%4d.  ", Counter+Counter2 );
-    // repeat flow computation from each LO
-    if ( Counter2 > 0 )
-    {
-        Nwk_ManIncrementTravIdFlow( pMan );
-        Nwk_ManForEachLoSeq( pMan, pObj, i )
-        {
-            RetValue = Nwk_ManPushForwardBot_rec( pObj, NULL );
-            assert( !RetValue );
-        }
-    }
-    // cut is a set of nodes whose bottom is visited but top is not visited
-    vNodes = Vec_PtrAlloc( Counter+Counter2 );
-    Counter = 0;
-    Nwk_ManForEachObj( pMan, pObj, i )
-    {
-        if ( Nwk_ObjVisitedBotOnly(pObj) )
-        {
-            assert( Nwk_ObjHasFlow(pObj) );
-            assert( !Nwk_ObjIsCo(pObj) );
-            Vec_PtrPush( vNodes, pObj );
-            Counter += Nwk_ObjIsCi(pObj);
-        }
-    }
-    Nwk_ManCleanMarks( pMan );
-//    assert( Nwk_ManRetimeVerifyCutForward(pMan, vNodes) );
-    if ( fVerbose )
-    {
-    printf( "Min-cut = %4d.  Unmoved = %4d. ", Vec_PtrSize(vNodes), Counter );
-    ABC_PRT( "Time", clock() - clk );
-    }
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes minimum cut for backward retiming.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Nwk_ManRetimeCutBackward( Nwk_Man_t * pMan, int nLatches, int fVerbose )
-{
-    Vec_Ptr_t * vNodes;
-    Nwk_Obj_t * pObj;
-    int i, RetValue, Counter = 0, Counter2 = 0;
-    int clk = clock();
-    // set the sequential parameters
-    pMan->nLatches = nLatches;
-    pMan->nTruePis = Nwk_ManCiNum(pMan) - nLatches;
-    pMan->nTruePos = Nwk_ManCoNum(pMan) - nLatches;
-    // mark the CIs, the TFI of POs, and the constant nodes
-    Nwk_ManForEachCi( pMan, pObj, i )
-        pObj->MarkA = 1;
-    Nwk_ManForEachPoSeq( pMan, pObj, i )
-        Nwk_ManMarkTfiCone_rec( pObj );
-    Nwk_ManForEachNode( pMan, pObj, i )
-        if ( Nwk_ObjFaninNum(pObj) == 0 )
-            pObj->MarkA = 1;
-    // start flow computation from each LI driver
-    Nwk_ManIncrementTravIdFlow( pMan );
-    Nwk_ManForEachLiSeq( pMan, pObj, i )
-    {
-        if ( !Nwk_ManPushBackwardFast_rec( Nwk_ObjFanin0(pObj), NULL ) )
-            continue;
-        Nwk_ManIncrementTravIdFlow( pMan );
-        Counter++; 
-    }
-    if ( fVerbose ) 
-    printf( "Backward: Max-flow = %4d -> ", Counter );
-    // continue flow computation from each LI driver
-    Nwk_ManIncrementTravIdFlow( pMan );
-    Nwk_ManForEachLiSeq( pMan, pObj, i )
-    {
-        if ( !Nwk_ManPushBackwardBot_rec( Nwk_ObjFanin0(pObj), NULL ) )
-            continue;
-        Nwk_ManIncrementTravIdFlow( pMan );
-        Counter2++;
-    }
-    if ( fVerbose )
-    printf( "%4d.  ", Counter+Counter2 );
-    // repeat flow computation from each LI driver
-    if ( Counter2 > 0 )
-    {
-        Nwk_ManIncrementTravIdFlow( pMan );
-        Nwk_ManForEachLiSeq( pMan, pObj, i )
-        {
-            RetValue = Nwk_ManPushBackwardBot_rec( Nwk_ObjFanin0(pObj), NULL );
-            assert( !RetValue );
-        }
-    }
-    // cut is a set of nodes whose bottom is visited but top is not visited
-    vNodes = Vec_PtrAlloc( Counter+Counter2 );
-    Nwk_ManForEachObj( pMan, pObj, i )
-    {
-        if ( Nwk_ObjVisitedBotOnly(pObj) )
-        {
-            assert( Nwk_ObjHasFlow(pObj) );
-            assert( !Nwk_ObjIsCo(pObj) );
-            Vec_PtrPush( vNodes, pObj );
-        }
-    }
-    // count CO drivers
-    Counter = 0;
-    Nwk_ManForEachLiSeq( pMan, pObj, i )
-        if ( Nwk_ObjVisitedBotOnly( Nwk_ObjFanin0(pObj) ) )
-            Counter++;
-    Nwk_ManCleanMarks( pMan );
-//    assert( Nwk_ManRetimeVerifyCutBackward(pMan, vNodes) );
-    if ( fVerbose )
-    {
-    printf( "Min-cut = %4d.  Unmoved = %4d. ", Vec_PtrSize(vNodes), Counter );
-    ABC_PRT( "Time", clock() - clk );
-    }
-    return vNodes;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkFlow_depth.c b/src/aig/nwk/nwkFlow_depth.c
deleted file mode 100644
index 6c2e7eb9..00000000
--- a/src/aig/nwk/nwkFlow_depth.c
+++ /dev/null
@@ -1,631 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkFlow.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Max-flow/min-cut computation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkFlow.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-/*
-    This code is based on the papers:
-    A. Hurst, A. Mishchenko, and R. Brayton, "Fast minimum-register retiming 
-    via binary maximum-flow", Proc. FMCAD '07, pp. 181-187. 
-    A. Hurst, A. Mishchenko, and R. Brayton, "Scalable min-area retiming 
-    under simultaneous delay and initial state constraints". Proc. DAC'08. 
-*/
-
-int DepthFwd, DepthBwd, DepthFwdMax, DepthBwdMax;
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// predecessors
-static inline Nwk_Obj_t * Nwk_ObjPred( Nwk_Obj_t * pObj )                   { return pObj->pCopy;        }
-static inline int         Nwk_ObjSetPred( Nwk_Obj_t * pObj, Nwk_Obj_t * p ) { pObj->pCopy = p; return 1; }
-// sink
-static inline int         Nwk_ObjIsSink( Nwk_Obj_t * pObj )                 { return pObj->MarkA;        }
-static inline void        Nwk_ObjSetSink( Nwk_Obj_t * pObj )                { pObj->MarkA = 1;           }
-// flow
-static inline int         Nwk_ObjHasFlow( Nwk_Obj_t * pObj )                { return pObj->MarkB;        }
-static inline void        Nwk_ObjSetFlow( Nwk_Obj_t * pObj )                { pObj->MarkB = 1;           }
-static inline void        Nwk_ObjClearFlow( Nwk_Obj_t * pObj )              { pObj->MarkB = 0;           }
- 
-// representation of visited nodes
-// pObj->TravId  < pNtk->nTravIds-2   --- not visited
-// pObj->TravId == pNtk->nTravIds-2   --- visited bot only
-// pObj->TravId == pNtk->nTravIds-1   --- visited top only
-// pObj->TravId == pNtk->nTravIds     --- visited bot and top
-static inline int  Nwk_ObjVisitedBotOnly( Nwk_Obj_t * pObj )   
-{
-    return pObj->TravId == pObj->pMan->nTravIds - 2;
-}
-static inline int  Nwk_ObjVisitedBot( Nwk_Obj_t * pObj )     
-{ 
-    return pObj->TravId == pObj->pMan->nTravIds - 2 || pObj->TravId == pObj->pMan->nTravIds; 
-}
-static inline int  Nwk_ObjVisitedTop( Nwk_Obj_t * pObj )     
-{ 
-    return pObj->TravId == pObj->pMan->nTravIds - 1 || pObj->TravId == pObj->pMan->nTravIds; 
-}
-static inline void Nwk_ObjSetVisitedBot( Nwk_Obj_t * pObj )  
-{
-    if ( pObj->TravId < pObj->pMan->nTravIds - 2 )
-        pObj->TravId = pObj->pMan->nTravIds - 2;
-    else if ( pObj->TravId == pObj->pMan->nTravIds - 1 )
-        pObj->TravId = pObj->pMan->nTravIds;
-    else
-        assert( 0 );
-}
-static inline void Nwk_ObjSetVisitedTop( Nwk_Obj_t * pObj )  
-{
-    if ( pObj->TravId < pObj->pMan->nTravIds - 2 )
-        pObj->TravId = pObj->pMan->nTravIds - 1;
-    else if ( pObj->TravId == pObj->pMan->nTravIds - 2 )
-        pObj->TravId = pObj->pMan->nTravIds;
-    else
-        assert( 0 );
-}
-static inline Nwk_ManIncrementTravIdFlow( Nwk_Man_t * pMan )
-{
-    Nwk_ManIncrementTravId( pMan );
-    Nwk_ManIncrementTravId( pMan );
-    Nwk_ManIncrementTravId( pMan );
-}
-
-static int Nwk_ManPushForwardTop_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred );
-static int Nwk_ManPushForwardBot_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred );
-
-static int Nwk_ManPushBackwardTop_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred );
-static int Nwk_ManPushBackwardBot_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Marks TFI of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManMarkTfiCone_rec( Nwk_Obj_t * pObj )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( pObj->MarkA )
-        return;
-    pObj->MarkA = 1;
-    Nwk_ObjForEachFanin( pObj, pNext, i )
-        Nwk_ManMarkTfiCone_rec( pNext );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Marks TFO of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManMarkTfoCone_rec( Nwk_Obj_t * pObj )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( pObj->MarkA )
-        return;
-    pObj->MarkA = 1;
-    Nwk_ObjForEachFanout( pObj, pNext, i )
-        Nwk_ManMarkTfoCone_rec( pNext );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Fast forward flow pushing.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPushForwardFast_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( Nwk_ObjIsTravIdCurrent( pObj ) )
-        return 0;
-    Nwk_ObjSetTravIdCurrent( pObj );
-    if ( Nwk_ObjHasFlow(pObj) )
-        return 0;
-    if ( Nwk_ObjIsSink(pObj) )
-    {
-        Nwk_ObjSetFlow(pObj);
-        return Nwk_ObjSetPred( pObj, pPred );
-    }
-    Nwk_ObjForEachFanout( pObj, pNext, i )
-        if ( Nwk_ManPushForwardFast_rec( pNext, pObj ) )
-        {
-            Nwk_ObjSetFlow(pObj);
-            return Nwk_ObjSetPred( pObj, pPred );
-        }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Fast backward flow pushing.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPushBackwardFast_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( Nwk_ObjIsTravIdCurrent( pObj ) )
-        return 0;
-    Nwk_ObjSetTravIdCurrent( pObj );
-    if ( Nwk_ObjHasFlow(pObj) )
-        return 0;
-    if ( Nwk_ObjIsSink(pObj) )
-    {
-        Nwk_ObjSetFlow(pObj);
-        return Nwk_ObjSetPred( pObj, pPred );
-    }
-    Nwk_ObjForEachFanin( pObj, pNext, i )
-        if ( Nwk_ManPushBackwardFast_rec( pNext, pObj ) )
-        {
-            Nwk_ObjSetFlow(pObj);
-            return Nwk_ObjSetPred( pObj, pPred );
-        }
-    return 0;
-}
-  
-/**Function*************************************************************
-
-  Synopsis    [Pushing the flow through the bottom part of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPushForwardBot_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( Nwk_ObjVisitedBot(pObj) )
-        return 0;
-    Nwk_ObjSetVisitedBot(pObj);
-    DepthFwd++;
-    if ( DepthFwdMax < DepthFwd )
-        DepthFwdMax = DepthFwd;
-    // propagate through the internal edge
-    if ( Nwk_ObjHasFlow(pObj) )
-    {
-        if ( Nwk_ObjPred(pObj) )
-            if ( Nwk_ManPushForwardTop_rec( Nwk_ObjPred(pObj), Nwk_ObjPred(pObj) ) )
-            {
-                DepthFwd--;
-                return Nwk_ObjSetPred( pObj, pPred ); 
-            }
-    }
-    else if ( Nwk_ManPushForwardTop_rec(pObj, pObj) )
-    {
-        DepthFwd--;
-        Nwk_ObjSetFlow( pObj );
-        return Nwk_ObjSetPred( pObj, pPred );
-    }
-    // try to push through the fanins
-    Nwk_ObjForEachFanin( pObj, pNext, i )
-        if ( Nwk_ManPushForwardBot_rec( pNext, pPred ) )
-        {
-            DepthFwd--;
-            return 1;
-        }
-    DepthFwd--;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Pushing the flow through the top part of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPushForwardTop_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( Nwk_ObjVisitedTop(pObj) )
-        return 0;
-    Nwk_ObjSetVisitedTop(pObj);
-    // check if this is the sink
-    if ( Nwk_ObjIsSink(pObj) )
-        return 1;
-    DepthFwd++;
-    if ( DepthFwdMax < DepthFwd )
-        DepthFwdMax = DepthFwd;
-    // try to push through the fanouts
-    Nwk_ObjForEachFanout( pObj, pNext, i )
-        if ( Nwk_ManPushForwardBot_rec( pNext, pPred ) )
-        {
-            DepthFwd--;
-            return 1;
-        }
-    // redirect the flow
-    if ( Nwk_ObjHasFlow(pObj) && !Nwk_ObjIsCi(pObj) )
-        if ( Nwk_ManPushForwardBot_rec( pObj, Nwk_ObjPred(pObj) ) )
-        {
-            DepthFwd--;
-            Nwk_ObjClearFlow( pObj );
-            return Nwk_ObjSetPred( pObj, NULL );
-        }
-    DepthFwd--;
-    return 0;
-}
-  
-/**Function*************************************************************
-
-  Synopsis    [Pushing the flow through the bottom part of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPushBackwardBot_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred )
-{
-    if ( Nwk_ObjVisitedBot(pObj) )
-        return 0;
-    Nwk_ObjSetVisitedBot(pObj);
-    // propagate through the internal edge
-    if ( Nwk_ObjHasFlow(pObj) )
-    {
-        if ( Nwk_ObjPred(pObj) )
-            if ( Nwk_ManPushBackwardTop_rec( Nwk_ObjPred(pObj), Nwk_ObjPred(pObj) ) )
-                return Nwk_ObjSetPred( pObj, pPred ); 
-    }
-    else if ( Nwk_ManPushBackwardTop_rec(pObj, pObj) )
-    {
-        Nwk_ObjSetFlow( pObj );
-        return Nwk_ObjSetPred( pObj, pPred );
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Pushing the flow through the top part of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPushBackwardTop_rec( Nwk_Obj_t * pObj, Nwk_Obj_t * pPred )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( Nwk_ObjVisitedTop(pObj) )
-        return 0;
-    Nwk_ObjSetVisitedTop(pObj);
-    // check if this is the sink
-    if ( Nwk_ObjIsSink(pObj) )
-        return 1;
-    // try to push through the fanins
-    Nwk_ObjForEachFanin( pObj, pNext, i )
-        if ( Nwk_ManPushBackwardBot_rec( pNext, pPred ) )
-            return 1;
-    // try to push through the fanouts
-    Nwk_ObjForEachFanout( pObj, pNext, i )
-        if ( !Nwk_ObjIsCo(pObj) && Nwk_ManPushBackwardTop_rec( pNext, pPred ) )
-            return 1;
-    // redirect the flow
-    if ( Nwk_ObjHasFlow(pObj) )
-        if ( Nwk_ObjPred(pObj) && Nwk_ManPushBackwardBot_rec( pObj, Nwk_ObjPred(pObj) ) )
-        {
-            Nwk_ObjClearFlow( pObj );
-            return Nwk_ObjSetPred( pObj, NULL );
-        }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 0 if there is an unmarked path to a CI.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManVerifyCut_rec( Nwk_Obj_t * pObj )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( pObj->MarkA )
-        return 1;
-    if ( Nwk_ObjIsLo(pObj) )
-        return 0;
-    if ( Nwk_ObjIsTravIdCurrent( pObj ) )
-        return 1;
-    Nwk_ObjSetTravIdCurrent( pObj );
-    Nwk_ObjForEachFanin( pObj, pNext, i )
-        if ( !Nwk_ManVerifyCut_rec( pNext ) )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Verifies the forward cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManRetimeVerifyCutForward( Nwk_Man_t * pMan, Vec_Ptr_t * vNodes )
-{
-    Nwk_Obj_t * pObj;
-    int i;
-    // mark the nodes
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vNodes, pObj, i )
-    {
-        assert( pObj->MarkA == 0 );
-        pObj->MarkA = 1;
-    }
-    // traverse from the COs
-    Nwk_ManIncrementTravId( pMan );
-    Nwk_ManForEachCo( pMan, pObj, i )
-        if ( !Nwk_ManVerifyCut_rec( pObj ) )
-            printf( "Nwk_ManRetimeVerifyCutForward(): Internal cut verification failed.\n" );
-    // unmark the nodes
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vNodes, pObj, i )
-        pObj->MarkA = 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Verifies the forward cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManRetimeVerifyCutBackward( Nwk_Man_t * pMan, Vec_Ptr_t * vNodes )
-{
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes minimum cut for forward retiming.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Nwk_ManRetimeCutForward( Nwk_Man_t * pMan, int nLatches, int fVerbose )
-{
-    Vec_Ptr_t * vNodes;
-    Nwk_Obj_t * pObj;
-    int i, RetValue, Counter = 0, Counter2 = 0;
-    int clk = clock();
-    // set the sequential parameters
-    pMan->nLatches = nLatches;
-    pMan->nTruePis = Nwk_ManCiNum(pMan) - nLatches;
-    pMan->nTruePos = Nwk_ManCoNum(pMan) - nLatches;
-    // mark the COs and the TFO of PIs
-    Nwk_ManForEachCo( pMan, pObj, i )
-        pObj->MarkA = 1;
-    Nwk_ManForEachPiSeq( pMan, pObj, i )
-        Nwk_ManMarkTfoCone_rec( pObj );
-    // start flow computation from each LO
-    Nwk_ManIncrementTravIdFlow( pMan );
-    Nwk_ManForEachLoSeq( pMan, pObj, i )
-    {
-        if ( !Nwk_ManPushForwardFast_rec( pObj, NULL ) )
-            continue;
-        Nwk_ManIncrementTravIdFlow( pMan );
-        Counter++;
-    }
-    if ( fVerbose )
-    printf( "Forward:  Max-flow = %4d -> ", Counter );
-    // continue flow computation from each LO
-    DepthFwdMax = DepthFwd = 0;
-    Nwk_ManIncrementTravIdFlow( pMan );
-    Nwk_ManForEachLoSeq( pMan, pObj, i )
-    {
-    printf( "%d ", DepthFwdMax );
-        if ( !Nwk_ManPushForwardBot_rec( pObj, NULL ) )
-            continue;
-        assert( DepthFwd == 0 );
-        Nwk_ManIncrementTravIdFlow( pMan );
-        Counter2++;
-    }
-    printf( "DepthMax = %d.\n", DepthFwdMax );
-    if ( fVerbose )
-    printf( "%4d.  ", Counter+Counter2 );
-    // repeat flow computation from each LO
-    if ( Counter2 > 0 )
-    {
-        Nwk_ManIncrementTravIdFlow( pMan );
-        Nwk_ManForEachLoSeq( pMan, pObj, i )
-        {
-            RetValue = Nwk_ManPushForwardBot_rec( pObj, NULL );
-            assert( !RetValue );
-        }
-    }
-    // cut is a set of nodes whose bottom is visited but top is not visited
-    vNodes = Vec_PtrAlloc( Counter+Counter2 );
-    Counter = 0;
-    Nwk_ManForEachObj( pMan, pObj, i )
-    {
-        if ( Nwk_ObjVisitedBotOnly(pObj) )
-        {
-            assert( Nwk_ObjHasFlow(pObj) );
-            assert( !Nwk_ObjIsCo(pObj) );
-            Vec_PtrPush( vNodes, pObj );
-            Counter += Nwk_ObjIsCi(pObj);
-        }
-    }
-    Nwk_ManCleanMarks( pMan );
-    assert( Nwk_ManRetimeVerifyCutForward(pMan, vNodes) );
-    if ( fVerbose )
-    {
-    printf( "Min-cut = %4d.  Unmoved = %4d. ", Vec_PtrSize(vNodes), Counter );
-    PRT( "Time", clock() - clk );
-    }
-    return vNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes minimum cut for backward retiming.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Nwk_ManRetimeCutBackward( Nwk_Man_t * pMan, int nLatches, int fVerbose )
-{
-    Vec_Ptr_t * vNodes;
-    Nwk_Obj_t * pObj;
-    int i, RetValue, Counter = 0, Counter2 = 0;
-    int clk = clock();
-    // set the sequential parameters
-    pMan->nLatches = nLatches;
-    pMan->nTruePis = Nwk_ManCiNum(pMan) - nLatches;
-    pMan->nTruePos = Nwk_ManCoNum(pMan) - nLatches;
-    // mark the CIs, the TFI of POs, and the constant nodes
-    Nwk_ManForEachCi( pMan, pObj, i )
-        pObj->MarkA = 1;
-    Nwk_ManForEachPoSeq( pMan, pObj, i )
-        Nwk_ManMarkTfiCone_rec( pObj );
-    Nwk_ManForEachNode( pMan, pObj, i )
-        if ( Nwk_ObjFaninNum(pObj) == 0 )
-            pObj->MarkA = 1;
-    // start flow computation from each LI driver
-    Nwk_ManIncrementTravIdFlow( pMan );
-    Nwk_ManForEachLiSeq( pMan, pObj, i )
-    {
-        if ( !Nwk_ManPushBackwardFast_rec( Nwk_ObjFanin0(pObj), NULL ) )
-            continue;
-        Nwk_ManIncrementTravIdFlow( pMan );
-        Counter++; 
-    }
-    if ( fVerbose ) 
-    printf( "Backward: Max-flow = %4d -> ", Counter );
-    // continue flow computation from each LI driver
-    Nwk_ManIncrementTravIdFlow( pMan );
-    Nwk_ManForEachLiSeq( pMan, pObj, i )
-    {
-        if ( !Nwk_ManPushBackwardBot_rec( Nwk_ObjFanin0(pObj), NULL ) )
-            continue;
-        Nwk_ManIncrementTravIdFlow( pMan );
-        Counter2++;
-    }
-    if ( fVerbose )
-    printf( "%4d.  ", Counter+Counter2 );
-    // repeat flow computation from each LI driver
-    if ( Counter2 > 0 )
-    {
-        Nwk_ManIncrementTravIdFlow( pMan );
-        Nwk_ManForEachLiSeq( pMan, pObj, i )
-        {
-            RetValue = Nwk_ManPushBackwardBot_rec( Nwk_ObjFanin0(pObj), NULL );
-            assert( !RetValue );
-        }
-    }
-    // cut is a set of nodes whose bottom is visited but top is not visited
-    vNodes = Vec_PtrAlloc( Counter+Counter2 );
-    Nwk_ManForEachObj( pMan, pObj, i )
-    {
-        if ( Nwk_ObjVisitedBotOnly(pObj) )
-        {
-            assert( Nwk_ObjHasFlow(pObj) );
-            assert( !Nwk_ObjIsCo(pObj) );
-            Vec_PtrPush( vNodes, pObj );
-        }
-    }
-    // count CO drivers
-    Counter = 0;
-    Nwk_ManForEachLiSeq( pMan, pObj, i )
-        if ( Nwk_ObjVisitedBotOnly( Nwk_ObjFanin0(pObj) ) )
-            Counter++;
-    Nwk_ManCleanMarks( pMan );
-    assert( Nwk_ManRetimeVerifyCutBackward(pMan, vNodes) );
-    if ( fVerbose )
-    {
-    printf( "Min-cut = %4d.  Unmoved = %4d. ", Vec_PtrSize(vNodes), Counter );
-    PRT( "Time", clock() - clk );
-    }
-    return vNodes;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkMan.c b/src/aig/nwk/nwkMan.c
deleted file mode 100644
index 2e2a3e56..00000000
--- a/src/aig/nwk/nwkMan.c
+++ /dev/null
@@ -1,278 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Logic network representation.]
- 
-  Synopsis    [Network manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkMan.c,v 1.1 2008/10/10 14:09:30 mjarvin Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Man_t * Nwk_ManAlloc()
-{
-    Nwk_Man_t * p;
-    p = ABC_ALLOC( Nwk_Man_t, 1 );
-    memset( p, 0, sizeof(Nwk_Man_t) );
-    p->vCis = Vec_PtrAlloc( 1000 );
-    p->vCos = Vec_PtrAlloc( 1000 );
-    p->vObjs = Vec_PtrAlloc( 1000 );
-    p->vTemp = Vec_PtrAlloc( 1000 );
-    p->nFanioPlus = 2;
-    p->pMemObjs = Aig_MmFlexStart();
-    p->pManHop = Hop_ManStart();
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocates the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManFree( Nwk_Man_t * p )
-{
-//    printf( "The number of realloced nodes = %d.\n", p->nRealloced );
-    if ( p->pName )    ABC_FREE( p->pName );
-    if ( p->pSpec )    ABC_FREE( p->pSpec );
-    if ( p->vCis )     Vec_PtrFree( p->vCis );
-    if ( p->vCos )     Vec_PtrFree( p->vCos );
-    if ( p->vObjs )    Vec_PtrFree( p->vObjs );
-    if ( p->vTemp )    Vec_PtrFree( p->vTemp );
-    if ( p->pManTime ) Tim_ManStop( p->pManTime );
-    if ( p->pMemObjs ) Aig_MmFlexStop( p->pMemObjs, 0 );
-    if ( p->pManHop )  Hop_ManStop( p->pManHop );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints stats of the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManPrintLutSizes( Nwk_Man_t * p, If_Lib_t * pLutLib )
-{
-    Nwk_Obj_t * pObj;
-    int i, Counters[256] = {0};
-    Nwk_ManForEachNode( p, pObj, i )
-        Counters[Nwk_ObjFaninNum(pObj)]++;
-    printf( "LUTs by size: " );
-    for ( i = 0; i <= pLutLib->LutMax; i++ )
-        printf( "%d:%d ", i, Counters[i] );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [If the network is best, saves it in "best.blif" and returns 1.]
-
-  Description [If the networks are incomparable, saves the new network, 
-  returns its parameters in the internal parameter structure, and returns 1.
-  If the new network is not a logic network, quits without saving and returns 0.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManCompareAndSaveBest( Nwk_Man_t * pNtk, void * pNtl )
-{
-//    extern void Ntl_WriteBlifLogic( Nwk_Man_t * pNtk, void * pNtl, char * pFileName );
-    extern void Nwk_ManDumpBlif( Nwk_Man_t * pNtk, char * pFileName, Vec_Ptr_t * vPiNames, Vec_Ptr_t * vPoNames );
-    static struct ParStruct {
-        char * pName;  // name of the best saved network
-        int    Depth;  // depth of the best saved network
-        int    Flops;  // flops in the best saved network 
-        int    Nodes;  // nodes in the best saved network
-        int    nPis;   // the number of primary inputs
-        int    nPos;   // the number of primary outputs
-    } ParsNew, ParsBest = { 0 };
-    // free storage for the name
-    if ( pNtk == NULL )
-    {
-        ABC_FREE( ParsBest.pName );
-        return 0;
-    }
-    // get the parameters
-    ParsNew.Depth = Nwk_ManLevel( pNtk );
-    ParsNew.Flops = Nwk_ManLatchNum( pNtk );
-    ParsNew.Nodes = Nwk_ManNodeNum( pNtk );
-    ParsNew.nPis  = Nwk_ManPiNum( pNtk );
-    ParsNew.nPos  = Nwk_ManPoNum( pNtk );
-    // reset the parameters if the network has the same name
-    if (  ParsBest.pName == NULL ||
-          strcmp(ParsBest.pName, pNtk->pName) ||
-          ParsBest.Depth >  ParsNew.Depth ||
-         (ParsBest.Depth == ParsNew.Depth && ParsBest.Flops >  ParsNew.Flops) ||
-         (ParsBest.Depth == ParsNew.Depth && ParsBest.Flops == ParsNew.Flops && ParsBest.Nodes >  ParsNew.Nodes) )
-    {
-        ABC_FREE( ParsBest.pName );
-        ParsBest.pName = Aig_UtilStrsav( pNtk->pName );
-        ParsBest.Depth = ParsNew.Depth; 
-        ParsBest.Flops = ParsNew.Flops; 
-        ParsBest.Nodes = ParsNew.Nodes; 
-        ParsBest.nPis  = ParsNew.nPis; 
-        ParsBest.nPos  = ParsNew.nPos;
-        // write the network
-//        Ntl_WriteBlifLogic( pNtk, pNtl, "best.blif" );
-//        Nwk_ManDumpBlif( pNtk, "best_map.blif", NULL, NULL );
-        return 1;
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Nwk_FileNameGeneric( char * FileName )
-{
-    char * pDot, * pRes;
-    pRes = Aig_UtilStrsav( FileName );
-    if ( (pDot = strrchr( pRes, '.' )) )
-        *pDot = 0;
-    return pRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Marks nodes for power-optimization.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-float Nwl_ManComputeTotalSwitching( Nwk_Man_t * pNtk )
-{
-    extern Vec_Int_t * Saig_ManComputeSwitchProbs( Aig_Man_t * p, int nFrames, int nPref, int fProbOne );
-    Vec_Int_t * vSwitching;
-    float * pSwitching;
-    Aig_Man_t * pAig;
-    Aig_Obj_t * pObjAig;
-    Nwk_Obj_t * pObjAbc;
-    float Result = (float)0;
-    int i;
-    // strash the network
-    // map network into an AIG
-    pAig = Nwk_ManStrash( pNtk );
-    vSwitching = Saig_ManComputeSwitchProbs( pAig, 48, 16, 0 );
-    pSwitching = (float *)vSwitching->pArray;
-    Nwk_ManForEachObj( pNtk, pObjAbc, i )
-    {
-        if ( (pObjAig = Aig_Regular((Aig_Obj_t *)pObjAbc->pCopy)) )
-            Result += Nwk_ObjFanoutNum(pObjAbc) * pSwitching[pObjAig->Id];
-    }
-    Vec_IntFree( vSwitching );
-    Aig_ManStop( pAig );
-    return Result;
-}
- 
-/**Function*************************************************************
-
-  Synopsis    [Prints stats of the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManPrintStats( Nwk_Man_t * pNtk, If_Lib_t * pLutLib, int fSaveBest, int fDumpResult, int fPower, Ntl_Man_t * pNtl )
-{
-//    extern int Ntl_ManLatchNum( Ntl_Man_t * p );
-//    extern void Ntl_ManWriteBlifLogic( Nwk_Man_t * pNtk, void * pNtl, char * pFileName );
-    if ( fSaveBest )
-        Nwk_ManCompareAndSaveBest( pNtk, pNtl );
-    if ( fDumpResult )
-    {
-        char Buffer[1000] = {0};
-        const char * pNameGen = pNtk->pSpec? Nwk_FileNameGeneric( pNtk->pSpec ) : "nameless_";
-        sprintf( Buffer, "%s_dump.blif", pNameGen );
-//        Ntl_ManWriteBlifLogic( pNtk, pNtl, Buffer );
-//        sprintf( Buffer, "%s_dump_map.blif", pNameGen );
-//        Nwk_ManDumpBlif( pNtk, Buffer, NULL, NULL );
-        if ( pNtk->pSpec ) ABC_FREE( pNameGen );
-    }
-
-    pNtk->pLutLib = pLutLib;
-    printf( "%-15s : ",      pNtk->pName );
-    printf( "pi = %5d  ",    Nwk_ManPiNum(pNtk) );
-    printf( "po = %5d  ",    Nwk_ManPoNum(pNtk) );
-    printf( "ci = %5d  ",    Nwk_ManCiNum(pNtk) );
-    printf( "co = %5d  ",    Nwk_ManCoNum(pNtk) );
-//    printf( "lat = %5d  ",   Ntl_ManLatchNum(pNtl) );
-    printf( "node = %5d  ",  Nwk_ManNodeNum(pNtk) );
-    printf( "edge = %5d  ",  Nwk_ManGetTotalFanins(pNtk) );
-    printf( "aig = %6d  ",   Nwk_ManGetAigNodeNum(pNtk) );
-    printf( "lev = %3d  ",   Nwk_ManLevel(pNtk) );
-//    printf( "lev2 = %3d  ",  Nwk_ManLevelBackup(pNtk) );
-    printf( "delay = %5.2f  ", Nwk_ManDelayTraceLut(pNtk) );
-    if ( fPower )
-        printf( "power = %7.2f   ", Nwl_ManComputeTotalSwitching(pNtk) );
-    Nwk_ManPrintLutSizes( pNtk, pLutLib );
-    printf( "\n" );
-//    Nwk_ManDelayTracePrint( pNtk, pLutLib );
-    fflush( stdout );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkMap.c b/src/aig/nwk/nwkMap.c
deleted file mode 100644
index 22f25dbc..00000000
--- a/src/aig/nwk/nwkMap.c
+++ /dev/null
@@ -1,396 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkMap.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Logic network representation.]
-
-  Synopsis    [Interface to technology mapping.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkMap.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-#include "if.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Load the network into FPGA manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManSetIfParsDefault( If_Par_t * pPars )
-{
-//    extern void * Abc_FrameReadLibLut();
-    // set defaults
-    memset( pPars, 0, sizeof(If_Par_t) );
-    // user-controlable paramters
-//    pPars->nLutSize    = -1;
-    pPars->nLutSize    =  6;
-    pPars->nCutsMax    =  8;
-    pPars->nFlowIters  =  1;
-    pPars->nAreaIters  =  2;
-    pPars->DelayTarget = -1;
-    pPars->Epsilon     =  (float)0.005;
-    pPars->fPreprocess =  1;
-    pPars->fArea       =  0;
-    pPars->fFancy      =  0;
-    pPars->fExpRed     =  1; ////
-    pPars->fLatchPaths =  0;
-    pPars->fEdge       =  1;
-    pPars->fPower      =  0;
-    pPars->fCutMin     =  0;
-    pPars->fSeqMap     =  0;
-    pPars->fVerbose    =  0;
-    // internal parameters
-    pPars->fTruth      =  0;
-    pPars->nLatches    =  0;
-    pPars->fLiftLeaves =  0;
-//    pPars->pLutLib     =  Abc_FrameReadLibLut();
-    pPars->pLutLib     =  NULL;
-    pPars->pTimesArr   =  NULL; 
-    pPars->pTimesArr   =  NULL;   
-    pPars->pFuncCost   =  NULL;   
-/*
-    if ( pPars->nLutSize == -1 )
-    {
-        if ( pPars->pLutLib == NULL )
-        {
-            printf( "The LUT library is not given.\n" );
-            return;
-        }
-        // get LUT size from the library
-        pPars->nLutSize = pPars->pLutLib->LutMax;
-    }
-*/
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Load the network into FPGA manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-If_Man_t * Nwk_ManToIf( Aig_Man_t * p, If_Par_t * pPars, Vec_Ptr_t * vAigToIf )
-{
-    extern Vec_Int_t * Saig_ManComputeSwitchProbs( Aig_Man_t * p, int nFrames, int nPref, int fProbOne );
-    Vec_Int_t * vSwitching = NULL, * vSwitching2 = NULL;
-    float * pSwitching, * pSwitching2;
-    If_Man_t * pIfMan;
-    If_Obj_t * pIfObj;
-    Aig_Obj_t * pNode, * pFanin, * pPrev;
-    int i, clk = clock();
-    // set the number of registers (switch activity will be combinational)
-    Aig_ManSetRegNum( p, 0 );
-    if ( pPars->fPower )
-    {
-        vSwitching  = Saig_ManComputeSwitchProbs( p, 48, 16, 0 );
-        if ( pPars->fVerbose )
-        {
-            ABC_PRT( "Computing switching activity", clock() - clk );
-        }
-        pSwitching  = (float *)vSwitching->pArray;
-        vSwitching2 = Vec_IntStart( Aig_ManObjNumMax(p) );
-        pSwitching2 = (float *)vSwitching2->pArray;
-    }
-    // start the mapping manager and set its parameters
-    pIfMan = If_ManStart( pPars );
-    pIfMan->vSwitching = vSwitching2;
-    // load the AIG into the mapper
-    Aig_ManForEachObj( p, pNode, i )
-    {
-        if ( Aig_ObjIsAnd(pNode) )
-        {
-            pIfObj = If_ManCreateAnd( pIfMan, 
-                If_NotCond( (If_Obj_t *)Aig_ObjFanin0(pNode)->pData, Aig_ObjFaninC0(pNode) ), 
-                If_NotCond( (If_Obj_t *)Aig_ObjFanin1(pNode)->pData, Aig_ObjFaninC1(pNode) ) );
-//            printf( "no%d=%d\n ", If_ObjId(pIfObj), If_ObjLevel(pIfObj) );
-        }
-        else if ( Aig_ObjIsPi(pNode) )
-        {
-            pIfObj = If_ManCreateCi( pIfMan );
-            If_ObjSetLevel( pIfObj, Aig_ObjLevel(pNode) );
-//            printf( "pi%d=%d\n ", If_ObjId(pIfObj), If_ObjLevel(pIfObj) );
-            if ( pIfMan->nLevelMax < (int)pIfObj->Level )
-                pIfMan->nLevelMax = (int)pIfObj->Level;
-        }
-        else if ( Aig_ObjIsPo(pNode) )
-        {
-            pIfObj = If_ManCreateCo( pIfMan, If_NotCond( (If_Obj_t *)Aig_ObjFanin0(pNode)->pData, Aig_ObjFaninC0(pNode) ) );
-//            printf( "po%d=%d\n ", If_ObjId(pIfObj), If_ObjLevel(pIfObj) );
-        }
-        else if ( Aig_ObjIsConst1(pNode) )
-            pIfObj = If_ManConst1( pIfMan );
-        else // add the node to the mapper
-            assert( 0 );
-        // save the result
-        assert( Vec_PtrEntry(vAigToIf, i) == NULL );
-        Vec_PtrWriteEntry( vAigToIf, i, pIfObj );
-        pNode->pData = pIfObj;
-        if ( vSwitching2 )
-            pSwitching2[pIfObj->Id] = pSwitching[pNode->Id];            
-        // set up the choice node
-        if ( Aig_ObjIsChoice( p, pNode ) )
-        {
-            pIfMan->nChoices++;
-            for ( pPrev = pNode, pFanin = Aig_ObjEquiv(p, pNode); pFanin; pPrev = pFanin, pFanin = Aig_ObjEquiv(p, pFanin) )
-                If_ObjSetChoice( (If_Obj_t *)pPrev->pData, (If_Obj_t *)pFanin->pData );
-            If_ManCreateChoice( pIfMan, (If_Obj_t *)pNode->pData );
-        }
-//        assert( If_ObjLevel(pIfObj) == Aig_ObjLevel(pNode) );
-    }
-    if ( vSwitching )
-        Vec_IntFree( vSwitching );
-    return pIfMan;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Recursively derives the local AIG for the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Hop_Obj_t * Nwk_NodeIfToHop2_rec( Hop_Man_t * pHopMan, If_Man_t * pIfMan, If_Obj_t * pIfObj, Vec_Ptr_t * vVisited )
-{
-    If_Cut_t * pCut;
-    If_Obj_t * pTemp;
-    Hop_Obj_t * gFunc, * gFunc0, * gFunc1;
-    // get the best cut
-    pCut = If_ObjCutBest(pIfObj);
-    // if the cut is visited, return the result
-    if ( If_CutData(pCut) )
-        return (Hop_Obj_t *)If_CutData(pCut);
-    // mark the node as visited
-    Vec_PtrPush( vVisited, pCut );
-    // insert the worst case
-    If_CutSetData( pCut, (void *)1 );
-    // skip in case of primary input
-    if ( If_ObjIsCi(pIfObj) )
-        return (Hop_Obj_t *)If_CutData(pCut);
-    // compute the functions of the children
-    for ( pTemp = pIfObj; pTemp; pTemp = pTemp->pEquiv )
-    {
-        gFunc0 = Nwk_NodeIfToHop2_rec( pHopMan, pIfMan, pTemp->pFanin0, vVisited );
-        if ( gFunc0 == (void *)1 )
-            continue;
-        gFunc1 = Nwk_NodeIfToHop2_rec( pHopMan, pIfMan, pTemp->pFanin1, vVisited );
-        if ( gFunc1 == (void *)1 )
-            continue;
-        // both branches are solved
-        gFunc = Hop_And( pHopMan, Hop_NotCond(gFunc0, pTemp->fCompl0), Hop_NotCond(gFunc1, pTemp->fCompl1) ); 
-        if ( pTemp->fPhase != pIfObj->fPhase )
-            gFunc = Hop_Not(gFunc);
-        If_CutSetData( pCut, gFunc );
-        break;
-    }
-    return (Hop_Obj_t *)If_CutData(pCut);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the local AIG for the cut.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Hop_Obj_t * Nwk_NodeIfToHop( Hop_Man_t * pHopMan, If_Man_t * pIfMan, If_Obj_t * pIfObj )
-{
-    If_Cut_t * pCut;
-    Hop_Obj_t * gFunc;
-    If_Obj_t * pLeaf;
-    int i;
-    // get the best cut
-    pCut = If_ObjCutBest(pIfObj);
-    assert( pCut->nLeaves > 1 );
-    // set the leaf variables
-    If_CutForEachLeaf( pIfMan, pCut, pLeaf, i )
-        If_CutSetData( If_ObjCutBest(pLeaf), Hop_IthVar(pHopMan, i) );
-    // recursively compute the function while collecting visited cuts
-    Vec_PtrClear( pIfMan->vTemp );
-    gFunc = Nwk_NodeIfToHop2_rec( pHopMan, pIfMan, pIfObj, pIfMan->vTemp ); 
-    if ( gFunc == (void *)1 )
-    {
-        printf( "Nwk_NodeIfToHop(): Computing local AIG has failed.\n" );
-        return NULL;
-    }
-//    printf( "%d ", Vec_PtrSize(p->vTemp) );
-    // clean the cuts
-    If_CutForEachLeaf( pIfMan, pCut, pLeaf, i )
-        If_CutSetData( If_ObjCutBest(pLeaf), NULL );
-    Vec_PtrForEachEntry( If_Cut_t *, pIfMan->vTemp, pCut, i )
-        If_CutSetData( pCut, NULL );
-    return gFunc;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Man_t * Nwk_ManFromIf( If_Man_t * pIfMan, Aig_Man_t * p, Vec_Ptr_t * vAigToIf )
-{
-    Vec_Ptr_t * vIfToAig;
-    Nwk_Man_t * pNtk;
-    Nwk_Obj_t * pObjNew;
-    Aig_Obj_t * pObj, * pObjRepr;
-    If_Obj_t * pIfObj;
-    If_Cut_t * pCutBest;
-    int i, k, nLeaves, * ppLeaves;
-    assert( Aig_ManPiNum(p) == If_ManCiNum(pIfMan) );
-    assert( Aig_ManPoNum(p) == If_ManCoNum(pIfMan) );
-    assert( Aig_ManNodeNum(p) == If_ManAndNum(pIfMan) );
-    Aig_ManCleanData( p );
-    If_ManCleanCutData( pIfMan );
-    // create mapping of IF to AIG
-    vIfToAig = Vec_PtrStart( If_ManObjNum(pIfMan) );
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        pIfObj = (If_Obj_t *)Vec_PtrEntry( vAigToIf, i );
-        Vec_PtrWriteEntry( vIfToAig, pIfObj->Id, pObj );
-    }
-    // construct the network
-    pNtk = Nwk_ManAlloc();
-    pNtk->pName = Aig_UtilStrsav( p->pName );
-    pNtk->pSpec = Aig_UtilStrsav( p->pSpec );
-//    pNtk->nLatches = Aig_ManRegNum(p);
-//    pNtk->nTruePis = Nwk_ManCiNum(pNtk) - pNtk->nLatches;
-//    pNtk->nTruePos = Nwk_ManCoNum(pNtk) - pNtk->nLatches;
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        pIfObj = (If_Obj_t *)Vec_PtrEntry( vAigToIf, i );
-        if ( pIfObj->nRefs == 0 && !If_ObjIsTerm(pIfObj) )
-            continue;
-        if ( Aig_ObjIsNode(pObj) )
-        {
-            pCutBest = If_ObjCutBest( pIfObj );
-            nLeaves  = If_CutLeaveNum( pCutBest ); 
-            ppLeaves = If_CutLeaves( pCutBest );
-            // create node
-            pObjNew = Nwk_ManCreateNode( pNtk, nLeaves, pIfObj->nRefs );
-            for ( k = 0; k < nLeaves; k++ )
-            {
-                pObjRepr = (Aig_Obj_t *)Vec_PtrEntry( vIfToAig, ppLeaves[k] );
-                Nwk_ObjAddFanin( pObjNew, (Nwk_Obj_t *)pObjRepr->pData );
-            }
-            // get the functionality
-            pObjNew->pFunc = Nwk_NodeIfToHop( pNtk->pManHop, pIfMan, pIfObj );
-        }
-        else if ( Aig_ObjIsPi(pObj) )
-            pObjNew = Nwk_ManCreateCi( pNtk, pIfObj->nRefs );
-        else if ( Aig_ObjIsPo(pObj) )
-        {
-            pObjNew = Nwk_ManCreateCo( pNtk );
-            pObjNew->fInvert = Aig_ObjFaninC0(pObj);
-            Nwk_ObjAddFanin( pObjNew, (Nwk_Obj_t *)Aig_ObjFanin0(pObj)->pData );
-//printf( "%d ", pObjNew->Id );
-        }
-        else if ( Aig_ObjIsConst1(pObj) )
-        {
-            pObjNew = Nwk_ManCreateNode( pNtk, 0, pIfObj->nRefs );
-            pObjNew->pFunc = Hop_ManConst1( pNtk->pManHop );
-        }
-        else
-            assert( 0 );
-        pObj->pData = pObjNew;
-    }
-//printf( "\n" );
-    Vec_PtrFree( vIfToAig );
-    pNtk->pManTime = Tim_ManDup( pIfMan->pManTim, 0 );
-    Nwk_ManMinimumBase( pNtk, 0 );
-    assert( Nwk_ManCheck( pNtk ) );
-    return pNtk;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Interface with the FPGA mapping package.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Man_t * Nwk_MappingIf( Aig_Man_t * p, Tim_Man_t * pManTime, If_Par_t * pPars )
-{
-    Nwk_Man_t * pNtk;
-    If_Man_t * pIfMan;
-    Vec_Ptr_t * vAigToIf;
-    // set the arrival times
-    pPars->pTimesArr = ABC_ALLOC( float, Aig_ManPiNum(p) );
-    memset( pPars->pTimesArr, 0, sizeof(float) * Aig_ManPiNum(p) );
-    // translate into the mapper
-    vAigToIf = Vec_PtrStart( Aig_ManObjNumMax(p) );
-    pIfMan = Nwk_ManToIf( p, pPars, vAigToIf );    
-    if ( pIfMan == NULL )
-        return NULL;
-    pIfMan->pManTim = Tim_ManDup( pManTime, 0 );
-    pIfMan->pPars->fCutMin = 0; // is not compatible with deriving result
-    if ( !If_ManPerformMapping( pIfMan ) )
-    {
-        If_ManStop( pIfMan );
-        return NULL;
-    }
-    // transform the result of mapping into the new network
-    pNtk = Nwk_ManFromIf( pIfMan, p, vAigToIf );
-    if ( pPars->fBidec && pPars->nLutSize <= 8 )
-        Nwk_ManBidecResyn( pNtk, 0 );
-    If_ManStop( pIfMan );
-    Vec_PtrFree( vAigToIf );
-    return pNtk;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkMerge.c b/src/aig/nwk/nwkMerge.c
deleted file mode 100644
index 9a4f2f8c..00000000
--- a/src/aig/nwk/nwkMerge.c
+++ /dev/null
@@ -1,1044 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkMerge.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [LUT merging algorithm.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkMerge.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-#include "nwkMerge.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates the graph.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Grf_t * Nwk_ManGraphAlloc( int nVertsMax )
-{
-    Nwk_Grf_t * p;
-    p = ABC_ALLOC( Nwk_Grf_t, 1 );
-    memset( p, 0, sizeof(Nwk_Grf_t) );
-    p->nVertsMax = nVertsMax;
-    p->nEdgeHash = Aig_PrimeCudd( 3 * nVertsMax );
-    p->pEdgeHash = ABC_CALLOC( Nwk_Edg_t *, p->nEdgeHash );
-    p->pMemEdges = Aig_MmFixedStart( sizeof(Nwk_Edg_t), p->nEdgeHash );
-    p->vPairs    = Vec_IntAlloc( 1000 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocates the graph.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManGraphFree( Nwk_Grf_t * p )
-{
-    if ( p->vPairs )    Vec_IntFree( p->vPairs );
-    if ( p->pMemEdges ) Aig_MmFixedStop( p->pMemEdges, 0 );
-    if ( p->pMemVerts ) Aig_MmFlexStop( p->pMemVerts, 0 );
-    ABC_FREE( p->pVerts );
-    ABC_FREE( p->pEdgeHash );
-    ABC_FREE( p->pMapLut2Id );
-    ABC_FREE( p->pMapId2Lut );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares the graph for solving the problem.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManGraphReportMemoryUsage( Nwk_Grf_t * p )
-{
-    p->nMemBytes1 = 
-        sizeof(Nwk_Grf_t) +
-        sizeof(void *) * p->nEdgeHash + 
-        sizeof(int) * (p->nObjs + p->nVertsMax) +
-        sizeof(Nwk_Edg_t) * p->nEdges;
-    p->nMemBytes2 = 
-        sizeof(Nwk_Vrt_t) * p->nVerts + 
-        sizeof(int) * 2 * p->nEdges;
-    printf( "Memory usage stats:  Preprocessing = %.2f Mb.  Solving = %.2f Mb.\n",
-        1.0 * p->nMemBytes1 / (1<<20), 1.0 * p->nMemBytes2 / (1<<20) );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Finds or adds the edge to the graph.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManGraphHashEdge( Nwk_Grf_t * p, int iLut1, int iLut2 )
-{
-    Nwk_Edg_t * pEntry;
-    unsigned Key;
-    if ( iLut1 == iLut2 )
-        return;
-    if ( iLut1 > iLut2 )
-    {
-        Key = iLut1;
-        iLut1 = iLut2;
-        iLut2 = Key;
-    }
-    assert( iLut1 < iLut2 );
-    if ( p->nObjs < iLut2 )
-        p->nObjs = iLut2;
-    Key = (unsigned)(741457 * iLut1 + 4256249 * iLut2) % p->nEdgeHash;
-    for ( pEntry = p->pEdgeHash[Key]; pEntry; pEntry = pEntry->pNext )
-        if ( pEntry->iNode1 == iLut1 && pEntry->iNode2 == iLut2 )
-            return;
-    pEntry = (Nwk_Edg_t *)Aig_MmFixedEntryFetch( p->pMemEdges );
-    pEntry->iNode1 = iLut1;
-    pEntry->iNode2 = iLut2;
-    pEntry->pNext = p->pEdgeHash[Key];
-    p->pEdgeHash[Key] = pEntry;
-    p->nEdges++;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds one entry to the list.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Nwk_ManGraphListAdd( Nwk_Grf_t * p, int * pList, Nwk_Vrt_t * pVertex )
-{
-    if ( *pList )
-    {
-        Nwk_Vrt_t * pHead;
-        pHead = p->pVerts[*pList];
-        pVertex->iPrev = 0;
-        pVertex->iNext = pHead->Id;
-        pHead->iPrev = pVertex->Id;
-    }
-    *pList = pVertex->Id;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deletes one entry from the list.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Nwk_ManGraphListDelete( Nwk_Grf_t * p, int * pList, Nwk_Vrt_t * pVertex )
-{
-    assert( *pList );
-    if ( pVertex->iPrev )
-    {
-//        assert( p->pVerts[pVertex->iPrev]->iNext == pVertex->Id );
-        p->pVerts[pVertex->iPrev]->iNext = pVertex->iNext;
-    }
-    if ( pVertex->iNext )
-    {
-//        assert( p->pVerts[pVertex->iNext]->iPrev == pVertex->Id );
-        p->pVerts[pVertex->iNext]->iPrev = pVertex->iPrev;
-    }
-    if ( *pList == pVertex->Id )
-        *pList = pVertex->iNext;
-    pVertex->iPrev = pVertex->iNext = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts the edge into one of the linked lists.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Nwk_ManGraphListInsert( Nwk_Grf_t * p, Nwk_Vrt_t * pVertex )
-{
-    Nwk_Vrt_t * pNext;
-    assert( pVertex->nEdges > 0 );
-
-    if ( pVertex->nEdges == 1 )
-    {
-        pNext = p->pVerts[ pVertex->pEdges[0] ];
-        if ( pNext->nEdges >= NWK_MAX_LIST )
-            Nwk_ManGraphListAdd( p, p->pLists1 + NWK_MAX_LIST, pVertex );
-        else
-            Nwk_ManGraphListAdd( p, p->pLists1 + pNext->nEdges, pVertex );
-    }
-    else
-    {
-        if ( pVertex->nEdges >= NWK_MAX_LIST )
-            Nwk_ManGraphListAdd( p, p->pLists2 + NWK_MAX_LIST, pVertex );
-        else
-            Nwk_ManGraphListAdd( p, p->pLists2 + pVertex->nEdges, pVertex );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Extracts the edge from one of the linked lists.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Nwk_ManGraphListExtract( Nwk_Grf_t * p, Nwk_Vrt_t * pVertex )
-{
-    Nwk_Vrt_t * pNext;
-    assert( pVertex->nEdges > 0 );
-
-    if ( pVertex->nEdges == 1 )
-    {
-        pNext = p->pVerts[ pVertex->pEdges[0] ];
-        if ( pNext->nEdges >= NWK_MAX_LIST )
-            Nwk_ManGraphListDelete( p, p->pLists1 + NWK_MAX_LIST, pVertex );
-        else
-            Nwk_ManGraphListDelete( p, p->pLists1 + pNext->nEdges, pVertex );
-    }
-    else
-    {
-        if ( pVertex->nEdges >= NWK_MAX_LIST )
-            Nwk_ManGraphListDelete( p, p->pLists2 + NWK_MAX_LIST, pVertex );
-        else
-            Nwk_ManGraphListDelete( p, p->pLists2 + pVertex->nEdges, pVertex );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares the graph for solving the problem.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManGraphPrepare( Nwk_Grf_t * p )
-{
-    Nwk_Edg_t * pEntry;
-    Nwk_Vrt_t * pVertex;
-    int * pnEdges, nBytes, i;
-    // allocate memory for the present objects
-    p->pMapLut2Id = ABC_ALLOC( int, p->nObjs+1 );
-    p->pMapId2Lut = ABC_ALLOC( int, p->nVertsMax+1 );
-    memset( p->pMapLut2Id, 0xff, sizeof(int) * (p->nObjs+1) );
-    memset( p->pMapId2Lut, 0xff, sizeof(int) * (p->nVertsMax+1) );
-    // mark present objects
-    Nwk_GraphForEachEdge( p, pEntry, i )
-    {
-        assert( pEntry->iNode1 <= p->nObjs );
-        assert( pEntry->iNode2 <= p->nObjs );
-        p->pMapLut2Id[ pEntry->iNode1 ] = 0;
-        p->pMapLut2Id[ pEntry->iNode2 ] = 0;
-    }
-    // map objects
-    p->nVerts = 0;
-    for ( i = 0; i <= p->nObjs; i++ )
-    {
-        if ( p->pMapLut2Id[i] == 0 )
-        {
-            p->pMapLut2Id[i] = ++p->nVerts;
-            p->pMapId2Lut[p->nVerts] = i;
-        }
-    }
-    // count the edges and mark present objects
-    pnEdges = ABC_CALLOC( int, p->nVerts+1 );
-    Nwk_GraphForEachEdge( p, pEntry, i )
-    {
-        // translate into vertices
-        assert( pEntry->iNode1 <= p->nObjs );
-        assert( pEntry->iNode2 <= p->nObjs );
-        pEntry->iNode1 = p->pMapLut2Id[pEntry->iNode1];
-        pEntry->iNode2 = p->pMapLut2Id[pEntry->iNode2];
-        // count the edges
-        assert( pEntry->iNode1 <= p->nVerts );
-        assert( pEntry->iNode2 <= p->nVerts );
-        pnEdges[pEntry->iNode1]++;
-        pnEdges[pEntry->iNode2]++;
-    }
-    // allocate the real graph
-    p->pMemVerts  = Aig_MmFlexStart();
-    p->pVerts = ABC_ALLOC( Nwk_Vrt_t *, p->nVerts + 1 );
-    p->pVerts[0] = NULL;
-    for ( i = 1; i <= p->nVerts; i++ )
-    {
-        assert( pnEdges[i] > 0 );
-        nBytes = sizeof(Nwk_Vrt_t) + sizeof(int) * pnEdges[i];
-        p->pVerts[i] = (Nwk_Vrt_t *)Aig_MmFlexEntryFetch( p->pMemVerts, nBytes );
-        memset( p->pVerts[i], 0, nBytes );
-        p->pVerts[i]->Id = i;
-    }
-    // add edges to the real graph
-    Nwk_GraphForEachEdge( p, pEntry, i )
-    {
-        pVertex = p->pVerts[pEntry->iNode1];
-        pVertex->pEdges[ pVertex->nEdges++ ] = pEntry->iNode2;
-        pVertex = p->pVerts[pEntry->iNode2];
-        pVertex->pEdges[ pVertex->nEdges++ ] = pEntry->iNode1;
-    }
-    // put vertices into the data structure
-    for ( i = 1; i <= p->nVerts; i++ )
-    {
-        assert( p->pVerts[i]->nEdges == pnEdges[i] );
-        Nwk_ManGraphListInsert( p, p->pVerts[i] );
-    }
-    // clean up
-    Aig_MmFixedStop( p->pMemEdges, 0 ); p->pMemEdges = NULL;
-    ABC_FREE( p->pEdgeHash );
-//    p->nEdgeHash = 0;
-    ABC_FREE( pnEdges );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sort pairs by the first vertex in the topological order.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManGraphSortPairs( Nwk_Grf_t * p )
-{
-    int nSize = Vec_IntSize(p->vPairs);
-    int * pIdToPair, i;
-    // allocate storage
-    pIdToPair = ABC_ALLOC( int, p->nObjs+1 );
-    for ( i = 0; i <= p->nObjs; i++ )
-        pIdToPair[i] = -1;
-    // create mapping
-    for ( i = 0; i < p->vPairs->nSize; i += 2 )
-    {
-        assert( pIdToPair[ p->vPairs->pArray[i] ] == -1 );
-        pIdToPair[ p->vPairs->pArray[i] ] = p->vPairs->pArray[i+1];
-    }
-    // recreate pairs
-    Vec_IntClear( p->vPairs );
-    for ( i = 0; i <= p->nObjs; i++ )
-        if ( pIdToPair[i] >= 0 )
-        {
-            assert( i < pIdToPair[i] );
-            Vec_IntPush( p->vPairs, i );
-            Vec_IntPush( p->vPairs, pIdToPair[i] );
-        }
-    assert( nSize == Vec_IntSize(p->vPairs) );
-    ABC_FREE( pIdToPair );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the problem after pulling out one edge.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManGraphCheckLists( Nwk_Grf_t * p )
-{
-    Nwk_Vrt_t * pVertex, * pNext;
-    int i, j;
-    assert( p->pLists1[0] == 0 );
-    for ( i = 1; i <= NWK_MAX_LIST; i++ )
-        if ( p->pLists1[i] )
-        {
-            pVertex = p->pVerts[ p->pLists1[i] ];
-            assert( pVertex->nEdges == 1 );
-            pNext = p->pVerts[ pVertex->pEdges[0] ];
-            assert( pNext->nEdges == i || pNext->nEdges > NWK_MAX_LIST );
-        }
-    // find the next vertext to extract
-    assert( p->pLists2[0] == 0 );
-    assert( p->pLists2[1] == 0 );
-    for ( j = 2; j <= NWK_MAX_LIST; j++ )
-        if ( p->pLists2[j] )
-        {
-            pVertex = p->pVerts[ p->pLists2[j] ];
-            assert( pVertex->nEdges == j || pVertex->nEdges > NWK_MAX_LIST );
-        }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Extracts the edge from one of the linked lists.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Nwk_ManGraphVertexRemoveEdge( Nwk_Vrt_t * pThis, Nwk_Vrt_t * pNext )
-{
-    int k;
-    for ( k = 0; k < pThis->nEdges; k++ )
-        if ( pThis->pEdges[k] == pNext->Id )
-            break;
-    assert( k < pThis->nEdges );
-    pThis->nEdges--;
-    for ( ; k < pThis->nEdges; k++ )
-        pThis->pEdges[k] = pThis->pEdges[k+1];
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the problem after pulling out one edge.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManGraphUpdate( Nwk_Grf_t * p, Nwk_Vrt_t * pVertex, Nwk_Vrt_t * pNext )
-{
-    Nwk_Vrt_t * pChanged, * pOther;
-    int i, k;
-//    Nwk_ManGraphCheckLists( p );
-    Nwk_ManGraphListExtract( p, pVertex );
-    Nwk_ManGraphListExtract( p, pNext );
-    // update neihbors of pVertex
-    Nwk_VertexForEachAdjacent( p, pVertex, pChanged, i )
-    {
-        if ( pChanged == pNext )
-            continue;
-        Nwk_ManGraphListExtract( p, pChanged );
-        // move those that use this one
-        if ( pChanged->nEdges > 1 )
-        Nwk_VertexForEachAdjacent( p, pChanged, pOther, k )
-        {
-            if ( pOther == pVertex || pOther->nEdges > 1 )
-                continue;
-            assert( pOther->nEdges == 1 );
-            Nwk_ManGraphListExtract( p, pOther );
-            pChanged->nEdges--;
-            Nwk_ManGraphListInsert( p, pOther );
-            pChanged->nEdges++;
-        }
-        // remove the edge
-        Nwk_ManGraphVertexRemoveEdge( pChanged, pVertex );
-        // add the changed vertex back
-        if ( pChanged->nEdges > 0 )
-            Nwk_ManGraphListInsert( p, pChanged );
-    }
-    // update neihbors of pNext
-    Nwk_VertexForEachAdjacent( p, pNext, pChanged, i )
-    {
-        if ( pChanged == pVertex )
-            continue;
-        Nwk_ManGraphListExtract( p, pChanged );
-        // move those that use this one
-        if ( pChanged->nEdges > 1 )
-        Nwk_VertexForEachAdjacent( p, pChanged, pOther, k )
-        {
-            if ( pOther == pNext || pOther->nEdges > 1 )
-                continue;
-            assert( pOther->nEdges == 1 );
-            Nwk_ManGraphListExtract( p, pOther );
-            pChanged->nEdges--;
-            Nwk_ManGraphListInsert( p, pOther );
-            pChanged->nEdges++;
-        }
-        // remove the edge
-        Nwk_ManGraphVertexRemoveEdge( pChanged, pNext );
-        // add the changed vertex back
-        if ( pChanged->nEdges > 0 )
-            Nwk_ManGraphListInsert( p, pChanged );
-    }
-    // add to the result
-    if ( pVertex->Id < pNext->Id )
-    {
-        Vec_IntPush( p->vPairs, p->pMapId2Lut[pVertex->Id] ); 
-        Vec_IntPush( p->vPairs, p->pMapId2Lut[pNext->Id] ); 
-    }
-    else
-    {
-        Vec_IntPush( p->vPairs, p->pMapId2Lut[pNext->Id] ); 
-        Vec_IntPush( p->vPairs, p->pMapId2Lut[pVertex->Id] ); 
-    }
-//    Nwk_ManGraphCheckLists( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of entries in the list.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManGraphListLength( Nwk_Grf_t * p, int List )
-{
-    Nwk_Vrt_t * pThis;
-    int fVerbose = 0;
-    int Counter = 0;
-    Nwk_ListForEachVertex( p, List, pThis )
-    {
-        if ( fVerbose && Counter < 20 )
-            printf( "%d ", p->pVerts[pThis->pEdges[0]]->nEdges );
-        Counter++;
-    }
-    if ( fVerbose )
-        printf( "\n" );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the adjacent vertex with the mininum number of edges.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Vrt_t * Nwk_ManGraphListFindMinEdge( Nwk_Grf_t * p, Nwk_Vrt_t * pVert )
-{
-    Nwk_Vrt_t * pThis, * pMinCost = NULL;
-    int k;
-    Nwk_VertexForEachAdjacent( p, pVert, pThis, k )
-    {
-        if ( pMinCost == NULL || pMinCost->nEdges > pThis->nEdges )
-            pMinCost = pThis;
-    }
-    return pMinCost;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Finds the best vertext in the list.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Vrt_t * Nwk_ManGraphListFindMin( Nwk_Grf_t * p, int List )
-{
-    Nwk_Vrt_t * pThis, * pMinCost = NULL;
-    int k, Counter = 10000, BestCost = 1000000;
-    Nwk_ListForEachVertex( p, List, pThis )
-    {
-        for ( k = 0; k < pThis->nEdges; k++ )
-        {
-            if ( pMinCost == NULL || BestCost > p->pVerts[pThis->pEdges[k]]->nEdges )
-            {
-                BestCost = p->pVerts[pThis->pEdges[k]]->nEdges;
-                pMinCost = pThis;
-            }
-        }
-        if ( --Counter == 0 )
-            break;
-    }
-    return pMinCost;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Solves the problem by extracting one edge at a time.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManGraphSolve( Nwk_Grf_t * p )
-{
-    Nwk_Vrt_t * pVertex, * pNext;
-    int i, j;
-    Nwk_ManGraphPrepare( p );
-    while ( 1 )
-    {
-        // find the next vertex to extract
-        assert( p->pLists1[0] == 0 );
-        for ( i = 1; i <= NWK_MAX_LIST; i++ )
-            if ( p->pLists1[i] )
-            {
-//                printf( "%d ", i );
-//                printf( "ListA = %2d. Length = %5d.\n", i, Nwk_ManGraphListLength(p,p->pLists1[i]) );
-                pVertex = p->pVerts[ p->pLists1[i] ];
-                assert( pVertex->nEdges == 1 );
-                pNext = p->pVerts[ pVertex->pEdges[0] ];
-                Nwk_ManGraphUpdate( p, pVertex, pNext );
-                break;
-            }
-        if ( i < NWK_MAX_LIST + 1 )
-            continue;
-        // find the next vertex to extract
-        assert( p->pLists2[0] == 0 );
-        assert( p->pLists2[1] == 0 );
-        for ( j = 2; j <= NWK_MAX_LIST; j++ )
-            if ( p->pLists2[j] )
-            {
-//                printf( "***%d ", j );
-//                printf( "ListB = %2d. Length = %5d.\n", j, Nwk_ManGraphListLength(p,p->pLists2[j]) );
-                pVertex = Nwk_ManGraphListFindMin( p, p->pLists2[j] ); 
-                assert( pVertex->nEdges == j || j == NWK_MAX_LIST );
-                pNext = Nwk_ManGraphListFindMinEdge( p, pVertex );
-                Nwk_ManGraphUpdate( p, pVertex, pNext );
-                break;
-            }
-        if ( j == NWK_MAX_LIST + 1 )
-            break;
-    }
-    Nwk_ManGraphSortPairs( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads graph from file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Grf_t * Nwk_ManLutMergeReadGraph( char * pFileName )
-{
-    Nwk_Grf_t * p;
-    FILE * pFile;
-    char Buffer[100];
-    int nNodes, nEdges, iNode1, iNode2;
-    pFile = fopen( pFileName, "r" );
-    fscanf( pFile, "%s %d", Buffer, &nNodes );
-    fscanf( pFile, "%s %d", Buffer, &nEdges );
-    p = Nwk_ManGraphAlloc( nNodes );
-    while ( fscanf( pFile, "%s %d %d", Buffer, &iNode1, &iNode2 ) == 3 )
-        Nwk_ManGraphHashEdge( p, iNode1, iNode2 );
-    assert( p->nEdges == nEdges );
-    fclose( pFile );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Solves the graph coming from file.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManLutMergeGraphTest( char * pFileName )
-{
-    int nPairs;
-    Nwk_Grf_t * p;
-    int clk = clock();
-    p = Nwk_ManLutMergeReadGraph( pFileName );
-    ABC_PRT( "Reading", clock() - clk );
-    clk = clock();
-    Nwk_ManGraphSolve( p );
-    printf( "GRAPH: Nodes = %6d. Edges = %6d.  Pairs = %6d.  ", 
-        p->nVerts, p->nEdges, Vec_IntSize(p->vPairs)/2 );
-    ABC_PRT( "Solving", clock() - clk );
-    nPairs = Vec_IntSize(p->vPairs)/2;
-    Nwk_ManGraphReportMemoryUsage( p );
-    Nwk_ManGraphFree( p );
-    return nPairs;
-}
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Marks the fanins of the node with the current trav ID.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManMarkFanins_rec( Nwk_Obj_t * pLut, int nLevMin )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( !Nwk_ObjIsNode(pLut) )
-        return;
-    if ( Nwk_ObjIsTravIdCurrent( pLut ) )
-        return;
-    Nwk_ObjSetTravIdCurrent( pLut );
-    if ( Nwk_ObjLevel(pLut) < nLevMin )
-        return;
-    Nwk_ObjForEachFanin( pLut, pNext, i )
-        Nwk_ManMarkFanins_rec( pNext, nLevMin );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Marks the fanouts of the node with the current trav ID.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManMarkFanouts_rec( Nwk_Obj_t * pLut, int nLevMax, int nFanMax )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    if ( !Nwk_ObjIsNode(pLut) )
-        return;
-    if ( Nwk_ObjIsTravIdCurrent( pLut ) )
-        return;
-    Nwk_ObjSetTravIdCurrent( pLut );
-    if ( Nwk_ObjLevel(pLut) > nLevMax )
-        return;
-    if ( Nwk_ObjFanoutNum(pLut) > nFanMax )
-        return;
-    Nwk_ObjForEachFanout( pLut, pNext, i )
-        Nwk_ManMarkFanouts_rec( pNext, nLevMax, nFanMax );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the circle of nodes around the given set.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManCollectCircle( Vec_Ptr_t * vStart, Vec_Ptr_t * vNext, int nFanMax )
-{
-    Nwk_Obj_t * pObj, * pNext;
-    int i, k;
-    Vec_PtrClear( vNext );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vStart, pObj, i )
-    {
-        Nwk_ObjForEachFanin( pObj, pNext, k )
-        {
-            if ( !Nwk_ObjIsNode(pNext) )
-                continue;
-            if ( Nwk_ObjIsTravIdCurrent( pNext ) )
-                continue;
-            Nwk_ObjSetTravIdCurrent( pNext );
-            Vec_PtrPush( vNext, pNext );
-        }
-        Nwk_ObjForEachFanout( pObj, pNext, k )
-        {
-            if ( !Nwk_ObjIsNode(pNext) )
-                continue;
-            if ( Nwk_ObjIsTravIdCurrent( pNext ) )
-                continue;
-            Nwk_ObjSetTravIdCurrent( pNext );
-            if ( Nwk_ObjFanoutNum(pNext) > nFanMax )
-                continue;
-            Vec_PtrPush( vNext, pNext );
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the circle of nodes removes from the given one.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManCollectNonOverlapCands( Nwk_Obj_t * pLut, Vec_Ptr_t * vStart, Vec_Ptr_t * vNext, Vec_Ptr_t * vCands, Nwk_LMPars_t * pPars )
-{
-    Vec_Ptr_t * vTemp;
-    Nwk_Obj_t * pObj;
-    int i, k;
-    Vec_PtrClear( vCands );
-    if ( pPars->nMaxSuppSize - Nwk_ObjFaninNum(pLut) <= 1 )
-        return;
-
-    // collect nodes removed by this distance
-    assert( pPars->nMaxDistance > 0 );
-    Vec_PtrClear( vStart );
-    Vec_PtrPush( vStart, pLut );
-    Nwk_ManIncrementTravId( pLut->pMan );
-    Nwk_ObjSetTravIdCurrent( pLut );
-    for ( i = 1; i <= pPars->nMaxDistance; i++ )
-    {
-        Nwk_ManCollectCircle( vStart, vNext, pPars->nMaxFanout );
-        vTemp  = vStart;
-        vStart = vNext;
-        vNext  = vTemp;
-        // collect the nodes in vStart
-        Vec_PtrForEachEntry( Nwk_Obj_t *, vStart, pObj, k )
-            Vec_PtrPush( vCands, pObj );
-    }
-
-    // mark the TFI/TFO nodes
-    Nwk_ManIncrementTravId( pLut->pMan );
-    if ( pPars->fUseTfiTfo )
-        Nwk_ObjSetTravIdCurrent( pLut );
-    else
-    {
-        Nwk_ObjSetTravIdPrevious( pLut );
-        Nwk_ManMarkFanins_rec( pLut, Nwk_ObjLevel(pLut) - pPars->nMaxDistance );
-        Nwk_ObjSetTravIdPrevious( pLut );
-        Nwk_ManMarkFanouts_rec( pLut, Nwk_ObjLevel(pLut) + pPars->nMaxDistance, pPars->nMaxFanout );
-    }
-
-    // collect nodes satisfying the following conditions:
-    // - they are close enough in terms of distance
-    // - they are not in the TFI/TFO of the LUT
-    // - they have no more than the given number of fanins
-    // - they have no more than the given diff in delay
-    k = 0;
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vCands, pObj, i )
-    {
-        if ( Nwk_ObjIsTravIdCurrent(pObj) )
-            continue;
-        if ( Nwk_ObjFaninNum(pLut) + Nwk_ObjFaninNum(pObj) > pPars->nMaxSuppSize )
-            continue;
-        if ( Nwk_ObjLevel(pLut) - Nwk_ObjLevel(pObj) > pPars->nMaxLevelDiff || 
-             Nwk_ObjLevel(pObj) - Nwk_ObjLevel(pLut) > pPars->nMaxLevelDiff )
-             continue;
-        Vec_PtrWriteEntry( vCands, k++, pObj );
-    }
-    Vec_PtrShrink( vCands, k );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Count the total number of fanins.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManCountTotalFanins( Nwk_Obj_t * pLut, Nwk_Obj_t * pCand )
-{
-    Nwk_Obj_t * pFanin;
-    int i, nCounter = Nwk_ObjFaninNum(pLut);
-    Nwk_ObjForEachFanin( pCand, pFanin, i )
-        nCounter += !pFanin->MarkC;
-    return nCounter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects overlapping candidates.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManCollectOverlapCands( Nwk_Obj_t * pLut, Vec_Ptr_t * vCands, Nwk_LMPars_t * pPars )
-{
-    Nwk_Obj_t * pFanin, * pObj;
-    int i, k;
-    // mark fanins of pLut
-    Nwk_ObjForEachFanin( pLut, pFanin, i )
-        pFanin->MarkC = 1;
-    // collect the matching fanouts of each fanin of the node
-    Vec_PtrClear( vCands );
-    Nwk_ManIncrementTravId( pLut->pMan );
-    Nwk_ObjSetTravIdCurrent( pLut );
-    Nwk_ObjForEachFanin( pLut, pFanin, i )
-    {
-        if ( !Nwk_ObjIsNode(pFanin) )
-            continue;
-        if ( Nwk_ObjFanoutNum(pFanin) > pPars->nMaxFanout )
-            continue;
-        Nwk_ObjForEachFanout( pFanin, pObj, k )
-        {
-            if ( !Nwk_ObjIsNode(pObj) )
-                continue;
-            if ( Nwk_ObjIsTravIdCurrent( pObj ) )
-                continue;
-            Nwk_ObjSetTravIdCurrent( pObj );
-            // check the difference in delay
-            if ( Nwk_ObjLevel(pLut) - Nwk_ObjLevel(pObj) > pPars->nMaxLevelDiff || 
-                 Nwk_ObjLevel(pObj) - Nwk_ObjLevel(pLut) > pPars->nMaxLevelDiff )
-                 continue;
-            // check the total number of fanins of the node
-            if ( Nwk_ManCountTotalFanins(pLut, pObj) > pPars->nMaxSuppSize )
-                continue;
-            Vec_PtrPush( vCands, pObj );
-        }
-    }
-    // unmark fanins of pLut
-    Nwk_ObjForEachFanin( pLut, pFanin, i )
-        pFanin->MarkC = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs LUT merging with parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Nwk_ManLutMerge( Nwk_Man_t * pNtk, void * pParsInit )
-{
-    Nwk_LMPars_t * pPars = (Nwk_LMPars_t *)pParsInit;
-    Nwk_Grf_t * p;
-    Vec_Int_t * vResult;
-    Vec_Ptr_t * vStart, * vNext, * vCands1, * vCands2;
-    Nwk_Obj_t * pLut, * pCand;
-    int i, k, nVertsMax, nCands, clk = clock();
-    // count the number of vertices
-    nVertsMax = 0;
-    Nwk_ManForEachNode( pNtk, pLut, i )
-        nVertsMax += (int)(Nwk_ObjFaninNum(pLut) <= pPars->nMaxLutSize);
-    p = Nwk_ManGraphAlloc( nVertsMax );
-    // create graph
-    vStart  = Vec_PtrAlloc( 1000 );
-    vNext   = Vec_PtrAlloc( 1000 );
-    vCands1 = Vec_PtrAlloc( 1000 );
-    vCands2 = Vec_PtrAlloc( 1000 );
-    nCands  = 0;
-    Nwk_ManForEachNode( pNtk, pLut, i )
-    {
-        if ( Nwk_ObjFaninNum(pLut) > pPars->nMaxLutSize )
-            continue;
-        Nwk_ManCollectOverlapCands( pLut, vCands1, pPars );
-        if ( pPars->fUseDiffSupp )
-            Nwk_ManCollectNonOverlapCands( pLut, vStart, vNext, vCands2, pPars );
-        if ( Vec_PtrSize(vCands1) == 0 && Vec_PtrSize(vCands2) == 0 )
-            continue;
-        nCands += Vec_PtrSize(vCands1) + Vec_PtrSize(vCands2);
-        // save candidates
-        Vec_PtrForEachEntry( Nwk_Obj_t *, vCands1, pCand, k )
-            Nwk_ManGraphHashEdge( p, Nwk_ObjId(pLut), Nwk_ObjId(pCand) );
-        Vec_PtrForEachEntry( Nwk_Obj_t *, vCands2, pCand, k )
-            Nwk_ManGraphHashEdge( p, Nwk_ObjId(pLut), Nwk_ObjId(pCand) );
-        // print statistics about this node
-        if ( pPars->fVeryVerbose )
-        printf( "Node %6d : Fanins = %d. Fanouts = %3d.  Cand1 = %3d. Cand2 = %3d.\n",
-            Nwk_ObjId(pLut), Nwk_ObjFaninNum(pLut), Nwk_ObjFaninNum(pLut), 
-            Vec_PtrSize(vCands1), Vec_PtrSize(vCands2) );
-    }
-    Vec_PtrFree( vStart );
-    Vec_PtrFree( vNext );
-    Vec_PtrFree( vCands1 );
-    Vec_PtrFree( vCands2 );
-    if ( pPars->fVerbose )
-    {
-        printf( "Mergable LUTs = %6d. Total cands = %6d. ", p->nVertsMax, nCands );
-        ABC_PRT( "Deriving graph", clock() - clk );
-    }
-    // solve the graph problem
-    clk = clock();
-    Nwk_ManGraphSolve( p );
-    if ( pPars->fVerbose )
-    {
-        printf( "GRAPH: Nodes = %6d. Edges = %6d.  Pairs = %6d.  ", 
-            p->nVerts, p->nEdges, Vec_IntSize(p->vPairs)/2 );
-        ABC_PRT( "Solving", clock() - clk );
-        Nwk_ManGraphReportMemoryUsage( p );
-    }
-    vResult = p->vPairs; p->vPairs = NULL;
-/*
-    for ( i = 0; i < vResult->nSize; i += 2 )
-        printf( "(%d,%d) ", vResult->pArray[i], vResult->pArray[i+1] );
-    printf( "\n" );
-*/
-    Nwk_ManGraphFree( p );
-    return vResult;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkMerge.h b/src/aig/nwk/nwkMerge.h
deleted file mode 100644
index f6be760f..00000000
--- a/src/aig/nwk/nwkMerge.h
+++ /dev/null
@@ -1,153 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkMerge.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Logic network representation.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkMerge.h,v 1.1 2008/05/14 22:13:09 wudenni Exp $]
-
-***********************************************************************/
- 
-#ifndef __NWK_MERGE_H__
-#define __NWK_MERGE_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-#define NWK_MAX_LIST  16
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-// the LUT merging parameters
-typedef struct Nwk_LMPars_t_  Nwk_LMPars_t;
-struct Nwk_LMPars_t_
-{
-    int    nMaxLutSize;    // the max LUT size for merging (N=5)
-    int    nMaxSuppSize;   // the max total support size after merging (S=5)
-    int    nMaxDistance;   // the max number of nodes separating LUTs
-    int    nMaxLevelDiff;  // the max difference in levels
-    int    nMaxFanout;     // the max number of fanouts to traverse
-    int    fUseDiffSupp;   // enables the use of nodes with different support
-    int    fUseTfiTfo;     // enables the use of TFO/TFO nodes as candidates
-    int    fVeryVerbose;   // enables additional verbose output
-    int    fVerbose;       // enables verbose output
-};
-
-// edge of the graph
-typedef struct Nwk_Edg_t_  Nwk_Edg_t;
-struct Nwk_Edg_t_
-{
-    int             iNode1;      // the first node
-    int             iNode2;      // the second node
-    Nwk_Edg_t *     pNext;       // the next edge
-};
-
-// vertex of the graph
-typedef struct Nwk_Vrt_t_  Nwk_Vrt_t;
-struct Nwk_Vrt_t_
-{
-    int             Id;          // the vertex number
-    int             iPrev;       // the previous vertex in the list
-    int             iNext;       // the next vertex in the list
-    int             nEdges;      // the number of edges
-    int             pEdges[0];   // the array of edges
-};
-
-// the connectivity graph
-typedef struct Nwk_Grf_t_  Nwk_Grf_t;
-struct Nwk_Grf_t_
-{
-    // preliminary graph representation
-    int             nObjs;       // the number of objects
-    int             nVertsMax;   // the upper bound on the number of vertices
-    int             nEdgeHash;   // an approximate number of edges
-    Nwk_Edg_t **    pEdgeHash;   // hash table for edges
-    Aig_MmFixed_t * pMemEdges;   // memory for edges
-    // graph representation
-    int             nEdges;      // the number of edges
-    int             nVerts;      // the number of vertices
-    Nwk_Vrt_t **    pVerts;      // the array of vertices
-    Aig_MmFlex_t *  pMemVerts;   // memory for vertices
-    // intermediate data
-    int pLists1[NWK_MAX_LIST+1]; // lists of nodes with one edge
-    int pLists2[NWK_MAX_LIST+1]; // lists of nodes with more than one edge
-    // the results of matching
-    Vec_Int_t *     vPairs;      // pairs matched in the graph
-    // object mappings
-    int *           pMapLut2Id;  // LUT numbers into vertex IDs
-    int *           pMapId2Lut;  // vertex IDs into LUT numbers
-    // other things
-    int             nMemBytes1;  // memory usage in bytes
-    int             nMemBytes2;  // memory usage in bytes
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-#define Nwk_GraphForEachEdge( p, pEdge, k )             \
-    for ( k = 0; k < p->nEdgeHash; k++ )                \
-        for ( pEdge = p->pEdgeHash[k]; pEdge; pEdge = pEdge->pNext )
-
-#define Nwk_ListForEachVertex( p, List, pVrt )          \
-    for ( pVrt = List? p->pVerts[List] : NULL;  pVrt;   \
-          pVrt = pVrt->iNext? p->pVerts[pVrt->iNext] : NULL )
-
-#define Nwk_VertexForEachAdjacent( p, pVrt, pNext, k )  \
-    for ( k = 0; (k < pVrt->nEdges) && (((pNext) = p->pVerts[pVrt->pEdges[k]]), 1); k++ )
-
-////////////////////////////////////////////////////////////////////////
-///                      INLINED FUNCTIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         ITERATORS                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== nwkMerge.c ==========================================================*/
-extern ABC_DLL Nwk_Grf_t *   Nwk_ManGraphAlloc( int nVertsMax );
-extern ABC_DLL void          Nwk_ManGraphFree( Nwk_Grf_t * p );
-extern ABC_DLL void          Nwk_ManGraphReportMemoryUsage( Nwk_Grf_t * p );
-extern ABC_DLL void          Nwk_ManGraphHashEdge( Nwk_Grf_t * p, int iLut1, int iLut2 );
-extern ABC_DLL void          Nwk_ManGraphSolve( Nwk_Grf_t * p );
-extern ABC_DLL int           Nwk_ManLutMergeGraphTest( char * pFileName );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/nwk/nwkObj.c b/src/aig/nwk/nwkObj.c
deleted file mode 100644
index e5930087..00000000
--- a/src/aig/nwk/nwkObj.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkObj.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Logic network representation.]
-
-  Synopsis    [Manipulation of objects.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkObj.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates an object.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Obj_t * Nwk_ManCreateObj( Nwk_Man_t * p, int nFanins, int nFanouts )
-{
-    Nwk_Obj_t * pObj;
-    pObj = (Nwk_Obj_t *)Aig_MmFlexEntryFetch( p->pMemObjs, sizeof(Nwk_Obj_t) + (nFanins + nFanouts + p->nFanioPlus) * sizeof(Nwk_Obj_t *) );
-    memset( pObj, 0, sizeof(Nwk_Obj_t) );
-    pObj->pFanio = (Nwk_Obj_t **)((char *)pObj + sizeof(Nwk_Obj_t));
-    pObj->Id = Vec_PtrSize( p->vObjs );
-    Vec_PtrPush( p->vObjs, pObj );
-    pObj->pMan        = p;
-    pObj->nFanioAlloc = nFanins + nFanouts + p->nFanioPlus;
-    return pObj;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Creates a primary input.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Obj_t * Nwk_ManCreateCi( Nwk_Man_t * p, int nFanouts )
-{
-    Nwk_Obj_t * pObj;
-    pObj = Nwk_ManCreateObj( p, 1, nFanouts );
-    pObj->PioId = Vec_PtrSize( p->vCis );
-    Vec_PtrPush( p->vCis, pObj );
-    pObj->Type = NWK_OBJ_CI;
-    p->nObjs[NWK_OBJ_CI]++;
-    return pObj;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates a primary output.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Obj_t * Nwk_ManCreateCo( Nwk_Man_t * p )
-{
-    Nwk_Obj_t * pObj;
-    pObj = Nwk_ManCreateObj( p, 1, 1 );
-    pObj->PioId = Vec_PtrSize( p->vCos );
-    Vec_PtrPush( p->vCos, pObj );
-    pObj->Type = NWK_OBJ_CO;
-    p->nObjs[NWK_OBJ_CO]++;
-    return pObj;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates a latch.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Obj_t * Nwk_ManCreateLatch( Nwk_Man_t * p )
-{
-    Nwk_Obj_t * pObj;
-    pObj = Nwk_ManCreateObj( p, 1, 1 );
-    pObj->Type = NWK_OBJ_LATCH;
-    p->nObjs[NWK_OBJ_LATCH]++;
-    return pObj;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates a node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Nwk_Obj_t * Nwk_ManCreateNode( Nwk_Man_t * p, int nFanins, int nFanouts )
-{
-    Nwk_Obj_t * pObj;
-    pObj = Nwk_ManCreateObj( p, nFanins, nFanouts );
-    pObj->Type = NWK_OBJ_NODE;
-    p->nObjs[NWK_OBJ_NODE]++;
-    return pObj;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Deletes the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManDeleteNode( Nwk_Obj_t * pObj )
-{
-    Vec_Ptr_t * vNodes = pObj->pMan->vTemp;
-    Nwk_Obj_t * pTemp;
-    int i;
-    assert( Nwk_ObjFanoutNum(pObj) == 0 );
-    // delete fanins
-    Nwk_ObjCollectFanins( pObj, vNodes );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vNodes, pTemp, i )
-        Nwk_ObjDeleteFanin( pObj, pTemp );
-    // remove from the list of objects
-    Vec_PtrWriteEntry( pObj->pMan->vObjs, pObj->Id, NULL );
-    pObj->pMan->nObjs[pObj->Type]--;
-    memset( pObj, 0, sizeof(Nwk_Obj_t) );
-    pObj->Id = -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deletes the node and MFFC of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManDeleteNode_rec( Nwk_Obj_t * pObj )
-{
-    Vec_Ptr_t * vNodes;
-    int i;
-    assert( !Nwk_ObjIsCi(pObj) );
-    assert( Nwk_ObjFanoutNum(pObj) == 0 );
-    vNodes = Vec_PtrAlloc( 100 );
-    Nwk_ObjCollectFanins( pObj, vNodes );
-    Nwk_ManDeleteNode( pObj );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vNodes, pObj, i )
-        if ( Nwk_ObjIsNode(pObj) && Nwk_ObjFanoutNum(pObj) == 0 )
-            Nwk_ManDeleteNode_rec( pObj );
-    Vec_PtrFree( vNodes );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkSpeedup.c b/src/aig/nwk/nwkSpeedup.c
deleted file mode 100644
index 335d50f8..00000000
--- a/src/aig/nwk/nwkSpeedup.c
+++ /dev/null
@@ -1,382 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkSpeedup.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    [Global delay optimization using structural choices.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkSpeedup.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Adds strashed nodes for one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Aig_ManSpeedupNode_rec( Aig_Man_t * pAig, Aig_Obj_t * pNode, Vec_Ptr_t * vNodes )
-{
-    if ( Aig_ObjIsTravIdCurrent(pAig, pNode) )
-        return 1;
-    if ( Aig_ObjIsPi(pNode) )
-        return 0;
-    assert( Aig_ObjIsNode(pNode) );
-    Aig_ObjSetTravIdCurrent( pAig, pNode );
-    if ( !Aig_ManSpeedupNode_rec( pAig, Aig_ObjFanin0(pNode), vNodes ) )
-        return 0;
-    if ( !Aig_ManSpeedupNode_rec( pAig, Aig_ObjFanin1(pNode), vNodes ) )
-        return 0;
-    Vec_PtrPush( vNodes, pNode );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds strashed nodes for one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Aig_ManSpeedupNode( Nwk_Man_t * pNtk, Aig_Man_t * pAig, Nwk_Obj_t * pNode, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vTimes )
-{
-    Vec_Ptr_t * vNodes;
-    Nwk_Obj_t * pObj, * pObj2;
-    Aig_Obj_t * ppCofs[32], * pAnd, * pTemp;
-    int nCofs, i, k, nSkip;
-
-    // quit of regulars are the same
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vLeaves, pObj, i )
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vLeaves, pObj2, k )
-        if ( i != k && Aig_Regular((Aig_Obj_t *)pObj->pCopy) == Aig_Regular((Aig_Obj_t *)pObj2->pCopy) )
-        {
-//            printf( "Identical after structural hashing!!!\n" );
-            return;
-        }
-
-    // collect the AIG nodes
-    vNodes = Vec_PtrAlloc( 100 );
-    Aig_ManIncrementTravId( pAig );
-    Aig_ObjSetTravIdCurrent( pAig, Aig_ManConst1(pAig) );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vLeaves, pObj, i )
-    {
-        pAnd = (Aig_Obj_t *)pObj->pCopy;
-        Aig_ObjSetTravIdCurrent( pAig, Aig_Regular(pAnd) );
-    }
-    // traverse from the root node
-    pAnd = (Aig_Obj_t *)pNode->pCopy;
-    if ( !Aig_ManSpeedupNode_rec( pAig, Aig_Regular(pAnd), vNodes ) )
-    {
-//        printf( "Bad node!!!\n" );
-        Vec_PtrFree( vNodes );
-        return;
-    }
-
-    // derive cofactors
-    nCofs = (1 << Vec_PtrSize(vTimes));
-    for ( i = 0; i < nCofs; i++ )
-    {
-        Vec_PtrForEachEntry( Nwk_Obj_t *, vLeaves, pObj, k )
-        {
-            pAnd = (Aig_Obj_t *)pObj->pCopy;
-            Aig_Regular(pAnd)->pData = Aig_Regular(pAnd);
-        }
-        Vec_PtrForEachEntry( Nwk_Obj_t *, vTimes, pObj, k )
-        {
-            pAnd = (Aig_Obj_t *)pObj->pCopy;
-            Aig_Regular(pAnd)->pData = Aig_NotCond( Aig_ManConst1(pAig), ((i & (1<<k)) == 0) );
-        }
-        Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pTemp, k )
-            pTemp->pData = Aig_And( pAig, Aig_ObjChild0Copy(pTemp), Aig_ObjChild1Copy(pTemp) );
-        // save the result
-        pAnd = (Aig_Obj_t *)pNode->pCopy;
-        ppCofs[i] = Aig_NotCond( (Aig_Obj_t *)Aig_Regular(pAnd)->pData, Aig_IsComplement(pAnd) );
-    }
-    Vec_PtrFree( vNodes );
-
-//Nwk_ObjAddFanin( Nwk_ManCreatePo(pAig), ppCofs[0] );
-//Nwk_ObjAddFanin( Nwk_ManCreatePo(pAig), ppCofs[1] );
-
-    // collect the resulting tree
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vTimes, pObj, k )
-        for ( nSkip = (1<<k), i = 0; i < nCofs; i += 2*nSkip )
-        {
-            pAnd = (Aig_Obj_t *)pObj->pCopy;
-            ppCofs[i] = Aig_Mux( pAig, Aig_Regular(pAnd), ppCofs[i+nSkip], ppCofs[i] );
-        }
-//Nwk_ObjAddFanin( Nwk_ManCreatePo(pAig), ppCofs[0] );
-
-    // create choice node
-    pAnd  = Aig_Regular((Aig_Obj_t *)pNode->pCopy); // repr
-    pTemp = Aig_Regular(ppCofs[0]);    // new
-    if ( Aig_ObjEquiv(pAig, pAnd) == NULL && Aig_ObjEquiv(pAig, pTemp) == NULL && !Aig_ObjCheckTfi(pAig, pTemp, pAnd) )
-        pAig->pEquivs[pAnd->Id] = pTemp;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Determines timing-critical edges of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Nwk_ManDelayTraceTCEdges( Nwk_Man_t * pNtk, Nwk_Obj_t * pNode, float tDelta, int fUseLutLib )
-{
-    int pPinPerm[32];
-    float pPinDelays[32];
-    If_Lib_t * pLutLib = fUseLutLib? pNtk->pLutLib : NULL;
-    Nwk_Obj_t * pFanin;
-    unsigned uResult = 0;
-    float tRequired, * pDelays;
-    int k;
-    tRequired = Nwk_ObjRequired(pNode);
-    if ( pLutLib == NULL )
-    {
-        Nwk_ObjForEachFanin( pNode, pFanin, k )
-            if ( tRequired < Nwk_ObjArrival(pFanin) + 1.0 + tDelta )
-                uResult |= (1 << k);
-    }
-    else if ( !pLutLib->fVarPinDelays )
-    {
-        pDelays = pLutLib->pLutDelays[Nwk_ObjFaninNum(pNode)];
-        Nwk_ObjForEachFanin( pNode, pFanin, k )
-            if ( tRequired < Nwk_ObjArrival(pFanin) + pDelays[0] + tDelta )
-                uResult |= (1 << k);
-    }
-    else
-    {
-        pDelays = pLutLib->pLutDelays[Nwk_ObjFaninNum(pNode)];
-        Nwk_ManDelayTraceSortPins( pNode, pPinPerm, pPinDelays );
-        Nwk_ObjForEachFanin( pNode, pFanin, k )
-            if ( tRequired < Nwk_ObjArrival(Nwk_ObjFanin(pNode,pPinPerm[k])) + pDelays[k] + tDelta )
-                uResult |= (1 << pPinPerm[k]);
-    }
-    return uResult;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds choices to speed up the network by the given percentage.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Nwk_ManSpeedup( Nwk_Man_t * pNtk, int fUseLutLib, int Percentage, int Degree, int fVerbose, int fVeryVerbose )
-{
-    Aig_Man_t * pAig, * pTemp;
-    Vec_Ptr_t * vTimeCries, * vTimeFanins;
-    Nwk_Obj_t * pNode, * pFanin, * pFanin2;
-    Aig_Obj_t * pAnd;
-    If_Lib_t * pTempLib = pNtk->pLutLib;
-    Tim_Man_t * pTempTim = NULL; 
-    float tDelta, tArrival;
-    int i, k, k2, Counter, CounterRes, nTimeCris;
-    unsigned * puTCEdges;
-    // perform delay trace
-    if ( !fUseLutLib )
-    {
-        pNtk->pLutLib = NULL;
-        if ( pNtk->pManTime )
-        {
-            pTempTim = pNtk->pManTime;
-            pNtk->pManTime = Tim_ManDup( pTempTim, 1 );
-        }
-    }
-    tArrival = Nwk_ManDelayTraceLut( pNtk );
-    tDelta = fUseLutLib ? tArrival*Percentage/100.0 : 1.0;
-    if ( fVerbose )
-    {
-        printf( "Max delay = %.2f. Delta = %.2f. ", tArrival, tDelta );
-        printf( "Using %s model. ", fUseLutLib? "LUT library" : "unit-delay" );
-        if ( fUseLutLib )
-            printf( "Percentage = %d. ", Percentage );
-        printf( "\n" );
-    }
-    // mark the timing critical nodes and edges
-    puTCEdges = ABC_ALLOC( unsigned, Nwk_ManObjNumMax(pNtk) );
-    memset( puTCEdges, 0, sizeof(unsigned) * Nwk_ManObjNumMax(pNtk) );
-    Nwk_ManForEachNode( pNtk, pNode, i )
-    {
-        if ( Nwk_ObjSlack(pNode) >= tDelta )
-            continue;
-        puTCEdges[pNode->Id] = Nwk_ManDelayTraceTCEdges( pNtk, pNode, tDelta, fUseLutLib );
-    }
-    if ( fVerbose )
-    {
-        Counter = CounterRes = 0;
-        Nwk_ManForEachNode( pNtk, pNode, i )
-        {
-            Nwk_ObjForEachFanin( pNode, pFanin, k )
-                if ( !Nwk_ObjIsCi(pFanin) && Nwk_ObjSlack(pFanin) < tDelta )
-                    Counter++;
-            CounterRes += Aig_WordCountOnes( puTCEdges[pNode->Id] );
-        }
-        printf( "Edges: Total = %7d. 0-slack = %7d. Critical = %7d. Ratio = %4.2f\n", 
-            Nwk_ManGetTotalFanins(pNtk), Counter, CounterRes, Counter? 1.0*CounterRes/Counter : 0.0 );
-    }
-    // start the resulting network
-    pAig = Nwk_ManStrash( pNtk );
-    pAig->pEquivs = ABC_ALLOC( Aig_Obj_t *, 3 * Aig_ManObjNumMax(pAig) );
-    memset( pAig->pEquivs, 0, sizeof(Aig_Obj_t *) * 3 * Aig_ManObjNumMax(pAig) );
-
-    // collect nodes to be used for resynthesis
-    Counter = CounterRes = 0;
-    vTimeCries = Vec_PtrAlloc( 16 );
-    vTimeFanins = Vec_PtrAlloc( 16 );
-    Nwk_ManForEachNode( pNtk, pNode, i )
-    {
-        if ( Nwk_ObjSlack(pNode) >= tDelta )
-            continue;
-        // count the number of non-PI timing-critical nodes
-        nTimeCris = 0;
-        Nwk_ObjForEachFanin( pNode, pFanin, k )
-            if ( !Nwk_ObjIsCi(pFanin) && (puTCEdges[pNode->Id] & (1<<k)) )
-                nTimeCris++;
-        if ( !fVeryVerbose && nTimeCris == 0 )
-            continue;
-        Counter++;
-        // count the total number of timing critical second-generation nodes
-        Vec_PtrClear( vTimeCries );
-        if ( nTimeCris )
-        {
-            Nwk_ObjForEachFanin( pNode, pFanin, k )
-                if ( !Nwk_ObjIsCi(pFanin) && (puTCEdges[pNode->Id] & (1<<k)) )
-                    Nwk_ObjForEachFanin( pFanin, pFanin2, k2 )
-                        if ( puTCEdges[pFanin->Id] & (1<<k2) )
-                            Vec_PtrPushUnique( vTimeCries, pFanin2 );
-        }
-//        if ( !fVeryVerbose && (Vec_PtrSize(vTimeCries) == 0 || Vec_PtrSize(vTimeCries) > Degree) )
-        if ( (Vec_PtrSize(vTimeCries) == 0 || Vec_PtrSize(vTimeCries) > Degree) )
-            continue;
-        CounterRes++;
-        // collect second generation nodes
-        Vec_PtrClear( vTimeFanins );
-        Nwk_ObjForEachFanin( pNode, pFanin, k )
-        {
-            if ( Nwk_ObjIsCi(pFanin) )
-                Vec_PtrPushUnique( vTimeFanins, pFanin );
-            else
-                Nwk_ObjForEachFanin( pFanin, pFanin2, k2 )
-                    Vec_PtrPushUnique( vTimeFanins, pFanin2 );                    
-        }
-        // print the results
-        if ( fVeryVerbose )
-        {
-        printf( "%5d Node %5d : %d %2d %2d  ", Counter, pNode->Id, 
-            nTimeCris, Vec_PtrSize(vTimeCries), Vec_PtrSize(vTimeFanins) );
-        Nwk_ObjForEachFanin( pNode, pFanin, k )
-            printf( "%d(%.2f)%s ", pFanin->Id, Nwk_ObjSlack(pFanin), (puTCEdges[pNode->Id] & (1<<k))? "*":"" );
-        printf( "\n" );
-        }
-        // add the node to choices
-        if ( Vec_PtrSize(vTimeCries) == 0 || Vec_PtrSize(vTimeCries) > Degree )
-            continue;
-        // order the fanins in the increasing order of criticalily
-        if ( Vec_PtrSize(vTimeCries) > 1 )
-        {
-            pFanin = (Nwk_Obj_t *)Vec_PtrEntry( vTimeCries, 0 );
-            pFanin2 = (Nwk_Obj_t *)Vec_PtrEntry( vTimeCries, 1 );
-            if ( Nwk_ObjSlack(pFanin) < Nwk_ObjSlack(pFanin2) )
-            {
-                Vec_PtrWriteEntry( vTimeCries, 0, pFanin2 );
-                Vec_PtrWriteEntry( vTimeCries, 1, pFanin );
-            }
-        }
-        if ( Vec_PtrSize(vTimeCries) > 2 )
-        {
-            pFanin = (Nwk_Obj_t *)Vec_PtrEntry( vTimeCries, 1 );
-            pFanin2 = (Nwk_Obj_t *)Vec_PtrEntry( vTimeCries, 2 );
-            if ( Nwk_ObjSlack(pFanin) < Nwk_ObjSlack(pFanin2) )
-            {
-                Vec_PtrWriteEntry( vTimeCries, 1, pFanin2 );
-                Vec_PtrWriteEntry( vTimeCries, 2, pFanin );
-            }
-            pFanin = (Nwk_Obj_t *)Vec_PtrEntry( vTimeCries, 0 );
-            pFanin2 = (Nwk_Obj_t *)Vec_PtrEntry( vTimeCries, 1 );
-            if ( Nwk_ObjSlack(pFanin) < Nwk_ObjSlack(pFanin2) )
-            {
-                Vec_PtrWriteEntry( vTimeCries, 0, pFanin2 );
-                Vec_PtrWriteEntry( vTimeCries, 1, pFanin );
-            }
-        }
-        // add choice
-        Aig_ManSpeedupNode( pNtk, pAig, pNode, vTimeFanins, vTimeCries );
-    }
-    Vec_PtrFree( vTimeCries );
-    Vec_PtrFree( vTimeFanins );
-    ABC_FREE( puTCEdges );
-    if ( fVerbose )
-        printf( "Nodes: Total = %7d. 0-slack = %7d. Workable = %7d. Ratio = %4.2f\n", 
-        Nwk_ManNodeNum(pNtk), Counter, CounterRes, Counter? 1.0*CounterRes/Counter : 0.0 ); 
-
-    // remove invalid choice nodes
-    Aig_ManForEachNode( pAig, pAnd, i )
-        if ( Aig_ObjEquiv(pAig, pAnd) )
-        {
-            if ( Aig_ObjRefs(Aig_ObjEquiv(pAig, pAnd)) > 0 )
-                pAig->pEquivs[pAnd->Id] = NULL;
-        }
-
-    // put back the library
-    if ( !fUseLutLib )
-        pNtk->pLutLib = pTempLib;
-    if ( pTempTim )
-    {
-        Tim_ManStop( pNtk->pManTime );
-        pNtk->pManTime = pTempTim;
-    }
-
-    // reconstruct the network
-    pAig = Aig_ManDupDfs( pTemp = pAig );
-    Aig_ManStop( pTemp );
-    // reset levels
-    Aig_ManChoiceLevel( pAig );
-    return pAig;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkStrash.c b/src/aig/nwk/nwkStrash.c
deleted file mode 100644
index 54f1f027..00000000
--- a/src/aig/nwk/nwkStrash.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkStrash.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Logic network representation.]
-
-  Synopsis    [Performs structural hashing for the network.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkStrash.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Derives AIG from the local functions of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManStrashNode_rec( Aig_Man_t * p, Hop_Obj_t * pObj )
-{
-    assert( !Hop_IsComplement(pObj) );
-    if ( !Hop_ObjIsNode(pObj) || Hop_ObjIsMarkA(pObj) )
-        return;
-    Nwk_ManStrashNode_rec( p, Hop_ObjFanin0(pObj) ); 
-    Nwk_ManStrashNode_rec( p, Hop_ObjFanin1(pObj) );
-    pObj->pData = Aig_And( p, (Aig_Obj_t *)Hop_ObjChild0Copy(pObj), (Aig_Obj_t *)Hop_ObjChild1Copy(pObj) );
-    assert( !Hop_ObjIsMarkA(pObj) ); // loop detection
-    Hop_ObjSetMarkA( pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives AIG from the local functions of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Nwk_ManStrashNode( Aig_Man_t * p, Nwk_Obj_t * pObj )
-{
-    Hop_Man_t * pMan = pObj->pMan->pManHop;
-    Hop_Obj_t * pRoot = pObj->pFunc;
-    Nwk_Obj_t * pFanin;
-    int i;
-    assert( Nwk_ObjIsNode(pObj) );
-    // check the constant case
-    if ( Hop_Regular(pRoot) == Hop_ManConst1(pMan) )
-        return Aig_NotCond( Aig_ManConst1(p), Hop_IsComplement(pRoot) );
-    // set elementary variables
-    Nwk_ObjForEachFanin( pObj, pFanin, i )
-        Hop_IthVar(pMan, i)->pData = pFanin->pCopy;
-    // strash the AIG of this node
-    Nwk_ManStrashNode_rec( p, Hop_Regular(pRoot) );
-    Hop_ConeUnmark_rec( Hop_Regular(pRoot) );
-    // return the final node
-    return Aig_NotCond( (Aig_Obj_t *)Hop_Regular(pRoot)->pData, Hop_IsComplement(pRoot) );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives AIG from the logic network.]
-
-  Description [Assumes topological ordering of nodes.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Nwk_ManStrash( Nwk_Man_t * pNtk )
-{
-    Vec_Ptr_t * vObjs;
-    Aig_Man_t * pMan;
-    Aig_Obj_t * pObjNew;
-    Nwk_Obj_t * pObj;
-    int i, Level;
-    pMan = Aig_ManStart( Nwk_ManGetAigNodeNum(pNtk) );
-    pMan->pName = Aig_UtilStrsav( pNtk->pName );
-    pMan->pSpec = Aig_UtilStrsav( pNtk->pSpec );
-    pMan->pManTime = Tim_ManDup( (Tim_Man_t *)pNtk->pManTime, 1 );
-    Tim_ManIncrementTravId( (Tim_Man_t *)pMan->pManTime );
-    Nwk_ManForEachObj( pNtk, pObj, i )
-        pObj->pCopy = NULL;
-//    Nwk_ManForEachObj( pNtk, pObj, i )
-    vObjs = Nwk_ManDfs( pNtk );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vObjs, pObj, i )
-    {
-        if ( Nwk_ObjIsCi(pObj) )
-        {
-            pObjNew = Aig_ObjCreatePi(pMan);
-            Level = Tim_ManGetCiArrival( (Tim_Man_t *)pMan->pManTime, pObj->PioId );
-            Aig_ObjSetLevel( pObjNew, Level );
-        }
-        else if ( Nwk_ObjIsCo(pObj) )
-        {
-            pObjNew = Aig_ObjCreatePo( pMan, Aig_NotCond((Aig_Obj_t *)Nwk_ObjFanin0(pObj)->pCopy, pObj->fInvert) );
-            Level = Aig_ObjLevel( pObjNew );
-            Tim_ManSetCoArrival( (Tim_Man_t *)pMan->pManTime, pObj->PioId, (float)Level );
-        }
-        else if ( Nwk_ObjIsNode(pObj) )
-        {
-            pObjNew = Nwk_ManStrashNode( pMan, pObj );
-        }
-        else
-            assert( 0 );
-        pObj->pCopy = pObjNew;
-    }
-    Vec_PtrFree( vObjs );
-    Aig_ManCleanup( pMan );
-    Aig_ManSetRegNum( pMan, 0 );
-    return pMan;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkTiming.c b/src/aig/nwk/nwkTiming.c
deleted file mode 100644
index 53591ee8..00000000
--- a/src/aig/nwk/nwkTiming.c
+++ /dev/null
@@ -1,894 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkTiming.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Logic network representation.]
-
-  Synopsis    [Manipulation of timing information.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkTiming.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#include "nwk.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Cleans timing information for all nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManCleanTiming( Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pObj;
-    int i;
-    Nwk_ManForEachObj( pNtk, pObj, i )
-    {
-        pObj->tArrival = pObj->tSlack = 0.0;
-        pObj->tRequired = TIM_ETERNITY;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sorts the pins in the decreasing order of delays.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManDelayTraceSortPins( Nwk_Obj_t * pNode, int * pPinPerm, float * pPinDelays )
-{
-    Nwk_Obj_t * pFanin;
-    int i, j, best_i, temp;
-    // start the trivial permutation and collect pin delays
-    Nwk_ObjForEachFanin( pNode, pFanin, i )
-    {
-        pPinPerm[i] = i;
-        pPinDelays[i] = Nwk_ObjArrival(pFanin);
-    }
-    // selection sort the pins in the decreasible order of delays
-    // this order will match the increasing order of LUT input pins
-    for ( i = 0; i < Nwk_ObjFaninNum(pNode)-1; i++ )
-    {
-        best_i = i;
-        for ( j = i+1; j < Nwk_ObjFaninNum(pNode); j++ )
-            if ( pPinDelays[pPinPerm[j]] > pPinDelays[pPinPerm[best_i]] )
-                best_i = j;
-        if ( best_i == i )
-            continue;
-        temp = pPinPerm[i]; 
-        pPinPerm[i] = pPinPerm[best_i]; 
-        pPinPerm[best_i] = temp;
-    }
-    // verify
-    assert( Nwk_ObjFaninNum(pNode) == 0 || pPinPerm[0] < Nwk_ObjFaninNum(pNode) );
-    for ( i = 1; i < Nwk_ObjFaninNum(pNode); i++ )
-    {
-        assert( pPinPerm[i] < Nwk_ObjFaninNum(pNode) );
-        assert( pPinDelays[pPinPerm[i-1]] >= pPinDelays[pPinPerm[i]] );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sorts the pins in the decreasing order of delays.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManWhereIsPin( Nwk_Obj_t * pFanout, Nwk_Obj_t * pFanin, int * pPinPerm )
-{
-    int i;
-    for ( i = 0; i < Nwk_ObjFaninNum(pFanout); i++ )
-        if ( Nwk_ObjFanin(pFanout, pPinPerm[i]) == pFanin )
-            return i;
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the arrival times for the given object.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-float Nwk_NodeComputeArrival( Nwk_Obj_t * pObj, int fUseSorting )
-{
-    If_Lib_t * pLutLib = pObj->pMan->pLutLib;
-    int pPinPerm[32];
-    float pPinDelays[32];
-    Nwk_Obj_t * pFanin;
-    float tArrival, * pDelays;
-    int k;
-    assert( Nwk_ObjIsNode(pObj) || Nwk_ObjIsCi(pObj) || Nwk_ObjIsCo(pObj) );
-    if ( Nwk_ObjIsCi(pObj) )
-        return Nwk_ObjArrival(pObj);
-    if ( Nwk_ObjIsCo(pObj) )
-        return Nwk_ObjArrival( Nwk_ObjFanin0(pObj) );
-    tArrival = -TIM_ETERNITY;
-    if ( pLutLib == NULL )
-    {
-        Nwk_ObjForEachFanin( pObj, pFanin, k )
-            if ( tArrival < Nwk_ObjArrival(pFanin) + 1.0 )
-                tArrival = Nwk_ObjArrival(pFanin) + 1.0;
-    }
-    else if ( !pLutLib->fVarPinDelays )
-    {
-        pDelays = pLutLib->pLutDelays[Nwk_ObjFaninNum(pObj)];
-        Nwk_ObjForEachFanin( pObj, pFanin, k )
-            if ( tArrival < Nwk_ObjArrival(pFanin) + pDelays[0] )
-                tArrival = Nwk_ObjArrival(pFanin) + pDelays[0];
-    }
-    else
-    {
-        pDelays = pLutLib->pLutDelays[Nwk_ObjFaninNum(pObj)];
-        if ( fUseSorting )
-        {
-            Nwk_ManDelayTraceSortPins( pObj, pPinPerm, pPinDelays );
-            Nwk_ObjForEachFanin( pObj, pFanin, k ) 
-                if ( tArrival < Nwk_ObjArrival(Nwk_ObjFanin(pObj,pPinPerm[k])) + pDelays[k] )
-                    tArrival = Nwk_ObjArrival(Nwk_ObjFanin(pObj,pPinPerm[k])) + pDelays[k];
-        }
-        else
-        {
-            Nwk_ObjForEachFanin( pObj, pFanin, k )
-                if ( tArrival < Nwk_ObjArrival(pFanin) + pDelays[k] )
-                    tArrival = Nwk_ObjArrival(pFanin) + pDelays[k];
-        }
-    }
-    if ( Nwk_ObjFaninNum(pObj) == 0 )
-        tArrival = 0.0;
-    return tArrival;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the required times for the given node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-float Nwk_NodeComputeRequired( Nwk_Obj_t * pObj, int fUseSorting )
-{
-    If_Lib_t * pLutLib = pObj->pMan->pLutLib;
-    int pPinPerm[32];
-    float pPinDelays[32];
-    Nwk_Obj_t * pFanout;
-    float tRequired, tDelay, * pDelays;
-    int k, iFanin;
-    assert( Nwk_ObjIsNode(pObj) || Nwk_ObjIsCi(pObj) || Nwk_ObjIsCo(pObj) );
-    if ( Nwk_ObjIsCo(pObj) )
-        return Nwk_ObjRequired(pObj);
-    tRequired = TIM_ETERNITY;
-    if ( pLutLib == NULL )
-    {
-        Nwk_ObjForEachFanout( pObj, pFanout, k )
-        {
-            tDelay = Nwk_ObjIsCo(pFanout)? 0.0 : 1.0;
-            if ( tRequired > Nwk_ObjRequired(pFanout) - tDelay )
-                tRequired = Nwk_ObjRequired(pFanout) - tDelay;
-        }
-    }
-    else if ( !pLutLib->fVarPinDelays )
-    {
-        Nwk_ObjForEachFanout( pObj, pFanout, k )
-        {
-            pDelays = pLutLib->pLutDelays[Nwk_ObjFaninNum(pFanout)];
-            tDelay = Nwk_ObjIsCo(pFanout)? 0.0 : pDelays[0];
-            if ( tRequired > Nwk_ObjRequired(pFanout) - tDelay )
-                tRequired = Nwk_ObjRequired(pFanout) - tDelay;
-        }
-    }
-    else
-    {
-        if ( fUseSorting )
-        {
-            Nwk_ObjForEachFanout( pObj, pFanout, k ) 
-            {
-                pDelays = pLutLib->pLutDelays[Nwk_ObjFaninNum(pFanout)];
-                Nwk_ManDelayTraceSortPins( pFanout, pPinPerm, pPinDelays );
-                iFanin = Nwk_ManWhereIsPin( pFanout, pObj, pPinPerm );
-                assert( Nwk_ObjFanin(pFanout,pPinPerm[iFanin]) == pObj );
-                tDelay = Nwk_ObjIsCo(pFanout)? 0.0 : pDelays[iFanin];
-                if ( tRequired > Nwk_ObjRequired(pFanout) - tDelay )
-                    tRequired = Nwk_ObjRequired(pFanout) - tDelay;
-            }
-        }
-        else
-        {
-            Nwk_ObjForEachFanout( pObj, pFanout, k )
-            {
-                pDelays = pLutLib->pLutDelays[Nwk_ObjFaninNum(pFanout)];
-                iFanin = Nwk_ObjFindFanin( pFanout, pObj );
-                assert( Nwk_ObjFanin(pFanout,iFanin) == pObj );
-                tDelay = Nwk_ObjIsCo(pFanout)? 0.0 : pDelays[iFanin];
-                if ( tRequired > Nwk_ObjRequired(pFanout) - tDelay )
-                    tRequired = Nwk_ObjRequired(pFanout) - tDelay;
-            }
-        }
-    }
-    return tRequired;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Propagates the required times through the given node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-float Nwk_NodePropagateRequired( Nwk_Obj_t * pObj, int fUseSorting )
-{
-    If_Lib_t * pLutLib = pObj->pMan->pLutLib;
-    int pPinPerm[32];
-    float pPinDelays[32];
-    Nwk_Obj_t * pFanin;
-    float tRequired = 0.0; // Suppress "might be used uninitialized"
-    float * pDelays;
-    int k;
-    assert( Nwk_ObjIsNode(pObj) );
-    if ( pLutLib == NULL )
-    {
-        tRequired = Nwk_ObjRequired(pObj) - (float)1.0;
-        Nwk_ObjForEachFanin( pObj, pFanin, k )
-            if ( Nwk_ObjRequired(pFanin) > tRequired )
-                Nwk_ObjSetRequired( pFanin, tRequired );
-    }
-    else if ( !pLutLib->fVarPinDelays )
-    {
-        pDelays = pLutLib->pLutDelays[Nwk_ObjFaninNum(pObj)];
-        tRequired = Nwk_ObjRequired(pObj) - pDelays[0];
-        Nwk_ObjForEachFanin( pObj, pFanin, k )
-            if ( Nwk_ObjRequired(pFanin) > tRequired )
-                Nwk_ObjSetRequired( pFanin, tRequired );
-    }
-    else 
-    {
-        pDelays = pLutLib->pLutDelays[Nwk_ObjFaninNum(pObj)];
-        if ( fUseSorting )
-        {
-            Nwk_ManDelayTraceSortPins( pObj, pPinPerm, pPinDelays );
-            Nwk_ObjForEachFanin( pObj, pFanin, k )
-            {
-                tRequired = Nwk_ObjRequired(pObj) - pDelays[k];
-                if ( Nwk_ObjRequired(Nwk_ObjFanin(pObj,pPinPerm[k])) > tRequired )
-                    Nwk_ObjSetRequired( Nwk_ObjFanin(pObj,pPinPerm[k]), tRequired );
-            }
-        }
-        else
-        {
-            Nwk_ObjForEachFanin( pObj, pFanin, k )
-            {
-                tRequired = Nwk_ObjRequired(pObj) - pDelays[k];
-                if ( Nwk_ObjRequired(pFanin) > tRequired )
-                    Nwk_ObjSetRequired( pFanin, tRequired );
-            }
-        }
-    }
-    return tRequired;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the delay trace of the given network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-float Nwk_ManDelayTraceLut( Nwk_Man_t * pNtk )
-{
-    Vec_Ptr_t * vObjs;
-    int fUseSorting = 1;
-    If_Lib_t * pLutLib = pNtk->pLutLib;
-    Vec_Ptr_t * vNodes;
-    Nwk_Obj_t * pObj;
-    float tArrival, tRequired, tSlack;
-    int i;
-
-    // get the library
-    if ( pLutLib && pLutLib->LutMax < Nwk_ManGetFaninMax(pNtk) )
-    {
-        printf( "The max LUT size (%d) is less than the max fanin count (%d).\n", 
-            pLutLib->LutMax, Nwk_ManGetFaninMax(pNtk) );
-        return -TIM_ETERNITY;
-    }
-
-    // compute the reverse order of all objects
-    vNodes = Nwk_ManDfsReverse( pNtk );
-
-    // initialize the arrival times
-    Nwk_ManCleanTiming( pNtk );
-
-    // propagate arrival times
-    if ( pNtk->pManTime )
-        Tim_ManIncrementTravId( pNtk->pManTime );
-//    Nwk_ManForEachObj( pNtk, pObj, i )
-    vObjs = Nwk_ManDfs( pNtk );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vObjs, pObj, i )
-    {
-        tArrival = Nwk_NodeComputeArrival( pObj, fUseSorting );
-        if ( Nwk_ObjIsCi(pObj) && pNtk->pManTime )
-            tArrival = Tim_ManGetCiArrival( pNtk->pManTime, pObj->PioId );
-        if ( Nwk_ObjIsCo(pObj) && pNtk->pManTime )
-            Tim_ManSetCoArrival( pNtk->pManTime, pObj->PioId, tArrival );
-        Nwk_ObjSetArrival( pObj, tArrival );
-    }
-    Vec_PtrFree( vObjs );
-
-    // get the latest arrival times
-    tArrival = -TIM_ETERNITY;
-    Nwk_ManForEachPo( pNtk, pObj, i )
-        if ( tArrival < Nwk_ObjArrival(pObj) )
-            tArrival = Nwk_ObjArrival(pObj);
-
-    // initialize the required times
-    if ( pNtk->pManTime )
-    {
-        Tim_ManIncrementTravId( pNtk->pManTime );
-        Tim_ManSetCoRequiredAll( pNtk->pManTime, tArrival );
-    }
-    else
-    {
-        Nwk_ManForEachCo( pNtk, pObj, i )
-            Nwk_ObjSetRequired( pObj, tArrival );
-    }
-
-    // propagate the required times
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vNodes, pObj, i )
-    {
-        if ( Nwk_ObjIsNode(pObj) )
-        {
-            Nwk_NodePropagateRequired( pObj, fUseSorting );
-        }
-        else if ( Nwk_ObjIsCi(pObj) )
-        {
-            if ( pNtk->pManTime )
-                Tim_ManSetCiRequired( pNtk->pManTime, pObj->PioId, Nwk_ObjRequired(pObj) );
-        }
-        else if ( Nwk_ObjIsCo(pObj) )
-        {
-            if ( pNtk->pManTime )
-            {
-                tRequired = Tim_ManGetCoRequired( pNtk->pManTime, pObj->PioId );
-                Nwk_ObjSetRequired( pObj, tRequired );
-            }
-            if ( Nwk_ObjRequired(Nwk_ObjFanin0(pObj)) > Nwk_ObjRequired(pObj) )
-                Nwk_ObjSetRequired( Nwk_ObjFanin0(pObj), Nwk_ObjRequired(pObj) );
-        }
-
-        // set slack for this object
-        tSlack = Nwk_ObjRequired(pObj) - Nwk_ObjArrival(pObj);
-        assert( tSlack + 0.01 > 0.0 );
-        Nwk_ObjSetSlack( pObj, tSlack < 0.0 ? 0.0 : tSlack );
-    }
-    Vec_PtrFree( vNodes );
-    return tArrival;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the arrival times for the given node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManVerifyTiming(  Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pObj;
-    float tArrival, tRequired;
-    int i;
-    Nwk_ManForEachObj( pNtk, pObj, i )
-    {
-        if ( Nwk_ObjIsCi(pObj) && Nwk_ObjFanoutNum(pObj) == 0 )
-            continue;
-        tArrival = Nwk_NodeComputeArrival( pObj, 1 );
-        tRequired = Nwk_NodeComputeRequired( pObj, 1 );
-        if ( !Nwk_ManTimeEqual( tArrival, Nwk_ObjArrival(pObj), (float)0.01 ) )
-            printf( "Nwk_ManVerifyTiming(): Object %d has different arrival time (%.2f) from computed (%.2f).\n", 
-                pObj->Id, Nwk_ObjArrival(pObj), tArrival );
-        if ( !Nwk_ManTimeEqual( tRequired, Nwk_ObjRequired(pObj), (float)0.01 ) )
-            printf( "Nwk_ManVerifyTiming(): Object %d has different required time (%.2f) from computed (%.2f).\n", 
-                pObj->Id, Nwk_ObjRequired(pObj), tRequired );
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints the delay trace for the given network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManDelayTracePrint( Nwk_Man_t * pNtk )
-{
-    If_Lib_t * pLutLib = pNtk->pLutLib;
-    Nwk_Obj_t * pNode;
-    int i, Nodes, * pCounters;
-    float tArrival, tDelta, nSteps, Num;
-    // get the library
-    if ( pLutLib && pLutLib->LutMax < Nwk_ManGetFaninMax(pNtk) )
-    {
-        printf( "The max LUT size (%d) is less than the max fanin count (%d).\n", 
-            pLutLib->LutMax, Nwk_ManGetFaninMax(pNtk) );
-        return;
-    }
-    // decide how many steps
-    nSteps = pLutLib ? 20 : Nwk_ManLevelMax(pNtk);
-    pCounters = ABC_ALLOC( int, nSteps + 1 );
-    memset( pCounters, 0, sizeof(int)*(nSteps + 1) );
-    // perform delay trace
-    tArrival = Nwk_ManDelayTraceLut( pNtk );
-    tDelta = tArrival / nSteps;
-    // count how many nodes have slack in the corresponding intervals
-    Nwk_ManForEachNode( pNtk, pNode, i )
-    {
-        if ( Nwk_ObjFaninNum(pNode) == 0 )
-            continue;
-        Num = Nwk_ObjSlack(pNode) / tDelta;
-        if ( Num > nSteps )
-            continue;
-        assert( Num >=0 && Num <= nSteps );
-        pCounters[(int)Num]++;
-    }
-    // print the results
-    printf( "Max delay = %6.2f. Delay trace using %s model:\n", tArrival, pLutLib? "LUT library" : "unit-delay" );
-    Nodes = 0;
-    for ( i = 0; i < nSteps; i++ )
-    {
-        Nodes += pCounters[i];
-        printf( "%3d %s : %5d  (%6.2f %%)\n", pLutLib? 5*(i+1) : i+1, 
-            pLutLib? "%":"lev", Nodes, 100.0*Nodes/Nwk_ManNodeNum(pNtk) );
-    }
-    ABC_FREE( pCounters );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Inserts node into the queue of nodes sorted by level.]
-
-  Description [The inserted node should not go before the current position 
-  given by iCurrent. If the arrival times are computed, the nodes are sorted
-  in the increasing order of levels. If the required times are computed, 
-  the nodes are sorted in the decreasing order of levels.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_NodeUpdateAddToQueue( Vec_Ptr_t * vQueue, Nwk_Obj_t * pObj, int iCurrent, int fArrival )
-{
-    Nwk_Obj_t * pTemp1, * pTemp2;
-    int i;
-    Vec_PtrPush( vQueue, pObj );
-    for ( i = Vec_PtrSize(vQueue) - 1; i > iCurrent + 1; i-- )
-    {
-        pTemp1 = (Nwk_Obj_t *)vQueue->pArray[i];
-        pTemp2 = (Nwk_Obj_t *)vQueue->pArray[i-1];
-        if ( fArrival )
-        {
-            if ( Nwk_ObjLevel(pTemp2) <= Nwk_ObjLevel(pTemp1) )
-                break;
-        }
-        else
-        {
-            if ( Nwk_ObjLevel(pTemp2) >= Nwk_ObjLevel(pTemp1) )
-                break;
-        }
-        vQueue->pArray[i-1] = pTemp1;
-        vQueue->pArray[i]   = pTemp2;
-    }
-    // verification
-    for ( i = iCurrent + 1; i < Vec_PtrSize(vQueue) - 1; i++ )
-    {
-        pTemp1 = (Nwk_Obj_t *)vQueue->pArray[i];
-        pTemp2 = (Nwk_Obj_t *)vQueue->pArray[i+1];
-        if ( fArrival )
-            assert( Nwk_ObjLevel(pTemp1) <= Nwk_ObjLevel(pTemp2) );
-        else
-            assert( Nwk_ObjLevel(pTemp1) >= Nwk_ObjLevel(pTemp2) );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Incrementally updates arrival times of the node.]
-
-  Description [Supports variable-pin delay model and white-boxes.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_NodeUpdateArrival( Nwk_Obj_t * pObj )
-{
-    Tim_Man_t * pManTime = pObj->pMan->pManTime;
-    Vec_Ptr_t * vQueue = pObj->pMan->vTemp;
-    Nwk_Obj_t * pTemp;
-    Nwk_Obj_t * pNext = NULL; // Suppress "might be used uninitialized"
-    float tArrival;
-    int iCur, k, iBox, iTerm1, nTerms;
-    assert( Nwk_ObjIsNode(pObj) );
-    // verify the arrival time
-    tArrival = Nwk_NodeComputeArrival( pObj, 1 );
-    assert( Nwk_ManTimeLess( tArrival, Nwk_ObjRequired(pObj), (float)0.01 ) );
-    // initialize the queue with the node
-    Vec_PtrClear( vQueue );
-    Vec_PtrPush( vQueue, pObj );
-    pObj->MarkA = 1;
-    // process objects
-    if ( pManTime )
-        Tim_ManIncrementTravId( pManTime );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vQueue, pTemp, iCur )
-    {
-        pTemp->MarkA = 0;
-        tArrival = Nwk_NodeComputeArrival( pTemp, 1 );
-        if ( Nwk_ObjIsCi(pTemp) && pManTime )
-            tArrival = Tim_ManGetCiArrival( pManTime, pTemp->PioId );
-        if ( Nwk_ManTimeEqual( tArrival, Nwk_ObjArrival(pTemp), (float)0.01 ) )
-            continue;
-        Nwk_ObjSetArrival( pTemp, tArrival );
-        // add the fanouts to the queue
-        if ( Nwk_ObjIsCo(pTemp) )
-        {
-            if ( pManTime )
-            {
-                iBox = Tim_ManBoxForCo( pManTime, pTemp->PioId );
-                if ( iBox >= 0 ) // this CO is an input of the box
-                {
-                    // it may happen that a box-input (CO) was already marked as visited
-                    // when some other box-input of the same box was visited - here we undo this
-                    if ( Tim_ManIsCoTravIdCurrent( pManTime, pTemp->PioId ) )
-                        Tim_ManSetPreviousTravIdBoxInputs( pManTime, iBox );
-                    Tim_ManSetCoArrival( pManTime, pTemp->PioId, tArrival );
-                    Tim_ManSetCurrentTravIdBoxInputs( pManTime, iBox );
-                    iTerm1 = Tim_ManBoxOutputFirst( pManTime, iBox );
-                    nTerms = Tim_ManBoxOutputNum( pManTime, iBox );
-                    for ( k = 0; k < nTerms; k++ )
-                    {
-                        pNext = Nwk_ManCi(pNext->pMan, iTerm1 + k);
-                        if ( pNext->MarkA )
-                            continue;
-                        Nwk_NodeUpdateAddToQueue( vQueue, pNext, iCur, 1 );
-                        pNext->MarkA = 1;
-                    }
-                }
-            }
-        }
-        else
-        {
-            Nwk_ObjForEachFanout( pTemp, pNext, k )
-            {
-                if ( pNext->MarkA )
-                    continue;
-                Nwk_NodeUpdateAddToQueue( vQueue, pNext, iCur, 1 );
-                pNext->MarkA = 1;
-            }
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Incrementally updates required times of the node.]
-
-  Description [Supports variable-pin delay model and white-boxes.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_NodeUpdateRequired( Nwk_Obj_t * pObj )
-{
-    Tim_Man_t * pManTime = pObj->pMan->pManTime;
-    Vec_Ptr_t * vQueue = pObj->pMan->vTemp;
-    Nwk_Obj_t * pTemp;
-    Nwk_Obj_t * pNext = NULL; // Suppress "might be used uninitialized"
-    float tRequired;
-    int iCur, k, iBox, iTerm1, nTerms;
-    assert( Nwk_ObjIsNode(pObj) );
-    // make sure the node's required time remained the same
-    tRequired = Nwk_NodeComputeRequired( pObj, 1 );
-    assert( Nwk_ManTimeEqual( tRequired, Nwk_ObjRequired(pObj), (float)0.01 ) );
-    // initialize the queue with the node's faninsa and the old node's fanins
-    Vec_PtrClear( vQueue );
-    Nwk_ObjForEachFanin( pObj, pNext, k )
-    {
-        if ( pNext->MarkA )
-            continue;
-        Nwk_NodeUpdateAddToQueue( vQueue, pNext, -1, 0 );
-        pNext->MarkA = 1;
-    }
-    // process objects
-    if ( pManTime )
-        Tim_ManIncrementTravId( pManTime );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vQueue, pTemp, iCur )
-    {
-        pTemp->MarkA = 0;
-        tRequired = Nwk_NodeComputeRequired( pTemp, 1 );
-        if ( Nwk_ObjIsCo(pTemp) && pManTime )
-            tRequired = Tim_ManGetCoRequired( pManTime, pTemp->PioId );
-        if ( Nwk_ManTimeEqual( tRequired, Nwk_ObjRequired(pTemp), (float)0.01 ) )
-            continue;
-        Nwk_ObjSetRequired( pTemp, tRequired );
-        // add the fanins to the queue
-        if ( Nwk_ObjIsCi(pTemp) )
-        {
-            if ( pManTime )
-            {
-                iBox = Tim_ManBoxForCi( pManTime, pTemp->PioId );
-                if ( iBox >= 0 ) // this CI is an output of the box
-                {
-                    // it may happen that a box-output (CI) was already marked as visited
-                    // when some other box-output of the same box was visited - here we undo this
-                    if ( Tim_ManIsCiTravIdCurrent( pManTime, pTemp->PioId ) )
-                        Tim_ManSetPreviousTravIdBoxOutputs( pManTime, iBox );
-                    Tim_ManSetCiRequired( pManTime, pTemp->PioId, tRequired );
-                    Tim_ManSetCurrentTravIdBoxOutputs( pManTime, iBox );
-                    iTerm1 = Tim_ManBoxInputFirst( pManTime, iBox );
-                    nTerms = Tim_ManBoxInputNum( pManTime, iBox );
-                    for ( k = 0; k < nTerms; k++ )
-                    {
-                        pNext = Nwk_ManCo(pNext->pMan, iTerm1 + k);
-                        if ( pNext->MarkA )
-                            continue;
-                        Nwk_NodeUpdateAddToQueue( vQueue, pNext, iCur, 0 );
-                        pNext->MarkA = 1;
-                    }
-                }
-            }
-        }
-        else
-        {
-            Nwk_ObjForEachFanin( pTemp, pNext, k )
-            {
-                if ( pNext->MarkA )
-                    continue;
-                Nwk_NodeUpdateAddToQueue( vQueue, pNext, iCur, 0 );
-                pNext->MarkA = 1;
-            }
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the level of the node using its fanin levels.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ObjLevelNew( Nwk_Obj_t * pObj )
-{
-    Tim_Man_t * pManTime = pObj->pMan->pManTime;
-    Nwk_Obj_t * pFanin;
-    int i, iBox, iTerm1, nTerms, Level = 0;
-    if ( Nwk_ObjIsCi(pObj) || Nwk_ObjIsLatch(pObj) )
-    {
-        if ( pManTime )
-        {
-            iBox = Tim_ManBoxForCi( pManTime, pObj->PioId );
-            if ( iBox >= 0 ) // this CI is an output of the box
-            {
-                iTerm1 = Tim_ManBoxInputFirst( pManTime, iBox );
-                nTerms = Tim_ManBoxInputNum( pManTime, iBox );
-                for ( i = 0; i < nTerms; i++ )
-                {
-                    pFanin = Nwk_ManCo(pObj->pMan, iTerm1 + i);
-                    Level = ABC_MAX( Level, Nwk_ObjLevel(pFanin) );
-                }
-                Level++;
-            }
-        }
-        return Level;
-    }
-    assert( Nwk_ObjIsNode(pObj) || Nwk_ObjIsCo(pObj) );
-    Nwk_ObjForEachFanin( pObj, pFanin, i )
-        Level = ABC_MAX( Level, Nwk_ObjLevel(pFanin) );
-    return Level + (Nwk_ObjIsNode(pObj) && Nwk_ObjFaninNum(pObj) > 0);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Incrementally updates level of the nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManUpdateLevel( Nwk_Obj_t * pObj )
-{
-    Tim_Man_t * pManTime = pObj->pMan->pManTime;
-    Vec_Ptr_t * vQueue = pObj->pMan->vTemp;
-    Nwk_Obj_t * pTemp;
-    Nwk_Obj_t * pNext = NULL; // Suppress "might be used uninitialized"
-    int LevelNew, iCur, k, iBox, iTerm1, nTerms;
-    assert( Nwk_ObjIsNode(pObj) );
-    // initialize the queue with the node
-    Vec_PtrClear( vQueue );
-    Vec_PtrPush( vQueue, pObj );
-    pObj->MarkA = 1;
-    // process objects
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vQueue, pTemp, iCur )
-    {
-        pTemp->MarkA = 0;
-        LevelNew = Nwk_ObjLevelNew( pTemp );
-        if ( LevelNew == Nwk_ObjLevel(pTemp) )
-            continue;
-        Nwk_ObjSetLevel( pTemp, LevelNew );
-        // add the fanouts to the queue
-        if ( Nwk_ObjIsCo(pTemp) )
-        {
-            if ( pManTime )
-            {
-                iBox = Tim_ManBoxForCo( pManTime, pTemp->PioId );
-                if ( iBox >= 0 ) // this is not a true PO
-                {
-                    Tim_ManSetCurrentTravIdBoxInputs( pManTime, iBox );
-                    iTerm1 = Tim_ManBoxOutputFirst( pManTime, iBox );
-                    nTerms = Tim_ManBoxOutputNum( pManTime, iBox );
-                    for ( k = 0; k < nTerms; k++ )
-                    {
-                        pNext = Nwk_ManCi(pNext->pMan, iTerm1 + k);
-                        if ( pNext->MarkA )
-                            continue;
-                        Nwk_NodeUpdateAddToQueue( vQueue, pNext, iCur, 1 );
-                        pNext->MarkA = 1;
-                    }
-                }
-            }
-        }
-        else
-        {
-            Nwk_ObjForEachFanout( pTemp, pNext, k )
-            {
-                if ( pNext->MarkA )
-                    continue;
-                Nwk_NodeUpdateAddToQueue( vQueue, pNext, iCur, 1 );
-                pNext->MarkA = 1;
-            }
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes the level of the node using its fanin levels.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManVerifyLevel( Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pObj;
-    int LevelNew, i;
-    Nwk_ManForEachObj( pNtk, pObj, i )
-    {
-        assert( pObj->MarkA == 0 );
-        LevelNew = Nwk_ObjLevelNew( pObj );
-        if ( Nwk_ObjLevel(pObj) != LevelNew )
-        {
-            printf( "Object %6d: Mismatch betweeh levels: Actual = %d. Correct = %d.\n", 
-                i, Nwk_ObjLevel(pObj), LevelNew );
-        }
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Replaces the node and incrementally updates levels.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManUpdate( Nwk_Obj_t * pObj, Nwk_Obj_t * pObjNew, Vec_Vec_t * vLevels )
-{
-    assert( pObj->pMan == pObjNew->pMan );
-    assert( pObj != pObjNew );
-    assert( Nwk_ObjFanoutNum(pObj) > 0 );
-    assert( Nwk_ObjIsNode(pObj) && !Nwk_ObjIsCo(pObjNew) );
-    // transfer fanouts to the old node
-    Nwk_ObjTransferFanout( pObj, pObjNew );
-    // transfer the timing information
-    // (this is needed because updating level happens if the level has changed;
-    // when we set the old level, it will be recomputed by the level updating
-    // procedure, which will update level of other nodes if there is a difference)
-    pObjNew->Level = pObj->Level;
-    pObjNew->tArrival = pObj->tArrival;
-    pObjNew->tRequired = pObj->tRequired;
-    // update required times of the old fanins
-    pObj->tRequired = TIM_ETERNITY;
-    Nwk_NodeUpdateRequired( pObj );
-    // remove the old node
-    Nwk_ManDeleteNode_rec( pObj );
-    // update the information of the new node
-    Nwk_ManUpdateLevel( pObjNew );
-    Nwk_NodeUpdateArrival( pObjNew );
-    Nwk_NodeUpdateRequired( pObjNew );
-//Nwk_ManVerifyTiming( pObjNew->pMan );
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwkUtil.c b/src/aig/nwk/nwkUtil.c
deleted file mode 100644
index a1948031..00000000
--- a/src/aig/nwk/nwkUtil.c
+++ /dev/null
@@ -1,643 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwkUtil.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Logic network representation.]
-
-  Synopsis    [Various utilities.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwkUtil.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include <math.h>
-#include "nwk.h"
-#include "kit.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Increments the current traversal ID of the network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManIncrementTravId( Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pObj;
-    int i;
-    if ( pNtk->nTravIds >= (1<<26)-1 )
-    {
-        pNtk->nTravIds = 0;
-        Nwk_ManForEachObj( pNtk, pObj, i )
-            pObj->TravId = 0;
-    }
-    pNtk->nTravIds++;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads the maximum number of fanins of a node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManGetFaninMax( Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pNode;
-    int i, nFaninsMax = 0;
-    Nwk_ManForEachNode( pNtk, pNode, i )
-    {
-        if ( nFaninsMax < Nwk_ObjFaninNum(pNode) )
-            nFaninsMax = Nwk_ObjFaninNum(pNode);
-    }
-    return nFaninsMax;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads the total number of all fanins.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManGetTotalFanins( Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pNode;
-    int i, nFanins = 0;
-    Nwk_ManForEachNode( pNtk, pNode, i )
-        nFanins += Nwk_ObjFaninNum(pNode);
-    return nFanins;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of true PIs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPiNum( Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pNode;
-    int i, Counter = 0;
-    Nwk_ManForEachCi( pNtk, pNode, i )
-        Counter += Nwk_ObjIsPi( pNode );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of true POs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManPoNum( Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pNode;
-    int i, Counter = 0;
-    Nwk_ManForEachCo( pNtk, pNode, i )
-        Counter += Nwk_ObjIsPo( pNode );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reads the number of AIG nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManGetAigNodeNum( Nwk_Man_t * pNtk )
-{
-    Nwk_Obj_t * pNode;
-    int i, nNodes = 0;
-    Nwk_ManForEachNode( pNtk, pNode, i )
-    {
-        if ( pNode->pFunc == NULL )
-        {
-            printf( "Nwk_ManGetAigNodeNum(): Local AIG of node %d is not assigned.\n", pNode->Id );
-            continue;
-        }
-        if ( Nwk_ObjFaninNum(pNode) < 2 )
-            continue;
-        nNodes += Hop_DagSize( pNode->pFunc );
-    }
-    return nNodes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Procedure used for sorting the nodes in increasing order of levels.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_NodeCompareLevelsIncrease( Nwk_Obj_t ** pp1, Nwk_Obj_t ** pp2 )
-{
-    int Diff = (*pp1)->Level - (*pp2)->Level;
-    if ( Diff < 0 )
-        return -1;
-    if ( Diff > 0 ) 
-        return 1;
-    return 0; 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Procedure used for sorting the nodes in decreasing order of levels.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_NodeCompareLevelsDecrease( Nwk_Obj_t ** pp1, Nwk_Obj_t ** pp2 )
-{
-    int Diff = (*pp1)->Level - (*pp2)->Level;
-    if ( Diff > 0 )
-        return -1;
-    if ( Diff < 0 ) 
-        return 1;
-    return 0; 
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints the objects.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ObjPrint( Nwk_Obj_t * pObj )
-{
-    Nwk_Obj_t * pNext;
-    int i;
-    printf( "ObjId = %5d.  ", pObj->Id );
-    if ( Nwk_ObjIsPi(pObj) )
-        printf( "PI" );
-    if ( Nwk_ObjIsPo(pObj) )
-        printf( "PO" );
-    if ( Nwk_ObjIsNode(pObj) )
-        printf( "Node" );
-    printf( "   Fanins = " );
-    Nwk_ObjForEachFanin( pObj, pNext, i )
-        printf( "%d ", pNext->Id );
-    printf( "   Fanouts = " );
-    Nwk_ObjForEachFanout( pObj, pNext, i )
-        printf( "%d ", pNext->Id );
-    printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Dumps the BLIF file for the network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManDumpBlif( Nwk_Man_t * pNtk, char * pFileName, Vec_Ptr_t * vPiNames, Vec_Ptr_t * vPoNames )
-{
-    FILE * pFile;
-    Vec_Ptr_t * vNodes;
-    Vec_Int_t * vTruth;
-    Vec_Int_t * vCover;
-    Nwk_Obj_t * pObj, * pFanin;
-    Aig_MmFlex_t * pMem;
-    char * pSop = NULL;
-    unsigned * pTruth;
-    int i, k, nDigits;
-    if ( Nwk_ManPoNum(pNtk) == 0 )
-    {
-        printf( "Nwk_ManDumpBlif(): Network does not have POs.\n" );
-        return;
-    }
-    // collect nodes in the DFS order
-    nDigits = Aig_Base10Log( Nwk_ManObjNumMax(pNtk) );
-    // write the file 
-    pFile = fopen( pFileName, "w" );
-    fprintf( pFile, "# BLIF file written by procedure Nwk_ManDumpBlif()\n" );
-//    fprintf( pFile, "# http://www.eecs.berkeley.edu/~alanmi/abc/\n" );
-    fprintf( pFile, ".model %s\n", pNtk->pName );
-    // write PIs
-    fprintf( pFile, ".inputs" );
-    Nwk_ManForEachCi( pNtk, pObj, i )
-        if ( vPiNames )
-            fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, i) );
-        else
-            fprintf( pFile, " n%0*d", nDigits, pObj->Id );
-    fprintf( pFile, "\n" );
-    // write POs
-    fprintf( pFile, ".outputs" );
-    Nwk_ManForEachCo( pNtk, pObj, i )
-        if ( vPoNames )
-            fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPoNames, i) );
-        else
-            fprintf( pFile, " n%0*d", nDigits, pObj->Id );
-    fprintf( pFile, "\n" );
-    // write nodes
-    pMem = Aig_MmFlexStart();
-    vTruth = Vec_IntAlloc( 1 << 16 );
-    vCover = Vec_IntAlloc( 1 << 16 );
-    vNodes = Nwk_ManDfs( pNtk );
-    Vec_PtrForEachEntry( Nwk_Obj_t *, vNodes, pObj, i )
-    {
-        if ( !Nwk_ObjIsNode(pObj) )
-            continue;
-        // derive SOP for the AIG
-        pTruth = Hop_ManConvertAigToTruth( pNtk->pManHop, Hop_Regular(pObj->pFunc), Nwk_ObjFaninNum(pObj), vTruth, 0 );
-        if ( Hop_IsComplement(pObj->pFunc) )
-            Kit_TruthNot( pTruth, pTruth, Nwk_ObjFaninNum(pObj) );
-        pSop = Kit_PlaFromTruth( pMem, pTruth, Nwk_ObjFaninNum(pObj), vCover );
-        // write the node
-        fprintf( pFile, ".names" );
-        if ( !Kit_TruthIsConst0(pTruth, Nwk_ObjFaninNum(pObj)) && !Kit_TruthIsConst1(pTruth, Nwk_ObjFaninNum(pObj)) )
-        {
-            Nwk_ObjForEachFanin( pObj, pFanin, k )
-                if ( vPiNames && Nwk_ObjIsPi(pFanin) )
-                    fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Nwk_ObjPioNum(pFanin)) );
-                else
-                    fprintf( pFile, " n%0*d", nDigits, pFanin->Id );
-        }
-        fprintf( pFile, " n%0*d\n", nDigits, pObj->Id );
-        // write the function
-        fprintf( pFile, "%s", pSop );
-    }
-    Vec_IntFree( vCover );
-    Vec_IntFree( vTruth );
-    Vec_PtrFree( vNodes );
-    Aig_MmFlexStop( pMem, 0 );
-    // write POs
-    Nwk_ManForEachCo( pNtk, pObj, i )
-    {
-        fprintf( pFile, ".names" );
-        if ( vPiNames && Nwk_ObjIsPi(Nwk_ObjFanin0(pObj)) )
-            fprintf( pFile, " %s", (char*)Vec_PtrEntry(vPiNames, Nwk_ObjPioNum(Nwk_ObjFanin0(pObj))) );
-        else
-            fprintf( pFile, " n%0*d", nDigits, Nwk_ObjFanin0(pObj)->Id );
-        if ( vPoNames )
-            fprintf( pFile, " %s\n", (char*)Vec_PtrEntry(vPoNames, Nwk_ObjPioNum(pObj)) );
-        else
-            fprintf( pFile, " n%0*d\n", nDigits, pObj->Id );
-        fprintf( pFile, "%d 1\n", !pObj->fInvert );
-    }
-    fprintf( pFile, ".end\n\n" );
-    fclose( pFile );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints the distribution of fanins/fanouts in the network.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManPrintFanioNew( Nwk_Man_t * pNtk )
-{
-    char Buffer[100];
-    Nwk_Obj_t * pNode;
-    Vec_Int_t * vFanins, * vFanouts;
-    int nFanins, nFanouts, nFaninsMax, nFanoutsMax, nFaninsAll, nFanoutsAll;
-    int i, k, nSizeMax;
-
-    // determine the largest fanin and fanout
-    nFaninsMax = nFanoutsMax = 0;
-    nFaninsAll = nFanoutsAll = 0;
-    Nwk_ManForEachNode( pNtk, pNode, i )
-    {
-        nFanins  = Nwk_ObjFaninNum(pNode);
-        nFanouts = Nwk_ObjFanoutNum(pNode);
-        nFaninsAll  += nFanins;
-        nFanoutsAll += nFanouts;
-        nFaninsMax   = ABC_MAX( nFaninsMax, nFanins );
-        nFanoutsMax  = ABC_MAX( nFanoutsMax, nFanouts );
-    }
-
-    // allocate storage for fanin/fanout numbers
-    nSizeMax = ABC_MAX( 10 * (Aig_Base10Log(nFaninsMax) + 1), 10 * (Aig_Base10Log(nFanoutsMax) + 1) );
-    vFanins  = Vec_IntStart( nSizeMax );
-    vFanouts = Vec_IntStart( nSizeMax );
-
-    // count the number of fanins and fanouts
-    Nwk_ManForEachNode( pNtk, pNode, i )
-    {
-        nFanins  = Nwk_ObjFaninNum(pNode);
-        nFanouts = Nwk_ObjFanoutNum(pNode);
-//        nFanouts = Nwk_NodeMffcSize(pNode);
-
-        if ( nFanins < 10 )
-            Vec_IntAddToEntry( vFanins, nFanins, 1 );
-        else if ( nFanins < 100 )
-            Vec_IntAddToEntry( vFanins, 10 + nFanins/10, 1 );
-        else if ( nFanins < 1000 )
-            Vec_IntAddToEntry( vFanins, 20 + nFanins/100, 1 );
-        else if ( nFanins < 10000 )
-            Vec_IntAddToEntry( vFanins, 30 + nFanins/1000, 1 );
-        else if ( nFanins < 100000 )
-            Vec_IntAddToEntry( vFanins, 40 + nFanins/10000, 1 );
-        else if ( nFanins < 1000000 )
-            Vec_IntAddToEntry( vFanins, 50 + nFanins/100000, 1 );
-        else if ( nFanins < 10000000 )
-            Vec_IntAddToEntry( vFanins, 60 + nFanins/1000000, 1 );
-
-        if ( nFanouts < 10 )
-            Vec_IntAddToEntry( vFanouts, nFanouts, 1 );
-        else if ( nFanouts < 100 )
-            Vec_IntAddToEntry( vFanouts, 10 + nFanouts/10, 1 );
-        else if ( nFanouts < 1000 )
-            Vec_IntAddToEntry( vFanouts, 20 + nFanouts/100, 1 );
-        else if ( nFanouts < 10000 )
-            Vec_IntAddToEntry( vFanouts, 30 + nFanouts/1000, 1 );
-        else if ( nFanouts < 100000 )
-            Vec_IntAddToEntry( vFanouts, 40 + nFanouts/10000, 1 );
-        else if ( nFanouts < 1000000 )
-            Vec_IntAddToEntry( vFanouts, 50 + nFanouts/100000, 1 );
-        else if ( nFanouts < 10000000 )
-            Vec_IntAddToEntry( vFanouts, 60 + nFanouts/1000000, 1 );
-    }
-
-    printf( "The distribution of fanins and fanouts in the network:\n" );
-    printf( "         Number   Nodes with fanin  Nodes with fanout\n" );
-    for ( k = 0; k < nSizeMax; k++ )
-    {
-        if ( vFanins->pArray[k] == 0 && vFanouts->pArray[k] == 0 )
-            continue;
-        if ( k < 10 )
-            printf( "%15d : ", k );
-        else
-        {
-            sprintf( Buffer, "%d - %d", (int)pow((double)10, k/10) * (k%10), (int)pow((double)10, k/10) * (k%10+1) - 1 ); 
-            printf( "%15s : ", Buffer );
-        }
-        if ( vFanins->pArray[k] == 0 )
-            printf( "              " );
-        else
-            printf( "%12d  ", vFanins->pArray[k] );
-        printf( "    " );
-        if ( vFanouts->pArray[k] == 0 )
-            printf( "              " );
-        else
-            printf( "%12d  ", vFanouts->pArray[k] );
-        printf( "\n" );
-    }
-    Vec_IntFree( vFanins );
-    Vec_IntFree( vFanouts );
-
-    printf( "Fanins: Max = %d. Ave = %.2f.  Fanouts: Max = %d. Ave =  %.2f.\n", 
-        nFaninsMax,  1.0*nFaninsAll/Nwk_ManNodeNum(pNtk), 
-        nFanoutsMax, 1.0*nFanoutsAll/Nwk_ManNodeNum(pNtk)  );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Cleans the temporary marks of the nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManCleanMarks( Nwk_Man_t * pMan )
-{
-    Nwk_Obj_t * pObj;
-    int i;
-    Nwk_ManForEachObj( pMan, pObj, i )
-        pObj->MarkA = pObj->MarkB = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Minimizes the support of all nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManMinimumBaseNode( Nwk_Obj_t * pObj, Vec_Int_t * vTruth, int fVerbose )
-{
-    unsigned * pTruth;
-    Nwk_Obj_t * pFanin, * pObjNew;
-    Nwk_Man_t * pNtk = pObj->pMan;
-    int uSupp, nSuppSize, k, Counter = 0;
-    pTruth = Hop_ManConvertAigToTruth( pNtk->pManHop, Hop_Regular(pObj->pFunc), Nwk_ObjFaninNum(pObj), vTruth, 0 );
-    nSuppSize = Kit_TruthSupportSize(pTruth, Nwk_ObjFaninNum(pObj));
-    if ( nSuppSize == Nwk_ObjFaninNum(pObj) )
-        return 0;
-    Counter++;
-    uSupp = Kit_TruthSupport( pTruth, Nwk_ObjFaninNum(pObj) );
-    // create new node with the given support
-    pObjNew = Nwk_ManCreateNode( pNtk, nSuppSize, Nwk_ObjFanoutNum(pObj) );
-    Nwk_ObjForEachFanin( pObj, pFanin, k )
-        if ( uSupp & (1 << k) )
-            Nwk_ObjAddFanin( pObjNew, pFanin );
-    pObjNew->pFunc = Hop_Remap( pNtk->pManHop, pObj->pFunc, uSupp, Nwk_ObjFaninNum(pObj) );
-    if ( fVerbose )
-        printf( "Reducing node %d fanins from %d to %d.\n", 
-            pObj->Id, Nwk_ObjFaninNum(pObj), Nwk_ObjFaninNum(pObjNew) );
-    Nwk_ObjReplace( pObj, pObjNew );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Minimizes the support of all nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Nwk_ManMinimumBaseInt( Nwk_Man_t * pNtk, int fVerbose )
-{
-    Vec_Int_t * vTruth;
-    Nwk_Obj_t * pObj;
-    int i, Counter = 0;
-    vTruth = Vec_IntAlloc( 1 << 16 );
-    Nwk_ManForEachNode( pNtk, pObj, i )
-        Counter += Nwk_ManMinimumBaseNode( pObj, vTruth, fVerbose );
-    if ( fVerbose && Counter )
-        printf( "Support minimization reduced support of %d nodes.\n", Counter );
-    Vec_IntFree( vTruth );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Minimizes the support of all nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManMinimumBaseRec( Nwk_Man_t * pNtk, int fVerbose )
-{
-    int i, clk = clock();
-    for ( i = 0; Nwk_ManMinimumBaseInt( pNtk, fVerbose ); i++ );
-    ABC_PRT( "Minbase", clock() - clk );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Minimizes the support of all nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManMinimumBase( Nwk_Man_t * pNtk, int fVerbose )
-{
-    Vec_Int_t * vTruth;
-    Nwk_Obj_t * pObj;
-    int i, Counter = 0;
-    vTruth = Vec_IntAlloc( 1 << 16 );
-    Nwk_ManForEachNode( pNtk, pObj, i )
-        Counter += Nwk_ManMinimumBaseNode( pObj, vTruth, fVerbose );
-    if ( fVerbose && Counter )
-        printf( "Support minimization reduced support of %d nodes.\n", Counter );
-    Vec_IntFree( vTruth );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Minimizes the support of all nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManRemoveDupFaninsNode( Nwk_Obj_t * pObj, int iFan0, int iFan1, Vec_Int_t * vTruth )
-{
-    Hop_Man_t * pManHop = pObj->pMan->pManHop;
-//    Nwk_Obj_t * pFanin0 = pObj->pFanio[iFan0];
-//    Nwk_Obj_t * pFanin1 = pObj->pFanio[iFan1];
-    assert( pObj->pFanio[iFan0] == pObj->pFanio[iFan1] );
-    pObj->pFunc = Hop_Compose( pManHop, pObj->pFunc, Hop_IthVar(pManHop,iFan0), iFan1 );
-    Nwk_ManMinimumBaseNode( pObj, vTruth, 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Minimizes the support of all nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Nwk_ManRemoveDupFanins( Nwk_Man_t * pNtk, int fVerbose )
-{
-    Vec_Int_t * vTruth;
-    Nwk_Obj_t * pObj;
-    int i, k, m, fFound;
-    // check if the nodes have duplicated fanins
-    vTruth = Vec_IntAlloc( 1 << 16 );
-    Nwk_ManForEachNode( pNtk, pObj, i )
-    {
-        fFound = 0;
-        for ( k = 0; k < pObj->nFanins; k++ )
-        {
-            for ( m = k + 1; m < pObj->nFanins; m++ )
-                if ( pObj->pFanio[k] == pObj->pFanio[m] )
-                {
-                    if ( fVerbose )
-                        printf( "Removing duplicated fanins of node %d (fanins %d and %d).\n", 
-                            pObj->Id, pObj->pFanio[k]->Id, pObj->pFanio[m]->Id );
-                    Nwk_ManRemoveDupFaninsNode( pObj, k, m, vTruth );
-                    fFound = 1;
-                    break;
-                }
-            if ( fFound )
-                break;
-        }
-    }
-    Vec_IntFree( vTruth );
-//    Nwk_ManMinimumBase( pNtk, fVerbose );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/nwk/nwk_.c b/src/aig/nwk/nwk_.c
deleted file mode 100644
index 882b077c..00000000
--- a/src/aig/nwk/nwk_.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [nwk_.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Netlist representation.]
-
-  Synopsis    []
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: nwk_.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "nwk.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/rwt/module.make b/src/aig/rwt/module.make
deleted file mode 100644
index 439d576f..00000000
--- a/src/aig/rwt/module.make
+++ /dev/null
@@ -1,3 +0,0 @@
-SRC +=  src/aig/rwt/rwtDec.c \
-    src/aig/rwt/rwtMan.c \
-    src/aig/rwt/rwtUtil.c
diff --git a/src/aig/rwt/rwt.h b/src/aig/rwt/rwt.h
deleted file mode 100644
index 5410c9de..00000000
--- a/src/aig/rwt/rwt.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [rwt.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting package.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: rwt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __RWT_H__
-#define __RWT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-
-#include "vec.h"
-#include "extra.h"
-#include "mem.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
- 
-#define RWT_LIMIT  1048576/4  // ((1 << 20) 
-#define RWT_MIN(a,b)      (((a) < (b))? (a) : (b))
-#define RWT_MAX(a,b)      (((a) > (b))? (a) : (b))
-
-typedef struct Rwt_Man_t_   Rwt_Man_t;
-typedef struct Rwt_Node_t_  Rwt_Node_t;
-
-struct Rwt_Man_t_
-{
-    // internal lookups
-    int                nFuncs;           // number of four var functions
-    unsigned short *   puCanons;         // canonical forms
-    char *             pPhases;          // canonical phases
-    char *             pPerms;           // canonical permutations
-    unsigned char *    pMap;             // mapping of functions into class numbers
-    unsigned short *   pMapInv;          // mapping of classes into functions
-    char *             pPractical;       // practical NPN classes
-    char **            pPerms4;          // four-var permutations
-    // node space
-    Vec_Ptr_t *        vForest;          // all the nodes
-    Rwt_Node_t **      pTable;           // the hash table of nodes by their canonical form
-    Vec_Vec_t *        vClasses;         // the nodes of the equivalence classes
-    Mem_Fixed_t *      pMmNode;          // memory for nodes and cuts
-    // statistical variables
-    int                nTravIds;         // the counter of traversal IDs
-    int                nConsidered;      // the number of nodes considered
-    int                nAdded;           // the number of nodes added to lists
-    int                nClasses;         // the number of NN classes
-    // the result of resynthesis
-    int                fCompl;           // indicates if the output of FF should be complemented
-    void *             pCut;             // the decomposition tree (temporary)
-    void *             pGraph;           // the decomposition tree (temporary)
-    char *             pPerm;            // permutation used for the best cut
-    Vec_Ptr_t *        vFanins;          // the fanins array (temporary)
-    Vec_Ptr_t *        vFaninsCur;       // the fanins array (temporary)
-    Vec_Int_t *        vLevNums;         // the array of levels (temporary)
-    Vec_Ptr_t *        vNodesTemp;       // the nodes in MFFC (temporary)
-    // node statistics
-    int                nNodesConsidered;
-    int                nNodesRewritten;
-    int                nNodesGained;
-    int                nScores[222];
-    int                nCutsGood;
-    int                nCutsBad;
-    int                nSubgraphs;
-    // runtime statistics
-    int                timeStart;
-    int                timeTruth;
-    int                timeCut;
-    int                timeRes;
-    int                timeEval;
-    int                timeMffc;
-    int                timeUpdate;
-    int                timeTotal;
-};
-
-struct Rwt_Node_t_ // 24 bytes
-{
-    int                Id;               // ID 
-    int                TravId;           // traversal ID
-    unsigned           uTruth : 16;      // truth table
-    unsigned           Volume :  8;      // volume
-    unsigned           Level  :  6;      // level
-    unsigned           fUsed  :  1;      // mark
-    unsigned           fExor  :  1;      // mark
-    Rwt_Node_t *       p0;               // first child
-    Rwt_Node_t *       p1;               // second child
-    Rwt_Node_t *       pNext;            // next in the table
-};
-
-// manipulation of complemented attributes
-static inline int          Rwt_IsComplement( Rwt_Node_t * p )    { return (int)(((ABC_PTRUINT_T)p) & 01);            }
-static inline Rwt_Node_t * Rwt_Regular( Rwt_Node_t * p )         { return (Rwt_Node_t *)((ABC_PTRUINT_T)(p) & ~01);  }
-static inline Rwt_Node_t * Rwt_Not( Rwt_Node_t * p )             { return (Rwt_Node_t *)((ABC_PTRUINT_T)(p) ^  01);  }
-static inline Rwt_Node_t * Rwt_NotCond( Rwt_Node_t * p, int c )  { return (Rwt_Node_t *)((ABC_PTRUINT_T)(p) ^ (c));  }
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== rwrDec.c ========================================================*/
-extern void              Rwt_ManPreprocess( Rwt_Man_t * p );
-/*=== rwrMan.c ========================================================*/
-extern Rwt_Man_t *       Rwt_ManStart( int fPrecompute );
-extern void              Rwt_ManStop( Rwt_Man_t * p );
-extern void              Rwt_ManPrintStats( Rwt_Man_t * p );
-extern void              Rwt_ManPrintStatsFile( Rwt_Man_t * p );
-extern void *            Rwt_ManReadDecs( Rwt_Man_t * p );
-extern Vec_Ptr_t *       Rwt_ManReadLeaves( Rwt_Man_t * p );
-extern int               Rwt_ManReadCompl( Rwt_Man_t * p );
-extern void              Rwt_ManAddTimeCuts( Rwt_Man_t * p, int Time );
-extern void              Rwt_ManAddTimeUpdate( Rwt_Man_t * p, int Time );
-extern void              Rwt_ManAddTimeTotal( Rwt_Man_t * p, int Time );
-/*=== rwrUtil.c ========================================================*/
-extern void              Rwt_ManLoadFromArray( Rwt_Man_t * p, int fVerbose );
-extern char *            Rwt_ManGetPractical( Rwt_Man_t * p );
-extern Rwt_Node_t *      Rwt_ManAddVar( Rwt_Man_t * p, unsigned uTruth, int fPrecompute );
-extern void              Rwt_ManIncTravId( Rwt_Man_t * p );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/rwt/rwtDec.c b/src/aig/rwt/rwtDec.c
deleted file mode 100644
index a26e474d..00000000
--- a/src/aig/rwt/rwtDec.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [rwtDec.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting package.]
-
-  Synopsis    [Evaluation and decomposition procedures.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: rwtDec.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "rwt.h"
-#include "deco.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static Dec_Graph_t * Rwt_NodePreprocess( Rwt_Man_t * p, Rwt_Node_t * pNode );
-static Dec_Edge_t    Rwt_TravCollect_rec( Rwt_Man_t * p, Rwt_Node_t * pNode, Dec_Graph_t * pGraph );
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Preprocesses computed library of subgraphs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_ManPreprocess( Rwt_Man_t * p )
-{
-    Dec_Graph_t * pGraph;
-    Rwt_Node_t * pNode;
-    int i, k;
-    // put the nodes into the structure
-    p->pMapInv  = ABC_ALLOC( unsigned short, 222 );
-    memset( p->pMapInv, 0, sizeof(unsigned short) * 222 );
-    p->vClasses = Vec_VecStart( 222 );
-    for ( i = 0; i < p->nFuncs; i++ )
-    {
-        if ( p->pTable[i] == NULL )
-            continue;
-        // consider all implementations of this function
-        for ( pNode = p->pTable[i]; pNode; pNode = pNode->pNext )
-        {
-            assert( pNode->uTruth == p->pTable[i]->uTruth );
-            assert( p->pMap[pNode->uTruth] < 222 ); // Always >= 0 b/c unsigned.
-            Vec_VecPush( p->vClasses, p->pMap[pNode->uTruth], pNode );
-            p->pMapInv[ p->pMap[pNode->uTruth] ] = p->puCanons[pNode->uTruth];
-        }
-    }
-    // compute decomposition forms for each node and verify them
-    Vec_VecForEachEntry( Rwt_Node_t *, p->vClasses, pNode, i, k )
-    {
-        pGraph = Rwt_NodePreprocess( p, pNode );
-        pNode->pNext = (Rwt_Node_t *)pGraph;
-//        assert( pNode->uTruth == (Dec_GraphDeriveTruth(pGraph) & 0xFFFF) );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Preprocesses subgraphs rooted at this node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Dec_Graph_t * Rwt_NodePreprocess( Rwt_Man_t * p, Rwt_Node_t * pNode )
-{
-    Dec_Graph_t * pGraph;
-    Dec_Edge_t eRoot;
-    assert( !Rwt_IsComplement(pNode) );
-    // consider constant
-    if ( pNode->uTruth == 0 )
-        return Dec_GraphCreateConst0();
-    // consider the case of elementary var
-    if ( pNode->uTruth == 0x00FF )
-        return Dec_GraphCreateLeaf( 3, 4, 1 );
-    // start the subgraphs
-    pGraph = Dec_GraphCreate( 4 );
-    // collect the nodes
-    Rwt_ManIncTravId( p );
-    eRoot = Rwt_TravCollect_rec( p, pNode, pGraph );
-    Dec_GraphSetRoot( pGraph, eRoot );
-    return pGraph;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Dec_Edge_t Rwt_TravCollect_rec( Rwt_Man_t * p, Rwt_Node_t * pNode, Dec_Graph_t * pGraph )
-{
-    Dec_Edge_t eNode0, eNode1, eNode;
-    // elementary variable
-    if ( pNode->fUsed )
-        return Dec_EdgeCreate( pNode->Id - 1, 0 );
-    // previously visited node
-    if ( pNode->TravId == p->nTravIds )
-        return Dec_IntToEdge( pNode->Volume );
-    pNode->TravId = p->nTravIds;
-    // solve for children
-    eNode0 = Rwt_TravCollect_rec( p, Rwt_Regular(pNode->p0), pGraph );
-    if ( Rwt_IsComplement(pNode->p0) )    
-        eNode0.fCompl = !eNode0.fCompl;
-    eNode1 = Rwt_TravCollect_rec( p, Rwt_Regular(pNode->p1), pGraph );
-    if ( Rwt_IsComplement(pNode->p1) )    
-        eNode1.fCompl = !eNode1.fCompl;
-    // create the decomposition node(s)
-    if ( pNode->fExor )
-        eNode = Dec_GraphAddNodeXor( pGraph, eNode0, eNode1, 0 );
-    else
-        eNode = Dec_GraphAddNodeAnd( pGraph, eNode0, eNode1 );
-    // save the result
-    pNode->Volume = Dec_EdgeToInt( eNode );
-    return eNode;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/rwt/rwtMan.c b/src/aig/rwt/rwtMan.c
deleted file mode 100644
index 12caa87f..00000000
--- a/src/aig/rwt/rwtMan.c
+++ /dev/null
@@ -1,363 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [rwtMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting package.]
-
-  Synopsis    [Rewriting manager.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: rwtMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "rwt.h"
-#include "deco.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static unsigned short * s_puCanons = NULL; 
-static char *           s_pPhases = NULL; 
-static char *           s_pPerms = NULL; 
-static unsigned char *  s_pMap = NULL;
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Starts residual rewriting manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_ManGlobalStart()
-{ 
-    if ( s_puCanons == NULL )
-        Extra_Truth4VarNPN( &s_puCanons, &s_pPhases, &s_pPerms, &s_pMap );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts residual rewriting manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_ManGlobalStop()
-{ 
-    ABC_FREE( s_puCanons );
-    ABC_FREE( s_pPhases );
-    ABC_FREE( s_pPerms );
-    ABC_FREE( s_pMap );
-} 
-
-/**Function*************************************************************
-
-  Synopsis    [Starts rewriting manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Rwt_Man_t * Rwt_ManStart( int fPrecompute )
-{
-    Rwt_Man_t * p;
-    int clk = clock();
-clk = clock();
-    p = ABC_ALLOC( Rwt_Man_t, 1 );
-    memset( p, 0, sizeof(Rwt_Man_t) );
-    p->nFuncs = (1<<16);
-    // copy the global tables
-    Rwt_ManGlobalStart();
-    p->puCanons = s_puCanons; 
-    p->pPhases  = s_pPhases; 
-    p->pPerms   = s_pPerms; 
-    p->pMap     = s_pMap; 
-    // initialize practical NPN classes
-    p->pPractical  = Rwt_ManGetPractical( p );
-    // create the table
-    p->pTable = ABC_ALLOC( Rwt_Node_t *, p->nFuncs );
-    memset( p->pTable, 0, sizeof(Rwt_Node_t *) * p->nFuncs );
-    // create the elementary nodes
-    p->pMmNode  = Mem_FixedStart( sizeof(Rwt_Node_t) );
-    p->vForest  = Vec_PtrAlloc( 100 );
-    Rwt_ManAddVar( p, 0x0000, fPrecompute ); // constant 0
-    Rwt_ManAddVar( p, 0xAAAA, fPrecompute ); // var A
-    Rwt_ManAddVar( p, 0xCCCC, fPrecompute ); // var B
-    Rwt_ManAddVar( p, 0xF0F0, fPrecompute ); // var C
-    Rwt_ManAddVar( p, 0xFF00, fPrecompute ); // var D
-    p->nClasses = 5;
-    // other stuff
-    p->nTravIds   = 1;
-    p->pPerms4    = Extra_Permutations( 4 );
-    p->vLevNums   = Vec_IntAlloc( 50 );
-    p->vFanins    = Vec_PtrAlloc( 50 );
-    p->vFaninsCur = Vec_PtrAlloc( 50 );
-    p->vNodesTemp = Vec_PtrAlloc( 50 );
-    if ( fPrecompute )
-    {   // precompute subgraphs
-//        Rwt_ManPrecompute( p );
-//        Rwt_ManPrint( p );
-//        Rwt_ManWriteToArray( p );
-    }
-    else
-    {   // load saved subgraphs
-        Rwt_ManLoadFromArray( p, 0 );
-//        Rwt_ManPrint( p );
-        Rwt_ManPreprocess( p );
-    }
-p->timeStart = clock() - clk;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops rewriting manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_ManStop( Rwt_Man_t * p )
-{
-    if ( p->vClasses )
-    {
-        Rwt_Node_t * pNode;
-        int i, k;
-        Vec_VecForEachEntry( Rwt_Node_t *, p->vClasses, pNode, i, k )
-            Dec_GraphFree( (Dec_Graph_t *)pNode->pNext );
-    }
-    if ( p->vClasses )  Vec_VecFree( p->vClasses );
-    Vec_PtrFree( p->vNodesTemp );
-    Vec_PtrFree( p->vForest );
-    Vec_IntFree( p->vLevNums );
-    Vec_PtrFree( p->vFanins );
-    Vec_PtrFree( p->vFaninsCur );
-    Mem_FixedStop( p->pMmNode, 0 );
-    ABC_FREE( p->pMapInv );
-    ABC_FREE( p->pTable );
-    ABC_FREE( p->pPractical );
-    ABC_FREE( p->pPerms4 );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the resynthesis manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_ManPrintStats( Rwt_Man_t * p )
-{
-    int i, Counter = 0;
-    for ( i = 0; i < 222; i++ )
-        Counter += (p->nScores[i] > 0);
-
-    printf( "Rewriting statistics:\n" );
-    printf( "Total cuts tries  = %8d.\n", p->nCutsGood );
-    printf( "Bad cuts found    = %8d.\n", p->nCutsBad );
-    printf( "Total subgraphs   = %8d.\n", p->nSubgraphs );
-    printf( "Used NPN classes  = %8d.\n", Counter );
-    printf( "Nodes considered  = %8d.\n", p->nNodesConsidered );
-    printf( "Nodes rewritten   = %8d.\n", p->nNodesRewritten );
-    printf( "Calculated gain   = %8d.\n", p->nNodesGained     );
-    ABC_PRT( "Start       ", p->timeStart );
-    ABC_PRT( "Cuts        ", p->timeCut );
-    ABC_PRT( "Truth       ", p->timeTruth );
-    ABC_PRT( "Resynthesis ", p->timeRes );
-    ABC_PRT( "    Mffc    ", p->timeMffc );
-    ABC_PRT( "    Eval    ", p->timeEval );
-    ABC_PRT( "Update      ", p->timeUpdate );
-    ABC_PRT( "TOTAL       ", p->timeTotal );
-
-/*
-    printf( "The scores are:\n" );
-    for ( i = 0; i < 222; i++ )
-        if ( p->nScores[i] > 0 )
-        {
-            extern void Ivy_TruthDsdComputePrint( unsigned uTruth );
-            printf( "%3d = %8d  canon = %5d  ", i, p->nScores[i], p->pMapInv[i] );
-            Ivy_TruthDsdComputePrint( (unsigned)p->pMapInv[i] | ((unsigned)p->pMapInv[i] << 16) );
-        }
-    printf( "\n" );
-*/
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the resynthesis manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_ManPrintStatsFile( Rwt_Man_t * p )
-{
-    FILE * pTable;
-    pTable = fopen( "stats.txt", "a+" );
-    fprintf( pTable, "%d ", p->nCutsGood );
-    fprintf( pTable, "%d ", p->nSubgraphs );
-    fprintf( pTable, "%d ", p->nNodesRewritten );
-    fprintf( pTable, "%d", p->nNodesGained );
-    fprintf( pTable, "\n" );
-    fclose( pTable );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the resynthesis manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void * Rwt_ManReadDecs( Rwt_Man_t * p )
-{
-    return p->pGraph;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the resynthesis manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Rwt_ManReadLeaves( Rwt_Man_t * p )
-{
-    return p->vFanins;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the resynthesis manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Rwt_ManReadCompl( Rwt_Man_t * p )
-{
-    return p->fCompl;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the resynthesis manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_ManAddTimeCuts( Rwt_Man_t * p, int Time )
-{
-    p->timeCut += Time;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the resynthesis manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_ManAddTimeUpdate( Rwt_Man_t * p, int Time )
-{
-    p->timeUpdate += Time;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the resynthesis manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_ManAddTimeTotal( Rwt_Man_t * p, int Time )
-{
-    p->timeTotal += Time;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Precomputes AIG subgraphs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_Precompute()
-{
-    Rwt_Man_t * p;
-    p = Rwt_ManStart( 1 );
-    Rwt_ManStop( p );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/rwt/rwtUtil.c b/src/aig/rwt/rwtUtil.c
deleted file mode 100644
index 6cdaf657..00000000
--- a/src/aig/rwt/rwtUtil.c
+++ /dev/null
@@ -1,662 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [rwtUtil.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [DAG-aware AIG rewriting package.]
-
-  Synopsis    [Various utilities.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - June 20, 2005.]
-
-  Revision    [$Id: rwtUtil.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "rwt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// precomputed data
-static unsigned short s_RwtAigSubgraphs[] = 
-{
-    0x0008,0x0002, 0x000a,0x0002, 0x0008,0x0003, 0x000a,0x0003, 0x0009,0x0002, 
-    0x000c,0x0002, 0x000e,0x0002, 0x000c,0x0003, 0x000e,0x0003, 0x000d,0x0002, 
-    0x000c,0x0004, 0x000e,0x0004, 0x000c,0x0005, 0x000e,0x0005, 0x000d,0x0004, 
-    0x0010,0x0002, 0x0012,0x0002, 0x0010,0x0003, 0x0012,0x0003, 0x0011,0x0002, 
-    0x0010,0x0004, 0x0012,0x0004, 0x0010,0x0005, 0x0012,0x0005, 0x0011,0x0004, 
-    0x0010,0x0006, 0x0012,0x0006, 0x0010,0x0007, 0x0012,0x0007, 0x0011,0x0006, 
-    0x0016,0x0005, 0x0014,0x0006, 0x0016,0x0006, 0x0014,0x0007, 0x0016,0x0007, 
-    0x0015,0x0006, 0x0014,0x0008, 0x0016,0x0008, 0x0014,0x0009, 0x0016,0x0009, 
-    0x0015,0x0008, 0x0018,0x0006, 0x001a,0x0006, 0x0018,0x0007, 0x001a,0x0007, 
-    0x0019,0x0006, 0x0018,0x0009, 0x001a,0x0009, 0x0019,0x0008, 0x001e,0x0005, 
-    0x001c,0x0006, 0x001e,0x0006, 0x001c,0x0007, 0x001e,0x0007, 0x001d,0x0006, 
-    0x001c,0x0008, 0x001e,0x0008, 0x001c,0x0009, 0x001e,0x0009, 0x001d,0x0008, 
-    0x0020,0x0006, 0x0022,0x0006, 0x0020,0x0007, 0x0022,0x0007, 0x0021,0x0006, 
-    0x0020,0x0008, 0x0022,0x0008, 0x0020,0x0009, 0x0022,0x0009, 0x0021,0x0008, 
-    0x0024,0x0006, 0x0026,0x0006, 0x0024,0x0007, 0x0026,0x0007, 0x0025,0x0006, 
-    0x0026,0x0008, 0x0024,0x0009, 0x0026,0x0009, 0x0025,0x0008, 0x0028,0x0004, 
-    0x002a,0x0004, 0x0028,0x0005, 0x002a,0x0007, 0x0028,0x0008, 0x002a,0x0009, 
-    0x0029,0x0008, 0x002a,0x000b, 0x0029,0x000a, 0x002a,0x000f, 0x0029,0x000e, 
-    0x002a,0x0011, 0x002a,0x0013, 0x002c,0x0004, 0x002e,0x0004, 0x002c,0x0005, 
-    0x002c,0x0009, 0x002e,0x0009, 0x002d,0x0008, 0x002d,0x000c, 0x002e,0x000f, 
-    0x002e,0x0011, 0x002e,0x0012, 0x0030,0x0004, 0x0032,0x0007, 0x0032,0x0009, 
-    0x0031,0x0008, 0x0032,0x000b, 0x0032,0x000d, 0x0032,0x000f, 0x0031,0x000e, 
-    0x0032,0x0013, 0x0034,0x0004, 0x0036,0x0004, 0x0034,0x0005, 0x0036,0x0005, 
-    0x0035,0x0004, 0x0036,0x0008, 0x0034,0x0009, 0x0036,0x0009, 0x0035,0x0008, 
-    0x0036,0x000b, 0x0036,0x000d, 0x0036,0x0011, 0x0035,0x0010, 0x0036,0x0013, 
-    0x0038,0x0004, 0x0039,0x0004, 0x0038,0x0009, 0x003a,0x0009, 0x0039,0x0008, 
-    0x0038,0x000b, 0x003a,0x000b, 0x003a,0x000d, 0x003a,0x0011, 0x003a,0x0012, 
-    0x0038,0x0013, 0x003a,0x0013, 0x003c,0x0002, 0x003e,0x0002, 0x003c,0x0003, 
-    0x003e,0x0005, 0x003e,0x0007, 0x003c,0x0008, 0x003e,0x0008, 0x003c,0x0009, 
-    0x003e,0x0009, 0x003d,0x0008, 0x003e,0x000d, 0x003e,0x0011, 0x003e,0x0013, 
-    0x003e,0x0017, 0x003e,0x001b, 0x003e,0x001d, 0x0040,0x0002, 0x0042,0x0002, 
-    0x0042,0x0005, 0x0041,0x0006, 0x0042,0x0008, 0x0041,0x0008, 0x0042,0x000d, 
-    0x0042,0x0011, 0x0042,0x0015, 0x0042,0x0019, 0x0042,0x001b, 0x0042,0x001c, 
-    0x0041,0x001c, 0x0044,0x0002, 0x0046,0x0003, 0x0045,0x0004, 0x0046,0x0007, 
-    0x0045,0x0008, 0x0046,0x000b, 0x0046,0x000f, 0x0046,0x0013, 0x0045,0x0012, 
-    0x0046,0x0017, 0x0046,0x001b, 0x0046,0x0021, 0x0048,0x0002, 0x004a,0x0002, 
-    0x0048,0x0003, 0x004a,0x0003, 0x0049,0x0002, 0x0048,0x0008, 0x004a,0x0008, 
-    0x0048,0x0009, 0x004a,0x0009, 0x0049,0x0008, 0x004a,0x000b, 0x004a,0x000f, 
-    0x004a,0x0011, 0x004a,0x0012, 0x004a,0x0013, 0x004a,0x0015, 0x004a,0x0019, 
-    0x004a,0x001b, 0x004a,0x001d, 0x004c,0x0002, 0x004c,0x0003, 0x004d,0x0002, 
-    0x004c,0x0008, 0x004e,0x0008, 0x004c,0x0009, 0x004e,0x0009, 0x004d,0x0008, 
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-    0x035a,0x017b, 0x035a,0x019b, 0x035a,0x01a2, 0x035e,0x0181, 0x0360,0x0009, 
-    0x0366,0x0009, 0x0364,0x0029, 0x0364,0x0030, 0x0364,0x0033, 0x0364,0x003a, 
-    0x0364,0x003d, 0x0364,0x0044, 0x0369,0x0030, 0x0370,0x0029, 0x0370,0x0030, 
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-    0x0382,0x0181, 0x0386,0x0009, 0x0384,0x0029, 0x0384,0x0030, 0x0384,0x0033, 
-    0x0384,0x003a, 0x0384,0x003d, 0x0384,0x0044, 0x038a,0x0044, 0x038a,0x009e, 
-    0x038a,0x0106, 0x038a,0x0198, 0x038d,0x010e, 0x038d,0x0152, 0x038d,0x0158, 
-    0x0392,0x009e, 0x0392,0x0106, 0x0392,0x0198, 0x0395,0x0086, 0x0395,0x009a, 
-    0x0395,0x00ec, 0x0395,0x0172, 0x0398,0x014e, 0x0398,0x0175, 0x0398,0x018d, 
-    0x039c,0x0023, 0x039c,0x0027, 0x039c,0x00ef, 0x039c,0x0139, 0x039c,0x0168, 
-    0x03a0,0x0019, 0x03a0,0x001d, 0x03a0,0x0023, 0x03a0,0x0027, 0x03a1,0x004e, 
-    0x03a4,0x0162, 0x03a4,0x0183, 0x03a8,0x0013, 0x03a8,0x0027, 0x03a8,0x0133, 
-    0x03a8,0x0148, 0x03a8,0x0181, 0x03ac,0x0013, 0x03ac,0x0027, 0x03b0,0x017b, 
-    0x03b0,0x0181, 0x03b4,0x004b, 0x03b4,0x00e0, 0x03b4,0x00fb, 0x03b8,0x000f, 
-    0x03b8,0x0013, 0x03b8,0x00ab, 0x03b8,0x00bf, 0x03b8,0x00d0, 0x03bd,0x00da, 
-    0x03bd,0x012c, 0x03c8,0x000f, 0x03c8,0x0013, 0x03c8,0x0019, 0x03c8,0x001d, 
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-    0x072a,0x02a7, 0x0729,0x031c, 0x0729,0x032a, 0x072e,0x003d, 0x072e,0x00f9, 
-    0x072e,0x022d, 0x072e,0x0248, 0x072e,0x02e4, 0x0730,0x003d, 0x0730,0x0247, 
-    0x0730,0x02e3, 0x0730,0x0324, 0x0732,0x0324, 0x0739,0x032e, 0x073e,0x003d, 
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-    0x0748,0x01f1, 0x074c,0x0162, 0x074c,0x0183, 0x0750,0x0023, 0x0750,0x00e0, 
-    0x0750,0x00fb, 0x0755,0x0246, 0x075a,0x0095, 0x075a,0x0397, 0x075d,0x0004, 
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-    0x0772,0x0397, 0x0776,0x008f, 0x077e,0x0027, 0x078a,0x00a1, 0x0792,0x009d, 
-    0x0792,0x00c3, 0x0792,0x02fb, 0x0792,0x0301, 0x0792,0x0315, 0x0792,0x03bd, 
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-    0x07a6,0x0301, 0x07a6,0x0315, 0x07a6,0x03bd, 0x07aa,0x0027, 0x07aa,0x024f, 
-    0x07ae,0x009d, 0x07b9,0x004e, 0x07b8,0x0087, 0x07b8,0x00ed, 0x07b8,0x0173, 
-    0x07b8,0x0197, 0x07b9,0x021a, 0x07b9,0x02b8, 0x07b9,0x0364, 0x07be,0x0029, 
-    0x07be,0x0030, 0x07c0,0x017b, 0x07c6,0x017b, 0x07c8,0x00f3, 0x07ce,0x00f3, 
-    0x07d0,0x008f, 0x07d6,0x008f, 0x07d9,0x01e8, 0x07dd,0x0292, 0x07e2,0x0053, 
-    0x07e6,0x008f, 0x07e6,0x00f3, 0x07e6,0x017b, 0x07e8,0x0029, 0x07e8,0x0030, 
-    0x07ec,0x0021, 0x07ec,0x02ad, 0x07f2,0x0181, 0x07f2,0x0315, 0x07f4,0x0021, 
-    0x07f8,0x020f, 0x07fd,0x002e, 0x0800,0x008f, 0x0805,0x0006, 0x0809,0x03c2, 
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-    0x084a,0x0033, 0x084e,0x0285, 0x0851,0x009a, 0x0856,0x00a1, 0x0859,0x031c, 
-    0x085d,0x00b2, 0x0861,0x0012, 0x0861,0x02cc, 0x0865,0x0058, 0x0865,0x007e, 
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-    0x0882,0x0229, 0x0882,0x022d, 0x0882,0x02c7, 0x0882,0x02cb, 0x0886,0x0021, 
-    0x0886,0x02ad, 0x0885,0x0356, 0x088a,0x0017, 0x088a,0x020f, 0x0889,0x0354, 
-    0x088d,0x009c, 0x0892,0x0089, 0x0895,0x0246, 0x089a,0x03bd, 0x089e,0x008f, 
-    0x089e,0x02f9, 0x089e,0x0313, 0x08a1,0x032a, 0x08a6,0x0053, 0x08a6,0x0095, 
-    0x08a6,0x0397, 0x08a8,0x017b, 0x08ad,0x031a, 0x08b2,0x017b, 0x08b4,0x00f3, 
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-    0x0982,0x0293, 0x0984,0x0293, 0x0984,0x0379, 0x098a,0x02eb, 0x098e,0x0009, 
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-    0x09b4,0x0025, 0x09ba,0x0033, 0x09ba,0x0079, 0x09bc,0x0015, 0x09c2,0x013f, 
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-    0x09d9,0x0008, 0x09dc,0x000b, 0x09dc,0x004f, 0x09dd,0x0086, 0x09e0,0x0009, 
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-    0x0a10,0x000b, 0x0a10,0x0387, 0x0a16,0x0059, 0x0a18,0x0009, 0x0a1e,0x0043, 
-    0x0a24,0x0085, 0x0a2a,0x0009, 0x0a2d,0x0008, 0x0a32,0x028a, 0x0a32,0x02a7, 
-    0x0a31,0x031c, 0x0a35,0x032e, 0x0a39,0x0006, 0x0a3a,0x0105, 0x0a3a,0x024f, 
-    0x0a3c,0x0299, 0x0a42,0x01ed, 0x0a46,0x0299, 0x0a48,0x01ed, 0x0a4c,0x0059, 
-    0x0a52,0x000b, 0x0a52,0x0387, 0x0a56,0x000b, 0x0a5e,0x0009, 0x0a60,0x003d, 
-    0x0a66,0x0105, 0x0a6a,0x0195, 0x0a6c,0x000b, 0x0a76,0x0053, 0x0a78,0x0009, 
-    0x0a7a,0x008f, 0x0a82,0x0299, 0x0a86,0x01ed, 0x0a8a,0x0027, 0x0a8e,0x004b, 
-    0x0a92,0x003d, 0x0a95,0x0322, 0x0a99,0x0038, 0x0a99,0x0090, 0x0a9c,0x0061, 
-    0x0a9c,0x00c7, 0x0a9c,0x012d, 0x0a9c,0x016f, 0x0a9c,0x017d, 0x0a9c,0x02c9, 
-    0x0a9c,0x0383, 0x0aa1,0x0010, 0x0aa4,0x00b3, 0x0aa8,0x002f, 0x0aac,0x0027, 
-    0x0ab0,0x004b, 0x0ab4,0x0043, 0x0ab9,0x0090, 0x0abd,0x0010, 0x0ac4,0x0019, 
-    0x0acc,0x00f5, 0x0acc,0x022b, 0x0acc,0x037b, 0x0ad2,0x008f, 0x0ad2,0x01f1, 
-    0x0ad6,0x0324, 0x0ad9,0x0330, 0x0ade,0x008f, 0x0ade,0x01f1, 0x0ae0,0x017b, 
-    0x0ae4,0x008f, 0x0ae9,0x004e, 0x0aee,0x0027, 0x0af2,0x028a, 0x0af2,0x02a7, 
-    0x0af1,0x031c, 0x0af6,0x0027, 0x0af9,0x031c, 0x0afe,0x00e9, 0x0afe,0x02bb, 
-    0x0b02,0x000b, 0x0b06,0x00f5, 0x0b06,0x022b, 0x0b06,0x037b, 0x0b0a,0x003d, 
-    0x0000,0x0000 
-};
-
-
-static unsigned short s_RwtPracticalClasses[] =
-{
-    0x0000, 0x0001, 0x0003, 0x0006, 0x0007, 0x000f, 0x0016, 0x0017, 0x0018, 0x0019, 0x001b,
-    0x001e, 0x001f, 0x003c, 0x003d, 0x003f, 0x0069, 0x006b, 0x006f, 0x007e, 0x007f, 0x00ff,
-    0x0116, 0x0118, 0x0119, 0x011a, 0x011b, 0x011e, 0x011f, 0x012c, 0x012d, 0x012f, 0x013c,
-    0x013d, 0x013e, 0x013f, 0x0168, 0x0169, 0x016f, 0x017f, 0x0180, 0x0181, 0x0182, 0x0183,
-    0x0186, 0x0189, 0x018b, 0x018f, 0x0198, 0x0199, 0x019b, 0x01a8, 0x01a9, 0x01aa, 0x01ab,
-    0x01ac, 0x01ad, 0x01ae, 0x01af, 0x01bf, 0x01e9, 0x01ea, 0x01eb, 0x01ee, 0x01ef, 0x01fe,
-    0x033c, 0x033d, 0x033f, 0x0356, 0x0357, 0x0358, 0x0359, 0x035a, 0x035b, 0x035f, 0x0368,
-    0x0369, 0x036c, 0x036e, 0x037d, 0x03c0, 0x03c1, 0x03c3, 0x03c7, 0x03cf, 0x03d4, 0x03d5,
-    0x03d7, 0x03d8, 0x03d9, 0x03dc, 0x03dd, 0x03de, 0x03fc, 0x0660, 0x0661, 0x0666, 0x0669,
-    0x066f, 0x0676, 0x067e, 0x0690, 0x0696, 0x0697, 0x069f, 0x06b1, 0x06b6, 0x06f0, 0x06f2,
-    0x06f6, 0x06f9, 0x0776, 0x0778, 0x07b0, 0x07b1, 0x07b4, 0x07bc, 0x07f0, 0x07f2, 0x07f8,
-    0x0ff0, 0x1683, 0x1696, 0x1698, 0x169e, 0x16e9, 0x178e, 0x17e8, 0x18e7, 0x19e6, 0x1be4,
-    0x1ee1, 0x3cc3, 0x6996, 0x0000
-};
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Adds the node to the end of the list.]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_ListAddToTail( Rwt_Node_t ** ppList, Rwt_Node_t * pNode )
-{
-    Rwt_Node_t * pTemp;
-    // find the last one
-    for ( pTemp = *ppList; pTemp; pTemp = pTemp->pNext )
-        ppList = &pTemp->pNext;
-    // attach at the end
-    *ppList = pNode;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds one node.]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Rwt_Node_t * Rwt_ManAddVar( Rwt_Man_t * p, unsigned uTruth, int fPrecompute )
-{
-    Rwt_Node_t * pNew;
-    pNew = (Rwt_Node_t *)Mem_FixedEntryFetch( p->pMmNode );
-    pNew->Id     = p->vForest->nSize;
-    pNew->TravId = 0;
-    pNew->uTruth = uTruth;
-    pNew->Level  = 0;
-    pNew->Volume = 0;
-    pNew->fUsed  = 1;
-    pNew->fExor  = 0;
-    pNew->p0     = NULL;
-    pNew->p1     = NULL;
-    pNew->pNext  = NULL;
-    Vec_PtrPush( p->vForest, pNew );
-    if ( fPrecompute )
-        Rwt_ListAddToTail( p->pTable + uTruth, pNew );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds one node.]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Rwt_Node_t * Rwt_ManAddNode( Rwt_Man_t * p, Rwt_Node_t * p0, Rwt_Node_t * p1, int fExor, int Level, int Volume )
-{
-    Rwt_Node_t * pNew;
-    unsigned uTruth;
-    // compute truth table, leve, volume
-    p->nConsidered++;
-    if ( fExor )
-        uTruth = (p0->uTruth ^ p1->uTruth);
-    else
-        uTruth = (Rwt_IsComplement(p0)? ~Rwt_Regular(p0)->uTruth : Rwt_Regular(p0)->uTruth) &
-                 (Rwt_IsComplement(p1)? ~Rwt_Regular(p1)->uTruth : Rwt_Regular(p1)->uTruth) & 0xFFFF;
-    // create the new node
-    pNew = (Rwt_Node_t *)Mem_FixedEntryFetch( p->pMmNode );
-    pNew->Id     = p->vForest->nSize;
-    pNew->TravId = 0;
-    pNew->uTruth = uTruth;
-    pNew->Level  = Level;
-    pNew->Volume = Volume;
-    pNew->fUsed  = 0;
-    pNew->fExor  = fExor;
-    pNew->p0     = p0;
-    pNew->p1     = p1;
-    pNew->pNext  = NULL;
-    Vec_PtrPush( p->vForest, pNew );
-    // do not add if the node is not essential
-    if ( uTruth != p->puCanons[uTruth] )
-        return pNew;
-
-    // add to the list
-    p->nAdded++;
-    if ( p->pTable[uTruth] == NULL )
-        p->nClasses++;
-    Rwt_ListAddToTail( p->pTable + uTruth, pNew );
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds one node.]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_Trav_rec( Rwt_Man_t * p, Rwt_Node_t * pNode, int * pVolume )
-{
-    if ( pNode->fUsed || pNode->TravId == p->nTravIds )
-        return;
-    pNode->TravId = p->nTravIds;
-    (*pVolume)++;
-    if ( pNode->fExor )
-        (*pVolume)++;
-    Rwt_Trav_rec( p, Rwt_Regular(pNode->p0), pVolume );
-    Rwt_Trav_rec( p, Rwt_Regular(pNode->p1), pVolume );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds one node.]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_ManIncTravId( Rwt_Man_t * p )
-{
-    Rwt_Node_t * pNode;
-    int i;
-    if ( p->nTravIds++ < 0x8FFFFFFF )
-        return;
-    Vec_PtrForEachEntry( Rwt_Node_t *, p->vForest, pNode, i )
-        pNode->TravId = 0;
-    p->nTravIds = 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Adds one node.]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Rwt_ManNodeVolume( Rwt_Man_t * p, Rwt_Node_t * p0, Rwt_Node_t * p1 )
-{
-    int Volume = 0;
-    Rwt_ManIncTravId( p );
-    Rwt_Trav_rec( p, p0, &Volume );
-    Rwt_Trav_rec( p, p1, &Volume );
-    return Volume;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Loads data.]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Rwt_ManLoadFromArray( Rwt_Man_t * p, int fVerbose )
-{
-    unsigned short * pArray = s_RwtAigSubgraphs;
-    Rwt_Node_t * p0, * p1;
-    unsigned Entry0, Entry1;
-    int Level, Volume, nEntries, fExor;
-    int i, clk = clock();
-
-    // reconstruct the forest
-    for ( i = 0; ; i++ )
-    {
-        Entry0 = pArray[2*i + 0];
-        Entry1 = pArray[2*i + 1];
-        if ( Entry0 == 0 && Entry1 == 0 )
-            break;
-        // get EXOR flag
-        fExor = (Entry0 & 1);
-        Entry0 >>= 1;
-        // get the nodes
-        p0 = (Rwt_Node_t *)p->vForest->pArray[Entry0 >> 1];
-        p1 = (Rwt_Node_t *)p->vForest->pArray[Entry1 >> 1];
-        // compute the level and volume of the new nodes
-        Level  = 1 + RWT_MAX( p0->Level, p1->Level );
-        Volume = 1 + Rwt_ManNodeVolume( p, p0, p1 );
-        // set the complemented attributes
-        p0 = Rwt_NotCond( p0, (Entry0 & 1) );
-        p1 = Rwt_NotCond( p1, (Entry1 & 1) );
-        // add the node
-//        Rwt_ManTryNode( p, p0, p1, Level, Volume );
-        Rwt_ManAddNode( p, p0, p1, fExor, Level, Volume + fExor );
-    }
-    nEntries = i - 1;
-    if ( fVerbose )
-    {
-        printf( "The number of classes = %d. Canonical nodes = %d.\n", p->nClasses, p->nAdded );
-        printf( "The number of nodes loaded = %d.  ", nEntries );  ABC_PRT( "Loading", clock() - clk );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Create practical classes.]
-
-  Description []
-
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-char * Rwt_ManGetPractical( Rwt_Man_t * p )
-{
-    char * pPractical;
-    int i;
-    pPractical = ABC_ALLOC( char, p->nFuncs );
-    memset( pPractical, 0, sizeof(char) * p->nFuncs );
-    pPractical[0] = 1;
-    for ( i = 1; ; i++ )
-    {
-        if ( s_RwtPracticalClasses[i] == 0 )
-            break;
-        pPractical[ s_RwtPracticalClasses[i] ] = 1;
-    }
-    return pPractical;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-// the following 135 practical NPN classes of 4-variable functions were computed
-// by considering all 4-input cuts appearing in IWLS, MCNC, and ISCAS benchmarks
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/saig/saig.h b/src/aig/saig/saig.h
index 64bb3b02..b22821ab 100644
--- a/src/aig/saig/saig.h
+++ b/src/aig/saig/saig.h
@@ -18,16 +18,16 @@
 
 ***********************************************************************/
  
-#ifndef __SAIG_H__
-#define __SAIG_H__
+#ifndef ABC__aig__saig__saig_h
+#define ABC__aig__saig__saig_h
 
 
 ////////////////////////////////////////////////////////////////////////
 ///                          INCLUDES                                ///
 ////////////////////////////////////////////////////////////////////////
 
-#include "aig.h"
-#include "giaAbs.h"
+#include "src/aig/aig/aig.h"
+#include "src/aig/gia/giaAbs.h"
 
 ABC_NAMESPACE_HEADER_START
 
diff --git a/src/aig/saig/saigAbs.c b/src/aig/saig/saigAbs.c
index 01b1e6a6..ffb17db8 100644
--- a/src/aig/saig/saigAbs.c
+++ b/src/aig/saig/saigAbs.c
@@ -105,8 +105,8 @@ Abc_Cex_t * Saig_ManCexRemap( Aig_Man_t * p, Aig_Man_t * pAbs, Abc_Cex_t * pCexA
         {
             if ( i == Saig_ManPiNum(p) )
                 break;
-            if ( Aig_InfoHasBit( pCexAbs->pData, pCexAbs->nRegs + pCexAbs->nPis * f + i ) )
-                Aig_InfoSetBit( pCex->pData, pCex->nRegs + pCex->nPis * f + i );
+            if ( Abc_InfoHasBit( pCexAbs->pData, pCexAbs->nRegs + pCexAbs->nPis * f + i ) )
+                Abc_InfoSetBit( pCex->pData, pCex->nRegs + pCex->nPis * f + i );
         }
     }
     // verify the counter example
diff --git a/src/aig/saig/saigAbsCba.c b/src/aig/saig/saigAbsCba.c
index f3e55c72..e8b68a6f 100644
--- a/src/aig/saig/saigAbsCba.c
+++ b/src/aig/saig/saigAbsCba.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "giaAig.h"
-#include "ioa.h"
+#include "src/aig/gia/giaAig.h"
+#include "src/aig/ioa/ioa.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -89,7 +89,7 @@ Vec_Int_t * Saig_ManCbaFilterFlops( Aig_Man_t * pAig, Abc_Cex_t * pAbsCex, Vec_I
         // override the flop values according to the cex
         iBit = pAbsCex->nRegs + f * pAbsCex->nPis + Saig_ManPiNum(pAig);
         Vec_IntForEachEntry( vMapEntries, Entry, k )
-            Saig_ManLo(pAig, Entry)->fMarkB = Aig_InfoHasBit(pAbsCex->pData, iBit + k);
+            Saig_ManLo(pAig, Entry)->fMarkB = Abc_InfoHasBit(pAbsCex->pData, iBit + k);
         // simulate
         Aig_ManForEachNode( pAig, pObj, k )
             pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) & 
@@ -102,7 +102,7 @@ Vec_Int_t * Saig_ManCbaFilterFlops( Aig_Man_t * pAig, Abc_Cex_t * pAbsCex, Vec_I
         // compare
         iBit = pAbsCex->nRegs + (f + 1) * pAbsCex->nPis + Saig_ManPiNum(pAig);
         Vec_IntForEachEntry( vMapEntries, Entry, k )
-            if ( Saig_ManLi(pAig, Entry)->fMarkB != (unsigned)Aig_InfoHasBit(pAbsCex->pData, iBit + k) )
+            if ( Saig_ManLi(pAig, Entry)->fMarkB != (unsigned)Abc_InfoHasBit(pAbsCex->pData, iBit + k) )
                 Vec_IntAddToEntry( vFlopCosts, k, 1 );
     }
 //    Vec_IntForEachEntry( vFlopCosts, Entry, i )
@@ -153,7 +153,7 @@ Aig_Man_t * Saig_ManDupWithCubes( Aig_Man_t * pAig, Vec_Vec_t * vReg2Value )
     assert( pAig->nConstrs == 0 );
     // start the new manager
     pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) + Vec_VecSizeSize(vReg2Value) );
-    pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+    pAigNew->pName = Abc_UtilStrsav( pAig->pName );
     // map the constant node
     Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
     // create variables for PIs
@@ -168,8 +168,8 @@ Aig_Man_t * Saig_ManDupWithCubes( Aig_Man_t * pAig, Vec_Vec_t * vReg2Value )
         pMiter = Aig_ManConst1( pAigNew );
         Vec_IntForEachEntry( vLevel, Lit, k )
         {
-            pObj = Saig_ManLi( pAig, Aig_Lit2Var(Lit) );
-            pMiter = Aig_And( pAigNew, pMiter, Aig_NotCond(Aig_ObjChild0Copy(pObj), Aig_LitIsCompl(Lit)) );
+            pObj = Saig_ManLi( pAig, Abc_Lit2Var(Lit) );
+            pMiter = Aig_And( pAigNew, pMiter, Aig_NotCond(Aig_ObjChild0Copy(pObj), Abc_LitIsCompl(Lit)) );
         }
         Aig_ObjCreatePo( pAigNew, pMiter );
     }
@@ -227,20 +227,20 @@ Abc_Cex_t * Saig_ManCbaReason2Cex( Saig_ManCba_t * p, Vec_Int_t * vReasons )
     Abc_Cex_t * pCare;
     int i, Entry, iInput, iFrame;
     pCare = Abc_CexDup( p->pCex, p->pCex->nRegs );
-    memset( pCare->pData, 0, sizeof(unsigned) * Aig_BitWordNum(pCare->nBits) );
+    memset( pCare->pData, 0, sizeof(unsigned) * Abc_BitWordNum(pCare->nBits) );
     Vec_IntForEachEntry( vReasons, Entry, i )
     {
         assert( Entry >= 0 && Entry < Aig_ManPiNum(p->pFrames) );
         iInput = Vec_IntEntry( p->vMapPiF2A, 2*Entry );
         iFrame = Vec_IntEntry( p->vMapPiF2A, 2*Entry+1 );
-        Aig_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
+        Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
     }
 /*
     for ( iFrame = 0; iFrame <= pCare->iFrame; iFrame++ )
     {
         int Count = 0;
         for ( i = 0; i < pCare->nPis; i++ )
-            Count +=  Aig_InfoHasBit(pCare->pData, pCare->nRegs + pCare->nPis * iFrame + i);
+            Count +=  Abc_InfoHasBit(pCare->pData, pCare->nRegs + pCare->nPis * iFrame + i);
         printf( "%d ", Count );
     }
 printf( "\n" );
@@ -322,7 +322,7 @@ Vec_Int_t * Saig_ManCbaFindReason( Saig_ManCba_t * p )
     {
         int iInput = Vec_IntEntry( p->vMapPiF2A, 2*i );
         int iFrame = Vec_IntEntry( p->vMapPiF2A, 2*i+1 );
-        pObj->fPhase = Aig_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
+        pObj->fPhase = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
         Vec_IntWriteEntry( vPrios, Aig_ObjId(pObj), i );
     }
 
@@ -434,11 +434,11 @@ Aig_Man_t * Saig_ManCbaUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nI
 
     // derive unrolled timeframes
     pFrames = Aig_ManStart( 10000 );
-    pFrames->pName = Aig_UtilStrsav( pAig->pName );
-    pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+    pFrames->pName = Abc_UtilStrsav( pAig->pName );
+    pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
     // initialize the flops 
     Saig_ManForEachLo( pAig, pObj, i )
-        pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Aig_InfoHasBit(pCex->pData, i) );
+        pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Abc_InfoHasBit(pCex->pData, i) );
     // iterate through the frames
     for ( f = 0; f <= pCex->iFrame; f++ )
     {
@@ -457,7 +457,7 @@ Aig_Man_t * Saig_ManCbaUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nI
                 if ( Aig_ObjPioNum(pObj) < nInputs )
                 {
                     int iBit = pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj);
-                    pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Aig_InfoHasBit(pCex->pData, iBit) );
+                    pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Abc_InfoHasBit(pCex->pData, iBit) );
                 }
                 else
                 {
@@ -558,12 +558,12 @@ void Saig_ManCbaShrink( Saig_ManCba_t * p )
     {
         Vec_IntForEachEntryDouble( vLevel, ObjId, Lit, k )
         {
-            pObjFrame = Aig_ManObj( p->pFrames, Aig_Lit2Var(Lit) );
+            pObjFrame = Aig_ManObj( p->pFrames, Abc_Lit2Var(Lit) );
             if ( pObjFrame == NULL || (!Aig_ObjIsConst1(pObjFrame) && !Aig_ObjIsTravIdCurrent(p->pFrames, pObjFrame)) )
                 continue;
             pObjLi = Aig_ManObj( p->pAig, ObjId );
             assert( Saig_ObjIsLi(p->pAig, pObjLi) );
-            Vec_VecPushInt( p->vReg2Value, f, Aig_Var2Lit( Aig_ObjPioNum(pObjLi) - Saig_ManPoNum(p->pAig), Aig_LitIsCompl(Lit) ^ !pObjFrame->fPhase ) );
+            Vec_VecPushInt( p->vReg2Value, f, Abc_Var2Lit( Aig_ObjPioNum(pObjLi) - Saig_ManPoNum(p->pAig), Abc_LitIsCompl(Lit) ^ !pObjFrame->fPhase ) );
         }
     }
     // print statistics
diff --git a/src/aig/saig/saigAbsPba.c b/src/aig/saig/saigAbsPba.c
index a42515f3..3c9de875 100644
--- a/src/aig/saig/saigAbsPba.c
+++ b/src/aig/saig/saigAbsPba.c
@@ -19,9 +19,9 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
-#include "giaAig.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/aig/gia/giaAig.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -99,8 +99,8 @@ Aig_Man_t * Saig_ManUnrollForPba( Aig_Man_t * pAig, int nStart, int nFrames, Vec
     }
     // derive unrolled timeframes
     pFrames = Aig_ManStart( 10000 );
-    pFrames->pName = Aig_UtilStrsav( pAig->pName );
-    pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+    pFrames->pName = Abc_UtilStrsav( pAig->pName );
+    pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
     // create activation variables
     Saig_ManForEachLo( pAig, pObj, i )
         Aig_ObjCreatePi( pFrames );
@@ -186,19 +186,19 @@ Abc_Cex_t * Saig_ManPbaDeriveCex( Aig_Man_t * pAig, sat_solver * pSat, Cnf_Dat_t
         {
             int iSatVar = pCnf->pVarNums[ Aig_ObjId(Aig_ManPi(pCnf->pMan, Entry)) ];
             if ( sat_solver_var_value( pSat, iSatVar ) )
-                Aig_InfoSetBit( pCex->pData, Aig_ManRegNum(pAig) + i );
+                Abc_InfoSetBit( pCex->pData, Aig_ManRegNum(pAig) + i );
         }
     }
     // check what frame has failed
     Aig_ManCleanMarkB(pAig);
     Aig_ManConst1(pAig)->fMarkB = 1;
     Saig_ManForEachLo( pAig, pObj, i )
-        pObj->fMarkB = Aig_InfoHasBit(pCex->pData, iBit++);
+        pObj->fMarkB = Abc_InfoHasBit(pCex->pData, iBit++);
     for ( f = 0; f < nFrames; f++ )
     {
         // compute new state
         Saig_ManForEachPi( pAig, pObj, i )
-            pObj->fMarkB = Aig_InfoHasBit(pCex->pData, iBit++);
+            pObj->fMarkB = Abc_InfoHasBit(pCex->pData, iBit++);
         Aig_ManForEachNode( pAig, pObj, i )
             pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) & 
                            (Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj));
diff --git a/src/aig/saig/saigAbsStart.c b/src/aig/saig/saigAbsStart.c
index 71ef98d5..a5ec7dac 100644
--- a/src/aig/saig/saigAbsStart.c
+++ b/src/aig/saig/saigAbsStart.c
@@ -19,10 +19,10 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "ssw.h"
-#include "fra.h"
-#include "bbr.h"
-#include "pdr.h"
+#include "src/proof/ssw/ssw.h"
+#include "src/proof/fra/fra.h"
+#include "src/proof/bbr/bbr.h"
+#include "src/proof/pdr/pdr.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/saig/saigAbsVfa.c b/src/aig/saig/saigAbsVfa.c
index 4226ba51..c3243b0e 100644
--- a/src/aig/saig/saigAbsVfa.c
+++ b/src/aig/saig/saigAbsVfa.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/saig/saigBmc.c b/src/aig/saig/saigBmc.c
index 011a746e..814c445f 100644
--- a/src/aig/saig/saigBmc.c
+++ b/src/aig/saig/saigBmc.c
@@ -19,9 +19,9 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "fra.h"
-#include "cnf.h"
-#include "satStore.h"
+#include "src/proof/fra/fra.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satStore.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -167,7 +167,7 @@ Aig_Man_t * Saig_ManFramesBmcLimit( Aig_Man_t * pAig, int nFrames, int nSizeMax
 
 ABC_NAMESPACE_IMPL_END
 
-#include "utilMem.h"
+#include "src/misc/util/utilMem.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/saig/saigBmc2.c b/src/aig/saig/saigBmc2.c
index 169b9404..2586a457 100644
--- a/src/aig/saig/saigBmc2.c
+++ b/src/aig/saig/saigBmc2.c
@@ -19,9 +19,9 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "cnf.h"
-#include "satStore.h"
-#include "ssw.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satStore.h"
+#include "src/proof/ssw/ssw.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -180,8 +180,8 @@ Vec_Ptr_t * Abs_ManTernarySimulate( Aig_Man_t * p, int nFramesMax, int fVerbose
     assert( Aig_ManRegNum(p) > 0 );
     // the maximum number of frames will be determined to use at most 200Mb of RAM
     nFramesLimit = 1 + (200000000 * 4)/Aig_ManObjNum(p);
-    nFramesLimit = ABC_MIN( nFramesLimit, nFramesMax );
-    nFrameWords  = Aig_BitWordNum( 2 * Aig_ManObjNum(p) );
+    nFramesLimit = Abc_MinInt( nFramesLimit, nFramesMax );
+    nFrameWords  = Abc_BitWordNum( 2 * Aig_ManObjNum(p) );
     // allocate simulation info
     vSimInfo = Vec_PtrAlloc( nFramesLimit );
     for ( f = 0; f < nFramesLimit; f++ )
@@ -652,7 +652,7 @@ Abc_Cex_t * Saig_BmcGenerateCounterExample( Saig_Bmc_t * p )
             if ( iVarNum == 0 )
                 continue;
             if ( sat_solver_var_value( p->pSat, iVarNum ) )
-                Aig_InfoSetBit( pCex->pData, pCex->nRegs + Saig_ManPiNum(p->pAig) * f + i );
+                Abc_InfoSetBit( pCex->pData, pCex->nRegs + Saig_ManPiNum(p->pAig) * f + i );
         }
     }
     // verify the counter example
diff --git a/src/aig/saig/saigBmc3.c b/src/aig/saig/saigBmc3.c
index 2035ac72..27393f32 100644
--- a/src/aig/saig/saigBmc3.c
+++ b/src/aig/saig/saigBmc3.c
@@ -19,9 +19,9 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "fra.h"
-#include "cnf.h"
-#include "satStore.h"
+#include "src/proof/fra/fra.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satStore.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -130,7 +130,7 @@ unsigned * Saig_ManBmcTerSimOne( Aig_Man_t * p, unsigned * pPrev )
     Aig_Obj_t * pObj, * pObjLi;
     unsigned * pInfo;
     int i, Val0, Val1;
-    pInfo = ABC_CALLOC( unsigned, Aig_BitWordNum(2 * Aig_ManObjNumMax(p)) );
+    pInfo = ABC_CALLOC( unsigned, Abc_BitWordNum(2 * Aig_ManObjNumMax(p)) );
     Saig_ManBmcSimInfoSet( pInfo, Aig_ManConst1(p), SAIG_TER_ONE );
     Saig_ManForEachPi( p, pObj, i )
         Saig_ManBmcSimInfoSet( pInfo, pObj, SAIG_TER_UND );
@@ -1105,7 +1105,7 @@ int Saig_ManBmcScalable( Aig_Man_t * pAig, Saig_ParBmc_t * pPars )
     Gia_ManBmc_t * p;
     Aig_Obj_t * pObj;
     int RetValue = -1, fFirst = 1, nJumpFrame = 0, fUnfinished = 0;
-    int nOutDigits = Aig_Base10Log( Saig_ManPoNum(pAig) - Saig_ManConstrNum(pAig) );
+    int nOutDigits = Abc_Base10Log( Saig_ManPoNum(pAig) - Saig_ManConstrNum(pAig) );
     int i, f, Lit, status, clk, clk2, clkOther = 0, clkTotal = clock();
     int nTimeToStop = time(NULL) + pPars->nTimeOut;
     if ( pPars->fVerbose && Aig_ManConstrNum(pAig) > 0 )
diff --git a/src/aig/saig/saigCexMin.c b/src/aig/saig/saigCexMin.c
index 824f9eb3..f1826f50 100644
--- a/src/aig/saig/saigCexMin.c
+++ b/src/aig/saig/saigCexMin.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "ioa.h"
+#include "src/aig/ioa/ioa.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -151,18 +151,18 @@ void Saig_ManCexMinDerivePhasePriority_rec( Aig_Man_t * pAig, Aig_Obj_t * pObj )
         Saig_ManCexMinDerivePhasePriority_rec( pAig, Aig_ObjFanin1(pObj) );
         assert( Aig_ObjFanin0(pObj)->iData >= 0 );
         assert( Aig_ObjFanin1(pObj)->iData >= 0 );
-        fPhase0 = Aig_LitIsCompl( Aig_ObjFanin0(pObj)->iData ) ^ Aig_ObjFaninC0(pObj);
-        fPhase1 = Aig_LitIsCompl( Aig_ObjFanin1(pObj)->iData ) ^ Aig_ObjFaninC1(pObj);
-        iPrio0  = Aig_Lit2Var( Aig_ObjFanin0(pObj)->iData );
-        iPrio1  = Aig_Lit2Var( Aig_ObjFanin1(pObj)->iData );
+        fPhase0 = Abc_LitIsCompl( Aig_ObjFanin0(pObj)->iData ) ^ Aig_ObjFaninC0(pObj);
+        fPhase1 = Abc_LitIsCompl( Aig_ObjFanin1(pObj)->iData ) ^ Aig_ObjFaninC1(pObj);
+        iPrio0  = Abc_Lit2Var( Aig_ObjFanin0(pObj)->iData );
+        iPrio1  = Abc_Lit2Var( Aig_ObjFanin1(pObj)->iData );
         if ( fPhase0 && fPhase1 ) // both are one
-            pObj->iData = Aig_Var2Lit( Abc_MinInt(iPrio0, iPrio1), 1 );
+            pObj->iData = Abc_Var2Lit( Abc_MinInt(iPrio0, iPrio1), 1 );
         else if ( !fPhase0 && fPhase1 ) 
-            pObj->iData = Aig_Var2Lit( iPrio0, 0 );
+            pObj->iData = Abc_Var2Lit( iPrio0, 0 );
         else if ( fPhase0 && !fPhase1 )
-            pObj->iData = Aig_Var2Lit( iPrio1, 0 );
+            pObj->iData = Abc_Var2Lit( iPrio1, 0 );
         else // both are zero
-            pObj->iData = Aig_Var2Lit( Abc_MaxInt(iPrio0, iPrio1), 0 );
+            pObj->iData = Abc_Var2Lit( Abc_MaxInt(iPrio0, iPrio1), 0 );
     }
 }
 
@@ -183,7 +183,7 @@ void Saig_ManCexMinVerifyPhase( Aig_Man_t * pAig, Abc_Cex_t * pCex, int f )
     int i;
     Aig_ManConst1(pAig)->fPhase = 1;
     Saig_ManForEachPi( pAig, pObj, i )
-        pObj->fPhase = Aig_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + i);
+        pObj->fPhase = Abc_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + i);
     if ( f == 0 )
     {
         Saig_ManForEachLo( pAig, pObj, i )
@@ -266,7 +266,7 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority_( Aig_Man_t * pAig, Abc_Cex_t * p
     // set the constant node to higher priority than the flops
     vFramePPs = Vec_VecStart( pCex->iFrame+1 );
     nPrioOffset = (pCex->iFrame + 1) * pCex->nPis;
-    Aig_ManConst1(pAig)->iData = Aig_Var2Lit( nPrioOffset + pCex->nRegs, 1 );
+    Aig_ManConst1(pAig)->iData = Abc_Var2Lit( nPrioOffset + pCex->nRegs, 1 );
     vRoots = Vec_IntAlloc( 1000 );
 //printf( "Const1 = %d  Offset = %d\n", Aig_ManConst1(pAig)->iData, nPrioOffset ); 
     for ( f = 0; f <= pCex->iFrame; f++ )
@@ -280,9 +280,9 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority_( Aig_Man_t * pAig, Abc_Cex_t * p
         {
             assert( Aig_ObjIsPi(pObj) );
             if ( Saig_ObjIsPi(pAig, pObj) )
-                Vec_IntPush( vFramePPsOne, Aig_Var2Lit( (f+1) * pCex->nPis - nPiCount++, Aig_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj)) ) );
+                Vec_IntPush( vFramePPsOne, Abc_Var2Lit( (f+1) * pCex->nPis - nPiCount++, Abc_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj)) ) );
             else if ( f == 0 )
-                Vec_IntPush( vFramePPsOne, Aig_Var2Lit( nPrioOffset + Saig_ObjRegId(pAig, pObj), 0 ) );
+                Vec_IntPush( vFramePPsOne, Abc_Var2Lit( nPrioOffset + Saig_ObjRegId(pAig, pObj), 0 ) );
             else
             {
                 Aig_Obj_t * pObj0 = Saig_ObjLoToLi(pAig, pObj);
@@ -298,7 +298,7 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority_( Aig_Man_t * pAig, Abc_Cex_t * p
     Vec_IntFree( vRoots );
     // check the output
     pObj = Aig_ManPo( pAig, pCex->iPo );
-    assert( Aig_LitIsCompl(pObj->iData) );
+    assert( Abc_LitIsCompl(pObj->iData) );
     return vFramePPs;
 }
 
@@ -327,7 +327,7 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority( Aig_Man_t * pAig, Abc_Cex_t * pC
     // set the constant node to higher priority than the flops
     vFramePPs = Vec_VecStart( pCex->iFrame+1 );
     nPrioOffset = pCex->nRegs;
-    Aig_ManConst1(pAig)->iData = Aig_Var2Lit( nPrioOffset + (pCex->iFrame + 1) * pCex->nPis, 1 );
+    Aig_ManConst1(pAig)->iData = Abc_Var2Lit( nPrioOffset + (pCex->iFrame + 1) * pCex->nPis, 1 );
     vRoots = Vec_IntAlloc( 1000 );
 //printf( "Const1 = %d  Offset = %d\n", Aig_ManConst1(pAig)->iData, nPrioOffset ); 
     for ( f = 0; f <= pCex->iFrame; f++ )
@@ -341,9 +341,9 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority( Aig_Man_t * pAig, Abc_Cex_t * pC
         {
             assert( Aig_ObjIsPi(pObj) );
             if ( Saig_ObjIsPi(pAig, pObj) )
-                Vec_IntPush( vFramePPsOne, Aig_Var2Lit( nPrioOffset + (f+1) * pCex->nPis - 1 - nPiCount++, Aig_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj)) ) );
+                Vec_IntPush( vFramePPsOne, Abc_Var2Lit( nPrioOffset + (f+1) * pCex->nPis - 1 - nPiCount++, Abc_InfoHasBit(pCex->pData, pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj)) ) );
             else if ( f == 0 )
-                Vec_IntPush( vFramePPsOne, Aig_Var2Lit( Saig_ObjRegId(pAig, pObj), 0 ) );
+                Vec_IntPush( vFramePPsOne, Abc_Var2Lit( Saig_ObjRegId(pAig, pObj), 0 ) );
             else
             {
                 Aig_Obj_t * pObj0 = Saig_ObjLoToLi(pAig, pObj);
@@ -359,7 +359,7 @@ Vec_Vec_t * Saig_ManCexMinCollectPhasePriority( Aig_Man_t * pAig, Abc_Cex_t * pC
     Vec_IntFree( vRoots );
     // check the output
     pObj = Aig_ManPo( pAig, pCex->iPo );
-    assert( Aig_LitIsCompl(pObj->iData) );
+    assert( Abc_LitIsCompl(pObj->iData) );
     return vFramePPs;
 }
 
@@ -383,9 +383,9 @@ void Saig_ManCexMinCollectReason_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t
     if ( Aig_ObjIsPi(pObj) )
     {
         if ( fPiReason && Saig_ObjIsPi(p, pObj) )
-            Vec_IntPush( vReason, Aig_Var2Lit( Aig_ObjPioNum(pObj), !Aig_LitIsCompl(pObj->iData) ) );
+            Vec_IntPush( vReason, Abc_Var2Lit( Aig_ObjPioNum(pObj), !Abc_LitIsCompl(pObj->iData) ) );
         else if ( !fPiReason && Saig_ObjIsLo(p, pObj) )
-            Vec_IntPush( vReason, Aig_Var2Lit( Saig_ObjRegId(p, pObj), !Aig_LitIsCompl(pObj->iData) ) );
+            Vec_IntPush( vReason, Abc_Var2Lit( Saig_ObjRegId(p, pObj), !Abc_LitIsCompl(pObj->iData) ) );
         return;
     }
     if ( Aig_ObjIsPo(pObj) )
@@ -396,18 +396,18 @@ void Saig_ManCexMinCollectReason_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t
     if ( Aig_ObjIsConst1(pObj) )
         return;
     assert( Aig_ObjIsNode(pObj) );
-    if ( Aig_LitIsCompl(pObj->iData) ) // value 1
+    if ( Abc_LitIsCompl(pObj->iData) ) // value 1
     {
-        int fPhase0 = Aig_LitIsCompl( Aig_ObjFanin0(pObj)->iData ) ^ Aig_ObjFaninC0(pObj);
-        int fPhase1 = Aig_LitIsCompl( Aig_ObjFanin1(pObj)->iData ) ^ Aig_ObjFaninC1(pObj);
+        int fPhase0 = Abc_LitIsCompl( Aig_ObjFanin0(pObj)->iData ) ^ Aig_ObjFaninC0(pObj);
+        int fPhase1 = Abc_LitIsCompl( Aig_ObjFanin1(pObj)->iData ) ^ Aig_ObjFaninC1(pObj);
         assert( fPhase0 && fPhase1 );
         Saig_ManCexMinCollectReason_rec( p, Aig_ObjFanin0(pObj), vReason, fPiReason );
         Saig_ManCexMinCollectReason_rec( p, Aig_ObjFanin1(pObj), vReason, fPiReason );
     }
     else
     {
-        int fPhase0 = Aig_LitIsCompl( Aig_ObjFanin0(pObj)->iData ) ^ Aig_ObjFaninC0(pObj);
-        int fPhase1 = Aig_LitIsCompl( Aig_ObjFanin1(pObj)->iData ) ^ Aig_ObjFaninC1(pObj);
+        int fPhase0 = Abc_LitIsCompl( Aig_ObjFanin0(pObj)->iData ) ^ Aig_ObjFaninC0(pObj);
+        int fPhase1 = Abc_LitIsCompl( Aig_ObjFanin1(pObj)->iData ) ^ Aig_ObjFaninC1(pObj);
         assert( !fPhase0 || !fPhase1 );
         if ( !fPhase0 && fPhase1 )
             Saig_ManCexMinCollectReason_rec( p, Aig_ObjFanin0(pObj), vReason, fPiReason );
@@ -415,8 +415,8 @@ void Saig_ManCexMinCollectReason_rec( Aig_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t
             Saig_ManCexMinCollectReason_rec( p, Aig_ObjFanin1(pObj), vReason, fPiReason );
         else 
         {
-            int iPrio0 = Aig_Lit2Var( Aig_ObjFanin0(pObj)->iData );
-            int iPrio1 = Aig_Lit2Var( Aig_ObjFanin1(pObj)->iData );
+            int iPrio0 = Abc_Lit2Var( Aig_ObjFanin0(pObj)->iData );
+            int iPrio1 = Abc_Lit2Var( Aig_ObjFanin1(pObj)->iData );
             if ( iPrio0 >= iPrio1 )
                 Saig_ManCexMinCollectReason_rec( p, Aig_ObjFanin0(pObj), vReason, fPiReason );
             else
@@ -514,7 +514,7 @@ Aig_Man_t * Saig_ManCexMinDupWithCubes( Aig_Man_t * pAig, Vec_Vec_t * vReg2Value
     assert( pAig->nConstrs == 0 );
     // start the new manager
     pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) + Vec_VecSizeSize(vReg2Value) + Vec_VecSize(vReg2Value) );
-    pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+    pAigNew->pName = Abc_UtilStrsav( pAig->pName );
     // map the constant node
     Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
     // create variables for PIs
@@ -532,8 +532,8 @@ Aig_Man_t * Saig_ManCexMinDupWithCubes( Aig_Man_t * pAig, Vec_Vec_t * vReg2Value
         Vec_IntForEachEntry( vLevel, Lit, k )
         {
             assert( Lit >= 0 && Lit < 2 * Aig_ManRegNum(pAig) );
-            pObj = Saig_ManLi( pAig, Aig_Lit2Var(Lit) );
-            pMiter = Aig_And( pAigNew, pMiter, Aig_NotCond(Aig_ObjChild0Copy(pObj), Aig_LitIsCompl(Lit)) );
+            pObj = Saig_ManLi( pAig, Abc_Lit2Var(Lit) );
+            pMiter = Aig_And( pAigNew, pMiter, Aig_NotCond(Aig_ObjChild0Copy(pObj), Abc_LitIsCompl(Lit)) );
         }
         Aig_ObjCreatePo( pAigNew, pMiter );
     }
diff --git a/src/aig/saig/saigConstr.c b/src/aig/saig/saigConstr.c
index d58074e3..91bdf46f 100644
--- a/src/aig/saig/saigConstr.c
+++ b/src/aig/saig/saigConstr.c
@@ -19,10 +19,10 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
-#include "kit.h"
-#include "ioa.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/bool/kit/kit.h"
+#include "src/aig/ioa/ioa.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -64,7 +64,7 @@ Aig_Man_t * Saig_ManDupUnfoldConstrs( Aig_Man_t * pAig )
     }
     // start the new manager
     pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
-    pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+    pAigNew->pName = Abc_UtilStrsav( pAig->pName );
     // map the constant node
     Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
     // create variables for PIs
@@ -113,7 +113,7 @@ Aig_Man_t * Saig_ManDupFoldConstrs( Aig_Man_t * pAig, Vec_Int_t * vConstrs )
     assert( Saig_ManRegNum(pAig) > 0 );
     // start the new manager
     pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
-    pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+    pAigNew->pName = Abc_UtilStrsav( pAig->pName );
     // map the constant node
     Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
     // create variables for PIs
diff --git a/src/aig/saig/saigConstr2.c b/src/aig/saig/saigConstr2.c
index 7f2eab6a..e60d1b82 100644
--- a/src/aig/saig/saigConstr2.c
+++ b/src/aig/saig/saigConstr2.c
@@ -19,10 +19,10 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
-#include "kit.h"
-#include "bar.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/bool/kit/kit.h"
+#include "src/misc/bar/bar.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -244,8 +244,8 @@ Aig_Man_t * Saig_ManCreateIndMiter( Aig_Man_t * pAig, Vec_Vec_t * vCands )
 
     // start the fraig package
     pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFrames );
-    pFrames->pName = Aig_UtilStrsav( pAig->pName );
-    pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+    pFrames->pName = Abc_UtilStrsav( pAig->pName );
+    pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
     // map constant nodes
     for ( f = 0; f < nFrames; f++ )
         Aig_ObjSetFrames( pObjMap, nFrames, Aig_ManConst1(pAig), f, Aig_ManConst1(pFrames) );
@@ -437,8 +437,8 @@ Aig_Man_t * Saig_ManUnrollCOI( Aig_Man_t * pAig, int nFrames )
     pObjMap = ABC_CALLOC( Aig_Obj_t *, nFrames * Aig_ManObjNumMax(pAig) );
     // start the fraig package
     pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFrames );
-    pFrames->pName = Aig_UtilStrsav( pAig->pName );
-    pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+    pFrames->pName = Abc_UtilStrsav( pAig->pName );
+    pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
     // map constant nodes
     for ( f = 0; f < nFrames; f++ )
         Aig_ObjSetFrames( pObjMap, nFrames, Aig_ManConst1(pAig), f, Aig_ManConst1(pFrames) );
@@ -504,8 +504,8 @@ void Saig_CollectSatValues( sat_solver * pSat, Cnf_Dat_t * pCnf, Vec_Ptr_t * vIn
             continue;
         assert( pCnf->pVarNums[i] > 0 );
         pInfo = (unsigned *)Vec_PtrEntry( vInfo, i );
-        if ( Aig_InfoHasBit(pInfo, *piPat) != sat_solver_var_value(pSat, pCnf->pVarNums[i]) )
-            Aig_InfoXorBit(pInfo, *piPat);
+        if ( Abc_InfoHasBit(pInfo, *piPat) != sat_solver_var_value(pSat, pCnf->pVarNums[i]) )
+            Abc_InfoXorBit(pInfo, *piPat);
     }
 }
 
@@ -949,8 +949,8 @@ Aig_Man_t * Saig_ManDupFoldConstrsFunc( Aig_Man_t * pAig, int fCompl, int fVerbo
     assert( Aig_ManConstrNum(pAig) < Saig_ManPoNum(pAig) );
     // start the new manager
     pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
-    pAigNew->pName = Aig_UtilStrsav( pAig->pName );
-    pAigNew->pSpec = Aig_UtilStrsav( pAig->pSpec );
+    pAigNew->pName = Abc_UtilStrsav( pAig->pName );
+    pAigNew->pSpec = Abc_UtilStrsav( pAig->pSpec );
     // map the constant node
     Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
     // create variables for PIs
diff --git a/src/aig/saig/saigDup.c b/src/aig/saig/saigDup.c
index ca06398c..fa915f52 100644
--- a/src/aig/saig/saigDup.c
+++ b/src/aig/saig/saigDup.c
@@ -54,7 +54,7 @@ Aig_Man_t * Saig_ManDupOrpos( Aig_Man_t * pAig )
     }
     // start the new manager
     pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
-    pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+    pAigNew->pName = Abc_UtilStrsav( pAig->pName );
     pAigNew->nConstrs = pAig->nConstrs;
     // map the constant node
     Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
@@ -100,7 +100,7 @@ Aig_Man_t * Saig_ManCreateEquivMiter( Aig_Man_t * pAig, Vec_Int_t * vPairs )
     }
     // start the new manager
     pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
-    pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+    pAigNew->pName = Abc_UtilStrsav( pAig->pName );
     pAigNew->nConstrs = pAig->nConstrs;
     // map the constant node
     Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
@@ -150,7 +150,7 @@ Aig_Man_t * Saig_ManTrimPis( Aig_Man_t * p )
             fAllPisHaveNoRefs = 0;
     // start the new manager
     pNew = Aig_ManStart( Aig_ManObjNum(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     pNew->nConstrs = p->nConstrs;
     // start mapping of the CI numbers
     pNew->vCiNumsOrig = Vec_IntAlloc( Aig_ManPiNum(p) );
@@ -210,7 +210,7 @@ Aig_Man_t * Saig_ManDupAbstraction( Aig_Man_t * p, Vec_Int_t * vFlops )
     Aig_ManCleanData( p );
     // start the new manager
     pNew = Aig_ManStart( 5000 );
-    pNew->pName = Aig_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     // map the constant node
     Aig_ManConst1(p)->pData = Aig_ManConst1( pNew );
     // label included flops
@@ -283,11 +283,11 @@ int Saig_ManVerifyCex( Aig_Man_t * pAig, Abc_Cex_t * p )
     Aig_ManCleanMarkB(pAig);
     Aig_ManConst1(pAig)->fMarkB = 1;
     Saig_ManForEachLo( pAig, pObj, i )
-        pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
+        pObj->fMarkB = Abc_InfoHasBit(p->pData, iBit++);
     for ( i = 0; i <= p->iFrame; i++ )
     {
         Saig_ManForEachPi( pAig, pObj, k )
-            pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
+            pObj->fMarkB = Abc_InfoHasBit(p->pData, iBit++);
         Aig_ManForEachNode( pAig, pObj, k )
             pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) & 
                            (Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj));
@@ -328,15 +328,15 @@ Abc_Cex_t * Saig_ManExtendCex( Aig_Man_t * pAig, Abc_Cex_t * p )
     Aig_ManCleanMarkB(pAig);
     Aig_ManConst1(pAig)->fMarkB = 1;
     Saig_ManForEachLo( pAig, pObj, i )
-        pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
+        pObj->fMarkB = Abc_InfoHasBit(p->pData, iBit++);
     for ( i = 0; i <= p->iFrame; i++ )
     {
         Saig_ManForEachPi( pAig, pObj, k )
-            pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
+            pObj->fMarkB = Abc_InfoHasBit(p->pData, iBit++);
         ///////// write PI+LO values ////////////
         Aig_ManForEachPi( pAig, pObj, k )
             if ( pObj->fMarkB )
-                Aig_InfoSetBit(pNew->pData, Aig_ManPiNum(pAig)*i + k);
+                Abc_InfoSetBit(pNew->pData, Aig_ManPiNum(pAig)*i + k);
         /////////////////////////////////////////
         Aig_ManForEachNode( pAig, pObj, k )
             pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) & 
@@ -374,11 +374,11 @@ int Saig_ManFindFailedPoCex( Aig_Man_t * pAig, Abc_Cex_t * p )
     Aig_ManCleanMarkB(pAig);
     Aig_ManConst1(pAig)->fMarkB = 1;
     Saig_ManForEachLo( pAig, pObj, i )
-        pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
+        pObj->fMarkB = Abc_InfoHasBit(p->pData, iBit++);
     for ( i = 0; i <= p->iFrame; i++ )
     {
         Saig_ManForEachPi( pAig, pObj, k )
-            pObj->fMarkB = Aig_InfoHasBit(p->pData, iBit++);
+            pObj->fMarkB = Abc_InfoHasBit(p->pData, iBit++);
         Aig_ManForEachNode( pAig, pObj, k )
             pObj->fMarkB = (Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj)) & 
                            (Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj));
@@ -421,7 +421,7 @@ Aig_Man_t * Saig_ManDupWithPhase( Aig_Man_t * pAig, Vec_Int_t * vInit )
     assert( Aig_ManRegNum(pAig) <= Vec_IntSize(vInit) );
     // start the new manager
     pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
-    pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+    pAigNew->pName = Abc_UtilStrsav( pAig->pName );
     pAigNew->nConstrs = pAig->nConstrs;
     // map the constant node
     Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
diff --git a/src/aig/saig/saigGlaCba.c b/src/aig/saig/saigGlaCba.c
index d5a94acb..d6af6e47 100644
--- a/src/aig/saig/saigGlaCba.c
+++ b/src/aig/saig/saigGlaCba.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "satSolver.h"
-#include "cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/cnf/cnf.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -250,7 +250,7 @@ Aig_Man_t * Aig_Gla1DeriveAbs( Aig_Gla1Man_t * p )
     assert( Saig_ManPoNum(p->pAig) == 1 );
     // start the new manager
     pNew = Aig_ManStart( 5000 );
-    pNew->pName = Aig_UtilStrsav( p->pAig->pName );
+    pNew->pName = Abc_UtilStrsav( p->pAig->pName );
     // create constant
     Aig_ManCleanData( p->pAig );
     Aig_ManConst1(p->pAig)->pData = Aig_ManConst1(pNew);
@@ -596,7 +596,7 @@ Abc_Cex_t * Aig_Gla1DeriveCex( Aig_Gla1Man_t * p, int iFrame )
                 continue;
             assert( iSatId > 0 );
             if ( sat_solver_var_value(p->pSat, iSatId) )
-                Aig_InfoSetBit( pCex->pData, pCex->nRegs + f * pCex->nPis + i );
+                Abc_InfoSetBit( pCex->pData, pCex->nRegs + f * pCex->nPis + i );
         }
     }
     Aig_ManForEachObjVec( p->vPPis, p->pAig, pObj, i )
@@ -610,7 +610,7 @@ Abc_Cex_t * Aig_Gla1DeriveCex( Aig_Gla1Man_t * p, int iFrame )
                 continue;
             assert( iSatId > 0 );
             if ( sat_solver_var_value(p->pSat, iSatId) )
-                Aig_InfoSetBit( pCex->pData, pCex->nRegs + f * pCex->nPis + Vec_IntSize(p->vPis) + i );
+                Abc_InfoSetBit( pCex->pData, pCex->nRegs + f * pCex->nPis + Vec_IntSize(p->vPis) + i );
         }
     }
     return pCex;
diff --git a/src/aig/saig/saigGlaPba.c b/src/aig/saig/saigGlaPba.c
index cdbc05c7..c22cf415 100644
--- a/src/aig/saig/saigGlaPba.c
+++ b/src/aig/saig/saigGlaPba.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
  
 #include "saig.h"
-#include "satSolver.h"
-#include "satStore.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/bsat/satStore.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/saig/saigGlaPba2.c b/src/aig/saig/saigGlaPba2.c
index 1daea5d9..8bc2b982 100644
--- a/src/aig/saig/saigGlaPba2.c
+++ b/src/aig/saig/saigGlaPba2.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
  
 #include "saig.h"
-#include "satSolver2.h"
+#include "src/sat/bsat/satSolver2.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/saig/saigHaig.c b/src/aig/saig/saigHaig.c
index 3ea0a2c6..ee058a3c 100644
--- a/src/aig/saig/saigHaig.c
+++ b/src/aig/saig/saigHaig.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "satSolver.h"
-#include "cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/cnf/cnf.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -101,8 +101,8 @@ Aig_Man_t * Aig_ManHaigFrames( Aig_Man_t * pHaig, int nFrames )
     assert( nFrames == 1 || Saig_ManRegNum(pHaig) > 0 );
     // start AIG manager for timeframes
     pFrames = Aig_ManStart( Aig_ManNodeNum(pHaig) * nFrames );
-    pFrames->pName = Aig_UtilStrsav( pHaig->pName );
-    pFrames->pSpec = Aig_UtilStrsav( pHaig->pSpec );
+    pFrames->pName = Abc_UtilStrsav( pHaig->pName );
+    pFrames->pSpec = Abc_UtilStrsav( pHaig->pSpec );
     // map the constant node
     Aig_ManConst1(pHaig)->pData = Aig_ManConst1( pFrames );
     // create variables for register outputs
diff --git a/src/aig/saig/saigInd.c b/src/aig/saig/saigInd.c
index 190d8d25..c9043ba2 100644
--- a/src/aig/saig/saigInd.c
+++ b/src/aig/saig/saigInd.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -324,7 +324,7 @@ nextrun:
                 Vec_IntForEachEntryStart( vTopVarIds, VarNum, i, 1 )
                 {
                     if ( VarNum >= 0 && sat_solver_var_value( pSat, VarNum ) )
-                        Aig_InfoSetBit( pCex->pData, iBit );
+                        Abc_InfoSetBit( pCex->pData, iBit );
                     iBit++;
                 }
                 assert( iBit == pCex->nBits );
diff --git a/src/aig/saig/saigIoa.c b/src/aig/saig/saigIoa.c
index c84c37f3..bdd187d9 100644
--- a/src/aig/saig/saigIoa.c
+++ b/src/aig/saig/saigIoa.c
@@ -47,15 +47,15 @@ char * Saig_ObjName( Aig_Man_t * p, Aig_Obj_t * pObj )
 {
     static char Buffer[16];
     if ( Aig_ObjIsNode(pObj) || Aig_ObjIsConst1(pObj) )
-        sprintf( Buffer, "n%0*d", Aig_Base10Log(Aig_ManObjNumMax(p)), Aig_ObjId(pObj) );
+        sprintf( Buffer, "n%0*d", Abc_Base10Log(Aig_ManObjNumMax(p)), Aig_ObjId(pObj) );
     else if ( Saig_ObjIsPi(p, pObj) )
-        sprintf( Buffer, "pi%0*d", Aig_Base10Log(Saig_ManPiNum(p)), Aig_ObjPioNum(pObj) );
+        sprintf( Buffer, "pi%0*d", Abc_Base10Log(Saig_ManPiNum(p)), Aig_ObjPioNum(pObj) );
     else if ( Saig_ObjIsPo(p, pObj) )
-        sprintf( Buffer, "po%0*d", Aig_Base10Log(Saig_ManPoNum(p)), Aig_ObjPioNum(pObj) );
+        sprintf( Buffer, "po%0*d", Abc_Base10Log(Saig_ManPoNum(p)), Aig_ObjPioNum(pObj) );
     else if ( Saig_ObjIsLo(p, pObj) )
-        sprintf( Buffer, "lo%0*d", Aig_Base10Log(Saig_ManRegNum(p)), Aig_ObjPioNum(pObj) - Saig_ManPiNum(p) );
+        sprintf( Buffer, "lo%0*d", Abc_Base10Log(Saig_ManRegNum(p)), Aig_ObjPioNum(pObj) - Saig_ManPiNum(p) );
     else if ( Saig_ObjIsLi(p, pObj) )
-        sprintf( Buffer, "li%0*d", Aig_Base10Log(Saig_ManRegNum(p)), Aig_ObjPioNum(pObj) - Saig_ManPoNum(p) );
+        sprintf( Buffer, "li%0*d", Abc_Base10Log(Saig_ManRegNum(p)), Aig_ObjPioNum(pObj) - Saig_ManPoNum(p) );
     else 
         assert( 0 );
     return Buffer;
@@ -268,8 +268,8 @@ Aig_Man_t * Saig_ManReadBlif( char * pFileName )
         { printf( "Saig_ManReadBlif(): Error 2.\n" ); return NULL; }
     // start the package
     p = Aig_ManStart( 10000 );
-    p->pName = Aig_UtilStrsav( pToken );
-    p->pSpec = Aig_UtilStrsav( pFileName );
+    p->pName = Abc_UtilStrsav( pToken );
+    p->pSpec = Abc_UtilStrsav( pFileName );
     // count PIs
     pToken = Saig_ManReadToken( pFile );
     if ( pToken == NULL || strcmp( pToken, ".inputs" ) ) 
diff --git a/src/aig/saig/saigMiter.c b/src/aig/saig/saigMiter.c
index c50eaac5..20dbeec7 100644
--- a/src/aig/saig/saigMiter.c
+++ b/src/aig/saig/saigMiter.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "fra.h"
+#include "src/proof/fra/fra.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -106,7 +106,7 @@ Aig_Man_t * Saig_ManCreateMiter( Aig_Man_t * p0, Aig_Man_t * p1, int Oper )
     assert( Saig_ManPiNum(p0) == Saig_ManPiNum(p1) );
     assert( Saig_ManPoNum(p0) == Saig_ManPoNum(p1) );
     pNew = Aig_ManStart( Aig_ManObjNumMax(p0) + Aig_ManObjNumMax(p1) );
-    pNew->pName = Aig_UtilStrsav( "miter" );
+    pNew->pName = Abc_UtilStrsav( "miter" );
     Aig_ManCleanData( p0 );
     Aig_ManCleanData( p1 );
     // map constant nodes
@@ -168,7 +168,7 @@ Aig_Man_t * Saig_ManCreateMiterComb( Aig_Man_t * p0, Aig_Man_t * p1, int Oper )
     assert( Aig_ManPiNum(p0) == Aig_ManPiNum(p1) );
     assert( Aig_ManPoNum(p0) == Aig_ManPoNum(p1) );
     pNew = Aig_ManStart( Aig_ManObjNumMax(p0) + Aig_ManObjNumMax(p1) );
-    pNew->pName = Aig_UtilStrsav( "miter" );
+    pNew->pName = Abc_UtilStrsav( "miter" );
     // map constant nodes
     Aig_ManConst1(p0)->pData = Aig_ManConst1(pNew);
     Aig_ManConst1(p1)->pData = Aig_ManConst1(pNew);
@@ -246,8 +246,8 @@ Aig_Man_t * Saig_ManDualRail( Aig_Man_t * p, int fMiter )
     Aig_ManCleanNext( p );
     // create the new manager
     pNew = Aig_ManStart( 4*Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // create the PIs 
     Aig_ManConst1(p)->pData = Aig_ManConst0(pNew);
     Aig_ManConst1(p)->pNext = Aig_ManConst1(pNew);
@@ -331,8 +331,8 @@ Aig_Man_t * Saig_ManUnrollTwo( Aig_Man_t * pBot, Aig_Man_t * pTop, int nFrames )
     assert( Saig_ManRegNum(pBot) == Saig_ManRegNum(pTop) );
     assert( Saig_ManRegNum(pBot) > 0 || Saig_ManRegNum(pTop) > 0 );
     // start timeframes
-    p = Aig_ManStart( nFrames * ABC_MAX(Aig_ManObjNumMax(pBot), Aig_ManObjNumMax(pTop)) );
-    p->pName = Aig_UtilStrsav( "frames" );
+    p = Aig_ManStart( nFrames * Abc_MaxInt(Aig_ManObjNumMax(pBot), Aig_ManObjNumMax(pTop)) );
+    p->pName = Abc_UtilStrsav( "frames" );
     // create variables for register outputs
     pAig = pBot;
     Saig_ManForEachLo( pAig, pObj, i )
@@ -392,7 +392,7 @@ Aig_Man_t * Aig_ManDupNodesAll( Aig_Man_t * p, Vec_Ptr_t * vSet )
     Aig_Obj_t * pObj;
     int i;
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Aig_ManForEachPi( p, pObj, i )
         pObj->pData = Aig_ObjCreatePi( pNew );
@@ -430,7 +430,7 @@ Aig_Man_t * Aig_ManDupNodesHalf( Aig_Man_t * p, Vec_Ptr_t * vSet, int iPart )
     int i;
     Aig_ManCleanData( p );
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Saig_ManForEachPi( p, pObj, i )
         pObj->pData = Aig_ObjCreatePi( pNew );
@@ -534,13 +534,13 @@ int Saig_ManDemiterSimple( Aig_Man_t * p, Aig_Man_t ** ppAig0, Aig_Man_t ** ppAi
     {
         *ppAig0 = Aig_ManDupNodesHalf( p, vSet0, 0 );
         ABC_FREE( (*ppAig0)->pName );
-        (*ppAig0)->pName = Aig_UtilStrsav( "part0" );
+        (*ppAig0)->pName = Abc_UtilStrsav( "part0" );
     }
     if ( ppAig1 )
     {
         *ppAig1 = Aig_ManDupNodesHalf( p, vSet1, 1 );
         ABC_FREE( (*ppAig1)->pName );
-        (*ppAig1)->pName = Aig_UtilStrsav( "part1" );
+        (*ppAig1)->pName = Abc_UtilStrsav( "part1" );
     }
     Vec_PtrFree( vSet0 );
     Vec_PtrFree( vSet1 );
@@ -682,11 +682,11 @@ int Saig_ManDemiterSimpleDiff( Aig_Man_t * p, Aig_Man_t ** ppAig0, Aig_Man_t **
     // create new AIG
     *ppAig0 = Aig_ManDupNodesHalf( p, vSet0, 0 );
     ABC_FREE( (*ppAig0)->pName );
-    (*ppAig0)->pName = Aig_UtilStrsav( "part0" );
+    (*ppAig0)->pName = Abc_UtilStrsav( "part0" );
     // create new AIGs
     *ppAig1 = Aig_ManDupNodesHalf( p, vSet1, 1 );
     ABC_FREE( (*ppAig1)->pName );
-    (*ppAig1)->pName = Aig_UtilStrsav( "part1" );
+    (*ppAig1)->pName = Abc_UtilStrsav( "part1" );
     // cleanup
     Vec_PtrFree( vSet0 );
     Vec_PtrFree( vSet1 );
@@ -812,13 +812,13 @@ int Saig_ManDemiterSimpleDiff_old( Aig_Man_t * p, Aig_Man_t ** ppAig0, Aig_Man_t
     {
         *ppAig0 = Aig_ManDupNodesAll( p, vSet0 );
         ABC_FREE( (*ppAig0)->pName );
-        (*ppAig0)->pName = Aig_UtilStrsav( "part0" );
+        (*ppAig0)->pName = Abc_UtilStrsav( "part0" );
     }
     if ( ppAig1 )
     {
         *ppAig1 = Aig_ManDupNodesAll( p, vSet1 );
         ABC_FREE( (*ppAig1)->pName );
-        (*ppAig1)->pName = Aig_UtilStrsav( "part1" );
+        (*ppAig1)->pName = Abc_UtilStrsav( "part1" );
     }
     Vec_PtrFree( vSet0 );
     Vec_PtrFree( vSet1 );
@@ -984,14 +984,14 @@ int Saig_ManDemiter( Aig_Man_t * p, Aig_Man_t ** ppAig0, Aig_Man_t ** ppAig1 )
         assert( 0 );
         *ppAig0 = Aig_ManDupNodesHalf( p, vSet0, 0 ); // not ready
         ABC_FREE( (*ppAig0)->pName );
-        (*ppAig0)->pName = Aig_UtilStrsav( "part0" );
+        (*ppAig0)->pName = Abc_UtilStrsav( "part0" );
     }
     if ( ppAig1 )
     {
         assert( 0 );
         *ppAig1 = Aig_ManDupNodesHalf( p, vSet1, 1 ); // not ready
         ABC_FREE( (*ppAig1)->pName );
-        (*ppAig1)->pName = Aig_UtilStrsav( "part1" );
+        (*ppAig1)->pName = Abc_UtilStrsav( "part1" );
     }
     Vec_PtrFree( vSet0 );
     Vec_PtrFree( vSet1 );
diff --git a/src/aig/saig/saigOutDec.c b/src/aig/saig/saigOutDec.c
index d8cc591e..e72ea132 100644
--- a/src/aig/saig/saigOutDec.c
+++ b/src/aig/saig/saigOutDec.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -160,7 +160,7 @@ Aig_Man_t * Saig_ManDecPropertyOutput( Aig_Man_t * pAig, int nLits, int fVerbose
 
     // start the new manager
     pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
-    pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+    pAigNew->pName = Abc_UtilStrsav( pAig->pName );
     pAigNew->nConstrs = pAig->nConstrs;
     // map the constant node
     Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
@@ -180,7 +180,7 @@ Aig_Man_t * Saig_ManDecPropertyOutput( Aig_Man_t * pAig, int nLits, int fVerbose
         pMiter = Aig_ManConst1( pAigNew );
         Vec_IntForEachEntry( vCube, Lit, i )
         {
-            pObj = Aig_NotCond( Aig_ObjCopy(Aig_ManObj(pAig, Aig_Lit2Var(Lit))), Aig_LitIsCompl(Lit) );
+            pObj = Aig_NotCond( Aig_ObjCopy(Aig_ManObj(pAig, Abc_Lit2Var(Lit))), Abc_LitIsCompl(Lit) );
             pMiter = Aig_And( pAigNew, pMiter, pObj );
         }
         Aig_ObjCreatePo( pAigNew, pMiter );
diff --git a/src/aig/saig/saigPhase.c b/src/aig/saig/saigPhase.c
index bd7176fa..4107c5a2 100644
--- a/src/aig/saig/saigPhase.c
+++ b/src/aig/saig/saigPhase.c
@@ -145,10 +145,10 @@ Saig_Tsim_t * Saig_TsiStart( Aig_Man_t * pAig )
     p = (Saig_Tsim_t *)ABC_ALLOC( char, sizeof(Saig_Tsim_t) );
     memset( p, 0, sizeof(Saig_Tsim_t) );
     p->pAig    = pAig;
-    p->nWords  = Aig_BitWordNum( 2*Aig_ManRegNum(pAig) );
+    p->nWords  = Abc_BitWordNum( 2*Aig_ManRegNum(pAig) );
     p->vStates = Vec_PtrAlloc( 1000 );
     p->pMem    = Aig_MmFixedStart( sizeof(unsigned) * p->nWords + sizeof(unsigned *), 10000 );
-    p->nBins   = Aig_PrimeCudd(TSIM_MAX_ROUNDS/2);
+    p->nBins   = Abc_PrimeCudd(TSIM_MAX_ROUNDS/2);
     p->pBins   = ABC_ALLOC( unsigned *, p->nBins );
     memset( p->pBins, 0, sizeof(unsigned *) * p->nBins );
     return p;
@@ -233,7 +233,7 @@ int Saig_TsiCountNonXValuedRegisters( Saig_Tsim_t * p, int nPref )
     {
         Vec_PtrForEachEntryStart( unsigned *, p->vStates, pState, k, nPref )
         {
-            Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+            Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
             assert( Value != 0 );
             if ( Value == SAIG_XVSX )
                 break;
@@ -266,7 +266,7 @@ Vec_Int_t * Saig_TsiComputeTransient( Saig_Tsim_t * p, int nPref )
     {
         Vec_PtrForEachEntry( unsigned *, p->vStates, pState, k )
         {
-            ValueThis = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+            ValueThis = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
 //printf( "%s", (ValueThis == 1)? "0" : ((ValueThis == 2)? "1" : "x") );
             assert( ValueThis != 0 );
             if ( ValuePrev != ValueThis )
@@ -320,7 +320,7 @@ void Saig_TsiPrintTraces( Saig_Tsim_t * p, int nWords, int nPrefix, int nLoop )
 /*
         Vec_PtrForEachEntry( unsigned *, p->vStates, pState, k )
         {
-            Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+            Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
             if ( Value == SAIG_XVSX )
                 break;
         }
@@ -335,7 +335,7 @@ void Saig_TsiPrintTraces( Saig_Tsim_t * p, int nWords, int nPrefix, int nLoop )
         printf( "%5d : ", Counter++ );
         Vec_PtrForEachEntryStop( unsigned *, p->vStates, pState, k, Vec_PtrSize(p->vStates)-1 )
         {
-            Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+            Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
             if ( Value == SAIG_XVS0 )
                 printf( "0" );
             else if ( Value == SAIG_XVS1 )
@@ -458,7 +458,7 @@ void Saig_TsiStatePrint( Saig_Tsim_t * p, unsigned * pState )
     int i, Value, nZeros = 0, nOnes = 0, nDcs = 0;
     for ( i = 0; i < Aig_ManRegNum(p->pAig); i++ )
     {
-        Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+        Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
         if ( Value == SAIG_XVS0 )
             printf( "0" ), nZeros++;
         else if ( Value == SAIG_XVS1 )
@@ -488,7 +488,7 @@ int Saig_TsiStateCount( Saig_Tsim_t * p, unsigned * pState )
     int i, Value, nCounter = 0;
     Aig_ManForEachLiLoSeq( p->pAig, pObjLi, pObjLo, i )
     {
-        Value = (Aig_InfoHasBit( pState, 2 * i + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * i );
+        Value = (Abc_InfoHasBit( pState, 2 * i + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * i );
         nCounter += (Value == SAIG_XVS0 || Value == SAIG_XVS1);
     }
     return nCounter;
@@ -559,9 +559,9 @@ Saig_Tsim_t * Saig_ManReachableTernary( Aig_Man_t * p, Vec_Int_t * vInits, int f
         {
             Value = Saig_ObjGetXsim(pObjLo);
             if ( Value & 1 )
-                Aig_InfoSetBit( pState, 2 * i );
+                Abc_InfoSetBit( pState, 2 * i );
             if ( Value & 2 )
-                Aig_InfoSetBit( pState, 2 * i + 1 );
+                Abc_InfoSetBit( pState, 2 * i + 1 );
         }
 //        printf( "%d ", Saig_TsiStateCount(pTsi, pState) );
 //        Saig_TsiStatePrint( pTsi, pState );
@@ -679,7 +679,7 @@ int Saig_ManFindRegisters( Saig_Tsim_t * pTsi, int nFrames, int fIgnore, int fVe
                 pState = (unsigned *)Vec_PtrEntry( pTsi->vStates, k );
             else
                 pState = (unsigned *)Vec_PtrEntry( pTsi->vStates, k - pTsi->nCycle );
-            Value = (Aig_InfoHasBit( pState, 2 * Reg + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * Reg );
+            Value = (Abc_InfoHasBit( pState, 2 * Reg + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * Reg );
             assert( Value == SAIG_XVS0 || Value == SAIG_XVS1 );
             if ( k < nFrames || (fIgnore && k == nFrames) )
                 Values[k % nFrames] = Value;
@@ -761,8 +761,8 @@ Aig_Man_t * Saig_ManPerformAbstraction( Saig_Tsim_t * pTsi, int nFrames, int fVe
 
     // start the fraig package
     pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFrames );
-    pFrames->pName = Aig_UtilStrsav( pAig->pName );
-    pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+    pFrames->pName = Abc_UtilStrsav( pAig->pName );
+    pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
     // map constant nodes
     for ( f = 0; f < nFrames; f++ )
         Saig_ObjSetFrames( pObjMap, nFrames, Aig_ManConst1(pAig), f, Aig_ManConst1(pFrames) );
@@ -782,7 +782,7 @@ Aig_Man_t * Saig_ManPerformAbstraction( Saig_Tsim_t * pTsi, int nFrames, int fVe
         {
             pObj = Saig_ManLo( pAig, Reg );
             pState = (unsigned *)Vec_PtrEntry( pTsi->vStates, f );
-            Value = (Aig_InfoHasBit( pState, 2 * Reg + 1 ) << 1) | Aig_InfoHasBit( pState, 2 * Reg );
+            Value = (Abc_InfoHasBit( pState, 2 * Reg + 1 ) << 1) | Abc_InfoHasBit( pState, 2 * Reg );
             assert( Value == SAIG_XVS0 || Value == SAIG_XVS1 );
             pObjNew = (Value == SAIG_XVS1)? Aig_ManConst1(pFrames) : Aig_ManConst0(pFrames);
             Saig_ObjSetFrames( pObjMap, nFrames, pObj, f, pObjNew );
@@ -922,7 +922,7 @@ Aig_Man_t * Saig_ManPhaseAbstract( Aig_Man_t * p, Vec_Int_t * vInits, int nFrame
     // derive information
     pTsi->nPrefix = Saig_TsiComputePrefix( pTsi, (unsigned *)Vec_PtrEntryLast(pTsi->vStates), pTsi->nWords );
     pTsi->nCycle = Vec_PtrSize(pTsi->vStates) - 1 - pTsi->nPrefix;
-    pTsi->nNonXRegs = Saig_TsiCountNonXValuedRegisters(pTsi, ABC_MIN(pTsi->nPrefix,nPref));
+    pTsi->nNonXRegs = Saig_TsiCountNonXValuedRegisters(pTsi, Abc_MinInt(pTsi->nPrefix,nPref));
     // print statistics
     if ( fVerbose )
     {
@@ -1066,8 +1066,8 @@ Abc_Cex_t * Saig_PhaseTranslateCex( Aig_Man_t * p, Abc_Cex_t * pCex )
     pNew->iPo    = pCex->iPo % Saig_ManPoNum(p);
     // copy the bit data
     for ( i = pCex->nRegs, k = pNew->nRegs; k < pNew->nBits; k++, i++ )
-        if ( Aig_InfoHasBit( pCex->pData, i ) )
-            Aig_InfoSetBit( pNew->pData, k );
+        if ( Abc_InfoHasBit( pCex->pData, i ) )
+            Abc_InfoSetBit( pNew->pData, k );
     assert( i <= pCex->nBits );
     return pNew;
 }
diff --git a/src/aig/saig/saigRefSat.c b/src/aig/saig/saigRefSat.c
index b2ea80a6..1f862c1a 100644
--- a/src/aig/saig/saigRefSat.c
+++ b/src/aig/saig/saigRefSat.c
@@ -19,8 +19,8 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "cnf.h"
-#include "satSolver.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -95,13 +95,13 @@ Abc_Cex_t * Saig_RefManReason2Cex( Saig_RefMan_t * p, Vec_Int_t * vReasons )
     Abc_Cex_t * pCare;
     int i, Entry, iInput, iFrame;
     pCare = Abc_CexDup( p->pCex, p->pCex->nRegs );
-    memset( pCare->pData, 0, sizeof(unsigned) * Aig_BitWordNum(pCare->nBits) );
+    memset( pCare->pData, 0, sizeof(unsigned) * Abc_BitWordNum(pCare->nBits) );
     Vec_IntForEachEntry( vReasons, Entry, i )
     {
         assert( Entry >= 0 && Entry < Aig_ManPiNum(p->pFrames) );
         iInput = Vec_IntEntry( p->vMapPiF2A, 2*Entry );
         iFrame = Vec_IntEntry( p->vMapPiF2A, 2*Entry+1 );
-        Aig_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
+        Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
     }
     return pCare;
 }
@@ -181,7 +181,7 @@ Vec_Int_t * Saig_RefManFindReason( Saig_RefMan_t * p )
     {
         int iInput = Vec_IntEntry( p->vMapPiF2A, 2*i );
         int iFrame = Vec_IntEntry( p->vMapPiF2A, 2*i+1 );
-        pObj->fPhase = Aig_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
+        pObj->fPhase = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
         // assign priority
         if ( Vec_IntEntry(vPi2Prio, iInput) == ~0 )
             Vec_IntWriteEntry( vPi2Prio, iInput, CountPrios++ );
@@ -295,11 +295,11 @@ Aig_Man_t * Saig_ManUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nInpu
 
     // derive unrolled timeframes
     pFrames = Aig_ManStart( 10000 );
-    pFrames->pName = Aig_UtilStrsav( pAig->pName );
-    pFrames->pSpec = Aig_UtilStrsav( pAig->pSpec );
+    pFrames->pName = Abc_UtilStrsav( pAig->pName );
+    pFrames->pSpec = Abc_UtilStrsav( pAig->pSpec );
     // initialize the flops 
     Saig_ManForEachLo( pAig, pObj, i )
-        pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Aig_InfoHasBit(pCex->pData, i) );
+        pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Abc_InfoHasBit(pCex->pData, i) );
     // iterate through the frames
     for ( f = 0; f <= pCex->iFrame; f++ )
     {
@@ -318,7 +318,7 @@ Aig_Man_t * Saig_ManUnrollWithCex( Aig_Man_t * pAig, Abc_Cex_t * pCex, int nInpu
                 if ( Aig_ObjPioNum(pObj) < nInputs )
                 {
                     int iBit = pCex->nRegs + f * pCex->nPis + Aig_ObjPioNum(pObj);
-                    pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Aig_InfoHasBit(pCex->pData, iBit) );
+                    pObj->pData = Aig_NotCond( Aig_ManConst1(pFrames), !Abc_InfoHasBit(pCex->pData, iBit) );
                 }
                 else
                 {
@@ -409,9 +409,9 @@ int Saig_RefManSetPhases( Saig_RefMan_t * p, Abc_Cex_t * pCare, int fValue1 )
     {
         iInput = Vec_IntEntry( p->vMapPiF2A, 2*i );
         iFrame = Vec_IntEntry( p->vMapPiF2A, 2*i+1 );
-        pObj->fPhase = Aig_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
+        pObj->fPhase = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
         // update value if it is a don't-care
-        if ( pCare && !Aig_InfoHasBit( pCare->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput ) )
+        if ( pCare && !Abc_InfoHasBit( pCare->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput ) )
             pObj->fPhase = fValue1;
     }
     Aig_ManForEachNode( p->pFrames, pObj, i )
@@ -448,7 +448,7 @@ Vec_Vec_t * Saig_RefManOrderLiterals( Saig_RefMan_t * p, Vec_Int_t * vVar2PiId,
         assert( iPiNum >= 0 && iPiNum < Aig_ManPiNum(p->pFrames) );
         iInput = Vec_IntEntry( p->vMapPiF2A, 2*iPiNum );
         iFrame = Vec_IntEntry( p->vMapPiF2A, 2*iPiNum+1 );
-//        Aig_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
+//        Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
         if ( Vec_IntEntry( vVar2New, iInput ) == ~0 )
             Vec_IntWriteEntry( vVar2New, iInput, Vec_VecSize(vLits) );
         Vec_VecPushInt( vLits, Vec_IntEntry( vVar2New, iInput ), Entry );
@@ -475,14 +475,14 @@ Abc_Cex_t * Saig_RefManCreateCex( Saig_RefMan_t * p, Vec_Int_t * vVar2PiId, Vec_
     int i, Entry, iInput, iFrame;
     // create counter-example
     pCare = Abc_CexDup( p->pCex, p->pCex->nRegs );
-    memset( pCare->pData, 0, sizeof(unsigned) * Aig_BitWordNum(pCare->nBits) );
+    memset( pCare->pData, 0, sizeof(unsigned) * Abc_BitWordNum(pCare->nBits) );
     Vec_IntForEachEntry( vAssumps, Entry, i )
     {
         int iPiNum = Vec_IntEntry( vVar2PiId, lit_var(Entry) );
         assert( iPiNum >= 0 && iPiNum < Aig_ManPiNum(p->pFrames) );
         iInput = Vec_IntEntry( p->vMapPiF2A, 2*iPiNum );
         iFrame = Vec_IntEntry( p->vMapPiF2A, 2*iPiNum+1 );
-        Aig_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
+        Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * iFrame + iInput );
     }
     return pCare;
 }
@@ -540,7 +540,7 @@ Abc_Cex_t * Saig_RefManRunSat( Saig_RefMan_t * p, int fNewOrder )
             printf( "The problem is trivially UNSAT. The CEX is real.\n" );
             // create counter-example
             pCare = Abc_CexDup( p->pCex, p->pCex->nRegs );
-            memset( pCare->pData, 0, sizeof(unsigned) * Aig_BitWordNum(pCare->nBits) );
+            memset( pCare->pData, 0, sizeof(unsigned) * Abc_BitWordNum(pCare->nBits) );
             return pCare;
         }
         // the problem is SAT - it is expected
@@ -552,7 +552,7 @@ Abc_Cex_t * Saig_RefManRunSat( Saig_RefMan_t * p, int fNewOrder )
     {
         int iInput = Vec_IntEntry( p->vMapPiF2A, 2*i );
         int iFrame = Vec_IntEntry( p->vMapPiF2A, 2*i+1 );
-//        RetValue = Aig_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
+//        RetValue = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
 //        Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], !RetValue ) );
         Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], 1 ) );
         Vec_IntWriteEntry( vVar2PiId, pCnf->pVarNums[Aig_ObjId(pObj)], i );
@@ -740,7 +740,7 @@ Vec_Int_t * Saig_RefManRefineWithSat( Saig_RefMan_t * p, Vec_Int_t * vAigPis )
         int iFrame = Vec_IntEntry( p->vMapPiF2A, 2*i+1 );
         if ( Vec_IntEntry(vVisited, iInput) == 0 )
             continue;
-        RetValue = Aig_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
+        RetValue = Abc_InfoHasBit( p->pCex->pData, p->pCex->nRegs + p->pCex->nPis * iFrame + iInput );
         Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], !RetValue ) );
 //        Vec_IntPush( vAssumps, toLitCond( pCnf->pVarNums[Aig_ObjId(pObj)], 1 ) );
         Vec_IntWriteEntry( vVar2PiId, pCnf->pVarNums[Aig_ObjId(pObj)], i );
diff --git a/src/aig/saig/saigRetMin.c b/src/aig/saig/saigRetMin.c
index cce7dcc6..3f06177c 100644
--- a/src/aig/saig/saigRetMin.c
+++ b/src/aig/saig/saigRetMin.c
@@ -20,10 +20,10 @@
 
 #include "saig.h"
 
-#include "nwk.h"
-#include "cnf.h"
-#include "satSolver.h"
-#include "satStore.h"
+#include "src/opt/nwk/nwk.h"
+#include "src/sat/cnf/cnf.h"
+#include "src/sat/bsat/satSolver.h"
+#include "src/sat/bsat/satStore.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -287,8 +287,8 @@ Aig_Man_t * Saig_ManRetimeDupForward( Aig_Man_t * p, Vec_Ptr_t * vCut )
 //    assert( Vec_PtrSize(vCut) == Saig_ManRetimeCountCut(p, vCut) );
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nRegs = Vec_PtrSize(vCut);
     pNew->nTruePis = p->nTruePis;
     pNew->nTruePos = p->nTruePos;
@@ -346,8 +346,8 @@ Aig_Man_t * Saig_ManRetimeDupBackward( Aig_Man_t * p, Vec_Ptr_t * vCut, Vec_Int_
 //    assert( Vec_PtrSize(vCut) == Saig_ManRetimeCountCut(p, vCut) );
     // create the new manager
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     pNew->nRegs = Vec_PtrSize(vCut);
     pNew->nTruePis = p->nTruePis;
     pNew->nTruePos = p->nTruePos;
diff --git a/src/aig/saig/saigSimExt.c b/src/aig/saig/saigSimExt.c
index ac0fa697..021481b9 100644
--- a/src/aig/saig/saigSimExt.c
+++ b/src/aig/saig/saigSimExt.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "ssw.h"
+#include "src/proof/ssw/ssw.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -111,12 +111,12 @@ int Saig_ManSimDataInit( Aig_Man_t * p, Abc_Cex_t * pCex, Vec_Ptr_t * vSimInfo,
     Aig_Obj_t * pObj, * pObjLi, * pObjLo;
     int i, f, Entry, iBit = 0;
     Saig_ManForEachLo( p, pObj, i )
-        Saig_ManSimInfoSet( vSimInfo, pObj, 0, Aig_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
+        Saig_ManSimInfoSet( vSimInfo, pObj, 0, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
     for ( f = 0; f <= pCex->iFrame; f++ )
     {
         Saig_ManSimInfoSet( vSimInfo, Aig_ManConst1(p), f, SAIG_ONE );
         Saig_ManForEachPi( p, pObj, i )
-            Saig_ManSimInfoSet( vSimInfo, pObj, f, Aig_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
+            Saig_ManSimInfoSet( vSimInfo, pObj, f, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE:SAIG_ZER );
         if ( vRes )
         Vec_IntForEachEntry( vRes, Entry, i )
             Saig_ManSimInfoSet( vSimInfo, Aig_ManPi(p, Entry), f, SAIG_UND );
@@ -251,7 +251,7 @@ Vec_Int_t * Saig_ManExtendCounterExample0( Aig_Man_t * p, int iFirstFlopPi, Abc_
     Vec_Int_t * vRes, * vResInv, * vUndo, * vVis, * vVis2;
     int i, f, Value;
 //    assert( Aig_ManRegNum(p) > 0 );
-    assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Aig_BitWordNum(2*(pCex->iFrame+1)) );
+    assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Abc_BitWordNum(2*(pCex->iFrame+1)) );
     // start simulation data
     Value = Saig_ManSimDataInit( p, pCex, vSimInfo, NULL );
     assert( Value == SAIG_ONE );
@@ -301,7 +301,7 @@ Vec_Int_t * Saig_ManExtendCounterExample1( Aig_Man_t * p, int iFirstFlopPi, Abc_
     Vec_Int_t * vRes, * vResInv, * vUndo, * vVis, * vVis2;
     int i, f, Value;
 //    assert( Aig_ManRegNum(p) > 0 );
-    assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Aig_BitWordNum(2*(pCex->iFrame+1)) );
+    assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Abc_BitWordNum(2*(pCex->iFrame+1)) );
     // start simulation data
     Value = Saig_ManSimDataInit( p, pCex, vSimInfo, NULL );
     assert( Value == SAIG_ONE );
@@ -351,7 +351,7 @@ Vec_Int_t * Saig_ManExtendCounterExample2( Aig_Man_t * p, int iFirstFlopPi, Abc_
     Vec_Int_t * vRes, * vResInv, * vUndo, * vVis, * vVis2;
     int i, f, Value;
 //    assert( Aig_ManRegNum(p) > 0 );
-    assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Aig_BitWordNum(2*(pCex->iFrame+1)) );
+    assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Abc_BitWordNum(2*(pCex->iFrame+1)) );
     // start simulation data
     Value = Saig_ManSimDataInit( p, pCex, vSimInfo, NULL );
     assert( Value == SAIG_ONE );
@@ -419,7 +419,7 @@ Vec_Int_t * Saig_ManExtendCounterExample3( Aig_Man_t * p, int iFirstFlopPi, Abc_
     Vec_Int_t * vRes, * vResInv, * vUndo, * vVis, * vVis2;
     int i, f, Value;
 //    assert( Aig_ManRegNum(p) > 0 );
-    assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Aig_BitWordNum(2*(pCex->iFrame+1)) );
+    assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Abc_BitWordNum(2*(pCex->iFrame+1)) );
     // start simulation data
     Value = Saig_ManSimDataInit( p, pCex, vSimInfo, NULL );
     assert( Value == SAIG_ONE );
@@ -529,8 +529,8 @@ Vec_Int_t * Saig_ManExtendCounterExampleTest( Aig_Man_t * p, int iFirstFlopPi, A
         return NULL;
     }
     Aig_ManFanoutStart( p );
-    vSimInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p), Aig_BitWordNum(2*(pCex->iFrame+1)) );
-    Vec_PtrCleanSimInfo( vSimInfo, 0, Aig_BitWordNum(2*(pCex->iFrame+1)) );
+    vSimInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p), Abc_BitWordNum(2*(pCex->iFrame+1)) );
+    Vec_PtrCleanSimInfo( vSimInfo, 0, Abc_BitWordNum(2*(pCex->iFrame+1)) );
 
 clk = clock();
     if ( fTryFour )
diff --git a/src/aig/saig/saigSimExt2.c b/src/aig/saig/saigSimExt2.c
index 3d9cc88a..858c2b3b 100644
--- a/src/aig/saig/saigSimExt2.c
+++ b/src/aig/saig/saigSimExt2.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "ssw.h"
+#include "src/proof/ssw/ssw.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -139,12 +139,12 @@ int Saig_ManSimDataInit2( Aig_Man_t * p, Abc_Cex_t * pCex, Vec_Ptr_t * vSimInfo
     Aig_Obj_t * pObj, * pObjLi, * pObjLo;
     int i, f, iBit = 0;
     Saig_ManForEachLo( p, pObj, i )
-        Saig_ManSimInfo2Set( vSimInfo, pObj, 0, Aig_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE_NEW:SAIG_ZER_NEW );
+        Saig_ManSimInfo2Set( vSimInfo, pObj, 0, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE_NEW:SAIG_ZER_NEW );
     for ( f = 0; f <= pCex->iFrame; f++ )
     {
         Saig_ManSimInfo2Set( vSimInfo, Aig_ManConst1(p), f, SAIG_ONE_NEW );
         Saig_ManForEachPi( p, pObj, i )
-            Saig_ManSimInfo2Set( vSimInfo, pObj, f, Aig_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE_NEW:SAIG_ZER_NEW );
+            Saig_ManSimInfo2Set( vSimInfo, pObj, f, Abc_InfoHasBit(pCex->pData, iBit++)?SAIG_ONE_NEW:SAIG_ZER_NEW );
         Aig_ManForEachNode( p, pObj, i )
             Saig_ManExtendOneEval2( vSimInfo, pObj, f );
         Aig_ManForEachPo( p, pObj, i )
@@ -284,7 +284,7 @@ Vec_Int_t * Saig_ManProcessCex( Aig_Man_t * p, int iFirstFlopPi, Abc_Cex_t * pCe
     Vec_Int_t * vRes, * vResInv;
     int i, f, Value;
 //    assert( Aig_ManRegNum(p) > 0 );
-    assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Aig_BitWordNum(2*(pCex->iFrame+1)) );
+    assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Abc_BitWordNum(2*(pCex->iFrame+1)) );
     // start simulation data
     Value = Saig_ManSimDataInit2( p, pCex, vSimInfo );
     assert( Value == SAIG_ONE_NEW );
@@ -345,8 +345,8 @@ Vec_Int_t * Saig_ManExtendCounterExampleTest2( Aig_Man_t * p, int iFirstFlopPi,
         return NULL;
     }
     Aig_ManFanoutStart( p );
-    vSimInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p), Aig_BitWordNum(2*(pCex->iFrame+1)) );
-    Vec_PtrCleanSimInfo( vSimInfo, 0, Aig_BitWordNum(2*(pCex->iFrame+1)) );
+    vSimInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p), Abc_BitWordNum(2*(pCex->iFrame+1)) );
+    Vec_PtrCleanSimInfo( vSimInfo, 0, Abc_BitWordNum(2*(pCex->iFrame+1)) );
 
 clk = clock();
     vRes = Saig_ManProcessCex( p, iFirstFlopPi, pCex, vSimInfo, fVerbose );
@@ -382,7 +382,7 @@ Abc_Cex_t * Saig_ManDeriveCex( Aig_Man_t * p, int iFirstFlopPi, Abc_Cex_t * pCex
     Vec_Int_t * vRes, * vResInv;
     int i, f, Value;
 //    assert( Aig_ManRegNum(p) > 0 );
-    assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Aig_BitWordNum(2*(pCex->iFrame+1)) );
+    assert( (unsigned *)Vec_PtrEntry(vSimInfo,1) - (unsigned *)Vec_PtrEntry(vSimInfo,0) >= Abc_BitWordNum(2*(pCex->iFrame+1)) );
     // start simulation data
     Value = Saig_ManSimDataInit2( p, pCex, vSimInfo );
     assert( Value == SAIG_ONE_NEW );
@@ -400,7 +400,7 @@ Abc_Cex_t * Saig_ManDeriveCex( Aig_Man_t * p, int iFirstFlopPi, Abc_Cex_t * pCex
 
     // create CEX
     pCare = Abc_CexDup( pCex, pCex->nRegs );
-    memset( pCare->pData, 0, sizeof(unsigned) * Aig_BitWordNum(pCare->nBits) );
+    memset( pCare->pData, 0, sizeof(unsigned) * Abc_BitWordNum(pCare->nBits) );
 
     // select the result
     vRes = Vec_IntAlloc( 1000 );
@@ -414,7 +414,7 @@ Abc_Cex_t * Saig_ManDeriveCex( Aig_Man_t * p, int iFirstFlopPi, Abc_Cex_t * pCex
             if ( Saig_ManSimInfo2IsOld( Value ) )
             {
                 fFound = 1;
-                Aig_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * f + i );
+                Abc_InfoSetBit( pCare->pData, pCare->nRegs + pCare->nPis * f + i );
             }
         }
         if ( fFound )
@@ -454,8 +454,8 @@ Abc_Cex_t * Saig_ManFindCexCareBitsSense( Aig_Man_t * p, Abc_Cex_t * pCex, int i
         return NULL;
     }
     Aig_ManFanoutStart( p );
-    vSimInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p), Aig_BitWordNum(2*(pCex->iFrame+1)) );
-    Vec_PtrCleanSimInfo( vSimInfo, 0, Aig_BitWordNum(2*(pCex->iFrame+1)) );
+    vSimInfo = Vec_PtrAllocSimInfo( Aig_ManObjNumMax(p), Abc_BitWordNum(2*(pCex->iFrame+1)) );
+    Vec_PtrCleanSimInfo( vSimInfo, 0, Abc_BitWordNum(2*(pCex->iFrame+1)) );
 
 clk = clock();
     pCare = Saig_ManDeriveCex( p, iFirstFlopPi, pCex, vSimInfo, fVerbose );
diff --git a/src/aig/saig/saigSimFast.c b/src/aig/saig/saigSimFast.c
index 1840eaa7..b8eed19e 100644
--- a/src/aig/saig/saigSimFast.c
+++ b/src/aig/saig/saigSimFast.c
@@ -20,7 +20,7 @@
 
 #include "saig.h"
 
-#include "main.h"
+#include "src/base/main/main.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/saig/saigSimMv.c b/src/aig/saig/saigSimMv.c
index 7076d07b..6579c37b 100644
--- a/src/aig/saig/saigSimMv.c
+++ b/src/aig/saig/saigSimMv.c
@@ -184,7 +184,7 @@ static inline int Saig_MvCreateObj( Saig_MvMan_t * p, int iFan0, int iFan1 )
     pNode->iFan1 = iFan1;
     pNode->iNext = 0;
     if ( iFan0 || iFan1 )
-        p->pLevels[p->nObjs] = 1 + ABC_MAX( Saig_MvLev(p, iFan0), Saig_MvLev(p, iFan1) );
+        p->pLevels[p->nObjs] = 1 + Abc_MaxInt( Saig_MvLev(p, iFan0), Saig_MvLev(p, iFan1) );
     else
         p->pLevels[p->nObjs] = 0, p->nPis++;
     return p->nObjs++;
@@ -216,7 +216,7 @@ Saig_MvMan_t * Saig_MvManStart( Aig_Man_t * pAig, int nFramesSatur )
     p->nFlops       = Aig_ManRegNum(pAig);
     // compacted AIG
     p->pAigOld      = Saig_ManCreateReducedAig( pAig, &p->vFlops );
-    p->nTStatesSize = Aig_PrimeCudd( p->nStatesMax );
+    p->nTStatesSize = Abc_PrimeCudd( p->nStatesMax );
     p->pTStates     = ABC_CALLOC( unsigned, p->nTStatesSize );
     p->pMemStates   = Aig_MmFixedStart( sizeof(int) * (p->nFlops+1), p->nStatesMax );
     p->vStates      = Vec_PtrAlloc( p->nStatesMax );
@@ -231,7 +231,7 @@ Saig_MvMan_t * Saig_MvManStart( Aig_Man_t * pAig, int nFramesSatur )
     // internal AIG
     p->nObjsAlloc   = 1000000;
     p->pAigNew      = ABC_ALLOC( Saig_MvAnd_t, p->nObjsAlloc );
-    p->nTNodesSize  = Aig_PrimeCudd( p->nObjsAlloc / 3 );
+    p->nTNodesSize  = Abc_PrimeCudd( p->nObjsAlloc / 3 );
     p->pTNodes      = ABC_CALLOC( int, p->nTNodesSize );
     p->pLevels      = ABC_ALLOC( unsigned char, p->nObjsAlloc );
     Saig_MvCreateObj( p, 0, 0 );
diff --git a/src/aig/saig/saigSimSeq.c b/src/aig/saig/saigSimSeq.c
index cc5a9e05..538afef0 100644
--- a/src/aig/saig/saigSimSeq.c
+++ b/src/aig/saig/saigSimSeq.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "ssw.h"
+#include "src/proof/ssw/ssw.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -433,8 +433,8 @@ Abc_Cex_t * Raig_ManGenerateCounter( Aig_Man_t * pAig, int iFrame, int iOut, int
             continue;
         for ( w = 0; w < nWords; w++ )
             pData[w] = Aig_ManRandom( 0 );
-        if ( Aig_InfoHasBit( pData, iPat ) )
-            Aig_InfoSetBit( p->pData, Counter + iPioId );
+        if ( Abc_InfoHasBit( pData, iPat ) )
+            Abc_InfoSetBit( p->pData, Counter + iPioId );
     }
     ABC_FREE( pData );
     return p;
diff --git a/src/aig/saig/saigStrSim.c b/src/aig/saig/saigStrSim.c
index 1d69630f..cdf177d0 100644
--- a/src/aig/saig/saigStrSim.c
+++ b/src/aig/saig/saigStrSim.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "ssw.h"
+#include "src/proof/ssw/ssw.h"
 
 ABC_NAMESPACE_IMPL_START
 
@@ -398,7 +398,7 @@ int Saig_StrSimDetectUnique( Aig_Man_t * p0, Aig_Man_t * p1 )
     int i, nTableSize, Counter;
 
     // allocate the hash table hashing simulation info into nodes
-    nTableSize = Aig_PrimeCudd( Aig_ManObjNum(p0)/2 );
+    nTableSize = Abc_PrimeCudd( Aig_ManObjNum(p0)/2 );
     ppTable = ABC_CALLOC( Aig_Obj_t *, nTableSize ); 
     ppNexts = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p0) ); 
     ppCands = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p0) ); 
diff --git a/src/aig/saig/saigSwitch.c b/src/aig/saig/saigSwitch.c
index bbad9be4..01411c05 100644
--- a/src/aig/saig/saigSwitch.c
+++ b/src/aig/saig/saigSwitch.c
@@ -20,7 +20,7 @@
 
 #include "saig.h"
 
-#include "main.h"
+#include "src/base/main/main.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/saig/saigSynch.c b/src/aig/saig/saigSynch.c
index 00f7517e..08a10b66 100644
--- a/src/aig/saig/saigSynch.c
+++ b/src/aig/saig/saigSynch.c
@@ -471,7 +471,7 @@ Aig_Man_t * Saig_ManDupInitZero( Aig_Man_t * p )
     Aig_Obj_t * pObj;
     int i;
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
+    pNew->pName = Abc_UtilStrsav( p->pName );
     Aig_ManConst1(p)->pData = Aig_ManConst1(pNew);
     Saig_ManForEachPi( p, pObj, i )
         pObj->pData = Aig_ObjCreatePi( pNew );
@@ -619,7 +619,7 @@ Aig_Man_t * Saig_Synchronize( Aig_Man_t * pAig1, Aig_Man_t * pAig2, int nWords,
         return NULL;
     }
     clk = clock();
-    vSimInfo = Vec_PtrAllocSimInfo( ABC_MAX( Aig_ManObjNumMax(pAig1), Aig_ManObjNumMax(pAig2) ), 1 );
+    vSimInfo = Vec_PtrAllocSimInfo( Abc_MaxInt( Aig_ManObjNumMax(pAig1), Aig_ManObjNumMax(pAig2) ), 1 );
 
     // process Design 1
     RetValue = Saig_SynchSequenceRun( pAig1, vSimInfo, vSeq1, 1 );
diff --git a/src/aig/saig/saigTempor.c b/src/aig/saig/saigTempor.c
index fc57c1f5..1a6f1919 100644
--- a/src/aig/saig/saigTempor.c
+++ b/src/aig/saig/saigTempor.c
@@ -50,7 +50,7 @@ Aig_Man_t * Saig_ManTemporFrames( Aig_Man_t * pAig, int nFrames )
     // start the frames package
     Aig_ManCleanData( pAig );
     pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * nFrames );
-    pFrames->pName = Aig_UtilStrsav( pAig->pName );
+    pFrames->pName = Abc_UtilStrsav( pAig->pName );
     // initiliaze the flops
     Saig_ManForEachLo( pAig, pObj, i )
         pObj->pData = Aig_ManConst0(pFrames);
@@ -103,7 +103,7 @@ Aig_Man_t * Saig_ManTemporDecompose( Aig_Man_t * pAig, int nFrames )
     // start the new manager
     Aig_ManCleanData( pAig );
     pAigNew = Aig_ManStart( Aig_ManNodeNum(pAig) );
-    pAigNew->pName = Aig_UtilStrsav( pAig->pName );
+    pAigNew->pName = Abc_UtilStrsav( pAig->pName );
     // map the constant node and primary inputs
     Aig_ManConst1(pAig)->pData = Aig_ManConst1( pAigNew );
     Saig_ManForEachPi( pAig, pObj, i )
diff --git a/src/aig/saig/saigTrans.c b/src/aig/saig/saigTrans.c
index 09639e27..11e775e5 100644
--- a/src/aig/saig/saigTrans.c
+++ b/src/aig/saig/saigTrans.c
@@ -19,7 +19,7 @@
 ***********************************************************************/
 
 #include "saig.h"
-#include "fra.h"
+#include "src/proof/fra/fra.h"
 
 ABC_NAMESPACE_IMPL_START
 
diff --git a/src/aig/saig/saigWnd.c b/src/aig/saig/saigWnd.c
index c11798ea..6753370f 100644
--- a/src/aig/saig/saigWnd.c
+++ b/src/aig/saig/saigWnd.c
@@ -232,7 +232,7 @@ Aig_Man_t * Saig_ManWindowExtractNodes( Aig_Man_t * p, Vec_Ptr_t * vNodes )
     Aig_ManCleanData( p ); 
     // create the new manager
     pNew = Aig_ManStart( Vec_PtrSize(vNodes) );
-    pNew->pName = Aig_UtilStrsav( "wnd" );
+    pNew->pName = Abc_UtilStrsav( "wnd" );
     pNew->pSpec = NULL;
     // map constant nodes
     pObj = Aig_ManConst1( p );
@@ -375,8 +375,8 @@ Aig_Man_t * Saig_ManWindowInsertNodes( Aig_Man_t * p, Vec_Ptr_t * vNodes, Aig_Ma
     Aig_ManCleanData( p ); 
     Aig_ManCleanData( pWnd ); 
     pNew = Aig_ManStart( Aig_ManObjNumMax(p) );
-    pNew->pName = Aig_UtilStrsav( p->pName );
-    pNew->pSpec = Aig_UtilStrsav( p->pSpec );
+    pNew->pName = Abc_UtilStrsav( p->pName );
+    pNew->pSpec = Abc_UtilStrsav( p->pSpec );
     // map constant nodes
     pObj = Aig_ManConst1( p );
     pObj->pData = Aig_ManConst1( pNew );
@@ -745,7 +745,7 @@ Aig_Man_t * Saig_ManWindowExtractMiter( Aig_Man_t * p0, Aig_Man_t * p1 )
     vNodes1 = Saig_ManCollectedDiffNodes( p1, p0 );
     // create the new manager
     pNew = Aig_ManStart( Vec_PtrSize(vNodes0) + Vec_PtrSize(vNodes1) );
-    pNew->pName = Aig_UtilStrsav( "wnd" );
+    pNew->pName = Abc_UtilStrsav( "wnd" );
     pNew->pSpec = NULL;
     // map constant nodes
     pObj0 = Aig_ManConst1( p0 );
diff --git a/src/aig/ssw/module.make b/src/aig/ssw/module.make
deleted file mode 100644
index b6b813b1..00000000
--- a/src/aig/ssw/module.make
+++ /dev/null
@@ -1,20 +0,0 @@
-SRC +=    src/aig/ssw/sswAig.c \
-    src/aig/ssw/sswBmc.c \
-    src/aig/ssw/sswClass.c \
-    src/aig/ssw/sswCnf.c \
-    src/aig/ssw/sswConstr.c \
-    src/aig/ssw/sswCore.c \
-    src/aig/ssw/sswDyn.c \
-    src/aig/ssw/sswFilter.c \
-    src/aig/ssw/sswIslands.c \
-    src/aig/ssw/sswLcorr.c \
-    src/aig/ssw/sswMan.c \
-    src/aig/ssw/sswPart.c \
-    src/aig/ssw/sswPairs.c \
-    src/aig/ssw/sswRarity.c \
-    src/aig/ssw/sswSat.c \
-    src/aig/ssw/sswSemi.c \
-    src/aig/ssw/sswSim.c \
-    src/aig/ssw/sswSimSat.c \
-    src/aig/ssw/sswSweep.c \
-    src/aig/ssw/sswUnique.c
diff --git a/src/aig/ssw/ssw.h b/src/aig/ssw/ssw.h
deleted file mode 100644
index 22b6c6e5..00000000
--- a/src/aig/ssw/ssw.h
+++ /dev/null
@@ -1,142 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [ssw.h] 
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: ssw.h,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#ifndef __SSW_H__
-#define __SSW_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-ABC_NAMESPACE_HEADER_START
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-// choicing parameters
-typedef struct Ssw_Pars_t_ Ssw_Pars_t;
-struct Ssw_Pars_t_
-{
-    int              nPartSize;     // size of the partition
-    int              nOverSize;     // size of the overlap between partitions
-    int              nFramesK;      // the induction depth
-    int              nFramesAddSim; // the number of additional frames to simulate
-    int              fConstrs;      // treat the last nConstrs POs as seq constraints
-    int              fMergeFull;    // enables full merge when constraints are used
-    int              nMaxLevs;      // the max number of levels of nodes to consider
-    int              nBTLimit;      // conflict limit at a node
-    int              nBTLimitGlobal;// conflict limit for multiple runs
-    int              nMinDomSize;   // min clock domain considered for optimization
-    int              nItersStop;    // stop after the given number of iterations
-    int              fDumpSRInit;   // dumps speculative reduction
-    int              nResimDelta;   // the number of nodes to resimulate
-    int              nStepsMax;     // (scorr only) the max number of induction steps
-    int              TimeLimit;     // time out in seconds
-    int              fPolarFlip;    // uses polarity adjustment
-    int              fLatchCorr;    // perform register correspondence
-    int              fConstCorr;    // perform constant correspondence
-    int              fOutputCorr;   // perform 'PO correspondence'
-    int              fSemiFormal;   // enable semiformal filtering
-//    int              fUniqueness;   // enable uniqueness constraints
-    int              fDynamic;      // enable dynamic addition of constraints
-    int              fLocalSim;     // enable local simulation simulation
-    int              fPartSigCorr;  // uses partial signal correspondence
-    int              nIsleDist;     // extends islands by the given distance
-    int              fScorrGia;     // new signal correspondence implementation
-    int              fUseCSat;      // new SAT solver using when fScorrGia is selected
-    int              fVerbose;      // verbose stats
-    int              fFlopVerbose;  // verbose printout of redundant flops
-    int              fEquivDump;    // enables dumping equivalences
-    // optimized latch correspondence
-    int              fLatchCorrOpt; // perform register correspondence (optimized)
-    int              nSatVarMax;    // max number of SAT vars before recycling SAT solver (optimized latch corr only)
-    int              nRecycleCalls; // calls to perform before recycling SAT solver (optimized latch corr only)
-    // optimized signal correspondence
-    int              nSatVarMax2;   // max number of SAT vars before recycling SAT solver (optimized latch corr only)
-    int              nRecycleCalls2;// calls to perform before recycling SAT solver (optimized latch corr only)
-    // internal parameters
-    int              nIters;        // the number of iterations performed
-    int              nConflicts;    // the total number of conflicts performed
-    // callback
-    void *           pData;
-    void *           pFunc;
-};
-
-typedef struct Ssw_Sml_t_ Ssw_Sml_t; // sequential simulation manager
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== sswBmc.c ==========================================================*/
-extern int           Ssw_BmcDynamic( Aig_Man_t * pAig, int nFramesMax, int nConfLimit, int fVerbose, int * piFrame );
-/*=== sswConstr.c ==========================================================*/
-extern int           Ssw_ManSetConstrPhases( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits );
-/*=== sswCore.c ==========================================================*/
-extern void          Ssw_ManSetDefaultParams( Ssw_Pars_t * p );
-extern void          Ssw_ManSetDefaultParamsLcorr( Ssw_Pars_t * p );
-extern Aig_Man_t *   Ssw_SignalCorrespondence( Aig_Man_t * pAig, Ssw_Pars_t * pPars );
-extern Aig_Man_t *   Ssw_LatchCorrespondence( Aig_Man_t * pAig, Ssw_Pars_t * pPars );
-/*=== sswIslands.c ==========================================================*/
-extern int           Ssw_SecWithSimilarityPairs( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPairs, Ssw_Pars_t * pPars );
-extern int           Ssw_SecWithSimilarity( Aig_Man_t * p0, Aig_Man_t * p1, Ssw_Pars_t * pPars );
-/*=== sswMiter.c ===================================================*/
-/*=== sswPart.c ==========================================================*/
-extern Aig_Man_t *   Ssw_SignalCorrespondencePart( Aig_Man_t * pAig, Ssw_Pars_t * pPars );
-/*=== sswPairs.c ===================================================*/
-extern int           Ssw_MiterStatus( Aig_Man_t * p, int fVerbose );
-extern int           Ssw_SecWithPairs( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Vec_Int_t * vIds1, Vec_Int_t * vIds2, Ssw_Pars_t * pPars );
-extern int           Ssw_SecGeneral( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Ssw_Pars_t * pPars );
-extern int           Ssw_SecGeneralMiter( Aig_Man_t * pMiter, Ssw_Pars_t * pPars );
-/*=== sswRarity.c ===================================================*/
-extern int           Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, int nRounds, int nRandSeed, int TimeOut, int fMiter, Abc_Cex_t * pCex, int fLatchOnly, int fVerbose );
-extern int           Ssw_RarSimulate( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, int nRounds, int nRandSeed, int TimeOut, int fVerbose );
-/*=== sswSim.c ===================================================*/
-extern Ssw_Sml_t *   Ssw_SmlSimulateComb( Aig_Man_t * pAig, int nWords );
-extern Ssw_Sml_t *   Ssw_SmlSimulateSeq( Aig_Man_t * pAig, int nPref, int nFrames, int nWords );
-extern void          Ssw_SmlUnnormalize( Ssw_Sml_t * p );
-extern void          Ssw_SmlStop( Ssw_Sml_t * p );
-extern int           Ssw_SmlNumFrames( Ssw_Sml_t * p );
-extern int           Ssw_SmlNumWordsTotal( Ssw_Sml_t * p );
-extern unsigned *    Ssw_SmlSimInfo( Ssw_Sml_t * p, Aig_Obj_t * pObj );
-extern int           Ssw_SmlObjsAreEqualWord( Ssw_Sml_t * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 );
-extern void          Ssw_SmlInitializeSpecial( Ssw_Sml_t * p, Vec_Int_t * vInit );
-extern int           Ssw_SmlCheckNonConstOutputs( Ssw_Sml_t * p );
-extern Vec_Ptr_t *   Ssw_SmlSimDataPointers( Ssw_Sml_t * p );
-
-
-ABC_NAMESPACE_HEADER_END
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/ssw/sswAig.c b/src/aig/ssw/sswAig.c
deleted file mode 100644
index f3174470..00000000
--- a/src/aig/ssw/sswAig.c
+++ /dev/null
@@ -1,259 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswAig.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [AIG manipulation.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswAig.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the SAT manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Frm_t * Ssw_FrmStart( Aig_Man_t * pAig )
-{
-    Ssw_Frm_t * p;
-    p = ABC_ALLOC( Ssw_Frm_t, 1 ); 
-    memset( p, 0, sizeof(Ssw_Frm_t) );
-    p->pAig          = pAig;
-    p->nObjs         = Aig_ManObjNumMax( pAig );
-    p->nFrames       = 0;
-    p->pFrames       = NULL;
-    p->vAig2Frm      = Vec_PtrAlloc( 0 );
-    Vec_PtrFill( p->vAig2Frm, 2 * p->nObjs, NULL );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the SAT manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_FrmStop( Ssw_Frm_t * p )
-{
-    if ( p->pFrames )
-        Aig_ManStop( p->pFrames );
-    Vec_PtrFree( p->vAig2Frm );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs speculative reduction for one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Ssw_FramesConstrainNode( Ssw_Man_t * p, Aig_Man_t * pFrames, Aig_Man_t * pAig, Aig_Obj_t * pObj, int iFrame, int fTwoPos )
-{
-    Aig_Obj_t * pObjNew, * pObjNew2, * pObjRepr, * pObjReprNew, * pMiter;
-    // skip nodes without representative
-    pObjRepr = Aig_ObjRepr(pAig, pObj);
-    if ( pObjRepr == NULL )
-        return;
-    p->nConstrTotal++;
-    assert( pObjRepr->Id < pObj->Id );
-    // get the new node 
-    pObjNew = Ssw_ObjFrame( p, pObj, iFrame );
-    // get the new node of the representative
-    pObjReprNew = Ssw_ObjFrame( p, pObjRepr, iFrame );
-    // if this is the same node, no need to add constraints
-    if ( pObj->fPhase == pObjRepr->fPhase )
-    {
-        assert( pObjNew != Aig_Not(pObjReprNew) );
-        if ( pObjNew == pObjReprNew )
-            return;
-    }
-    else
-    {
-        assert( pObjNew != pObjReprNew );
-        if ( pObjNew == Aig_Not(pObjReprNew) )
-            return;
-    }
-    p->nConstrReduced++;
-    // these are different nodes - perform speculative reduction
-    pObjNew2 = Aig_NotCond( pObjReprNew, pObj->fPhase ^ pObjRepr->fPhase );
-    // set the new node
-    Ssw_ObjSetFrame( p, pObj, iFrame, pObjNew2 );
-    // add the constraint
-    if ( fTwoPos )
-    {
-        Aig_ObjCreatePo( pFrames, pObjNew2 );
-        Aig_ObjCreatePo( pFrames, pObjNew );
-    }
-    else
-    {
-        pMiter = Aig_Exor( pFrames, pObjNew, pObjNew2 );
-        Aig_ObjCreatePo( pFrames, Aig_NotCond(pMiter, Aig_ObjPhaseReal(pMiter)) );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares the inductive case with speculative reduction.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ssw_FramesWithClasses( Ssw_Man_t * p )
-{
-    Aig_Man_t * pFrames;
-    Aig_Obj_t * pObj, * pObjLi, * pObjLo, * pObjNew;
-    int i, f, iLits;
-    assert( p->pFrames == NULL );
-    assert( Aig_ManRegNum(p->pAig) > 0 );
-    assert( Aig_ManRegNum(p->pAig) < Aig_ManPiNum(p->pAig) );
-    p->nConstrTotal = p->nConstrReduced = 0;
-
-    // start the fraig package
-    pFrames = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * p->nFrames );
-    // create latches for the first frame
-    Saig_ManForEachLo( p->pAig, pObj, i )
-        Ssw_ObjSetFrame( p, pObj, 0, Aig_ObjCreatePi(pFrames) );
-    // add timeframes
-    iLits = 0;
-    for ( f = 0; f < p->pPars->nFramesK; f++ )
-    {
-        // map constants and PIs
-        Ssw_ObjSetFrame( p, Aig_ManConst1(p->pAig), f, Aig_ManConst1(pFrames) );
-        Saig_ManForEachPi( p->pAig, pObj, i )
-        {
-            pObjNew = Aig_ObjCreatePi(pFrames);
-            pObjNew->fPhase = (p->vInits != NULL) && Vec_IntEntry(p->vInits, iLits++);
-            Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-        }
-        // set the constraints on the latch outputs
-        Saig_ManForEachLo( p->pAig, pObj, i )
-            Ssw_FramesConstrainNode( p, pFrames, p->pAig, pObj, f, 1 );
-        // add internal nodes of this frame
-        Aig_ManForEachNode( p->pAig, pObj, i )
-        {
-            pObjNew = Aig_And( pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) );
-            Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-            Ssw_FramesConstrainNode( p, pFrames, p->pAig, pObj, f, 1 );
-        }
-        // transfer to the primary outputs
-        Aig_ManForEachPo( p->pAig, pObj, i )
-            Ssw_ObjSetFrame( p, pObj, f, Ssw_ObjChild0Fra(p, pObj,f) );
-        // transfer latch input to the latch outputs 
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-            Ssw_ObjSetFrame( p, pObjLo, f+1, Ssw_ObjFrame(p, pObjLi,f) );
-    }
-    assert( p->vInits == NULL || Vec_IntSize(p->vInits) == iLits + Saig_ManPiNum(p->pAig) );
-    // add the POs for the latch outputs of the last frame
-    Saig_ManForEachLo( p->pAig, pObj, i )
-        Aig_ObjCreatePo( pFrames, Ssw_ObjFrame( p, pObj, p->pPars->nFramesK ) );
-
-    // remove dangling nodes
-    Aig_ManCleanup( pFrames );
-    // make sure the satisfying assignment is node assigned
-    assert( pFrames->pData == NULL );
-//Aig_ManShow( pFrames, 0, NULL );
-    return pFrames;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares the inductive case with speculative reduction.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ssw_SpeculativeReduction( Ssw_Man_t * p )
-{
-    Aig_Man_t * pFrames;
-    Aig_Obj_t * pObj, * pObjNew;
-    int i;
-    assert( p->pFrames == NULL );
-    assert( Aig_ManRegNum(p->pAig) > 0 );
-    assert( Aig_ManRegNum(p->pAig) < Aig_ManPiNum(p->pAig) );
-    p->nConstrTotal = p->nConstrReduced = 0;
- 
-    // start the fraig package
-    pFrames = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * p->nFrames );
-    pFrames->pName = Aig_UtilStrsav( p->pAig->pName );
-    // map constants and PIs
-    Ssw_ObjSetFrame( p, Aig_ManConst1(p->pAig), 0, Aig_ManConst1(pFrames) );
-    Saig_ManForEachPi( p->pAig, pObj, i )
-        Ssw_ObjSetFrame( p, pObj, 0, Aig_ObjCreatePi(pFrames) );
-    // create latches for the first frame
-    Saig_ManForEachLo( p->pAig, pObj, i )
-        Ssw_ObjSetFrame( p, pObj, 0, Aig_ObjCreatePi(pFrames) );
-    // set the constraints on the latch outputs
-    Saig_ManForEachLo( p->pAig, pObj, i )
-        Ssw_FramesConstrainNode( p, pFrames, p->pAig, pObj, 0, 0 );
-    // add internal nodes of this frame
-    Aig_ManForEachNode( p->pAig, pObj, i )
-    {
-        pObjNew = Aig_And( pFrames, Ssw_ObjChild0Fra(p, pObj, 0), Ssw_ObjChild1Fra(p, pObj, 0) );
-        Ssw_ObjSetFrame( p, pObj, 0, pObjNew );
-        Ssw_FramesConstrainNode( p, pFrames, p->pAig, pObj, 0, 0 );
-    }
-    // add the POs for the latch outputs of the last frame
-    Saig_ManForEachLi( p->pAig, pObj, i )
-        Aig_ObjCreatePo( pFrames, Ssw_ObjChild0Fra(p, pObj,0) );
-    // remove dangling nodes
-    Aig_ManCleanup( pFrames );
-    Aig_ManSetRegNum( pFrames, Aig_ManRegNum(p->pAig) );
-//    printf( "SpecRed: Total constraints = %d. Reduced constraints = %d.\n", 
-//        p->nConstrTotal, p->nConstrReduced );
-    return pFrames;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswBmc.c b/src/aig/ssw/sswBmc.c
deleted file mode 100644
index d565d5d3..00000000
--- a/src/aig/ssw/sswBmc.c
+++ /dev/null
@@ -1,224 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswBmc.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Bounded model checker using dynamic unrolling.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswBmc.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Incrementally unroll the timeframes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Ssw_BmcUnroll_rec( Ssw_Frm_t * pFrm, Aig_Obj_t * pObj, int f )
-{
-    Aig_Obj_t * pRes, * pRes0, * pRes1;
-    if ( (pRes = Ssw_ObjFrame_(pFrm, pObj, f)) )
-        return pRes;
-    if ( Aig_ObjIsConst1(pObj) )
-        pRes = Aig_ManConst1( pFrm->pFrames );
-    else if ( Saig_ObjIsPi(pFrm->pAig, pObj) )
-        pRes = Aig_ObjCreatePi( pFrm->pFrames );
-    else if ( Aig_ObjIsPo(pObj) )
-    {
-        Ssw_BmcUnroll_rec( pFrm, Aig_ObjFanin0(pObj), f );
-        pRes = Ssw_ObjChild0Fra_( pFrm, pObj, f );
-    }
-    else if ( Saig_ObjIsLo(pFrm->pAig, pObj) )
-    {
-        if ( f == 0 )
-            pRes = Aig_ManConst0( pFrm->pFrames );
-        else 
-            pRes = Ssw_BmcUnroll_rec( pFrm, Saig_ObjLoToLi(pFrm->pAig, pObj), f-1 );
-    }
-    else 
-    {
-        assert( Aig_ObjIsNode(pObj) );
-        Ssw_BmcUnroll_rec( pFrm, Aig_ObjFanin0(pObj), f );
-        Ssw_BmcUnroll_rec( pFrm, Aig_ObjFanin1(pObj), f );
-        pRes0 = Ssw_ObjChild0Fra_( pFrm, pObj, f );
-        pRes1 = Ssw_ObjChild1Fra_( pFrm, pObj, f );
-        pRes = Aig_And( pFrm->pFrames, pRes0, pRes1 );
-    }
-    Ssw_ObjSetFrame_( pFrm, pObj, f, pRes );
-    return pRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives counter-example.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Abc_Cex_t * Ssw_BmcGetCounterExample( Ssw_Frm_t * pFrm, Ssw_Sat_t * pSat, int iPo, int iFrame )
-{
-    Abc_Cex_t * pCex;
-    Aig_Obj_t * pObj, * pObjFrames;
-    int f, i, nShift;
-    assert( Saig_ManRegNum(pFrm->pAig) > 0 );
-    // allocate the counter example
-    pCex = Abc_CexAlloc( Saig_ManRegNum(pFrm->pAig), Saig_ManPiNum(pFrm->pAig), iFrame + 1 );
-    pCex->iPo    = iPo;
-    pCex->iFrame = iFrame;
-    // create data-bits
-    nShift = Saig_ManRegNum(pFrm->pAig);
-    for ( f = 0; f <= iFrame; f++, nShift += Saig_ManPiNum(pFrm->pAig) )
-        Saig_ManForEachPi( pFrm->pAig, pObj, i )
-        {
-            pObjFrames = Ssw_ObjFrame_(pFrm, pObj, f);
-            if ( pObjFrames == NULL )
-                continue;
-            if ( Ssw_CnfGetNodeValue( pSat, pObjFrames ) )
-                Aig_InfoSetBit( pCex->pData, nShift + i );
-        }
-    return pCex;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs BMC for the given AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_BmcDynamic( Aig_Man_t * pAig, int nFramesMax, int nConfLimit, int fVerbose, int * piFrame )
-{
-    Ssw_Frm_t * pFrm;
-    Ssw_Sat_t * pSat;
-    Aig_Obj_t * pObj, * pObjFrame;
-    int status, clkPart, Lit, i, f, RetValue;
-
-    // start managers
-    assert( Saig_ManRegNum(pAig) > 0 );
-    Aig_ManSetPioNumbers( pAig );
-    pSat = Ssw_SatStart( 0 );
-    pFrm = Ssw_FrmStart( pAig );
-    pFrm->pFrames = Aig_ManStart( Aig_ManObjNumMax(pAig) * 3 );
-    // report statistics
-    if ( fVerbose )
-    {
-        printf( "AIG:  PI/PO/Reg = %d/%d/%d.  Node = %6d. Lev = %5d.\n", 
-            Saig_ManPiNum(pAig), Saig_ManPoNum(pAig), Saig_ManRegNum(pAig),
-            Aig_ManNodeNum(pAig), Aig_ManLevelNum(pAig) );
-        fflush( stdout );
-    }
-    // perform dynamic unrolling
-    RetValue = -1;
-    for ( f = 0; f < nFramesMax; f++ )
-    {
-        clkPart = clock();
-        Saig_ManForEachPo( pAig, pObj, i )
-        {
-            // unroll the circuit for this output
-            Ssw_BmcUnroll_rec( pFrm, pObj, f );
-            pObjFrame = Ssw_ObjFrame_( pFrm, pObj, f );
-            Ssw_CnfNodeAddToSolver( pSat, Aig_Regular(pObjFrame) );
-            status = sat_solver_simplify(pSat->pSat);
-            assert( status );
-            // solve
-            Lit = toLitCond( Ssw_ObjSatNum(pSat,pObjFrame), Aig_IsComplement(pObjFrame) );
-            if ( fVerbose )
-            {
-                printf( "Solving output %2d of frame %3d ... \r", 
-                    i % Saig_ManPoNum(pAig), i / Saig_ManPoNum(pAig) );
-            }
-            status = sat_solver_solve( pSat->pSat, &Lit, &Lit + 1, (ABC_INT64_T)nConfLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-            if ( status == l_False )
-            {
-/*
-                Lit = lit_neg( Lit );
-                RetValue = sat_solver_addclause( pSat->pSat, &Lit, &Lit + 1 );
-                assert( RetValue );
-                if ( pSat->pSat->qtail != pSat->pSat->qhead )
-                {
-                    RetValue = sat_solver_simplify(pSat->pSat);
-                    assert( RetValue );
-                }
-*/
-                RetValue = 1;
-                continue;
-            }
-            else if ( status == l_True )
-            {
-                pAig->pSeqModel = Ssw_BmcGetCounterExample( pFrm, pSat, i, f );
-                if ( piFrame )
-                    *piFrame = f;
-                RetValue = 0;
-                break;
-            }
-            else
-            {
-                if ( piFrame )
-                    *piFrame = f;
-                RetValue = -1;
-                break;
-            }
-        }
-        if ( fVerbose )
-        {
-            printf( "Solved %2d outputs of frame %3d.  ", Saig_ManPoNum(pAig), f );
-            printf( "Conf =%8.0f. Var =%8d. AIG=%9d. ", 
-                (double)pSat->pSat->stats.conflicts, 
-                pSat->nSatVars, Aig_ManNodeNum(pFrm->pFrames) );
-            ABC_PRT( "T", clock() - clkPart );
-            clkPart = clock();
-            fflush( stdout );
-        }
-        if ( RetValue != 1 )
-            break;
-    }
-
-    Ssw_SatStop( pSat );
-    Ssw_FrmStop( pFrm );
-    return RetValue;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswClass.c b/src/aig/ssw/sswClass.c
deleted file mode 100644
index 51514f47..00000000
--- a/src/aig/ssw/sswClass.c
+++ /dev/null
@@ -1,1170 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswClass.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Representation of candidate equivalence classes.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswClass.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-/*
-    The candidate equivalence classes are stored as a vector of pointers 
-    to the array of pointers to the nodes in each class.
-    The first node of the class is its representative node.
-    The representative has the smallest topological order among the class nodes.
-    The nodes inside each class are ordered according to their topological order.
-    The classes are ordered according to the topo order of their representatives.
-*/
-
-// internal representation of candidate equivalence classes
-struct Ssw_Cla_t_
-{
-    // class information
-    Aig_Man_t *      pAig;             // original AIG manager
-    Aig_Obj_t ***    pId2Class;        // non-const classes by ID of repr node
-    int *            pClassSizes;      // sizes of each equivalence class
-    int              fConstCorr;
-    // statistics
-    int              nClasses;         // the total number of non-const classes
-    int              nCands1;          // the total number of const candidates
-    int              nLits;            // the number of literals in all classes
-    // memory
-    Aig_Obj_t **     pMemClasses;      // memory allocated for equivalence classes
-    Aig_Obj_t **     pMemClassesFree;  // memory allocated for equivalence classes to be used
-    // temporary data
-    Vec_Ptr_t *      vClassOld;        // old equivalence class after splitting
-    Vec_Ptr_t *      vClassNew;        // new equivalence class(es) after splitting
-    Vec_Ptr_t *      vRefined;         // the nodes refined since the last iteration
-    // procedures used for class refinement
-    void *           pManData;
-    unsigned (*pFuncNodeHash) (void *,Aig_Obj_t *);              // returns hash key of the node
-    int (*pFuncNodeIsConst)   (void *,Aig_Obj_t *);              // returns 1 if the node is a constant
-    int (*pFuncNodesAreEqual) (void *,Aig_Obj_t *, Aig_Obj_t *); // returns 1 if nodes are equal up to a complement
-};
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-static inline Aig_Obj_t *  Ssw_ObjNext( Aig_Obj_t ** ppNexts, Aig_Obj_t * pObj )                       { return ppNexts[pObj->Id];  }
-static inline void         Ssw_ObjSetNext( Aig_Obj_t ** ppNexts, Aig_Obj_t * pObj, Aig_Obj_t * pNext ) { ppNexts[pObj->Id] = pNext; }
-
-// iterator through the equivalence classes
-#define Ssw_ManForEachClass( p, ppClass, i )                 \
-    for ( i = 0; i < Aig_ManObjNumMax(p->pAig); i++ )        \
-        if ( ((ppClass) = p->pId2Class[i]) == NULL ) {} else
-// iterator through the nodes in one class
-#define Ssw_ClassForEachNode( p, pRepr, pNode, i )           \
-    for ( i = 0; i < p->pClassSizes[pRepr->Id]; i++ )        \
-        if ( ((pNode) = p->pId2Class[pRepr->Id][i]) == NULL ) {} else
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates one equivalence class.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline void Ssw_ObjAddClass( Ssw_Cla_t * p, Aig_Obj_t * pRepr, Aig_Obj_t ** pClass, int nSize ) 
-{
-    assert( p->pId2Class[pRepr->Id] == NULL );
-    assert( pClass[0] == pRepr );
-    p->pId2Class[pRepr->Id] = pClass; 
-    assert( p->pClassSizes[pRepr->Id] == 0 );
-    assert( nSize > 1 );
-    p->pClassSizes[pRepr->Id] = nSize;
-    p->nClasses++;
-    p->nLits += nSize - 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Removes one equivalence class.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static inline Aig_Obj_t ** Ssw_ObjRemoveClass( Ssw_Cla_t * p, Aig_Obj_t * pRepr ) 
-{
-    Aig_Obj_t ** pClass = p->pId2Class[pRepr->Id];
-    int nSize;
-    assert( pClass != NULL );
-    p->pId2Class[pRepr->Id] = NULL; 
-    nSize = p->pClassSizes[pRepr->Id];
-    assert( nSize > 1 );
-    p->nClasses--;
-    p->nLits -= nSize - 1;
-    p->pClassSizes[pRepr->Id] = 0;
-    return pClass;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Cla_t * Ssw_ClassesStart( Aig_Man_t * pAig )
-{
-    Ssw_Cla_t * p;
-    p = ABC_ALLOC( Ssw_Cla_t, 1 );
-    memset( p, 0, sizeof(Ssw_Cla_t) );
-    p->pAig         = pAig;
-    p->pId2Class    = ABC_CALLOC( Aig_Obj_t **, Aig_ManObjNumMax(pAig) );
-    p->pClassSizes  = ABC_CALLOC( int, Aig_ManObjNumMax(pAig) );
-    p->vClassOld    = Vec_PtrAlloc( 100 );
-    p->vClassNew    = Vec_PtrAlloc( 100 );
-    p->vRefined     = Vec_PtrAlloc( 1000 );
-    if ( pAig->pReprs == NULL )
-        Aig_ManReprStart( pAig, Aig_ManObjNumMax(pAig) );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Starts representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ClassesSetData( Ssw_Cla_t * p, void * pManData, 
-    unsigned (*pFuncNodeHash)(void *,Aig_Obj_t *),               // returns hash key of the node
-    int (*pFuncNodeIsConst)(void *,Aig_Obj_t *),                 // returns 1 if the node is a constant
-    int (*pFuncNodesAreEqual)(void *,Aig_Obj_t *, Aig_Obj_t *) ) // returns 1 if nodes are equal up to a complement
-{
-    p->pManData           = pManData;
-    p->pFuncNodeHash      = pFuncNodeHash;
-    p->pFuncNodeIsConst   = pFuncNodeIsConst;
-    p->pFuncNodesAreEqual = pFuncNodesAreEqual;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stop representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ClassesStop( Ssw_Cla_t * p )
-{
-    if ( p->vClassNew )    Vec_PtrFree( p->vClassNew );
-    if ( p->vClassOld )    Vec_PtrFree( p->vClassOld );
-    Vec_PtrFree( p->vRefined );
-    ABC_FREE( p->pId2Class );
-    ABC_FREE( p->pClassSizes );
-    ABC_FREE( p->pMemClasses );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stop representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ssw_ClassesReadAig( Ssw_Cla_t * p )
-{
-    return p->pAig;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Ssw_ClassesGetRefined( Ssw_Cla_t * p )
-{
-    return p->vRefined;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ClassesClearRefined( Ssw_Cla_t * p )
-{
-    Vec_PtrClear( p->vRefined );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stop representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ClassesCand1Num( Ssw_Cla_t * p )
-{
-    return p->nCands1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stop representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ClassesClassNum( Ssw_Cla_t * p )
-{
-    return p->nClasses;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stop representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ClassesLitNum( Ssw_Cla_t * p )
-{
-    return p->nLits;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stop representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t ** Ssw_ClassesReadClass( Ssw_Cla_t * p, Aig_Obj_t * pRepr, int * pnSize )
-{
-    if ( p->pId2Class[pRepr->Id] == NULL )
-        return NULL;
-    assert( p->pId2Class[pRepr->Id] != NULL );
-    assert( p->pClassSizes[pRepr->Id] > 1 );
-    *pnSize = p->pClassSizes[pRepr->Id];
-    return p->pId2Class[pRepr->Id];
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stop representation of equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ClassesCollectClass( Ssw_Cla_t * p, Aig_Obj_t * pRepr, Vec_Ptr_t * vClass )
-{
-    int i;
-    Vec_PtrClear( vClass );
-    if ( p->pId2Class[pRepr->Id] == NULL )
-        return;
-    assert( p->pClassSizes[pRepr->Id] > 1 );
-    for ( i = 1; i < p->pClassSizes[pRepr->Id]; i++ )
-        Vec_PtrPush( vClass, p->pId2Class[pRepr->Id][i] );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks candidate equivalence classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ClassesCheck( Ssw_Cla_t * p )
-{
-    Aig_Obj_t * pObj, * pPrev, ** ppClass;
-    int i, k, nLits, nClasses, nCands1;
-    nClasses = nLits = 0;
-    Ssw_ManForEachClass( p, ppClass, k )
-    {
-        pPrev = NULL;
-        assert( p->pClassSizes[ppClass[0]->Id] >= 2 );
-        Ssw_ClassForEachNode( p, ppClass[0], pObj, i )
-        {
-            if ( i == 0 )
-                assert( Aig_ObjRepr(p->pAig, pObj) == NULL );
-            else
-            {
-                assert( Aig_ObjRepr(p->pAig, pObj) == ppClass[0] );
-                assert( pPrev->Id < pObj->Id );
-                nLits++;
-            }
-            pPrev = pObj;
-        }
-        nClasses++;
-    }
-    nCands1 = 0;
-    Aig_ManForEachObj( p->pAig, pObj, i )
-        nCands1 += Ssw_ObjIsConst1Cand( p->pAig, pObj );
-    assert( p->nLits == nLits );
-    assert( p->nCands1 == nCands1 );
-    assert( p->nClasses == nClasses );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints simulation classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ClassesPrintOne( Ssw_Cla_t * p, Aig_Obj_t * pRepr )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    printf( "{ " );
-    Ssw_ClassForEachNode( p, pRepr, pObj, i )
-        printf( "%d(%d,%d,%d) ", pObj->Id, pObj->Level, 
-        Aig_SupportSize(p->pAig,pObj), Aig_NodeMffcSupp(p->pAig,pObj,0,NULL) );
-    printf( "}\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints simulation classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ClassesPrint( Ssw_Cla_t * p, int fVeryVerbose )
-{
-    Aig_Obj_t ** ppClass;
-    Aig_Obj_t * pObj;
-    int i;
-    printf( "Equiv classes: Const1 = %5d. Class = %5d. Lit = %5d.\n", 
-        p->nCands1, p->nClasses, p->nCands1+p->nLits );
-    if ( !fVeryVerbose )
-        return;
-    printf( "Constants { " );
-    Aig_ManForEachObj( p->pAig, pObj, i )
-        if ( Ssw_ObjIsConst1Cand( p->pAig, pObj ) )
-            printf( "%d(%d,%d,%d) ", pObj->Id, pObj->Level, 
-            Aig_SupportSize(p->pAig,pObj), Aig_NodeMffcSupp(p->pAig,pObj,0,NULL) );
-    printf( "}\n" );
-    Ssw_ManForEachClass( p, ppClass, i )
-    {
-        printf( "%3d (%3d) : ", i, p->pClassSizes[i] );
-        Ssw_ClassesPrintOne( p, ppClass[0] );
-    }
-    printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints simulation classes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ClassesRemoveNode( Ssw_Cla_t * p, Aig_Obj_t * pObj )
-{
-    Aig_Obj_t * pRepr, * pTemp;
-    assert( p->pClassSizes[pObj->Id] == 0 );
-    assert( p->pId2Class[pObj->Id] == NULL );
-    pRepr = Aig_ObjRepr( p->pAig, pObj );
-    assert( pRepr != NULL );
-//    Vec_PtrPush( p->vRefined, pObj );
-    if ( Ssw_ObjIsConst1Cand( p->pAig, pObj ) )
-    {
-        assert( p->pClassSizes[pRepr->Id] == 0 );
-        assert( p->pId2Class[pRepr->Id] == NULL );
-        Aig_ObjSetRepr( p->pAig, pObj, NULL );
-        p->nCands1--;
-        return;
-    }
-//    Vec_PtrPush( p->vRefined, pRepr );
-    Aig_ObjSetRepr( p->pAig, pObj, NULL );
-    assert( p->pId2Class[pRepr->Id][0] == pRepr );
-    assert( p->pClassSizes[pRepr->Id] >= 2 );
-    if ( p->pClassSizes[pRepr->Id] == 2 )
-    {
-        p->pId2Class[pRepr->Id] = NULL;
-        p->nClasses--;
-        p->pClassSizes[pRepr->Id] = 0;
-        p->nLits--;
-    }
-    else
-    {
-        int i, k = 0;
-        // remove the entry from the class
-        Ssw_ClassForEachNode( p, pRepr, pTemp, i )
-            if ( pTemp != pObj )
-                p->pId2Class[pRepr->Id][k++] = pTemp;
-        assert( k + 1 == p->pClassSizes[pRepr->Id] );
-        // reduce the class
-        p->pClassSizes[pRepr->Id]--;
-        p->nLits--;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Takes the set of const1 cands and rehashes them using sim info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ClassesPrepareRehash( Ssw_Cla_t * p, Vec_Ptr_t * vCands, int fConstCorr )
-{
-    Aig_Man_t * pAig = p->pAig;
-    Aig_Obj_t ** ppTable, ** ppNexts, ** ppClassNew;
-    Aig_Obj_t * pObj, * pTemp, * pRepr;
-    int i, k, nTableSize, nNodes, iEntry, nEntries, nEntries2;
-
-    // allocate the hash table hashing simulation info into nodes
-    nTableSize = Aig_PrimeCudd( Vec_PtrSize(vCands)/2 );
-    ppTable = ABC_CALLOC( Aig_Obj_t *, nTableSize ); 
-    ppNexts = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAig) ); 
-
-    // sort through the candidates
-    nEntries = 0;
-    p->nCands1 = 0;
-    Vec_PtrForEachEntry( Aig_Obj_t *, vCands, pObj, i )
-    {
-        assert( p->pClassSizes[pObj->Id] == 0 );
-        Aig_ObjSetRepr( p->pAig, pObj, NULL );
-        // check if the node belongs to the class of constant 1
-        if ( p->pFuncNodeIsConst( p->pManData, pObj ) )
-        {
-            Ssw_ObjSetConst1Cand( p->pAig, pObj );
-            p->nCands1++;
-            continue;
-        }
-        if ( fConstCorr )
-            continue;
-        // hash the node by its simulation info
-        iEntry = p->pFuncNodeHash( p->pManData, pObj ) % nTableSize;
-        // add the node to the class
-        if ( ppTable[iEntry] == NULL )
-        {
-            ppTable[iEntry] = pObj;
-        }
-        else
-        {
-            // set the representative of this node
-            pRepr = ppTable[iEntry];
-            Aig_ObjSetRepr( p->pAig, pObj, pRepr );
-            // add node to the table
-            if ( Ssw_ObjNext( ppNexts, pRepr ) == NULL )
-            { // this will be the second entry
-                p->pClassSizes[pRepr->Id]++;
-                nEntries++;
-            }
-            // add the entry to the list
-            Ssw_ObjSetNext( ppNexts, pObj, Ssw_ObjNext( ppNexts, pRepr ) );
-            Ssw_ObjSetNext( ppNexts, pRepr, pObj );
-            p->pClassSizes[pRepr->Id]++;
-            nEntries++;
-        }
-    }
- 
-    // copy the entries into storage in the topological order
-    nEntries2 = 0;
-    Vec_PtrForEachEntry( Aig_Obj_t *, vCands, pObj, i )
-    {
-        nNodes = p->pClassSizes[pObj->Id];
-        // skip the nodes that are not representatives of non-trivial classes
-        if ( nNodes == 0 )
-            continue;
-        assert( nNodes > 1 );
-        // add the nodes to the class in the topological order
-        ppClassNew = p->pMemClassesFree + nEntries2;
-        ppClassNew[0] = pObj;
-        for ( pTemp = Ssw_ObjNext(ppNexts, pObj), k = 1; pTemp; 
-              pTemp = Ssw_ObjNext(ppNexts, pTemp), k++ )
-        {
-            ppClassNew[nNodes-k] = pTemp;
-        }
-        // add the class of nodes
-        p->pClassSizes[pObj->Id] = 0;
-        Ssw_ObjAddClass( p, pObj, ppClassNew, nNodes );
-        // increment the number of entries
-        nEntries2 += nNodes;
-    }
-    p->pMemClassesFree += nEntries2;
-    assert( nEntries == nEntries2 );
-    ABC_FREE( ppTable );
-    ABC_FREE( ppNexts );
-    // now it is time to refine the classes
-    return Ssw_ClassesRefine( p, 1 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates initial simulation classes.]
-
-  Description [Assumes that simulation info is assigned.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Cla_t * Ssw_ClassesPrepare( Aig_Man_t * pAig, int nFramesK, int fLatchCorr, int fConstCorr, int fOutputCorr, int nMaxLevs, int fVerbose )
-{
-//    int nFrames =  4;
-//    int nWords  =  1;
-//    int nIters  = 16;
-
-//    int nFrames = 32;
-//    int nWords  =  4;
-//    int nIters  =  0;
-
-    int nFrames =  ABC_MAX( nFramesK, 4 );
-    int nWords  =  2;
-    int nIters  = 16;
-    Ssw_Cla_t * p;
-    Ssw_Sml_t * pSml;
-    Vec_Ptr_t * vCands;
-    Aig_Obj_t * pObj;
-    int i, k, RetValue, clk;
-
-    // start the classes
-    p = Ssw_ClassesStart( pAig );
-    p->fConstCorr = fConstCorr;
-
-    // perform sequential simulation
-clk = clock();
-    pSml = Ssw_SmlSimulateSeq( pAig, 0, nFrames, nWords );
-if ( fVerbose )
-{
-    printf( "Allocated %.2f Mb to store simulation information.\n", 
-        1.0*(sizeof(unsigned) * Aig_ManObjNumMax(pAig) * nFrames * nWords)/(1<<20) );
-    printf( "Initial simulation of %d frames with %d words.     ", nFrames, nWords );
-    ABC_PRT( "Time", clock() - clk );
-}
-
-    // set comparison procedures
-clk = clock();
-    Ssw_ClassesSetData( p, pSml, (unsigned(*)(void *,Aig_Obj_t *))Ssw_SmlObjHashWord, (int(*)(void *,Aig_Obj_t *))Ssw_SmlObjIsConstWord, (int(*)(void *,Aig_Obj_t *,Aig_Obj_t *))Ssw_SmlObjsAreEqualWord );
-
-    // collect nodes to be considered as candidates
-    vCands = Vec_PtrAlloc( 1000 );
-    Aig_ManForEachObj( p->pAig, pObj, i )
-    {
-        if ( fLatchCorr )
-        {
-            if ( !Saig_ObjIsLo(p->pAig, pObj) )
-                continue;
-        }
-        else
-        {
-            if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
-                continue;
-            // skip the node with more that the given number of levels
-            if ( nMaxLevs && (int)pObj->Level > nMaxLevs )
-                continue;
-        }
-        Vec_PtrPush( vCands, pObj );
-    }
- 
-    // this change will consider all PO drivers
-    if ( fOutputCorr )
-    {
-        Vec_PtrClear( vCands );
-        Aig_ManForEachObj( p->pAig, pObj, i )
-            pObj->fMarkB = 0;
-        Saig_ManForEachPo( p->pAig, pObj, i )
-            if ( Aig_ObjIsCand(Aig_ObjFanin0(pObj)) )
-                Aig_ObjFanin0(pObj)->fMarkB = 1;
-        Aig_ManForEachObj( p->pAig, pObj, i )
-            if ( pObj->fMarkB )
-                Vec_PtrPush( vCands, pObj );
-        Aig_ManForEachObj( p->pAig, pObj, i )
-            pObj->fMarkB = 0;
-    }
-
-    // allocate room for classes
-    p->pMemClasses = ABC_ALLOC( Aig_Obj_t *, Vec_PtrSize(vCands) );
-    p->pMemClassesFree = p->pMemClasses;
-
-    // now it is time to refine the classes
-    Ssw_ClassesPrepareRehash( p, vCands, fConstCorr );
-if ( fVerbose )
-{
-    printf( "Collecting candidate equivalence classes.        " );
-ABC_PRT( "Time", clock() - clk );
-}
-
-clk = clock();
-    // perform iterative refinement using simulation
-    for ( i = 1; i < nIters; i++ )
-    {
-        // collect const1 candidates
-        Vec_PtrClear( vCands );
-        Aig_ManForEachObj( p->pAig, pObj, k )
-            if ( Ssw_ObjIsConst1Cand( p->pAig, pObj ) )
-                Vec_PtrPush( vCands, pObj );
-        assert( Vec_PtrSize(vCands) == p->nCands1 );
-        // perform new round of simulation
-        Ssw_SmlResimulateSeq( pSml );
-        // check equivalence classes
-        RetValue = Ssw_ClassesPrepareRehash( p, vCands, fConstCorr );
-        if ( RetValue == 0 )
-            break;
-    }
-    Ssw_SmlStop( pSml );
-    Vec_PtrFree( vCands );
-if ( fVerbose )
-{
-    printf( "Simulation of %d frames with %d words (%2d rounds). ", 
-        nFrames, nWords, i-1 );
-    ABC_PRT( "Time", clock() - clk );
-}
-    Ssw_ClassesCheck( p );
-//    Ssw_ClassesPrint( p, 0 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates initial simulation classes.]
-
-  Description [Assumes that simulation info is assigned.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Cla_t * Ssw_ClassesPrepareSimple( Aig_Man_t * pAig, int fLatchCorr, int nMaxLevs )
-{
-    Ssw_Cla_t * p;
-    Aig_Obj_t * pObj;
-    int i;
-    // start the classes
-    p = Ssw_ClassesStart( pAig );
-    // go through the nodes
-    p->nCands1 = 0;
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        if ( fLatchCorr )
-        {
-            if ( !Saig_ObjIsLo(pAig, pObj) )
-                continue;
-        }
-        else
-        {
-            if ( !Aig_ObjIsNode(pObj) && !Saig_ObjIsLo(pAig, pObj) )
-                continue;
-            // skip the node with more that the given number of levels
-            if ( nMaxLevs && (int)pObj->Level > nMaxLevs )
-                continue;
-        }
-        Ssw_ObjSetConst1Cand( pAig, pObj );
-        p->nCands1++;
-    }
-    // allocate room for classes
-    p->pMemClassesFree = p->pMemClasses = ABC_ALLOC( Aig_Obj_t *, p->nCands1 );
-//    Ssw_ClassesPrint( p, 0 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates initial simulation classes.]
-
-  Description [Assumes that simulation info is assigned.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Cla_t * Ssw_ClassesPrepareFromReprs( Aig_Man_t * pAig )
-{
-    Ssw_Cla_t * p;
-    Aig_Obj_t * pObj, * pRepr;
-    int * pClassSizes, nEntries, i;
-    // start the classes
-    p = Ssw_ClassesStart( pAig );
-    // allocate memory for classes
-    p->pMemClasses = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(pAig) );
-    // count classes
-    p->nCands1 = 0;
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        if ( Ssw_ObjIsConst1Cand(pAig, pObj) )
-        {
-            p->nCands1++;
-            continue;
-        }
-        if ( (pRepr = Aig_ObjRepr(pAig, pObj)) )
-        {
-            if ( p->pClassSizes[pRepr->Id]++ == 0 )
-                p->pClassSizes[pRepr->Id]++;
-        }
-    }
-    // add nodes
-    nEntries = 0;
-    p->nClasses = 0;
-    pClassSizes = ABC_CALLOC( int, Aig_ManObjNumMax(pAig) );
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        if ( p->pClassSizes[i] )
-        {
-            p->pId2Class[i] = p->pMemClasses + nEntries;
-            nEntries += p->pClassSizes[i];
-            p->pId2Class[i][pClassSizes[i]++] = pObj;
-            p->nClasses++;
-            continue;
-        }
-        if ( Ssw_ObjIsConst1Cand(pAig, pObj) )
-            continue;
-        if ( (pRepr = Aig_ObjRepr(pAig, pObj)) )
-            p->pId2Class[pRepr->Id][pClassSizes[pRepr->Id]++] = pObj;
-    }
-    p->pMemClassesFree = p->pMemClasses + nEntries;
-    p->nLits = nEntries - p->nClasses;
-    assert( memcmp(pClassSizes, p->pClassSizes, sizeof(int)*Aig_ManObjNumMax(pAig)) == 0 );
-    ABC_FREE( pClassSizes );
-//    printf( "After converting:\n" );
-//    Ssw_ClassesPrint( p, 0 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates initial simulation classes.]
-
-  Description [Assumes that simulation info is assigned.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Cla_t * Ssw_ClassesPrepareTargets( Aig_Man_t * pAig )
-{
-    Ssw_Cla_t * p;
-    Aig_Obj_t * pObj;
-    int i;
-    // start the classes
-    p = Ssw_ClassesStart( pAig );
-    // go through the nodes
-    p->nCands1 = 0;
-    Saig_ManForEachPo( pAig, pObj, i )
-    {
-        Ssw_ObjSetConst1Cand( pAig, Aig_ObjFanin0(pObj) );
-        p->nCands1++;
-    }
-    // allocate room for classes
-    p->pMemClassesFree = p->pMemClasses = ABC_ALLOC( Aig_Obj_t *, p->nCands1 );
-//    Ssw_ClassesPrint( p, 0 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates classes from the temporary representation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Cla_t * Ssw_ClassesPreparePairs( Aig_Man_t * pAig, Vec_Int_t ** pvClasses )
-{
-    Ssw_Cla_t * p;
-    Aig_Obj_t ** ppClassNew;
-    Aig_Obj_t * pObj, * pRepr, * pPrev;
-    int i, k, nTotalObjs, nEntries, Entry;
-    // start the classes
-    p = Ssw_ClassesStart( pAig );
-    // count the number of entries in the classes
-    nTotalObjs = 0;
-    for ( i = 0; i < Aig_ManObjNumMax(pAig); i++ )
-        nTotalObjs += pvClasses[i] ? Vec_IntSize(pvClasses[i]) : 0; 
-    // allocate memory for classes
-    p->pMemClasses = ABC_ALLOC( Aig_Obj_t *, nTotalObjs );
-    // create constant-1 class
-    if ( pvClasses[0] )
-    Vec_IntForEachEntry( pvClasses[0], Entry, i )
-    {
-        assert( (i == 0) == (Entry == 0) );
-        if ( i == 0 )
-            continue;
-        pObj = Aig_ManObj( pAig, Entry );
-        Ssw_ObjSetConst1Cand( pAig, pObj );
-        p->nCands1++;
-    }
-    // create classes
-    nEntries = 0;
-    for ( i = 1; i < Aig_ManObjNumMax(pAig); i++ )
-    {
-        if ( pvClasses[i] == NULL )
-            continue;
-        // get room for storing the class
-        ppClassNew = p->pMemClasses + nEntries;
-        nEntries  += Vec_IntSize( pvClasses[i] );
-        // store the nodes of the class
-        pPrev = pRepr = Aig_ManObj( pAig, Vec_IntEntry(pvClasses[i],0) );
-        ppClassNew[0] = pRepr;
-        Vec_IntForEachEntryStart( pvClasses[i], Entry, k, 1 )
-        {
-            pObj = Aig_ManObj( pAig, Entry );
-            assert( pPrev->Id < pObj->Id );
-            pPrev = pObj;
-            ppClassNew[k] = pObj;
-            Aig_ObjSetRepr( pAig, pObj, pRepr );
-        }
-        // create new class
-        Ssw_ObjAddClass( p, pRepr, ppClassNew, Vec_IntSize(pvClasses[i]) );
-    }
-    // prepare room for new classes
-    p->pMemClassesFree = p->pMemClasses + nEntries;
-    Ssw_ClassesCheck( p );
-//    Ssw_ClassesPrint( p, 0 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates classes from the temporary representation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Cla_t * Ssw_ClassesPreparePairsSimple( Aig_Man_t * pMiter, Vec_Int_t * vPairs )
-{
-    Ssw_Cla_t * p;
-    Aig_Obj_t ** ppClassNew;
-    Aig_Obj_t * pObj, * pRepr;
-    int i;
-    // start the classes
-    p = Ssw_ClassesStart( pMiter );
-    // allocate memory for classes
-    p->pMemClasses = ABC_ALLOC( Aig_Obj_t *, Vec_IntSize(vPairs) );
-    // create classes
-    for ( i = 0; i < Vec_IntSize(vPairs); i += 2 )
-    {
-        pRepr = Aig_ManObj( pMiter, Vec_IntEntry(vPairs, i) );
-        pObj  = Aig_ManObj( pMiter, Vec_IntEntry(vPairs, i+1) );
-        assert( Aig_ObjId(pRepr) < Aig_ObjId(pObj) );
-        Aig_ObjSetRepr( pMiter, pObj, pRepr );
-        // get room for storing the class
-        ppClassNew = p->pMemClasses + i;
-        ppClassNew[0] = pRepr;
-        ppClassNew[1] = pObj;
-        // create new class
-        Ssw_ObjAddClass( p, pRepr, ppClassNew, 2 );
-    }
-    // prepare room for new classes
-    p->pMemClassesFree = NULL;
-    Ssw_ClassesCheck( p );
-//    Ssw_ClassesPrint( p, 0 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Iteratively refines the classes after simulation.]
-
-  Description [Returns the number of refinements performed.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ClassesRefineOneClass( Ssw_Cla_t * p, Aig_Obj_t * pReprOld, int fRecursive )
-{
-    Aig_Obj_t ** pClassOld, ** pClassNew;
-    Aig_Obj_t * pObj, * pReprNew;
-    int i; 
-
-    // split the class
-    Vec_PtrClear( p->vClassOld );
-    Vec_PtrClear( p->vClassNew );
-    Ssw_ClassForEachNode( p, pReprOld, pObj, i )
-        if ( p->pFuncNodesAreEqual(p->pManData, pReprOld, pObj) )
-            Vec_PtrPush( p->vClassOld, pObj );
-        else
-            Vec_PtrPush( p->vClassNew, pObj );
-    // check if splitting happened
-    if ( Vec_PtrSize(p->vClassNew) == 0 )
-        return 0;
-    // remember that this class is refined
-//    Ssw_ClassForEachNode( p, pReprOld, pObj, i )
-//        Vec_PtrPush( p->vRefined, pObj );
-
-    // get the new representative
-    pReprNew = (Aig_Obj_t *)Vec_PtrEntry( p->vClassNew, 0 );
-    assert( Vec_PtrSize(p->vClassOld) > 0 );
-    assert( Vec_PtrSize(p->vClassNew) > 0 );
-
-    // create old class
-    pClassOld = Ssw_ObjRemoveClass( p, pReprOld );
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassOld, pObj, i )
-    {
-        pClassOld[i] = pObj;
-        Aig_ObjSetRepr( p->pAig, pObj, i? pReprOld : NULL );
-    }
-    // create new class
-    pClassNew = pClassOld + i;
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassNew, pObj, i )
-    {
-        pClassNew[i] = pObj;
-        Aig_ObjSetRepr( p->pAig, pObj, i? pReprNew : NULL );
-    }
-
-    // put classes back
-    if ( Vec_PtrSize(p->vClassOld) > 1 )
-        Ssw_ObjAddClass( p, pReprOld, pClassOld, Vec_PtrSize(p->vClassOld) );
-    if ( Vec_PtrSize(p->vClassNew) > 1 )
-        Ssw_ObjAddClass( p, pReprNew, pClassNew, Vec_PtrSize(p->vClassNew) );
-
-    // check if the class should be recursively refined
-    if ( fRecursive && Vec_PtrSize(p->vClassNew) > 1 )
-        return 1 + Ssw_ClassesRefineOneClass( p, pReprNew, 1 );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Refines the classes after simulation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ClassesRefine( Ssw_Cla_t * p, int fRecursive )
-{
-    Aig_Obj_t ** ppClass;
-    int i, nRefis = 0;
-    Ssw_ManForEachClass( p, ppClass, i )
-        nRefis += Ssw_ClassesRefineOneClass( p, ppClass[0], fRecursive );
-    return nRefis;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Refines the classes after simulation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ClassesRefineGroup( Ssw_Cla_t * p, Vec_Ptr_t * vReprs, int fRecursive )
-{
-    Aig_Obj_t * pObj;
-    int i, nRefis = 0;
-    Vec_PtrForEachEntry( Aig_Obj_t *, vReprs, pObj, i )
-        nRefis += Ssw_ClassesRefineOneClass( p, pObj, fRecursive );
-    return nRefis;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Refine the group of constant 1 nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ClassesRefineConst1Group( Ssw_Cla_t * p, Vec_Ptr_t * vRoots, int fRecursive )
-{
-    Aig_Obj_t * pObj, * pReprNew, ** ppClassNew;
-    int i;
-    if ( Vec_PtrSize(vRoots) == 0 )
-        return 0;
-    // collect the nodes to be refined
-    Vec_PtrClear( p->vClassNew );
-    Vec_PtrForEachEntry( Aig_Obj_t *, vRoots, pObj, i )
-        if ( !p->pFuncNodeIsConst( p->pManData, pObj ) )
-            Vec_PtrPush( p->vClassNew, pObj );
-    // check if there is a new class
-    if ( Vec_PtrSize(p->vClassNew) == 0 )
-        return 0;
-    p->nCands1 -= Vec_PtrSize(p->vClassNew);
-    pReprNew = (Aig_Obj_t *)Vec_PtrEntry( p->vClassNew, 0 );
-    Aig_ObjSetRepr( p->pAig, pReprNew, NULL );
-    if ( Vec_PtrSize(p->vClassNew) == 1 )
-        return 1;
-    // create a new class composed of these nodes
-    ppClassNew = p->pMemClassesFree;
-    p->pMemClassesFree += Vec_PtrSize(p->vClassNew);
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassNew, pObj, i )
-    {
-        ppClassNew[i] = pObj;
-        Aig_ObjSetRepr( p->pAig, pObj, i? pReprNew : NULL );
-    }
-    Ssw_ObjAddClass( p, pReprNew, ppClassNew, Vec_PtrSize(p->vClassNew) );
-    // refine them recursively
-    if ( fRecursive )
-        return 1 + Ssw_ClassesRefineOneClass( p, pReprNew, 1 );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Refine the group of constant 1 nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ClassesRefineConst1( Ssw_Cla_t * p, int fRecursive )
-{
-    Aig_Obj_t * pObj, * pReprNew, ** ppClassNew;
-    int i;
-    // collect the nodes to be refined
-    Vec_PtrClear( p->vClassNew );
-    for ( i = 0; i < Vec_PtrSize(p->pAig->vObjs); i++ )
-        if ( p->pAig->pReprs[i] == Aig_ManConst1(p->pAig) )
-        {
-            pObj = Aig_ManObj( p->pAig, i );
-            if ( !p->pFuncNodeIsConst( p->pManData, pObj ) )
-            {
-                Vec_PtrPush( p->vClassNew, pObj );
-//                Vec_PtrPush( p->vRefined, pObj );
-            }
-        }
-    // check if there is a new class
-    if ( Vec_PtrSize(p->vClassNew) == 0 )
-        return 0;
-    if ( p->fConstCorr )
-    {
-        Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassNew, pObj, i )
-            Aig_ObjSetRepr( p->pAig, pObj, NULL );
-        return 1;
-    }
-    p->nCands1 -= Vec_PtrSize(p->vClassNew);
-    pReprNew = (Aig_Obj_t *)Vec_PtrEntry( p->vClassNew, 0 );
-    Aig_ObjSetRepr( p->pAig, pReprNew, NULL );
-    if ( Vec_PtrSize(p->vClassNew) == 1 )
-        return 1;
-    // create a new class composed of these nodes
-    ppClassNew = p->pMemClassesFree;
-    p->pMemClassesFree += Vec_PtrSize(p->vClassNew);
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vClassNew, pObj, i )
-    {
-        ppClassNew[i] = pObj;
-        Aig_ObjSetRepr( p->pAig, pObj, i? pReprNew : NULL );
-    }
-    Ssw_ObjAddClass( p, pReprNew, ppClassNew, Vec_PtrSize(p->vClassNew) );
-    // refine them recursively
-    if ( fRecursive )
-        return 1 + Ssw_ClassesRefineOneClass( p, pReprNew, 1 );
-    return 1;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswCnf.c b/src/aig/ssw/sswCnf.c
deleted file mode 100644
index 1970c62f..00000000
--- a/src/aig/ssw/sswCnf.c
+++ /dev/null
@@ -1,428 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswCnf.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Computation of CNF.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswCnf.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the SAT manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Sat_t * Ssw_SatStart( int fPolarFlip )
-{
-    Ssw_Sat_t * p;
-    int Lit;
-    p = ABC_ALLOC( Ssw_Sat_t, 1 ); 
-    memset( p, 0, sizeof(Ssw_Sat_t) );
-    p->pAig          = NULL;
-    p->fPolarFlip    = fPolarFlip;
-    p->vSatVars      = Vec_IntStart( 10000 );
-    p->vFanins       = Vec_PtrAlloc( 100 );
-    p->vUsedPis      = Vec_PtrAlloc( 100 );
-    p->pSat          = sat_solver_new();
-    sat_solver_setnvars( p->pSat, 1000 );
-    // var 0 is not used
-    // var 1 is reserved for const1 node - add the clause
-    p->nSatVars = 1;
-    Lit = toLit( p->nSatVars );
-    if ( fPolarFlip )
-        Lit = lit_neg( Lit );
-    sat_solver_addclause( p->pSat, &Lit, &Lit + 1 );
-//    Ssw_ObjSetSatNum( p, Aig_ManConst1(p->pAig), p->nSatVars++ );
-    Vec_IntWriteEntry( p->vSatVars, 0, p->nSatVars++ );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stop the SAT manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SatStop( Ssw_Sat_t * p )
-{
-//    printf( "Recycling SAT solver with %d vars and %d restarts.\n", 
-//        p->pSat->size, p->pSat->stats.starts );
-    if ( p->pSat )
-        sat_solver_delete( p->pSat );
-    Vec_IntFree( p->vSatVars );
-    Vec_PtrFree( p->vFanins );
-    Vec_PtrFree( p->vUsedPis );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Addes clauses to the solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_AddClausesMux( Ssw_Sat_t * p, Aig_Obj_t * pNode )
-{
-    Aig_Obj_t * pNodeI, * pNodeT, * pNodeE;
-    int pLits[4], RetValue, VarF, VarI, VarT, VarE, fCompT, fCompE;
-
-    assert( !Aig_IsComplement( pNode ) );
-    assert( Aig_ObjIsMuxType( pNode ) );
-    // get nodes (I = if, T = then, E = else)
-    pNodeI = Aig_ObjRecognizeMux( pNode, &pNodeT, &pNodeE );
-    // get the variable numbers
-    VarF = Ssw_ObjSatNum(p,pNode);
-    VarI = Ssw_ObjSatNum(p,pNodeI);
-    VarT = Ssw_ObjSatNum(p,Aig_Regular(pNodeT));
-    VarE = Ssw_ObjSatNum(p,Aig_Regular(pNodeE));
-    // get the complementation flags
-    fCompT = Aig_IsComplement(pNodeT);
-    fCompE = Aig_IsComplement(pNodeE);
-
-    // f = ITE(i, t, e)
-
-    // i' + t' + f
-    // i' + t  + f'
-    // i  + e' + f
-    // i  + e  + f'
-
-    // create four clauses
-    pLits[0] = toLitCond(VarI, 1);
-    pLits[1] = toLitCond(VarT, 1^fCompT);
-    pLits[2] = toLitCond(VarF, 0);
-    if ( p->fPolarFlip )
-    {
-        if ( pNodeI->fPhase )               pLits[0] = lit_neg( pLits[0] );
-        if ( Aig_Regular(pNodeT)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarI, 1);
-    pLits[1] = toLitCond(VarT, 0^fCompT);
-    pLits[2] = toLitCond(VarF, 1);
-    if ( p->fPolarFlip )
-    {
-        if ( pNodeI->fPhase )               pLits[0] = lit_neg( pLits[0] );
-        if ( Aig_Regular(pNodeT)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarI, 0);
-    pLits[1] = toLitCond(VarE, 1^fCompE);
-    pLits[2] = toLitCond(VarF, 0);
-    if ( p->fPolarFlip )
-    {
-        if ( pNodeI->fPhase )               pLits[0] = lit_neg( pLits[0] );
-        if ( Aig_Regular(pNodeE)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarI, 0);
-    pLits[1] = toLitCond(VarE, 0^fCompE);
-    pLits[2] = toLitCond(VarF, 1);
-    if ( p->fPolarFlip )
-    {
-        if ( pNodeI->fPhase )               pLits[0] = lit_neg( pLits[0] );
-        if ( Aig_Regular(pNodeE)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-
-    // two additional clauses
-    // t' & e' -> f'
-    // t  & e  -> f 
-
-    // t  + e   + f'
-    // t' + e'  + f 
-
-    if ( VarT == VarE )
-    {
-//        assert( fCompT == !fCompE );
-        return;
-    }
-
-    pLits[0] = toLitCond(VarT, 0^fCompT);
-    pLits[1] = toLitCond(VarE, 0^fCompE);
-    pLits[2] = toLitCond(VarF, 1);
-    if ( p->fPolarFlip )
-    {
-        if ( Aig_Regular(pNodeT)->fPhase )  pLits[0] = lit_neg( pLits[0] );
-        if ( Aig_Regular(pNodeE)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-    pLits[0] = toLitCond(VarT, 1^fCompT);
-    pLits[1] = toLitCond(VarE, 1^fCompE);
-    pLits[2] = toLitCond(VarF, 0);
-    if ( p->fPolarFlip )
-    {
-        if ( Aig_Regular(pNodeT)->fPhase )  pLits[0] = lit_neg( pLits[0] );
-        if ( Aig_Regular(pNodeE)->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        if ( pNode->fPhase )                pLits[2] = lit_neg( pLits[2] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 3 );
-    assert( RetValue );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Addes clauses to the solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_AddClausesSuper( Ssw_Sat_t * p, Aig_Obj_t * pNode, Vec_Ptr_t * vSuper )
-{
-    Aig_Obj_t * pFanin;
-    int * pLits, nLits, RetValue, i;
-    assert( !Aig_IsComplement(pNode) );
-    assert( Aig_ObjIsNode( pNode ) );
-    // create storage for literals
-    nLits = Vec_PtrSize(vSuper) + 1;
-    pLits = ABC_ALLOC( int, nLits );
-    // suppose AND-gate is A & B = C
-    // add !A => !C   or   A + !C
-    Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pFanin, i )
-    {
-        pLits[0] = toLitCond(Ssw_ObjSatNum(p,Aig_Regular(pFanin)), Aig_IsComplement(pFanin));
-        pLits[1] = toLitCond(Ssw_ObjSatNum(p,pNode), 1);
-        if ( p->fPolarFlip )
-        {
-            if ( Aig_Regular(pFanin)->fPhase )  pLits[0] = lit_neg( pLits[0] );
-            if ( pNode->fPhase )                pLits[1] = lit_neg( pLits[1] );
-        }
-        RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 2 );
-        assert( RetValue );
-    }
-    // add A & B => C   or   !A + !B + C
-    Vec_PtrForEachEntry( Aig_Obj_t *, vSuper, pFanin, i )
-    {
-        pLits[i] = toLitCond(Ssw_ObjSatNum(p,Aig_Regular(pFanin)), !Aig_IsComplement(pFanin));
-        if ( p->fPolarFlip )
-        {
-            if ( Aig_Regular(pFanin)->fPhase )  pLits[i] = lit_neg( pLits[i] );
-        }
-    }
-    pLits[nLits-1] = toLitCond(Ssw_ObjSatNum(p,pNode), 0);
-    if ( p->fPolarFlip )
-    {
-        if ( pNode->fPhase )  pLits[nLits-1] = lit_neg( pLits[nLits-1] );
-    }
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + nLits );
-    assert( RetValue );
-    ABC_FREE( pLits );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the supergate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_CollectSuper_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vSuper, int fFirst, int fUseMuxes )
-{
-    // if the new node is complemented or a PI, another gate begins
-    if ( Aig_IsComplement(pObj) || Aig_ObjIsPi(pObj) || 
-         (!fFirst && Aig_ObjRefs(pObj) > 1) || 
-         (fUseMuxes && Aig_ObjIsMuxType(pObj)) )
-    {
-        Vec_PtrPushUnique( vSuper, pObj );
-        return;
-    }
-//    pObj->fMarkA = 1;
-    // go through the branches
-    Ssw_CollectSuper_rec( Aig_ObjChild0(pObj), vSuper, 0, fUseMuxes );
-    Ssw_CollectSuper_rec( Aig_ObjChild1(pObj), vSuper, 0, fUseMuxes );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects the supergate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_CollectSuper( Aig_Obj_t * pObj, int fUseMuxes, Vec_Ptr_t * vSuper )
-{
-    assert( !Aig_IsComplement(pObj) );
-    assert( !Aig_ObjIsPi(pObj) );
-    Vec_PtrClear( vSuper );
-    Ssw_CollectSuper_rec( pObj, vSuper, 1, fUseMuxes );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the solver clause database.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ObjAddToFrontier( Ssw_Sat_t * p, Aig_Obj_t * pObj, Vec_Ptr_t * vFrontier )
-{
-    assert( !Aig_IsComplement(pObj) );
-    if ( Ssw_ObjSatNum(p,pObj) )
-        return;
-    assert( Ssw_ObjSatNum(p,pObj) == 0 );
-    if ( Aig_ObjIsConst1(pObj) )
-        return;
-//    pObj->fMarkA = 1;
-    // save PIs (used by register correspondence)
-    if ( Aig_ObjIsPi(pObj) )
-        Vec_PtrPush( p->vUsedPis, pObj );
-    Ssw_ObjSetSatNum( p, pObj, p->nSatVars++ );
-    sat_solver_setnvars( p->pSat, 100 * (1 + p->nSatVars / 100) );
-    if ( Aig_ObjIsNode(pObj) )
-        Vec_PtrPush( vFrontier, pObj );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates the solver clause database.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_CnfNodeAddToSolver( Ssw_Sat_t * p, Aig_Obj_t * pObj )
-{ 
-    Vec_Ptr_t * vFrontier;
-    Aig_Obj_t * pNode, * pFanin;
-    int i, k, fUseMuxes = 1;
-    // quit if CNF is ready
-    if ( Ssw_ObjSatNum(p,pObj) )
-        return;
-    // start the frontier
-    vFrontier = Vec_PtrAlloc( 100 );
-    Ssw_ObjAddToFrontier( p, pObj, vFrontier );
-    // explore nodes in the frontier
-    Vec_PtrForEachEntry( Aig_Obj_t *, vFrontier, pNode, i )
-    {
-        // create the supergate
-        assert( Ssw_ObjSatNum(p,pNode) );
-        if ( fUseMuxes && Aig_ObjIsMuxType(pNode) )
-        {
-            Vec_PtrClear( p->vFanins );
-            Vec_PtrPushUnique( p->vFanins, Aig_ObjFanin0( Aig_ObjFanin0(pNode) ) );
-            Vec_PtrPushUnique( p->vFanins, Aig_ObjFanin0( Aig_ObjFanin1(pNode) ) );
-            Vec_PtrPushUnique( p->vFanins, Aig_ObjFanin1( Aig_ObjFanin0(pNode) ) );
-            Vec_PtrPushUnique( p->vFanins, Aig_ObjFanin1( Aig_ObjFanin1(pNode) ) );
-            Vec_PtrForEachEntry( Aig_Obj_t *, p->vFanins, pFanin, k )
-                Ssw_ObjAddToFrontier( p, Aig_Regular(pFanin), vFrontier );
-            Ssw_AddClausesMux( p, pNode );
-        }
-        else
-        {
-            Ssw_CollectSuper( pNode, fUseMuxes, p->vFanins );
-            Vec_PtrForEachEntry( Aig_Obj_t *, p->vFanins, pFanin, k )
-                Ssw_ObjAddToFrontier( p, Aig_Regular(pFanin), vFrontier );
-            Ssw_AddClausesSuper( p, pNode, p->vFanins );
-        }
-        assert( Vec_PtrSize(p->vFanins) > 1 );
-    }
-    Vec_PtrFree( vFrontier );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Copy pattern from the solver into the internal storage.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_CnfGetNodeValue( Ssw_Sat_t * p, Aig_Obj_t * pObj )
-{
-    int Value0, Value1, nVarNum;
-    assert( !Aig_IsComplement(pObj) );
-    nVarNum = Ssw_ObjSatNum( p, pObj );
-    if ( nVarNum > 0 )
-        return sat_solver_var_value( p->pSat, nVarNum );
-//    if ( pObj->fMarkA == 1 )
-//        return 0;
-    if ( Aig_ObjIsPi(pObj) )
-        return 0;
-    assert( Aig_ObjIsNode(pObj) );
-    Value0 = Ssw_CnfGetNodeValue( p, Aig_ObjFanin0(pObj) );
-    Value0 ^= Aig_ObjFaninC0(pObj);
-    Value1 = Ssw_CnfGetNodeValue( p, Aig_ObjFanin1(pObj) );
-    Value1 ^= Aig_ObjFaninC1(pObj);
-    return Value0 & Value1;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswConstr.c b/src/aig/ssw/sswConstr.c
deleted file mode 100644
index 6af312ab..00000000
--- a/src/aig/ssw/sswConstr.c
+++ /dev/null
@@ -1,714 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswConstr.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [One round of SAT sweeping.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswConstr.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-#include "cnf.h"
-#include "bar.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Constructs initialized timeframes with constraints as POs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ssw_FramesWithConstraints( Aig_Man_t * p, int nFrames )
-{
-    Aig_Man_t * pFrames;
-    Aig_Obj_t * pObj, * pObjLi, * pObjLo;
-    int i, f;
-    assert( Saig_ManConstrNum(p) > 0 );
-    assert( Aig_ManRegNum(p) > 0 );
-    assert( Aig_ManRegNum(p) < Aig_ManPiNum(p) );
-    // start the fraig package
-    pFrames = Aig_ManStart( Aig_ManObjNumMax(p) * nFrames );
-    // create latches for the first frame
-    Saig_ManForEachLo( p, pObj, i )
-        Aig_ObjSetCopy( pObj, Aig_ManConst0(pFrames) );
-    // add timeframes
-    for ( f = 0; f < nFrames; f++ )
-    {
-        // map constants and PIs
-        Aig_ObjSetCopy( Aig_ManConst1(p), Aig_ManConst1(pFrames) );
-        Saig_ManForEachPi( p, pObj, i )
-            Aig_ObjSetCopy( pObj, Aig_ObjCreatePi(pFrames) );
-        // add internal nodes of this frame
-        Aig_ManForEachNode( p, pObj, i )
-            Aig_ObjSetCopy( pObj, Aig_And( pFrames, Aig_ObjChild0Copy(pObj), Aig_ObjChild1Copy(pObj) ) );
-        // transfer to the primary output
-        Aig_ManForEachPo( p, pObj, i )
-            Aig_ObjSetCopy( pObj, Aig_ObjChild0Copy(pObj) );
-        // create constraint outputs
-        Saig_ManForEachPo( p, pObj, i )
-        {
-            if ( i < Saig_ManPoNum(p) - Saig_ManConstrNum(p) )
-                continue;
-            Aig_ObjCreatePo( pFrames, Aig_Not( Aig_ObjCopy(pObj) ) );
-        }
-        // transfer latch inputs to the latch outputs 
-        Saig_ManForEachLiLo( p, pObjLi, pObjLo, i )
-            Aig_ObjSetCopy( pObjLo, Aig_ObjCopy(pObjLi) );
-    }
-    // remove dangling nodes
-    Aig_ManCleanup( pFrames );
-    return pFrames; 
-} 
-
-/**Function*************************************************************
-
-  Synopsis    [Finds one satisfiable assignment of the timeframes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSetConstrPhases( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
-{ 
-    Aig_Man_t * pFrames;
-    sat_solver * pSat;
-    Cnf_Dat_t * pCnf;
-    Aig_Obj_t * pObj; 
-    int i, RetValue;
-    if ( pvInits )
-        *pvInits = NULL;
-    assert( p->nConstrs > 0 );
-    // derive the timeframes
-    pFrames = Ssw_FramesWithConstraints( p, nFrames );
-    // create CNF
-    pCnf = Cnf_Derive( pFrames, 0 );  
-    // create SAT solver
-    pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, 1, 0 );
-    if ( pSat == NULL )
-    {
-        Cnf_DataFree( pCnf );
-        Aig_ManStop( pFrames );
-        return 1;
-    }
-    // solve
-    RetValue = sat_solver_solve( pSat, NULL, NULL, 
-        (ABC_INT64_T)1000000, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    if ( RetValue == l_True && pvInits )
-    {
-        *pvInits = Vec_IntAlloc( 1000 );
-        Aig_ManForEachPi( pFrames, pObj, i )
-            Vec_IntPush( *pvInits, sat_solver_var_value(pSat, pCnf->pVarNums[Aig_ObjId(pObj)]) );
-
-//        Aig_ManForEachPi( pFrames, pObj, i )
-//            printf( "%d", Vec_IntEntry(*pvInits, i) );
-//        printf( "\n" );
-    }
-    sat_solver_delete( pSat );
-    Cnf_DataFree( pCnf );
-    Aig_ManStop( pFrames );
-    if ( RetValue == l_False )
-        return 1;
-    if ( RetValue == l_True )
-        return 0;
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSetConstrPhases_( Aig_Man_t * p, int nFrames, Vec_Int_t ** pvInits )
-{ 
-    Vec_Int_t * vLits;
-    sat_solver * pSat;
-    Cnf_Dat_t * pCnf;
-    Aig_Obj_t * pObj; 
-    int i, f, iVar, RetValue, nRegs;
-    if ( pvInits )
-        *pvInits = NULL;
-    assert( p->nConstrs > 0 );
-    // create CNF
-    nRegs = p->nRegs; p->nRegs = 0;
-    pCnf = Cnf_Derive( p, Aig_ManPoNum(p) );  
-    p->nRegs = nRegs;  
-    // create SAT solver
-    pSat = (sat_solver *)Cnf_DataWriteIntoSolver( pCnf, nFrames, 0 );
-    assert( pSat->size == nFrames * pCnf->nVars );
-    // collect constraint literals
-    vLits = Vec_IntAlloc( 100 );
-    Saig_ManForEachLo( p, pObj, i )
-    {
-        assert( pCnf->pVarNums[Aig_ObjId(pObj)] >= 0 );
-        Vec_IntPush( vLits, toLitCond(pCnf->pVarNums[Aig_ObjId(pObj)], 1) );
-    }
-    for ( f = 0; f < nFrames; f++ )
-    {
-        Saig_ManForEachPo( p, pObj, i )
-        {
-            if ( i < Saig_ManPoNum(p) - Saig_ManConstrNum(p) )
-                continue;
-            assert( pCnf->pVarNums[Aig_ObjId(pObj)] >= 0 );
-            iVar = pCnf->pVarNums[Aig_ObjId(pObj)] + pCnf->nVars*f;
-            Vec_IntPush( vLits, toLitCond(iVar, 1) );
-        }
-    }
-    RetValue = sat_solver_solve( pSat, (int *)Vec_IntArray(vLits), 
-        (int *)Vec_IntArray(vLits) + Vec_IntSize(vLits), 
-        (ABC_INT64_T)1000000, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-    if ( RetValue == l_True && pvInits )
-    {
-        *pvInits = Vec_IntAlloc( 1000 );
-        for ( f = 0; f < nFrames; f++ )
-        {
-            Saig_ManForEachPi( p, pObj, i )
-            {
-                iVar = pCnf->pVarNums[Aig_ObjId(pObj)] + pCnf->nVars*f;
-                Vec_IntPush( *pvInits, sat_solver_var_value(pSat, iVar) );
-            }
-        }
-    }
-    sat_solver_delete( pSat );
-    Vec_IntFree( vLits );
-    Cnf_DataFree( pCnf );
-    if ( RetValue == l_False )
-        return 1;
-    if ( RetValue == l_True )
-        return 0;
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManPrintPolarity( Aig_Man_t * p )
-{ 
-    Aig_Obj_t * pObj;
-    int i;
-    Aig_ManForEachObj( p, pObj, i )
-        printf( "%d", pObj->fPhase );
-    printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManRefineByConstrSim( Ssw_Man_t * p )
-{ 
-    Aig_Obj_t * pObj, * pObjLi;
-    int f, i, iLits, RetValue1, RetValue2;
-    int nFrames = Vec_IntSize(p->vInits) / Saig_ManPiNum(p->pAig);
-    assert( Vec_IntSize(p->vInits) % Saig_ManPiNum(p->pAig) == 0 );
-    // assign register outputs
-    Saig_ManForEachLi( p->pAig, pObj, i )
-        pObj->fMarkB = 0;
-    // simulate the timeframes
-    iLits = 0;
-    for ( f = 0; f < nFrames; f++ )
-    {
-        // set the PI simulation information
-        Aig_ManConst1(p->pAig)->fMarkB = 1;
-        Saig_ManForEachPi( p->pAig, pObj, i )
-            pObj->fMarkB = Vec_IntEntry( p->vInits, iLits++ );
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObj, i )
-            pObj->fMarkB = pObjLi->fMarkB;
-        // simulate internal nodes
-        Aig_ManForEachNode( p->pAig, pObj, i )
-            pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) )
-                         & ( Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj) );
-        // assign the COs
-        Aig_ManForEachPo( p->pAig, pObj, i )
-            pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) );
-        // check the outputs
-        Saig_ManForEachPo( p->pAig, pObj, i )
-        {
-            if ( i < Saig_ManPoNum(p->pAig) - Saig_ManConstrNum(p->pAig) )
-            {
-                if ( pObj->fMarkB )
-                    printf( "output %d failed in frame %d.\n", i, f );
-            }
-            else
-            {
-                if ( pObj->fMarkB )
-                    printf( "constraint %d failed in frame %d.\n", i, f );
-            }
-        }
-        // transfer
-        if ( f == 0 )
-        { // copy markB into phase
-            Aig_ManForEachObj( p->pAig, pObj, i )
-                pObj->fPhase = pObj->fMarkB;
-        }
-        else
-        { // refine classes
-            RetValue1 = Ssw_ClassesRefineConst1( p->ppClasses, 0 );
-            RetValue2 = Ssw_ClassesRefine( p->ppClasses, 0 );
-        }
-    }
-    assert( iLits == Vec_IntSize(p->vInits) );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweepNodeConstr( Ssw_Man_t * p, Aig_Obj_t * pObj, int f, int fBmc )
-{ 
-    Aig_Obj_t * pObjRepr, * pObjFraig, * pObjFraig2, * pObjReprFraig;
-    int RetValue;
-    // get representative of this class
-    pObjRepr = Aig_ObjRepr( p->pAig, pObj );
-    if ( pObjRepr == NULL )
-        return 0;
-    // get the fraiged node
-    pObjFraig = Ssw_ObjFrame( p, pObj, f );
-    // get the fraiged representative
-    pObjReprFraig = Ssw_ObjFrame( p, pObjRepr, f );
-    // check if constant 0 pattern distinquishes these nodes
-    assert( pObjFraig != NULL && pObjReprFraig != NULL );
-    assert( (pObj->fPhase == pObjRepr->fPhase) == (Aig_ObjPhaseReal(pObjFraig) == Aig_ObjPhaseReal(pObjReprFraig)) );
-    // if the fraiged nodes are the same, return
-    if ( Aig_Regular(pObjFraig) == Aig_Regular(pObjReprFraig) )
-        return 0; 
-    // call equivalence checking
-    if ( Aig_Regular(pObjFraig) != Aig_ManConst1(p->pFrames) )
-        RetValue = Ssw_NodesAreEquiv( p, Aig_Regular(pObjReprFraig), Aig_Regular(pObjFraig) );
-    else
-        RetValue = Ssw_NodesAreEquiv( p, Aig_Regular(pObjFraig), Aig_Regular(pObjReprFraig) );
-    if ( RetValue == 1 )  // proved equivalent
-    {
-        pObjFraig2 = Aig_NotCond( pObjReprFraig, pObj->fPhase ^ pObjRepr->fPhase );
-        Ssw_ObjSetFrame( p, pObj, f, pObjFraig2 );
-        return 0;
-    }
-    if ( RetValue == -1 ) // timed out
-    {
-        Ssw_ClassesRemoveNode( p->ppClasses, pObj );
-        return 1;
-    }
-    // disproved equivalence
-    Ssw_SmlSavePatternAig( p, f );
-    Ssw_ManResimulateBit( p, pObj, pObjRepr );
-    assert( Aig_ObjRepr( p->pAig, pObj ) != pObjRepr );
-    if ( Aig_ObjRepr( p->pAig, pObj ) == pObjRepr )
-    {
-        printf( "Ssw_ManSweepNodeConstr(): Failed to refine representative.\n" );
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for the internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Ssw_ManSweepBmcConstr_rec( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
-{
-    Aig_Obj_t * pObjNew, * pObjLi;
-    pObjNew = Ssw_ObjFrame( p, pObj, f );
-    if ( pObjNew )
-        return pObjNew;
-    assert( !Saig_ObjIsPi(p->pAig, pObj) );
-    if ( Saig_ObjIsLo(p->pAig, pObj) )
-    {
-        assert( f > 0 );
-        pObjLi  = Saig_ObjLoToLi( p->pAig, pObj );
-        pObjNew = Ssw_ManSweepBmcConstr_rec( p, Aig_ObjFanin0(pObjLi), f-1 );
-        pObjNew = Aig_NotCond( pObjNew, Aig_ObjFaninC0(pObjLi) );
-    }
-    else
-    {
-        assert( Aig_ObjIsNode(pObj) );
-        Ssw_ManSweepBmcConstr_rec( p, Aig_ObjFanin0(pObj), f );
-        Ssw_ManSweepBmcConstr_rec( p, Aig_ObjFanin1(pObj), f );
-        pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) );
-    }
-    Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-    assert( pObjNew != NULL );
-    return pObjNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for the internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweepBmcConstr_old( Ssw_Man_t * p )
-{
-    Bar_Progress_t * pProgress = NULL;
-    Aig_Obj_t * pObj, * pObjNew, * pObjLi, * pObjLo;
-    int i, f, iLits, clk;
-clk = clock();
-
-    // start initialized timeframes
-    p->pFrames = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * p->pPars->nFramesK );
-    Saig_ManForEachLo( p->pAig, pObj, i )
-        Ssw_ObjSetFrame( p, pObj, 0, Aig_ManConst0(p->pFrames) );
-
-    // build the constraint outputs
-    iLits = 0;
-    for ( f = 0; f < p->pPars->nFramesK; f++ )
-    {
-        // map constants and PIs
-        Ssw_ObjSetFrame( p, Aig_ManConst1(p->pAig), f, Aig_ManConst1(p->pFrames) );
-        Saig_ManForEachPi( p->pAig, pObj, i )
-        {
-            pObjNew = Aig_ObjCreatePi(p->pFrames);
-            pObjNew->fPhase = Vec_IntEntry( p->vInits, iLits++ );
-            Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-        }
-        // build the constraint cones
-        Saig_ManForEachPo( p->pAig, pObj, i )
-        {
-            if ( i < Saig_ManPoNum(p->pAig) - Saig_ManConstrNum(p->pAig) )
-                continue;
-            pObjNew = Ssw_ManSweepBmcConstr_rec( p, Aig_ObjFanin0(pObj), f );
-            pObjNew = Aig_NotCond( pObjNew, Aig_ObjFaninC0(pObj) );
-            if ( Aig_Regular(pObjNew) == Aig_ManConst1(p->pFrames) )
-            {
-                assert( Aig_IsComplement(pObjNew) );
-                continue;
-            }
-            Ssw_NodesAreConstrained( p, pObjNew, Aig_ManConst0(p->pFrames) );
-        }
-    }
-    assert( Vec_IntSize(p->vInits) == iLits + Saig_ManPiNum(p->pAig) );
-
-    // sweep internal nodes
-    p->fRefined = 0;
-    if ( p->pPars->fVerbose )
-        pProgress = Bar_ProgressStart( stdout, Aig_ManObjNumMax(p->pAig) * p->pPars->nFramesK );
-    for ( f = 0; f < p->pPars->nFramesK; f++ )
-    {
-        // sweep internal nodes
-        Aig_ManForEachNode( p->pAig, pObj, i )
-        {
-            if ( p->pPars->fVerbose )
-                Bar_ProgressUpdate( pProgress, Aig_ManObjNumMax(p->pAig) * f + i, NULL );
-            pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) );
-            Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-            p->fRefined |= Ssw_ManSweepNodeConstr( p, pObj, f, 1 );
-        }
-        // quit if this is the last timeframe
-        if ( f == p->pPars->nFramesK - 1 )
-            break;
-        // transfer latch input to the latch outputs 
-        Aig_ManForEachPo( p->pAig, pObj, i )
-            Ssw_ObjSetFrame( p, pObj, f, Ssw_ObjChild0Fra(p, pObj, f) );
-        // build logic cones for register outputs
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-        {
-            pObjNew = Ssw_ObjFrame( p, pObjLi, f );
-            Ssw_ObjSetFrame( p, pObjLo, f+1, pObjNew );
-            Ssw_CnfNodeAddToSolver( p->pMSat, Aig_Regular(pObjNew) );//
-        }
-    }
-    if ( p->pPars->fVerbose )
-        Bar_ProgressStop( pProgress );
-
-    // cleanup
-//    Ssw_ClassesCheck( p->ppClasses );
-p->timeBmc += clock() - clk;
-    return p->fRefined;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for the internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweepBmcConstr( Ssw_Man_t * p )
-{
-    Aig_Obj_t * pObj, * pObjNew, * pObjLi, * pObjLo;
-    int i, f, iLits, clk;
-clk = clock();
-
-    // start initialized timeframes
-    p->pFrames = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * p->pPars->nFramesK );
-    Saig_ManForEachLo( p->pAig, pObj, i )
-        Ssw_ObjSetFrame( p, pObj, 0, Aig_ManConst0(p->pFrames) );
-
-    // build the constraint outputs
-    iLits = 0;
-    p->fRefined = 0;
-    for ( f = 0; f < p->pPars->nFramesK; f++ )
-    {
-        // map constants and PIs
-        Ssw_ObjSetFrame( p, Aig_ManConst1(p->pAig), f, Aig_ManConst1(p->pFrames) );
-        Saig_ManForEachPi( p->pAig, pObj, i )
-        {
-            pObjNew = Aig_ObjCreatePi(p->pFrames);
-            pObjNew->fPhase = Vec_IntEntry( p->vInits, iLits++ );
-            Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-        }
-        // build the constraint cones
-        Saig_ManForEachPo( p->pAig, pObj, i )
-        {
-            if ( i < Saig_ManPoNum(p->pAig) - Saig_ManConstrNum(p->pAig) )
-                continue;
-            pObjNew = Ssw_ManSweepBmcConstr_rec( p, Aig_ObjFanin0(pObj), f );
-            pObjNew = Aig_NotCond( pObjNew, Aig_ObjFaninC0(pObj) );
-            if ( Aig_Regular(pObjNew) == Aig_ManConst1(p->pFrames) )
-            {
-                assert( Aig_IsComplement(pObjNew) );
-                continue;
-            }
-            Ssw_NodesAreConstrained( p, pObjNew, Aig_ManConst0(p->pFrames) );
-        }
-
-        // sweep internal nodes
-        Aig_ManForEachNode( p->pAig, pObj, i )
-        {
-            pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) );
-            Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-            p->fRefined |= Ssw_ManSweepNodeConstr( p, pObj, f, 1 );
-        }
-        // quit if this is the last timeframe
-        if ( f == p->pPars->nFramesK - 1 )
-            break;
-        // transfer latch input to the latch outputs 
-        Aig_ManForEachPo( p->pAig, pObj, i )
-            Ssw_ObjSetFrame( p, pObj, f, Ssw_ObjChild0Fra(p, pObj, f) );
-        // build logic cones for register outputs
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-        {
-            pObjNew = Ssw_ObjFrame( p, pObjLi, f );
-            Ssw_ObjSetFrame( p, pObjLo, f+1, pObjNew );
-            Ssw_CnfNodeAddToSolver( p->pMSat, Aig_Regular(pObjNew) );//
-        }
-    }
-    assert( Vec_IntSize(p->vInits) == iLits + Saig_ManPiNum(p->pAig) );
-
-    // cleanup
-//    Ssw_ClassesCheck( p->ppClasses );
-p->timeBmc += clock() - clk;
-    return p->fRefined;
-}
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for the internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Ssw_FramesWithClasses_rec( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
-{
-    Aig_Obj_t * pObjNew, * pObjLi;
-    pObjNew = Ssw_ObjFrame( p, pObj, f );
-    if ( pObjNew )
-        return pObjNew;
-    assert( !Saig_ObjIsPi(p->pAig, pObj) );
-    if ( Saig_ObjIsLo(p->pAig, pObj) )
-    {
-        assert( f > 0 );
-        pObjLi  = Saig_ObjLoToLi( p->pAig, pObj );
-        pObjNew = Ssw_FramesWithClasses_rec( p, Aig_ObjFanin0(pObjLi), f-1 );
-        pObjNew = Aig_NotCond( pObjNew, Aig_ObjFaninC0(pObjLi) );
-    }
-    else
-    {
-        assert( Aig_ObjIsNode(pObj) );
-        Ssw_FramesWithClasses_rec( p, Aig_ObjFanin0(pObj), f );
-        Ssw_FramesWithClasses_rec( p, Aig_ObjFanin1(pObj), f );
-        pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) );
-    }
-    Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-    assert( pObjNew != NULL );
-    return pObjNew;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for the internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweepConstr( Ssw_Man_t * p )
-{ 
-    Bar_Progress_t * pProgress = NULL;
-    Aig_Obj_t * pObj, * pObj2, * pObjNew;
-    int nConstrPairs, clk, i, f, iLits;
-//Ssw_ManPrintPolarity( p->pAig );
-
-    // perform speculative reduction
-clk = clock();
-    // create timeframes
-    p->pFrames = Ssw_FramesWithClasses( p );
-    // add constants
-    nConstrPairs = Aig_ManPoNum(p->pFrames)-Aig_ManRegNum(p->pAig);
-    assert( (nConstrPairs & 1) == 0 );
-    for ( i = 0; i < nConstrPairs; i += 2 )
-    {
-        pObj  = Aig_ManPo( p->pFrames, i   );
-        pObj2 = Aig_ManPo( p->pFrames, i+1 );
-        Ssw_NodesAreConstrained( p, Aig_ObjChild0(pObj), Aig_ObjChild0(pObj2) );
-    }
-    // build logic cones for register inputs
-    for ( i = 0; i < Aig_ManRegNum(p->pAig); i++ )
-    {
-        pObj  = Aig_ManPo( p->pFrames, nConstrPairs + i );
-        Ssw_CnfNodeAddToSolver( p->pMSat, Aig_ObjFanin0(pObj) );//
-    }
-
-    // map constants and PIs of the last frame
-    f = p->pPars->nFramesK;
-//    iLits = 0;
-    iLits = f * Saig_ManPiNum(p->pAig);
-    Ssw_ObjSetFrame( p, Aig_ManConst1(p->pAig), f, Aig_ManConst1(p->pFrames) );
-    Saig_ManForEachPi( p->pAig, pObj, i )
-    {
-        pObjNew = Aig_ObjCreatePi(p->pFrames);
-        pObjNew->fPhase = (p->vInits != NULL) && Vec_IntEntry(p->vInits, iLits++);
-        Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-    }
-    assert( Vec_IntSize(p->vInits) == iLits );
-p->timeReduce += clock() - clk;
-
-    // add constraints to all timeframes
-    for ( f = 0; f <= p->pPars->nFramesK; f++ )
-    {
-        Saig_ManForEachPo( p->pAig, pObj, i )
-        {
-            if ( i < Saig_ManPoNum(p->pAig) - Saig_ManConstrNum(p->pAig) )
-                continue;
-            Ssw_FramesWithClasses_rec( p, Aig_ObjFanin0(pObj), f );
-//            if ( Aig_Regular(Ssw_ObjChild0Fra(p,pObj,f)) == Aig_ManConst1(p->pFrames) )
-            if ( Ssw_ObjChild0Fra(p,pObj,f) == Aig_ManConst0(p->pFrames) )
-                continue;
-            assert( Ssw_ObjChild0Fra(p,pObj,f) != Aig_ManConst1(p->pFrames) );
-            if ( Ssw_ObjChild0Fra(p,pObj,f) == Aig_ManConst1(p->pFrames) )
-            {
-                printf( "Polarity violation.\n" );
-                continue;
-            }
-            Ssw_NodesAreConstrained( p, Ssw_ObjChild0Fra(p,pObj,f), Aig_ManConst0(p->pFrames) );
-        }
-    }
-    f = p->pPars->nFramesK;
-    // clean the solver
-    sat_solver_simplify( p->pMSat->pSat );
-
-
-    // sweep internal nodes
-    p->fRefined = 0;
-    Ssw_ClassesClearRefined( p->ppClasses );
-    if ( p->pPars->fVerbose )
-        pProgress = Bar_ProgressStart( stdout, Aig_ManObjNumMax(p->pAig) );
-    Aig_ManForEachObj( p->pAig, pObj, i )
-    {
-        if ( p->pPars->fVerbose )
-            Bar_ProgressUpdate( pProgress, i, NULL );
-        if ( Saig_ObjIsLo(p->pAig, pObj) )
-            p->fRefined |= Ssw_ManSweepNodeConstr( p, pObj, f, 0 );
-        else if ( Aig_ObjIsNode(pObj) )
-        { 
-            pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) );
-            Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-            p->fRefined |= Ssw_ManSweepNodeConstr( p, pObj, f, 0 );
-        }
-    }
-    if ( p->pPars->fVerbose )
-        Bar_ProgressStop( pProgress );
-    // cleanup
-//    Ssw_ClassesCheck( p->ppClasses );
-    return p->fRefined;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswCore.c b/src/aig/ssw/sswCore.c
deleted file mode 100644
index 0b2393df..00000000
--- a/src/aig/ssw/sswCore.c
+++ /dev/null
@@ -1,522 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswCore.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [The core procedures.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswCore.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManSetDefaultParams( Ssw_Pars_t * p )
-{
-    memset( p, 0, sizeof(Ssw_Pars_t) );
-    p->nPartSize      =       0;  // size of the partition
-    p->nOverSize      =       0;  // size of the overlap between partitions
-    p->nFramesK       =       1;  // the induction depth
-    p->nFramesAddSim  =       2;  // additional frames to simulate
-    p->fConstrs       =       0;  // treat the last nConstrs POs as seq constraints
-    p->fMergeFull     =       0;  // enables full merge when constraints are used
-    p->nBTLimit       =    1000;  // conflict limit at a node
-    p->nBTLimitGlobal = 5000000;  // conflict limit for all runs
-    p->nMinDomSize    =     100;  // min clock domain considered for optimization
-    p->nItersStop     =      -1;  // stop after the given number of iterations
-    p->nResimDelta    =    1000;  // the internal of nodes to resimulate
-    p->nStepsMax      =      -1;  // (scorr only) the max number of induction steps
-    p->fPolarFlip     =       0;  // uses polarity adjustment
-    p->fLatchCorr     =       0;  // performs register correspondence
-    p->fConstCorr     =       0;  // performs constant correspondence
-    p->fOutputCorr    =       0;  // perform 'PO correspondence'
-    p->fSemiFormal    =       0;  // enable semiformal filtering
-    p->fDynamic       =       0;  // dynamic partitioning
-    p->fLocalSim      =       0;  // local simulation
-    p->fVerbose       =       0;  // verbose stats
-    p->fEquivDump     =       0;  // enables dumping equivalences
-
-    // latch correspondence
-    p->fLatchCorrOpt  =       0;  // performs optimized register correspondence
-    p->nSatVarMax     =    1000;  // the max number of SAT variables
-    p->nRecycleCalls  =      50;  // calls to perform before recycling SAT solver
-    // signal correspondence
-    p->nSatVarMax2    =    5000;  // the max number of SAT variables
-    p->nRecycleCalls2 =     250;  // calls to perform before recycling SAT solver
-    // return values
-    p->nIters         =       0;  // the number of iterations performed
-}
-
-/**Function*************************************************************
-
-  Synopsis    [This procedure sets default parameters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManSetDefaultParamsLcorr( Ssw_Pars_t * p )
-{
-    Ssw_ManSetDefaultParams( p );
-    p->fLatchCorrOpt = 1;
-    p->nBTLimit      = 10000;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reports improvements for property cones.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ReportConeReductions( Ssw_Man_t * p, Aig_Man_t * pAigInit, Aig_Man_t * pAigStop )
-{
-    Aig_Man_t * pAig1, * pAig2, * pAux;
-    pAig1 = Aig_ManDupOneOutput( pAigInit, 0, 1 );
-    pAig1 = Aig_ManScl( pAux = pAig1, 1, 1, 0, -1, -1, 0, 0 );
-    Aig_ManStop( pAux );
-    pAig2 = Aig_ManDupOneOutput( pAigStop, 0, 1 );
-    pAig2 = Aig_ManScl( pAux = pAig2, 1, 1, 0, -1, -1, 0, 0 );
-    Aig_ManStop( pAux );
-   
-    p->nNodesBegC = Aig_ManNodeNum(pAig1);
-    p->nNodesEndC = Aig_ManNodeNum(pAig2);
-    p->nRegsBegC  = Aig_ManRegNum(pAig1);
-    p->nRegsEndC  = Aig_ManRegNum(pAig2);
-
-    Aig_ManStop( pAig1 );
-    Aig_ManStop( pAig2 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reports one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ReportOneOutput( Aig_Man_t * p, Aig_Obj_t * pObj )
-{
-    if ( pObj == Aig_ManConst1(p) )
-        printf( "1" );
-    else if ( pObj == Aig_ManConst0(p) )
-        printf( "0" );
-    else 
-        printf( "X" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Reports improvements for property cones.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ReportOutputs( Aig_Man_t * pAig )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Saig_ManForEachPo( pAig, pObj, i )
-    {
-        if ( i < Saig_ManPoNum(pAig)-Saig_ManConstrNum(pAig) )
-            printf( "o" );
-        else
-            printf( "c" );
-        Ssw_ReportOneOutput( pAig, Aig_ObjChild0(pObj) );
-    }
-    printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Remove from-equivs that are in the cone of constraints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManUpdateEquivs( Ssw_Man_t * p, Aig_Man_t * pAig, int fVerbose )
-{
-    Vec_Ptr_t * vCones;
-    Aig_Obj_t ** pArray;
-    Aig_Obj_t * pObj;
-    int i, nTotal = 0, nRemoved = 0;
-    // collect the nodes in the cone of constraints
-    pArray  = (Aig_Obj_t **)Vec_PtrArray(pAig->vPos);
-    pArray += Saig_ManPoNum(pAig) - Saig_ManConstrNum(pAig);
-    vCones  = Aig_ManDfsNodes( pAig, pArray, Saig_ManConstrNum(pAig) );
-    // remove all the node that are equiv to something and are in the cones
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        if ( !Aig_ObjIsPi(pObj) && !Aig_ObjIsNode(pObj) )
-            continue;
-        if ( pAig->pReprs[i] != NULL )
-            nTotal++;
-        if ( !Aig_ObjIsTravIdCurrent(pAig, pObj) )
-            continue;
-        if ( pAig->pReprs[i] )
-        {
-            if ( p->pPars->fConstrs && !p->pPars->fMergeFull )
-            {
-                pAig->pReprs[i] = NULL;
-                nRemoved++;
-            }
-        }
-    }
-    // collect statistics    
-    p->nConesTotal   = Aig_ManPiNum(pAig) + Aig_ManNodeNum(pAig);
-    p->nConesConstr  = Vec_PtrSize(vCones);
-    p->nEquivsTotal  = nTotal;
-    p->nEquivsConstr = nRemoved;
-    Vec_PtrFree( vCones );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs computation of signal correspondence with constraints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ssw_SignalCorrespondenceRefine( Ssw_Man_t * p )
-{
-    int nSatProof, nSatCallsSat, nRecycles, nSatFailsReal, nUniques;
-    Aig_Man_t * pAigNew;
-    int RetValue, nIter = -1;
-    int clk, clkTotal = clock();
-    // get the starting stats
-    p->nLitsBeg  = Ssw_ClassesLitNum( p->ppClasses );
-    p->nNodesBeg = Aig_ManNodeNum(p->pAig);
-    p->nRegsBeg  = Aig_ManRegNum(p->pAig);
-    // refine classes using BMC
-    if ( p->pPars->fVerbose )
-    {
-        printf( "Before BMC: " );
-        Ssw_ClassesPrint( p->ppClasses, 0 );
-    }
-    if ( !p->pPars->fLatchCorr )
-    { 
-        p->pMSat = Ssw_SatStart( 0 );
-        if ( p->pPars->fConstrs ) 
-            Ssw_ManSweepBmcConstr( p );
-        else
-            Ssw_ManSweepBmc( p );
-        Ssw_SatStop( p->pMSat );
-        p->pMSat = NULL;
-        Ssw_ManCleanup( p );
-    }
-    if ( p->pPars->fVerbose )
-    {
-        printf( "After  BMC: " );
-        Ssw_ClassesPrint( p->ppClasses, 0 );
-    }
-    // apply semi-formal filtering
-/*
-    if ( p->pPars->fSemiFormal )
-    {
-        Aig_Man_t * pSRed;
-        Ssw_FilterUsingSemi( p, 0, 2000, p->pPars->fVerbose );
-//        Ssw_FilterUsingSemi( p, 1, 100000, p->pPars->fVerbose );
-        pSRed = Ssw_SpeculativeReduction( p );
-        Aig_ManDumpBlif( pSRed, "srm.blif", NULL, NULL );
-        Aig_ManStop( pSRed );
-    }
-*/
-    if ( p->pPars->pFunc )
-    {
-        ((int (*)(void *))p->pPars->pFunc)( p->pPars->pData );
-        ((int (*)(void *))p->pPars->pFunc)( p->pPars->pData );
-    }
-    if ( p->pPars->nStepsMax == 0 )
-    {
-        printf( "Stopped signal correspondence after BMC.\n" );
-        goto finalize;
-    }
-    // refine classes using induction
-    nSatProof = nSatCallsSat = nRecycles = nSatFailsReal = nUniques = 0;
-    for ( nIter = 0; ; nIter++ )
-    {
-        if ( p->pPars->nStepsMax == nIter )
-        {
-            printf( "Stopped signal correspondence after %d refiment iterations.\n", nIter );
-            goto finalize;
-        }
-        if ( p->pPars->nItersStop >= 0 && p->pPars->nItersStop == nIter )
-        {
-            Aig_Man_t * pSRed = Ssw_SpeculativeReduction( p );
-            Aig_ManDumpBlif( pSRed, "srm.blif", NULL, NULL );
-            Aig_ManStop( pSRed );
-            printf( "Iterative refinement is stopped before iteration %d.\n", nIter );
-            printf( "The network is reduced using candidate equivalences.\n" );
-            printf( "Speculatively reduced miter is saved in file \"%s\".\n", "srm.blif" );
-            printf( "If the miter is SAT, the reduced result is incorrect.\n" );
-            break;
-        }
-
-clk = clock();
-        p->pMSat = Ssw_SatStart( 0 );
-        if ( p->pPars->fLatchCorrOpt )
-        {
-            RetValue = Ssw_ManSweepLatch( p );
-            if ( p->pPars->fVerbose )
-            {
-                printf( "%3d : C =%7d. Cl =%7d. Pr =%6d. Cex =%5d. R =%4d. F =%4d. ", 
-                    nIter, Ssw_ClassesCand1Num(p->ppClasses), Ssw_ClassesClassNum(p->ppClasses), 
-                    p->nSatProof-nSatProof, p->nSatCallsSat-nSatCallsSat, 
-                    p->nRecycles-nRecycles, p->nSatFailsReal-nSatFailsReal );
-                ABC_PRT( "T", clock() - clk );
-            } 
-        }
-        else
-        {
-            if ( p->pPars->fConstrs ) 
-                RetValue = Ssw_ManSweepConstr( p );
-            else if ( p->pPars->fDynamic )
-                RetValue = Ssw_ManSweepDyn( p );
-            else
-                RetValue = Ssw_ManSweep( p );
-
-            p->pPars->nConflicts += p->pMSat->pSat->stats.conflicts;
-            if ( p->pPars->fVerbose )
-            {
-                printf( "%3d : C =%7d. Cl =%7d. LR =%6d. NR =%6d. ", 
-                    nIter, Ssw_ClassesCand1Num(p->ppClasses), Ssw_ClassesClassNum(p->ppClasses), 
-                    p->nConstrReduced, Aig_ManNodeNum(p->pFrames) );
-                if ( p->pPars->fDynamic )
-                {
-                    printf( "Cex =%5d. ", p->nSatCallsSat-nSatCallsSat );
-                    printf( "R =%4d. ",   p->nRecycles-nRecycles );
-                }
-                printf( "F =%5d. %s ", p->nSatFailsReal-nSatFailsReal, 
-                    (Saig_ManPoNum(p->pAig)==1 && Ssw_ObjIsConst1Cand(p->pAig,Aig_ObjFanin0(Aig_ManPo(p->pAig,0))))? "+" : "-" );
-                ABC_PRT( "T", clock() - clk );
-            } 
-//            if ( p->pPars->fDynamic && p->nSatCallsSat-nSatCallsSat < 100 )
-//                p->pPars->nBTLimit = 10000;
-        }
-        nSatProof     = p->nSatProof;
-        nSatCallsSat  = p->nSatCallsSat;
-        nRecycles     = p->nRecycles;
-        nSatFailsReal = p->nSatFailsReal;
-        nUniques      = p->nUniques;
-
-        p->nVarsMax  = ABC_MAX( p->nVarsMax,  p->pMSat->nSatVars );
-        p->nCallsMax = ABC_MAX( p->nCallsMax, p->pMSat->nSolverCalls );
-        Ssw_SatStop( p->pMSat );
-        p->pMSat = NULL;
-        Ssw_ManCleanup( p );
-        if ( !RetValue ) 
-            break;
-        if ( p->pPars->pFunc )
-            ((int (*)(void *))p->pPars->pFunc)( p->pPars->pData );
-    } 
-
-finalize:
-    p->pPars->nIters = nIter + 1;
-p->timeTotal = clock() - clkTotal;
-
-    Ssw_ManUpdateEquivs( p, p->pAig, p->pPars->fVerbose );
-    pAigNew = Aig_ManDupRepr( p->pAig, 0 );
-    Aig_ManSeqCleanup( pAigNew );
-//Ssw_ClassesPrint( p->ppClasses, 1 );
-    // get the final stats
-    p->nLitsEnd  = Ssw_ClassesLitNum( p->ppClasses );
-    p->nNodesEnd = Aig_ManNodeNum(pAigNew);
-    p->nRegsEnd  = Aig_ManRegNum(pAigNew);
-    // cleanup
-    Aig_ManSetPhase( p->pAig );
-    Aig_ManCleanMarkB( p->pAig );
-    return pAigNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs computation of signal correspondence with constraints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ssw_SignalCorrespondence( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
-{
-    Ssw_Pars_t Pars;
-    Aig_Man_t * pAigNew;
-    Ssw_Man_t * p;
-    assert( Aig_ManRegNum(pAig) > 0 );
-    // reset random numbers
-    Aig_ManRandom( 1 );
-    // if parameters are not given, create them
-    if ( pPars == NULL )
-        Ssw_ManSetDefaultParams( pPars = &Pars );
-    // consider the case of empty AIG
-    if ( Aig_ManNodeNum(pAig) == 0 )
-    {
-        pPars->nIters = 0;
-        // Ntl_ManFinalize() needs the following to satisfy an assertion
-        Aig_ManReprStart( pAig,Aig_ManObjNumMax(pAig) );
-        return Aig_ManDupOrdered(pAig);
-    }
-    // check and update parameters
-    if ( pPars->fLatchCorrOpt )
-    {
-        pPars->fLatchCorr = 1;
-        pPars->nFramesAddSim = 0;
-        if ( (pAig->vClockDoms && Vec_VecSize(pAig->vClockDoms) > 0) )
-           return Ssw_SignalCorrespondencePart( pAig, pPars );
-    }
-    else
-    {
-        assert( pPars->nFramesK > 0 );
-        // perform partitioning
-        if ( (pPars->nPartSize > 0 && pPars->nPartSize < Aig_ManRegNum(pAig))
-             || (pAig->vClockDoms && Vec_VecSize(pAig->vClockDoms) > 0)  )
-            return Ssw_SignalCorrespondencePart( pAig, pPars );
-    }
-
-    if ( pPars->fScorrGia )
-    {
-        if ( pPars->fLatchCorrOpt )
-        {
-            extern Aig_Man_t * Cec_LatchCorrespondence( Aig_Man_t * pAig, int nConfs, int fUseCSat );
-            return Cec_LatchCorrespondence( pAig, pPars->nBTLimit, pPars->fUseCSat );
-        }
-        else
-        {
-            extern Aig_Man_t * Cec_SignalCorrespondence( Aig_Man_t * pAig, int nConfs, int fUseCSat );
-            return Cec_SignalCorrespondence( pAig, pPars->nBTLimit, pPars->fUseCSat );
-        }
-    }
- 
-    // start the induction manager
-    p = Ssw_ManCreate( pAig, pPars );
-    // compute candidate equivalence classes
-//    p->pPars->nConstrs = 1;
-    if ( p->pPars->fConstrs )
-    {
-        // create trivial equivalence classes with all nodes being candidates for constant 1
-        p->ppClasses = Ssw_ClassesPrepareSimple( pAig, pPars->fLatchCorr, pPars->nMaxLevs );
-        Ssw_ClassesSetData( p->ppClasses, NULL, NULL, Ssw_SmlObjIsConstBit, Ssw_SmlObjsAreEqualBit );
-        // derive phase bits to satisfy the constraints
-        if ( Ssw_ManSetConstrPhases( pAig, p->pPars->nFramesK + 1, &p->vInits ) != 0 )
-        {
-            printf( "Ssw_SignalCorrespondence(): The init state does not satisfy the constraints!\n" );
-            p->pPars->fVerbose = 0;
-            Ssw_ManStop( p );
-            return NULL;
-        }
-        // perform simulation of the first timeframes
-        Ssw_ManRefineByConstrSim( p );
-    }
-    else
-    {
-        // perform one round of seq simulation and generate candidate equivalence classes
-        p->ppClasses = Ssw_ClassesPrepare( pAig, pPars->nFramesK, pPars->fLatchCorr, pPars->fConstCorr, pPars->fOutputCorr, pPars->nMaxLevs, pPars->fVerbose );
-//        p->ppClasses = Ssw_ClassesPrepareTargets( pAig );
-        if ( pPars->fLatchCorrOpt )
-            p->pSml = Ssw_SmlStart( pAig, 0, 2, 1 );
-        else if ( pPars->fDynamic )
-            p->pSml = Ssw_SmlStart( pAig, 0, p->nFrames + p->pPars->nFramesAddSim, 1 );
-        else
-            p->pSml = Ssw_SmlStart( pAig, 0, 1 + p->pPars->nFramesAddSim, 1 );
-        Ssw_ClassesSetData( p->ppClasses, p->pSml, (unsigned(*)(void *,Aig_Obj_t *))Ssw_SmlObjHashWord, (int(*)(void *,Aig_Obj_t *))Ssw_SmlObjIsConstWord, (int(*)(void *,Aig_Obj_t *,Aig_Obj_t *))Ssw_SmlObjsAreEqualWord );
-    }
-    // allocate storage
-    if ( p->pPars->fLocalSim )
-        p->pVisited = ABC_CALLOC( int, Ssw_SmlNumFrames( p->pSml ) * Aig_ManObjNumMax(p->pAig) );
-    // perform refinement of classes
-    pAigNew = Ssw_SignalCorrespondenceRefine( p );    
-//    Ssw_ReportOutputs( pAigNew );
-    if ( pPars->fConstrs && pPars->fVerbose )
-        Ssw_ReportConeReductions( p, pAig, pAigNew );
-    // cleanup
-    Ssw_ManStop( p );
-    return pAigNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs computation of latch correspondence.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ssw_LatchCorrespondence( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
-{
-    Aig_Man_t * pRes;
-    Ssw_Pars_t Pars;
-    if ( pPars == NULL )
-        Ssw_ManSetDefaultParamsLcorr( pPars = &Pars );
-    pRes = Ssw_SignalCorrespondence( pAig, pPars );
-//    if ( pPars->fConstrs && pPars->fVerbose )
-//        Ssw_ReportConeReductions( pAig, pRes );
-    return pRes;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswDyn.c b/src/aig/ssw/sswDyn.c
deleted file mode 100644
index 7bdb2652..00000000
--- a/src/aig/ssw/sswDyn.c
+++ /dev/null
@@ -1,489 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswDyn.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Dynamic loading of constraints.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswDyn.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-#include "bar.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Label PIs nodes of the frames corresponding to PIs of AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManLabelPiNodes( Ssw_Man_t * p )
-{
-    Aig_Obj_t * pObj, * pObjFrames;
-    int f, i;
-    Aig_ManConst1( p->pFrames )->fMarkA = 1;
-    Aig_ManConst1( p->pFrames )->fMarkB = 1;
-    for ( f = 0; f < p->nFrames; f++ )
-    {
-        Saig_ManForEachPi( p->pAig, pObj, i )
-        {
-            pObjFrames = Ssw_ObjFrame( p, pObj, f );
-            assert( Aig_ObjIsPi(pObjFrames) );
-            assert( pObjFrames->fMarkB == 0 );
-            pObjFrames->fMarkA = 1;
-            pObjFrames->fMarkB = 1;
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects new POs in p->vNewPos.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManCollectPis_rec( Aig_Obj_t * pObj, Vec_Ptr_t * vNewPis )
-{
-    assert( !Aig_IsComplement(pObj) );
-    if ( pObj->fMarkA )
-        return;
-    pObj->fMarkA = 1;
-    if ( Aig_ObjIsPi(pObj) )
-    {
-        Vec_PtrPush( vNewPis, pObj );
-        return;
-    }
-    assert( Aig_ObjIsNode(pObj) );
-    Ssw_ManCollectPis_rec( Aig_ObjFanin0(pObj), vNewPis );
-    Ssw_ManCollectPis_rec( Aig_ObjFanin1(pObj), vNewPis );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Collects new POs in p->vNewPos.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManCollectPos_rec( Ssw_Man_t * p, Aig_Obj_t * pObj, Vec_Int_t * vNewPos )
-{
-    Aig_Obj_t * pFanout;
-    int iFanout = -1, i;
-    assert( !Aig_IsComplement(pObj) );
-    if ( pObj->fMarkB )
-        return;
-    pObj->fMarkB = 1;
-    if ( pObj->Id > p->nSRMiterMaxId )
-        return;
-    if ( Aig_ObjIsPo(pObj) )
-    {
-        // skip if it is a register input PO
-        if ( Aig_ObjPioNum(pObj) >= Aig_ManPoNum(p->pFrames)-Aig_ManRegNum(p->pAig) )
-            return;
-        // add the number of this constraint
-        Vec_IntPush( vNewPos, Aig_ObjPioNum(pObj)/2 );
-        return;
-    }
-    // visit the fanouts
-    assert( p->pFrames->pFanData != NULL );
-    Aig_ObjForEachFanout( p->pFrames, pObj, pFanout, iFanout, i )
-        Ssw_ManCollectPos_rec( p, pFanout, vNewPos );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Loads logic cones and relevant constraints.]
-
-  Description [Both pRepr and pObj are objects of the AIG. 
-  The result is the current SAT solver loaded with the logic cones
-  for pRepr and pObj corresponding to them in the frames, 
-  as well as all the relevant constraints.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManLoadSolver( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj )
-{
-    Aig_Obj_t * pObjFrames, * pReprFrames;
-    Aig_Obj_t * pTemp, * pObj0, * pObj1;
-    int i, iConstr, RetValue;
-
-    assert( pRepr != pObj );
-    // get the corresponding frames nodes
-    pReprFrames = Aig_Regular( Ssw_ObjFrame( p, pRepr, p->pPars->nFramesK ) );
-    pObjFrames  = Aig_Regular( Ssw_ObjFrame( p, pObj,  p->pPars->nFramesK ) );
-    assert( pReprFrames != pObjFrames );
- /*
-    // compute the AIG support 
-    Vec_PtrClear( p->vNewLos );
-    Ssw_ManCollectPis_rec( pRepr, p->vNewLos );
-    Ssw_ManCollectPis_rec( pObj,  p->vNewLos );
-    // add logic cones for register outputs
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vNewLos, pTemp, i )
-    {
-        pObj0 = Aig_Regular( Ssw_ObjFrame( p, pTemp, p->pPars->nFramesK ) );
-        Ssw_CnfNodeAddToSolver( p->pMSat, pObj0 );
-    }
-*/
-    // add cones for the nodes
-    Ssw_CnfNodeAddToSolver( p->pMSat, pReprFrames );
-    Ssw_CnfNodeAddToSolver( p->pMSat, pObjFrames );
-
-    // compute the frames support 
-    Vec_PtrClear( p->vNewLos );
-    Ssw_ManCollectPis_rec( pReprFrames, p->vNewLos );
-    Ssw_ManCollectPis_rec( pObjFrames,  p->vNewLos );
-    // these nodes include both nodes corresponding to PIs and LOs
-    // (the nodes corresponding to PIs should be labeled with fMarkB!)
-
-    // collect the related constraint POs
-    Vec_IntClear( p->vNewPos );
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vNewLos, pTemp, i )
-        Ssw_ManCollectPos_rec( p, pTemp, p->vNewPos );
-    // check if the corresponding pairs are added
-    Vec_IntForEachEntry( p->vNewPos, iConstr, i )
-    {
-        pObj0 = Aig_ManPo( p->pFrames, 2*iConstr   );
-        pObj1 = Aig_ManPo( p->pFrames, 2*iConstr+1 );
-//        if ( pObj0->fMarkB && pObj1->fMarkB )
-        if ( pObj0->fMarkB || pObj1->fMarkB )
-        {
-            pObj0->fMarkB = 1;
-            pObj1->fMarkB = 1;
-            Ssw_NodesAreConstrained( p, Aig_ObjChild0(pObj0), Aig_ObjChild0(pObj1) );
-        }
-    }
-    if ( p->pMSat->pSat->qtail != p->pMSat->pSat->qhead )
-    {
-        RetValue = sat_solver_simplify(p->pMSat->pSat);
-        assert( RetValue != 0 );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Tranfers simulation information from FRAIG to AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManSweepTransferDyn( Ssw_Man_t * p )
-{
-    Aig_Obj_t * pObj, * pObjFraig;
-    unsigned * pInfo;
-    int i, f, nFrames;
-
-    // transfer simulation information
-    Aig_ManForEachPi( p->pAig, pObj, i )
-    {
-        pObjFraig = Ssw_ObjFrame( p, pObj, 0 );
-        if ( pObjFraig == Aig_ManConst0(p->pFrames) )
-        {
-            Ssw_SmlObjAssignConst( p->pSml, pObj, 0, 0 );
-            continue;
-        }
-        assert( !Aig_IsComplement(pObjFraig) );
-        assert( Aig_ObjIsPi(pObjFraig) );
-        pInfo = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjPioNum(pObjFraig) );
-        Ssw_SmlObjSetWord( p->pSml, pObj, pInfo[0], 0, 0 );
-    }
-    // set random simulation info for the second frame
-    for ( f = 1; f < p->nFrames; f++ )
-    {
-        Saig_ManForEachPi( p->pAig, pObj, i )
-        {
-            pObjFraig = Ssw_ObjFrame( p, pObj, f );
-            assert( !Aig_IsComplement(pObjFraig) );
-            assert( Aig_ObjIsPi(pObjFraig) );
-            pInfo = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjPioNum(pObjFraig) );
-            Ssw_SmlObjSetWord( p->pSml, pObj, pInfo[0], 0, f );
-        }
-    }
-    // create random info
-    nFrames = Ssw_SmlNumFrames( p->pSml );
-    for ( ; f < nFrames; f++ )
-    {
-        Saig_ManForEachPi( p->pAig, pObj, i )
-            Ssw_SmlAssignRandomFrame( p->pSml, pObj, f );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one round of simulation with counter-examples.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweepResimulateDyn( Ssw_Man_t * p, int f )
-{
-    int RetValue1, RetValue2, clk = clock();
-    // transfer PI simulation information from storage
-//    Ssw_SmlAssignDist1Plus( p->pSml, p->pPatWords );
-    Ssw_ManSweepTransferDyn( p );
-    // simulate internal nodes
-//    Ssw_SmlSimulateOneFrame( p->pSml );
-    Ssw_SmlSimulateOne( p->pSml );
-    // check equivalence classes
-    RetValue1 = Ssw_ClassesRefineConst1( p->ppClasses, 1 );
-    RetValue2 = Ssw_ClassesRefine( p->ppClasses, 1 );
-    // prepare simulation info for the next round
-    Vec_PtrCleanSimInfo( p->vSimInfo, 0, 1 );
-    p->nPatterns = 0;
-    p->nSimRounds++;
-p->timeSimSat += clock() - clk;
-    return RetValue1 > 0 || RetValue2 > 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one round of simulation with counter-examples.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweepResimulateDynLocal( Ssw_Man_t * p, int f )
-{
-    Aig_Obj_t * pObj, * pRepr, ** ppClass;
-    int i, k, nSize, RetValue1, RetValue2, clk = clock();
-    p->nSimRounds++;
-    // transfer PI simulation information from storage
-//    Ssw_SmlAssignDist1Plus( p->pSml, p->pPatWords );
-    Ssw_ManSweepTransferDyn( p );
-    // determine const1 cands and classes to be simulated
-    Vec_PtrClear( p->vResimConsts );
-    Vec_PtrClear( p->vResimClasses );
-    Aig_ManIncrementTravId( p->pAig );
-    for ( i = p->iNodeStart; i < p->iNodeLast + p->pPars->nResimDelta; i++ )
-    {
-        if ( i >= Aig_ManObjNumMax( p->pAig ) )
-            break;
-        pObj = Aig_ManObj( p->pAig, i );
-        if ( pObj == NULL )
-            continue;
-        if ( Ssw_ObjIsConst1Cand(p->pAig, pObj) )
-        {
-            Vec_PtrPush( p->vResimConsts, pObj );
-            continue;
-        }
-        pRepr = Aig_ObjRepr(p->pAig, pObj);
-        if ( pRepr == NULL )
-            continue;
-        if ( Aig_ObjIsTravIdCurrent(p->pAig, pRepr) )
-            continue;
-        Aig_ObjSetTravIdCurrent(p->pAig, pRepr);
-        Vec_PtrPush( p->vResimClasses, pRepr );
-    }
-    // simulate internal nodes
-//    Ssw_SmlSimulateOneFrame( p->pSml );
-//    Ssw_SmlSimulateOne( p->pSml );
-    // resimulate dynamically
-//    Aig_ManIncrementTravId( p->pAig );
-//    Aig_ObjIsTravIdCurrent( p->pAig, Aig_ManConst1(p->pAig) );
-    p->nVisCounter++;
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vResimConsts, pObj, i )
-        Ssw_SmlSimulateOneDyn_rec( p->pSml, pObj, p->nFrames-1, p->pVisited, p->nVisCounter );
-    // resimulate the cone of influence of the cand classes
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vResimClasses, pRepr, i )
-    {
-        ppClass = Ssw_ClassesReadClass( p->ppClasses, pRepr, &nSize );
-        for ( k = 0; k < nSize; k++ )
-            Ssw_SmlSimulateOneDyn_rec( p->pSml, ppClass[k], p->nFrames-1, p->pVisited, p->nVisCounter );
-    }
-
-    // check equivalence classes
-//    RetValue1 = Ssw_ClassesRefineConst1( p->ppClasses, 1 );
-//    RetValue2 = Ssw_ClassesRefine( p->ppClasses, 1 );
-    // refine these nodes
-    RetValue1 = Ssw_ClassesRefineConst1Group( p->ppClasses, p->vResimConsts, 1 );
-    RetValue2 = 0;
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vResimClasses, pRepr, i )
-        RetValue2 += Ssw_ClassesRefineOneClass( p->ppClasses, pRepr, 1 );
-
-    // prepare simulation info for the next round
-    Vec_PtrCleanSimInfo( p->vSimInfo, 0, 1 );
-    p->nPatterns = 0;
-    p->nSimRounds++;
-p->timeSimSat += clock() - clk;
-    return RetValue1 > 0 || RetValue2 > 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for the internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweepDyn( Ssw_Man_t * p )
-{ 
-    Bar_Progress_t * pProgress = NULL;
-    Aig_Obj_t * pObj, * pObjNew;
-    int clk, i, f;
-
-    // perform speculative reduction
-clk = clock();
-    // create timeframes
-    p->pFrames = Ssw_FramesWithClasses( p );
-    Aig_ManFanoutStart( p->pFrames );
-    p->nSRMiterMaxId = Aig_ManObjNumMax( p->pFrames );
-
-    // map constants and PIs of the last frame
-    f = p->pPars->nFramesK;
-    Ssw_ObjSetFrame( p, Aig_ManConst1(p->pAig), f, Aig_ManConst1(p->pFrames) );
-    Saig_ManForEachPi( p->pAig, pObj, i )
-        Ssw_ObjSetFrame( p, pObj, f, Aig_ObjCreatePi(p->pFrames) );
-    Aig_ManSetPioNumbers( p->pFrames );
-    // label nodes corresponding to primary inputs
-    Ssw_ManLabelPiNodes( p );
-p->timeReduce += clock() - clk;
-
-    // prepare simulation info
-    assert( p->vSimInfo == NULL );
-    p->vSimInfo = Vec_PtrAllocSimInfo( Aig_ManPiNum(p->pFrames), 1 );
-    Vec_PtrCleanSimInfo( p->vSimInfo, 0, 1 );
-
-    // sweep internal nodes
-    p->fRefined = 0;
-    Ssw_ClassesClearRefined( p->ppClasses );
-    if ( p->pPars->fVerbose )
-        pProgress = Bar_ProgressStart( stdout, Aig_ManObjNumMax(p->pAig) );
-    p->iNodeStart = 0;
-    Aig_ManForEachObj( p->pAig, pObj, i )
-    {
-        if ( p->iNodeStart == 0 )
-            p->iNodeStart = i;
-        if ( p->pPars->fVerbose )
-            Bar_ProgressUpdate( pProgress, i, NULL );
-        if ( Saig_ObjIsLo(p->pAig, pObj) )
-            p->fRefined |= Ssw_ManSweepNode( p, pObj, f, 0, NULL );
-        else if ( Aig_ObjIsNode(pObj) )
-        { 
-            pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) );
-            Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-            p->fRefined |= Ssw_ManSweepNode( p, pObj, f, 0, NULL );
-        }
-        // check if it is time to recycle the solver
-        if ( p->pMSat->pSat == NULL || 
-            (p->pPars->nSatVarMax2 && 
-             p->pMSat->nSatVars > p->pPars->nSatVarMax2 && 
-             p->nRecycleCalls > p->pPars->nRecycleCalls2) )
-        {
-            // resimulate
-            if ( p->nPatterns > 0 )
-            {
-                p->iNodeLast = i;
-                if ( p->pPars->fLocalSim )
-                    Ssw_ManSweepResimulateDynLocal( p, f );
-                else
-                    Ssw_ManSweepResimulateDyn( p, f );
-                p->iNodeStart = i+1;
-            }
-//                printf( "Recycling SAT solver with %d vars and %d calls.\n", 
-//                    p->pMSat->nSatVars, p->nRecycleCalls );
-//            Aig_ManCleanMarkAB( p->pAig );
-            Aig_ManCleanMarkAB( p->pFrames );
-            // label nodes corresponding to primary inputs
-            Ssw_ManLabelPiNodes( p );
-            // replace the solver
-            if ( p->pMSat )
-            {
-                p->nVarsMax  = ABC_MAX( p->nVarsMax,  p->pMSat->nSatVars );
-                p->nCallsMax = ABC_MAX( p->nCallsMax, p->pMSat->nSolverCalls );
-                Ssw_SatStop( p->pMSat );
-                p->nRecycles++;
-                p->nRecyclesTotal++;
-                p->nRecycleCalls = 0;
-            }
-            p->pMSat = Ssw_SatStart( 0 );
-            assert( p->nPatterns == 0 );
-        }
-        // resimulate
-        if ( p->nPatterns == 32 )
-        {
-            p->iNodeLast = i;
-            if ( p->pPars->fLocalSim )
-                Ssw_ManSweepResimulateDynLocal( p, f );
-            else
-                Ssw_ManSweepResimulateDyn( p, f );
-            p->iNodeStart = i+1;
-        }
-    }
-    // resimulate
-    if ( p->nPatterns > 0 )
-    {
-        p->iNodeLast = i;
-        if ( p->pPars->fLocalSim )
-            Ssw_ManSweepResimulateDynLocal( p, f );
-        else
-            Ssw_ManSweepResimulateDyn( p, f );
-    }
-    // collect stats
-    if ( p->pPars->fVerbose )
-        Bar_ProgressStop( pProgress );
-
-    // cleanup
-//    Ssw_ClassesCheck( p->ppClasses );
-    return p->fRefined;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswFilter.c b/src/aig/ssw/sswFilter.c
deleted file mode 100644
index 7298c5f8..00000000
--- a/src/aig/ssw/sswFilter.c
+++ /dev/null
@@ -1,493 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswConstr.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [One round of SAT sweeping.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswConstr.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-#include "giaAig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManRefineByFilterSim( Ssw_Man_t * p, int nFrames )
-{ 
-    Aig_Obj_t * pObj, * pObjLi;
-    int f, i, RetValue1, RetValue2;
-    assert( nFrames > 0 );
-    // assign register outputs
-    Saig_ManForEachLi( p->pAig, pObj, i )
-        pObj->fMarkB = Aig_InfoHasBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i );
-    // simulate the timeframes
-    for ( f = 0; f < nFrames; f++ )
-    {
-        // set the PI simulation information
-        Aig_ManConst1(p->pAig)->fMarkB = 1;
-        Saig_ManForEachPi( p->pAig, pObj, i )
-            pObj->fMarkB = 0;
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObj, i )
-            pObj->fMarkB = pObjLi->fMarkB;
-        // simulate internal nodes
-        Aig_ManForEachNode( p->pAig, pObj, i )
-            pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) )
-                         & ( Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj) );
-        // assign the COs
-        Aig_ManForEachPo( p->pAig, pObj, i )
-            pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) );
-        // transfer
-        if ( f == 0 )
-        { // copy markB into phase
-            Aig_ManForEachObj( p->pAig, pObj, i )
-                pObj->fPhase = pObj->fMarkB;
-        }
-        else
-        { // refine classes
-            RetValue1 = Ssw_ClassesRefineConst1( p->ppClasses, 0 );
-            RetValue2 = Ssw_ClassesRefine( p->ppClasses, 0 );
-        }
-    }
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManRollForward( Ssw_Man_t * p, int nFrames )
-{ 
-    Aig_Obj_t * pObj, * pObjLi;
-    int f, i;
-    assert( nFrames > 0 );
-    // assign register outputs
-    Saig_ManForEachLi( p->pAig, pObj, i )
-        pObj->fMarkB = Aig_InfoHasBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i );
-    // simulate the timeframes
-    for ( f = 0; f < nFrames; f++ )
-    {
-        // set the PI simulation information
-        Aig_ManConst1(p->pAig)->fMarkB = 1;
-        Saig_ManForEachPi( p->pAig, pObj, i )
-            pObj->fMarkB = Aig_ManRandom(0) & 1;
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObj, i )
-            pObj->fMarkB = pObjLi->fMarkB;
-        // simulate internal nodes
-        Aig_ManForEachNode( p->pAig, pObj, i )
-            pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) )
-                         & ( Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj) );
-        // assign the COs
-        Aig_ManForEachPo( p->pAig, pObj, i )
-            pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) );
-    }
-    // record the new pattern
-    Saig_ManForEachLi( p->pAig, pObj, i )
-        if ( pObj->fMarkB ^ Aig_InfoHasBit(p->pPatWords, Saig_ManPiNum(p->pAig) + i) )
-            Aig_InfoXorBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManFindStartingState( Ssw_Man_t * p, Abc_Cex_t * pCex )
-{ 
-    Aig_Obj_t * pObj, * pObjLi;
-    int f, i, iBit;
-    // assign register outputs
-    Saig_ManForEachLi( p->pAig, pObj, i )
-        pObj->fMarkB = 0;
-    // simulate the timeframes
-    iBit = pCex->nRegs;
-    for ( f = 0; f <= pCex->iFrame; f++ )
-    {
-        // set the PI simulation information
-        Aig_ManConst1(p->pAig)->fMarkB = 1;
-        Saig_ManForEachPi( p->pAig, pObj, i )
-            pObj->fMarkB = Aig_InfoHasBit( pCex->pData, iBit++ );
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObj, i )
-            pObj->fMarkB = pObjLi->fMarkB;
-        // simulate internal nodes
-        Aig_ManForEachNode( p->pAig, pObj, i )
-            pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) )
-                         & ( Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj) );
-        // assign the COs
-        Aig_ManForEachPo( p->pAig, pObj, i )
-            pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) );
-    }
-    assert( iBit == pCex->nBits );
-    // check that the output failed as expected -- cannot check because it is not an SRM!
-//    pObj = Aig_ManPo( p->pAig, pCex->iPo );
-//    if ( pObj->fMarkB != 1 )
-//        printf( "The counter-example does not refine the output.\n" );
-    // record the new pattern
-    Saig_ManForEachLo( p->pAig, pObj, i )
-        if ( pObj->fMarkB ^ Aig_InfoHasBit(p->pPatWords, Saig_ManPiNum(p->pAig) + i) )
-            Aig_InfoXorBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweepNodeFilter( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
-{ 
-    Aig_Obj_t * pObjRepr, * pObjFraig, * pObjFraig2, * pObjReprFraig;
-    int RetValue;
-    // get representative of this class
-    pObjRepr = Aig_ObjRepr( p->pAig, pObj );
-    if ( pObjRepr == NULL )
-        return 0;
-    // get the fraiged node
-    pObjFraig = Ssw_ObjFrame( p, pObj, f );
-    // get the fraiged representative
-    pObjReprFraig = Ssw_ObjFrame( p, pObjRepr, f );
-    // check if constant 0 pattern distinquishes these nodes
-    assert( pObjFraig != NULL && pObjReprFraig != NULL );
-    assert( (pObj->fPhase == pObjRepr->fPhase) == (Aig_ObjPhaseReal(pObjFraig) == Aig_ObjPhaseReal(pObjReprFraig)) );
-    // if the fraiged nodes are the same, return
-    if ( Aig_Regular(pObjFraig) == Aig_Regular(pObjReprFraig) )
-        return 0; 
-    // call equivalence checking
-    if ( Aig_Regular(pObjFraig) != Aig_ManConst1(p->pFrames) )
-        RetValue = Ssw_NodesAreEquiv( p, Aig_Regular(pObjReprFraig), Aig_Regular(pObjFraig) );
-    else
-        RetValue = Ssw_NodesAreEquiv( p, Aig_Regular(pObjFraig), Aig_Regular(pObjReprFraig) );
-    if ( RetValue == 1 )  // proved equivalent
-    {
-        pObjFraig2 = Aig_NotCond( pObjReprFraig, pObj->fPhase ^ pObjRepr->fPhase );
-        Ssw_ObjSetFrame( p, pObj, f, pObjFraig2 );
-        return 0;
-    }
-    if ( RetValue == -1 ) // timed out
-    {
-//        Ssw_ClassesRemoveNode( p->ppClasses, pObj );
-        return 1;
-    }
-    // disproved equivalence
-    Ssw_SmlSavePatternAig( p, f );
-    Ssw_ManResimulateBit( p, pObj, pObjRepr );
-    assert( Aig_ObjRepr( p->pAig, pObj ) != pObjRepr );
-    if ( Aig_ObjRepr( p->pAig, pObj ) == pObjRepr )
-    {
-        printf( "Ssw_ManSweepNodeFilter(): Failed to refine representative.\n" );
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for the internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Obj_t * Ssw_ManSweepBmcFilter_rec( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
-{
-    Aig_Obj_t * pObjNew, * pObjLi;
-    pObjNew = Ssw_ObjFrame( p, pObj, f );
-    if ( pObjNew )
-        return pObjNew;
-    assert( !Saig_ObjIsPi(p->pAig, pObj) );
-    if ( Saig_ObjIsLo(p->pAig, pObj) )
-    {
-        assert( f > 0 );
-        pObjLi  = Saig_ObjLoToLi( p->pAig, pObj );
-        pObjNew = Ssw_ManSweepBmcFilter_rec( p, Aig_ObjFanin0(pObjLi), f-1 );
-        pObjNew = Aig_NotCond( pObjNew, Aig_ObjFaninC0(pObjLi) );
-    }
-    else
-    {
-        assert( Aig_ObjIsNode(pObj) );
-        Ssw_ManSweepBmcFilter_rec( p, Aig_ObjFanin0(pObj), f );
-        Ssw_ManSweepBmcFilter_rec( p, Aig_ObjFanin1(pObj), f );
-        pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) );
-    }
-    Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-    assert( pObjNew != NULL );
-    return pObjNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Filter equivalence classes of nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweepBmcFilter( Ssw_Man_t * p, int TimeLimit )
-{
-    Aig_Obj_t * pObj, * pObjNew, * pObjLi, * pObjLo;
-    int f, f1, i, clkTotal = clock();
-    // start initialized timeframes
-    p->pFrames = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * p->pPars->nFramesK );
-    Saig_ManForEachLo( p->pAig, pObj, i )
-    {
-        if ( Aig_InfoHasBit( p->pPatWords, Saig_ManPiNum(p->pAig) + i ) )
-        {
-            Ssw_ObjSetFrame( p, pObj, 0, Aig_ManConst1(p->pFrames) );
-//printf( "1" );
-        }
-        else
-        {
-            Ssw_ObjSetFrame( p, pObj, 0, Aig_ManConst0(p->pFrames) );
-//printf( "0" );
-        }
-    }
-//printf( "\n" );
-
-    // sweep internal nodes
-    for ( f = 0; f < p->pPars->nFramesK; f++ )
-    {
-        // realloc mapping of timeframes
-        if ( f == p->nFrames-1 )
-        {
-            Aig_Obj_t ** pNodeToFrames;
-            pNodeToFrames = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAig) * 2 * p->nFrames );
-            for ( f1 = 0; f1 < p->nFrames; f1++ )
-            {
-                Aig_ManForEachObj( p->pAig, pObj, i )
-                    pNodeToFrames[2*p->nFrames*pObj->Id + f1] = Ssw_ObjFrame( p, pObj, f1 );
-            }
-            ABC_FREE( p->pNodeToFrames );
-            p->pNodeToFrames = pNodeToFrames;
-            p->nFrames *= 2;
-        }
-        // map constants and PIs
-        Ssw_ObjSetFrame( p, Aig_ManConst1(p->pAig), f, Aig_ManConst1(p->pFrames) );
-        Saig_ManForEachPi( p->pAig, pObj, i )
-        {
-            pObjNew = Aig_ObjCreatePi(p->pFrames);
-            Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-        }
-        // sweep internal nodes
-        Aig_ManForEachNode( p->pAig, pObj, i )
-        {
-            pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) );
-            Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-            if ( Ssw_ManSweepNodeFilter( p, pObj, f ) )
-                break;
-        }
-        // printout
-        if ( p->pPars->fVerbose )
-        {
-            printf( "Frame %4d : ", f );
-            Ssw_ClassesPrint( p->ppClasses, 0 );
-        }
-        if ( i < Vec_PtrSize(p->pAig->vObjs) )
-        {
-            if ( p->pPars->fVerbose )
-                printf( "Exceeded the resource limits (%d conflicts). Quitting...\n", p->pPars->nBTLimit );
-            break;
-        }       
-        // quit if this is the last timeframe
-        if ( f == p->pPars->nFramesK - 1 )
-        {
-            if ( p->pPars->fVerbose )
-                printf( "Exceeded the time frame limit (%d time frames). Quitting...\n", p->pPars->nFramesK );
-            break;
-        }
-        // check timeout
-        if ( TimeLimit && ((float)TimeLimit <= (float)(clock()-clkTotal)/(float)(CLOCKS_PER_SEC)) )
-            break;
-        // transfer latch input to the latch outputs 
-        Aig_ManForEachPo( p->pAig, pObj, i )
-            Ssw_ObjSetFrame( p, pObj, f, Ssw_ObjChild0Fra(p, pObj, f) );
-        // build logic cones for register outputs
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-        {
-            pObjNew = Ssw_ObjFrame( p, pObjLi, f );
-            Ssw_ObjSetFrame( p, pObjLo, f+1, pObjNew );
-            Ssw_CnfNodeAddToSolver( p->pMSat, Aig_Regular(pObjNew) );//
-        }
-    }
-    // verify
-//    Ssw_ClassesCheck( p->ppClasses );
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Filter equivalence classes of nodes.]
-
-  Description [Unrolls at most nFramesMax frames. Works with nConfMax 
-  conflicts until the first undefined SAT call. Verbose prints the message.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SignalFilter( Aig_Man_t * pAig, int nFramesMax, int nConfMax, int nRounds, int TimeLimit, int TimeLimit2, Abc_Cex_t * pCex, int fLatchOnly, int fVerbose )
-{
-    Ssw_Pars_t Pars, * pPars = &Pars;
-    Ssw_Man_t * p;
-    int r, TimeLimitPart, clkTotal = clock();
-    int nTimeToStop = TimeLimit ? TimeLimit + time(NULL) : 0;
-    assert( Aig_ManRegNum(pAig) > 0 );
-    assert( Aig_ManConstrNum(pAig) == 0 );
-    // consider the case of empty AIG
-    if ( Aig_ManNodeNum(pAig) == 0 )
-        return;
-    // reset random numbers
-    Aig_ManRandom( 1 );
-    // if parameters are not given, create them
-    Ssw_ManSetDefaultParams( pPars = &Pars );
-    pPars->nFramesK  = 3; //nFramesMax;
-    pPars->nBTLimit  = nConfMax;
-    pPars->TimeLimit = TimeLimit;
-    pPars->fVerbose  = fVerbose;
-    // start the induction manager
-    p = Ssw_ManCreate( pAig, pPars );
-    pPars->nFramesK  = nFramesMax;
-    // create trivial equivalence classes with all nodes being candidates for constant 1
-    if ( pAig->pReprs == NULL )
-        p->ppClasses = Ssw_ClassesPrepareSimple( pAig, fLatchOnly, 0 );
-    else
-        p->ppClasses = Ssw_ClassesPrepareFromReprs( pAig );
-    Ssw_ClassesSetData( p->ppClasses, NULL, NULL, Ssw_SmlObjIsConstBit, Ssw_SmlObjsAreEqualBit );
-    assert( p->vInits == NULL );
-    // compute starting state if needed
-    if ( pCex )
-        Ssw_ManFindStartingState( p, pCex );
-    // refine classes using BMC
-    for ( r = 0; r < nRounds; r++ )
-    {
-        if ( p->pPars->fVerbose )
-            printf( "Round %3d:\n", r );
-        // start filtering equivalence classes
-        Ssw_ManRefineByFilterSim( p, p->pPars->nFramesK );
-        if ( Ssw_ClassesCand1Num(p->ppClasses) == 0 && Ssw_ClassesClassNum(p->ppClasses) == 0 )
-        {
-            printf( "All equivalences are refined away.\n" );
-            break;
-        }
-        // printout
-        if ( p->pPars->fVerbose )
-        {
-            printf( "Initial    : " );
-            Ssw_ClassesPrint( p->ppClasses, 0 );
-        }
-        p->pMSat = Ssw_SatStart( 0 );
-        TimeLimitPart = TimeLimit ? nTimeToStop - time(NULL) : 0;
-        if ( TimeLimit2 )
-        {
-            if ( TimeLimitPart )
-                TimeLimitPart = ABC_MIN( TimeLimitPart, TimeLimit2 );
-            else
-                TimeLimitPart = TimeLimit2;
-        }
-        Ssw_ManSweepBmcFilter( p, TimeLimitPart );
-        Ssw_SatStop( p->pMSat );
-        p->pMSat = NULL;
-        Ssw_ManCleanup( p );
-        // simulate pattern forward
-        Ssw_ManRollForward( p, p->pPars->nFramesK );
-        // check timeout
-        if ( TimeLimit && time(NULL) > nTimeToStop )
-        {
-            printf( "Reached timeout (%d seconds).\n",  TimeLimit );
-            break;
-        }
-    }
-    // cleanup
-    Aig_ManSetPhase( p->pAig );
-    Aig_ManCleanMarkB( p->pAig );
-    // cleanup
-    pPars->fVerbose = 0;
-    Ssw_ManStop( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Filter equivalence classes of nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SignalFilterGia( Gia_Man_t * p, int nFramesMax, int nConfMax, int nRounds, int TimeLimit, int TimeLimit2, Abc_Cex_t * pCex, int fLatchOnly, int fVerbose )
-{ 
-    Aig_Man_t * pAig;
-    pAig = Gia_ManToAigSimple( p );
-    if ( p->pReprs != NULL )
-    {
-        Gia_ManReprToAigRepr2( pAig, p );
-        ABC_FREE( p->pReprs );
-        ABC_FREE( p->pNexts );
-    }
-    Ssw_SignalFilter( pAig, nFramesMax, nConfMax, nRounds, TimeLimit, TimeLimit2, pCex, fLatchOnly, fVerbose );
-    Gia_ManReprFromAigRepr( pAig, p );
-    Aig_ManStop( pAig );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswInt.h b/src/aig/ssw/sswInt.h
deleted file mode 100644
index 15756782..00000000
--- a/src/aig/ssw/sswInt.h
+++ /dev/null
@@ -1,302 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswInt.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswInt.h,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
- 
-#ifndef __SSW_INT_H__
-#define __SSW_INT_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-#include "saig.h"
-#include "satSolver.h"
-#include "ssw.h"
-#include "ioa.h"
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Ssw_Man_t_ Ssw_Man_t; // signal correspondence manager
-typedef struct Ssw_Frm_t_ Ssw_Frm_t; // unrolled frames manager
-typedef struct Ssw_Sat_t_ Ssw_Sat_t; // SAT solver manager
-typedef struct Ssw_Cla_t_ Ssw_Cla_t; // equivalence classe manager
-
-struct Ssw_Man_t_
-{
-    // parameters
-    Ssw_Pars_t *     pPars;          // parameters
-    int              nFrames;        // for quick lookup
-    // AIGs used in the package
-    Aig_Man_t *      pAig;           // user-given AIG
-    Aig_Man_t *      pFrames;        // final AIG
-    Aig_Obj_t **     pNodeToFrames;  // mapping of AIG nodes into FRAIG nodes
-    // equivalence classes
-    Ssw_Cla_t *      ppClasses;      // equivalence classes of nodes
-    int              fRefined;       // is set to 1 when refinement happens
-    // SAT solving 
-    Ssw_Sat_t *      pMSatBmc;       // SAT manager for base case
-    Ssw_Sat_t *      pMSat;          // SAT manager for inductive case
-    // SAT solving (latch corr only)
-    Vec_Ptr_t *      vSimInfo;       // simulation information for the framed PIs
-    int              nPatterns;      // the number of patterns saved
-    int              nSimRounds;     // the number of simulation rounds performed
-    int              nCallsCount;    // the number of calls in this round
-    int              nCallsDelta;    // the number of calls to skip
-    int              nCallsSat;      // the number of SAT calls in this round
-    int              nCallsUnsat;    // the number of UNSAT calls in this round
-    int              nRecycleCalls;  // the number of calls since last recycling
-    int              nRecycles;      // the number of time SAT solver was recycled
-    int              nRecyclesTotal; // the number of time SAT solver was recycled
-    int              nVarsMax;       // the maximum variables in the solver
-    int              nCallsMax;      // the maximum number of SAT calls
-    // uniqueness
-    Vec_Ptr_t *      vCommon;        // the set of common variables in the logic cones
-    int              iOutputLit;     // the output literal of the uniqueness constraint
-    Vec_Int_t *      vDiffPairs;     // is set to 1 if reg pair can be diff
-    int              nUniques;       // the number of uniqueness constraints used 
-    int              nUniquesAdded;  // useful uniqueness constraints
-    int              nUniquesUseful; // useful uniqueness constraints
-    // dynamic constraint addition
-    int              nSRMiterMaxId;  // max ID after which the last frame begins
-    Vec_Ptr_t *      vNewLos;        // new time frame LOs of to constrain
-    Vec_Int_t *      vNewPos;        // new time frame POs of to add constraints
-    int *            pVisited;       // flags to label visited nodes in each frame
-    int              nVisCounter;    // the traversal ID
-    // sequential simulation
-    Ssw_Sml_t *      pSml;           // the simulator
-    int              iNodeStart;     // the first node considered
-    int              iNodeLast;      // the last node considered
-    Vec_Ptr_t *      vResimConsts;   // resimulation constants
-    Vec_Ptr_t *      vResimClasses;  // resimulation classes
-    Vec_Int_t *      vInits;         // the init values of primary inputs under constraints
-    // counter example storage
-    int              nPatWords;      // the number of words in the counter example
-    unsigned *       pPatWords;      // the counter example
-    // constraints
-    int              nConstrTotal;   // the number of total constraints
-    int              nConstrReduced; // the number of reduced constraints
-    int              nStrangers;     // the number of strange situations
-    // SAT calls statistics
-    int              nSatCalls;      // the number of SAT calls
-    int              nSatProof;      // the number of proofs
-    int              nSatFailsReal;  // the number of timeouts
-    int              nSatCallsUnsat; // the number of unsat SAT calls
-    int              nSatCallsSat;   // the number of sat SAT calls
-    // node/register/lit statistics
-    int              nLitsBeg;
-    int              nLitsEnd;
-    int              nNodesBeg;
-    int              nNodesEnd;
-    int              nRegsBeg;
-    int              nRegsEnd;
-    // equiv statistis
-    int              nConesTotal;
-    int              nConesConstr;
-    int              nEquivsTotal;
-    int              nEquivsConstr;
-    int              nNodesBegC;
-    int              nNodesEndC;
-    int              nRegsBegC;
-    int              nRegsEndC;
-    // runtime stats
-    int              timeBmc;        // bounded model checking
-    int              timeReduce;     // speculative reduction
-    int              timeMarkCones;  // marking the cones not to be refined
-    int              timeSimSat;     // simulation of the counter-examples
-    int              timeSat;        // solving SAT
-    int              timeSatSat;     // sat
-    int              timeSatUnsat;   // unsat
-    int              timeSatUndec;   // undecided
-    int              timeOther;      // other runtime
-    int              timeTotal;      // total runtime
-};
-
-// internal SAT manager
-struct Ssw_Sat_t_
-{
-    Aig_Man_t *      pAig;           // the AIG manager
-    int              fPolarFlip;     // flips polarity 
-    sat_solver *     pSat;           // recyclable SAT solver
-    int              nSatVars;       // the counter of SAT variables
-    Vec_Int_t *      vSatVars;       // mapping of each node into its SAT var
-    Vec_Ptr_t *      vFanins;        // fanins of the CNF node
-    Vec_Ptr_t *      vUsedPis;       // the PIs with SAT variables 
-    int              nSolverCalls;   // the total number of SAT calls
-};
-
-// internal frames manager
-struct Ssw_Frm_t_
-{
-    Aig_Man_t *      pAig;           // user-given AIG
-    int              nObjs;          // offset in terms of AIG nodes
-    int              nFrames;        // the number of frames in current unrolling
-    Aig_Man_t *      pFrames;        // unrolled AIG
-    Vec_Ptr_t *      vAig2Frm;       // mapping of AIG nodes into frame nodes
-};
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-static inline int  Ssw_ObjSatNum( Ssw_Sat_t * p, Aig_Obj_t * pObj )             { return Vec_IntGetEntry( p->vSatVars, pObj->Id );  }
-static inline void Ssw_ObjSetSatNum( Ssw_Sat_t * p, Aig_Obj_t * pObj, int Num ) { Vec_IntSetEntry(p->vSatVars, pObj->Id, Num);      }
-
-static inline int  Ssw_ObjIsConst1Cand( Aig_Man_t * pAig, Aig_Obj_t * pObj ) 
-{
-    return Aig_ObjRepr(pAig, pObj) == Aig_ManConst1(pAig);
-}
-static inline void Ssw_ObjSetConst1Cand( Aig_Man_t * pAig, Aig_Obj_t * pObj ) 
-{
-    assert( !Ssw_ObjIsConst1Cand( pAig, pObj ) );
-    Aig_ObjSetRepr( pAig, pObj, Aig_ManConst1(pAig) );
-}
-
-static inline Aig_Obj_t * Ssw_ObjFrame( Ssw_Man_t * p, Aig_Obj_t * pObj, int i )                       { return p->pNodeToFrames[p->nFrames*pObj->Id + i];  }
-static inline void        Ssw_ObjSetFrame( Ssw_Man_t * p, Aig_Obj_t * pObj, int i, Aig_Obj_t * pNode ) { p->pNodeToFrames[p->nFrames*pObj->Id + i] = pNode; }
-
-static inline Aig_Obj_t * Ssw_ObjChild0Fra( Ssw_Man_t * p, Aig_Obj_t * pObj, int i ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin0(pObj)? Aig_NotCond(Ssw_ObjFrame(p, Aig_ObjFanin0(pObj), i), Aig_ObjFaninC0(pObj)) : NULL;  }
-static inline Aig_Obj_t * Ssw_ObjChild1Fra( Ssw_Man_t * p, Aig_Obj_t * pObj, int i ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? Aig_NotCond(Ssw_ObjFrame(p, Aig_ObjFanin1(pObj), i), Aig_ObjFaninC1(pObj)) : NULL;  }
-
-static inline Aig_Obj_t * Ssw_ObjFrame_( Ssw_Frm_t * p, Aig_Obj_t * pObj, int i )                       { return (Aig_Obj_t *)Vec_PtrGetEntry( p->vAig2Frm, p->nObjs*i+pObj->Id );     }
-static inline void        Ssw_ObjSetFrame_( Ssw_Frm_t * p, Aig_Obj_t * pObj, int i, Aig_Obj_t * pNode ) { Vec_PtrSetEntry( p->vAig2Frm, p->nObjs*i+pObj->Id, pNode );     }
-
-static inline Aig_Obj_t * Ssw_ObjChild0Fra_( Ssw_Frm_t * p, Aig_Obj_t * pObj, int i ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin0(pObj)? Aig_NotCond(Ssw_ObjFrame_(p, Aig_ObjFanin0(pObj), i), Aig_ObjFaninC0(pObj)) : NULL;  }
-static inline Aig_Obj_t * Ssw_ObjChild1Fra_( Ssw_Frm_t * p, Aig_Obj_t * pObj, int i ) { assert( !Aig_IsComplement(pObj) ); return Aig_ObjFanin1(pObj)? Aig_NotCond(Ssw_ObjFrame_(p, Aig_ObjFanin1(pObj), i), Aig_ObjFaninC1(pObj)) : NULL;  }
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== sswAig.c ===================================================*/
-extern Ssw_Frm_t *   Ssw_FrmStart( Aig_Man_t * pAig );
-extern void          Ssw_FrmStop( Ssw_Frm_t * p );
-extern Aig_Man_t *   Ssw_FramesWithClasses( Ssw_Man_t * p );
-extern Aig_Man_t *   Ssw_SpeculativeReduction( Ssw_Man_t * p );
-/*=== sswBmc.c ===================================================*/
-/*=== sswClass.c =================================================*/
-extern Ssw_Cla_t *   Ssw_ClassesStart( Aig_Man_t * pAig );
-extern void          Ssw_ClassesSetData( Ssw_Cla_t * p, void * pManData,
-                         unsigned (*pFuncNodeHash)(void *,Aig_Obj_t *),
-                         int (*pFuncNodeIsConst)(void *,Aig_Obj_t *),
-                         int (*pFuncNodesAreEqual)(void *,Aig_Obj_t *, Aig_Obj_t *) );
-extern void          Ssw_ClassesStop( Ssw_Cla_t * p );
-extern Aig_Man_t *   Ssw_ClassesReadAig( Ssw_Cla_t * p );
-extern Vec_Ptr_t *   Ssw_ClassesGetRefined( Ssw_Cla_t * p );
-extern void          Ssw_ClassesClearRefined( Ssw_Cla_t * p );
-extern int           Ssw_ClassesCand1Num( Ssw_Cla_t * p );
-extern int           Ssw_ClassesClassNum( Ssw_Cla_t * p );
-extern int           Ssw_ClassesLitNum( Ssw_Cla_t * p );
-extern Aig_Obj_t **  Ssw_ClassesReadClass( Ssw_Cla_t * p, Aig_Obj_t * pRepr, int * pnSize );
-extern void          Ssw_ClassesCollectClass( Ssw_Cla_t * p, Aig_Obj_t * pRepr, Vec_Ptr_t * vClass );
-extern void          Ssw_ClassesCheck( Ssw_Cla_t * p );
-extern void          Ssw_ClassesPrint( Ssw_Cla_t * p, int fVeryVerbose );
-extern void          Ssw_ClassesRemoveNode( Ssw_Cla_t * p, Aig_Obj_t * pObj );
-extern Ssw_Cla_t *   Ssw_ClassesPrepare( Aig_Man_t * pAig, int nFramesK, int fLatchCorr, int fConstCorr, int fOutputCorr, int nMaxLevs, int fVerbose );
-extern Ssw_Cla_t *   Ssw_ClassesPrepareSimple( Aig_Man_t * pAig, int fLatchCorr, int nMaxLevs );
-extern Ssw_Cla_t *   Ssw_ClassesPrepareFromReprs( Aig_Man_t * pAig );
-extern Ssw_Cla_t *   Ssw_ClassesPrepareTargets( Aig_Man_t * pAig );
-extern Ssw_Cla_t *   Ssw_ClassesPreparePairs( Aig_Man_t * pAig, Vec_Int_t ** pvClasses );
-extern Ssw_Cla_t *   Ssw_ClassesPreparePairsSimple( Aig_Man_t * pMiter, Vec_Int_t * vPairs );
-extern int           Ssw_ClassesRefine( Ssw_Cla_t * p, int fRecursive );
-extern int           Ssw_ClassesRefineGroup( Ssw_Cla_t * p, Vec_Ptr_t * vReprs, int fRecursive );
-extern int           Ssw_ClassesRefineOneClass( Ssw_Cla_t * p, Aig_Obj_t * pRepr, int fRecursive );
-extern int           Ssw_ClassesRefineConst1Group( Ssw_Cla_t * p, Vec_Ptr_t * vRoots, int fRecursive );
-extern int           Ssw_ClassesRefineConst1( Ssw_Cla_t * p, int fRecursive );
-extern int           Ssw_ClassesPrepareRehash( Ssw_Cla_t * p, Vec_Ptr_t * vCands, int fConstCorr );
-/*=== sswCnf.c ===================================================*/
-extern Ssw_Sat_t *   Ssw_SatStart( int fPolarFlip );
-extern void          Ssw_SatStop( Ssw_Sat_t * p );
-extern void          Ssw_CnfNodeAddToSolver( Ssw_Sat_t * p, Aig_Obj_t * pObj );
-extern int           Ssw_CnfGetNodeValue( Ssw_Sat_t * p, Aig_Obj_t * pObjFraig );
-/*=== sswConstr.c ===================================================*/
-extern int           Ssw_ManSweepBmcConstr( Ssw_Man_t * p );
-extern int           Ssw_ManSweepConstr( Ssw_Man_t * p );
-extern void          Ssw_ManRefineByConstrSim( Ssw_Man_t * p );
-/*=== sswCore.c ===================================================*/
-extern Aig_Man_t *   Ssw_SignalCorrespondenceRefine( Ssw_Man_t * p );
-/*=== sswDyn.c ===================================================*/
-extern void          Ssw_ManLoadSolver( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj );
-extern int           Ssw_ManSweepDyn( Ssw_Man_t * p );
-/*=== sswLcorr.c ==========================================================*/
-extern int           Ssw_ManSweepLatch( Ssw_Man_t * p );
-/*=== sswMan.c ===================================================*/
-extern Ssw_Man_t *   Ssw_ManCreate( Aig_Man_t * pAig, Ssw_Pars_t * pPars );
-extern void          Ssw_ManCleanup( Ssw_Man_t * p );
-extern void          Ssw_ManStop( Ssw_Man_t * p );
-/*=== sswSat.c ===================================================*/
-extern int           Ssw_NodesAreEquiv( Ssw_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew );
-extern int           Ssw_NodesAreConstrained( Ssw_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew );
-extern int           Ssw_NodeIsConstrained( Ssw_Man_t * p, Aig_Obj_t * pPoObj );
-/*=== sswSemi.c ===================================================*/
-extern int           Ssw_FilterUsingSemi( Ssw_Man_t * pMan, int fCheckTargets, int nConfMax, int fVerbose );
-/*=== sswSim.c ===================================================*/
-extern unsigned      Ssw_SmlObjHashWord( Ssw_Sml_t * p, Aig_Obj_t * pObj );
-extern int           Ssw_SmlObjIsConstWord( Ssw_Sml_t * p, Aig_Obj_t * pObj );
-extern int           Ssw_SmlObjsAreEqualWord( Ssw_Sml_t * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 );
-extern int           Ssw_SmlObjIsConstBit( void * p, Aig_Obj_t * pObj );
-extern int           Ssw_SmlObjsAreEqualBit( void * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 );
-extern void          Ssw_SmlAssignRandomFrame( Ssw_Sml_t * p, Aig_Obj_t * pObj, int iFrame );
-extern Ssw_Sml_t *   Ssw_SmlStart( Aig_Man_t * pAig, int nPref, int nFrames, int nWordsFrame );
-extern void          Ssw_SmlClean( Ssw_Sml_t * p );
-extern void          Ssw_SmlStop( Ssw_Sml_t * p );
-extern void          Ssw_SmlObjAssignConst( Ssw_Sml_t * p, Aig_Obj_t * pObj, int fConst1, int iFrame );
-extern void          Ssw_SmlObjSetWord( Ssw_Sml_t * p, Aig_Obj_t * pObj, unsigned Word, int iWord, int iFrame );
-extern void          Ssw_SmlAssignDist1Plus( Ssw_Sml_t * p, unsigned * pPat );
-extern void          Ssw_SmlSimulateOne( Ssw_Sml_t * p );
-extern void          Ssw_SmlSimulateOneFrame( Ssw_Sml_t * p );
-extern void          Ssw_SmlSimulateOneDyn_rec( Ssw_Sml_t * p, Aig_Obj_t * pObj, int f, int * pVisited, int nVisCounter );
-extern void          Ssw_SmlResimulateSeq( Ssw_Sml_t * p );
-/*=== sswSimSat.c ===================================================*/
-extern void          Ssw_ManResimulateBit( Ssw_Man_t * p, Aig_Obj_t * pObj, Aig_Obj_t * pRepr );
-extern void          Ssw_ManResimulateWord( Ssw_Man_t * p, Aig_Obj_t * pCand, Aig_Obj_t * pRepr, int f );
-/*=== sswSweep.c ===================================================*/
-extern int           Ssw_ManGetSatVarValue( Ssw_Man_t * p, Aig_Obj_t * pObj, int f );
-extern void          Ssw_SmlSavePatternAig( Ssw_Man_t * p, int f );
-extern int           Ssw_ManSweepNode( Ssw_Man_t * p, Aig_Obj_t * pObj, int f, int fBmc, Vec_Int_t * vPairs );
-extern int           Ssw_ManSweepBmc( Ssw_Man_t * p );
-extern int           Ssw_ManSweep( Ssw_Man_t * p );
-/*=== sswUnique.c ===================================================*/
-extern void          Ssw_UniqueRegisterPairInfo( Ssw_Man_t * p );
-extern int           Ssw_ManUniqueOne( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj, int fVerbose );
-extern int           Ssw_ManUniqueAddConstraint( Ssw_Man_t * p, Vec_Ptr_t * vCommon, int f1, int f2 );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
diff --git a/src/aig/ssw/sswIslands.c b/src/aig/ssw/sswIslands.c
deleted file mode 100644
index 0802aca5..00000000
--- a/src/aig/ssw/sswIslands.c
+++ /dev/null
@@ -1,598 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswIslands.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Detection of islands of difference.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswIslands.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates pair of structurally equivalent nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_CreatePair( Vec_Int_t * vPairs, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
-{
-    pObj0->pData = pObj1;
-    pObj1->pData = pObj0;
-    Vec_IntPush( vPairs, pObj0->Id );
-    Vec_IntPush( vPairs, pObj1->Id );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Establishes relationship between nodes using pairing.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_MatchingStart( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPairs )
-{
-    Aig_Obj_t * pObj0, * pObj1;
-    int i;
-    // create matching
-    Aig_ManCleanData( p0 );
-    Aig_ManCleanData( p1 );
-    for ( i = 0; i < Vec_IntSize(vPairs); i += 2 )
-    {
-        pObj0 = Aig_ManObj( p0, Vec_IntEntry(vPairs, i) );
-        pObj1 = Aig_ManObj( p1, Vec_IntEntry(vPairs, i+1) );
-        assert( pObj0->pData == NULL );
-        assert( pObj1->pData == NULL );
-        pObj0->pData = pObj1;
-        pObj1->pData = pObj0;
-    }
-    // make sure constants are matched
-    pObj0 = Aig_ManConst1( p0 );
-    pObj1 = Aig_ManConst1( p1 );
-    assert( pObj0->pData == pObj1 );
-    assert( pObj1->pData == pObj0 );
-    // make sure PIs are matched
-    Saig_ManForEachPi( p0, pObj0, i )
-    {
-        pObj1 = Aig_ManPi( p1, i );
-        assert( pObj0->pData == pObj1 );
-        assert( pObj1->pData == pObj0 );
-    }
-    // make sure the POs are not matched
-    Aig_ManForEachPo( p0, pObj0, i )
-    {
-        pObj1 = Aig_ManPo( p1, i );
-        assert( pObj0->pData == NULL );
-        assert( pObj1->pData == NULL );
-    }
-
-    // check that LIs/LOs are matched in sync
-    Saig_ManForEachLo( p0, pObj0, i )
-    {
-        if ( pObj0->pData == NULL )
-            continue;
-        pObj1 = (Aig_Obj_t *)pObj0->pData;
-        if ( !Saig_ObjIsLo(p1, pObj1) )
-            printf( "Mismatch between LO pairs.\n" );
-    }
-    Saig_ManForEachLo( p1, pObj1, i )
-    {
-        if ( pObj1->pData == NULL )
-            continue;
-        pObj0 = (Aig_Obj_t *)pObj1->pData;
-        if ( !Saig_ObjIsLo(p0, pObj0) )
-            printf( "Mismatch between LO pairs.\n" );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Establishes relationship between nodes using pairing.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_MatchingExtendOne( Aig_Man_t * p, Vec_Ptr_t * vNodes )
-{
-    Aig_Obj_t * pNext, * pObj;
-    int i, k, iFan;
-    Vec_PtrClear( vNodes );
-    Aig_ManIncrementTravId( p );
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
-            continue;
-        if ( pObj->pData != NULL )
-            continue;
-        if ( Saig_ObjIsLo(p, pObj) )
-        {
-            pNext = Saig_ObjLoToLi(p, pObj);
-            pNext = Aig_ObjFanin0(pNext);
-            if ( pNext->pData && !Aig_ObjIsTravIdCurrent(p, pNext) && !Aig_ObjIsConst1(pNext) )
-            {
-                Aig_ObjSetTravIdCurrent(p, pNext);
-                Vec_PtrPush( vNodes, pNext );
-            }
-        }
-        if ( Aig_ObjIsNode(pObj) )
-        {
-            pNext = Aig_ObjFanin0(pObj);
-            if ( pNext->pData && !Aig_ObjIsTravIdCurrent(p, pNext) )
-            {
-                Aig_ObjSetTravIdCurrent(p, pNext);
-                Vec_PtrPush( vNodes, pNext );
-            }
-            pNext = Aig_ObjFanin1(pObj);
-            if ( pNext->pData && !Aig_ObjIsTravIdCurrent(p, pNext) )
-            {
-                Aig_ObjSetTravIdCurrent(p, pNext);
-                Vec_PtrPush( vNodes, pNext );
-            }
-        }
-        Aig_ObjForEachFanout( p, pObj, pNext, iFan, k )  
-        {
-            if ( Saig_ObjIsPo(p, pNext) )
-                continue;
-            if ( Saig_ObjIsLi(p, pNext) )
-                pNext = Saig_ObjLiToLo(p, pNext);
-            if ( pNext->pData && !Aig_ObjIsTravIdCurrent(p, pNext) )
-            {
-                Aig_ObjSetTravIdCurrent(p, pNext);
-                Vec_PtrPush( vNodes, pNext );
-            }
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Establishes relationship between nodes using pairing.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_MatchingCountUnmached( Aig_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i, Counter = 0;
-    Aig_ManForEachObj( p, pObj, i )
-    {
-        if ( !Aig_ObjIsNode(pObj) && !Aig_ObjIsPi(pObj) )
-            continue;
-        if ( pObj->pData != NULL )
-            continue;
-        Counter++;
-    }
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Establishes relationship between nodes using pairing.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_MatchingExtend( Aig_Man_t * p0, Aig_Man_t * p1, int nDist, int fVerbose )
-{
-    Vec_Ptr_t * vNodes0, * vNodes1;
-    Aig_Obj_t * pNext0, * pNext1;
-    int d, k;
-    Aig_ManFanoutStart(p0);
-    Aig_ManFanoutStart(p1);
-    vNodes0 = Vec_PtrAlloc( 1000 );
-    vNodes1 = Vec_PtrAlloc( 1000 );
-    if ( fVerbose )
-    {
-        int nUnmached = Ssw_MatchingCountUnmached(p0);
-        printf( "Extending islands by %d steps:\n", nDist );
-        printf( "%2d : Total = %6d. Unmatched = %6d.  Ratio = %6.2f %%\n",
-            0, Aig_ManPiNum(p0) + Aig_ManNodeNum(p0), 
-            nUnmached, 100.0 * nUnmached/(Aig_ManPiNum(p0) + Aig_ManNodeNum(p0)) );
-    }
-    for ( d = 0; d < nDist; d++ )
-    {
-        Ssw_MatchingExtendOne( p0, vNodes0 );
-        Ssw_MatchingExtendOne( p1, vNodes1 );
-        Vec_PtrForEachEntry( Aig_Obj_t *, vNodes0, pNext0, k )
-        {
-            pNext1 = (Aig_Obj_t *)pNext0->pData;
-            if ( pNext1 == NULL )
-                continue;
-            assert( pNext1->pData == pNext0 );
-            if ( Saig_ObjIsPi(p0, pNext1) )
-                continue;
-            pNext0->pData = NULL;
-            pNext1->pData = NULL;
-        }
-        Vec_PtrForEachEntry( Aig_Obj_t *, vNodes1, pNext0, k )
-        {
-            pNext1 = (Aig_Obj_t *)pNext0->pData;
-            if ( pNext1 == NULL )
-                continue;
-            assert( pNext1->pData == pNext0 );
-            if ( Saig_ObjIsPi(p1, pNext1) )
-                continue;
-            pNext0->pData = NULL;
-            pNext1->pData = NULL;
-        }
-        if ( fVerbose )
-        {
-            int nUnmached = Ssw_MatchingCountUnmached(p0);
-            printf( "%2d : Total = %6d. Unmatched = %6d.  Ratio = %6.2f %%\n",
-                d+1, Aig_ManPiNum(p0) + Aig_ManNodeNum(p0), 
-                nUnmached, 100.0 * nUnmached/(Aig_ManPiNum(p0) + Aig_ManNodeNum(p0)) );
-        }
-    }
-    Vec_PtrFree( vNodes0 );
-    Vec_PtrFree( vNodes1 );
-    Aig_ManFanoutStop(p0);
-    Aig_ManFanoutStop(p1);
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Used differences in p0 to complete p1.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_MatchingComplete( Aig_Man_t * p0, Aig_Man_t * p1 )
-{
-    Vec_Ptr_t * vNewLis;
-    Aig_Obj_t * pObj0, * pObj0Li, * pObj1;
-    int i;
-    // create register outputs in p0 that are absent in p1
-    vNewLis = Vec_PtrAlloc( 100 );
-    Saig_ManForEachLiLo( p0, pObj0Li, pObj0, i )
-    {
-        if ( pObj0->pData != NULL )
-            continue;
-        pObj1 = Aig_ObjCreatePi( p1 );
-        pObj0->pData = pObj1;
-        pObj1->pData = pObj0;
-        Vec_PtrPush( vNewLis, pObj0Li );
-    }
-    // add missing nodes in the topological order
-    Aig_ManForEachNode( p0, pObj0, i )
-    {
-        if ( pObj0->pData != NULL )
-            continue;
-        pObj1 = Aig_And( p1, Aig_ObjChild0Copy(pObj0), Aig_ObjChild1Copy(pObj0) );
-        pObj0->pData = pObj1;
-        pObj1->pData = pObj0;
-    }
-    // create register outputs in p0 that are absent in p1
-    Vec_PtrForEachEntry( Aig_Obj_t *, vNewLis, pObj0Li, i )
-        Aig_ObjCreatePo( p1, Aig_ObjChild0Copy(pObj0Li) );
-    // increment the number of registers
-    Aig_ManSetRegNum( p1, Aig_ManRegNum(p1) + Vec_PtrSize(vNewLis) );
-    Vec_PtrFree( vNewLis );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Derives matching for all pairs.]
-
-  Description [Modifies both AIGs.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Ssw_MatchingPairs( Aig_Man_t * p0, Aig_Man_t * p1 )
-{
-    Vec_Int_t * vPairsNew;
-    Aig_Obj_t * pObj0, * pObj1;
-    int i;
-    // check correctness
-    assert( Aig_ManPiNum(p0) == Aig_ManPiNum(p1) );
-    assert( Aig_ManPoNum(p0) == Aig_ManPoNum(p1) );
-    assert( Aig_ManRegNum(p0) == Aig_ManRegNum(p1) );
-    assert( Aig_ManObjNum(p0) == Aig_ManObjNum(p1) );
-    // create complete pairs
-    vPairsNew = Vec_IntAlloc( 2*Aig_ManObjNum(p0) );
-    Aig_ManForEachObj( p0, pObj0, i )
-    {
-        if ( Aig_ObjIsPo(pObj0) )
-            continue;
-        pObj1 = (Aig_Obj_t *)pObj0->pData;
-        Vec_IntPush( vPairsNew, pObj0->Id );
-        Vec_IntPush( vPairsNew, pObj1->Id );
-    }
-    return vPairsNew;
-}
-
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Transfers the result of matching to miter.]
-
-  Description [The array of pairs should be complete.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Ssw_MatchingMiter( Aig_Man_t * pMiter, Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPairsAll )
-{
-    Vec_Int_t * vPairsMiter;
-    Aig_Obj_t * pObj0, * pObj1;
-    int i;
-    // create matching of nodes in the miter
-    vPairsMiter = Vec_IntAlloc( 2*Aig_ManObjNum(p0) );
-    for ( i = 0; i < Vec_IntSize(vPairsAll); i += 2 )
-    {
-        pObj0 = Aig_ManObj( p0, Vec_IntEntry(vPairsAll, i) );
-        pObj1 = Aig_ManObj( p1, Vec_IntEntry(vPairsAll, i+1) );
-        assert( pObj0->pData != NULL );
-        assert( pObj1->pData != NULL );
-        if ( pObj0->pData == pObj1->pData )
-            continue;
-        if ( Aig_ObjIsNone((Aig_Obj_t *)pObj0->pData) || Aig_ObjIsNone((Aig_Obj_t *)pObj1->pData) )
-            continue;
-        // get the miter nodes
-        pObj0 = (Aig_Obj_t *)pObj0->pData;
-        pObj1 = (Aig_Obj_t *)pObj1->pData;
-        assert( !Aig_IsComplement(pObj0) );
-        assert( !Aig_IsComplement(pObj1) );
-        assert( Aig_ObjType(pObj0) == Aig_ObjType(pObj1) );
-        if ( Aig_ObjIsPo(pObj0) )
-            continue;
-        assert( Aig_ObjIsNode(pObj0) || Saig_ObjIsLo(pMiter, pObj0) );
-        assert( Aig_ObjIsNode(pObj1) || Saig_ObjIsLo(pMiter, pObj1) );
-        assert( pObj0->Id < pObj1->Id );
-        Vec_IntPush( vPairsMiter, pObj0->Id );
-        Vec_IntPush( vPairsMiter, pObj1->Id );
-    }
-    return vPairsMiter;
-}
-
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Solves SEC using structural similarity.]
-
-  Description [Modifies both p0 and p1 by adding extra logic.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ssw_SecWithSimilaritySweep( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPairs, Ssw_Pars_t * pPars )
-{
-    Ssw_Man_t * p; 
-    Vec_Int_t * vPairsAll, * vPairsMiter;
-    Aig_Man_t * pMiter, * pAigNew;
-    // derive full matching
-    Ssw_MatchingStart( p0, p1, vPairs );
-    if ( pPars->nIsleDist )
-        Ssw_MatchingExtend( p0, p1, pPars->nIsleDist, pPars->fVerbose );
-    Ssw_MatchingComplete( p0, p1 );
-    Ssw_MatchingComplete( p1, p0 );
-    vPairsAll = Ssw_MatchingPairs( p0, p1 );
-    // create miter and transfer matching
-    pMiter = Saig_ManCreateMiter( p0, p1, 0 );
-    vPairsMiter = Ssw_MatchingMiter( pMiter, p0, p1, vPairsAll );
-    Vec_IntFree( vPairsAll );
-    // start the induction manager
-    p = Ssw_ManCreate( pMiter, pPars );
-    // create equivalence classes using these IDs
-    if ( p->pPars->fPartSigCorr )
-        p->ppClasses = Ssw_ClassesPreparePairsSimple( pMiter, vPairsMiter );
-    else
-        p->ppClasses = Ssw_ClassesPrepare( pMiter, pPars->nFramesK, pPars->fLatchCorr, pPars->fConstCorr, pPars->fOutputCorr, pPars->nMaxLevs, pPars->fVerbose );
-    if ( p->pPars->fDumpSRInit )
-    {
-        if ( p->pPars->fPartSigCorr )
-        {
-            Aig_Man_t * pSRed = Ssw_SpeculativeReduction( p );
-            Aig_ManDumpBlif( pSRed, "srm_part.blif", NULL, NULL );
-            Aig_ManStop( pSRed );
-            printf( "Speculatively reduced miter is saved in file \"%s\".\n", "srm_part.blif" );
-        }
-        else
-            printf( "Dumping speculative miter is possible only for partial signal correspondence (switch \"-c\").\n" );
-    }
-    p->pSml = Ssw_SmlStart( pMiter, 0, 1 + p->pPars->nFramesAddSim, 1 );
-    Ssw_ClassesSetData( p->ppClasses, p->pSml, (unsigned(*)(void *,Aig_Obj_t *))Ssw_SmlObjHashWord, (int(*)(void *,Aig_Obj_t *))Ssw_SmlObjIsConstWord, (int(*)(void *,Aig_Obj_t *,Aig_Obj_t *))Ssw_SmlObjsAreEqualWord );
-    // perform refinement of classes
-    pAigNew = Ssw_SignalCorrespondenceRefine( p );
-    // cleanup
-    Ssw_ManStop( p );
-    Aig_ManStop( pMiter );
-    Vec_IntFree( vPairsMiter );
-    return pAigNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Solves SEC with structural similarity.]
-
-  Description [The first two arguments are pointers to the AIG managers.
-  The third argument is the array of pairs of IDs of structurally equivalent
-  nodes from the first and second managers, respectively.]
-               
-  SideEffects [The managers will be updated by adding "islands of difference".]
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SecWithSimilarityPairs( Aig_Man_t * p0, Aig_Man_t * p1, Vec_Int_t * vPairs, Ssw_Pars_t * pPars )
-{
-    Ssw_Pars_t Pars;
-    Aig_Man_t * pAigRes;
-    int RetValue, clk = clock();
-    // derive parameters if not given
-    if ( pPars == NULL )
-        Ssw_ManSetDefaultParams( pPars = &Pars );
-    // reduce the AIG with pairs
-    pAigRes = Ssw_SecWithSimilaritySweep( p0, p1, vPairs, pPars );
-    // report the result of verification
-    RetValue = Ssw_MiterStatus( pAigRes, 1 );
-    if ( RetValue == 1 )
-        printf( "Verification successful.  " );
-    else if ( RetValue == 0 )
-        printf( "Verification failed with a counter-example.  " );
-    else
-        printf( "Verification UNDECIDED. The number of remaining regs = %d (total = %d).  ", 
-            Aig_ManRegNum(pAigRes), Aig_ManRegNum(p0)+Aig_ManRegNum(p1) );
-    ABC_PRT( "Time", clock() - clk );
-    Aig_ManStop( pAigRes );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Dummy procedure to detect structural similarity.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Saig_StrSimPerformMatching_hack( Aig_Man_t * p0, Aig_Man_t * p1 )
-{
-    Vec_Int_t * vPairs;
-    Aig_Obj_t * pObj;
-    int i;
-    // create array of pairs
-    vPairs = Vec_IntAlloc( 100 );
-    Aig_ManForEachObj( p0, pObj, i )
-    {
-        if ( !Aig_ObjIsConst1(pObj) && !Aig_ObjIsPi(pObj) && !Aig_ObjIsNode(pObj) )
-            continue;
-        Vec_IntPush( vPairs, i );
-        Vec_IntPush( vPairs, i );
-    }
-    return vPairs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Solves SEC with structural similarity.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SecWithSimilarity( Aig_Man_t * p0, Aig_Man_t * p1, Ssw_Pars_t * pPars )
-{
-    Vec_Int_t * vPairs;
-    Aig_Man_t * pPart0, * pPart1;
-    int RetValue;
-    if ( pPars->fVerbose )
-        printf( "Performing sequential verification using structural similarity.\n" );
-    // consider the case when a miter is given
-    if ( p1 == NULL )
-    {
-        if ( pPars->fVerbose )
-        {
-            Aig_ManPrintStats( p0 );
-        }
-        // demiter the miter
-        if ( !Saig_ManDemiterSimpleDiff( p0, &pPart0, &pPart1 ) )
-        {
-            printf( "Demitering has failed.\n" );
-            return -1;
-        }
-    }
-    else
-    {
-        pPart0 = Aig_ManDupSimple( p0 );
-        pPart1 = Aig_ManDupSimple( p1 );
-    }
-    if ( pPars->fVerbose )
-    {
-//        Aig_ManPrintStats( pPart0 );
-//        Aig_ManPrintStats( pPart1 );
-        if ( p1 == NULL )
-        {
-//        Aig_ManDumpBlif( pPart0, "part0.blif", NULL, NULL );
-//        Aig_ManDumpBlif( pPart1, "part1.blif", NULL, NULL );
-//        printf( "The result of demitering is written into files \"%s\" and \"%s\".\n", "part0.blif", "part1.blif" );
-        }
-    }
-    assert( Aig_ManRegNum(pPart0) > 0 );
-    assert( Aig_ManRegNum(pPart1) > 0 );
-    assert( Saig_ManPiNum(pPart0) == Saig_ManPiNum(pPart1) );
-    assert( Saig_ManPoNum(pPart0) == Saig_ManPoNum(pPart1) );
-    // derive pairs
-//    vPairs = Saig_StrSimPerformMatching_hack( pPart0, pPart1 );
-    vPairs = Saig_StrSimPerformMatching( pPart0, pPart1, 0, pPars->fVerbose, NULL );
-    RetValue = Ssw_SecWithSimilarityPairs( pPart0, pPart1, vPairs, pPars );
-    Aig_ManStop( pPart0 );
-    Aig_ManStop( pPart1 );
-    Vec_IntFree( vPairs );
-    return RetValue;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswLcorr.c b/src/aig/ssw/sswLcorr.c
deleted file mode 100644
index 7cd94727..00000000
--- a/src/aig/ssw/sswLcorr.c
+++ /dev/null
@@ -1,336 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswLcorr.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Latch correspondence.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswLcorr.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-//#include "bar.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Tranfers simulation information from FRAIG to AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManSweepTransfer( Ssw_Man_t * p )
-{
-    Aig_Obj_t * pObj, * pObjFraig;
-    unsigned * pInfo;
-    int i;
-    // transfer simulation information
-    Aig_ManForEachPi( p->pAig, pObj, i )
-    {
-        pObjFraig = Ssw_ObjFrame( p, pObj, 0 );
-        if ( pObjFraig == Aig_ManConst0(p->pFrames) )
-        {
-            Ssw_SmlObjAssignConst( p->pSml, pObj, 0, 0 );
-            continue;
-        }
-        assert( !Aig_IsComplement(pObjFraig) );
-        assert( Aig_ObjIsPi(pObjFraig) );
-        pInfo = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjPioNum(pObjFraig) );
-        Ssw_SmlObjSetWord( p->pSml, pObj, pInfo[0], 0, 0 );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one round of simulation with counter-examples.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweepResimulate( Ssw_Man_t * p )
-{
-    int RetValue1, RetValue2, clk = clock();
-    // transfer PI simulation information from storage
-    Ssw_ManSweepTransfer( p );
-    // simulate internal nodes
-    Ssw_SmlSimulateOneFrame( p->pSml );
-    // check equivalence classes
-    RetValue1 = Ssw_ClassesRefineConst1( p->ppClasses, 1 );
-    RetValue2 = Ssw_ClassesRefine( p->ppClasses, 1 );
-    // prepare simulation info for the next round
-    Vec_PtrCleanSimInfo( p->vSimInfo, 0, 1 );
-    p->nPatterns = 0;
-    p->nSimRounds++;
-p->timeSimSat += clock() - clk;
-    return RetValue1 > 0 || RetValue2 > 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Saves one counter-example into internal storage.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlAddPattern( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pCand )
-{
-    Aig_Obj_t * pObj;
-    unsigned * pInfo;
-    int i, nVarNum, Value;
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->pMSat->vUsedPis, pObj, i )
-    {
-        nVarNum = Ssw_ObjSatNum( p->pMSat, pObj );
-        assert( nVarNum > 0 );
-        Value = sat_solver_var_value( p->pMSat->pSat, nVarNum );
-        if ( Value == 0 )
-            continue;
-        pInfo = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjPioNum(pObj) );
-        Aig_InfoSetBit( pInfo, p->nPatterns );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Builds fraiged logic cone of the node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManBuildCone_rec( Ssw_Man_t * p, Aig_Obj_t * pObj )
-{
-    Aig_Obj_t * pObjNew;
-    assert( !Aig_IsComplement(pObj) );
-    if ( Ssw_ObjFrame( p, pObj, 0 ) )
-        return;
-    assert( Aig_ObjIsNode(pObj) );
-    Ssw_ManBuildCone_rec( p, Aig_ObjFanin0(pObj) );
-    Ssw_ManBuildCone_rec( p, Aig_ObjFanin1(pObj) );
-    pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, 0), Ssw_ObjChild1Fra(p, pObj, 0) );
-    Ssw_ObjSetFrame( p, pObj, 0, pObjNew );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Recycles the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManSweepLatchOne( Ssw_Man_t * p, Aig_Obj_t * pObjRepr, Aig_Obj_t * pObj )
-{
-    Aig_Obj_t * pObjFraig, * pObjReprFraig, * pObjLi;
-    int RetValue, clk;
-    assert( Aig_ObjIsPi(pObj) );
-    assert( Aig_ObjIsPi(pObjRepr) || Aig_ObjIsConst1(pObjRepr) );
-    // check if it makes sense to skip some calls
-    if ( p->nCallsCount > 100 && p->nCallsUnsat < p->nCallsSat )
-    {
-        if ( ++p->nCallsDelta < 0 )
-            return;
-    }
-    p->nCallsDelta = 0;
-clk = clock();
-    // get the fraiged node
-    pObjLi = Saig_ObjLoToLi( p->pAig, pObj ); 
-    Ssw_ManBuildCone_rec( p, Aig_ObjFanin0(pObjLi) );
-    pObjFraig = Ssw_ObjChild0Fra( p, pObjLi, 0 );
-    // get the fraiged representative
-    if ( Aig_ObjIsPi(pObjRepr) )
-    {
-        pObjLi = Saig_ObjLoToLi( p->pAig, pObjRepr ); 
-        Ssw_ManBuildCone_rec( p, Aig_ObjFanin0(pObjLi) );
-        pObjReprFraig = Ssw_ObjChild0Fra( p, pObjLi, 0 );
-    }
-    else 
-        pObjReprFraig = Ssw_ObjFrame( p, pObjRepr, 0 );
-p->timeReduce += clock() - clk;
-    // if the fraiged nodes are the same, return
-    if ( Aig_Regular(pObjFraig) == Aig_Regular(pObjReprFraig) )
-        return;
-    p->nRecycleCalls++;
-    p->nCallsCount++;
-
-    // check equivalence of the two nodes
-    if ( (pObj->fPhase == pObjRepr->fPhase) != (Aig_ObjPhaseReal(pObjFraig) == Aig_ObjPhaseReal(pObjReprFraig)) )
-    {
-        p->nPatterns++;
-        p->nStrangers++;
-        p->fRefined = 1;
-    }
-    else
-    { 
-        RetValue = Ssw_NodesAreEquiv( p, Aig_Regular(pObjReprFraig), Aig_Regular(pObjFraig) );
-        if ( RetValue == 1 )  // proved equivalence
-        {
-            p->nCallsUnsat++;
-            return;
-        }
-        if ( RetValue == -1 ) // timed out
-        {
-            Ssw_ClassesRemoveNode( p->ppClasses, pObj );
-            p->nCallsUnsat++;
-            p->fRefined = 1;
-            return;
-        }
-        else // disproved equivalence
-        {       
-            Ssw_SmlAddPattern( p, pObjRepr, pObj );
-            p->nPatterns++;
-            p->nCallsSat++;
-            p->fRefined = 1;
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one iteration of sweeping latches.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweepLatch( Ssw_Man_t * p )
-{
-//    Bar_Progress_t * pProgress = NULL;
-    Vec_Ptr_t * vClass;
-    Aig_Obj_t * pObj, * pRepr, * pTemp;
-    int i, k;
-
-    // start the timeframe
-    p->pFrames = Aig_ManStart( Aig_ManObjNumMax(p->pAig) );
-    // map constants and PIs
-    Ssw_ObjSetFrame( p, Aig_ManConst1(p->pAig), 0, Aig_ManConst1(p->pFrames) );
-    Saig_ManForEachPi( p->pAig, pObj, i )
-        Ssw_ObjSetFrame( p, pObj, 0, Aig_ObjCreatePi(p->pFrames) );
-
-    // implement equivalence classes
-    Saig_ManForEachLo( p->pAig, pObj, i )
-    {
-        pRepr = Aig_ObjRepr( p->pAig, pObj );
-        if ( pRepr == NULL )
-        {
-            pTemp = Aig_ObjCreatePi(p->pFrames);
-            pTemp->pData = pObj;
-        }
-        else
-            pTemp = Aig_NotCond( Ssw_ObjFrame(p, pRepr, 0), pRepr->fPhase ^ pObj->fPhase );
-        Ssw_ObjSetFrame( p, pObj, 0, pTemp );
-    }
-    Aig_ManSetPioNumbers( p->pFrames );
-
-    // prepare simulation info
-    assert( p->vSimInfo == NULL );
-    p->vSimInfo = Vec_PtrAllocSimInfo( Aig_ManPiNum(p->pFrames), 1 );
-    Vec_PtrCleanSimInfo( p->vSimInfo, 0, 1 );
-
-    // go through the registers
-//    if ( p->pPars->fVerbose )
-//        pProgress = Bar_ProgressStart( stdout, Aig_ManRegNum(p->pAig) );
-    vClass = Vec_PtrAlloc( 100 );
-    p->fRefined = 0;
-    p->nCallsCount = p->nCallsSat = p->nCallsUnsat = 0;
-    Saig_ManForEachLo( p->pAig, pObj, i )
-    {
-//        if ( p->pPars->fVerbose )
-//            Bar_ProgressUpdate( pProgress, i, NULL );
-        // consider the case of constant candidate
-        if ( Ssw_ObjIsConst1Cand( p->pAig, pObj ) )
-            Ssw_ManSweepLatchOne( p, Aig_ManConst1(p->pAig), pObj );
-        else
-        {
-            // consider the case of equivalence class
-            Ssw_ClassesCollectClass( p->ppClasses, pObj, vClass );
-            if ( Vec_PtrSize(vClass) == 0 )
-                continue;
-            // try to prove equivalences in this class
-            Vec_PtrForEachEntry( Aig_Obj_t *, vClass, pTemp, k )
-                if ( Aig_ObjRepr(p->pAig, pTemp) == pObj )
-                {
-                    Ssw_ManSweepLatchOne( p, pObj, pTemp );
-                    if ( p->nPatterns == 32 )
-                        break;
-                }
-        }
-        // resimulate
-        if ( p->nPatterns == 32 )
-            Ssw_ManSweepResimulate( p );
-        // attempt recycling the SAT solver
-        if ( p->pPars->nSatVarMax && 
-             p->pMSat->nSatVars > p->pPars->nSatVarMax &&
-             p->nRecycleCalls > p->pPars->nRecycleCalls )
-        {
-            p->nVarsMax  = ABC_MAX( p->nVarsMax,  p->pMSat->nSatVars );
-            p->nCallsMax = ABC_MAX( p->nCallsMax, p->pMSat->nSolverCalls );
-            Ssw_SatStop( p->pMSat );
-            p->pMSat = Ssw_SatStart( 0 );
-            p->nRecycles++;
-            p->nRecycleCalls = 0;
-        }
-    }
-//    ABC_PRT( "reduce", p->timeReduce );
-//    Aig_TableProfile( p->pFrames );
-//    printf( "And gates = %d\n", Aig_ManNodeNum(p->pFrames) );
-    // resimulate
-    if ( p->nPatterns > 0 )
-        Ssw_ManSweepResimulate( p );
-    // cleanup
-    Vec_PtrFree( vClass );
-//    if ( p->pPars->fVerbose )
-//        Bar_ProgressStop( pProgress );
-
-    // cleanup
-//    Ssw_ClassesCheck( p->ppClasses );
-    return p->fRefined;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswMan.c b/src/aig/ssw/sswMan.c
deleted file mode 100644
index 0f1317e1..00000000
--- a/src/aig/ssw/sswMan.c
+++ /dev/null
@@ -1,218 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswMan.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Calls to the SAT solver.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswMan.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Man_t * Ssw_ManCreate( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
-{
-    Ssw_Man_t * p;
-    // prepare the sequential AIG
-    assert( Saig_ManRegNum(pAig) > 0 );
-    Aig_ManFanoutStart( pAig );
-    Aig_ManSetPioNumbers( pAig );
-    // create interpolation manager
-    p = ABC_ALLOC( Ssw_Man_t, 1 ); 
-    memset( p, 0, sizeof(Ssw_Man_t) );
-    p->pPars         = pPars;
-    p->pAig          = pAig;
-    p->nFrames       = pPars->nFramesK + 1;
-    p->pNodeToFrames = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pAig) * p->nFrames );
-    p->vCommon       = Vec_PtrAlloc( 100 );
-    p->iOutputLit    = -1;
-    // allocate storage for sim pattern
-    p->nPatWords     = Aig_BitWordNum( Saig_ManPiNum(pAig) * p->nFrames + Saig_ManRegNum(pAig) );
-    p->pPatWords     = ABC_CALLOC( unsigned, p->nPatWords ); 
-    // other
-    p->vNewLos       = Vec_PtrAlloc( 100 );
-    p->vNewPos       = Vec_IntAlloc( 100 );
-    p->vResimConsts  = Vec_PtrAlloc( 100 );
-    p->vResimClasses = Vec_PtrAlloc( 100 );
-//    p->pPars->fVerbose = 1;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints stats of the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManCountEquivs( Ssw_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i, nEquivs = 0;
-    Aig_ManForEachObj( p->pAig, pObj, i )
-        nEquivs += ( Aig_ObjRepr(p->pAig, pObj) != NULL );
-    return nEquivs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Prints stats of the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManPrintStats( Ssw_Man_t * p )
-{
-    double nMemory = 1.0*Aig_ManObjNumMax(p->pAig)*p->nFrames*(2*sizeof(int)+2*sizeof(void*))/(1<<20);
-
-    printf( "Parameters: F = %d. AddF = %d. C-lim = %d. Constr = %d. MaxLev = %d. Mem = %0.2f Mb.\n", 
-        p->pPars->nFramesK, p->pPars->nFramesAddSim, p->pPars->nBTLimit, Saig_ManConstrNum(p->pAig), p->pPars->nMaxLevs, nMemory );
-    printf( "AIG       : PI = %d. PO = %d. Latch = %d. Node = %d.  Ave SAT vars = %d.\n", 
-        Saig_ManPiNum(p->pAig), Saig_ManPoNum(p->pAig), Saig_ManRegNum(p->pAig), Aig_ManNodeNum(p->pAig), 
-        0/(p->pPars->nIters+1) );
-    printf( "SAT calls : Proof = %d. Cex = %d. Fail = %d. Lits proved = %d.\n", 
-        p->nSatProof, p->nSatCallsSat, p->nSatFailsReal, Ssw_ManCountEquivs(p) );
-    printf( "SAT solver: Vars max = %d. Calls max = %d. Recycles = %d. Sim rounds = %d.\n", 
-        p->nVarsMax, p->nCallsMax, p->nRecyclesTotal, p->nSimRounds );
-    printf( "NBeg = %d. NEnd = %d. (Gain = %6.2f %%).  RBeg = %d. REnd = %d. (Gain = %6.2f %%).\n", 
-        p->nNodesBeg, p->nNodesEnd, 100.0*(p->nNodesBeg-p->nNodesEnd)/(p->nNodesBeg?p->nNodesBeg:1), 
-        p->nRegsBeg, p->nRegsEnd, 100.0*(p->nRegsBeg-p->nRegsEnd)/(p->nRegsBeg?p->nRegsBeg:1) );
-
-    p->timeOther = p->timeTotal-p->timeBmc-p->timeReduce-p->timeMarkCones-p->timeSimSat-p->timeSat;
-    ABC_PRTP( "BMC        ", p->timeBmc,       p->timeTotal );
-    ABC_PRTP( "Spec reduce", p->timeReduce,    p->timeTotal );
-    ABC_PRTP( "Mark cones ", p->timeMarkCones, p->timeTotal );
-    ABC_PRTP( "Sim SAT    ", p->timeSimSat,    p->timeTotal );
-    ABC_PRTP( "SAT solving", p->timeSat,       p->timeTotal );
-    ABC_PRTP( "  unsat    ", p->timeSatUnsat,  p->timeTotal );
-    ABC_PRTP( "  sat      ", p->timeSatSat,    p->timeTotal );
-    ABC_PRTP( "  undecided", p->timeSatUndec,  p->timeTotal );
-    ABC_PRTP( "Other      ", p->timeOther,     p->timeTotal );
-    ABC_PRTP( "TOTAL      ", p->timeTotal,     p->timeTotal );
-
-    // report the reductions
-    if ( p->pAig->nConstrs )
-    {
-        printf( "Statistics reflecting the use of constraints:\n" );
-        printf( "Total cones  = %6d.  Constraint cones = %6d. (%6.2f %%)\n", 
-            p->nConesTotal, p->nConesConstr, 100.0*p->nConesConstr/p->nConesTotal );
-        printf( "Total equivs = %6d.  Removed equivs   = %6d. (%6.2f %%)\n", 
-            p->nEquivsTotal, p->nEquivsConstr, 100.0*p->nEquivsConstr/p->nEquivsTotal );
-        printf( "NBeg = %d. NEnd = %d. (Gain = %6.2f %%).  RBeg = %d. REnd = %d. (Gain = %6.2f %%).\n", 
-            p->nNodesBegC, p->nNodesEndC, 100.0*(p->nNodesBegC-p->nNodesEndC)/(p->nNodesBegC?p->nNodesBegC:1), 
-            p->nRegsBegC, p->nRegsEndC,   100.0*(p->nRegsBegC-p->nRegsEndC)/(p->nRegsBegC?p->nRegsBegC:1) );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Frees the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManCleanup( Ssw_Man_t * p )
-{
-//    Aig_ManCleanMarkAB( p->pAig );
-    assert( p->pMSat == NULL );
-    if ( p->pFrames )
-    {
-        Aig_ManCleanMarkAB( p->pFrames );
-        Aig_ManStop( p->pFrames );
-        p->pFrames = NULL;
-        memset( p->pNodeToFrames, 0, sizeof(Aig_Obj_t *) * Aig_ManObjNumMax(p->pAig) * p->nFrames );
-    }
-    if ( p->vSimInfo )  
-    {
-        Vec_PtrFree( p->vSimInfo );
-        p->vSimInfo = NULL;
-    }
-    p->nConstrTotal = 0;
-    p->nConstrReduced = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Frees the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManStop( Ssw_Man_t * p )
-{
-    ABC_FREE( p->pVisited );
-    if ( p->pPars->fVerbose )//&& p->pPars->nStepsMax == -1 )
-        Ssw_ManPrintStats( p );
-    if ( p->ppClasses )
-        Ssw_ClassesStop( p->ppClasses );
-    if ( p->pSml )      
-        Ssw_SmlStop( p->pSml );
-    if ( p->vDiffPairs )
-        Vec_IntFree( p->vDiffPairs );
-    if ( p->vInits )
-        Vec_IntFree( p->vInits );
-    Vec_PtrFree( p->vResimConsts );
-    Vec_PtrFree( p->vResimClasses );
-    Vec_PtrFree( p->vNewLos );
-    Vec_IntFree( p->vNewPos );
-    Vec_PtrFree( p->vCommon );
-    ABC_FREE( p->pNodeToFrames );
-    ABC_FREE( p->pPatWords );
-    ABC_FREE( p );
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswPairs.c b/src/aig/ssw/sswPairs.c
deleted file mode 100644
index 0aba942f..00000000
--- a/src/aig/ssw/sswPairs.c
+++ /dev/null
@@ -1,477 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswPairs.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Calls to the SAT solver.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswPairs.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Reports the status of the miter.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_MiterStatus( Aig_Man_t * p, int fVerbose )
-{
-    Aig_Obj_t * pObj, * pChild;
-    int i, CountConst0 = 0, CountNonConst0 = 0, CountUndecided = 0;
-//    if ( p->pData )
-//        return 0;
-    Saig_ManForEachPo( p, pObj, i )
-    {
-        pChild = Aig_ObjChild0(pObj);
-        // check if the output is constant 0
-        if ( pChild == Aig_ManConst0(p) )
-        {
-            CountConst0++;
-            continue;
-        }
-        // check if the output is constant 1
-        if ( pChild == Aig_ManConst1(p) )
-        {
-            CountNonConst0++;
-            continue;
-        }
-        // check if the output is a primary input
-        if ( p->nRegs == 0 && Aig_ObjIsPi(Aig_Regular(pChild)) )
-        {
-            CountNonConst0++;
-            continue;
-        }
-        // check if the output can be not constant 0
-        if ( Aig_Regular(pChild)->fPhase != (unsigned)Aig_IsComplement(pChild) )
-        {
-            CountNonConst0++;
-            continue;
-        }
-        CountUndecided++;
-    }
-
-    if ( fVerbose )
-    {
-        printf( "Miter has %d outputs. ", Saig_ManPoNum(p) );
-        printf( "Const0 = %d.  ", CountConst0 );
-        printf( "NonConst0 = %d.  ", CountNonConst0 );
-        printf( "Undecided = %d.  ", CountUndecided );
-        printf( "\n" );
-    }
-
-    if ( CountNonConst0 )
-        return 0;
-    if ( CountUndecided )
-        return -1;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transfer equivalent pairs to the miter.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t * Ssw_TransferSignalPairs( Aig_Man_t * pMiter, Aig_Man_t * pAig1, Aig_Man_t * pAig2, Vec_Int_t * vIds1, Vec_Int_t * vIds2 )
-{
-    Vec_Int_t * vIds;
-    Aig_Obj_t * pObj1, * pObj2;
-    Aig_Obj_t * pObj1m, * pObj2m;
-    int i;
-    vIds = Vec_IntAlloc( 2 * Vec_IntSize(vIds1) );
-    for ( i = 0; i < Vec_IntSize(vIds1); i++ )
-    {
-        pObj1 = Aig_ManObj( pAig1, Vec_IntEntry(vIds1, i) );
-        pObj2 = Aig_ManObj( pAig2, Vec_IntEntry(vIds2, i) );
-        pObj1m = Aig_Regular((Aig_Obj_t *)pObj1->pData);
-        pObj2m = Aig_Regular((Aig_Obj_t *)pObj2->pData);
-        assert( pObj1m && pObj2m );
-        if ( pObj1m == pObj2m )
-            continue;
-        if ( pObj1m->Id < pObj2m->Id )
-        {
-            Vec_IntPush( vIds, pObj1m->Id );
-            Vec_IntPush( vIds, pObj2m->Id );
-        }
-        else
-        {
-            Vec_IntPush( vIds, pObj2m->Id );
-            Vec_IntPush( vIds, pObj1m->Id );
-        }
-    }
-    return vIds;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transform pairs into class representation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Int_t ** Ssw_TransformPairsIntoTempClasses( Vec_Int_t * vPairs, int nObjNumMax )
-{
-    Vec_Int_t ** pvClasses;   // vector of classes
-    int * pReprs;             // mapping nodes into their representatives
-    int Entry, idObj, idRepr, idReprObj, idReprRepr, i;
-    // allocate data-structures
-    pvClasses = ABC_CALLOC( Vec_Int_t *, nObjNumMax );
-    pReprs    = ABC_ALLOC( int, nObjNumMax );
-    for ( i = 0; i < nObjNumMax; i++ )
-        pReprs[i] = -1;
-    // consider pairs
-    for ( i = 0; i < Vec_IntSize(vPairs); i += 2 )
-    {
-        // get both objects
-        idRepr = Vec_IntEntry( vPairs, i   );
-        idObj  = Vec_IntEntry( vPairs, i+1 );
-        assert( idObj > 0 );
-        assert( (pReprs[idRepr] == -1) || (pvClasses[pReprs[idRepr]] != NULL) );
-        assert( (pReprs[idObj]  == -1) || (pvClasses[pReprs[idObj] ] != NULL) );
-        // get representatives of both objects
-        idReprRepr = pReprs[idRepr];
-        idReprObj  = pReprs[idObj];
-        // check different situations
-        if ( idReprRepr == -1 && idReprObj == -1 )
-        {   // they do not have classes
-            // create a class
-            pvClasses[idRepr] = Vec_IntAlloc( 4 );
-            Vec_IntPush( pvClasses[idRepr], idRepr );
-            Vec_IntPush( pvClasses[idRepr], idObj );
-            pReprs[ idRepr ] = idRepr;
-            pReprs[ idObj  ] = idRepr;
-        }
-        else if ( idReprRepr >= 0 && idReprObj == -1 )
-        {   // representative has a class
-            // add iObj to the same class
-            Vec_IntPushUniqueOrder( pvClasses[idReprRepr], idObj );
-            pReprs[ idObj ] = idReprRepr;
-        }
-        else if ( idReprRepr == -1 && idReprObj >= 0 )
-        {   // object has a class
-            assert( idReprObj != idRepr );
-            if ( idReprObj < idRepr ) 
-            { // add idRepr to the same class
-                Vec_IntPushUniqueOrder( pvClasses[idReprObj], idRepr );
-                pReprs[ idRepr ] = idReprObj;
-            }
-            else // if ( idReprObj > idRepr ) 
-            { // make idRepr new representative
-                Vec_IntPushFirst( pvClasses[idReprObj], idRepr );
-                pvClasses[idRepr] = pvClasses[idReprObj];
-                pvClasses[idReprObj] = NULL;
-                // set correct representatives of each node
-                Vec_IntForEachEntry( pvClasses[idRepr], Entry, i )
-                    pReprs[ Entry ] = idRepr;
-            }
-        }
-        else // if ( idReprRepr >= 0 && idReprObj >= 0 )
-        {   // both have classes
-            if ( idReprRepr == idReprObj )
-            {  // the classes are the same
-                // nothing to do
-            }
-            else
-            {  // the classes are different
-                // find the repr of the new class
-                if ( idReprRepr < idReprObj )
-                {
-                    Vec_IntForEachEntry( pvClasses[idReprObj], Entry, i )
-                    {
-                        Vec_IntPushUniqueOrder( pvClasses[idReprRepr], Entry );
-                        pReprs[ Entry ] = idReprRepr;
-                    }
-                    Vec_IntFree( pvClasses[idReprObj] );
-                    pvClasses[idReprObj] = NULL;
-                }
-                else // if ( idReprRepr > idReprObj )
-                {
-                    Vec_IntForEachEntry( pvClasses[idReprRepr], Entry, i )
-                    {
-                        Vec_IntPushUniqueOrder( pvClasses[idReprObj], Entry );
-                        pReprs[ Entry ] = idReprObj;
-                    }
-                    Vec_IntFree( pvClasses[idReprRepr] );
-                    pvClasses[idReprRepr] = NULL;
-                }
-            }
-        }
-    }
-    ABC_FREE( pReprs );
-    return pvClasses;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_FreeTempClasses( Vec_Int_t ** pvClasses, int nObjNumMax )
-{
-    int i;
-    for ( i = 0; i < nObjNumMax; i++ )
-        if ( pvClasses[i] ) 
-            Vec_IntFree( pvClasses[i] );
-    ABC_FREE( pvClasses );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs signal correspondence for the miter of two AIGs with node pairs defined.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ssw_SignalCorrespondenceWithPairs( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Vec_Int_t * vIds1, Vec_Int_t * vIds2, Ssw_Pars_t * pPars )
-{
-    Ssw_Man_t * p; 
-    Aig_Man_t * pAigNew, * pMiter;
-    Ssw_Pars_t Pars;
-    Vec_Int_t * vPairs;
-    Vec_Int_t ** pvClasses;
-    assert( Vec_IntSize(vIds1) == Vec_IntSize(vIds2) );
-    // create sequential miter
-    pMiter = Saig_ManCreateMiter( pAig1, pAig2, 0 );
-    Aig_ManCleanup( pMiter );
-    // transfer information to the miter
-    vPairs = Ssw_TransferSignalPairs( pMiter, pAig1, pAig2, vIds1, vIds2 );
-    // create representation of the classes
-    pvClasses = Ssw_TransformPairsIntoTempClasses( vPairs, Aig_ManObjNumMax(pMiter) );
-    Vec_IntFree( vPairs );
-    // if parameters are not given, create them
-    if ( pPars == NULL )
-        Ssw_ManSetDefaultParams( pPars = &Pars );
-    // start the induction manager
-    p = Ssw_ManCreate( pMiter, pPars );
-    // create equivalence classes using these IDs
-    p->ppClasses = Ssw_ClassesPreparePairs( pMiter, pvClasses );
-    p->pSml = Ssw_SmlStart( pMiter, 0, p->nFrames + p->pPars->nFramesAddSim, 1 );
-    Ssw_ClassesSetData( p->ppClasses, p->pSml, (unsigned(*)(void *,Aig_Obj_t *))Ssw_SmlObjHashWord, (int(*)(void *,Aig_Obj_t *))Ssw_SmlObjIsConstWord, (int(*)(void *,Aig_Obj_t *,Aig_Obj_t *))Ssw_SmlObjsAreEqualWord );
-    // perform refinement of classes
-    pAigNew = Ssw_SignalCorrespondenceRefine( p );
-    // cleanup
-    Ssw_FreeTempClasses( pvClasses, Aig_ManObjNumMax(pMiter) );
-    Ssw_ManStop( p );
-    Aig_ManStop( pMiter );
-    return pAigNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Runs inductive SEC for the miter of two AIGs with node pairs defined.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ssw_SignalCorrespondeceTestPairs( Aig_Man_t * pAig )
-{
-    Aig_Man_t * pAigNew, * pAigRes;
-    Ssw_Pars_t Pars, * pPars = &Pars;
-    Vec_Int_t * vIds1, * vIds2;
-    Aig_Obj_t * pObj, * pRepr;
-    int RetValue, i, clk = clock();
-    Ssw_ManSetDefaultParams( pPars );
-    pPars->fVerbose = 1;
-    pAigNew = Ssw_SignalCorrespondence( pAig, pPars );
-    // record pairs of equivalent nodes
-    vIds1 = Vec_IntAlloc( Aig_ManObjNumMax(pAig) );
-    vIds2 = Vec_IntAlloc( Aig_ManObjNumMax(pAig) );
-    Aig_ManForEachObj( pAig, pObj, i )
-    {
-        pRepr = Aig_Regular((Aig_Obj_t *)pObj->pData);
-        if ( pRepr == NULL )
-            continue;
-        if ( Aig_ManObj(pAigNew, pRepr->Id) == NULL )
-            continue;
-/*
-        if ( Aig_ObjIsNode(pObj) )
-            printf( "n " );
-        else if ( Saig_ObjIsPi(pAig, pObj) )
-            printf( "pi " );
-        else if ( Saig_ObjIsLo(pAig, pObj) )
-            printf( "lo " );
-*/
-        Vec_IntPush( vIds1, Aig_ObjId(pObj) );
-        Vec_IntPush( vIds2, Aig_ObjId(pRepr) );
-    }
-    printf( "Recorded %d pairs (before: %d  after: %d).\n", Vec_IntSize(vIds1), Aig_ManObjNumMax(pAig), Aig_ManObjNumMax(pAigNew) );
-    // try the new AIGs
-    pAigRes = Ssw_SignalCorrespondenceWithPairs( pAig, pAigNew, vIds1, vIds2, pPars );
-    Vec_IntFree( vIds1 );
-    Vec_IntFree( vIds2 );
-    // report the results
-    RetValue = Ssw_MiterStatus( pAigRes, 1 );
-    if ( RetValue == 1 )
-        printf( "Verification successful.  " );
-    else if ( RetValue == 0 )
-        printf( "Verification failed with the counter-example.  " );
-    else
-        printf( "Verification UNDECIDED. Remaining registers %d (total %d).  ", 
-            Aig_ManRegNum(pAigRes), Aig_ManRegNum(pAig) + Aig_ManRegNum(pAigNew) );
-    ABC_PRT( "Time", clock() - clk );
-    // cleanup
-    Aig_ManStop( pAigNew );
-    return pAigRes;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Runs inductive SEC for the miter of two AIGs with node pairs defined.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SecWithPairs( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Vec_Int_t * vIds1, Vec_Int_t * vIds2, Ssw_Pars_t * pPars )
-{
-    Aig_Man_t * pAigRes;
-    int RetValue, clk = clock();
-    assert( vIds1 != NULL && vIds2 != NULL );
-    // try the new AIGs
-    printf( "Performing specialized verification with node pairs.\n" );
-    pAigRes = Ssw_SignalCorrespondenceWithPairs( pAig1, pAig2, vIds1, vIds2, pPars );
-    // report the results
-    RetValue = Ssw_MiterStatus( pAigRes, 1 );
-    if ( RetValue == 1 )
-        printf( "Verification successful.  " );
-    else if ( RetValue == 0 )
-        printf( "Verification failed with a counter-example.  " );
-    else
-        printf( "Verification UNDECIDED. The number of remaining regs = %d (total = %d).  ", 
-            Aig_ManRegNum(pAigRes), Aig_ManRegNum(pAig1) + Aig_ManRegNum(pAig2) );
-    ABC_PRT( "Time", clock() - clk );
-    // cleanup
-    Aig_ManStop( pAigRes );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Runs inductive SEC for the miter of two AIGs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SecGeneral( Aig_Man_t * pAig1, Aig_Man_t * pAig2, Ssw_Pars_t * pPars )
-{
-    Aig_Man_t * pAigRes, * pMiter;
-    int RetValue, clk = clock();
-    // try the new AIGs
-    printf( "Performing general verification without node pairs.\n" );
-    pMiter = Saig_ManCreateMiter( pAig1, pAig2, 0 );
-    Aig_ManCleanup( pMiter );
-    pAigRes = Ssw_SignalCorrespondence( pMiter, pPars );
-    Aig_ManStop( pMiter );
-    // report the results
-    RetValue = Ssw_MiterStatus( pAigRes, 1 );
-    if ( RetValue == 1 )
-        printf( "Verification successful.  " );
-    else if ( RetValue == 0 )
-        printf( "Verification failed with a counter-example.  " );
-    else
-        printf( "Verification UNDECIDED. The number of remaining regs = %d (total = %d).  ", 
-            Aig_ManRegNum(pAigRes), Aig_ManRegNum(pAig1) + Aig_ManRegNum(pAig2) );
-    ABC_PRT( "Time", clock() - clk );
-    // cleanup
-    Aig_ManStop( pAigRes );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Runs inductive SEC for the miter of two AIGs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SecGeneralMiter( Aig_Man_t * pMiter, Ssw_Pars_t * pPars )
-{
-    Aig_Man_t * pAigRes;
-    int RetValue, clk = clock();
-    // try the new AIGs
-//    printf( "Performing general verification without node pairs.\n" );
-    pAigRes = Ssw_SignalCorrespondence( pMiter, pPars );
-    // report the results
-    RetValue = Ssw_MiterStatus( pAigRes, 1 );
-    if ( RetValue == 1 )
-        printf( "Verification successful.  " );
-    else if ( RetValue == 0 )
-        printf( "Verification failed with a counter-example.  " );
-    else
-        printf( "Verification UNDECIDED. The number of remaining regs = %d (total = %d).  ", 
-            Aig_ManRegNum(pAigRes), Aig_ManRegNum(pMiter) );
-    ABC_PRT( "Time", clock() - clk );
-    // cleanup
-    Aig_ManStop( pAigRes );
-    return RetValue;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswPart.c b/src/aig/ssw/sswPart.c
deleted file mode 100644
index 8a0e69da..00000000
--- a/src/aig/ssw/sswPart.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswPart.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Partitioned signal correspondence.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswPart.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-#include "ioa.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Performs partitioned sequential SAT sweeping.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Aig_Man_t * Ssw_SignalCorrespondencePart( Aig_Man_t * pAig, Ssw_Pars_t * pPars )
-{
-    int fPrintParts = 0;
-    char Buffer[100];
-    Aig_Man_t * pTemp, * pNew;
-    Vec_Ptr_t * vResult;
-    Vec_Int_t * vPart;
-    int * pMapBack;
-    int i, nCountPis, nCountRegs;
-    int nClasses, nPartSize, fVerbose;
-    int clk = clock();
-    if ( pPars->fConstrs )
-    {
-        printf( "Cannot use partitioned computation with constraints.\n" );
-        return NULL;
-    }
-    // save parameters
-    nPartSize = pPars->nPartSize; pPars->nPartSize = 0;
-    fVerbose  = pPars->fVerbose;  pPars->fVerbose  = 0;
-    // generate partitions
-    if ( pAig->vClockDoms )
-    {
-        // divide large clock domains into separate partitions
-        vResult = Vec_PtrAlloc( 100 );
-        Vec_PtrForEachEntry( Vec_Int_t *, (Vec_Ptr_t *)pAig->vClockDoms, vPart, i )
-        {
-            if ( nPartSize && Vec_IntSize(vPart) > nPartSize )
-                Aig_ManPartDivide( vResult, vPart, nPartSize, pPars->nOverSize );
-            else
-                Vec_PtrPush( vResult, Vec_IntDup(vPart) );
-        }
-    }
-    else
-        vResult = Aig_ManRegPartitionSimple( pAig, nPartSize, pPars->nOverSize );
-//    vResult = Aig_ManPartitionSmartRegisters( pAig, nPartSize, 0 ); 
-//    vResult = Aig_ManRegPartitionSmart( pAig, nPartSize );
-    if ( fPrintParts )
-    {
-        // print partitions
-        printf( "Simple partitioning. %d partitions are saved:\n", Vec_PtrSize(vResult) );
-        Vec_PtrForEachEntry( Vec_Int_t *, vResult, vPart, i )
-        {
-//            extern void Ioa_WriteAiger( Aig_Man_t * pMan, char * pFileName, int fWriteSymbols, int fCompact );
-            sprintf( Buffer, "part%03d.aig", i );
-            pTemp = Aig_ManRegCreatePart( pAig, vPart, &nCountPis, &nCountRegs, NULL );
-            Ioa_WriteAiger( pTemp, Buffer, 0, 0 );
-            printf( "part%03d.aig : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d.\n", 
-                i, Vec_IntSize(vPart), Aig_ManPiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp) );
-            Aig_ManStop( pTemp );
-        }
-    }
-
-    // perform SSW with partitions
-    Aig_ManReprStart( pAig, Aig_ManObjNumMax(pAig) );
-    Vec_PtrForEachEntry( Vec_Int_t *, vResult, vPart, i )
-    {
-        pTemp = Aig_ManRegCreatePart( pAig, vPart, &nCountPis, &nCountRegs, &pMapBack );
-        Aig_ManSetRegNum( pTemp, pTemp->nRegs );
-        // create the projection of 1-hot registers
-        if ( pAig->vOnehots )
-            pTemp->vOnehots = Aig_ManRegProjectOnehots( pAig, pTemp, pAig->vOnehots, fVerbose );
-        // run SSW
-        if (nCountPis>0) {
-            pNew = Ssw_SignalCorrespondence( pTemp, pPars );
-            nClasses = Aig_TransferMappedClasses( pAig, pTemp, pMapBack );
-            if ( fVerbose )
-                printf( "%3d : Reg = %4d. PI = %4d. (True = %4d. Regs = %4d.) And = %5d. It = %3d. Cl = %5d.\n", 
-                    i, Vec_IntSize(vPart), Aig_ManPiNum(pTemp)-Vec_IntSize(vPart), nCountPis, nCountRegs, Aig_ManNodeNum(pTemp), pPars->nIters, nClasses );
-            Aig_ManStop( pNew );
-        }
-        Aig_ManStop( pTemp );
-        ABC_FREE( pMapBack );
-    }
-    // remap the AIG
-    pNew = Aig_ManDupRepr( pAig, 0 );
-    Aig_ManSeqCleanup( pNew );
-//    Aig_ManPrintStats( pAig );
-//    Aig_ManPrintStats( pNew );
-    Vec_VecFree( (Vec_Vec_t *)vResult );
-    pPars->nPartSize = nPartSize;
-    pPars->fVerbose = fVerbose;
-    if ( fVerbose )
-    {
-        ABC_PRT( "Total time", clock() - clk );
-    }
-    return pNew;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswRarity.c b/src/aig/ssw/sswRarity.c
deleted file mode 100644
index 5480afb5..00000000
--- a/src/aig/ssw/sswRarity.c
+++ /dev/null
@@ -1,1158 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswRarity.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Rarity-driven refinement of equivalence classes.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswRarity.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-#include "giaAig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Ssw_RarMan_t_ Ssw_RarMan_t;
-struct Ssw_RarMan_t_
-{
-    // parameters
-    int            nWords;       // the number of words to simulate
-    int            nFrames;      // the number of frames to simulate
-    int            nBinSize;     // the number of flops in one group
-    int            fVerbose;     // the verbosiness flag
-    int            nGroups;      // the number of flop groups
-    int            nWordsReg;    // the number of words in the registers
-    // internal data
-    Aig_Man_t *    pAig;         // AIG with equivalence classes
-    Ssw_Cla_t *    ppClasses;    // equivalence classes
-    Vec_Int_t *    vInits;       // initial state
-    // simulation data
-    word *         pObjData;     // simulation info for each obj
-    word *         pPatData;     // pattern data for each reg
-    // candidates to update
-    Vec_Ptr_t *    vUpdConst;    // constant 1 candidates
-    Vec_Ptr_t *    vUpdClass;    // class representatives
-    // rarity data
-    int *          pRarity;      // occur counts for patterns in groups
-    double *       pPatCosts;    // pattern costs
-    // best patterns
-    Vec_Int_t *    vPatBests;    // best patterns
-    int            iFailPo;      // failed primary output
-    int            iFailPat;     // failed pattern
-};
-
-
-static inline int  Ssw_RarGetBinPat( Ssw_RarMan_t * p, int iBin, int iPat ) 
-{
-    assert( iBin >= 0 && iBin < Aig_ManRegNum(p->pAig) / p->nBinSize );
-    assert( iPat >= 0 && iPat < (1 << p->nBinSize) );
-    return p->pRarity[iBin * (1 << p->nBinSize) + iPat];
-}
-static inline void Ssw_RarSetBinPat( Ssw_RarMan_t * p, int iBin, int iPat, int Value ) 
-{
-    assert( iBin >= 0 && iBin < Aig_ManRegNum(p->pAig) / p->nBinSize );
-    assert( iPat >= 0 && iPat < (1 << p->nBinSize) );
-    p->pRarity[iBin * (1 << p->nBinSize) + iPat] = Value;
-}
-static inline void Ssw_RarAddToBinPat( Ssw_RarMan_t * p, int iBin, int iPat ) 
-{
-    assert( iBin >= 0 && iBin < Aig_ManRegNum(p->pAig) / p->nBinSize );
-    assert( iPat >= 0 && iPat < (1 << p->nBinSize) );
-    p->pRarity[iBin * (1 << p->nBinSize) + iPat]++;
-}
-
-static inline int    Ssw_RarBitWordNum( int nBits )             { return (nBits>>6) + ((nBits&63) > 0);  }
-
-static inline word * Ssw_RarObjSim( Ssw_RarMan_t * p, int Id )  { assert( Id < Aig_ManObjNumMax(p->pAig) ); return p->pObjData + p->nWords * Id;    }
-static inline word * Ssw_RarPatSim( Ssw_RarMan_t * p, int Id )  { assert( Id < 64 * p->nWords );            return p->pPatData + p->nWordsReg * Id; }
-
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Prepares random number generator.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_RarManPrepareRandom( int nRandSeed )
-{
-    int i;
-    Aig_ManRandom( 1 );
-    for ( i = 0; i < nRandSeed; i++ )
-        Aig_ManRandom( 0 );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Initializes random primary inputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_RarManAssingRandomPis( Ssw_RarMan_t * p )
-{
-    word * pSim;
-    Aig_Obj_t * pObj;
-    int w, i;
-    Saig_ManForEachPi( p->pAig, pObj, i )
-    {
-        pSim = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
-        for ( w = 0; w < p->nWords; w++ )
-            pSim[w] = Aig_ManRandom64(0);
-//        pSim[0] <<= 1;
-//        pSim[0] = (pSim[0] << 2) | 2;
-        pSim[0] = (pSim[0] << 4) | ((i & 1) ? 0xA : 0xC);
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Derives the counter-example.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Abc_Cex_t * Ssw_RarDeriveCex( Ssw_RarMan_t * p, int iFrame, int iPo, int iPatFinal, int fVerbose )
-{
-    Abc_Cex_t * pCex;
-    Aig_Obj_t * pObj;
-    Vec_Int_t * vTrace;
-    word * pSim;
-    int i, r, f, iBit, iPatThis;
-    // compute the pattern sequence
-    iPatThis = iPatFinal;
-    vTrace = Vec_IntStartFull( iFrame / p->nFrames + 1 );
-    Vec_IntWriteEntry( vTrace, iFrame / p->nFrames, iPatThis );
-    for ( r = iFrame / p->nFrames - 1; r >= 0; r-- )
-    {
-        iPatThis = Vec_IntEntry( p->vPatBests, r * p->nWords + iPatThis / 64 );
-        Vec_IntWriteEntry( vTrace, r, iPatThis );
-    }
-    // create counter-example
-    pCex = Abc_CexAlloc( Aig_ManRegNum(p->pAig), Saig_ManPiNum(p->pAig), iFrame+1 );
-    pCex->iFrame = iFrame;
-    pCex->iPo = iPo;
-    // insert the bits
-    iBit = Aig_ManRegNum(p->pAig);
-    for ( f = 0; f <= iFrame; f++ )
-    {
-        Ssw_RarManAssingRandomPis( p );
-        iPatThis = Vec_IntEntry( vTrace, f / p->nFrames );
-        Saig_ManForEachPi( p->pAig, pObj, i )
-        {
-            pSim = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
-            if ( Aig_InfoHasBit( (unsigned *)pSim, iPatThis ) )
-                Aig_InfoSetBit( pCex->pData, iBit );
-            iBit++;
-        }
-    }
-    Vec_IntFree( vTrace );
-    assert( iBit == pCex->nBits );
-    // verify the counter example
-    if ( !Saig_ManVerifyCex( p->pAig, pCex ) )
-    {
-        printf( "Ssw_RarDeriveCex(): Counter-example is invalid.\n" );
-//        Abc_CexFree( pCex );
-//        pCex = NULL;
-    }
-    else
-    {
-//      printf( "Counter-example verification is successful.\n" );
-        if ( fVerbose )
-            printf( "Output %d was asserted in frame %d (use \"write_counter\" to dump a witness). \n", pCex->iPo, pCex->iFrame );
-    }
-    return pCex;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Transposing 32-bit matrix.]
-
-  Description [Borrowed from "Hacker's Delight", by Henry Warren.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void transpose32( unsigned A[32] )
-{
-    int j, k; 
-    unsigned t, m = 0x0000FFFF; 
-    for ( j = 16; j != 0; j = j >> 1, m = m ^ (m << j) ) 
-    {
-        for ( k = 0; k < 32; k = (k + j + 1) & ~j )
-        {
-            t = (A[k] ^ (A[k+j] >> j)) & m;
-            A[k] = A[k] ^ t;
-            A[k+j] = A[k+j] ^ (t << j);
-        }
-    }
-} 
-
-/**Function*************************************************************
-
-  Synopsis    [Transposing 64-bit matrix.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void transpose64( word A[64] )
-{
-    int j, k; 
-    word t, m = 0x00000000FFFFFFFF; 
-    for ( j = 32; j != 0; j = j >> 1, m = m ^ (m << j) ) 
-    {
-        for ( k = 0; k < 64; k = (k + j + 1) & ~j )
-        {
-            t = (A[k] ^ (A[k+j] >> j)) & m;
-            A[k] = A[k] ^ t;
-            A[k+j] = A[k+j] ^ (t << j);
-        }
-    }
-} 
-
-/**Function*************************************************************
-
-  Synopsis    [Transposing 64-bit matrix.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void transpose64Simple( word A[64], word B[64] )
-{
-    int i, k; 
-    for ( i = 0; i < 64; i++ )
-        B[i] = 0;
-    for ( i = 0; i < 64; i++ ) 
-    for ( k = 0; k < 64; k++ )
-        if ( (A[i] >> k) & 1 )
-            B[k] |= ((word)1 << (63-i));
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Testing the transposing code.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void TransposeTest()
-{
-    word M[64], N[64];
-    int i, clk;
-    Aig_ManRandom64( 1 );
-//    for ( i = 0; i < 64; i++ )
-//        M[i] = Aig_ManRandom64( 0 );
-    for ( i = 0; i < 64; i++ )
-        M[i] = i? (word)0 : ~(word)0;
-//    for ( i = 0; i < 64; i++ )
-//        Extra_PrintBinary( stdout, (unsigned *)&M[i], 64 ), printf( "\n" );
-
-    clk = clock();
-    for ( i = 0; i < 100001; i++ )
-        transpose64Simple( M, N );
-    Abc_PrintTime( 1, "Time", clock() - clk );
-
-    clk = clock();
-    for ( i = 0; i < 100001; i++ )
-        transpose64( M );
-    Abc_PrintTime( 1, "Time", clock() - clk );
-
-    for ( i = 0; i < 64; i++ )
-        if ( M[i] != N[i] )
-            printf( "Mismatch\n" );
-/*
-    printf( "\n" );
-    for ( i = 0; i < 64; i++ )
-        Extra_PrintBinary( stdout, (unsigned *)&M[i], 64 ), printf( "\n" );
-    printf( "\n" );
-    for ( i = 0; i < 64; i++ )
-        Extra_PrintBinary( stdout, (unsigned *)&N[i], 64 ), printf( "\n" );
-*/
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Transposing pObjData[ nRegs x nWords ] -> pPatData[ nWords x nRegs ].]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_RarTranspose( Ssw_RarMan_t * p )
-{
-    Aig_Obj_t * pObj;
-    word M[64];
-    int w, r, i;
-    for ( w = 0; w < p->nWords; w++ )
-    for ( r = 0; r < p->nWordsReg; r++ )
-    {
-        // save input
-        for ( i = 0; i < 64; i++ )
-        {
-            if ( r*64 + 63-i < Aig_ManRegNum(p->pAig) )
-            {
-                pObj = Saig_ManLi( p->pAig, r*64 + 63-i );
-                M[i] = Ssw_RarObjSim( p, Aig_ObjId(pObj) )[w];
-            }
-            else
-                M[i] = 0;
-        }
-        // transpose
-        transpose64( M );
-        // save output
-        for ( i = 0; i < 64; i++ )
-            Ssw_RarPatSim( p, w*64 + 63-i )[r] = M[i];
-    }
-/*
-    Saig_ManForEachLi( p->pAig, pObj, i )
-    {
-        word * pBitData = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
-        Extra_PrintBinary( stdout, (unsigned *)pBitData, 64*p->nWords ); printf( "\n" );
-    }
-    printf( "\n" );
-    for ( i = 0; i < p->nWords*64; i++ )
-    {
-        word * pBitData = Ssw_RarPatSim( p, i );
-        Extra_PrintBinary( stdout, (unsigned *)pBitData, Aig_ManRegNum(p->pAig) ); printf( "\n" );
-    }
-    printf( "\n" );
-*/
-}
-
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Sets random inputs and specialied flop outputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_RarManInitialize( Ssw_RarMan_t * p, Vec_Int_t * vInit )
-{
-    Aig_Obj_t * pObj, * pObjLi;
-    word * pSim, * pSimLi;
-    int w, i;
-    // constant
-    pObj = Aig_ManConst1( p->pAig );
-    pSim = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
-    for ( w = 0; w < p->nWords; w++ )
-        pSim[w] = ~(word)0;
-    // primary inputs
-    Ssw_RarManAssingRandomPis( p );
-    // flop outputs
-    if ( vInit )
-    {
-        assert( Vec_IntSize(vInit) == Saig_ManRegNum(p->pAig) * p->nWords );
-        Saig_ManForEachLo( p->pAig, pObj, i )
-        {
-            pSim = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
-            for ( w = 0; w < p->nWords; w++ )
-                pSim[w] = Vec_IntEntry(vInit, w * Saig_ManRegNum(p->pAig) + i) ? ~(word)0 : (word)0;
-        }
-    }
-    else
-    {
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObj, i )
-        {
-            pSimLi = Ssw_RarObjSim( p, Aig_ObjId(pObjLi) );
-            pSim   = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
-            for ( w = 0; w < p->nWords; w++ )
-                pSim[w] = pSimLi[w];
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation info is composed of all zeros.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_RarManObjIsConst( void * pMan, Aig_Obj_t * pObj )
-{
-    Ssw_RarMan_t * p = (Ssw_RarMan_t *)pMan;
-    word * pSim = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
-    word Flip = pObj->fPhase ? ~0 : 0;
-    int w;
-    for ( w = 0; w < p->nWords; w++ )
-        if ( pSim[w] ^ Flip )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation infos are equal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_RarManObjsAreEqual( void * pMan, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
-{
-    Ssw_RarMan_t * p = (Ssw_RarMan_t *)pMan;
-    word * pSim0 = Ssw_RarObjSim( p, pObj0->Id );
-    word * pSim1 = Ssw_RarObjSim( p, pObj1->Id );
-    word Flip = (pObj0->fPhase != pObj1->fPhase) ? ~0 : 0;
-    int w;
-    for ( w = 0; w < p->nWords; w++ )
-        if ( pSim0[w] ^ pSim1[w] ^ Flip )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Computes hash value of the node using its simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Ssw_RarManObjHashWord( void * pMan, Aig_Obj_t * pObj )
-{
-    Ssw_RarMan_t * p = (Ssw_RarMan_t *)pMan;
-    static int s_SPrimes[128] = { 
-        1009, 1049, 1093, 1151, 1201, 1249, 1297, 1361, 1427, 1459, 
-        1499, 1559, 1607, 1657, 1709, 1759, 1823, 1877, 1933, 1997, 
-        2039, 2089, 2141, 2213, 2269, 2311, 2371, 2411, 2467, 2543, 
-        2609, 2663, 2699, 2741, 2797, 2851, 2909, 2969, 3037, 3089, 
-        3169, 3221, 3299, 3331, 3389, 3461, 3517, 3557, 3613, 3671, 
-        3719, 3779, 3847, 3907, 3943, 4013, 4073, 4129, 4201, 4243, 
-        4289, 4363, 4441, 4493, 4549, 4621, 4663, 4729, 4793, 4871, 
-        4933, 4973, 5021, 5087, 5153, 5227, 5281, 5351, 5417, 5471, 
-        5519, 5573, 5651, 5693, 5749, 5821, 5861, 5923, 6011, 6073, 
-        6131, 6199, 6257, 6301, 6353, 6397, 6481, 6563, 6619, 6689, 
-        6737, 6803, 6863, 6917, 6977, 7027, 7109, 7187, 7237, 7309, 
-        7393, 7477, 7523, 7561, 7607, 7681, 7727, 7817, 7877, 7933, 
-        8011, 8039, 8059, 8081, 8093, 8111, 8123, 8147
-    };
-    unsigned * pSims;
-    unsigned uHash;
-    int i;
-    uHash = 0;
-    pSims = (unsigned *)Ssw_RarObjSim( p, pObj->Id );
-    for ( i = 0; i < 2 * p->nWords; i++ )
-        uHash ^= pSims[i] * s_SPrimes[i & 0x7F];
-    return uHash;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation info is composed of all zeros.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_RarManObjWhichOne( Ssw_RarMan_t * p, Aig_Obj_t * pObj )
-{
-    word * pSim = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
-    word Flip = pObj->fPhase ? ~0 : 0;
-    int w, i;
-    for ( w = 0; w < p->nWords; w++ )
-        if ( pSim[w] ^ Flip )
-        {
-            for ( i = 0; i < 64; i++ )
-                if ( ((pSim[w] ^ Flip) >> i) & 1 )
-                    break;
-            assert( i < 64 );
-            return w * 64 + i;
-        }
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Check if any of the POs becomes non-constant.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_RarManCheckNonConstOutputs( Ssw_RarMan_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    p->iFailPo  = -1;
-    p->iFailPat = -1;
-    Saig_ManForEachPo( p->pAig, pObj, i )
-    {
-        if ( p->pAig->nConstrs && i >= Saig_ManPoNum(p->pAig) - p->pAig->nConstrs )
-            return 0;
-        if ( !Ssw_RarManObjIsConst(p, pObj) )
-        {
-            p->iFailPo  = i;
-            p->iFailPat = Ssw_RarManObjWhichOne( p, pObj );
-            return 1;
-        }
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs one round of simulation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_RarManSimulate( Ssw_RarMan_t * p, Vec_Int_t * vInit, int fUpdate, int fFirst )
-{
-    Aig_Obj_t * pObj, * pRepr;
-    word * pSim, * pSim0, * pSim1;
-    word Flip, Flip0, Flip1;
-    int w, i;
-    // initialize 
-    Ssw_RarManInitialize( p, vInit );
-    Vec_PtrClear( p->vUpdConst );
-    Vec_PtrClear( p->vUpdClass );
-    Aig_ManIncrementTravId( p->pAig );
-    // check comb inputs
-    if ( fUpdate )
-    Aig_ManForEachPi( p->pAig, pObj, i )
-    {
-        pRepr = Aig_ObjRepr(p->pAig, pObj);
-        if ( pRepr == NULL || Aig_ObjIsTravIdCurrent( p->pAig, pRepr ) )
-            continue;
-        if ( Ssw_RarManObjsAreEqual( p, pObj, pRepr ) )
-            continue;
-        // save for update
-        if ( pRepr == Aig_ManConst1(p->pAig) )
-            Vec_PtrPush( p->vUpdConst, pObj );
-        else
-        {
-            Vec_PtrPush( p->vUpdClass, pRepr );
-            Aig_ObjSetTravIdCurrent( p->pAig, pRepr );
-        }
-    }
-    // simulate 
-    Aig_ManForEachNode( p->pAig, pObj, i )
-    {
-        pSim  = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
-        pSim0 = Ssw_RarObjSim( p, Aig_ObjFaninId0(pObj) );
-        pSim1 = Ssw_RarObjSim( p, Aig_ObjFaninId1(pObj) );
-        Flip0 = Aig_ObjFaninC0(pObj) ? ~0 : 0;
-        Flip1 = Aig_ObjFaninC1(pObj) ? ~0 : 0;
-        for ( w = 0; w < p->nWords; w++ )
-            pSim[w] = (Flip0 ^ pSim0[w]) & (Flip1 ^ pSim1[w]);
-        if ( !fUpdate )
-            continue;
-        // check classes
-        pRepr = Aig_ObjRepr(p->pAig, pObj);
-        if ( pRepr == NULL || Aig_ObjIsTravIdCurrent( p->pAig, pRepr ) )
-            continue;
-        if ( Ssw_RarManObjsAreEqual( p, pObj, pRepr ) )
-            continue;
-        // save for update
-        if ( pRepr == Aig_ManConst1(p->pAig) )
-            Vec_PtrPush( p->vUpdConst, pObj );
-        else
-        {
-            Vec_PtrPush( p->vUpdClass, pRepr );
-            Aig_ObjSetTravIdCurrent( p->pAig, pRepr );
-        }
-    }
-    // transfer to POs
-    Aig_ManForEachPo( p->pAig, pObj, i )
-    {
-        pSim  = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
-        pSim0 = Ssw_RarObjSim( p, Aig_ObjFaninId0(pObj) );
-        Flip  = Aig_ObjFaninC0(pObj) ? ~0 : 0;
-        for ( w = 0; w < p->nWords; w++ )
-            pSim[w] = Flip ^ pSim0[w];
-    }
-    // refine classes
-    if ( fUpdate )
-    {
-        if ( fFirst )
-        {
-            Vec_Ptr_t * vCands = Vec_PtrAlloc( 1000 );
-            Aig_ManForEachObj( p->pAig, pObj, i )
-                if ( Ssw_ObjIsConst1Cand( p->pAig, pObj ) )
-                    Vec_PtrPush( vCands, pObj );
-            assert( Vec_PtrSize(vCands) == Ssw_ClassesCand1Num(p->ppClasses) );
-            Ssw_ClassesPrepareRehash( p->ppClasses, vCands, 0 );
-            Vec_PtrFree( vCands );
-        }
-        else
-        {
-            Ssw_ClassesRefineConst1Group( p->ppClasses, p->vUpdConst, 1 );
-            Ssw_ClassesRefineGroup( p->ppClasses, p->vUpdClass, 1 );
-        }
-    } 
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static Ssw_RarMan_t * Ssw_RarManStart( Aig_Man_t * pAig, int nWords, int nFrames, int nBinSize, int fVerbose )
-{
-    Ssw_RarMan_t * p;
-//    if ( Aig_ManRegNum(pAig) < nBinSize || nBinSize <= 0 )
-//        return NULL;
-    p = ABC_CALLOC( Ssw_RarMan_t, 1 );
-    p->pAig      = pAig;
-    p->nWords    = nWords;
-    p->nFrames   = nFrames;
-    p->nBinSize  = nBinSize;
-    p->fVerbose  = fVerbose;
-    p->nGroups   = Aig_ManRegNum(pAig) / nBinSize;
-    p->pRarity   = ABC_CALLOC( int, (1 << nBinSize) * p->nGroups );
-    p->pPatCosts = ABC_CALLOC( double, p->nWords * 64 );
-    p->nWordsReg = Ssw_RarBitWordNum( Aig_ManRegNum(pAig) );
-    p->pObjData  = ABC_ALLOC( word, Aig_ManObjNumMax(pAig) * p->nWords );
-    p->pPatData  = ABC_ALLOC( word, 64 * p->nWords * p->nWordsReg );
-    p->vUpdConst = Vec_PtrAlloc( 100 );
-    p->vUpdClass = Vec_PtrAlloc( 100 );
-    p->vPatBests = Vec_IntAlloc( 100 );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static void Ssw_RarManStop( Ssw_RarMan_t * p )
-{
-    if ( p->ppClasses ) Ssw_ClassesStop( p->ppClasses );
-    Vec_IntFreeP( &p->vInits );
-    Vec_IntFreeP( &p->vPatBests );
-    Vec_PtrFreeP( &p->vUpdConst );
-    Vec_PtrFreeP( &p->vUpdClass );
-    ABC_FREE( p->pObjData );
-    ABC_FREE( p->pPatData );
-    ABC_FREE( p->pPatCosts );
-    ABC_FREE( p->pRarity );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Select best patterns.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
-{
-//    Aig_Obj_t * pObj;
-    unsigned char * pData;
-    unsigned * pPattern;
-    int i, k, Value;
-
-    // more data from regs to pats
-    Ssw_RarTranspose( p );
-
-    // update counters
-    for ( k = 0; k < p->nWords * 64; k++ )
-    {
-        pData = (unsigned char *)Ssw_RarPatSim( p, k );
-        for ( i = 0; i < p->nGroups; i++ )
-            Ssw_RarAddToBinPat( p, i, pData[i] );
-    }
-
-    // for each pattern
-    for ( k = 0; k < p->nWords * 64; k++ )
-    {
-        pData = (unsigned char *)Ssw_RarPatSim( p, k );
-        // find the cost of its values
-        p->pPatCosts[k] = 0.0;
-        for ( i = 0; i < p->nGroups; i++ )
-        {
-            Value = Ssw_RarGetBinPat( p, i, pData[i] );
-            assert( Value > 0 );
-            p->pPatCosts[k] += 1.0/(Value*Value);
-        }
-        // print the result
-//printf( "%3d : %9.6f\n", k, p->pPatCosts[k] );
-    }
-
-    // choose as many as there are words
-    Vec_IntClear( vInits );
-    for ( i = 0; i < p->nWords; i++ )
-    {
-        // select the best
-        int iPatBest = -1;
-        double iCostBest = -ABC_INFINITY;
-        for ( k = 0; k < p->nWords * 64; k++ )
-            if ( iCostBest < p->pPatCosts[k] )
-            {
-                iCostBest = p->pPatCosts[k];
-                iPatBest  = k;
-            }
-        // remove from costs
-        assert( iPatBest >= 0 );
-        p->pPatCosts[iPatBest] = -ABC_INFINITY;
-        // set the flops
-        pPattern = (unsigned *)Ssw_RarPatSim( p, iPatBest );
-        for ( k = 0; k < Aig_ManRegNum(p->pAig); k++ )
-            Vec_IntPush( vInits, Aig_InfoHasBit(pPattern, k) );
-//printf( "Best pattern %5d\n", iPatBest );
-        Vec_IntPush( p->vPatBests, iPatBest );
-    }
-    assert( Vec_IntSize(vInits) == Aig_ManRegNum(p->pAig) * p->nWords );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static Vec_Int_t * Ssw_RarFindStartingState( Aig_Man_t * pAig, Abc_Cex_t * pCex )
-{ 
-    Vec_Int_t * vInit;
-    Aig_Obj_t * pObj, * pObjLi;
-    int f, i, iBit;
-    // assign register outputs
-    Saig_ManForEachLi( pAig, pObj, i )
-        pObj->fMarkB = Aig_InfoHasBit( pCex->pData, i );
-    // simulate the timeframes
-    iBit = pCex->nRegs;
-    for ( f = 0; f <= pCex->iFrame; f++ )
-    {
-        // set the PI simulation information
-        Aig_ManConst1(pAig)->fMarkB = 1;
-        Saig_ManForEachPi( pAig, pObj, i )
-            pObj->fMarkB = Aig_InfoHasBit( pCex->pData, iBit++ );
-        Saig_ManForEachLiLo( pAig, pObjLi, pObj, i )
-            pObj->fMarkB = pObjLi->fMarkB;
-        // simulate internal nodes
-        Aig_ManForEachNode( pAig, pObj, i )
-            pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) )
-                         & ( Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj) );
-        // assign the COs
-        Aig_ManForEachPo( pAig, pObj, i )
-            pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) );
-    }
-    assert( iBit == pCex->nBits );
-    // check that the output failed as expected -- cannot check because it is not an SRM!
-//    pObj = Aig_ManPo( pAig, pCex->iPo );
-//    if ( pObj->fMarkB != 1 )
-//        printf( "The counter-example does not refine the output.\n" );
-    // record the new pattern
-    vInit = Vec_IntAlloc( Saig_ManRegNum(pAig) );
-    Saig_ManForEachLo( pAig, pObj, i )
-    {
-//printf( "%d", pObj->fMarkB );
-        Vec_IntPush( vInit, pObj->fMarkB );
-    }
-//printf( "\n" );
-    Aig_ManCleanMarkB( pAig );
-    return vInit;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_RarCheckTrivial( Aig_Man_t * pAig, int fVerbose )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Saig_ManForEachPo( pAig, pObj, i )
-    {
-        if ( pAig->nConstrs && i >= Saig_ManPoNum(pAig) - pAig->nConstrs )
-            return 0;
-        if ( pObj->fPhase )
-        {
-            ABC_FREE( pAig->pSeqModel );
-            pAig->pSeqModel = Abc_CexAlloc( Aig_ManRegNum(pAig), Saig_ManPiNum(pAig), 1 );
-            pAig->pSeqModel->iPo = i;
-            if ( fVerbose )
-                printf( "Output %d is trivally SAT in frame 0. \n", i );
-            return 1;
-        }
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Perform sequential simulation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_RarSimulate( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, int nRounds, int nRandSeed, int TimeOut, int fVerbose )
-{
-    int fTryBmc = 0;
-    int fMiter = 1;
-    Ssw_RarMan_t * p;
-    int r, f, clk, clkTotal = clock();
-    int nTimeToStop = time(NULL) + TimeOut;
-    int RetValue = -1;
-    int iFrameFail = -1;
-    assert( Aig_ManRegNum(pAig) > 0 );
-    assert( Aig_ManConstrNum(pAig) == 0 );
-    // consider the case of empty AIG
-    if ( Aig_ManNodeNum(pAig) == 0 )
-        return -1;
-    // check trivially SAT miters
-    if ( fMiter && Ssw_RarCheckTrivial( pAig, fVerbose ) )
-        return 0;
-    if ( fVerbose )
-        printf( "Rarity simulation with %d words, %d frames, %d rounds, %d seed, and %d sec timeout.\n", 
-            nWords, nFrames, nRounds, nRandSeed, TimeOut );
-    // reset random numbers
-    Ssw_RarManPrepareRandom( nRandSeed );
-
-    // create manager
-    p = Ssw_RarManStart( pAig, nWords, nFrames, nBinSize, fVerbose );
-    p->vInits = Vec_IntStart( Aig_ManRegNum(pAig) * nWords );
-
-    // perform simulation rounds
-    for ( r = 0; r < nRounds; r++ )
-    {
-        clk = clock();
-        if ( fTryBmc )
-        {
-            Aig_Man_t * pNewAig = Saig_ManDupWithPhase( pAig, p->vInits );
-            Saig_BmcPerform( pNewAig, 0, 100, 2000, 3, 0, 0, 1 /*fVerbose*/, 0, &iFrameFail );
-//            if ( pNewAig->pSeqModel != NULL )
-//                printf( "BMC has found a counter-example in frame %d.\n", iFrameFail );
-            Aig_ManStop( pNewAig );
-        }
-        // simulate
-        for ( f = 0; f < nFrames; f++ )
-        {
-            Ssw_RarManSimulate( p, f ? NULL : p->vInits, 0, 0 );
-            if ( fMiter && Ssw_RarManCheckNonConstOutputs(p) )
-            {
-                if ( fVerbose ) printf( "\n" );
-//                printf( "Simulation asserted a PO in frame f: %d <= f < %d.\n", r * nFrames, (r+1) * nFrames );
-                Ssw_RarManPrepareRandom( nRandSeed );
-                ABC_FREE( pAig->pSeqModel );
-                pAig->pSeqModel = Ssw_RarDeriveCex( p, r * p->nFrames + f, p->iFailPo, p->iFailPat, fVerbose );
-                RetValue = 0;
-                goto finish;
-            }
-            // check timeout
-            if ( TimeOut && time(NULL) > nTimeToStop )
-            {
-                if ( fVerbose ) printf( "\n" );
-                printf( "Reached timeout (%d seconds).\n",  TimeOut );
-                goto finish;
-            }
-        }
-        // get initialization patterns
-        Ssw_RarTransferPatterns( p, p->vInits );
-        // printout
-        if ( fVerbose )
-        {
-//            printf( "Round %3d:  ", r );
-//            Abc_PrintTime( 1, "Time", clock() - clk );
-            printf( "." );
-        }
-    }
-finish:
-    if ( r == nRounds && f == nFrames )
-    {
-        if ( fVerbose ) printf( "\n" );
-        printf( "Simulation did not assert POs in the first %d frames.         ", nRounds * nFrames );
-        Abc_PrintTime( 1, "Time", clock() - clkTotal );
-    }
-    // cleanup
-    Ssw_RarManStop( p );
-    return RetValue;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Perform sequential simulation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_RarSimulateGia( Gia_Man_t * p, int nFrames, int nWords, int nBinSize, int nRounds, int nRandSeed, int TimeOut, int fVerbose )
-{
-    Aig_Man_t * pAig;
-    int RetValue;
-    pAig = Gia_ManToAigSimple( p );
-    RetValue = Ssw_RarSimulate( pAig, nFrames, nWords, nBinSize, nRounds, nRandSeed, TimeOut, fVerbose );
-    // save counter-example
-    Abc_CexFree( p->pCexSeq );
-    p->pCexSeq = pAig->pSeqModel; pAig->pSeqModel = NULL;
-    Aig_ManStop( pAig );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Filter equivalence classes of nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_RarSignalFilter( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, int nRounds, int nRandSeed, int TimeOut, int fMiter, Abc_Cex_t * pCex, int fLatchOnly, int fVerbose )
-{
-    Ssw_RarMan_t * p;
-    int r, f, i, k, clkTotal = clock();
-    int nTimeToStop = time(NULL) + TimeOut;
-    int RetValue = -1;
-    assert( Aig_ManRegNum(pAig) > 0 );
-    assert( Aig_ManConstrNum(pAig) == 0 );
-    // consider the case of empty AIG
-    if ( Aig_ManNodeNum(pAig) == 0 )
-        return -1;
-    // check trivially SAT miters
-    if ( fMiter && Ssw_RarCheckTrivial( pAig, 1 ) )
-        return 0;
-    if ( fVerbose )
-        printf( "Rarity equiv filtering with %d words, %d frames, %d rounds, %d seed, and %d sec timeout.\n", 
-            nWords, nFrames, nRounds, nRandSeed, TimeOut );
-    // reset random numbers
-    Ssw_RarManPrepareRandom( nRandSeed );
-
-    // create manager
-    p = Ssw_RarManStart( pAig, nWords, nFrames, nBinSize, fVerbose );
-    // compute starting state if needed
-    assert( p->vInits == NULL );
-    if ( pCex )
-    {
-        p->vInits = Ssw_RarFindStartingState( pAig, pCex );
-        printf( "Beginning simulation from the state derived using the counter-example.\n" );
-    }
-    else
-        p->vInits = Vec_IntStart( Aig_ManRegNum(pAig) );
-    // duplicate the array
-    for ( i = 1; i < nWords; i++ )
-        for ( k = 0; k < Aig_ManRegNum(pAig); k++ )
-            Vec_IntPush( p->vInits, Vec_IntEntry(p->vInits, k) );
-    assert( Vec_IntSize(p->vInits) == Aig_ManRegNum(pAig) * nWords );
-
-    // create trivial equivalence classes with all nodes being candidates for constant 1
-    if ( pAig->pReprs == NULL )
-        p->ppClasses = Ssw_ClassesPrepareSimple( pAig, fLatchOnly, 0 );
-    else
-        p->ppClasses = Ssw_ClassesPrepareFromReprs( pAig );
-    Ssw_ClassesSetData( p->ppClasses, p, Ssw_RarManObjHashWord, Ssw_RarManObjIsConst, Ssw_RarManObjsAreEqual );
-    // print the stats
-    if ( fVerbose )
-    {
-        printf( "Initial  :  " );
-        Ssw_ClassesPrint( p->ppClasses, 0 );
-    }
-    // refine classes using BMC
-    for ( r = 0; r < nRounds; r++ )
-    {
-        // start filtering equivalence classes
-        if ( Ssw_ClassesCand1Num(p->ppClasses) == 0 && Ssw_ClassesClassNum(p->ppClasses) == 0 )
-        {
-            printf( "All equivalences are refined away.\n" );
-            break;
-        }
-        // simulate
-        for ( f = 0; f < nFrames; f++ )
-        {
-            Ssw_RarManSimulate( p, f ? NULL : p->vInits, 1, !r && !f );
-            if ( fMiter && Ssw_RarManCheckNonConstOutputs(p) )
-            {
-                if ( !fVerbose ) 
-                    printf( "\r" );
-//                printf( "Simulation asserted a PO in frame f: %d <= f < %d.\n", r * nFrames, (r+1) * nFrames );
-                Ssw_RarManPrepareRandom( nRandSeed );
-                Abc_CexFree( pAig->pSeqModel );
-                pAig->pSeqModel = Ssw_RarDeriveCex( p, r * p->nFrames + f, p->iFailPo, p->iFailPat, 1 );
-                RetValue = 0;
-                goto finish;
-            }
-            // check timeout
-            if ( TimeOut && time(NULL) > nTimeToStop )
-            {
-                if ( fVerbose ) printf( "\n" );
-                printf( "Reached timeout (%d seconds).\n",  TimeOut );
-                goto finish;
-            }
-        }
-        // get initialization patterns
-        Ssw_RarTransferPatterns( p, p->vInits );
-        // printout
-        if ( fVerbose )
-        {
-            printf( "Round %3d:  ", r );
-            Ssw_ClassesPrint( p->ppClasses, 0 );
-        }
-        else
-        {
-            printf( "." );
-        }
-    }
-finish:
-    // report
-    if ( r == nRounds && f == nFrames )
-    {
-        if ( !fVerbose ) 
-            printf( "\r" );
-        printf( "Simulation did not assert POs in the first %d frames.         ", nRounds * nFrames );
-        Abc_PrintTime( 1, "Time", clock() - clkTotal );
-    }
-    // cleanup
-    Ssw_RarManStop( p );
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Filter equivalence classes of nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_RarSignalFilterGia( Gia_Man_t * p, int nFrames, int nWords, int nBinSize, int nRounds, int nRandSeed, int TimeOut, int fMiter, Abc_Cex_t * pCex, int fLatchOnly, int fVerbose )
-{ 
-    Aig_Man_t * pAig;
-    int RetValue;
-    pAig = Gia_ManToAigSimple( p );
-    if ( p->pReprs != NULL )
-    {
-        Gia_ManReprToAigRepr2( pAig, p );
-        ABC_FREE( p->pReprs );
-        ABC_FREE( p->pNexts );
-    }
-    RetValue = Ssw_RarSignalFilter( pAig, nFrames, nWords, nBinSize, nRounds, nRandSeed, TimeOut, fMiter, pCex, fLatchOnly, fVerbose );
-    Gia_ManReprFromAigRepr( pAig, p );
-    // save counter-example
-    Abc_CexFree( p->pCexSeq );
-    p->pCexSeq = pAig->pSeqModel; pAig->pSeqModel = NULL;
-    Aig_ManStop( pAig );
-    return RetValue;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswRarity2.c b/src/aig/ssw/sswRarity2.c
deleted file mode 100644
index d8cb9c16..00000000
--- a/src/aig/ssw/sswRarity2.c
+++ /dev/null
@@ -1,517 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswRarity.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Rarity-driven refinement of equivalence classes.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswRarity.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-#include "giaAig.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Ssw_RarMan_t_ Ssw_RarMan_t;
-struct Ssw_RarMan_t_
-{
-    // parameters
-    int            nWords;       // the number of words to simulate
-    int            nFrames;      // the number of frames to simulate
-    int            nBinSize;     // the number of flops in one group
-    int            fVerbose;     // the verbosiness flag
-    int            nGroups;      // the number of flop groups
-    // internal data
-    Aig_Man_t *    pAig;         // AIG with equivalence classes
-    Ssw_Cla_t *    ppClasses;    // equivalence classes
-    Ssw_Sml_t *    pSml;         // simulation manager
-    Vec_Ptr_t *    vSimInfo;     // simulation info from pSml manager
-    Vec_Int_t *    vInits;       // initial state
-    // rarity data
-    int *          pRarity;      // occur counts for patterns in groups
-    int *          pGroupValues; // occur counts in each group
-    double *       pPatCosts;    // pattern costs
-
-};
-
-static inline int  Ssw_RarGetBinPat( Ssw_RarMan_t * p, int iBin, int iPat ) 
-{
-    assert( iBin >= 0 && iBin < Aig_ManRegNum(p->pAig) / p->nBinSize );
-    assert( iPat >= 0 && iPat < (1 << p->nBinSize) );
-    return p->pRarity[iBin * (1 << p->nBinSize) + iPat];
-}
-static inline void Ssw_RarSetBinPat( Ssw_RarMan_t * p, int iBin, int iPat, int Value ) 
-{
-    assert( iBin >= 0 && iBin < Aig_ManRegNum(p->pAig) / p->nBinSize );
-    assert( iPat >= 0 && iPat < (1 << p->nBinSize) );
-    p->pRarity[iBin * (1 << p->nBinSize) + iPat] = Value;
-}
-static inline void Ssw_RarAddToBinPat( Ssw_RarMan_t * p, int iBin, int iPat ) 
-{
-    assert( iBin >= 0 && iBin < Aig_ManRegNum(p->pAig) / p->nBinSize );
-    assert( iPat >= 0 && iPat < (1 << p->nBinSize) );
-    p->pRarity[iBin * (1 << p->nBinSize) + iPat]++;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static Ssw_RarMan_t * Ssw_RarManStart( Aig_Man_t * pAig, int nWords, int nFrames, int nBinSize, int fVerbose )
-{
-    Ssw_RarMan_t * p;
-    if ( Aig_ManRegNum(pAig) < nBinSize || nBinSize <= 0 )
-        return NULL;
-    p = ABC_CALLOC( Ssw_RarMan_t, 1 );
-    p->pAig = pAig;
-    p->nWords = nWords;
-    p->nFrames = nFrames;
-    p->nBinSize = nBinSize;
-    p->fVerbose = fVerbose;
-    p->nGroups  = Aig_ManRegNum(pAig) / nBinSize;
-    p->pRarity  = ABC_CALLOC( int, (1 << nBinSize) * p->nGroups );
-    p->pGroupValues = ABC_CALLOC( int, p->nGroups );
-    p->pPatCosts = ABC_CALLOC( double, p->nWords * 32 );
-    p->pSml = Ssw_SmlStart( pAig, 0, nFrames, nWords );
-    p->vSimInfo = Ssw_SmlSimDataPointers( p->pSml );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static void Ssw_RarManStop( Ssw_RarMan_t * p )
-{
-    if ( p->pSml ) Ssw_SmlStop( p->pSml );
-    if ( p->ppClasses ) Ssw_ClassesStop( p->ppClasses );
-    Vec_PtrFreeP( &p->vSimInfo );
-    Vec_IntFreeP( &p->vInits );
-    ABC_FREE( p->pGroupValues );
-    ABC_FREE( p->pPatCosts );
-    ABC_FREE( p->pRarity );
-    ABC_FREE( p );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Updates rarity counters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static void Ssw_RarUpdateCounters( Ssw_RarMan_t * p )
-{
-    Aig_Obj_t * pObj;
-    unsigned * pData;
-    int i, k;
-/*
-    Saig_ManForEachLi( p->pAig, pObj, i )
-    {
-        pData = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjId(pObj) ) + p->nWords * (p->nFrames - 1);
-        Extra_PrintBinary( stdout, pData, 32 );  printf( "\n" );
-    }
-*/
-    for ( k = 0; k < p->nWords * 32; k++ )
-    {
-        for ( i = 0; i < p->nGroups; i++ )
-            p->pGroupValues[i] = 0;
-        Saig_ManForEachLi( p->pAig, pObj, i )
-        {
-            pData = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjId(pObj) ) + p->nWords * (p->nFrames - 1);
-            if ( Aig_InfoHasBit(pData, k) && i / p->nBinSize < p->nGroups )
-                p->pGroupValues[i / p->nBinSize] |= (1 << (i % p->nBinSize));
-        }
-        for ( i = 0; i < p->nGroups; i++ )
-            Ssw_RarAddToBinPat( p, i, p->pGroupValues[i] );
-    }
-/*
-    for ( i = 0; i < p->nGroups; i++ )
-    {
-        for ( k = 0; k < (1 << p->nBinSize); k++ )
-            printf( "%d ", Ssw_RarGetBinPat(p, i, k) );
-        printf( "\n" );
-    }
-*/
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Select best patterns.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
-{
-    Aig_Obj_t * pObj;
-    unsigned * pData;
-    int i, k, Value;
-
-    // for each pattern
-    for ( k = 0; k < p->nWords * 32; k++ )
-    {
-        for ( i = 0; i < p->nGroups; i++ )
-            p->pGroupValues[i] = 0;
-        // compute its group values
-        Saig_ManForEachLi( p->pAig, pObj, i )
-        {
-            pData = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjId(pObj) ) + p->nWords * (p->nFrames - 1);
-            if ( Aig_InfoHasBit(pData, k) && i / p->nBinSize < p->nGroups )
-                p->pGroupValues[i / p->nBinSize] |= (1 << (i % p->nBinSize));
-        }
-        // find the cost of its values
-        p->pPatCosts[k] = 0.0;
-        for ( i = 0; i < p->nGroups; i++ )
-        {
-            Value = Ssw_RarGetBinPat( p, i, p->pGroupValues[i] );
-            assert( Value > 0 );
-            p->pPatCosts[k] += 1.0/(Value*Value);
-        }
-        // print the result
-//        printf( "%3d : %9.6f\n", k, p->pPatCosts[k] );
-    }
-
-    // choose as many as there are words
-    Vec_IntClear( vInits );
-    for ( i = 0; i < p->nWords; i++ )
-    {
-        // select the best
-        int iPatBest = -1;
-        double iCostBest = -ABC_INFINITY;
-        for ( k = 0; k < p->nWords * 32; k++ )
-            if ( iCostBest < p->pPatCosts[k] )
-            {
-                iCostBest = p->pPatCosts[k];
-                iPatBest  = k;
-            }
-        // remove from costs
-        assert( iPatBest >= 0 );
-        p->pPatCosts[iPatBest] = -ABC_INFINITY;
-        // set the flops
-        Saig_ManForEachLi( p->pAig, pObj, k )
-        {
-            pData = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjId(pObj) ) + p->nWords * (p->nFrames - 1);
-            Vec_IntPush( vInits, Aig_InfoHasBit(pData, iPatBest) );
-        }
-//printf( "Best pattern %5d\n", iPatBest );
-    }
-    assert( Vec_IntSize(vInits) == Aig_ManRegNum(p->pAig) * p->nWords );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-static Vec_Int_t * Ssw_RarFindStartingState( Aig_Man_t * pAig, Abc_Cex_t * pCex )
-{ 
-    Vec_Int_t * vInit;
-    Aig_Obj_t * pObj, * pObjLi;
-    int f, i, iBit;
-    // assign register outputs
-    Saig_ManForEachLi( pAig, pObj, i )
-        pObj->fMarkB = Aig_InfoHasBit( pCex->pData, i );
-    // simulate the timeframes
-    iBit = pCex->nRegs;
-    for ( f = 0; f <= pCex->iFrame; f++ )
-    {
-        // set the PI simulation information
-        Aig_ManConst1(pAig)->fMarkB = 1;
-        Saig_ManForEachPi( pAig, pObj, i )
-            pObj->fMarkB = Aig_InfoHasBit( pCex->pData, iBit++ );
-        Saig_ManForEachLiLo( pAig, pObjLi, pObj, i )
-            pObj->fMarkB = pObjLi->fMarkB;
-        // simulate internal nodes
-        Aig_ManForEachNode( pAig, pObj, i )
-            pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) )
-                         & ( Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj) );
-        // assign the COs
-        Aig_ManForEachPo( pAig, pObj, i )
-            pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) );
-    }
-    assert( iBit == pCex->nBits );
-    // check that the output failed as expected -- cannot check because it is not an SRM!
-//    pObj = Aig_ManPo( pAig, pCex->iPo );
-//    if ( pObj->fMarkB != 1 )
-//        printf( "The counter-example does not refine the output.\n" );
-    // record the new pattern
-    vInit = Vec_IntAlloc( Saig_ManRegNum(pAig) );
-    Saig_ManForEachLo( pAig, pObj, i )
-        Vec_IntPush( vInit, pObj->fMarkB );
-    return vInit;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Perform sequential simulation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_RarSimulate2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, int nRounds, int TimeOut, int fVerbose )
-{
-    int fMiter = 1;
-    Ssw_RarMan_t * p;
-    int r, clk, clkTotal = clock();
-    int nTimeToStop = time(NULL) + TimeOut;
-    int RetValue = -1;
-    assert( Aig_ManRegNum(pAig) > 0 );
-    assert( Aig_ManConstrNum(pAig) == 0 );
-    // consider the case of empty AIG
-    if ( Aig_ManNodeNum(pAig) == 0 )
-        return -1;
-    if ( fVerbose )
-        printf( "Simulating %d words through %d frames with %d binsize, %d rounds, and %d sec timeout.\n", 
-            nWords, nFrames, nBinSize, nRounds, TimeOut );
-    // reset random numbers
-    Aig_ManRandom( 1 );
-
-    // create manager
-    p = Ssw_RarManStart( pAig, nWords, nFrames, nBinSize, fVerbose );
-    p->vInits = Vec_IntStart( Aig_ManRegNum(pAig) * nWords );
-    Ssw_SmlInitializeSpecial( p->pSml, p->vInits );
-
-    // perform simulation rounds
-    for ( r = 0; r < nRounds; r++ )
-    {
-        clk = clock();
-        // simulate
-        Ssw_SmlSimulateOne( p->pSml );
-        if ( fMiter && Ssw_SmlCheckNonConstOutputs(p->pSml) )
-        {
-            if ( fVerbose ) printf( "\n" );
-            printf( "Simulation asserted a PO in frame f: %d <= f < %d.\n", r * nFrames, (r+1) * nFrames );
-            RetValue = 0;
-            break;
-        }
-        // get initialization patterns
-        Ssw_RarUpdateCounters( p );
-        Ssw_RarTransferPatterns( p, p->vInits );
-        Ssw_SmlInitializeSpecial( p->pSml, p->vInits );
-        // printout
-        if ( fVerbose )
-        {
-//            printf( "Round %3d:  ", r );
-//            Abc_PrintTime( 1, "Time", clock() - clk );
-            printf( "." );
-        }
-        // check timeout
-        if ( TimeOut && time(NULL) > nTimeToStop )
-        {
-            if ( fVerbose ) printf( "\n" );
-            printf( "Reached timeout (%d seconds).\n",  TimeOut );
-            break;
-        }
-    }
-    if ( r == nRounds )
-    {
-        if ( fVerbose ) printf( "\n" );
-        printf( "Simulation did not assert POs in the first %d frames.  ", nRounds * nFrames );
-        Abc_PrintTime( 1, "Time", clock() - clkTotal );
-    }
-    // cleanup
-    Ssw_RarManStop( p );
-    return RetValue;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Filter equivalence classes of nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, int nRounds, int TimeOut, Abc_Cex_t * pCex, int fLatchOnly, int fVerbose )
-{
-    int fMiter = 0;
-    Ssw_RarMan_t * p;
-    int r, i, k, clkTotal = clock();
-    int nTimeToStop = time(NULL) + TimeOut;
-    int RetValue = -1;
-    assert( Aig_ManRegNum(pAig) > 0 );
-    assert( Aig_ManConstrNum(pAig) == 0 );
-    // consider the case of empty AIG
-    if ( Aig_ManNodeNum(pAig) == 0 )
-        return -1;
-    if ( fVerbose )
-        printf( "Filtering equivs with %d words through %d frames with %d binsize, %d rounds, and %d sec timeout.\n", 
-            nWords, nFrames, nBinSize, nRounds, TimeOut );
-    // reset random numbers
-    Aig_ManRandom( 1 );
-
-    // create manager
-    p = Ssw_RarManStart( pAig, nWords, nFrames, nBinSize, fVerbose );
-    // compute starting state if needed
-    assert( p->vInits == NULL );
-    if ( pCex )
-        p->vInits = Ssw_RarFindStartingState( pAig, pCex );
-    else
-        p->vInits = Vec_IntStart( Aig_ManRegNum(pAig) );
-    // duplicate the array
-    for ( i = 1; i < nWords; i++ )
-        for ( k = 0; k < Aig_ManRegNum(pAig); k++ )
-            Vec_IntPush( p->vInits, Vec_IntEntry(p->vInits, k) );
-    assert( Vec_IntSize(p->vInits) == Aig_ManRegNum(pAig) * nWords );
-    // initialize simulation manager
-    Ssw_SmlInitializeSpecial( p->pSml, p->vInits );
-
-    // create trivial equivalence classes with all nodes being candidates for constant 1
-    if ( pAig->pReprs == NULL )
-        p->ppClasses = Ssw_ClassesPrepareSimple( pAig, fLatchOnly, 0 );
-    else
-        p->ppClasses = Ssw_ClassesPrepareFromReprs( pAig );
-    Ssw_ClassesSetData( p->ppClasses, p->pSml, NULL, Ssw_SmlObjIsConstWord, Ssw_SmlObjsAreEqualWord );
-    // print the stats
-    if ( fVerbose )
-    {
-        printf( "Initial  :  " );
-        Ssw_ClassesPrint( p->ppClasses, 0 );
-    }
-    // refine classes using BMC
-    for ( r = 0; r < nRounds; r++ )
-    {
-        // start filtering equivalence classes
-        if ( Ssw_ClassesCand1Num(p->ppClasses) == 0 && Ssw_ClassesClassNum(p->ppClasses) == 0 )
-        {
-            printf( "All equivalences are refined away.\n" );
-            break;
-        }
-        // simulate
-        Ssw_SmlSimulateOne( p->pSml );
-        if ( fMiter && Ssw_SmlCheckNonConstOutputs(p->pSml) )
-        {
-            if ( fVerbose ) printf( "\n" );
-            printf( "Simulation asserted a PO in frame f: %d <= f < %d.\n", r * nFrames, (r+1) * nFrames );
-            RetValue = 0;
-            break;
-        }
-        // check equivalence classes
-        Ssw_ClassesRefineConst1( p->ppClasses, 1 );
-        Ssw_ClassesRefine( p->ppClasses, 1 );
-        // printout
-        if ( fVerbose )
-        {
-            printf( "Round %3d:  ", r );
-            Ssw_ClassesPrint( p->ppClasses, 0 );
-        }
-        // get initialization patterns
-        Ssw_RarUpdateCounters( p );
-        Ssw_RarTransferPatterns( p, p->vInits );
-        Ssw_SmlInitializeSpecial( p->pSml, p->vInits );
-        // check timeout
-        if ( TimeOut && time(NULL) > nTimeToStop )
-        {
-            if ( fVerbose ) printf( "\n" );
-            printf( "Reached timeout (%d seconds).\n",  TimeOut );
-            break;
-        }
-    }
-    if ( r == nRounds )
-    {
-        printf( "Simulation did not assert POs in the first %d frames.  ", nRounds * nFrames );
-        Abc_PrintTime( 1, "Time", clock() - clkTotal );
-    }
-    // cleanup
-    Ssw_RarManStop( p );
-    return -1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Filter equivalence classes of nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_RarSignalFilterGia2( Gia_Man_t * p, int nFrames, int nWords, int nBinSize, int nRounds, int TimeOut, Abc_Cex_t * pCex, int fLatchOnly, int fVerbose )
-{ 
-    Aig_Man_t * pAig;
-    int RetValue;
-    pAig = Gia_ManToAigSimple( p );
-    if ( p->pReprs != NULL )
-    {
-        Gia_ManReprToAigRepr2( pAig, p );
-        ABC_FREE( p->pReprs );
-        ABC_FREE( p->pNexts );
-    }
-    RetValue = Ssw_RarSignalFilter2( pAig, nFrames, nWords, nBinSize, nRounds, TimeOut, pCex, fLatchOnly, fVerbose );
-    Gia_ManReprFromAigRepr( pAig, p );
-    Aig_ManStop( pAig );
-    return RetValue;
-}
-
-
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswSat.c b/src/aig/ssw/sswSat.c
deleted file mode 100644
index 7d371cac..00000000
--- a/src/aig/ssw/sswSat.c
+++ /dev/null
@@ -1,306 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswSat.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Calls to the SAT solver.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswSat.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Runs equivalence test for the two nodes.]
-
-  Description [Both nodes should be regular and different from each other.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_NodesAreEquiv( Ssw_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew )
-{
-    int nBTLimit = p->pPars->nBTLimit;
-    int pLits[3], nLits, RetValue, RetValue1, clk;//, status;
-    p->nSatCalls++;
-    p->pMSat->nSolverCalls++;
-
-    // sanity checks
-    assert( !Aig_IsComplement(pOld) );
-    assert( !Aig_IsComplement(pNew) );
-    assert( pOld != pNew );
-    assert( p->pMSat != NULL );
-
-    // if the nodes do not have SAT variables, allocate them
-    Ssw_CnfNodeAddToSolver( p->pMSat, pOld );
-    Ssw_CnfNodeAddToSolver( p->pMSat, pNew );
-
-    // solve under assumptions
-    // A = 1; B = 0     OR     A = 1; B = 1 
-    nLits = 2;
-    pLits[0] = toLitCond( Ssw_ObjSatNum(p->pMSat,pOld), 0 );
-    pLits[1] = toLitCond( Ssw_ObjSatNum(p->pMSat,pNew), pOld->fPhase == pNew->fPhase );
-    if ( p->iOutputLit > -1 )
-        pLits[nLits++] = p->iOutputLit;
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pOld->fPhase )  pLits[0] = lit_neg( pLits[0] );
-        if ( pNew->fPhase )  pLits[1] = lit_neg( pLits[1] );
-    }
-//Sat_SolverWriteDimacs( p->pSat, "temp.cnf", pLits, pLits + 2, 1 );
-
-    if ( p->pMSat->pSat->qtail != p->pMSat->pSat->qhead )
-    {
-        RetValue = sat_solver_simplify(p->pMSat->pSat);
-        assert( RetValue != 0 );
-    }
-
-clk = clock();
-    RetValue1 = sat_solver_solve( p->pMSat->pSat, pLits, pLits + nLits, 
-        (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-p->timeSat += clock() - clk;
-    if ( RetValue1 == l_False )
-    {
-p->timeSatUnsat += clock() - clk;
-        if ( nLits == 2 )
-        {
-            pLits[0] = lit_neg( pLits[0] );
-            pLits[1] = lit_neg( pLits[1] );
-            RetValue = sat_solver_addclause( p->pMSat->pSat, pLits, pLits + 2 );
-            assert( RetValue );
-/*
-            if ( p->pMSat->pSat->qtail != p->pMSat->pSat->qhead )
-            {
-                RetValue = sat_solver_simplify(p->pMSat->pSat);
-                assert( RetValue != 0 );
-            }
-*/
-        }
-        p->nSatCallsUnsat++;
-    }
-    else if ( RetValue1 == l_True )
-    {
-p->timeSatSat += clock() - clk;
-        p->nSatCallsSat++;
-        return 0;
-    }
-    else // if ( RetValue1 == l_Undef )
-    {
-p->timeSatUndec += clock() - clk;
-        p->nSatFailsReal++;
-        return -1;
-    }
-
-    // if the old node was constant 0, we already know the answer
-    if ( pOld == Aig_ManConst1(p->pFrames) )
-    {
-        p->nSatProof++;
-        return 1;
-    }
-
-    // solve under assumptions
-    // A = 0; B = 1     OR     A = 0; B = 0 
-    nLits = 2;
-    pLits[0] = toLitCond( Ssw_ObjSatNum(p->pMSat,pOld), 1 );
-    pLits[1] = toLitCond( Ssw_ObjSatNum(p->pMSat,pNew), pOld->fPhase ^ pNew->fPhase );
-    if ( p->iOutputLit > -1 )
-        pLits[nLits++] = p->iOutputLit;
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( pOld->fPhase )  pLits[0] = lit_neg( pLits[0] );
-        if ( pNew->fPhase )  pLits[1] = lit_neg( pLits[1] );
-    }
-
-    if ( p->pMSat->pSat->qtail != p->pMSat->pSat->qhead )
-    {
-        RetValue = sat_solver_simplify(p->pMSat->pSat);
-        assert( RetValue != 0 );
-    }
-
-clk = clock();
-    RetValue1 = sat_solver_solve( p->pMSat->pSat, pLits, pLits + nLits, 
-        (ABC_INT64_T)nBTLimit, (ABC_INT64_T)0, (ABC_INT64_T)0, (ABC_INT64_T)0 );
-p->timeSat += clock() - clk;
-    if ( RetValue1 == l_False )
-    {
-p->timeSatUnsat += clock() - clk;
-        if ( nLits == 2 )
-        {
-            pLits[0] = lit_neg( pLits[0] );
-            pLits[1] = lit_neg( pLits[1] );
-            RetValue = sat_solver_addclause( p->pMSat->pSat, pLits, pLits + 2 );
-            assert( RetValue );
-/*
-            if ( p->pMSat->pSat->qtail != p->pMSat->pSat->qhead )
-            {
-                RetValue = sat_solver_simplify(p->pMSat->pSat);
-                assert( RetValue != 0 );
-            }
-*/
-        }
-        p->nSatCallsUnsat++;
-    }
-    else if ( RetValue1 == l_True )
-    {
-p->timeSatSat += clock() - clk;
-        p->nSatCallsSat++;
-        return 0;
-    }
-    else // if ( RetValue1 == l_Undef )
-    {
-p->timeSatUndec += clock() - clk;
-        p->nSatFailsReal++;
-        return -1;
-    }
-    // return SAT proof
-    p->nSatProof++;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Constrains two nodes to be equivalent in the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_NodesAreConstrained( Ssw_Man_t * p, Aig_Obj_t * pOld, Aig_Obj_t * pNew )
-{
-    int pLits[2], RetValue, fComplNew;
-    Aig_Obj_t * pTemp;
-
-    // sanity checks
-    assert( Aig_Regular(pOld) != Aig_Regular(pNew) );
-    assert( p->pPars->fConstrs || Aig_ObjPhaseReal(pOld) == Aig_ObjPhaseReal(pNew) );
-
-    // move constant to the old node
-    if ( Aig_Regular(pNew) == Aig_ManConst1(p->pFrames) )
-    {
-        assert( Aig_Regular(pOld) != Aig_ManConst1(p->pFrames) );
-        pTemp = pOld;
-        pOld  = pNew;
-        pNew  = pTemp;
-    }
-
-    // move complement to the new node
-    if ( Aig_IsComplement(pOld) )
-    {
-        pOld = Aig_Regular(pOld);
-        pNew = Aig_Not(pNew);
-    }
-    assert( p->pMSat != NULL );
-
-    // if the nodes do not have SAT variables, allocate them
-    Ssw_CnfNodeAddToSolver( p->pMSat, pOld );
-    Ssw_CnfNodeAddToSolver( p->pMSat, Aig_Regular(pNew) );
-
-    // transform the new node
-    fComplNew = Aig_IsComplement( pNew );
-    pNew = Aig_Regular( pNew );
-
-    // consider the constant 1 case
-    if ( pOld == Aig_ManConst1(p->pFrames) )
-    {
-        // add constraint A = 1  ---->  A
-        pLits[0] = toLitCond( Ssw_ObjSatNum(p->pMSat,pNew), fComplNew );
-        if ( p->pPars->fPolarFlip )
-        {
-            if ( pNew->fPhase )  pLits[0] = lit_neg( pLits[0] );
-        }
-        RetValue = sat_solver_addclause( p->pMSat->pSat, pLits, pLits + 1 );
-        assert( RetValue );
-    }
-    else
-    {
-        // add constraint A = B  ---->  (A v !B)(!A v B)
-
-        // (A v !B)
-        pLits[0] = toLitCond( Ssw_ObjSatNum(p->pMSat,pOld), 0 );
-        pLits[1] = toLitCond( Ssw_ObjSatNum(p->pMSat,pNew), !fComplNew );
-        if ( p->pPars->fPolarFlip )
-        {
-            if ( pOld->fPhase )  pLits[0] = lit_neg( pLits[0] );
-            if ( pNew->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        }
-        pLits[0] = lit_neg( pLits[0] );
-        pLits[1] = lit_neg( pLits[1] );
-        RetValue = sat_solver_addclause( p->pMSat->pSat, pLits, pLits + 2 );
-        assert( RetValue );
-
-        // (!A v B)
-        pLits[0] = toLitCond( Ssw_ObjSatNum(p->pMSat,pOld), 1 );
-        pLits[1] = toLitCond( Ssw_ObjSatNum(p->pMSat,pNew), fComplNew);
-        if ( p->pPars->fPolarFlip )
-        {
-            if ( pOld->fPhase )  pLits[0] = lit_neg( pLits[0] );
-            if ( pNew->fPhase )  pLits[1] = lit_neg( pLits[1] );
-        }
-        pLits[0] = lit_neg( pLits[0] );
-        pLits[1] = lit_neg( pLits[1] );
-        RetValue = sat_solver_addclause( p->pMSat->pSat, pLits, pLits + 2 );
-        assert( RetValue );
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Constrains one node in the SAT solver.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_NodeIsConstrained( Ssw_Man_t * p, Aig_Obj_t * pPoObj )
-{
-    int RetValue, Lit;
-    Ssw_CnfNodeAddToSolver( p->pMSat, Aig_ObjFanin0(pPoObj) );
-    // add constraint A = 1  ---->  A
-    Lit = toLitCond( Ssw_ObjSatNum(p->pMSat,Aig_ObjFanin0(pPoObj)), !Aig_ObjFaninC0(pPoObj) );
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( Aig_ObjFanin0(pPoObj)->fPhase )  Lit = lit_neg( Lit );
-    }
-    RetValue = sat_solver_addclause( p->pMSat->pSat, &Lit, &Lit + 1 );
-    assert( RetValue );
-    return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswSemi.c b/src/aig/ssw/sswSemi.c
deleted file mode 100644
index 2a28a29b..00000000
--- a/src/aig/ssw/sswSemi.c
+++ /dev/null
@@ -1,322 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswSemi.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Semiformal for equivalence clases.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswSemi.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Ssw_Sem_t_ Ssw_Sem_t; // BMC manager
-
-struct Ssw_Sem_t_
-{
-    // parameters
-    int              nConfMaxStart;  // the starting conflict limit
-    int              nConfMax;       // the intermediate conflict limit
-    int              nFramesSweep;   // the number of frames to sweep
-    int              fVerbose;       // prints output statistics
-    // equivalences considered
-    Ssw_Man_t *      pMan;           // SAT sweeping manager
-    Vec_Ptr_t *      vTargets;       // the nodes that are watched
-    // storage for patterns
-    int              nPatternsAlloc; // the max number of interesting states
-    int              nPatterns;      // the number of patterns
-    Vec_Ptr_t *      vPatterns;      // storage for the interesting states
-    Vec_Int_t *      vHistory;       // what state and how many steps
-};
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Sem_t * Ssw_SemManStart( Ssw_Man_t * pMan, int nConfMax, int fVerbose )
-{
-    Ssw_Sem_t * p;
-    Aig_Obj_t * pObj;
-    int i;
-    // create interpolation manager
-    p = ABC_ALLOC( Ssw_Sem_t, 1 ); 
-    memset( p, 0, sizeof(Ssw_Sem_t) );
-    p->nConfMaxStart  = nConfMax;
-    p->nConfMax       = nConfMax;
-    p->nFramesSweep   = ABC_MAX( (1<<21)/Aig_ManNodeNum(pMan->pAig), pMan->nFrames );
-    p->fVerbose       = fVerbose;
-    // equivalences considered
-    p->pMan           = pMan;
-    p->vTargets       = Vec_PtrAlloc( Saig_ManPoNum(p->pMan->pAig) );
-    Saig_ManForEachPo( p->pMan->pAig, pObj, i )
-        Vec_PtrPush( p->vTargets, Aig_ObjFanin0(pObj) );
-    // storage for patterns
-    p->nPatternsAlloc = 512;
-    p->nPatterns      = 1;
-    p->vPatterns      = Vec_PtrAllocSimInfo( Aig_ManRegNum(p->pMan->pAig), Aig_BitWordNum(p->nPatternsAlloc) );
-    Vec_PtrCleanSimInfo( p->vPatterns, 0, Aig_BitWordNum(p->nPatternsAlloc) );
-    p->vHistory       = Vec_IntAlloc( 100 );
-    Vec_IntPush( p->vHistory, 0 );
-    // update arrays of the manager
-    assert( 0 );
-/*
-    ABC_FREE( p->pMan->pNodeToFrames );
-    Vec_IntFree( p->pMan->vSatVars );
-    p->pMan->pNodeToFrames = ABC_CALLOC( Aig_Obj_t *, Aig_ManObjNumMax(p->pMan->pAig) * p->nFramesSweep );
-    p->pMan->vSatVars      = Vec_IntStart( Aig_ManObjNumMax(p->pMan->pAig) * (p->nFramesSweep+1) );
-*/
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SemManStop( Ssw_Sem_t * p )
-{
-    Vec_PtrFree( p->vTargets );
-    Vec_PtrFree( p->vPatterns );
-    Vec_IntFree( p->vHistory );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SemCheckTargets( Ssw_Sem_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vTargets, pObj, i )
-        if ( !Ssw_ObjIsConst1Cand(p->pMan->pAig, pObj) )
-            return 1;
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManFilterBmcSavePattern( Ssw_Sem_t * p )
-{
-    unsigned * pInfo;
-    Aig_Obj_t * pObj;
-    int i;
-    if ( p->nPatterns >= p->nPatternsAlloc )
-        return;
-    Saig_ManForEachLo( p->pMan->pAig, pObj, i )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry( p->vPatterns, i );
-        if ( Aig_InfoHasBit( p->pMan->pPatWords, Saig_ManPiNum(p->pMan->pAig) + i ) )
-            Aig_InfoSetBit( pInfo, p->nPatterns );
-    }
-    p->nPatterns++;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for the internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManFilterBmc( Ssw_Sem_t * pBmc, int iPat, int fCheckTargets )
-{
-    Ssw_Man_t * p = pBmc->pMan;
-    Aig_Obj_t * pObj, * pObjNew, * pObjLi, * pObjLo;
-    unsigned * pInfo;
-    int i, f, clk, RetValue, fFirst = 0;
-clk = clock();
-
-    // start initialized timeframes
-    p->pFrames = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * 3 );
-    Saig_ManForEachLo( p->pAig, pObj, i )
-    {
-        pInfo = (unsigned *)Vec_PtrEntry( pBmc->vPatterns, i );
-        pObjNew = Aig_NotCond( Aig_ManConst1(p->pFrames), !Aig_InfoHasBit(pInfo, iPat) );
-        Ssw_ObjSetFrame( p, pObj, 0, pObjNew );
-    }
-
-    // sweep internal nodes
-    RetValue = pBmc->nFramesSweep;
-    for ( f = 0; f < pBmc->nFramesSweep; f++ )
-    {
-        // map constants and PIs
-        Ssw_ObjSetFrame( p, Aig_ManConst1(p->pAig), f, Aig_ManConst1(p->pFrames) );
-        Saig_ManForEachPi( p->pAig, pObj, i )
-            Ssw_ObjSetFrame( p, pObj, f, Aig_ObjCreatePi(p->pFrames) );
-        // sweep internal nodes
-        Aig_ManForEachNode( p->pAig, pObj, i )
-        {
-            pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) );
-            Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-            if ( Ssw_ManSweepNode( p, pObj, f, 1, NULL ) )
-            {
-                Ssw_ManFilterBmcSavePattern( pBmc );
-                if ( fFirst == 0 )
-                {
-                    fFirst = 1;
-                    pBmc->nConfMax *= 10;
-                } 
-            }
-            if ( f > 0 && p->pMSat->pSat->stats.conflicts >= pBmc->nConfMax )
-            {
-                RetValue = -1;
-                break;
-            }
-        }
-        // quit if this is the last timeframe
-        if ( p->pMSat->pSat->stats.conflicts >= pBmc->nConfMax )
-        {
-            RetValue += f + 1;
-            break;
-        }
-        if ( fCheckTargets && Ssw_SemCheckTargets( pBmc ) )
-            break;
-        // transfer latch input to the latch outputs 
-        // build logic cones for register outputs
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-        {
-            pObjNew = Ssw_ObjChild0Fra(p, pObjLi,f);
-            Ssw_ObjSetFrame( p, pObjLo, f+1, pObjNew );
-            Ssw_CnfNodeAddToSolver( p->pMSat, Aig_Regular(pObjNew) );
-        }
-//printf( "Frame %2d : Conflicts = %6d. \n", f, p->pSat->stats.conflicts );
-    }
-    if ( fFirst )
-        pBmc->nConfMax /= 10;
-
-    // cleanup
-    Ssw_ClassesCheck( p->ppClasses );
-p->timeBmc += clock() - clk;
-    return RetValue;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if one of the targets has failed.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_FilterUsingSemi( Ssw_Man_t * pMan, int fCheckTargets, int nConfMax, int fVerbose )
-{
-    Ssw_Sem_t * p;
-    int RetValue, Frames, Iter, clk = clock();
-    p = Ssw_SemManStart( pMan, nConfMax, fVerbose );
-    if ( fCheckTargets && Ssw_SemCheckTargets( p ) )
-    {
-        assert( 0 );
-        Ssw_SemManStop( p );
-        return 1;
-    }
-    if ( fVerbose )
-    {
-        printf( "AIG : C = %6d. Cl = %6d. Nodes = %6d.  ConfMax = %6d. FramesMax = %6d.\n", 
-            Ssw_ClassesCand1Num(p->pMan->ppClasses), Ssw_ClassesClassNum(p->pMan->ppClasses), 
-            Aig_ManNodeNum(p->pMan->pAig), p->nConfMax, p->nFramesSweep );
-    } 
-    RetValue = 0;
-    for ( Iter = 0; Iter < p->nPatterns; Iter++ )
-    {
-clk = clock();
-        pMan->pMSat = Ssw_SatStart( 0 );
-        Frames = Ssw_ManFilterBmc( p, Iter, fCheckTargets );
-        if ( fVerbose )
-        {
-            printf( "%3d : C = %6d. Cl = %6d. NR = %6d. F = %3d. C = %5d. P = %3d. %s ", 
-                Iter, Ssw_ClassesCand1Num(p->pMan->ppClasses), Ssw_ClassesClassNum(p->pMan->ppClasses), 
-                Aig_ManNodeNum(p->pMan->pFrames), Frames, (int)p->pMan->pMSat->pSat->stats.conflicts, p->nPatterns, 
-                p->pMan->nSatFailsReal? "f" : " " );
-            ABC_PRT( "T", clock() - clk );
-        } 
-        Ssw_ManCleanup( p->pMan );
-        if ( fCheckTargets && Ssw_SemCheckTargets( p ) )
-        {
-            printf( "Target is hit!!!\n" );
-            RetValue = 1;
-        }
-        if ( p->nPatterns >= p->nPatternsAlloc )
-            break;
-    }
-    Ssw_SemManStop( p );
-
-    pMan->nStrangers = 0;
-    pMan->nSatCalls = 0;
-    pMan->nSatProof = 0;
-    pMan->nSatFailsReal = 0; 
-    pMan->nSatCallsUnsat = 0;
-    pMan->nSatCallsSat = 0;  
-    pMan->timeSimSat = 0;    
-    pMan->timeSat = 0;       
-    pMan->timeSatSat = 0;    
-    pMan->timeSatUnsat = 0;  
-    pMan->timeSatUndec = 0;  
-    return RetValue;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswSim.c b/src/aig/ssw/sswSim.c
deleted file mode 100644
index daee24ec..00000000
--- a/src/aig/ssw/sswSim.c
+++ /dev/null
@@ -1,1405 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswSim.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Sequential simulator used by the inductive prover.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswSim.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-// simulation manager
-struct Ssw_Sml_t_
-{
-    Aig_Man_t *      pAig;              // the original AIG manager
-    int              nPref;             // the number of timeframes in the prefix
-    int              nFrames;           // the number of timeframes 
-    int              nWordsFrame;       // the number of words in each timeframe
-    int              nWordsTotal;       // the total number of words at a node
-    int              nWordsPref;        // the number of word in the prefix
-    int              fNonConstOut;      // have seen a non-const-0 output during simulation
-    int              nSimRounds;        // statistics
-    int              timeSim;           // statistics
-    unsigned         pData[0];          // simulation data for the nodes
-};
-
-static inline unsigned * Ssw_ObjSim( Ssw_Sml_t * p, int Id )  { return p->pData + p->nWordsTotal * Id; }
-static inline unsigned   Ssw_ObjRandomSim()                   { return Aig_ManRandom(0);               }
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Computes hash value of the node using its simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned Ssw_SmlObjHashWord( Ssw_Sml_t * p, Aig_Obj_t * pObj )
-{
-    static int s_SPrimes[128] = { 
-        1009, 1049, 1093, 1151, 1201, 1249, 1297, 1361, 1427, 1459, 
-        1499, 1559, 1607, 1657, 1709, 1759, 1823, 1877, 1933, 1997, 
-        2039, 2089, 2141, 2213, 2269, 2311, 2371, 2411, 2467, 2543, 
-        2609, 2663, 2699, 2741, 2797, 2851, 2909, 2969, 3037, 3089, 
-        3169, 3221, 3299, 3331, 3389, 3461, 3517, 3557, 3613, 3671, 
-        3719, 3779, 3847, 3907, 3943, 4013, 4073, 4129, 4201, 4243, 
-        4289, 4363, 4441, 4493, 4549, 4621, 4663, 4729, 4793, 4871, 
-        4933, 4973, 5021, 5087, 5153, 5227, 5281, 5351, 5417, 5471, 
-        5519, 5573, 5651, 5693, 5749, 5821, 5861, 5923, 6011, 6073, 
-        6131, 6199, 6257, 6301, 6353, 6397, 6481, 6563, 6619, 6689, 
-        6737, 6803, 6863, 6917, 6977, 7027, 7109, 7187, 7237, 7309, 
-        7393, 7477, 7523, 7561, 7607, 7681, 7727, 7817, 7877, 7933, 
-        8011, 8039, 8059, 8081, 8093, 8111, 8123, 8147
-    };
-    unsigned * pSims;
-    unsigned uHash;
-    int i;
-//    assert( p->nWordsTotal <= 128 );
-    uHash = 0;
-    pSims = Ssw_ObjSim(p, pObj->Id);
-    for ( i = p->nWordsPref; i < p->nWordsTotal; i++ )
-        uHash ^= pSims[i] * s_SPrimes[i & 0x7F];
-    return uHash;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation info is composed of all zeros.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlObjIsConstWord( Ssw_Sml_t * p, Aig_Obj_t * pObj )
-{
-    unsigned * pSims;
-    int i;
-    pSims = Ssw_ObjSim(p, pObj->Id);
-    for ( i = p->nWordsPref; i < p->nWordsTotal; i++ )
-        if ( pSims[i] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation infos are equal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlObjsAreEqualWord( Ssw_Sml_t * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
-{
-    unsigned * pSims0, * pSims1;
-    int i;
-    pSims0 = Ssw_ObjSim(p, pObj0->Id);
-    pSims1 = Ssw_ObjSim(p, pObj1->Id);
-    for ( i = p->nWordsPref; i < p->nWordsTotal; i++ )
-        if ( pSims0[i] != pSims1[i] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the node appears to be constant 1 candidate.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlObjIsConstBit( void * p, Aig_Obj_t * pObj )
-{
-    return pObj->fPhase == pObj->fMarkB;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the nodes appear equal.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlObjsAreEqualBit( void * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1 )
-{
-    return (pObj0->fPhase == pObj1->fPhase) == (pObj0->fMarkB == pObj1->fMarkB);
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of 1s in the XOR of simulation data.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlNodeNotEquWeight( Ssw_Sml_t * p, int Left, int Right )
-{
-    unsigned * pSimL, * pSimR;
-    int k, Counter = 0;
-    pSimL = Ssw_ObjSim( p, Left );
-    pSimR = Ssw_ObjSim( p, Right );
-    for ( k = p->nWordsPref; k < p->nWordsTotal; k++ )
-        Counter += Aig_WordCountOnes( pSimL[k] ^ pSimR[k] );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Checks implication.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlCheckXorImplication( Ssw_Sml_t * p, Aig_Obj_t * pObjLi, Aig_Obj_t * pObjLo, Aig_Obj_t * pCand )
-{
-    unsigned * pSimLi, * pSimLo, * pSimCand;
-    int k;
-    assert( pObjLo->fPhase == 0 );
-    // pObjLi->fPhase may be 1, but the LI simulation data is not complemented!
-    pSimCand = Ssw_ObjSim( p, Aig_Regular(pCand)->Id );
-    pSimLi   = Ssw_ObjSim( p, pObjLi->Id );
-    pSimLo   = Ssw_ObjSim( p, pObjLo->Id );
-    if ( Aig_Regular(pCand)->fPhase ^ Aig_IsComplement(pCand) )
-    {
-        for ( k = p->nWordsPref; k < p->nWordsTotal; k++ )
-            if ( ~pSimCand[k] & (pSimLi[k] ^ pSimLo[k]) )
-                return 0;
-    }
-    else
-    {
-        for ( k = p->nWordsPref; k < p->nWordsTotal; k++ )
-            if ( pSimCand[k] & (pSimLi[k] ^ pSimLo[k]) )
-                return 0;
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of 1s in the implication.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlCountXorImplication( Ssw_Sml_t * p, Aig_Obj_t * pObjLi, Aig_Obj_t * pObjLo, Aig_Obj_t * pCand )
-{
-    unsigned * pSimLi, * pSimLo, * pSimCand;
-    int k, Counter = 0;
-    assert( pObjLo->fPhase == 0 );
-    // pObjLi->fPhase may be 1, but the LI simulation data is not complemented!
-    pSimCand = Ssw_ObjSim( p, Aig_Regular(pCand)->Id );
-    pSimLi   = Ssw_ObjSim( p, pObjLi->Id );
-    pSimLo   = Ssw_ObjSim( p, pObjLo->Id );
-    if ( Aig_Regular(pCand)->fPhase ^ Aig_IsComplement(pCand) )
-    {
-        for ( k = p->nWordsPref; k < p->nWordsTotal; k++ )
-            Counter += Aig_WordCountOnes(~pSimCand[k] & ~(pSimLi[k] ^ pSimLo[k]));
-    }
-    else
-    {
-        for ( k = p->nWordsPref; k < p->nWordsTotal; k++ )
-            Counter += Aig_WordCountOnes(pSimCand[k] & ~(pSimLi[k] ^ pSimLo[k]));
-    }
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of 1s in the implication.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlCountEqual( Ssw_Sml_t * p, Aig_Obj_t * pObjLi, Aig_Obj_t * pObjLo )
-{
-    unsigned * pSimLi, * pSimLo;
-    int k, Counter = 0;
-    assert( pObjLo->fPhase == 0 );
-    // pObjLi->fPhase may be 1, but the LI simulation data is not complemented!
-    pSimLi   = Ssw_ObjSim( p, pObjLi->Id );
-    pSimLo   = Ssw_ObjSim( p, pObjLo->Id );
-    for ( k = p->nWordsPref; k < p->nWordsTotal; k++ )
-        Counter += Aig_WordCountOnes( ~(pSimLi[k] ^ pSimLo[k]) );
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation info is composed of all zeros.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlNodeIsZero( Ssw_Sml_t * p, Aig_Obj_t * pObj )
-{
-    unsigned * pSims;
-    int i;
-    pSims = Ssw_ObjSim(p, pObj->Id);
-    for ( i = p->nWordsPref; i < p->nWordsTotal; i++ )
-        if ( pSims[i] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if simulation info is composed of all zeros.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlNodeIsZeroFrame( Ssw_Sml_t * p, Aig_Obj_t * pObj, int f )
-{
-    unsigned * pSims = Ssw_ObjSim(p, pObj->Id);
-    return pSims[f] == 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of one's in the patten the object.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlNodeCountOnesReal( Ssw_Sml_t * p, Aig_Obj_t * pObj )
-{
-    unsigned * pSims;
-    int i, Counter = 0;
-    pSims = Ssw_ObjSim(p, Aig_Regular(pObj)->Id);
-    if ( Aig_Regular(pObj)->fPhase ^ Aig_IsComplement(pObj) )
-    {
-        for ( i = 0; i < p->nWordsTotal; i++ )
-            Counter += Aig_WordCountOnes( ~pSims[i] );
-    }
-    else
-    {
-        for ( i = 0; i < p->nWordsTotal; i++ )
-            Counter += Aig_WordCountOnes( pSims[i] );
-    }
-    return Counter;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Counts the number of one's in the patten the object.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlNodeCountOnesRealVec( Ssw_Sml_t * p, Vec_Ptr_t * vObjs )
-{
-    Aig_Obj_t * pObj;
-    unsigned * pSims, uWord;
-    int i, k, Counter = 0;
-    if ( Vec_PtrSize(vObjs) == 0 )
-        return 0;
-    for ( i = 0; i < p->nWordsTotal; i++ )
-    {
-        uWord = 0;
-        Vec_PtrForEachEntry( Aig_Obj_t *, vObjs, pObj, k )
-        {
-            pSims = Ssw_ObjSim(p, Aig_Regular(pObj)->Id);
-            if ( Aig_Regular(pObj)->fPhase ^ Aig_IsComplement(pObj) )
-                uWord |= ~pSims[i];
-            else
-                uWord |= pSims[i];
-        }
-        Counter += Aig_WordCountOnes( uWord );
-    }
-    return Counter;
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Generated const 0 pattern.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlSavePattern0( Ssw_Man_t * p, int fInit )
-{
-    memset( p->pPatWords, 0, sizeof(unsigned) * p->nPatWords );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [[Generated const 1 pattern.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlSavePattern1( Ssw_Man_t * p, int fInit )
-{
-    Aig_Obj_t * pObj;
-    int i, k, nTruePis;
-    memset( p->pPatWords, 0xff, sizeof(unsigned) * p->nPatWords );
-    if ( !fInit )
-        return;
-    // clear the state bits to correspond to all-0 initial state
-    nTruePis = Saig_ManPiNum(p->pAig);
-    k = 0;
-    Saig_ManForEachLo( p->pAig, pObj, i )
-        Aig_InfoXorBit( p->pPatWords, nTruePis * p->nFrames + k++ );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the counter-example from the successful pattern.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int * Ssw_SmlCheckOutputSavePattern( Ssw_Sml_t * p, Aig_Obj_t * pObjPo )
-{ 
-    Aig_Obj_t * pFanin, * pObjPi;
-    unsigned * pSims;
-    int i, k, BestPat, * pModel;
-    // find the word of the pattern
-    pFanin = Aig_ObjFanin0(pObjPo);
-    pSims = Ssw_ObjSim(p, pFanin->Id);
-    for ( i = 0; i < p->nWordsTotal; i++ )
-        if ( pSims[i] )
-            break;
-    assert( i < p->nWordsTotal );
-    // find the bit of the pattern
-    for ( k = 0; k < 32; k++ )
-        if ( pSims[i] & (1 << k) )
-            break;
-    assert( k < 32 );
-    // determine the best pattern
-    BestPat = i * 32 + k;
-    // fill in the counter-example data
-    pModel = ABC_ALLOC( int, Aig_ManPiNum(p->pAig)+1 );
-    Aig_ManForEachPi( p->pAig, pObjPi, i )
-    {
-        pModel[i] = Aig_InfoHasBit(Ssw_ObjSim(p, pObjPi->Id), BestPat);
-//        printf( "%d", pModel[i] );
-    }
-    pModel[Aig_ManPiNum(p->pAig)] = pObjPo->Id;
-//    printf( "\n" );
-    return pModel;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if the one of the output is already non-constant 0.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int * Ssw_SmlCheckOutput( Ssw_Sml_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    // make sure the reference simulation pattern does not detect the bug
-    pObj = Aig_ManPo( p->pAig, 0 );
-    assert( Aig_ObjFanin0(pObj)->fPhase == (unsigned)Aig_ObjFaninC0(pObj) ); 
-    Aig_ManForEachPo( p->pAig, pObj, i )
-    {
-        if ( !Ssw_SmlObjIsConstWord( p, Aig_ObjFanin0(pObj) ) )
-        {
-            // create the counter-example from this pattern
-            return Ssw_SmlCheckOutputSavePattern( p, pObj );
-        }
-    }
-    return NULL;
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Assigns random patterns to the PI node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlAssignRandom( Ssw_Sml_t * p, Aig_Obj_t * pObj )
-{
-    unsigned * pSims;
-    int i, f;
-    assert( Aig_ObjIsPi(pObj) );
-    pSims = Ssw_ObjSim( p, pObj->Id );
-    for ( i = 0; i < p->nWordsTotal; i++ )
-        pSims[i] = Ssw_ObjRandomSim();
-    // set the first bit 0 in each frame
-    assert( p->nWordsFrame * p->nFrames == p->nWordsTotal );
-    for ( f = 0; f < p->nFrames; f++ )
-        pSims[p->nWordsFrame*f] <<= 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Assigns random patterns to the PI node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlAssignRandomFrame( Ssw_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
-{
-    unsigned * pSims;
-    int i;
-    assert( iFrame < p->nFrames );
-    assert( Aig_ObjIsPi(pObj) );
-    pSims = Ssw_ObjSim( p, pObj->Id ) + p->nWordsFrame * iFrame;
-    for ( i = 0; i < p->nWordsFrame; i++ )
-        pSims[i] = Ssw_ObjRandomSim();
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Assigns constant patterns to the PI node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlObjAssignConst( Ssw_Sml_t * p, Aig_Obj_t * pObj, int fConst1, int iFrame )
-{
-    unsigned * pSims;
-    int i;
-    assert( iFrame < p->nFrames );
-    assert( Aig_ObjIsPi(pObj) );
-    pSims = Ssw_ObjSim( p, pObj->Id ) + p->nWordsFrame * iFrame;
-    for ( i = 0; i < p->nWordsFrame; i++ )
-        pSims[i] = fConst1? ~(unsigned)0 : 0;
-} 
-
-/**Function*************************************************************
-
-  Synopsis    [Assigns constant patterns to the PI node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlObjAssignConstWord( Ssw_Sml_t * p, Aig_Obj_t * pObj, int fConst1, int iFrame, int iWord )
-{
-    unsigned * pSims;
-    assert( iFrame < p->nFrames );
-    assert( iWord < p->nWordsFrame );
-    assert( Aig_ObjIsPi(pObj) );
-    pSims = Ssw_ObjSim( p, pObj->Id ) + p->nWordsFrame * iFrame;
-    pSims[iWord] = fConst1? ~(unsigned)0 : 0;
-} 
-
-/**Function*************************************************************
-
-  Synopsis    [Assigns constant patterns to the PI node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlObjSetWord( Ssw_Sml_t * p, Aig_Obj_t * pObj, unsigned Word, int iWord, int iFrame )
-{
-    unsigned * pSims;
-    assert( iFrame < p->nFrames );
-    assert( Aig_ObjIsPi(pObj) );
-    pSims = Ssw_ObjSim( p, pObj->Id ) + p->nWordsFrame * iFrame;
-    pSims[iWord] = Word;
-} 
-
-/**Function*************************************************************
-
-  Synopsis    [Assings distance-1 simulation info for the PIs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlAssignDist1( Ssw_Sml_t * p, unsigned * pPat )
-{
-    Aig_Obj_t * pObj;
-    int f, i, k, Limit, nTruePis;
-    assert( p->nFrames > 0 );
-    if ( p->nFrames == 1 )
-    {
-        // copy the PI info 
-        Aig_ManForEachPi( p->pAig, pObj, i )
-            Ssw_SmlObjAssignConst( p, pObj, Aig_InfoHasBit(pPat, i), 0 );
-        // flip one bit
-        Limit = ABC_MIN( Aig_ManPiNum(p->pAig), p->nWordsTotal * 32 - 1 );
-        for ( i = 0; i < Limit; i++ )
-            Aig_InfoXorBit( Ssw_ObjSim( p, Aig_ManPi(p->pAig,i)->Id ), i+1 );
-    }
-    else
-    {
-        int fUseDist1 = 0;
-
-        // copy the PI info for each frame
-        nTruePis = Aig_ManPiNum(p->pAig) - Aig_ManRegNum(p->pAig);
-        for ( f = 0; f < p->nFrames; f++ )
-            Saig_ManForEachPi( p->pAig, pObj, i )
-                Ssw_SmlObjAssignConst( p, pObj, Aig_InfoHasBit(pPat, nTruePis * f + i), f );
-        // copy the latch info 
-        k = 0;
-        Saig_ManForEachLo( p->pAig, pObj, i )
-            Ssw_SmlObjAssignConst( p, pObj, Aig_InfoHasBit(pPat, nTruePis * p->nFrames + k++), 0 );
-//        assert( p->pFrames == NULL || nTruePis * p->nFrames + k == Aig_ManPiNum(p->pFrames) );
-
-        // flip one bit of the last frame
-        if ( fUseDist1 ) //&& p->nFrames == 2 )
-        {
-            Limit = ABC_MIN( nTruePis, p->nWordsFrame * 32 - 1 );
-            for ( i = 0; i < Limit; i++ )
-                Aig_InfoXorBit( Ssw_ObjSim( p, Aig_ManPi(p->pAig, i)->Id ) + p->nWordsFrame*(p->nFrames-1), i+1 );
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Assings distance-1 simulation info for the PIs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlAssignDist1Plus( Ssw_Sml_t * p, unsigned * pPat )
-{
-    Aig_Obj_t * pObj;
-    int f, i, Limit;
-    assert( p->nFrames > 0 );
-
-    // copy the pattern into the primary inputs
-    Aig_ManForEachPi( p->pAig, pObj, i )
-        Ssw_SmlObjAssignConst( p, pObj, Aig_InfoHasBit(pPat, i), 0 );
-
-    // set distance one PIs for the first frame
-    Limit = ABC_MIN( Saig_ManPiNum(p->pAig), p->nWordsFrame * 32 - 1 );
-    for ( i = 0; i < Limit; i++ )
-        Aig_InfoXorBit( Ssw_ObjSim( p, Aig_ManPi(p->pAig, i)->Id ), i+1 );
-
-    // create random info for the remaining timeframes
-    for ( f = 1; f < p->nFrames; f++ )
-        Saig_ManForEachPi( p->pAig, pObj, i )
-            Ssw_SmlAssignRandomFrame( p, pObj, f );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlNodeSimulate( Ssw_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
-{
-    unsigned * pSims, * pSims0, * pSims1;
-    int fCompl, fCompl0, fCompl1, i;
-    assert( iFrame < p->nFrames );
-    assert( !Aig_IsComplement(pObj) );
-    assert( Aig_ObjIsNode(pObj) );
-    assert( iFrame == 0 || p->nWordsFrame < p->nWordsTotal );
-    // get hold of the simulation information
-    pSims  = Ssw_ObjSim(p, pObj->Id) + p->nWordsFrame * iFrame;
-    pSims0 = Ssw_ObjSim(p, Aig_ObjFanin0(pObj)->Id) + p->nWordsFrame * iFrame;
-    pSims1 = Ssw_ObjSim(p, Aig_ObjFanin1(pObj)->Id) + p->nWordsFrame * iFrame;
-    // get complemented attributes of the children using their random info
-    fCompl  = pObj->fPhase;
-    fCompl0 = Aig_ObjPhaseReal(Aig_ObjChild0(pObj));
-    fCompl1 = Aig_ObjPhaseReal(Aig_ObjChild1(pObj));
-    // simulate
-    if ( fCompl0 && fCompl1 )
-    {
-        if ( fCompl )
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = (pSims0[i] | pSims1[i]);
-        else
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = ~(pSims0[i] | pSims1[i]);
-    }
-    else if ( fCompl0 && !fCompl1 )
-    {
-        if ( fCompl )
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = (pSims0[i] | ~pSims1[i]);
-        else
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = (~pSims0[i] & pSims1[i]);
-    }
-    else if ( !fCompl0 && fCompl1 )
-    {
-        if ( fCompl )
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = (~pSims0[i] | pSims1[i]);
-        else
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = (pSims0[i] & ~pSims1[i]);
-    }
-    else // if ( !fCompl0 && !fCompl1 )
-    {
-        if ( fCompl )
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = ~(pSims0[i] & pSims1[i]);
-        else
-            for ( i = 0; i < p->nWordsFrame; i++ )
-                pSims[i] = (pSims0[i] & pSims1[i]);
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlNodesCompareInFrame( Ssw_Sml_t * p, Aig_Obj_t * pObj0, Aig_Obj_t * pObj1, int iFrame0, int iFrame1 )
-{
-    unsigned * pSims0, * pSims1;
-    int i;
-    assert( iFrame0 < p->nFrames );
-    assert( iFrame1 < p->nFrames );
-    assert( !Aig_IsComplement(pObj0) );
-    assert( !Aig_IsComplement(pObj1) );
-    assert( iFrame0 == 0 || p->nWordsFrame < p->nWordsTotal );
-    assert( iFrame1 == 0 || p->nWordsFrame < p->nWordsTotal );
-    // get hold of the simulation information
-    pSims0  = Ssw_ObjSim(p, pObj0->Id) + p->nWordsFrame * iFrame0;
-    pSims1  = Ssw_ObjSim(p, pObj1->Id) + p->nWordsFrame * iFrame1;
-    // compare
-    for ( i = 0; i < p->nWordsFrame; i++ )
-        if ( pSims0[i] != pSims1[i] )
-            return 0;
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlNodeCopyFanin( Ssw_Sml_t * p, Aig_Obj_t * pObj, int iFrame )
-{
-    unsigned * pSims, * pSims0;
-    int fCompl, fCompl0, i;
-    assert( iFrame < p->nFrames );
-    assert( !Aig_IsComplement(pObj) );
-    assert( Aig_ObjIsPo(pObj) );
-    assert( iFrame == 0 || p->nWordsFrame < p->nWordsTotal );
-    // get hold of the simulation information
-    pSims  = Ssw_ObjSim(p, pObj->Id) + p->nWordsFrame * iFrame;
-    pSims0 = Ssw_ObjSim(p, Aig_ObjFanin0(pObj)->Id) + p->nWordsFrame * iFrame;
-    // get complemented attributes of the children using their random info
-    fCompl  = pObj->fPhase;
-    fCompl0 = Aig_ObjPhaseReal(Aig_ObjChild0(pObj));
-    // copy information as it is
-    if ( fCompl0 )
-        for ( i = 0; i < p->nWordsFrame; i++ )
-            pSims[i] = ~pSims0[i];
-    else
-        for ( i = 0; i < p->nWordsFrame; i++ )
-            pSims[i] = pSims0[i];
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlNodeTransferNext( Ssw_Sml_t * p, Aig_Obj_t * pOut, Aig_Obj_t * pIn, int iFrame )
-{
-    unsigned * pSims0, * pSims1;
-    int i;
-    assert( iFrame < p->nFrames );
-    assert( !Aig_IsComplement(pOut) );
-    assert( !Aig_IsComplement(pIn) );
-    assert( Aig_ObjIsPo(pOut) );
-    assert( Aig_ObjIsPi(pIn) );
-    assert( iFrame == 0 || p->nWordsFrame < p->nWordsTotal );
-    // get hold of the simulation information
-    pSims0 = Ssw_ObjSim(p, pOut->Id) + p->nWordsFrame * iFrame;
-    pSims1 = Ssw_ObjSim(p, pIn->Id) + p->nWordsFrame * (iFrame+1);
-    // copy information as it is
-    for ( i = 0; i < p->nWordsFrame; i++ )
-        pSims1[i] = pSims0[i];
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates one node.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlNodeTransferFirst( Ssw_Sml_t * p, Aig_Obj_t * pOut, Aig_Obj_t * pIn )
-{
-    unsigned * pSims0, * pSims1;
-    int i;
-    assert( !Aig_IsComplement(pOut) );
-    assert( !Aig_IsComplement(pIn) );
-    assert( Aig_ObjIsPo(pOut) );
-    assert( Aig_ObjIsPi(pIn) );
-    assert( p->nWordsFrame < p->nWordsTotal );
-    // get hold of the simulation information
-    pSims0 = Ssw_ObjSim(p, pOut->Id) + p->nWordsFrame * (p->nFrames-1);
-    pSims1 = Ssw_ObjSim(p, pIn->Id);
-    // copy information as it is
-    for ( i = 0; i < p->nWordsFrame; i++ )
-        pSims1[i] = pSims0[i];
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Assings random simulation info for the PIs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlInitialize( Ssw_Sml_t * p, int fInit )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    if ( fInit )
-    {
-        assert( Aig_ManRegNum(p->pAig) > 0 );
-        assert( Aig_ManRegNum(p->pAig) <= Aig_ManPiNum(p->pAig) );
-        // assign random info for primary inputs
-        Saig_ManForEachPi( p->pAig, pObj, i )
-            Ssw_SmlAssignRandom( p, pObj );
-        // assign the initial state for the latches
-        Saig_ManForEachLo( p->pAig, pObj, i )
-            Ssw_SmlObjAssignConst( p, pObj, 0, 0 );
-    }
-    else
-    {
-        Aig_ManForEachPi( p->pAig, pObj, i )
-            Ssw_SmlAssignRandom( p, pObj );
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Assings random simulation info for the PIs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlInitializeSpecial( Ssw_Sml_t * p, Vec_Int_t * vInit )
-{
-    Aig_Obj_t * pObj;
-    int Entry, i, nRegs;
-    nRegs = Aig_ManRegNum(p->pAig);
-    assert( nRegs > 0 );
-    assert( nRegs <= Aig_ManPiNum(p->pAig) );
-    assert( Vec_IntSize(vInit) == nRegs * p->nWordsFrame );
-    // assign random info for primary inputs
-    Saig_ManForEachPi( p->pAig, pObj, i )
-        Ssw_SmlAssignRandom( p, pObj );
-    // assign the initial state for the latches
-    Vec_IntForEachEntry( vInit, Entry, i )
-        Ssw_SmlObjAssignConstWord( p, Saig_ManLo(p->pAig, i % nRegs), Entry, 0, i / nRegs );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Assings random simulation info for the PIs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlReinitialize( Ssw_Sml_t * p )
-{
-    Aig_Obj_t * pObj, * pObjLi, * pObjLo;
-    int i;
-    assert( Aig_ManRegNum(p->pAig) > 0 );
-    assert( Aig_ManRegNum(p->pAig) < Aig_ManPiNum(p->pAig) );
-    // assign random info for primary inputs
-    Saig_ManForEachPi( p->pAig, pObj, i )
-        Ssw_SmlAssignRandom( p, pObj );
-    // copy simulation info into the inputs
-    Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-        Ssw_SmlNodeTransferFirst( p, pObjLi, pObjLo );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Check if any of the POs becomes non-constant.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlCheckNonConstOutputs( Ssw_Sml_t * p )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    Saig_ManForEachPo( p->pAig, pObj, i )
-    {
-        if ( p->pAig->nConstrs && i >= Saig_ManPoNum(p->pAig) - p->pAig->nConstrs )
-            return 0;
-        if ( !Ssw_SmlNodeIsZero(p, pObj) )
-            return 1;
-    }
-    return 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates AIG manager.]
-
-  Description [Assumes that the PI simulation info is attached.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlSimulateOne( Ssw_Sml_t * p )
-{
-    Aig_Obj_t * pObj, * pObjLi, * pObjLo;
-    int f, i, clk;
-clk = clock();
-    for ( f = 0; f < p->nFrames; f++ )
-    {
-        // simulate the nodes
-        Aig_ManForEachNode( p->pAig, pObj, i )
-            Ssw_SmlNodeSimulate( p, pObj, f );
-        // copy simulation info into outputs
-        Saig_ManForEachPo( p->pAig, pObj, i )
-            Ssw_SmlNodeCopyFanin( p, pObj, f );
-        // copy simulation info into outputs
-        Saig_ManForEachLi( p->pAig, pObj, i )
-            Ssw_SmlNodeCopyFanin( p, pObj, f );
-        // quit if this is the last timeframe
-        if ( f == p->nFrames - 1 )
-            break;
-        // copy simulation info into the inputs
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-            Ssw_SmlNodeTransferNext( p, pObjLi, pObjLo, f );
-    }
-p->timeSim += clock() - clk;
-p->nSimRounds++;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Converts simulation information to be not normallized.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlUnnormalize( Ssw_Sml_t * p )
-{
-    Aig_Obj_t * pObj;
-    unsigned * pSims;
-    int i, k;
-    // convert constant 1
-    pSims  = Ssw_ObjSim( p, 0 );
-    for ( i = 0; i < p->nWordsFrame; i++ )
-        pSims[i] = ~pSims[i];
-    // convert internal nodes
-    Aig_ManForEachNode( p->pAig, pObj, k )
-    {
-        if ( pObj->fPhase == 0 )
-            continue;
-        pSims  = Ssw_ObjSim( p, pObj->Id );
-        for ( i = 0; i < p->nWordsFrame; i++ )
-            pSims[i] = ~pSims[i];
-    }
-    // PIs/POs are always stored in their natural state
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates AIG manager.]
-
-  Description [Assumes that the PI simulation info is attached.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlSimulateOneDyn_rec( Ssw_Sml_t * p, Aig_Obj_t * pObj, int f, int * pVisited, int nVisCounter )
-{
-//    if ( Aig_ObjIsTravIdCurrent(p->pAig, pObj) )
-//        return;
-//    Aig_ObjSetTravIdCurrent(p->pAig, pObj);
-    if ( pVisited[p->nFrames*pObj->Id+f] == nVisCounter )
-        return;
-    pVisited[p->nFrames*pObj->Id+f] = nVisCounter;
-    if ( Saig_ObjIsPi( p->pAig, pObj ) || Aig_ObjIsConst1(pObj) )
-        return;
-    if ( Saig_ObjIsLo( p->pAig, pObj ) )
-    {
-        if ( f == 0 )
-            return;
-        Ssw_SmlSimulateOneDyn_rec( p, Saig_ObjLoToLi(p->pAig, pObj), f-1, pVisited, nVisCounter );
-        Ssw_SmlNodeTransferNext( p, Saig_ObjLoToLi(p->pAig, pObj), pObj, f-1 );
-        return;
-    }
-    if ( Saig_ObjIsLi( p->pAig, pObj ) )
-    {
-        Ssw_SmlSimulateOneDyn_rec( p, Aig_ObjFanin0(pObj), f, pVisited, nVisCounter );
-        Ssw_SmlNodeCopyFanin( p, pObj, f );
-        return;
-    }
-    assert( Aig_ObjIsNode(pObj) );
-    Ssw_SmlSimulateOneDyn_rec( p, Aig_ObjFanin0(pObj), f, pVisited, nVisCounter );
-    Ssw_SmlSimulateOneDyn_rec( p, Aig_ObjFanin1(pObj), f, pVisited, nVisCounter );
-    Ssw_SmlNodeSimulate( p, pObj, f );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Simulates AIG manager.]
-
-  Description [Assumes that the PI simulation info is attached.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlSimulateOneFrame( Ssw_Sml_t * p )
-{
-    Aig_Obj_t * pObj, * pObjLi, * pObjLo;
-    int i, clk;
-clk = clock();
-    // simulate the nodes
-    Aig_ManForEachNode( p->pAig, pObj, i )
-        Ssw_SmlNodeSimulate( p, pObj, 0 );
-    // copy simulation info into outputs
-    Saig_ManForEachLi( p->pAig, pObj, i )
-        Ssw_SmlNodeCopyFanin( p, pObj, 0 );
-    // copy simulation info into the inputs
-    Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-        Ssw_SmlNodeTransferNext( p, pObjLi, pObjLo, 0 );
-p->timeSim += clock() - clk;
-p->nSimRounds++;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates simulation manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Sml_t * Ssw_SmlStart( Aig_Man_t * pAig, int nPref, int nFrames, int nWordsFrame )
-{
-    Ssw_Sml_t * p;
-    p = (Ssw_Sml_t *)ABC_ALLOC( char, sizeof(Ssw_Sml_t) + sizeof(unsigned) * Aig_ManObjNumMax(pAig) * (nPref + nFrames) * nWordsFrame );
-    memset( p, 0, sizeof(Ssw_Sml_t) + sizeof(unsigned) * (nPref + nFrames) * nWordsFrame );
-    p->pAig        = pAig;
-    p->nPref       = nPref;
-    p->nFrames     = nPref + nFrames;
-    p->nWordsFrame = nWordsFrame;
-    p->nWordsTotal = (nPref + nFrames) * nWordsFrame;
-    p->nWordsPref  = nPref * nWordsFrame;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Allocates simulation manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlClean( Ssw_Sml_t * p )
-{
-    memset( p->pData, 0, sizeof(unsigned) * Aig_ManObjNumMax(p->pAig) * p->nWordsTotal );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Get simulation data.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Vec_Ptr_t * Ssw_SmlSimDataPointers( Ssw_Sml_t * p )
-{
-    Vec_Ptr_t * vSimInfo;
-    Aig_Obj_t * pObj;
-    int i;
-    vSimInfo = Vec_PtrStart( Aig_ManObjNumMax(p->pAig) );
-    Aig_ManForEachObj( p->pAig, pObj, i )
-        Vec_PtrWriteEntry( vSimInfo, i, Ssw_ObjSim(p, i) );
-    return vSimInfo;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Deallocates simulation manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlStop( Ssw_Sml_t * p )
-{
-    ABC_FREE( p );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs simulation of the uninitialized circuit.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Sml_t * Ssw_SmlSimulateComb( Aig_Man_t * pAig, int nWords )
-{
-    Ssw_Sml_t * p;
-    p = Ssw_SmlStart( pAig, 0, 1, nWords );
-    Ssw_SmlInitialize( p, 0 );
-    Ssw_SmlSimulateOne( p );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs simulation of the initialized circuit.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Ssw_Sml_t * Ssw_SmlSimulateSeq( Aig_Man_t * pAig, int nPref, int nFrames, int nWords )
-{
-    Ssw_Sml_t * p;
-    p = Ssw_SmlStart( pAig, nPref, nFrames, nWords );
-    Ssw_SmlInitialize( p, 1 );
-    Ssw_SmlSimulateOne( p );
-    p->fNonConstOut = Ssw_SmlCheckNonConstOutputs( p );
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs next round of sequential simulation.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlResimulateSeq( Ssw_Sml_t * p )
-{
-    Ssw_SmlReinitialize( p );
-    Ssw_SmlSimulateOne( p );
-    p->fNonConstOut = Ssw_SmlCheckNonConstOutputs( p );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the number of frames simulated in the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlNumFrames( Ssw_Sml_t * p )
-{
-    return p->nFrames;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the total number of simulation words.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_SmlNumWordsTotal( Ssw_Sml_t * p )
-{
-    return p->nWordsTotal;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the pointer to the simulation info of the node.]
-
-  Description [The simulation info is normalized unless procedure
-  Ssw_SmlUnnormalize() is called in advance.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-unsigned * Ssw_SmlSimInfo( Ssw_Sml_t * p, Aig_Obj_t * pObj )
-{
-    assert( !Aig_IsComplement(pObj) );
-    return Ssw_ObjSim( p, pObj->Id );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates sequential counter-example from the simulation info.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Abc_Cex_t * Ssw_SmlGetCounterExample( Ssw_Sml_t * p )
-{
-    Abc_Cex_t * pCex;
-    Aig_Obj_t * pObj;
-    unsigned * pSims;
-    int iPo, iFrame, iBit, i, k;
-
-    // make sure the simulation manager has it
-    assert( p->fNonConstOut );
-
-    // find the first output that failed
-    iPo = -1;
-    iBit = -1;
-    iFrame = -1;
-    Saig_ManForEachPo( p->pAig, pObj, iPo )
-    {
-        if ( Ssw_SmlNodeIsZero(p, pObj) )
-            continue;
-        pSims = Ssw_ObjSim( p, pObj->Id );
-        for ( i = p->nWordsPref; i < p->nWordsTotal; i++ )
-            if ( pSims[i] )
-            {
-                iFrame = i / p->nWordsFrame;
-                iBit = 32 * (i % p->nWordsFrame) + Aig_WordFindFirstBit( pSims[i] );
-                break;
-            }
-        break;
-    }
-    assert( iPo < Aig_ManPoNum(p->pAig)-Aig_ManRegNum(p->pAig) );
-    assert( iFrame < p->nFrames );
-    assert( iBit < 32 * p->nWordsFrame );
-
-    // allocate the counter example
-    pCex = Abc_CexAlloc( Aig_ManRegNum(p->pAig), Aig_ManPiNum(p->pAig) - Aig_ManRegNum(p->pAig), iFrame + 1 );
-    pCex->iPo    = iPo;
-    pCex->iFrame = iFrame;
-
-    // copy the bit data
-    Saig_ManForEachLo( p->pAig, pObj, k )
-    {
-        pSims = Ssw_ObjSim( p, pObj->Id );
-        if ( Aig_InfoHasBit( pSims, iBit ) )
-            Aig_InfoSetBit( pCex->pData, k );
-    }
-    for ( i = 0; i <= iFrame; i++ )
-    {
-        Saig_ManForEachPi( p->pAig, pObj, k )
-        {
-            pSims = Ssw_ObjSim( p, pObj->Id );
-            if ( Aig_InfoHasBit( pSims, 32 * p->nWordsFrame * i + iBit ) )
-                Aig_InfoSetBit( pCex->pData, pCex->nRegs + pCex->nPis * i + k );
-        }
-    }
-    // verify the counter example
-    if ( !Saig_ManVerifyCex( p->pAig, pCex ) )
-    {
-        printf( "Ssw_SmlGetCounterExample(): Counter-example is invalid.\n" );
-        Abc_CexFree( pCex );
-        pCex = NULL;
-    }
-    return pCex;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswSimSat.c b/src/aig/ssw/sswSimSat.c
deleted file mode 100644
index 6b18a3a6..00000000
--- a/src/aig/ssw/sswSimSat.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswSimSat.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [Performs resimulation using counter-examples.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswSimSat.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Handle the counter-example.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManResimulateBit( Ssw_Man_t * p, Aig_Obj_t * pCand, Aig_Obj_t * pRepr )
-{
-    Aig_Obj_t * pObj;
-    int i, RetValue1, RetValue2, clk = clock();
-    // set the PI simulation information
-    Aig_ManConst1(p->pAig)->fMarkB = 1;
-    Aig_ManForEachPi( p->pAig, pObj, i )
-        pObj->fMarkB = Aig_InfoHasBit( p->pPatWords, i );
-    // simulate internal nodes
-    Aig_ManForEachNode( p->pAig, pObj, i )
-        pObj->fMarkB = ( Aig_ObjFanin0(pObj)->fMarkB ^ Aig_ObjFaninC0(pObj) )
-                     & ( Aig_ObjFanin1(pObj)->fMarkB ^ Aig_ObjFaninC1(pObj) );
-    // if repr is given, perform refinement
-    if ( pRepr )
-    {
-        // check equivalence classes
-        RetValue1 = Ssw_ClassesRefineConst1( p->ppClasses, 0 );
-        RetValue2 = Ssw_ClassesRefine( p->ppClasses, 0 );
-        // make sure refinement happened
-        if ( Aig_ObjIsConst1(pRepr) ) 
-        {
-            assert( RetValue1 );
-            if ( RetValue1 == 0 )
-                printf( "\nSsw_ManResimulateBit() Error: RetValue1 does not hold.\n" );
-        }
-        else
-        {
-            assert( RetValue2 );
-            if ( RetValue2 == 0 )
-                printf( "\nSsw_ManResimulateBit() Error: RetValue2 does not hold.\n" );
-        }
-    }
-p->timeSimSat += clock() - clk;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Handle the counter-example.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManResimulateWord( Ssw_Man_t * p, Aig_Obj_t * pCand, Aig_Obj_t * pRepr, int f )
-{
-    int RetValue1, RetValue2, clk = clock();
-    // set the PI simulation information
-    Ssw_SmlAssignDist1Plus( p->pSml, p->pPatWords );
-    // simulate internal nodes
-    Ssw_SmlSimulateOne( p->pSml );
-    // check equivalence classes
-    RetValue1 = Ssw_ClassesRefineConst1( p->ppClasses, 1 );
-    RetValue2 = Ssw_ClassesRefine( p->ppClasses, 1 );
-    // make sure refinement happened
-    if ( Aig_ObjIsConst1(pRepr) )
-    {
-        assert( RetValue1 );
-        if ( RetValue1 == 0 )
-            printf( "\nSsw_ManResimulateWord() Error: RetValue1 does not hold.\n" );
-    }
-    else
-    {
-        assert( RetValue2 );
-        if ( RetValue2 == 0 )
-            printf( "\nSsw_ManResimulateWord() Error: RetValue2 does not hold.\n" );
-    }
-p->timeSimSat += clock() - clk;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswSweep.c b/src/aig/ssw/sswSweep.c
deleted file mode 100644
index edae0846..00000000
--- a/src/aig/ssw/sswSweep.c
+++ /dev/null
@@ -1,435 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswSweep.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [One round of SAT sweeping.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswSweep.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-#include "bar.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Retrives value of the PI in the original AIG.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManGetSatVarValue( Ssw_Man_t * p, Aig_Obj_t * pObj, int f )
-{
-    int fUseNoBoundary = 0;
-    Aig_Obj_t * pObjFraig;
-    int Value;
-//    assert( Aig_ObjIsPi(pObj) );
-    pObjFraig = Ssw_ObjFrame( p, pObj, f );
-    if ( fUseNoBoundary )
-    {
-        Value = Ssw_CnfGetNodeValue( p->pMSat, Aig_Regular(pObjFraig) );
-        Value ^= Aig_IsComplement(pObjFraig);
-    }
-    else
-    {
-        int nVarNum = Ssw_ObjSatNum( p->pMSat, Aig_Regular(pObjFraig) );
-        Value = (!nVarNum)? 0 : (Aig_IsComplement(pObjFraig) ^ sat_solver_var_value( p->pMSat->pSat, nVarNum ));
-    }
-
-//    Value = (Aig_IsComplement(pObjFraig) ^ ((!nVarNum)? 0 : sat_solver_var_value( p->pSat, nVarNum )));
-//    Value = (!nVarNum)? Aig_ManRandom(0) & 1 : (Aig_IsComplement(pObjFraig) ^ sat_solver_var_value( p->pSat, nVarNum ));
-    if ( p->pPars->fPolarFlip )
-    {
-        if ( Aig_Regular(pObjFraig)->fPhase )  Value ^= 1;
-    }
-    return Value;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for the internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_CheckConstraints( Ssw_Man_t * p )
-{
-    Aig_Obj_t * pObj, * pObj2;
-    int nConstrPairs, i;
-    int Counter = 0;
-    nConstrPairs = Aig_ManPoNum(p->pFrames)-Aig_ManRegNum(p->pAig);
-    assert( (nConstrPairs & 1) == 0 );
-    for ( i = 0; i < nConstrPairs; i += 2 )
-    {
-        pObj  = Aig_ManPo( p->pFrames, i   );
-        pObj2 = Aig_ManPo( p->pFrames, i+1 );
-        if ( Ssw_NodesAreEquiv( p, Aig_ObjFanin0(pObj), Aig_ObjFanin0(pObj2) ) != 1 )
-        {
-            Ssw_NodesAreConstrained( p, Aig_ObjChild0(pObj), Aig_ObjChild0(pObj2) );
-            Counter++;
-        }
-    }
-    printf( "Total constraints = %d. Added constraints = %d.\n", nConstrPairs/2, Counter );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Copy pattern from the solver into the internal storage.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlSavePatternAigPhase( Ssw_Man_t * p, int f )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    memset( p->pPatWords, 0, sizeof(unsigned) * p->nPatWords );
-    Aig_ManForEachPi( p->pAig, pObj, i )
-        if ( Aig_ObjPhaseReal( Ssw_ObjFrame(p, pObj, f) ) )
-            Aig_InfoSetBit( p->pPatWords, i );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Copy pattern from the solver into the internal storage.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlSavePatternAig( Ssw_Man_t * p, int f )
-{
-    Aig_Obj_t * pObj;
-    int i;
-    memset( p->pPatWords, 0, sizeof(unsigned) * p->nPatWords );
-    Aig_ManForEachPi( p->pAig, pObj, i )
-        if ( Ssw_ManGetSatVarValue( p, pObj, f ) )
-            Aig_InfoSetBit( p->pPatWords, i );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Saves one counter-example into internal storage.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_SmlAddPatternDyn( Ssw_Man_t * p )
-{
-    Aig_Obj_t * pObj;
-    unsigned * pInfo;
-    int i, nVarNum;
-    // iterate through the PIs of the frames
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->pMSat->vUsedPis, pObj, i )
-    {
-        assert( Aig_ObjIsPi(pObj) );
-        nVarNum = Ssw_ObjSatNum( p->pMSat, pObj );
-        assert( nVarNum > 0 );
-        if ( sat_solver_var_value( p->pMSat->pSat, nVarNum ) )
-        {
-            pInfo = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjPioNum(pObj) );
-            Aig_InfoSetBit( pInfo, p->nPatterns );
-        }
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for one node.]
-
-  Description [Returns the fraiged node.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweepNode( Ssw_Man_t * p, Aig_Obj_t * pObj, int f, int fBmc, Vec_Int_t * vPairs )
-{ 
-    Aig_Obj_t * pObjRepr, * pObjFraig, * pObjFraig2, * pObjReprFraig;
-    int RetValue, clk;
-    // get representative of this class
-    pObjRepr = Aig_ObjRepr( p->pAig, pObj );
-    if ( pObjRepr == NULL )
-        return 0;
-    // get the fraiged node
-    pObjFraig = Ssw_ObjFrame( p, pObj, f );
-    // get the fraiged representative
-    pObjReprFraig = Ssw_ObjFrame( p, pObjRepr, f );
-    // check if constant 0 pattern distinquishes these nodes
-    assert( pObjFraig != NULL && pObjReprFraig != NULL );
-    assert( (pObj->fPhase == pObjRepr->fPhase) == (Aig_ObjPhaseReal(pObjFraig) == Aig_ObjPhaseReal(pObjReprFraig)) );
-    // if the fraiged nodes are the same, return
-    if ( Aig_Regular(pObjFraig) == Aig_Regular(pObjReprFraig) )
-        return 0; 
-    // add constraints on demand
-    if ( !fBmc && p->pPars->fDynamic )
-    {
-clk = clock();
-        Ssw_ManLoadSolver( p, pObjRepr, pObj );
-        p->nRecycleCalls++;
-p->timeMarkCones += clock() - clk;
-    }
-    // call equivalence checking
-    if ( Aig_Regular(pObjFraig) != Aig_ManConst1(p->pFrames) )
-        RetValue = Ssw_NodesAreEquiv( p, Aig_Regular(pObjReprFraig), Aig_Regular(pObjFraig) );
-    else
-        RetValue = Ssw_NodesAreEquiv( p, Aig_Regular(pObjFraig), Aig_Regular(pObjReprFraig) );
-    if ( RetValue == 1 )  // proved equivalent
-    {
-        pObjFraig2 = Aig_NotCond( pObjReprFraig, pObj->fPhase ^ pObjRepr->fPhase );
-        Ssw_ObjSetFrame( p, pObj, f, pObjFraig2 );
-        return 0;
-    }
-    if ( vPairs )
-    {
-        Vec_IntPush( vPairs, pObjRepr->Id );
-        Vec_IntPush( vPairs, pObj->Id );
-    }
-    if ( RetValue == -1 ) // timed out
-    {
-        Ssw_ClassesRemoveNode( p->ppClasses, pObj );
-        return 1;
-    }
-    // disproved the equivalence
-    if ( !fBmc && p->pPars->fDynamic )
-    {
-        Ssw_SmlAddPatternDyn( p );
-        p->nPatterns++;
-        return 1;
-    }
-    else
-        Ssw_SmlSavePatternAig( p, f );
-    if ( !p->pPars->fConstrs )
-        Ssw_ManResimulateWord( p, pObj, pObjRepr, f );
-    else
-        Ssw_ManResimulateBit( p, pObj, pObjRepr );
-    assert( Aig_ObjRepr( p->pAig, pObj ) != pObjRepr );
-    if ( Aig_ObjRepr( p->pAig, pObj ) == pObjRepr )
-    {
-        printf( "Ssw_ManSweepNode(): Failed to refine representative.\n" );
-    }
-    return 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for the internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweepBmc( Ssw_Man_t * p )
-{
-    Bar_Progress_t * pProgress = NULL;
-    Aig_Obj_t * pObj, * pObjNew, * pObjLi, * pObjLo;
-    int i, f, clk;
-clk = clock();
-
-    // start initialized timeframes
-    p->pFrames = Aig_ManStart( Aig_ManObjNumMax(p->pAig) * p->pPars->nFramesK );
-    Saig_ManForEachLo( p->pAig, pObj, i )
-        Ssw_ObjSetFrame( p, pObj, 0, Aig_ManConst0(p->pFrames) );
-
-    // sweep internal nodes
-    p->fRefined = 0;
-    if ( p->pPars->fVerbose )
-        pProgress = Bar_ProgressStart( stdout, Aig_ManObjNumMax(p->pAig) * p->pPars->nFramesK );
-    for ( f = 0; f < p->pPars->nFramesK; f++ )
-    {
-        // map constants and PIs
-        Ssw_ObjSetFrame( p, Aig_ManConst1(p->pAig), f, Aig_ManConst1(p->pFrames) );
-        Saig_ManForEachPi( p->pAig, pObj, i )
-            Ssw_ObjSetFrame( p, pObj, f, Aig_ObjCreatePi(p->pFrames) );
-        // sweep internal nodes
-        Aig_ManForEachNode( p->pAig, pObj, i )
-        {
-            if ( p->pPars->fVerbose )
-                Bar_ProgressUpdate( pProgress, Aig_ManObjNumMax(p->pAig) * f + i, NULL );
-            pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) );
-            Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-            p->fRefined |= Ssw_ManSweepNode( p, pObj, f, 1, NULL );
-        }
-        // quit if this is the last timeframe
-        if ( f == p->pPars->nFramesK - 1 )
-            break;
-        // transfer latch input to the latch outputs 
-        Aig_ManForEachPo( p->pAig, pObj, i )
-            Ssw_ObjSetFrame( p, pObj, f, Ssw_ObjChild0Fra(p, pObj, f) );
-        // build logic cones for register outputs
-        Saig_ManForEachLiLo( p->pAig, pObjLi, pObjLo, i )
-        {
-            pObjNew = Ssw_ObjFrame( p, pObjLi, f );
-            Ssw_ObjSetFrame( p, pObjLo, f+1, pObjNew );
-            Ssw_CnfNodeAddToSolver( p->pMSat, Aig_Regular(pObjNew) );//
-        }
-    }
-    if ( p->pPars->fVerbose )
-        Bar_ProgressStop( pProgress );
-
-    // cleanup
-//    Ssw_ClassesCheck( p->ppClasses );
-p->timeBmc += clock() - clk;
-    return p->fRefined;
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Generates AIG with the following nodes put into seq miters.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_ManDumpEquivMiter( Aig_Man_t * p, Vec_Int_t * vPairs, int Num )
-{
-    FILE * pFile;
-    char pBuffer[16];
-    Aig_Man_t * pNew;
-    sprintf( pBuffer, "equiv%03d.aig", Num );
-    pFile = fopen( pBuffer, "w" );
-    if ( pFile == NULL )
-    {
-        printf( "Cannot open file %s for writing.\n", pBuffer );
-        return;
-    }
-    fclose( pFile );
-    pNew = Saig_ManCreateEquivMiter( p, vPairs );
-    Ioa_WriteAiger( pNew, pBuffer, 0, 0 );
-    Aig_ManStop( pNew );
-    printf( "AIG with %4d disproved equivs is dumped into file \"%s\".\n", Vec_IntSize(vPairs)/2, pBuffer );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Performs fraiging for the internal nodes.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManSweep( Ssw_Man_t * p )
-{ 
-    static int Counter;
-    Bar_Progress_t * pProgress = NULL;
-    Aig_Obj_t * pObj, * pObj2, * pObjNew;
-    int nConstrPairs, clk, i, f;
-    Vec_Int_t * vDisproved;
-
-    // perform speculative reduction
-clk = clock();
-    // create timeframes
-    p->pFrames = Ssw_FramesWithClasses( p );
-    // add constants
-    nConstrPairs = Aig_ManPoNum(p->pFrames)-Aig_ManRegNum(p->pAig);
-    assert( (nConstrPairs & 1) == 0 );
-    for ( i = 0; i < nConstrPairs; i += 2 )
-    {
-        pObj  = Aig_ManPo( p->pFrames, i   );
-        pObj2 = Aig_ManPo( p->pFrames, i+1 );
-        Ssw_NodesAreConstrained( p, Aig_ObjChild0(pObj), Aig_ObjChild0(pObj2) );
-    }
-    // build logic cones for register inputs
-    for ( i = 0; i < Aig_ManRegNum(p->pAig); i++ )
-    {
-        pObj  = Aig_ManPo( p->pFrames, nConstrPairs + i );
-        Ssw_CnfNodeAddToSolver( p->pMSat, Aig_ObjFanin0(pObj) );//
-    }
-    sat_solver_simplify( p->pMSat->pSat );
-
-    // map constants and PIs of the last frame
-    f = p->pPars->nFramesK;
-    Ssw_ObjSetFrame( p, Aig_ManConst1(p->pAig), f, Aig_ManConst1(p->pFrames) );
-    Saig_ManForEachPi( p->pAig, pObj, i )
-        Ssw_ObjSetFrame( p, pObj, f, Aig_ObjCreatePi(p->pFrames) );
-p->timeReduce += clock() - clk;
-
-    // sweep internal nodes
-    p->fRefined = 0;
-    Ssw_ClassesClearRefined( p->ppClasses );
-    if ( p->pPars->fVerbose )
-        pProgress = Bar_ProgressStart( stdout, Aig_ManObjNumMax(p->pAig) );
-    vDisproved = p->pPars->fEquivDump? Vec_IntAlloc(1000) : NULL;
-    Aig_ManForEachObj( p->pAig, pObj, i )
-    {
-        if ( p->pPars->fVerbose )
-            Bar_ProgressUpdate( pProgress, i, NULL );
-        if ( Saig_ObjIsLo(p->pAig, pObj) )
-            p->fRefined |= Ssw_ManSweepNode( p, pObj, f, 0, vDisproved );
-        else if ( Aig_ObjIsNode(pObj) )
-        { 
-            pObjNew = Aig_And( p->pFrames, Ssw_ObjChild0Fra(p, pObj, f), Ssw_ObjChild1Fra(p, pObj, f) );
-            Ssw_ObjSetFrame( p, pObj, f, pObjNew );
-            p->fRefined |= Ssw_ManSweepNode( p, pObj, f, 0, vDisproved );
-        }
-    }
-    if ( p->pPars->fVerbose )
-        Bar_ProgressStop( pProgress );
-
-    // cleanup
-//    Ssw_ClassesCheck( p->ppClasses );
-    if ( p->pPars->fEquivDump )
-        Ssw_ManDumpEquivMiter( p->pAig, vDisproved, Counter++ );
-    Vec_IntFreeP( &vDisproved );
-    return p->fRefined;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/ssw/sswUnique.c b/src/aig/ssw/sswUnique.c
deleted file mode 100644
index b5f6a853..00000000
--- a/src/aig/ssw/sswUnique.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [sswSat.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [Inductive prover with constraints.]
-
-  Synopsis    [On-demand uniqueness constraints.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - September 1, 2008.]
-
-  Revision    [$Id: sswSat.c,v 1.00 2008/09/01 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include "sswInt.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Performs computation of signal correspondence with constraints.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Ssw_UniqueRegisterPairInfo( Ssw_Man_t * p )
-{
-    Aig_Obj_t * pObjLo, * pObj0, * pObj1;
-    int i, RetValue, Counter;
-    if ( p->vDiffPairs == NULL )
-        p->vDiffPairs = Vec_IntAlloc( Saig_ManRegNum(p->pAig) );
-    Vec_IntClear( p->vDiffPairs );
-    Saig_ManForEachLo( p->pAig, pObjLo, i )
-    {
-        pObj0 = Ssw_ObjFrame( p, pObjLo, 0 );
-        pObj1 = Ssw_ObjFrame( p, pObjLo, 1 );
-        if ( pObj0 == pObj1 )
-            Vec_IntPush( p->vDiffPairs, 0 );
-        else if ( pObj0 == Aig_Not(pObj1) )
-            Vec_IntPush( p->vDiffPairs, 1 );
-//        else
-//            Vec_IntPush( p->vDiffPairs, 1 );
-        else if ( Aig_ObjPhaseReal(pObj0) != Aig_ObjPhaseReal(pObj1) )
-            Vec_IntPush( p->vDiffPairs, 1 );
-        else 
-        {
-            RetValue = Ssw_NodesAreEquiv( p, Aig_Regular(pObj0), Aig_Regular(pObj1) );
-            Vec_IntPush( p->vDiffPairs, RetValue!=1 );
-        }
-    }
-    assert( Vec_IntSize(p->vDiffPairs) == Saig_ManRegNum(p->pAig) );
-    // count the number of ones
-    Counter = 0;
-    Vec_IntForEachEntry( p->vDiffPairs, RetValue, i )
-        Counter += RetValue;
-//    printf( "The number of different register pairs = %d.\n", Counter );
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns 1 if uniqueness constraints can be added.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManUniqueOne( Ssw_Man_t * p, Aig_Obj_t * pRepr, Aig_Obj_t * pObj, int fVerbose )
-{
-    Aig_Obj_t * ppObjs[2], * pTemp;
-    int i, k, Value0, Value1, RetValue, fFeasible;
-
-    assert( p->pPars->nFramesK > 1 );
-    assert( p->vDiffPairs && Vec_IntSize(p->vDiffPairs) == Saig_ManRegNum(p->pAig) );
-
-    // compute the first support in terms of LOs
-    ppObjs[0] = pRepr; 
-    ppObjs[1] = pObj;
-    Aig_SupportNodes( p->pAig, ppObjs, 2, p->vCommon );
-    // keep only LOs
-    RetValue = Vec_PtrSize( p->vCommon );
-    fFeasible = 0;
-    k = 0;
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vCommon, pTemp, i )
-    {
-        assert( Aig_ObjIsPi(pTemp) );
-        if ( !Saig_ObjIsLo(p->pAig, pTemp) )
-            continue;
-        assert( Aig_ObjPioNum(pTemp) > 0 );
-        Vec_PtrWriteEntry( p->vCommon, k++, pTemp );
-        if ( Vec_IntEntry(p->vDiffPairs, Aig_ObjPioNum(pTemp) - Saig_ManPiNum(p->pAig)) )
-            fFeasible = 1;
-    }
-    Vec_PtrShrink( p->vCommon, k );
-
-    if ( fVerbose )
-        printf( "Node = %5d : Supp = %3d. Regs = %3d. Feasible = %s. ",
-            Aig_ObjId(pObj), RetValue, Vec_PtrSize(p->vCommon),
-            fFeasible? "yes": "no " );
-
-    // check the current values
-    RetValue = 1;
-    Vec_PtrForEachEntry( Aig_Obj_t *, p->vCommon, pTemp, i )
-    {
-        Value0 = Ssw_ManGetSatVarValue( p, pTemp, 0 );
-        Value1 = Ssw_ManGetSatVarValue( p, pTemp, 1 );
-        if ( Value0 != Value1 )
-            RetValue = 0;
-        if ( fVerbose )
-            printf( "%d", Value0 ^ Value1 );
-    }
-    if ( fVerbose )
-        printf( "\n" );
-
-    return RetValue && fFeasible;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the output of the uniqueness constraint.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Ssw_ManUniqueAddConstraint( Ssw_Man_t * p, Vec_Ptr_t * vCommon, int f1, int f2 )
-{
-    Aig_Obj_t * pObj, * pObj1New, * pObj2New, * pMiter, * pTotal;
-    int i, pLits[2];
-//    int RetValue;
-    assert( Vec_PtrSize(vCommon) > 0 );
-    // generate the constraint
-    pTotal = Aig_ManConst0(p->pFrames);
-    Vec_PtrForEachEntry( Aig_Obj_t *, vCommon, pObj, i )
-    {
-        assert( Saig_ObjIsLo(p->pAig, pObj) );
-        pObj1New = Ssw_ObjFrame( p, pObj, f1 );
-        pObj2New = Ssw_ObjFrame( p, pObj, f2 );
-        pMiter = Aig_Exor( p->pFrames, pObj1New, pObj2New );
-        pTotal = Aig_Or( p->pFrames, pTotal, pMiter );
-    }
-    if ( Aig_ObjIsConst1(Aig_Regular(pTotal)) )
-    {
-//        printf( "Skipped\n" );
-        return 0;
-    }
-    // create CNF
-    Ssw_CnfNodeAddToSolver( p->pMSat, Aig_Regular(pTotal) );
-    // add output constraint
-    pLits[0] = toLitCond( Ssw_ObjSatNum(p->pMSat,Aig_Regular(pTotal)), Aig_IsComplement(pTotal) );
-/*
-    RetValue = sat_solver_addclause( p->pSat, pLits, pLits + 1 );
-    assert( RetValue );
-    // simplify the solver
-    if ( p->pSat->qtail != p->pSat->qhead )
-    {
-        RetValue = sat_solver_simplify(p->pSat);
-        assert( RetValue != 0 );
-    }
-*/
-    assert( p->iOutputLit == -1 );
-    p->iOutputLit = pLits[0];
-    return 1;
-}
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/tim/module.make b/src/aig/tim/module.make
deleted file mode 100644
index 81079346..00000000
--- a/src/aig/tim/module.make
+++ /dev/null
@@ -1 +0,0 @@
-SRC +=    src/aig/tim/tim.c
diff --git a/src/aig/tim/tim.c b/src/aig/tim/tim.c
deleted file mode 100644
index 6b7e310c..00000000
--- a/src/aig/tim/tim.c
+++ /dev/null
@@ -1,996 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [tim.c]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [A timing manager.]
-
-  Synopsis    [Representation of timing information.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: tim.c,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-#include <time.h>
-
-#include "vec.h"
-#include "mem.h"
-#include "tim.h"
-
-ABC_NAMESPACE_IMPL_START
-
-
-////////////////////////////////////////////////////////////////////////
-///                        DECLARATIONS                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Tim_Box_t_           Tim_Box_t;
-typedef struct Tim_Obj_t_           Tim_Obj_t;
-
-// timing manager
-struct Tim_Man_t_
-{
-    Vec_Ptr_t *      vBoxes;         // the timing boxes
-    Vec_Ptr_t *      vDelayTables;   // pointers to the delay tables
-    Mem_Flex_t *     pMemObj;        // memory manager for boxes
-    int              nTravIds;       // traversal ID of the manager
-    int              fUseTravId;     // enables the use of traversal ID
-    int              nCis;           // the number of PIs
-    int              nCos;           // the number of POs
-    Tim_Obj_t *      pCis;           // timing info for the PIs
-    Tim_Obj_t *      pCos;           // timing info for the POs
-};
-
-// timing box
-struct Tim_Box_t_
-{
-    int              iBox;           // the unique ID of this box
-    int              TravId;         // traversal ID of this box
-    int              nInputs;        // the number of box inputs (POs)
-    int              nOutputs;       // the number of box outputs (PIs)
-    float *          pDelayTable;    // delay for each input->output path
-    int              Inouts[0];      // the int numbers of PIs and POs
-};
-
-// timing object
-struct Tim_Obj_t_
-{
-    int              Id;             // the ID of this object
-    int              TravId;         // traversal ID of this object
-    int              iObj2Box;       // mapping of the object into its box
-    int              iObj2Num;       // mapping of the object into its number in the box
-    float            timeArr;        // arrival time of the object
-    float            timeReq;        // required time of the object
-};
-
-static inline Tim_Obj_t * Tim_ManCi( Tim_Man_t * p, int i )                           { assert( i < p->nCis ); return p->pCis + i;      }
-static inline Tim_Obj_t * Tim_ManCo( Tim_Man_t * p, int i )                           { assert( i < p->nCos ); return p->pCos + i;      }
-static inline Tim_Box_t * Tim_ManBox( Tim_Man_t * p, int i )                          { return (Tim_Box_t *)Vec_PtrEntry(p->vBoxes, i); }
-
-static inline Tim_Box_t * Tim_ManCiBox( Tim_Man_t * p, int i )                        { return Tim_ManCi(p,i)->iObj2Box < 0 ? NULL : (Tim_Box_t *)Vec_PtrEntry( p->vBoxes, Tim_ManCi(p,i)->iObj2Box ); }
-static inline Tim_Box_t * Tim_ManCoBox( Tim_Man_t * p, int i )                        { return Tim_ManCo(p,i)->iObj2Box < 0 ? NULL : (Tim_Box_t *)Vec_PtrEntry( p->vBoxes, Tim_ManCo(p,i)->iObj2Box ); }
-
-static inline Tim_Obj_t * Tim_ManBoxInput( Tim_Man_t * p, Tim_Box_t * pBox, int i )   { assert( i < pBox->nInputs  ); return p->pCos + pBox->Inouts[i];               }
-static inline Tim_Obj_t * Tim_ManBoxOutput( Tim_Man_t * p, Tim_Box_t * pBox, int i )  { assert( i < pBox->nOutputs ); return p->pCis + pBox->Inouts[pBox->nInputs+i]; }
-
-#define Tim_ManBoxForEachInput( p, pBox, pObj, i )                               \
-    for ( i = 0; (i < (pBox)->nInputs) && ((pObj) = Tim_ManBoxInput(p, pBox, i)); i++ )
-#define Tim_ManBoxForEachOutput( p, pBox, pObj, i )                              \
-    for ( i = 0; (i < (pBox)->nOutputs) && ((pObj) = Tim_ManBoxOutput(p, pBox, i)); i++ )
-
-#define Tim_ManForEachCi( p, pObj, i )                                           \
-    for ( i = 0; (i < (p)->nCis) && ((pObj) = (p)->pCis + i); i++ )              \
-        if ( pObj->iObj2Box >= 0 ) {} else 
-#define Tim_ManForEachCo( p, pObj, i )                                           \
-    for ( i = 0; (i < (p)->nCos) && ((pObj) = (p)->pCos + i); i++ )              \
-        if ( pObj->iObj2Box >= 0 ) {} else 
-#define Tim_ManForEachBox( p, pBox, i )                                          \
-    Vec_PtrForEachEntry( Tim_Box_t *, p->vBoxes, pBox, i )
-
-////////////////////////////////////////////////////////////////////////
-///                     FUNCTION DEFINITIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/**Function*************************************************************
-
-  Synopsis    [Starts the timing manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Tim_Man_t * Tim_ManStart( int nCis, int nCos )
-{
-    Tim_Man_t * p;
-    int i;
-    p = ABC_ALLOC( Tim_Man_t, 1 );
-    memset( p, 0, sizeof(Tim_Man_t) );
-    p->pMemObj = Mem_FlexStart();
-    p->vBoxes  = Vec_PtrAlloc( 100 );
-    p->nCis = nCis;
-    p->nCos = nCos;
-    p->pCis = ABC_ALLOC( Tim_Obj_t, nCis );
-    memset( p->pCis, 0, sizeof(Tim_Obj_t) * nCis );
-    p->pCos = ABC_ALLOC( Tim_Obj_t, nCos );
-    memset( p->pCos, 0, sizeof(Tim_Obj_t) * nCos );
-    for ( i = 0; i < nCis; i++ )
-    {
-        p->pCis[i].Id = i;
-        p->pCis[i].iObj2Box = p->pCis[i].iObj2Num = -1;
-        p->pCis[i].timeReq = TIM_ETERNITY;
-        p->pCis[i].timeArr = 0.0;
-        p->pCis[i].TravId = 0;
-    }
-    for ( i = 0; i < nCos; i++ )
-    {
-        p->pCos[i].Id = i;
-        p->pCos[i].iObj2Box = p->pCos[i].iObj2Num = -1;
-        p->pCos[i].timeReq = TIM_ETERNITY;
-        p->pCos[i].timeArr = 0.0;
-        p->pCos[i].TravId = 0;
-    }
-    p->fUseTravId = 1;
-    return p;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates the timing manager.]
-
-  Description [Derives discrete-delay-model timing manager. 
-  Useful for AIG optimization with approximate timing information.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Tim_Man_t * Tim_ManDup( Tim_Man_t * p, int fDiscrete )
-{
-    Tim_Man_t * pNew;
-    Tim_Box_t * pBox;
-    float * pDelayTableNew;
-    int i, k;
-    pNew = Tim_ManStart( p->nCis, p->nCos );
-    memcpy( pNew->pCis, p->pCis, sizeof(Tim_Obj_t) * p->nCis );
-    memcpy( pNew->pCos, p->pCos, sizeof(Tim_Obj_t) * p->nCos );
-    for ( k = 0; k < p->nCis; k++ )
-        pNew->pCis[k].TravId = 0;
-    for ( k = 0; k < p->nCos; k++ )
-        pNew->pCos[k].TravId = 0;
-    if ( fDiscrete )
-    {
-        for ( k = 0; k < p->nCis; k++ )
-            pNew->pCis[k].timeArr = 0.0; // modify here
-        // modify the required times
-    }
-    pNew->vDelayTables = Vec_PtrAlloc( 100 );
-    Tim_ManForEachBox( p, pBox, i )
-    {
-//printf( "%d %d\n", pBox->nInputs, pBox->nOutputs );
-        pDelayTableNew = ABC_ALLOC( float, pBox->nInputs * pBox->nOutputs );
-        Vec_PtrPush( pNew->vDelayTables, pDelayTableNew );
-        if ( fDiscrete )
-        {
-            for ( k = 0; k < pBox->nInputs * pBox->nOutputs; k++ )
-                pDelayTableNew[k] = 1.0; // modify here
-
-///// begin part of improved CIN/COUT propagation
-            for ( k = 0; k < pBox->nInputs; k++ )  // fill in the first row
-               pDelayTableNew[k] = 0.5;
-            for ( k = 0; k < pBox->nOutputs; k++ ) // fill in the first column
-               pDelayTableNew[k*pBox->nInputs] = 0.5;
-            pDelayTableNew[0] = 0.0; // fill in the first entry 
-///// end part of improved CIN/COUT propagation
-
-            /// change
-//            pDelayTableNew[0] = 0.0;
-            /// change
-        }
-        else
-            memcpy( pDelayTableNew, pBox->pDelayTable, sizeof(float) * pBox->nInputs * pBox->nOutputs );
-        Tim_ManCreateBoxFirst( pNew, pBox->Inouts[0], pBox->nInputs, 
-            pBox->Inouts[pBox->nInputs], pBox->nOutputs, pDelayTableNew );
-    }
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates the timing manager.]
-
-  Description [Derives unit-delay-model timing manager. 
-  Useful for levelizing the network.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Tim_Man_t * Tim_ManDupUnit( Tim_Man_t * p )
-{
-    Tim_Man_t * pNew;
-    Tim_Box_t * pBox;
-    float * pDelayTableNew;
-    int i, k;
-    pNew = Tim_ManStart( p->nCis, p->nCos );
-    memcpy( pNew->pCis, p->pCis, sizeof(Tim_Obj_t) * p->nCis );
-    memcpy( pNew->pCos, p->pCos, sizeof(Tim_Obj_t) * p->nCos );
-    for ( k = 0; k < p->nCis; k++ )
-    {
-        pNew->pCis[k].TravId = 0;
-        pNew->pCis[k].timeArr = 0.0; 
-    }
-    for ( k = 0; k < p->nCos; k++ )
-        pNew->pCos[k].TravId = 0;
-    pNew->vDelayTables = Vec_PtrAlloc( 100 );
-    Tim_ManForEachBox( p, pBox, i )
-    {
-        pDelayTableNew = ABC_ALLOC( float, pBox->nInputs * pBox->nOutputs );
-        Vec_PtrPush( pNew->vDelayTables, pDelayTableNew );
-        for ( k = 0; k < pBox->nInputs * pBox->nOutputs; k++ )
-            pDelayTableNew[k] = 1.0;
-        Tim_ManCreateBoxFirst( pNew, pBox->Inouts[0], pBox->nInputs, 
-            pBox->Inouts[pBox->nInputs], pBox->nOutputs, pDelayTableNew );
-    }
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Duplicates the timing manager.]
-
-  Description [Derives the approximate timing manager with realistic delays
-  but without white-boxes.]
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-Tim_Man_t * Tim_ManDupApprox( Tim_Man_t * p )
-{
-    Tim_Man_t * pNew;
-    int k;
-    pNew = Tim_ManStart( p->nCis, p->nCos );
-    for ( k = 0; k < p->nCis; k++ )
-        if ( p->pCis[k].iObj2Box == -1 )
-            pNew->pCis[k].timeArr = p->pCis[k].timeArr;
-        else
-            pNew->pCis[k].timeArr = p->pCis[k].timeReq;
-    for ( k = 0; k < p->nCos; k++ )
-        pNew->pCos[k].timeReq = p->pCos[k].timeReq;
-    return pNew;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the timing manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManStop( Tim_Man_t * p )
-{
-    float * pTable;
-    int i;
-    if ( p->vDelayTables )
-    {
-        Vec_PtrForEachEntry( float *, p->vDelayTables, pTable, i )
-            ABC_FREE( pTable );
-        Vec_PtrFree( p->vDelayTables );
-    }
-    Vec_PtrFree( p->vBoxes );
-    Mem_FlexStop( p->pMemObj, 0 );
-    ABC_FREE( p->pCis );
-    ABC_FREE( p->pCos );
-    ABC_FREE( p );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the timing manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManStopP( Tim_Man_t ** p )
-{
-    if ( *p == NULL )
-        return;
-    Tim_ManStop( *p );
-    *p = NULL;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Stops the timing manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManPrint( Tim_Man_t * p )
-{
-    Tim_Box_t * pBox;
-    Tim_Obj_t * pObj;
-    int i;
-    printf( "TIMING INFORMATION:\n" );
-    Tim_ManForEachCi( p, pObj, i )
-        printf( "pi%5d :  arr = %5.3f  req = %5.3f\n", i, pObj->timeArr, pObj->timeReq );
-    Tim_ManForEachCo( p, pObj, i )
-        printf( "po%5d :  arr = %5.3f  req = %5.3f\n", i, pObj->timeArr, pObj->timeReq );
-    Tim_ManForEachBox( p, pBox, i )
-    {
-        printf( "*** Box %3d :  Ins = %d. Outs = %d.\n", i, pBox->nInputs, pBox->nOutputs );
-        printf( "Delay table:" );
-        for ( i = 0; i < pBox->nInputs * pBox->nOutputs; i++ )
-            printf( " %5.3f", pBox->pDelayTable[i] );
-        printf( "\n" );
-        Tim_ManBoxForEachInput( p, pBox, pObj, i )
-            printf( "box-inp%3d :  arr = %5.3f  req = %5.3f\n", i, pObj->timeArr, pObj->timeReq );
-        Tim_ManBoxForEachOutput( p, pBox, pObj, i )
-            printf( "box-out%3d :  arr = %5.3f  req = %5.3f\n", i, pObj->timeArr, pObj->timeReq );
-    }
-    printf( "\n" );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Disables the use of the traversal ID.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManTravIdDisable( Tim_Man_t * p )
-{
-    p->fUseTravId = 0;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Enables the use of the traversal ID.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManTravIdEnable( Tim_Man_t * p )
-{
-    p->fUseTravId = 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Label box inputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManSetCurrentTravIdBoxInputs( Tim_Man_t * p, int iBox )
-{
-    Tim_Box_t * pBox;
-    Tim_Obj_t * pObj;
-    int i;
-    pBox = Tim_ManBox( p, iBox );
-    Tim_ManBoxForEachInput( p, pBox, pObj, i )
-        pObj->TravId = p->nTravIds;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Label box outputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManSetCurrentTravIdBoxOutputs( Tim_Man_t * p, int iBox )
-{
-    Tim_Box_t * pBox;
-    Tim_Obj_t * pObj;
-    int i;
-    pBox = Tim_ManBox( p, iBox );
-    Tim_ManBoxForEachOutput( p, pBox, pObj, i )
-        pObj->TravId = p->nTravIds;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Label box inputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManSetPreviousTravIdBoxInputs( Tim_Man_t * p, int iBox )
-{
-    Tim_Box_t * pBox;
-    Tim_Obj_t * pObj;
-    int i;
-    pBox = Tim_ManBox( p, iBox );
-    Tim_ManBoxForEachInput( p, pBox, pObj, i )
-        pObj->TravId = p->nTravIds - 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Label box outputs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManSetPreviousTravIdBoxOutputs( Tim_Man_t * p, int iBox )
-{
-    Tim_Box_t * pBox;
-    Tim_Obj_t * pObj;
-    int i;
-    pBox = Tim_ManBox( p, iBox );
-    Tim_ManBoxForEachOutput( p, pBox, pObj, i )
-        pObj->TravId = p->nTravIds - 1;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates required time of the PO.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Tim_ManIsCiTravIdCurrent( Tim_Man_t * p, int iCi )
-{
-    assert( iCi < p->nCis );
-    assert( p->fUseTravId );
-    return p->pCis[iCi].TravId == p->nTravIds;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates required time of the PO.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Tim_ManIsCoTravIdCurrent( Tim_Man_t * p, int iCo )
-{
-    assert( iCo < p->nCos );
-    assert( p->fUseTravId );
-    return p->pCos[iCo].TravId == p->nTravIds;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sets the vector of timing tables associated with the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManSetDelayTables( Tim_Man_t * p, Vec_Ptr_t * vDelayTables )
-{
-    assert( p->vDelayTables == NULL );
-    p->vDelayTables = vDelayTables;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the new timing box.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManCreateBox( Tim_Man_t * p, int * pIns, int nIns, int * pOuts, int nOuts, float * pDelayTable )
-{
-    Tim_Box_t * pBox;
-    int i;
-    pBox = (Tim_Box_t *)Mem_FlexEntryFetch( p->pMemObj, sizeof(Tim_Box_t) + sizeof(int) * (nIns+nOuts) );
-    memset( pBox, 0, sizeof(Tim_Box_t) );
-    pBox->iBox = Vec_PtrSize( p->vBoxes );
-    Vec_PtrPush( p->vBoxes, pBox );
-    pBox->pDelayTable = pDelayTable;
-    pBox->nInputs  = nIns;
-    pBox->nOutputs = nOuts;
-    for ( i = 0; i < nIns; i++ )
-    {
-        assert( pIns[i] < p->nCos );
-        pBox->Inouts[i] = pIns[i];
-        p->pCos[pIns[i]].iObj2Box = pBox->iBox;
-        p->pCos[pIns[i]].iObj2Num = i;
-    }
-    for ( i = 0; i < nOuts; i++ )
-    {
-        assert( pOuts[i] < p->nCis );
-        pBox->Inouts[nIns+i] = pOuts[i];
-        p->pCis[pOuts[i]].iObj2Box = pBox->iBox;
-        p->pCis[pOuts[i]].iObj2Num = i;
-    }
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Creates the new timing box.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManCreateBoxFirst( Tim_Man_t * p, int firstIn, int nIns, int firstOut, int nOuts, float * pDelayTable )
-{
-    Tim_Box_t * pBox;
-    int i;
-
-    pBox = (Tim_Box_t *)Mem_FlexEntryFetch( p->pMemObj, sizeof(Tim_Box_t) + sizeof(int) * (nIns+nOuts) );
-    memset( pBox, 0, sizeof(Tim_Box_t) );
-    pBox->iBox = Vec_PtrSize( p->vBoxes );
-    Vec_PtrPush( p->vBoxes, pBox );
-    pBox->pDelayTable = pDelayTable;
-    pBox->nInputs  = nIns;
-    pBox->nOutputs = nOuts;
-    for ( i = 0; i < nIns; i++ )
-    {
-        assert( firstIn+i < p->nCos );
-        pBox->Inouts[i] = firstIn+i;
-        p->pCos[firstIn+i].iObj2Box = pBox->iBox;
-        p->pCos[firstIn+i].iObj2Num = i;
-    }
-    for ( i = 0; i < nOuts; i++ )
-    {
-        assert( firstOut+i < p->nCis );
-        pBox->Inouts[nIns+i] = firstOut+i;
-        p->pCis[firstOut+i].iObj2Box = pBox->iBox;
-        p->pCis[firstOut+i].iObj2Num = i;
-    }
-//    if ( pBox->iBox < 50 )
-//    printf( "%4d  %4d  %4d  %4d  \n", firstIn, nIns, firstOut, nOuts );
-}
-
-
-
-/**Function*************************************************************
-
-  Synopsis    [Increments the trav ID of the manager.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManIncrementTravId( Tim_Man_t * p )
-{
-    int i;
-    if ( p->nTravIds >= (1<<30)-1 )
-    {
-        p->nTravIds = 0;
-        for ( i = 0; i < p->nCis; i++ )
-            p->pCis[i].TravId = 0;
-        for ( i = 0; i < p->nCos; i++ )
-            p->pCos[i].TravId = 0;
-    }
-    assert( p->nTravIds < (1<<30)-1 );
-    p->nTravIds++;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Initializes arrival time of the PI.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManInitCiArrival( Tim_Man_t * p, int iCi, float Delay )
-{
-    assert( iCi < p->nCis );
-    p->pCis[iCi].timeArr = Delay;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Initializes required time of the PO.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManInitCoRequired( Tim_Man_t * p, int iCo, float Delay )
-{
-    assert( iCo < p->nCos );
-    p->pCos[iCo].timeReq = Delay;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates required time of the PO.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManSetCoArrival( Tim_Man_t * p, int iCo, float Delay )
-{
-    assert( iCo < p->nCos );
-    assert( !p->fUseTravId || p->pCos[iCo].TravId != p->nTravIds );
-    p->pCos[iCo].timeArr = Delay;
-    p->pCos[iCo].TravId = p->nTravIds;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates arrival time of the PI.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManSetCiRequired( Tim_Man_t * p, int iCi, float Delay )
-{
-    assert( iCi < p->nCis );
-    assert( !p->fUseTravId || p->pCis[iCi].TravId != p->nTravIds );
-    p->pCis[iCi].timeReq = Delay;
-    p->pCis[iCi].TravId = p->nTravIds;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Updates required time of the PO.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManSetCoRequired( Tim_Man_t * p, int iCo, float Delay )
-{
-    assert( iCo < p->nCos );
-    assert( !p->fUseTravId || p->pCos[iCo].TravId != p->nTravIds );
-    p->pCos[iCo].timeReq = Delay;
-    p->pCos[iCo].TravId = p->nTravIds;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sets the correct required times for all POs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManSetCiArrivalAll( Tim_Man_t * p, float Delay )
-{
-    Tim_Obj_t * pObj;
-    int i;
-    Tim_ManForEachCi( p, pObj, i )
-        Tim_ManInitCiArrival( p, i, Delay );
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Sets the correct required times for all POs.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManSetCoRequiredAll( Tim_Man_t * p, float Delay )
-{
-    Tim_Obj_t * pObj;
-    int i;
-    Tim_ManForEachCo( p, pObj, i )
-    {
-        Tim_ManSetCoRequired( p, i, Delay );
-//printf( "%d ", i );
-    }
-}
-
-
-/**Function*************************************************************
-
-  Synopsis    [Returns PI arrival time.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-float Tim_ManGetCiArrival( Tim_Man_t * p, int iCi )
-{
-    Tim_Box_t * pBox;
-    Tim_Obj_t * pObjThis, * pObj, * pObjRes;
-    float * pDelays, DelayBest;
-    int i, k;
-    // consider the already processed PI
-    pObjThis = Tim_ManCi( p, iCi );
-    if ( p->fUseTravId && pObjThis->TravId == p->nTravIds )
-        return pObjThis->timeArr;
-    pObjThis->TravId = p->nTravIds;
-    // consider the main PI
-    pBox = Tim_ManCiBox( p, iCi );
-    if ( pBox == NULL )
-        return pObjThis->timeArr;
-    // update box timing
-    pBox->TravId = p->nTravIds;
-    // get the arrival times of the inputs of the box (POs)
-    if ( p->fUseTravId )
-    Tim_ManBoxForEachInput( p, pBox, pObj, i )
-        if ( pObj->TravId != p->nTravIds )
-            printf( "Tim_ManGetCiArrival(): Input arrival times of the box are not up to date!\n" );
-    // compute the arrival times for each output of the box (PIs)
-    Tim_ManBoxForEachOutput( p, pBox, pObjRes, i )
-    {
-        pDelays = pBox->pDelayTable + i * pBox->nInputs;
-        DelayBest = -TIM_ETERNITY;
-        Tim_ManBoxForEachInput( p, pBox, pObj, k )
-            DelayBest = ABC_MAX( DelayBest, pObj->timeArr + pDelays[k] );
-        pObjRes->timeArr = DelayBest;
-        pObjRes->TravId = p->nTravIds;
-    }
-    return pObjThis->timeArr;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns PO required time.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-float Tim_ManGetCoRequired( Tim_Man_t * p, int iCo )
-{
-    Tim_Box_t * pBox;
-    Tim_Obj_t * pObjThis, * pObj, * pObjRes;
-    float * pDelays, DelayBest;
-    int i, k;
-    // consider the already processed PO
-    pObjThis = Tim_ManCo( p, iCo );
-    if ( p->fUseTravId && pObjThis->TravId == p->nTravIds )
-        return pObjThis->timeReq;
-    pObjThis->TravId = p->nTravIds;
-    // consider the main PO
-    pBox = Tim_ManCoBox( p, iCo );
-    if ( pBox == NULL )
-        return pObjThis->timeReq;
-    // update box timing
-    pBox->TravId = p->nTravIds;
-    // get the required times of the outputs of the box (PIs)
-    if ( p->fUseTravId )
-    Tim_ManBoxForEachOutput( p, pBox, pObj, i )
-        if ( pObj->TravId != p->nTravIds )
-            printf( "Tim_ManGetCoRequired(): Output required times of the box are not up to date!\n" );
-    // compute the required times for each input of the box (POs)
-    Tim_ManBoxForEachInput( p, pBox, pObjRes, i )
-    {
-        DelayBest = TIM_ETERNITY;
-        Tim_ManBoxForEachOutput( p, pBox, pObj, k )
-        {
-            pDelays = pBox->pDelayTable + k * pBox->nInputs;
-            DelayBest = ABC_MIN( DelayBest, pObj->timeReq - pDelays[i] );
-        }
-        pObjRes->timeReq = DelayBest;
-        pObjRes->TravId = p->nTravIds;
-    }
-    return pObjThis->timeReq;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the box number for the given input.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Tim_ManBoxForCi( Tim_Man_t * p, int iCi )
-{
-    if ( iCi >= p->nCis )
-        return -1;
-    return p->pCis[iCi].iObj2Box;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the box number for the given output.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Tim_ManBoxForCo( Tim_Man_t * p, int iCo )
-{
-    if ( iCo >= p->nCos )
-        return -1;
-    return p->pCos[iCo].iObj2Box;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the first input of the box.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Tim_ManBoxInputFirst( Tim_Man_t * p, int iBox )
-{
-    Tim_Box_t * pBox = (Tim_Box_t *)Vec_PtrEntry( p->vBoxes, iBox );
-    return pBox->Inouts[0];
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the first input of the box.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Tim_ManBoxOutputFirst( Tim_Man_t * p, int iBox )
-{
-    Tim_Box_t * pBox = (Tim_Box_t *)Vec_PtrEntry( p->vBoxes, iBox );
-    return pBox->Inouts[pBox->nInputs];
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the first input of the box.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Tim_ManBoxInputNum( Tim_Man_t * p, int iBox )
-{
-    Tim_Box_t * pBox = (Tim_Box_t *)Vec_PtrEntry( p->vBoxes, iBox );
-    return pBox->nInputs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    [Returns the first input of the box.]
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-int Tim_ManBoxOutputNum( Tim_Man_t * p, int iBox )
-{
-    Tim_Box_t * pBox = (Tim_Box_t *)Vec_PtrEntry( p->vBoxes, iBox );
-    return pBox->nOutputs;
-}
-
-/**Function*************************************************************
-
-  Synopsis    []
-
-  Description []
-               
-  SideEffects []
-
-  SeeAlso     []
-
-***********************************************************************/
-void Tim_ManChangeForAdders( Tim_Man_t * p )
-{
-    Tim_Box_t * pBox;
-    int i;
-    Tim_ManForEachBox( p, pBox, i )
-        pBox->pDelayTable[0] = 0.0;
-}
-
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-
-
-ABC_NAMESPACE_IMPL_END
-
diff --git a/src/aig/tim/tim.h b/src/aig/tim/tim.h
deleted file mode 100644
index 2d52b7b1..00000000
--- a/src/aig/tim/tim.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/**CFile****************************************************************
-
-  FileName    [tim.h]
-
-  SystemName  [ABC: Logic synthesis and verification system.]
-
-  PackageName [A timing manager.]
-
-  Synopsis    [External declarations.]
-
-  Author      [Alan Mishchenko]
-  
-  Affiliation [UC Berkeley]
-
-  Date        [Ver. 1.0. Started - April 28, 2007.]
-
-  Revision    [$Id: tim.h,v 1.00 2007/04/28 00:00:00 alanmi Exp $]
-
-***********************************************************************/
-
-#ifndef __TIM_H__
-#define __TIM_H__
-
-
-////////////////////////////////////////////////////////////////////////
-///                          INCLUDES                                ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                         PARAMETERS                               ///
-////////////////////////////////////////////////////////////////////////
-
-
-
-ABC_NAMESPACE_HEADER_START
- 
-
-////////////////////////////////////////////////////////////////////////
-///                         BASIC TYPES                              ///
-////////////////////////////////////////////////////////////////////////
-
-typedef struct Tim_Man_t_           Tim_Man_t;
-
-////////////////////////////////////////////////////////////////////////
-///                      MACRO DEFINITIONS                           ///
-////////////////////////////////////////////////////////////////////////
-
-#define TIM_ETERNITY 10000
-
-////////////////////////////////////////////////////////////////////////
-///                             ITERATORS                            ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                     SEQUENTIAL ITERATORS                         ///
-////////////////////////////////////////////////////////////////////////
-
-////////////////////////////////////////////////////////////////////////
-///                    FUNCTION DECLARATIONS                         ///
-////////////////////////////////////////////////////////////////////////
-
-/*=== time.c ===========================================================*/
-extern Tim_Man_t *     Tim_ManStart( int nCis, int nCos );
-extern Tim_Man_t *     Tim_ManDup( Tim_Man_t * p, int fDiscrete );
-extern Tim_Man_t *     Tim_ManDupUnit( Tim_Man_t * p );
-extern Tim_Man_t *     Tim_ManDupApprox( Tim_Man_t * p );
-extern void            Tim_ManStop( Tim_Man_t * p );
-extern void            Tim_ManStopP( Tim_Man_t ** p );
-extern void            Tim_ManPrint( Tim_Man_t * p );
-extern void            Tim_ManTravIdDisable( Tim_Man_t * p );
-extern void            Tim_ManTravIdEnable( Tim_Man_t * p );
-extern void            Tim_ManSetCurrentTravIdBoxInputs( Tim_Man_t * p, int iBox );
-extern void            Tim_ManSetCurrentTravIdBoxOutputs( Tim_Man_t * p, int iBox );
-extern void            Tim_ManSetPreviousTravIdBoxInputs( Tim_Man_t * p, int iBox );
-extern void            Tim_ManSetPreviousTravIdBoxOutputs( Tim_Man_t * p, int iBox );
-extern int             Tim_ManIsCiTravIdCurrent( Tim_Man_t * p, int iCi );
-extern int             Tim_ManIsCoTravIdCurrent( Tim_Man_t * p, int iCo );
-extern void            Tim_ManSetDelayTables( Tim_Man_t * p, Vec_Ptr_t * vDelayTables );
-extern void            Tim_ManCreateBox( Tim_Man_t * p, int * pIns, int nIns, int * pOuts, int nOuts, float * pDelayTable );
-extern void            Tim_ManCreateBoxFirst( Tim_Man_t * p, int firstIn, int nIns, int firstOut, int nOuts, float * pDelayTable );
-extern void            Tim_ManIncrementTravId( Tim_Man_t * p );
-extern void            Tim_ManInitCiArrival( Tim_Man_t * p, int iCi, float Delay );
-extern void            Tim_ManInitCoRequired( Tim_Man_t * p, int iCo, float Delay );
-extern void            Tim_ManSetCoArrival( Tim_Man_t * p, int iCo, float Delay );
-extern void            Tim_ManSetCiRequired( Tim_Man_t * p, int iCi, float Delay );
-extern void            Tim_ManSetCoRequired( Tim_Man_t * p, int iCo, float Delay );
-extern void            Tim_ManSetCiArrivalAll( Tim_Man_t * p, float Delay );
-extern void            Tim_ManSetCoRequiredAll( Tim_Man_t * p, float Delay );
-extern float           Tim_ManGetCiArrival( Tim_Man_t * p, int iCi );
-extern float           Tim_ManGetCoRequired( Tim_Man_t * p, int iCo );
-extern int             Tim_ManBoxForCi( Tim_Man_t * p, int iCo );
-extern int             Tim_ManBoxForCo( Tim_Man_t * p, int iCi );
-extern int             Tim_ManBoxInputFirst( Tim_Man_t * p, int iBox );
-extern int             Tim_ManBoxOutputFirst( Tim_Man_t * p, int iBox );
-extern int             Tim_ManBoxInputNum( Tim_Man_t * p, int iBox );
-extern int             Tim_ManBoxOutputNum( Tim_Man_t * p, int iBox );
-extern void            Tim_ManChangeForAdders( Tim_Man_t * p );
-
-
-
-ABC_NAMESPACE_HEADER_END
-
-
-
-#endif
-
-////////////////////////////////////////////////////////////////////////
-///                       END OF FILE                                ///
-////////////////////////////////////////////////////////////////////////
-