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-rw-r--r--src/base/io/ioUtil.c194
1 files changed, 63 insertions, 131 deletions
diff --git a/src/base/io/ioUtil.c b/src/base/io/ioUtil.c
index 0ac3181a..9845fbab 100644
--- a/src/base/io/ioUtil.c
+++ b/src/base/io/ioUtil.c
@@ -173,27 +173,6 @@ Abc_Ntk_t * Io_Read( char * pFileName, Io_FileType_t FileType, int fCheck )
return NULL;
if ( !Abc_NtkIsNetlist(pNtk) )
return pNtk;
- // consider the case of BLIF-MV
- if ( Io_ReadFileType(pFileName) == IO_FILE_BLIFMV )
- {
- extern Abc_Ntk_t * Abc_NtkConvertBlifMv( Abc_Ntk_t * pNtk );
-Abc_NtkPrintStats( stdout, pNtk, 0 );
-/*
-{
- FILE * pFile = fopen( "_temp_.mv", "w" );
- Io_NtkWriteBlifMv( pFile, pNtk );
- fclose( pFile );
-}
-*/
- pNtk = Abc_NtkConvertBlifMv( pTemp = pNtk );
- Abc_NtkDelete( pTemp );
- if ( pNtk == NULL )
- {
- fprintf( stdout, "Converting BLIF-MV has failed.\n" );
- return NULL;
- }
- return pNtk;
- }
// flatten logic hierarchy
assert( Abc_NtkIsNetlist(pNtk) );
if ( Abc_NtkWhiteboxNum(pNtk) > 0 )
@@ -218,69 +197,19 @@ Abc_NtkPrintStats( stdout, pNtk, 0 );
return NULL;
}
}
- // convert the netlist into the logic network
- pNtk = Abc_NtkToLogic( pTemp = pNtk );
- Abc_NtkDelete( pTemp );
- if ( pNtk == NULL )
- {
- fprintf( stdout, "Converting netlist to logic network after reading has failed.\n" );
- return NULL;
- }
- return pNtk;
-}
-
-/**Function*************************************************************
-
- Synopsis [Read the network from a file.]
-
- Description []
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Ntk_t * Io_ReadHie( char * pFileName, Io_FileType_t FileType, int fCheck )
-{
- Abc_Ntk_t * pNtk, * pTemp;
- // detect the file type
- if ( Io_ReadFileType(pFileName) == IO_FILE_BLIF )
- pNtk = Io_ReadBlifMv( pFileName, 0, fCheck );
-// else if ( Io_ReadFileType(pFileName) == IO_FILE_BLIFMV )
-// pNtk = Io_ReadBlifMv( pFileName, 1, fCheck );
- else if ( Io_ReadFileType(pFileName) == IO_FILE_VERILOG )
- pNtk = Io_ReadVerilog( pFileName, fCheck );
- else
- {
- printf( "Wrong file type.\n" );
- return NULL;
- }
- if ( pNtk == NULL )
- return NULL;
-// printf( "\n" );
- // flatten logic hierarchy
- assert( Abc_NtkIsNetlist(pNtk) );
- if ( Abc_NtkWhiteboxNum(pNtk) > 0 )
- {
- pNtk = Abc_NtkFlattenLogicHierarchy( pTemp = pNtk );
- Abc_NtkDelete( pTemp );
- if ( pNtk == NULL )
- {
- fprintf( stdout, "Flattening logic hierarchy has failed.\n" );
- return NULL;
- }
- }
- // convert blackboxes
- if ( Abc_NtkBlackboxNum(pNtk) > 0 )
+ // consider the case of BLIF-MV
+ if ( Io_ReadFileType(pFileName) == IO_FILE_BLIFMV )
{
- printf( "Hierarchy reader converted %d instances of blackboxes.\n", Abc_NtkBlackboxNum(pNtk) );
- pNtk = Abc_NtkConvertBlackboxes( pTemp = pNtk );
+//Abc_NtkPrintStats( stdout, pNtk, 0 );
+// Io_WriteBlifMv( pNtk, "_temp_.mv" );
+ pNtk = Abc_NtkStrashBlifMv( pTemp = pNtk );
Abc_NtkDelete( pTemp );
if ( pNtk == NULL )
{
- fprintf( stdout, "Converting blackboxes has failed.\n" );
+ fprintf( stdout, "Converting BLIF-MV to AIG has failed.\n" );
return NULL;
}
+ return pNtk;
}
// convert the netlist into the logic network
pNtk = Abc_NtkToLogic( pTemp = pNtk );
@@ -349,7 +278,13 @@ void Io_Write( Abc_Ntk_t * pNtk, char * pFileName, Io_FileType_t FileType )
Io_WriteGml( pNtk, pFileName );
return;
}
-
+/*
+ if ( FileType == IO_FILE_BLIFMV )
+ {
+ Io_WriteBlifMv( pNtk, pFileName );
+ return;
+ }
+*/
// convert logic network into netlist
if ( FileType == IO_FILE_PLA )
{
@@ -359,15 +294,17 @@ void Io_Write( Abc_Ntk_t * pNtk, char * pFileName, Io_FileType_t FileType )
return;
}
if ( Abc_NtkIsComb(pNtk) )
- pNtkTemp = Abc_NtkToNetlist( pNtk, 1 );
+ pNtkTemp = Abc_NtkToNetlist( pNtk );
else
{
fprintf( stdout, "Latches are writen into the PLA file at PI/PO pairs.\n" );
pNtkCopy = Abc_NtkDup( pNtk );
Abc_NtkMakeComb( pNtkCopy );
- pNtkTemp = Abc_NtkToNetlist( pNtk, 1 );
+ pNtkTemp = Abc_NtkToNetlist( pNtk );
Abc_NtkDelete( pNtkCopy );
}
+ if ( !Abc_NtkToSop( pNtk, 1 ) )
+ return;
}
else if ( FileType == IO_FILE_BENCH )
{
@@ -379,7 +316,7 @@ void Io_Write( Abc_Ntk_t * pNtk, char * pFileName, Io_FileType_t FileType )
pNtkTemp = Abc_NtkToNetlistBench( pNtk );
}
else
- pNtkTemp = Abc_NtkToNetlist( pNtk, 0 );
+ pNtkTemp = Abc_NtkToNetlist( pNtk );
if ( pNtkTemp == NULL )
{
@@ -393,6 +330,12 @@ void Io_Write( Abc_Ntk_t * pNtk, char * pFileName, Io_FileType_t FileType )
Abc_NtkToSop( pNtkTemp, 0 );
Io_WriteBlif( pNtkTemp, pFileName, 1 );
}
+ else if ( FileType == IO_FILE_BLIFMV )
+ {
+ if ( !Abc_NtkConvertToBlifMv( pNtkTemp ) )
+ return;
+ Io_WriteBlifMv( pNtkTemp, pFileName );
+ }
else if ( FileType == IO_FILE_BENCH )
Io_WriteBench( pNtkTemp, pFileName );
else if ( FileType == IO_FILE_PLA )
@@ -439,6 +382,8 @@ void Io_WriteHie( Abc_Ntk_t * pNtk, char * pBaseName, char * pFileName )
assert( Abc_NtkIsStrash(pNtk) || Abc_NtkIsLogic(pNtk) );
if ( Io_ReadFileType(pBaseName) == IO_FILE_BLIF )
pNtkBase = Io_ReadBlifMv( pBaseName, 0, 1 );
+ else if ( Io_ReadFileType(pBaseName) == IO_FILE_BLIFMV )
+ pNtkBase = Io_ReadBlifMv( pBaseName, 1, 1 );
else if ( Io_ReadFileType(pBaseName) == IO_FILE_VERILOG )
pNtkBase = Io_ReadVerilog( pBaseName, 1 );
else
@@ -446,6 +391,7 @@ void Io_WriteHie( Abc_Ntk_t * pNtk, char * pBaseName, char * pFileName )
if ( pNtkBase == NULL )
return;
+ // flatten logic hierarchy if present
if ( Abc_NtkWhiteboxNum(pNtkBase) > 0 )
{
pNtkBase = Abc_NtkFlattenLogicHierarchy( pNtkTemp = pNtkBase );
@@ -455,10 +401,27 @@ void Io_WriteHie( Abc_Ntk_t * pNtk, char * pBaseName, char * pFileName )
}
// reintroduce the boxes into the netlist
- if ( Abc_NtkBlackboxNum(pNtkBase) > 0 )
+ if ( Io_ReadFileType(pBaseName) == IO_FILE_BLIFMV )
+ {
+ if ( Abc_NtkBlackboxNum(pNtkBase) > 0 )
+ {
+ printf( "Hierarchy writer does not support BLIF-MV with blackboxes.\n" );
+ Abc_NtkDelete( pNtkBase );
+ return;
+ }
+ // convert the current network to BLIF-MV
+ assert( !Abc_NtkIsNetlist(pNtk) );
+ pNtkResult = Abc_NtkToNetlist( pNtk );
+ if ( !Abc_NtkConvertToBlifMv( pNtkResult ) )
+ return;
+ // reintroduce the network
+ pNtkResult = Abc_NtkInsertBlifMv( pNtkBase, pNtkTemp = pNtkResult );
+ Abc_NtkDelete( pNtkTemp );
+ }
+ else if ( Abc_NtkBlackboxNum(pNtkBase) > 0 )
{
// derive the netlist
- pNtkResult = Abc_NtkToNetlist( pNtk, 0 );
+ pNtkResult = Abc_NtkToNetlist( pNtk );
pNtkResult = Abc_NtkInsertNewLogic( pNtkBase, pNtkTemp = pNtkResult );
Abc_NtkDelete( pNtkTemp );
if ( pNtkResult )
@@ -467,7 +430,7 @@ void Io_WriteHie( Abc_Ntk_t * pNtk, char * pBaseName, char * pFileName )
else
{
printf( "Warning: The output network does not contain blackboxes.\n" );
- pNtkResult = Abc_NtkToNetlist( pNtk, 0 );
+ pNtkResult = Abc_NtkToNetlist( pNtk );
}
Abc_NtkDelete( pNtkBase );
if ( pNtkResult == NULL )
@@ -486,6 +449,10 @@ void Io_WriteHie( Abc_Ntk_t * pNtk, char * pBaseName, char * pFileName )
Abc_NtkToAig( pNtkResult );
Io_WriteVerilog( pNtkResult, pFileName );
}
+ else if ( Io_ReadFileType(pFileName) == IO_FILE_BLIFMV )
+ {
+ Io_WriteBlifMv( pNtkResult, pFileName );
+ }
else
fprintf( stderr, "Unknown output file format.\n" );
@@ -614,61 +581,26 @@ Abc_Obj_t * Io_ReadCreateLatch( Abc_Ntk_t * pNtk, char * pNetLI, char * pNetLO )
Abc_Obj_t * Io_ReadCreateResetLatch( Abc_Ntk_t * pNtk, int fBlifMv )
{
Abc_Obj_t * pLatch, * pNode;
+ Abc_Obj_t * pNetLI, * pNetLO;
// create latch with 0 init value
- pLatch = Io_ReadCreateLatch( pNtk, "_resetLI_", "_resetLO_" );
+// pLatch = Io_ReadCreateLatch( pNtk, "_resetLI_", "_resetLO_" );
+ pNetLI = Abc_NtkCreateNet( pNtk );
+ pNetLO = Abc_NtkCreateNet( pNtk );
+ Abc_ObjAssignName( pNetLI, Abc_ObjName(pNetLI), NULL );
+ Abc_ObjAssignName( pNetLO, Abc_ObjName(pNetLO), NULL );
+ pLatch = Io_ReadCreateLatch( pNtk, Abc_ObjName(pNetLI), Abc_ObjName(pNetLO) );
+ // set the initial value
Abc_LatchSetInit0( pLatch );
// feed the latch with constant1- node
- pNode = Abc_NtkCreateNode( pNtk );
- pNode->pData = Abc_SopRegister( pNtk->pManFunc, "2\n1\n" );
+// pNode = Abc_NtkCreateNode( pNtk );
+// pNode->pData = Abc_SopRegister( pNtk->pManFunc, "2\n1\n" );
+ pNode = Abc_NtkCreateNodeConst1( pNtk );
Abc_ObjAddFanin( Abc_ObjFanin0(Abc_ObjFanin0(pLatch)), pNode );
return pLatch;
}
/**Function*************************************************************
- Synopsis [Create a latch with the given input/output.]
-
- Description [By default, the latch value is unknown (ABC_INIT_NONE).]
-
- SideEffects []
-
- SeeAlso []
-
-***********************************************************************/
-Abc_Obj_t * Io_ReadCreateResetMux( Abc_Ntk_t * pNtk, char * pResetLO, char * pDataLI, int fBlifMv )
-{
- char Buffer[50];
- Abc_Obj_t * pNode, * pData0Net, * pData1Net, * pResetLONet, * pLINet;
- // get the reset output net
- pResetLONet = Abc_NtkFindNet( pNtk, pResetLO );
- assert( pResetLONet );
- // get the latch input net
- pData1Net = Abc_NtkFindOrCreateNet( pNtk, pDataLI );
- // create Data0 net (coming from reset node)
- pData0Net = Abc_NtkFindOrCreateNet( pNtk, Abc_ObjNameSuffix(pData1Net, "_reset") );
- // create the node
- pNode = Abc_NtkCreateNode( pNtk );
- if ( fBlifMv )
- {
-// Vec_Att_t * p = Abc_NtkMvVar( pNtk );
- int nValues = Abc_ObjMvVarNum(pData1Net);
- sprintf( Buffer, "2 %d %d %d\n1 - - =1\n0 - - =2\n", nValues, nValues, nValues );
- pNode->pData = Abc_SopRegister( pNtk->pManFunc, Buffer );
- }
- else
- pNode->pData = Abc_SopCreateMux( pNtk->pManFunc );
- // add nets
- Abc_ObjAddFanin( pNode, pResetLONet );
- Abc_ObjAddFanin( pNode, pData1Net );
- Abc_ObjAddFanin( pNode, pData0Net );
- // create the output net
- pLINet = Abc_NtkFindOrCreateNet( pNtk, Abc_ObjNameSuffix(pData1Net, "_mux") );
- Abc_ObjAddFanin( pLINet, pNode );
- return pNode;
-}
-
-/**Function*************************************************************
-
Synopsis [Create node and the net driven by it.]
Description []