diff options
Diffstat (limited to 'src/base')
153 files changed, 879 insertions, 11175 deletions
diff --git a/src/base/abc/abc.h b/src/base/abc/abc.h index 587d50d8..a0b65e63 100644 --- a/src/base/abc/abc.h +++ b/src/base/abc/abc.h @@ -18,8 +18,8 @@ ***********************************************************************/ -#ifndef __ABC_H__ -#define __ABC_H__ +#ifndef ABC__base__abc__abc_h +#define ABC__base__abc__abc_h //////////////////////////////////////////////////////////////////////// @@ -32,13 +32,14 @@ #include <assert.h> #include <time.h> -#include "vec.h" -#include "hop.h" -#include "st.h" -#include "stmm.h" -#include "nm.h" -#include "mem.h" -#include "utilCex.h" +#include "src/misc/vec/vec.h" +#include "src/aig/hop/hop.h" +#include "src/misc/st/st.h" +#include "src/misc/st/stmm.h" +#include "src/misc/nm/nm.h" +#include "src/misc/mem/mem.h" +#include "src/misc/util/utilCex.h" +#include "src/misc/extra/extra.h" //////////////////////////////////////////////////////////////////////// /// PARAMETERS /// @@ -239,15 +240,6 @@ struct Abc_Lib_t_ //////////////////////////////////////////////////////////////////////// // transforming floats into ints and back -//static inline int Abc_Float2Int( float Val ) { return *((int *)&Val); } -//static inline float Abc_Int2Float( int Num ) { return *((float *)&Num); } -static inline int Abc_Float2Int( float Val ) { union { int x; float y; } v; v.y = Val; return v.x; } -static inline float Abc_Int2Float( int Num ) { union { int x; float y; } v; v.x = Num; return v.y; } -static inline int Abc_BitWordNum( int nBits ) { return (nBits>>5) + ((nBits&31) > 0); } -static inline int Abc_TruthWordNum( int nVars ) { return nVars <= 5 ? 1 : (1 << (nVars - 5)); } -static inline int Abc_InfoHasBit( unsigned * p, int i ) { return (p[(i)>>5] & (1<<((i) & 31))) > 0; } -static inline void Abc_InfoSetBit( unsigned * p, int i ) { p[(i)>>5] |= (1<<((i) & 31)); } -static inline void Abc_InfoXorBit( unsigned * p, int i ) { p[(i)>>5] ^= (1<<((i) & 31)); } static inline unsigned Abc_InfoRandomWord() { return ((((unsigned)rand()) << 24) ^ (((unsigned)rand()) << 12) ^ ((unsigned)rand())); } // #define RAND_MAX 0x7fff static inline void Abc_InfoRandom( unsigned * p, int nWords ) { int i; for ( i = nWords - 1; i >= 0; i-- ) p[i] = Abc_InfoRandomWord(); } static inline void Abc_InfoClear( unsigned * p, int nWords ) { memset( p, 0, sizeof(unsigned) * nWords ); } diff --git a/src/base/abc/abcAig.c b/src/base/abc/abcAig.c index c6611a1a..d594846b 100644 --- a/src/base/abc/abcAig.c +++ b/src/base/abc/abcAig.c @@ -19,7 +19,6 @@ ***********************************************************************/ #include "abc.h" -#include "extra.h" ABC_NAMESPACE_IMPL_START @@ -133,7 +132,7 @@ Abc_Aig_t * Abc_AigAlloc( Abc_Ntk_t * pNtkAig ) pMan = ABC_ALLOC( Abc_Aig_t, 1 ); memset( pMan, 0, sizeof(Abc_Aig_t) ); // allocate the table - pMan->nBins = Cudd_Prime( 10000 ); + pMan->nBins = Abc_PrimeCudd( 10000 ); pMan->pBins = ABC_ALLOC( Abc_Obj_t *, pMan->nBins ); memset( pMan->pBins, 0, sizeof(Abc_Obj_t *) * pMan->nBins ); pMan->vNodes = Vec_PtrAlloc( 100 ); @@ -250,7 +249,7 @@ int Abc_AigCheck( Abc_Aig_t * pMan ) printf( "Abc_AigCheck: The AIG has non-standard nodes.\n" ); return 0; } - if ( pObj->Level != 1 + ABC_MAX( Abc_ObjFanin0(pObj)->Level, Abc_ObjFanin1(pObj)->Level ) ) + if ( pObj->Level != 1 + (unsigned)Abc_MaxInt( Abc_ObjFanin0(pObj)->Level, Abc_ObjFanin1(pObj)->Level ) ) printf( "Abc_AigCheck: Node \"%s\" has level that does not agree with the fanin levels.\n", Abc_ObjName(pObj) ); pAnd = Abc_AigAndLookup( pMan, Abc_ObjChild0(pObj), Abc_ObjChild1(pObj) ); if ( pAnd != pObj ) @@ -330,7 +329,7 @@ Abc_Obj_t * Abc_AigAndCreate( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_t * p1 ) Abc_ObjAddFanin( pAnd, p0 ); Abc_ObjAddFanin( pAnd, p1 ); // set the level of the new node - pAnd->Level = 1 + ABC_MAX( Abc_ObjRegular(p0)->Level, Abc_ObjRegular(p1)->Level ); + pAnd->Level = 1 + Abc_MaxInt( Abc_ObjRegular(p0)->Level, Abc_ObjRegular(p1)->Level ); pAnd->fExor = Abc_NodeIsExorType(pAnd); pAnd->fPhase = (Abc_ObjIsComplement(p0) ^ Abc_ObjRegular(p0)->fPhase) & (Abc_ObjIsComplement(p1) ^ Abc_ObjRegular(p1)->fPhase); // add the node to the corresponding linked list in the table @@ -374,7 +373,7 @@ Abc_Obj_t * Abc_AigAndCreateFrom( Abc_Aig_t * pMan, Abc_Obj_t * p0, Abc_Obj_t * Abc_ObjAddFanin( pAnd, p0 ); Abc_ObjAddFanin( pAnd, p1 ); // set the level of the new node - pAnd->Level = 1 + ABC_MAX( Abc_ObjRegular(p0)->Level, Abc_ObjRegular(p1)->Level ); + pAnd->Level = 1 + Abc_MaxInt( Abc_ObjRegular(p0)->Level, Abc_ObjRegular(p1)->Level ); pAnd->fExor = Abc_NodeIsExorType(pAnd); // add the node to the corresponding linked list in the table Key = Abc_HashKey2( p0, p1, pMan->nBins ); @@ -595,7 +594,7 @@ void Abc_AigResize( Abc_Aig_t * pMan ) clk = clock(); // get the new table size - nBinsNew = Cudd_Prime( 3 * pMan->nBins ); + nBinsNew = Abc_PrimeCudd( 3 * pMan->nBins ); // allocate a new array pBinsNew = ABC_ALLOC( Abc_Obj_t *, nBinsNew ); memset( pBinsNew, 0, sizeof(Abc_Obj_t *) * nBinsNew ); @@ -1076,7 +1075,7 @@ void Abc_AigUpdateLevel_int( Abc_Aig_t * pMan ) if ( Abc_ObjIsCo(pFanout) ) continue; // get the new level of this fanout - LevelNew = 1 + ABC_MAX( Abc_ObjFanin0(pFanout)->Level, Abc_ObjFanin1(pFanout)->Level ); + LevelNew = 1 + Abc_MaxInt( Abc_ObjFanin0(pFanout)->Level, Abc_ObjFanin1(pFanout)->Level ); assert( LevelNew > i ); if ( (int)pFanout->Level == LevelNew ) // no change continue; diff --git a/src/base/abc/abcBlifMv.c b/src/base/abc/abcBlifMv.c index cffdc8da..47a4c15e 100644 --- a/src/base/abc/abcBlifMv.c +++ b/src/base/abc/abcBlifMv.c @@ -19,7 +19,7 @@ ***********************************************************************/ #include "abc.h" -#include "extra.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START @@ -401,7 +401,7 @@ Abc_Ntk_t * Abc_NtkStrashBlifMv( Abc_Ntk_t * pNtk ) if ( nValuesMax < nValues ) nValuesMax = nValues; } - nBits = Extra_Base2Log( nValuesMax ); + nBits = Abc_Base2Log( nValuesMax ); pBits = ABC_ALLOC( Abc_Obj_t *, nBits ); // clean the node copy fields @@ -474,7 +474,7 @@ Abc_Ntk_t * Abc_NtkStrashBlifMv( Abc_Ntk_t * pNtk ) nValues = Abc_ObjMvVarNum(pNet); pValues = ABC_ALLOC( Abc_Obj_t *, nValues ); // create PIs for the encoding bits - nBits = Extra_Base2Log( nValues ); + nBits = Abc_Base2Log( nValues ); for ( k = 0; k < nBits; k++ ) { pBits[k] = Abc_NtkCreatePi( pNtkNew ); @@ -506,7 +506,7 @@ Abc_Ntk_t * Abc_NtkStrashBlifMv( Abc_Ntk_t * pNtk ) nValues = Abc_ObjMvVarNum(pNet); pValues = ABC_ALLOC( Abc_Obj_t *, nValues ); // create PIs for the encoding bits - nBits = Extra_Base2Log( nValues ); + nBits = Abc_Base2Log( nValues ); for ( k = 0; k < nBits; k++ ) { pBits[k] = Abc_NtkCreateBo( pNtkNew ); @@ -602,7 +602,7 @@ Abc_Ntk_t * Abc_NtkStrashBlifMv( Abc_Ntk_t * pNtk ) // Abc_NodeSetTravIdCurrent( pNet ); nValues = Abc_ObjMvVarNum(pNet); pValues = (Abc_Obj_t **)pNet->pCopy; - nBits = Extra_Base2Log( nValues ); + nBits = Abc_Base2Log( nValues ); for ( k = 0; k < nBits; k++ ) { pBit = Abc_ObjNot( Abc_AigConst1(pNtkNew) ); @@ -628,7 +628,7 @@ Abc_Ntk_t * Abc_NtkStrashBlifMv( Abc_Ntk_t * pNtk ) // Abc_NodeSetTravIdCurrent( pNet ); nValues = Abc_ObjMvVarNum(pNet); pValues = (Abc_Obj_t **)pNet->pCopy; - nBits = Extra_Base2Log( nValues ); + nBits = Abc_Base2Log( nValues ); for ( k = 0; k < nBits; k++ ) { pBit = Abc_ObjNot( Abc_AigConst1(pNtkNew) ); @@ -805,7 +805,7 @@ Abc_Ntk_t * Abc_NtkSkeletonBlifMv( Abc_Ntk_t * pNtk ) { pNet = Abc_ObjFanout0(pObj); nValues = Abc_ObjMvVarNum(pNet); - nBits = Extra_Base2Log( nValues ); + nBits = Abc_Base2Log( nValues ); for ( k = 0; k < nBits; k++ ) { pNodeNew = Abc_NtkCreateNode( pNtkNew ); @@ -856,7 +856,7 @@ Abc_Ntk_t * Abc_NtkSkeletonBlifMv( Abc_Ntk_t * pNtk ) continue; Abc_NodeSetTravIdCurrent( pNet ); nValues = Abc_ObjMvVarNum(pNet); - nBits = Extra_Base2Log( nValues ); + nBits = Abc_Base2Log( nValues ); pNodeNew = Abc_NtkCreateNode( pNtkNew ); pNodeNew->pData = Abc_SopDecoderLog( (Mem_Flex_t *)pNtkNew->pManFunc, nValues ); for ( k = 0; k < nBits; k++ ) diff --git a/src/base/abc/abcCheck.c b/src/base/abc/abcCheck.c index aa264314..a80c4372 100644 --- a/src/base/abc/abcCheck.c +++ b/src/base/abc/abcCheck.c @@ -19,8 +19,8 @@ ***********************************************************************/ #include "abc.h" -#include "main.h" -//#include "seq.h" +#include "src/base/main/main.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abc/abcDfs.c b/src/base/abc/abcDfs.c index cc001ab6..6d67785b 100644 --- a/src/base/abc/abcDfs.c +++ b/src/base/abc/abcDfs.c @@ -1312,14 +1312,14 @@ int Abc_NodeSetChoiceLevel_rec( Abc_Obj_t * pNode, int fMaximum ) // compute levels of the children nodes Level1 = Abc_NodeSetChoiceLevel_rec( Abc_ObjFanin0(pNode), fMaximum ); Level2 = Abc_NodeSetChoiceLevel_rec( Abc_ObjFanin1(pNode), fMaximum ); - Level = 1 + ABC_MAX( Level1, Level2 ); + Level = 1 + Abc_MaxInt( Level1, Level2 ); if ( pNode->pData ) { LevelE = Abc_NodeSetChoiceLevel_rec( (Abc_Obj_t *)pNode->pData, fMaximum ); if ( fMaximum ) - Level = ABC_MAX( Level, LevelE ); + Level = Abc_MaxInt( Level, LevelE ); else - Level = ABC_MIN( Level, LevelE ); + Level = Abc_MinInt( Level, LevelE ); // set the level of all equivalent nodes to be the same minimum for ( pTemp = (Abc_Obj_t *)pNode->pData; pTemp; pTemp = (Abc_Obj_t *)pTemp->pData ) pTemp->pCopy = (Abc_Obj_t *)(ABC_PTRINT_T)Level; @@ -1363,7 +1363,7 @@ int Abc_AigSetChoiceLevels( Abc_Ntk_t * pNtk ) Abc_NtkForEachCo( pNtk, pObj, i ) { LevelCur = Abc_NodeSetChoiceLevel_rec( Abc_ObjFanin0(pObj), 1 ); - LevelMax = ABC_MAX( LevelMax, LevelCur ); + LevelMax = Abc_MaxInt( LevelMax, LevelCur ); } return LevelMax; } diff --git a/src/base/abc/abcFunc.c b/src/base/abc/abcFunc.c index 7ff7db17..86604f39 100644 --- a/src/base/abc/abcFunc.c +++ b/src/base/abc/abcFunc.c @@ -19,8 +19,9 @@ ***********************************************************************/ #include "abc.h" -#include "main.h" -#include "mio.h" +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abc/abcHie.c b/src/base/abc/abcHie.c index a3ec3c5f..73b08fcc 100644 --- a/src/base/abc/abcHie.c +++ b/src/base/abc/abcHie.c @@ -19,7 +19,6 @@ ***********************************************************************/ #include "abc.h" -#include "extra.h" ABC_NAMESPACE_IMPL_START @@ -194,8 +193,8 @@ Abc_Ntk_t * Abc_NtkFlattenLogicHierarchy2( Abc_Ntk_t * pNtk ) // start the network pNtkNew = Abc_NtkAlloc( pNtk->ntkType, pNtk->ntkFunc, 1 ); // duplicate the name and the spec - pNtkNew->pName = Extra_UtilStrsav(pNtk->pName); - pNtkNew->pSpec = Extra_UtilStrsav(pNtk->pSpec); + pNtkNew->pName = Abc_UtilStrsav(pNtk->pName); + pNtkNew->pSpec = Abc_UtilStrsav(pNtk->pSpec); // clean the node copy fields Abc_NtkCleanCopy( pNtk ); diff --git a/src/base/abc/abcHieCec.c b/src/base/abc/abcHieCec.c index ace7583b..ab29c3ca 100644 --- a/src/base/abc/abcHieCec.c +++ b/src/base/abc/abcHieCec.c @@ -19,8 +19,8 @@ ***********************************************************************/ #include "abc.h" -#include "ioAbc.h" -#include "gia.h" +#include "src/base/io/ioAbc.h" +#include "src/aig/gia/gia.h" ABC_NAMESPACE_IMPL_START @@ -154,16 +154,16 @@ int Abc_NtkDeriveFlatGiaSop( Gia_Man_t * pGia, int * gFanins, char * pSop ) if ( Value == '1' ) gAnd = Gia_ManHashAnd( pGia, gAnd, gFanins[i] ); else if ( Value == '0' ) - gAnd = Gia_ManHashAnd( pGia, gAnd, Gia_LitNot(gFanins[i]) ); + gAnd = Gia_ManHashAnd( pGia, gAnd, Abc_LitNot(gFanins[i]) ); } // add to the sum of cubes - gSum = Gia_ManHashAnd( pGia, Gia_LitNot(gSum), Gia_LitNot(gAnd) ); - gSum = Gia_LitNot( gSum ); + gSum = Gia_ManHashAnd( pGia, Abc_LitNot(gSum), Abc_LitNot(gAnd) ); + gSum = Abc_LitNot( gSum ); } } // decide whether to complement the result if ( Abc_SopIsComplement(pSop) ) - gSum = Gia_LitNot(gSum); + gSum = Abc_LitNot(gSum); return gSum; } @@ -199,7 +199,7 @@ void Abc_NtkDeriveFlatGia_rec( Gia_Man_t * pGia, Abc_Ntk_t * pNtk ) assert( pSop[2] == '1' ); assert( pSop[0] == '0' || pSop[0] == '1' ); assert( Abc_ObjFanin0(pObj)->iTemp >= 0 ); - Abc_ObjFanout0(pObj)->iTemp = Gia_LitNotCond( Abc_ObjFanin0(pObj)->iTemp, pSop[0]=='0' ); + Abc_ObjFanout0(pObj)->iTemp = Abc_LitNotCond( Abc_ObjFanin0(pObj)->iTemp, pSop[0]=='0' ); continue; } if ( nLength == 5 ) // and2 @@ -210,8 +210,8 @@ void Abc_NtkDeriveFlatGia_rec( Gia_Man_t * pGia, Abc_Ntk_t * pNtk ) assert( Abc_ObjFanin0(pObj)->iTemp >= 0 ); assert( Abc_ObjFanin1(pObj)->iTemp >= 0 ); Abc_ObjFanout0(pObj)->iTemp = Gia_ManHashAnd( pGia, - Gia_LitNotCond( Abc_ObjFanin0(pObj)->iTemp, pSop[0]=='0' ), - Gia_LitNotCond( Abc_ObjFanin1(pObj)->iTemp, pSop[1]=='0' ) + Abc_LitNotCond( Abc_ObjFanin0(pObj)->iTemp, pSop[0]=='0' ), + Abc_LitNotCond( Abc_ObjFanin1(pObj)->iTemp, pSop[1]=='0' ) ); continue; } @@ -267,7 +267,7 @@ Gia_Man_t * Abc_NtkDeriveFlatGia( Abc_Ntk_t * pNtk ) Abc_NtkFillTemp( pNtk ); // start the network pGia = Gia_ManStart( (1<<16) ); - pGia->pName = Gia_UtilStrsav( Abc_NtkName(pNtk) ); + pGia->pName = Abc_UtilStrsav( Abc_NtkName(pNtk) ); Gia_ManHashAlloc( pGia ); // create PIs Abc_NtkForEachPi( pNtk, pTerm, i ) @@ -343,7 +343,7 @@ Gia_Man_t * Abc_NtkDeriveFlatGia2Derive( Abc_Ntk_t * pNtk, Vec_Ptr_t * vOrder ) // start the network pGia = Gia_ManStart( (1<<15) ); - pGia->pName = Gia_UtilStrsav( Abc_NtkName(pNtk) ); + pGia->pName = Abc_UtilStrsav( Abc_NtkName(pNtk) ); Gia_ManHashAlloc( pGia ); // create PIs Abc_NtkForEachPi( pNtk, pTerm, i ) @@ -458,7 +458,7 @@ Gia_Man_t * Abc_NtkDeriveFlatGia2( Abc_Ntk_t * pNtk, Vec_Ptr_t * vModels ) Vec_PtrFree( vOrder ); } - pGia = pModel->pData; pModel->pData = NULL; + pGia = (Gia_Man_t *)pModel->pData; pModel->pData = NULL; Vec_PtrForEachEntry( Abc_Ntk_t *, vModels, pModel, i ) Gia_ManStopP( (Gia_Man_t **)&pModel->pData ); diff --git a/src/base/abc/abcHieNew.c b/src/base/abc/abcHieNew.c index 509b8b96..fa544a93 100644 --- a/src/base/abc/abcHieNew.c +++ b/src/base/abc/abcHieNew.c @@ -24,8 +24,9 @@ #include <assert.h> #include <time.h> -#include "vec.h" -#include "utilNam.h" +#include "src/misc/vec/vec.h" +#include "src/misc/util/utilNam.h" +#include "src/misc/extra/extra.h" ABC_NAMESPACE_IMPL_START @@ -958,7 +959,6 @@ static inline void Au_NtkParseCBlifNum( Vec_Int_t * vFanins, char * pToken, Vec_ ***********************************************************************/ Au_Ntk_t * Au_NtkParseCBlif( char * pFileName ) { - extern char * Extra_FileRead( FILE * pFile ); FILE * pFile; Au_Man_t * pMan; Au_Ntk_t * pRoot; @@ -1109,7 +1109,7 @@ Au_Ntk_t * Au_NtkParseCBlif( char * pFileName ) #include "abc.h" -#include "gia.h" +#include "src/aig/gia/gia.h" extern Vec_Ptr_t * Abc_NtkDfsBoxes( Abc_Ntk_t * pNtk ); extern int Abc_NtkDeriveFlatGiaSop( Gia_Man_t * pGia, int * gFanins, char * pSop ); @@ -1161,15 +1161,15 @@ void Au_NtkDeriveFlatGia_rec( Gia_Man_t * pGia, Au_Ntk_t * p ) { int Lit0, Lit1, Lit2; assert( pObj->Func >= 1 && pObj->Func <= 3 ); - Lit0 = Gia_LitNotCond( Au_ObjCopy(Au_ObjFanin0(pObj)), Au_ObjFaninC0(pObj) ); - Lit1 = Gia_LitNotCond( Au_ObjCopy(Au_ObjFanin1(pObj)), Au_ObjFaninC1(pObj) ); + Lit0 = Abc_LitNotCond( Au_ObjCopy(Au_ObjFanin0(pObj)), Au_ObjFaninC0(pObj) ); + Lit1 = Abc_LitNotCond( Au_ObjCopy(Au_ObjFanin1(pObj)), Au_ObjFaninC1(pObj) ); if ( pObj->Func == 1 ) Lit = Gia_ManHashAnd( pGia, Lit0, Lit1 ); else if ( pObj->Func == 2 ) Lit = Gia_ManHashXor( pGia, Lit0, Lit1 ); else if ( pObj->Func == 3 ) { - Lit2 = Gia_LitNotCond( Au_ObjCopy(Au_ObjFanin2(pObj)), Au_ObjFaninC2(pObj) ); + Lit2 = Abc_LitNotCond( Au_ObjCopy(Au_ObjFanin2(pObj)), Au_ObjFaninC2(pObj) ); Lit = Gia_ManHashMux( pGia, Lit0, Lit1, Lit2 ); } else assert( 0 ); @@ -1199,7 +1199,7 @@ void Au_NtkDeriveFlatGia_rec( Gia_Man_t * pGia, Au_Ntk_t * p ) } Au_NtkForEachPo( p, pTerm, i ) { - Lit = Gia_LitNotCond( Au_ObjCopy(Au_ObjFanin0(pTerm)), Au_ObjFaninC0(pTerm) ); + Lit = Abc_LitNotCond( Au_ObjCopy(Au_ObjFanin0(pTerm)), Au_ObjFaninC0(pTerm) ); Au_ObjSetCopy( pTerm, Lit ); } Au_NtkForEachPo( p, pTerm, i ) @@ -1227,7 +1227,7 @@ Gia_Man_t * Au_NtkDeriveFlatGia( Au_Ntk_t * p ) Au_NtkCleanCopy( p ); // start the network pGia = Gia_ManStart( (1<<16) ); - pGia->pName = Gia_UtilStrsav( Au_NtkName(p) ); + pGia->pName = Abc_UtilStrsav( Au_NtkName(p) ); Gia_ManHashAlloc( pGia ); Gia_ManFlipVerbose( pGia ); // create PIs diff --git a/src/base/abc/abcInt.h b/src/base/abc/abcInt.h index 326ff5a2..0bcddcfb 100644 --- a/src/base/abc/abcInt.h +++ b/src/base/abc/abcInt.h @@ -18,8 +18,8 @@ ***********************************************************************/ -#ifndef __ABC_INT_H__ -#define __ABC_INT_H__ +#ifndef ABC__base__abc__abcInt_h +#define ABC__base__abc__abcInt_h ABC_NAMESPACE_HEADER_START diff --git a/src/base/abc/abcLatch.c b/src/base/abc/abcLatch.c index b5fa1f64..865fb8b9 100644 --- a/src/base/abc/abcLatch.c +++ b/src/base/abc/abcLatch.c @@ -19,7 +19,7 @@ ***********************************************************************/ #include "abc.h" -#include "extra.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START @@ -150,7 +150,7 @@ void Abc_NtkLatchPipe( Abc_Ntk_t * pNtk, int nLatches ) if ( nLatches < 1 ) return; nTotal = nLatches * Abc_NtkPiNum(pNtk); - nDigits = Extra_Base10Log( nTotal ); + nDigits = Abc_Base10Log( nTotal ); vNodes = Vec_PtrAlloc( 100 ); Abc_NtkForEachPi( pNtk, pObj, i ) { @@ -486,7 +486,7 @@ Abc_Ntk_t * Abc_NtkConvertOnehot( Abc_Ntk_t * pNtk ) ABC_NAMESPACE_IMPL_END -#include "giaAig.h" +#include "src/aig/gia/giaAig.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abc/abcLib.c b/src/base/abc/abcLib.c index a9bb5691..b80ebd97 100644 --- a/src/base/abc/abcLib.c +++ b/src/base/abc/abcLib.c @@ -19,7 +19,6 @@ ***********************************************************************/ #include "abc.h" -#include "extra.h" ABC_NAMESPACE_IMPL_START @@ -48,7 +47,7 @@ Abc_Lib_t * Abc_LibCreate( char * pName ) Abc_Lib_t * p; p = ABC_ALLOC( Abc_Lib_t, 1 ); memset( p, 0, sizeof(Abc_Lib_t) ); - p->pName = Extra_UtilStrsav( pName ); + p->pName = Abc_UtilStrsav( pName ); p->tModules = st_init_table( strcmp, st_strhash ); p->vTops = Vec_PtrAlloc( 100 ); p->vModules = Vec_PtrAlloc( 100 ); diff --git a/src/base/abc/abcMinBase.c b/src/base/abc/abcMinBase.c index a8dc9249..2efe404f 100644 --- a/src/base/abc/abcMinBase.c +++ b/src/base/abc/abcMinBase.c @@ -19,7 +19,7 @@ ***********************************************************************/ #include "abc.h" -#include "extra.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abc/abcNames.c b/src/base/abc/abcNames.c index 74e4e493..ab33c91a 100644 --- a/src/base/abc/abcNames.c +++ b/src/base/abc/abcNames.c @@ -19,7 +19,6 @@ ***********************************************************************/ #include "abc.h" -#include "extra.h" ABC_NAMESPACE_IMPL_START @@ -204,7 +203,7 @@ Vec_Ptr_t * Abc_NodeGetFaninNames( Abc_Obj_t * pNode ) int i; vNodes = Vec_PtrAlloc( 100 ); Abc_ObjForEachFanin( pNode, pFanin, i ) - Vec_PtrPush( vNodes, Extra_UtilStrsav(Abc_ObjName(pFanin)) ); + Vec_PtrPush( vNodes, Abc_UtilStrsav(Abc_ObjName(pFanin)) ); return vNodes; } @@ -380,7 +379,7 @@ void Abc_NtkAddDummyPiNames( Abc_Ntk_t * pNtk ) { Abc_Obj_t * pObj; int nDigits, i; - nDigits = Extra_Base10Log( Abc_NtkPiNum(pNtk) ); + nDigits = Abc_Base10Log( Abc_NtkPiNum(pNtk) ); Abc_NtkForEachPi( pNtk, pObj, i ) Abc_ObjAssignName( pObj, Abc_ObjNameDummy("pi", i, nDigits), NULL ); } @@ -400,7 +399,7 @@ void Abc_NtkAddDummyPoNames( Abc_Ntk_t * pNtk ) { Abc_Obj_t * pObj; int nDigits, i; - nDigits = Extra_Base10Log( Abc_NtkPoNum(pNtk) ); + nDigits = Abc_Base10Log( Abc_NtkPoNum(pNtk) ); Abc_NtkForEachPo( pNtk, pObj, i ) Abc_ObjAssignName( pObj, Abc_ObjNameDummy("po", i, nDigits), NULL ); } @@ -432,7 +431,7 @@ void Abc_NtkAddDummyBoxNames( Abc_Ntk_t * pNtk ) CountCur++; else break; - CountMax = ABC_MAX( CountMax, CountCur ); + CountMax = Abc_MaxInt( CountMax, CountCur ); } Abc_NtkForEachPo( pNtk, pObj, i ) { @@ -443,7 +442,7 @@ void Abc_NtkAddDummyBoxNames( Abc_Ntk_t * pNtk ) CountCur++; else break; - CountMax = ABC_MAX( CountMax, CountCur ); + CountMax = Abc_MaxInt( CountMax, CountCur ); } //printf( "CountMax = %d\n", CountMax ); assert( CountMax < 100-2 ); @@ -455,7 +454,7 @@ void Abc_NtkAddDummyBoxNames( Abc_Ntk_t * pNtk ) PrefLo[i+1] = 0; // create latch names assert( !Abc_NtkIsNetlist(pNtk) ); - nDigits = Extra_Base10Log( Abc_NtkLatchNum(pNtk) ); + nDigits = Abc_Base10Log( Abc_NtkLatchNum(pNtk) ); Abc_NtkForEachLatch( pNtk, pObj, i ) { Abc_ObjAssignName( pObj, Abc_ObjNameDummy("l", i, nDigits), NULL ); @@ -463,14 +462,14 @@ void Abc_NtkAddDummyBoxNames( Abc_Ntk_t * pNtk ) Abc_ObjAssignName( Abc_ObjFanout0(pObj), Abc_ObjNameDummy(PrefLo, i, nDigits), NULL ); } /* - nDigits = Extra_Base10Log( Abc_NtkBlackboxNum(pNtk) ); + nDigits = Abc_Base10Log( Abc_NtkBlackboxNum(pNtk) ); Abc_NtkForEachBlackbox( pNtk, pObj, i ) { pName = Abc_ObjAssignName( pObj, Abc_ObjNameDummy("B", i, nDigits), NULL ); - nDigitsF = Extra_Base10Log( Abc_ObjFaninNum(pObj) ); + nDigitsF = Abc_Base10Log( Abc_ObjFaninNum(pObj) ); Abc_ObjForEachFanin( pObj, pTerm, k ) Abc_ObjAssignName( Abc_ObjFanin0(pObj), pName, Abc_ObjNameDummy("i", k, nDigitsF) ); - nDigitsF = Extra_Base10Log( Abc_ObjFanoutNum(pObj) ); + nDigitsF = Abc_Base10Log( Abc_ObjFanoutNum(pObj) ); Abc_ObjForEachFanout( pObj, pTerm, k ) Abc_ObjAssignName( Abc_ObjFanin0(pObj), pName, Abc_ObjNameDummy("o", k, nDigitsF) ); } diff --git a/src/base/abc/abcNetlist.c b/src/base/abc/abcNetlist.c index f2e02bc0..f8ff8f0c 100644 --- a/src/base/abc/abcNetlist.c +++ b/src/base/abc/abcNetlist.c @@ -19,7 +19,7 @@ ***********************************************************************/ #include "abc.h" -#include "main.h" +#include "src/base/main/main.h" //#include "seq.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abc/abcNtk.c b/src/base/abc/abcNtk.c index 6a20bf91..1f76de81 100644 --- a/src/base/abc/abcNtk.c +++ b/src/base/abc/abcNtk.c @@ -20,9 +20,10 @@ #include "abc.h" #include "abcInt.h" -#include "main.h" -#include "mio.h" -#include "gia.h" +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" +#include "src/aig/gia/gia.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abc/abcObj.c b/src/base/abc/abcObj.c index 36fd6397..7741d963 100644 --- a/src/base/abc/abcObj.c +++ b/src/base/abc/abcObj.c @@ -20,8 +20,9 @@ #include "abc.h" #include "abcInt.h" -#include "main.h" -#include "mio.h" +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abc/abcShow.c b/src/base/abc/abcShow.c index 4295726e..4b8fae49 100644 --- a/src/base/abc/abcShow.c +++ b/src/base/abc/abcShow.c @@ -26,8 +26,9 @@ #include "abc.h" -#include "main.h" -#include "ioAbc.h" +#include "src/base/main/main.h" +#include "src/base/io/ioAbc.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abc/abcSop.c b/src/base/abc/abcSop.c index 297b0737..f8421b93 100644 --- a/src/base/abc/abcSop.c +++ b/src/base/abc/abcSop.c @@ -19,7 +19,6 @@ ***********************************************************************/ #include "abc.h" -#include "extra.h" ABC_NAMESPACE_IMPL_START @@ -885,7 +884,7 @@ char * Abc_SopFromTruthBin( char * pTruth ) // get the number of variables nTruthSize = strlen(pTruth); - nVars = Extra_Base2Log( nTruthSize ); + nVars = Abc_Base2Log( nTruthSize ); if ( nTruthSize != (1 << (nVars)) ) { printf( "String %s does not look like a truth table of a %d-variable function.\n", pTruth, nVars ); @@ -954,7 +953,7 @@ char * Abc_SopFromTruthHex( char * pTruth ) // get the number of variables nTruthSize = strlen(pTruth); - nVars = (nTruthSize < 2) ? 2 : Extra_Base2Log(nTruthSize) + 2; + nVars = (nTruthSize < 2) ? 2 : Abc_Base2Log(nTruthSize) + 2; if ( nTruthSize != (1 << (nVars-2)) ) { printf( "String %s does not look like a truth table of a %d-variable function.\n", pTruth, nVars ); @@ -1051,7 +1050,7 @@ char * Abc_SopEncoderLog( Mem_Flex_t * pMan, int iBit, int nValues ) { char * pResult; Vec_Str_t * vSop; - int v, Counter, fFirst = 1, nBits = Extra_Base2Log(nValues); + int v, Counter, fFirst = 1, nBits = Abc_Base2Log(nValues); assert( iBit < nBits ); // count the number of literals Counter = 0; @@ -1131,7 +1130,7 @@ char * Abc_SopDecoderLog( Mem_Flex_t * pMan, int nValues ) { char * pResult; Vec_Str_t * vSop; - int i, b, nBits = Extra_Base2Log(nValues); + int i, b, nBits = Abc_Base2Log(nValues); assert( nValues > 1 && nValues <= (1<<nBits) ); vSop = Vec_StrAlloc( 100 ); for ( i = 0; i < nValues; i++ ) diff --git a/src/base/abc/abcUtil.c b/src/base/abc/abcUtil.c index 0cf25ae3..59a7bc86 100644 --- a/src/base/abc/abcUtil.c +++ b/src/base/abc/abcUtil.c @@ -19,10 +19,10 @@ ***********************************************************************/ #include "abc.h" -#include "main.h" -#include "mio.h" -#include "dec.h" -//#include "seq.h" +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" +#include "src/bool/dec/dec.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abc.c b/src/base/abci/abc.c index 267d4e0b..5fc9bfad 100644 --- a/src/base/abci/abc.c +++ b/src/base/abci/abc.c @@ -18,44 +18,37 @@ ***********************************************************************/ -#include "abc.h" -#include "main.h" -#include "mainInt.h" -#include "fraig.h" -#include "fxu.h" -#include "cut.h" -#include "fpga.h" -#include "if.h" -#include "sim.h" -#include "res.h" -#include "lpk.h" -#include "giaAig.h" -#include "dar.h" -#include "mfs.h" -#include "mfx.h" -#include "fra.h" -#include "saig.h" -#include "nwkMerge.h" -#include "int.h" -#include "dch.h" -#include "ssw.h" -#include "cgt.h" -#include "kit.h" -#include "amap.h" -#include "retInt.h" -#include "cnf.h" -#include "cec.h" -#include "pdr.h" - -#include "tim.h" -#include "llb.h" -#include "ntlnwk.h" -#include "mfx.h" -#include "bbr.h" -#include "cov.h" - -#include "cmd.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/base/main/main.h" +#include "src/base/main/mainInt.h" +#include "src/proof/fraig/fraig.h" +#include "src/opt/fxu/fxu.h" +#include "src/opt/cut/cut.h" +#include "src/map/fpga/fpga.h" +#include "src/map/if/if.h" +#include "src/opt/sim/sim.h" +#include "src/opt/res/res.h" +#include "src/opt/lpk/lpk.h" +#include "src/aig/gia/giaAig.h" +#include "src/opt/dar/dar.h" +#include "src/opt/mfs/mfs.h" +#include "src/proof/fra/fra.h" +#include "src/aig/saig/saig.h" +#include "src/proof/int/int.h" +#include "src/proof/dch/dch.h" +#include "src/proof/ssw/ssw.h" +#include "src/opt/cgt/cgt.h" +#include "src/bool/kit/kit.h" +#include "src/map/amap/amap.h" +#include "src/opt/ret/retInt.h" +#include "src/sat/cnf/cnf.h" +#include "src/proof/cec/cec.h" +#include "src/proof/pdr/pdr.h" +#include "src/misc/tim/tim.h" +#include "src/proof/llb/llb.h" +#include "src/proof/bbr/bbr.h" +#include "src/map/cov/cov.h" +#include "src/base/cmd/cmd.h" #ifdef _WIN32 //#include <io.h> @@ -112,7 +105,7 @@ static int Abc_CommandMfs ( Abc_Frame_t * pAbc, int argc, cha static int Abc_CommandTrace ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandSpeedup ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandPowerdown ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandMerge ( Abc_Frame_t * pAbc, int argc, char ** argv ); +//static int Abc_CommandMerge ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandRewrite ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandRefactor ( Abc_Frame_t * pAbc, int argc, char ** argv ); @@ -287,44 +280,6 @@ static int Abc_CommandCexMin ( Abc_Frame_t * pAbc, int argc, cha static int Abc_CommandTraceStart ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandTraceCheck ( Abc_Frame_t * pAbc, int argc, char ** argv ); - -static int Abc_CommandAbc8Read ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8ReadLogic ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Write ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8WriteLogic ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8ReadLut ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8PrintLut ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Check ( Abc_Frame_t * pAbc, int argc, char ** argv ); - -static int Abc_CommandAbc8Ps ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Pfan ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8If ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8DChoice ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Dch ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Dc2 ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Bidec ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Strash ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Mfs ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Lutpack ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Lutmin ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Balance ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Speedup ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Merge ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Insert ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8ClpLut ( Abc_Frame_t * pAbc, int argc, char ** argv ); - -static int Abc_CommandAbc8Fraig ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Scl ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Lcorr ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Ssw ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Scorr ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Sweep ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8Zero ( Abc_Frame_t * pAbc, int argc, char ** argv ); - -static int Abc_CommandAbc8Cec ( Abc_Frame_t * pAbc, int argc, char ** argv ); -static int Abc_CommandAbc8DSec ( Abc_Frame_t * pAbc, int argc, char ** argv ); - - static int Abc_CommandAbc9Get ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9Put ( Abc_Frame_t * pAbc, int argc, char ** argv ); static int Abc_CommandAbc9Read ( Abc_Frame_t * pAbc, int argc, char ** argv ); @@ -466,24 +421,6 @@ void Abc_FrameReplaceCexVec( Abc_Frame_t * pAbc, Vec_Ptr_t ** pvCexVec ) ***********************************************************************/ void Abc_FrameClearDesign() { - Abc_Frame_t * pAbc; - - pAbc = Abc_FrameGetGlobalFrame(); - if ( pAbc->pAbc8Ntl ) - { - Ntl_ManFree( pAbc->pAbc8Ntl ); - pAbc->pAbc8Ntl = NULL; - } - if ( pAbc->pAbc8Aig ) - { - Aig_ManStop( pAbc->pAbc8Aig ); - pAbc->pAbc8Aig = NULL; - } - if ( pAbc->pAbc8Nwk ) - { - Nwk_ManFree( pAbc->pAbc8Nwk ); - pAbc->pAbc8Nwk = NULL; - } } /**Function************************************************************* @@ -536,18 +473,6 @@ void Abc_CommandUpdate9( Abc_Frame_t * pAbc, Gia_Man_t * pNew ) ***********************************************************************/ void Abc_Init( Abc_Frame_t * pAbc ) { -/* - char * pBuff = ABC_ALLOC( char, (1<<29) ); - int i, clk = clock(); - for ( i = 0; i < (1<<29); i++ ) - pBuff[i] = i % 53; - if ( pBuff == NULL ) - printf( "Not allocated. " ); - else - printf( "Allocated %d bytes. ", (1<<29) ); - Abc_PrintTime( 1, "Time", clock() - clk ); -*/ - Cmd_CommandAdd( pAbc, "Printing", "print_stats", Abc_CommandPrintStats, 0 ); Cmd_CommandAdd( pAbc, "Printing", "print_exdc", Abc_CommandPrintExdc, 0 ); Cmd_CommandAdd( pAbc, "Printing", "print_io", Abc_CommandPrintIo, 0 ); @@ -591,7 +516,7 @@ void Abc_Init( Abc_Frame_t * pAbc ) Cmd_CommandAdd( pAbc, "Synthesis", "trace", Abc_CommandTrace, 0 ); Cmd_CommandAdd( pAbc, "Synthesis", "speedup", Abc_CommandSpeedup, 1 ); Cmd_CommandAdd( pAbc, "Synthesis", "powerdown", Abc_CommandPowerdown, 1 ); - Cmd_CommandAdd( pAbc, "Synthesis", "merge", Abc_CommandMerge, 1 ); +// Cmd_CommandAdd( pAbc, "Synthesis", "merge", Abc_CommandMerge, 1 ); Cmd_CommandAdd( pAbc, "Synthesis", "rewrite", Abc_CommandRewrite, 1 ); Cmd_CommandAdd( pAbc, "Synthesis", "refactor", Abc_CommandRefactor, 1 ); @@ -762,42 +687,6 @@ void Abc_Init( Abc_Frame_t * pAbc ) Cmd_CommandAdd( pAbc, "Verification", "reconcile", Abc_CommandReconcile, 1 ); Cmd_CommandAdd( pAbc, "Verification", "cexmin", Abc_CommandCexMin, 0 ); - - Cmd_CommandAdd( pAbc, "ABC8", "*r", Abc_CommandAbc8Read, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*rlogic", Abc_CommandAbc8ReadLogic, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*w", Abc_CommandAbc8Write, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*wlogic", Abc_CommandAbc8WriteLogic, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*rlut", Abc_CommandAbc8ReadLut, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*plut", Abc_CommandAbc8PrintLut, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*check", Abc_CommandAbc8Check, 0 ); - - Cmd_CommandAdd( pAbc, "ABC8", "*ps", Abc_CommandAbc8Ps, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*pfan", Abc_CommandAbc8Pfan, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*if", Abc_CommandAbc8If, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*dchoice", Abc_CommandAbc8DChoice, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*dch", Abc_CommandAbc8Dch, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*dc2", Abc_CommandAbc8Dc2, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*bidec", Abc_CommandAbc8Bidec, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*st", Abc_CommandAbc8Strash, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*mfs", Abc_CommandAbc8Mfs, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*lp", Abc_CommandAbc8Lutpack, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*b", Abc_CommandAbc8Balance, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*speedup", Abc_CommandAbc8Speedup, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*merge", Abc_CommandAbc8Merge, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*insert", Abc_CommandAbc8Insert, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*clplut", Abc_CommandAbc8ClpLut, 0 ); - - Cmd_CommandAdd( pAbc, "ABC8", "*fraig", Abc_CommandAbc8Fraig, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*scl", Abc_CommandAbc8Scl, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*lcorr", Abc_CommandAbc8Lcorr, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*ssw", Abc_CommandAbc8Ssw, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*scorr", Abc_CommandAbc8Scorr, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*sw", Abc_CommandAbc8Sweep, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*zero", Abc_CommandAbc8Zero, 0 ); - - Cmd_CommandAdd( pAbc, "ABC8", "*cec", Abc_CommandAbc8Cec, 0 ); - Cmd_CommandAdd( pAbc, "ABC8", "*dsec", Abc_CommandAbc8DSec, 0 ); - Cmd_CommandAdd( pAbc, "ABC9", "&get", Abc_CommandAbc9Get, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&put", Abc_CommandAbc9Put, 0 ); Cmd_CommandAdd( pAbc, "ABC9", "&r", Abc_CommandAbc9Read, 0 ); @@ -956,11 +845,6 @@ void Abc_End( Abc_Frame_t * pAbc ) // extern void Au_TabManPrint(); // Au_TabManPrint(); } - { - extern void If_LutLibFree( If_Lib_t * pLutLib ); - if ( Abc_FrameGetGlobalFrame()->pAbc8Lib ) - If_LutLibFree( (If_Lib_t *)Abc_FrameGetGlobalFrame()->pAbc8Lib ); - } // Dar_LibDumpPriorities(); { @@ -4570,6 +4454,7 @@ usage: return 1; } +#if 0 /**Function************************************************************* Synopsis [] @@ -4702,7 +4587,7 @@ usage: Abc_Print( -2, "\t-h : print the command usage\n"); return 1; } - +#endif /**Function************************************************************* Synopsis [] @@ -21305,3075 +21190,6 @@ usage: } - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Read( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - FILE * pFile; - char * pFileName; - int c; - int fMapped; - int fTest; - - // set defaults - fMapped = 0; - fTest = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "mth" ) ) != EOF ) - { - switch ( c ) - { - case 'm': - fMapped ^= 1; - break; - case 't': - fTest ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - - // get the input file name - pFileName = argv[globalUtilOptind]; - if ( (pFile = fopen( pFileName, "r" )) == NULL ) - { - Abc_Print( -1, "Cannot open input file \"%s\". ", pFileName ); - if ( (pFileName = Extra_FileGetSimilarName( pFileName, ".blif", NULL, NULL, NULL, NULL )) ) - Abc_Print( 1, "Did you mean \"%s\"?", pFileName ); - Abc_Print( 1, "\n" ); - return 1; - } - fclose( pFile ); - if ( fTest ) - { - Ntl_Man_t * pTemp = Ntl_ManReadBlif( pFileName, 1 ); - if ( pTemp ) - { -// Ntl_ManWriteBlif( pTemp, "test_boxes.blif" ); - Ntl_ManPrintStats( pTemp ); - Ntl_ManFree( pTemp ); - } - return 0; - } - - Abc_FrameClearDesign(); - pAbc->pAbc8Ntl = Ntl_ManReadBlif( pFileName, 1 ); - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Read(): Reading BLIF has failed.\n" ); - return 1; - } - pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl ); - if ( pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Read(): AIG extraction has failed.\n" ); - return 1; - } - if ( fMapped ) - { - pAbc->pAbc8Nwk = Ntl_ManExtractNwk( pAbc->pAbc8Ntl, pAbc->pAbc8Aig, NULL ); - if ( pAbc->pAbc8Nwk == NULL ) - Abc_Print( -1, "Abc_CommandAbc8Read(): Warning! Mapped network is not extracted.\n" ); - } - return 0; - -usage: - Abc_Print( -2, "usage: *r [-mth]\n" ); - Abc_Print( -2, "\t reads the design with whiteboxes\n" ); - Abc_Print( -2, "\t-m : toggle extracting mapped network [default = %s]\n", fMapped? "yes": "no" ); - Abc_Print( -2, "\t-t : toggle reading in the test mode [default = %s]\n", fTest? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8ReadLogic( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - FILE * pFile; - char * pFileName; - Nwk_Man_t * pNtkNew; - int c; - - // set defaults - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF ) - { - switch ( c ) - { - case 'h': - goto usage; - default: - goto usage; - } - } - - // get the input file name - pFileName = argv[globalUtilOptind]; - if ( (pFile = fopen( pFileName, "r" )) == NULL ) - { - Abc_Print( -1, "Cannot open input file \"%s\". ", pFileName ); - if ( (pFileName = Extra_FileGetSimilarName( pFileName, ".blif", NULL, NULL, NULL, NULL )) ) - Abc_Print( 1, "Did you mean \"%s\"?", pFileName ); - Abc_Print( 1, "\n" ); - return 1; - } - fclose( pFile ); - - if ( pAbc->pAbc8Ntl == NULL || pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8ReadLogic(): There is no design or its AIG.\n" ); - return 1; - } - - // read the new logic - pNtkNew = Ntl_ManReadNwk( pFileName, pAbc->pAbc8Aig, Ntl_ManReadTimeMan(pAbc->pAbc8Ntl) ); - if ( pNtkNew == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8ReadLogic(): Procedure has failed.\n" ); - return 1; - } - if ( pAbc->pAbc8Nwk != NULL ) - Nwk_ManFree( pAbc->pAbc8Nwk ); - pAbc->pAbc8Nwk = pNtkNew; - return 0; - -usage: - Abc_Print( -2, "usage: *rlogic [-h]\n" ); - Abc_Print( -2, "\t reads the logic part of the design without whiteboxes\n" ); - Abc_Print( -2, "\t and sets the new logic as the current mapped network\n" ); - Abc_Print( -2, "\t (the logic part should be comb and with the same PIs/POs)\n" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Write( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - char * pFileName; - Aig_Man_t * pTemp; - Ntl_Man_t * pTemp2; - int fAig; - int fBlif; - int fCollapsed; - int c; - - // set defaults - fAig = 0; - fBlif = 1; - fCollapsed = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "abch" ) ) != EOF ) - { - switch ( c ) - { - case 'a': - fAig ^= 1; - break; - case 'b': - fBlif ^= 1; - break; - case 'c': - fCollapsed ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Write(): There is no design to write.\n" ); - return 1; - } - // create the design to write - pFileName = argv[globalUtilOptind]; - if ( fAig ) - { - if ( fCollapsed ) - { - pTemp = Ntl_ManCollapseSeq( pAbc->pAbc8Ntl, 0, 0 ); - if ( fBlif ) - Saig_ManDumpBlif( pTemp, pFileName ); - else - Ioa_WriteAiger( pTemp, pFileName, 0, 0 ); - Aig_ManStop( pTemp ); - } - else - { - if ( pAbc->pAbc8Aig != NULL ) - { - if ( fBlif ) - { - pTemp2 = Ntl_ManInsertAig( pAbc->pAbc8Ntl, pAbc->pAbc8Aig ); - if ( pTemp2 == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Write(): Inserting AIG has failed.\n" ); - return 1; - } - Ntl_ManWriteBlif( pTemp2, pFileName ); - Ntl_ManFree( pTemp2 ); - } - else - Ioa_WriteAiger( pAbc->pAbc8Aig, pFileName, 0, 0 ); - } - else - { - Abc_Print( -1, "There is no AIG to write.\n" ); - return 1; - } - } - } - else - { - if ( pAbc->pAbc8Nwk != NULL ) - { - pTemp2 = Ntl_ManInsertNtk( pAbc->pAbc8Ntl, pAbc->pAbc8Nwk ); - if ( pTemp2 == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Write(): Inserting mapped network has failed.\n" ); - return 1; - } - Ntl_ManWriteBlif( pTemp2, pFileName ); - Ntl_ManFree( pTemp2 ); - } - else - { - Abc_Print( -1, "Writing the unmapped netlist.\n" ); - pTemp2 = pAbc->pAbc8Ntl; - Ntl_ManWriteBlif( pTemp2, pFileName ); - } - } - return 0; - -usage: - Abc_Print( -2, "usage: *w [-abch]\n" ); - Abc_Print( -2, "\t write the design with whiteboxes\n" ); - Abc_Print( -2, "\t-a : toggle writing design or internal AIG [default = %s]\n", fAig? "AIG": "design" ); - Abc_Print( -2, "\t-b : toggle writing AIG as BLIF or AIGER [default = %s]\n", fBlif? "BLIF": "AIGER" ); - Abc_Print( -2, "\t-c : toggle writing collapsed sequential AIG [default = %s]\n", fCollapsed? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8WriteLogic( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Vec_Ptr_t * vCiNames = NULL, * vCoNames = NULL; - char * pFileName; - int fAig; - int c; - - // set defaults - fAig = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "ah" ) ) != EOF ) - { - switch ( c ) - { - case 'a': - fAig ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Write(): There is no design to write.\n" ); - return 1; - } - // create the design to write - pFileName = argv[globalUtilOptind]; -// vCiNames = Ntl_ManCollectCiNames( pAbc->pAbc8Ntl ); -// vCoNames = Ntl_ManCollectCoNames( pAbc->pAbc8Ntl ); - // the problem is duplicated CO names... - if ( fAig ) - { - if ( pAbc->pAbc8Aig != NULL ) - Aig_ManDumpBlif( pAbc->pAbc8Aig, pFileName, vCiNames, vCoNames ); - else - { - Abc_Print( -1, "There is no AIG to write.\n" ); - return 1; - } - } - else - { - if ( pAbc->pAbc8Nwk != NULL ) - Nwk_ManDumpBlif( pAbc->pAbc8Nwk, pFileName, vCiNames, vCoNames ); - else - { - Abc_Print( -1, "There is no mapped network to write.\n" ); - return 1; - } - } - if ( vCiNames ) Vec_PtrFree( vCiNames ); - if ( vCoNames ) Vec_PtrFree( vCoNames ); - return 0; - -usage: - Abc_Print( -2, "usage: *wlogic [-ah]\n" ); - Abc_Print( -2, "\t write the logic part of the design without whiteboxes\n" ); - Abc_Print( -2, "\t-a : toggle writing mapped network or AIG [default = %s]\n", fAig? "AIG": "network" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [Command procedure to read LUT libraries.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8ReadLut( Abc_Frame_t * pAbc, int argc, char **argv ) -{ - FILE * pFile; - char * FileName; - If_Lib_t * pLib; - int c; - extern If_Lib_t * If_LutLibRead( char * FileName ); - extern void If_LutLibFree( If_Lib_t * pLutLib ); - - // set the defaults - Extra_UtilGetoptReset(); - while ( (c = Extra_UtilGetopt(argc, argv, "h")) != EOF ) - { - switch (c) - { - case 'h': - goto usage; - break; - default: - goto usage; - } - } - - - if ( argc != globalUtilOptind + 1 ) - { - goto usage; - } - - // get the input file name - FileName = argv[globalUtilOptind]; - if ( (pFile = fopen( FileName, "r" )) == NULL ) - { - Abc_Print( -1, "Cannot open input file \"%s\". ", FileName ); - if ( (FileName = Extra_FileGetSimilarName( FileName, ".lut", NULL, NULL, NULL, NULL )) ) - Abc_Print( 1, "Did you mean \"%s\"?", FileName ); - Abc_Print( 1, "\n" ); - return 1; - } - fclose( pFile ); - - // set the new network - pLib = If_LutLibRead( FileName ); - if ( pLib == NULL ) - { - Abc_Print( -1, "Reading LUT library has failed.\n" ); - goto usage; - } - // replace the current library - if ( pAbc->pAbc8Lib != NULL ) - If_LutLibFree( pAbc->pAbc8Lib ); - pAbc->pAbc8Lib = pLib; - return 0; - -usage: - Abc_Print( -2, "\nusage: *rlut [-h]\n"); - Abc_Print( -2, "\t read the LUT library from the file\n" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - Abc_Print( -2, "\t \n"); - Abc_Print( -2, "\t File format for a LUT library:\n"); - Abc_Print( -2, "\t (the default library is shown)\n"); - Abc_Print( -2, "\t \n"); - Abc_Print( -2, "\t # The area/delay of k-variable LUTs:\n"); - Abc_Print( -2, "\t # k area delay\n"); - Abc_Print( -2, "\t 1 1 1\n"); - Abc_Print( -2, "\t 2 2 2\n"); - Abc_Print( -2, "\t 3 4 3\n"); - Abc_Print( -2, "\t 4 8 4\n"); - Abc_Print( -2, "\t 5 16 5\n"); - Abc_Print( -2, "\t 6 32 6\n"); - return 1; /* error exit */ -} - -/**Function************************************************************* - - Synopsis [Command procedure to read LUT libraries.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8PrintLut( Abc_Frame_t * pAbc, int argc, char **argv ) -{ - int c; - extern void If_LutLibPrint( If_Lib_t * pLutLib ); - - // set the defaults - Extra_UtilGetoptReset(); - while ( (c = Extra_UtilGetopt(argc, argv, "h")) != EOF ) - { - switch (c) - { - case 'h': - goto usage; - break; - default: - goto usage; - } - } - - if ( argc != globalUtilOptind ) - { - goto usage; - } - - // set the new network - if ( pAbc->pAbc8Lib == NULL ) - Abc_Print( -1, "Abc_CommandAbc8PrintLut(): LUT library is not specified.\n" ); - else - If_LutLibPrint( (If_Lib_t *)pAbc->pAbc8Lib ); - return 0; - -usage: - Abc_Print( -2, "\nusage: *plut [-h]\n"); - Abc_Print( -2, "\t print the current LUT library\n" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; /* error exit */ -} - -/**Function************************************************************* - - Synopsis [Command procedure to read LUT libraries.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Check( Abc_Frame_t * pAbc, int argc, char **argv ) -{ - int c; - - // set the defaults - Extra_UtilGetoptReset(); - while ( (c = Extra_UtilGetopt(argc, argv, "h")) != EOF ) - { - switch (c) - { - case 'h': - goto usage; - break; - default: - goto usage; - } - } - - if ( argc != globalUtilOptind ) - { - goto usage; - } - - // set the new network - if ( pAbc->pAbc8Nwk == NULL ) - Abc_Print( -1, "Abc_CommandAbc8Check(): There is no mapped network.\n" ); - else - Nwk_ManCheck( pAbc->pAbc8Nwk ); - return 0; - -usage: - Abc_Print( -2, "\nusage: *check [-h]\n"); - Abc_Print( -2, "\t checks if the current mapped network has duplicated fanins\n" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; /* error exit */ -} - - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Ps( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - int c; - int fSaveBest; - int fDumpResult; - int fPower; - int fShort; - extern If_Lib_t * If_SetSimpleLutLib( int nLutSize ); - - // set defaults - fSaveBest = 0; - fDumpResult = 0; - fPower = 0; - fShort = 1; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "bdpsh" ) ) != EOF ) - { - switch ( c ) - { - case 'b': - fSaveBest ^= 1; - break; - case 'd': - fDumpResult ^= 1; - break; - case 'p': - fPower ^= 1; - break; - case 's': - fShort ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Ps(): There is no design to show.\n" ); - return 1; - } - - if ( fShort ) - { - Nwk_ManPrintStatsShort( pAbc->pAbc8Ntl, pAbc->pAbc8Aig, pAbc->pAbc8Nwk ); - return 0; - } - // get the input file name - if ( pAbc->pAbc8Ntl ) - { - Abc_Print( -1, "NETLIST: " ); - Ntl_ManPrintStats( pAbc->pAbc8Ntl ); - } - if ( pAbc->pAbc8Aig ) - { - Abc_Print( -1, "AIG: " ); - Aig_ManPrintStats( pAbc->pAbc8Aig ); - } - if ( pAbc->pAbc8Nwk ) - { - if ( pAbc->pAbc8Lib == NULL ) - { - Abc_Print( -1, "LUT library is not given. Using default LUT library.\n" ); - pAbc->pAbc8Lib = If_SetSimpleLutLib( 6 ); - } - Abc_Print( -1, "MAPPED: " ); - Nwk_ManPrintStats( pAbc->pAbc8Nwk, pAbc->pAbc8Lib, fSaveBest, fDumpResult, fPower, pAbc->pAbc8Ntl ); - } - return 0; - -usage: - Abc_Print( -2, "usage: *ps [-bdpsh]\n" ); - Abc_Print( -2, "\t prints design statistics\n" ); - Abc_Print( -2, "\t-b : toggles saving the best logic network in \"best.blif\" [default = %s]\n", fSaveBest? "yes": "no" ); - Abc_Print( -2, "\t-d : toggles dumping network into file \"<input_file_name>_dump.blif\" [default = %s]\n", fDumpResult? "yes": "no" ); - Abc_Print( -2, "\t-p : toggles printing power dissipation due to switching [default = %s]\n", fPower? "yes": "no" ); - Abc_Print( -2, "\t-s : toggles short printing mode [default = %s]\n", fShort? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Pfan( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - int c; - - // set defaults - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF ) - { - switch ( c ) - { - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Nwk == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Pfan(): There is no mapped network for print fanin/fanout.\n" ); - return 1; - } - Nwk_ManPrintFanioNew( pAbc->pAbc8Nwk ); - return 0; - -usage: - Abc_Print( -2, "usage: *pfan [-h]\n" ); - Abc_Print( -2, "\t prints fanin/fanout stats of the mapped network\n" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8If( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - char Buffer[200]; - char LutSize[200]; - If_Par_t Pars, * pPars = &Pars; - Nwk_Man_t * pNtkNew; - int c; - - if ( pAbc->pAbc8Lib == NULL ) - { -// Abc_Print( -1, "LUT library is not given. Using default LUT library.\n" ); - pAbc->pAbc8Lib = If_SetSimpleLutLib( 6 ); - } - - // set defaults - Nwk_ManSetIfParsDefault( pPars ); - pPars->pLutLib = pAbc->pAbc8Lib; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "KCFADEqaflepmrsdbvh" ) ) != EOF ) - { - switch ( c ) - { - case 'K': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-K\" should be followed by a positive integer.\n" ); - goto usage; - } - pPars->nLutSize = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nLutSize < 0 ) - goto usage; - // if the LUT size is specified, disable library - pPars->pLutLib = NULL; - break; - case 'C': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-C\" should be followed by a positive integer.\n" ); - goto usage; - } - pPars->nCutsMax = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nCutsMax < 0 ) - goto usage; - break; - case 'F': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-F\" should be followed by a positive integer.\n" ); - goto usage; - } - pPars->nFlowIters = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nFlowIters < 0 ) - goto usage; - break; - case 'A': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-A\" should be followed by a positive integer.\n" ); - goto usage; - } - pPars->nAreaIters = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nAreaIters < 0 ) - goto usage; - break; - case 'D': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-D\" should be followed by a floating point number.\n" ); - goto usage; - } - pPars->DelayTarget = (float)atof(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->DelayTarget <= 0.0 ) - goto usage; - break; - case 'E': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-E\" should be followed by a floating point number.\n" ); - goto usage; - } - pPars->Epsilon = (float)atof(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->Epsilon < 0.0 || pPars->Epsilon > 1.0 ) - goto usage; - break; - case 'q': - pPars->fPreprocess ^= 1; - break; - case 'a': - pPars->fArea ^= 1; - break; - case 'r': - pPars->fExpRed ^= 1; - break; - case 'f': - pPars->fFancy ^= 1; - break; - case 'l': - pPars->fLatchPaths ^= 1; - break; - case 'e': - pPars->fEdge ^= 1; - break; - case 'p': - pPars->fPower ^= 1; - break; - case 'm': - pPars->fCutMin ^= 1; - break; - case 's': - pPars->fSeqMap ^= 1; - break; - case 'd': - pPars->fBidec ^= 1; - break; - case 'b': - pPars->fUseBat ^= 1; - break; - case 'v': - pPars->fVerbose ^= 1; - break; - case 'h': - default: - goto usage; - } - } - if ( pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8If(): There is no AIG to map.\n" ); - return 1; - } - - if ( pPars->nLutSize < 3 || pPars->nLutSize > IF_MAX_LUTSIZE ) - { - Abc_Print( -1, "Incorrect LUT size (%d).\n", pPars->nLutSize ); - return 1; - } - - if ( pPars->nCutsMax < 1 || pPars->nCutsMax >= (1<<12) ) - { - Abc_Print( -1, "Incorrect number of cuts.\n" ); - return 1; - } - - // enable truth table computation if choices are selected - if ( (c = Aig_ManChoiceNum( pAbc->pAbc8Aig )) ) - { -// Abc_Print( 0, "Performing LUT mapping with %d choices.\n", c ); - pPars->fExpRed = 0; - } - - if ( pPars->fUseBat ) - { - if ( pPars->nLutSize < 4 || pPars->nLutSize > 6 ) - { - Abc_Print( -1, "This feature only works for {4,5,6}-LUTs.\n" ); - return 1; - } - pPars->fCutMin = 1; - } - - // enable truth table computation if cut minimization is selected - if ( pPars->fCutMin ) - { - pPars->fTruth = 1; - pPars->fExpRed = 0; - } - - // complain if truth tables are requested but the cut size is too large - if ( pPars->fTruth && pPars->nLutSize > IF_MAX_FUNC_LUTSIZE ) - { - Abc_Print( -1, "Truth tables cannot be computed for LUT larger than %d inputs.\n", IF_MAX_FUNC_LUTSIZE ); - return 1; - } - - pNtkNew = Nwk_MappingIf( pAbc->pAbc8Aig, Ntl_ManReadTimeMan(pAbc->pAbc8Ntl), pPars ); - if ( pNtkNew == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8If(): Mapping of the AIG has failed.\n" ); - return 1; - } - if ( pAbc->pAbc8Nwk != NULL ) - Nwk_ManFree( pAbc->pAbc8Nwk ); - pAbc->pAbc8Nwk = pNtkNew; - return 0; - -usage: - if ( pPars->DelayTarget == -1 ) - sprintf( Buffer, "best possible" ); - else - sprintf( Buffer, "%.2f", pPars->DelayTarget ); - if ( pPars->nLutSize == -1 ) - sprintf( LutSize, "library" ); - else - sprintf( LutSize, "%d", pPars->nLutSize ); - Abc_Print( -2, "usage: *if [-KCFA num] [-DE float] [-qarlepmdbvh]\n" ); - Abc_Print( -2, "\t performs FPGA technology mapping of the network\n" ); - Abc_Print( -2, "\t-K num : the number of LUT inputs (2 < num < %d) [default = %s]\n", IF_MAX_LUTSIZE+1, LutSize ); - Abc_Print( -2, "\t-C num : the max number of priority cuts (0 < num < 2^12) [default = %d]\n", pPars->nCutsMax ); - Abc_Print( -2, "\t-F num : the number of area flow recovery iterations (num >= 0) [default = %d]\n", pPars->nFlowIters ); - Abc_Print( -2, "\t-A num : the number of exact area recovery iterations (num >= 0) [default = %d]\n", pPars->nAreaIters ); - Abc_Print( -2, "\t-D float : sets the delay constraint for the mapping [default = %s]\n", Buffer ); - Abc_Print( -2, "\t-E float : sets epsilon used for tie-breaking [default = %f]\n", pPars->Epsilon ); - Abc_Print( -2, "\t-q : toggles preprocessing using several starting points [default = %s]\n", pPars->fPreprocess? "yes": "no" ); - Abc_Print( -2, "\t-a : toggles area-oriented mapping [default = %s]\n", pPars->fArea? "yes": "no" ); -// Abc_Print( -2, "\t-f : toggles one fancy feature [default = %s]\n", pPars->fFancy? "yes": "no" ); - Abc_Print( -2, "\t-r : enables expansion/reduction of the best cuts [default = %s]\n", pPars->fExpRed? "yes": "no" ); - Abc_Print( -2, "\t-l : optimizes latch paths for delay, other paths for area [default = %s]\n", pPars->fLatchPaths? "yes": "no" ); - Abc_Print( -2, "\t-e : uses edge-based cut selection heuristics [default = %s]\n", pPars->fEdge? "yes": "no" ); - Abc_Print( -2, "\t-p : uses power-aware cut selection heuristics [default = %s]\n", pPars->fPower? "yes": "no" ); - Abc_Print( -2, "\t-m : enables cut minimization by removing vacuous variables [default = %s]\n", pPars->fCutMin? "yes": "no" ); -// Abc_Print( -2, "\t-s : toggles sequential mapping [default = %s]\n", pPars->fSeqMap? "yes": "no" ); - Abc_Print( -2, "\t-d : toggles deriving local AIGs using bi-decomposition [default = %s]\n", pPars->fBidec? "yes": "no" ); - Abc_Print( -2, "\t-b : toggles the use of one special feature [default = %s]\n", pPars->fUseBat? "yes": "no" ); - Abc_Print( -2, "\t-v : toggles verbose output [default = %s]\n", pPars->fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : prints the command usage\n"); - return 1; -} - - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8DChoice( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Aig_Man_t * pAigNew; - int fBalance, fVerbose, fUpdateLevel, fConstruct, c; - int nConfMax, nLevelMax; - extern Aig_Man_t * Ntl_ManPerformChoicing( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fConstruct, int nConfMax, int nLevelMax, int fVerbose ); - - // set defaults - fBalance = 1; - fUpdateLevel = 1; - fConstruct = 0; - nConfMax = 1000; - nLevelMax = 0; - fVerbose = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "CLblcvh" ) ) != EOF ) - { - switch ( c ) - { - case 'C': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" ); - goto usage; - } - nConfMax = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( nConfMax < 0 ) - goto usage; - break; - case 'L': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-L\" should be followed by an integer.\n" ); - goto usage; - } - nLevelMax = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( nLevelMax < 0 ) - goto usage; - break; - case 'b': - fBalance ^= 1; - break; - case 'l': - fUpdateLevel ^= 1; - break; - case 'c': - fConstruct ^= 1; - break; - case 'v': - fVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8DChoice(): There is no AIG to synthesize.\n" ); - return 1; - } - - // get the input file name - pAigNew = Ntl_ManPerformChoicing( pAbc->pAbc8Aig, fBalance, fUpdateLevel, fConstruct, nConfMax, nLevelMax, fVerbose ); - if ( pAigNew == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8DChoice(): Tranformation has failed.\n" ); - return 1; - } - Aig_ManStop( pAbc->pAbc8Aig ); - pAbc->pAbc8Aig = pAigNew; - return 0; - -usage: - Abc_Print( -2, "usage: *dchoice [-C num] [-L num] [-blcvh]\n" ); - Abc_Print( -2, "\t performs AIG-based synthesis and derives choices\n" ); - Abc_Print( -2, "\t-C num : the max number of conflicts at a node [default = %d]\n", nConfMax ); - Abc_Print( -2, "\t-L num : the max level of nodes to consider (0 = not used) [default = %d]\n", nLevelMax ); - Abc_Print( -2, "\t-b : toggle internal balancing [default = %s]\n", fBalance? "yes": "no" ); - Abc_Print( -2, "\t-l : toggle updating level [default = %s]\n", fUpdateLevel? "yes": "no" ); - Abc_Print( -2, "\t-c : toggle constructive computation of choices [default = %s]\n", fConstruct? "yes": "no" ); - Abc_Print( -2, "\t-v : toggle verbose printout [default = %s]\n", fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Dch( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Dch_Pars_t Pars, * pPars = &Pars; - Aig_Man_t * pAigNew; - int c; - extern Aig_Man_t * Ntl_ManPerformChoicingNew( Aig_Man_t * pAig, Dch_Pars_t * pPars ); - - // set defaults - Dch_ManSetDefaultParams( pPars ); - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "WCSsptfvh" ) ) != EOF ) - { - switch ( c ) - { - case 'W': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-W\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nWords = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nWords < 0 ) - goto usage; - break; - case 'C': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nBTLimit = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nBTLimit < 0 ) - goto usage; - break; - case 'S': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-S\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nSatVarMax = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nSatVarMax < 0 ) - goto usage; - break; - case 's': - pPars->fSynthesis ^= 1; - break; - case 'p': - pPars->fPower ^= 1; - break; - case 't': - pPars->fSimulateTfo ^= 1; - break; - case 'f': - pPars->fLightSynth ^= 1; - break; - case 'v': - pPars->fVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Dch(): There is no AIG to synthesize.\n" ); - return 1; - } - - // get the input file name - pAigNew = Ntl_ManPerformChoicingNew( pAbc->pAbc8Aig, pPars ); - if ( pAigNew == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Dch(): Tranformation has failed.\n" ); - return 1; - } -// Aig_ManStop( pAbc->pAbc8Aig ); - pAbc->pAbc8Aig = pAigNew; - return 0; - -usage: - Abc_Print( -2, "usage: *dch [-WCS num] [-sptfvh]\n" ); - Abc_Print( -2, "\t computes structural choices using a new approach\n" ); - Abc_Print( -2, "\t-W num : the max number of simulation words [default = %d]\n", pPars->nWords ); - Abc_Print( -2, "\t-C num : the max number of conflicts at a node [default = %d]\n", pPars->nBTLimit ); - Abc_Print( -2, "\t-S num : the max number of SAT variables [default = %d]\n", pPars->nSatVarMax ); - Abc_Print( -2, "\t-s : toggle synthesizing three snapshots [default = %s]\n", pPars->fSynthesis? "yes": "no" ); - Abc_Print( -2, "\t-p : toggle power-aware rewriting [default = %s]\n", pPars->fPower? "yes": "no" ); - Abc_Print( -2, "\t-t : toggle simulation of the TFO classes [default = %s]\n", pPars->fSimulateTfo? "yes": "no" ); - Abc_Print( -2, "\t-f : toggle using lighter logic synthesis [default = %s]\n", pPars->fLightSynth? "yes": "no" ); - Abc_Print( -2, "\t-v : toggle verbose printout [default = %s]\n", pPars->fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Dc2( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Aig_Man_t * pAigNew; - int c; - int fBalance; - int fUpdateLevel; - int fVerbose; - int fPower; - - extern Aig_Man_t * Dar_ManCompress2( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fFanout, int fPower, int fVerbose ); - - // set defaults - fBalance = 1; - fUpdateLevel = 1; - fPower = 0; - fVerbose = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "blpvh" ) ) != EOF ) - { - switch ( c ) - { - case 'b': - fBalance ^= 1; - break; - case 'l': - fUpdateLevel ^= 1; - break; - case 'p': - fPower ^= 1; - break; - case 'v': - fVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Dc2(): There is no AIG to synthesize.\n" ); - return 1; - } - - // get the input file name - pAigNew = Dar_ManCompress2( pAbc->pAbc8Aig, fBalance, fUpdateLevel, 1, fPower, fVerbose ); - if ( pAigNew == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Dc2(): Tranformation has failed.\n" ); - return 1; - } - Aig_ManStop( pAbc->pAbc8Aig ); - pAbc->pAbc8Aig = pAigNew; - return 0; - -usage: - Abc_Print( -2, "usage: *dc2 [-blpvh]\n" ); - Abc_Print( -2, "\t performs AIG-based synthesis without deriving choices\n" ); - Abc_Print( -2, "\t-b : toggle internal balancing [default = %s]\n", fBalance? "yes": "no" ); - Abc_Print( -2, "\t-l : toggle updating level [default = %s]\n", fUpdateLevel? "yes": "no" ); - Abc_Print( -2, "\t-p : toggle power-aware rewriting [default = %s]\n", fPower? "yes": "no" ); - Abc_Print( -2, "\t-v : toggle verbose printout [default = %s]\n", fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Bidec( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - int c; - - // set defaults - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF ) - { - switch ( c ) - { - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Nwk == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Bidec(): There is no mapped network to strash.\n" ); - return 1; - } - Nwk_ManBidecResyn( pAbc->pAbc8Nwk, 0 ); - return 0; - -usage: - Abc_Print( -2, "usage: *bidec [-h]\n" ); - Abc_Print( -2, "\t performs bi-decomposition of local functions\n" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Strash( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Aig_Man_t * pAigNew; - int c; - - // set defaults - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF ) - { - switch ( c ) - { - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Nwk == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Strash(): There is no mapped network to strash.\n" ); - return 1; - } - - pAigNew = Nwk_ManStrash( pAbc->pAbc8Nwk ); - if ( pAigNew == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Strash(): Tranformation has failed.\n" ); - return 1; - } - Aig_ManStop( pAbc->pAbc8Aig ); - pAbc->pAbc8Aig = pAigNew; - return 0; - -usage: - Abc_Print( -2, "usage: *st [-h]\n" ); - Abc_Print( -2, "\t performs structural hashing of mapped network\n" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Mfs( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Mfx_Par_t Pars, * pPars = &Pars; - int c; -// extern int Mfx_Perform( void * pNtk, Mfx_Par_t * pPars, If_Lib_t * pLutLib ); - - // set defaults - Mfx_ParsDefault( pPars ); - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "WFDMLCraespvwh" ) ) != EOF ) - { - switch ( c ) - { - case 'W': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-W\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nWinTfoLevs = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nWinTfoLevs < 0 ) - goto usage; - break; - case 'F': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-F\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nFanoutsMax = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nFanoutsMax < 1 ) - goto usage; - break; - case 'D': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-D\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nDepthMax = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nDepthMax < 0 ) - goto usage; - break; - case 'M': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-M\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nWinSizeMax = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nWinSizeMax < 0 ) - goto usage; - break; - case 'L': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-L\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nGrowthLevel = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nGrowthLevel < 0 || pPars->nGrowthLevel > ABC_INFINITY ) - goto usage; - break; - case 'C': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nBTLimit = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nBTLimit < 0 ) - goto usage; - break; - case 'r': - pPars->fResub ^= 1; - break; - case 'a': - pPars->fArea ^= 1; - break; - case 'e': - pPars->fMoreEffort ^= 1; - break; - case 's': - pPars->fSwapEdge ^= 1; - break; - case 'p': - pPars->fPower ^= 1; - break; - case 'v': - pPars->fVerbose ^= 1; - break; - case 'w': - pPars->fVeryVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Nwk == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Mfs(): There is no mapped network.\n" ); - return 1; - } - if ( pAbc->pAbc8Lib == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Mfs(): There is no LUT library.\n" ); - return 1; - } - if ( If_LutLibDelaysAreDifferent(pAbc->pAbc8Lib) ) - { - Abc_Print( -1, "Abc_CommandAbc8Mfs(): Cannot perform don't-care simplication with variable-pin-delay LUT model.\n" ); - Abc_Print( -1, "The delay model should be fixed-pin-delay, for example, the delay of all pins of all LUTs is 0.4.\n" ); - return 1; - } - - - // modify the current network - if ( !Mfx_Perform( pAbc->pAbc8Nwk, pPars, pAbc->pAbc8Lib ) ) - { - Abc_Print( -1, "Abc_CommandAbc8Mfs(): Command has failed.\n" ); - return 1; - } - return 0; - -usage: - Abc_Print( -2, "usage: *mfs [-WFDMLC num] [-raespvh]\n" ); - Abc_Print( -2, "\t performs don't-care-based optimization of logic networks\n" ); - Abc_Print( -2, "\t-W <num> : the number of levels in the TFO cone (0 <= num) [default = %d]\n", pPars->nWinTfoLevs ); - Abc_Print( -2, "\t-F <num> : the max number of fanouts to skip (1 <= num) [default = %d]\n", pPars->nFanoutsMax ); - Abc_Print( -2, "\t-D <num> : the max depth nodes to try (0 = no limit) [default = %d]\n", pPars->nDepthMax ); - Abc_Print( -2, "\t-M <num> : the max node count of windows to consider (0 = no limit) [default = %d]\n", pPars->nWinSizeMax ); - Abc_Print( -2, "\t-L <num> : the max increase in node level after resynthesis (0 <= num) [default = %d]\n", pPars->nGrowthLevel ); - Abc_Print( -2, "\t-C <num> : the max number of conflicts in one SAT run (0 = no limit) [default = %d]\n", pPars->nBTLimit ); - Abc_Print( -2, "\t-r : toggle resubstitution and dc-minimization [default = %s]\n", pPars->fResub? "resub": "dc-min" ); - Abc_Print( -2, "\t-a : toggle minimizing area or area+edges [default = %s]\n", pPars->fArea? "area": "area+edges" ); - Abc_Print( -2, "\t-e : toggle high-effort resubstitution [default = %s]\n", pPars->fMoreEffort? "yes": "no" ); - Abc_Print( -2, "\t-s : toggle evaluation of edge swapping [default = %s]\n", pPars->fSwapEdge? "yes": "no" ); - Abc_Print( -2, "\t-p : toggle power-aware optimization [default = %s]\n", pPars->fPower? "yes": "no" ); - Abc_Print( -2, "\t-v : toggle printing optimization summary [default = %s]\n", pPars->fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-w : toggle printing detailed stats for each node [default = %s]\n", pPars->fVeryVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Lutpack( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - int c; - - Abc_Print( -1, "This command is temporarily disabled.\n" ); - return 0; - - // set defaults - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "h" ) ) != EOF ) - { - switch ( c ) - { - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Nwk == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Lutpack(): There is no mapped network to strash.\n" ); - return 1; - } - - - return 0; -usage: -/* - Abc_Print( -2, "usage: *lp [-h]\n" ); - Abc_Print( -2, "usage: lutpack [-N <num>] [-Q <num>] [-S <num>] [-L <num>] [-szfovwh]\n" ); - Abc_Print( -2, "\t performs \"rewriting\" for LUT network;\n" ); - Abc_Print( -2, "\t determines LUT size as the max fanin count of a node;\n" ); - Abc_Print( -2, "\t if the network is not LUT-mapped, packs it into 6-LUTs\n" ); - Abc_Print( -2, "\t (there is another command for resynthesis after LUT mapping, \"imfs\")\n" ); - Abc_Print( -2, "\t-N <num> : the max number of LUTs in the structure (2 <= num) [default = %d]\n", pPars->nLutsMax ); - Abc_Print( -2, "\t-Q <num> : the max number of LUTs not in MFFC (0 <= num) [default = %d]\n", pPars->nLutsOver ); - Abc_Print( -2, "\t-S <num> : the max number of LUT inputs shared (0 <= num <= 3) [default = %d]\n", pPars->nVarsShared ); - Abc_Print( -2, "\t-L <num> : max level increase after resynthesis (0 <= num) [default = %d]\n", pPars->nGrowthLevel ); - Abc_Print( -2, "\t-s : toggle iteration till saturation [default = %s]\n", pPars->fSatur? "yes": "no" ); - Abc_Print( -2, "\t-z : toggle zero-cost replacements [default = %s]\n", pPars->fZeroCost? "yes": "no" ); - Abc_Print( -2, "\t-f : toggle using only first node and first cut [default = %s]\n", pPars->fFirst? "yes": "no" ); - Abc_Print( -2, "\t-o : toggle using old implementation [default = %s]\n", pPars->fOldAlgo? "yes": "no" ); - Abc_Print( -2, "\t-v : toggle verbose printout [default = %s]\n", pPars->fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-w : toggle detailed printout of decomposed functions [default = %s]\n", pPars->fVeryVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); -*/ - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Balance( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Aig_Man_t * pAigNew; - int c; - int fExor; - int fUpdateLevel; - int fVerbose; - extern Aig_Man_t * Dar_ManBalanceXor( Aig_Man_t * pAig, int fExor, int fUpdateLevel, int fVerbose ); - - // set defaults - fExor = 0; - fUpdateLevel = 1; - fVerbose = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "xlh" ) ) != EOF ) - { - switch ( c ) - { - case 'x': - fExor ^= 1; - break; - case 'l': - fUpdateLevel ^= 1; - break; - case 'v': - fVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Balance(): There is no AIG to synthesize.\n" ); - return 1; - } - - // get the input file name - pAigNew = Dar_ManBalanceXor( pAbc->pAbc8Aig, fExor, fUpdateLevel, fVerbose ); - if ( pAigNew == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Balance(): Tranformation has failed.\n" ); - return 1; - } - Aig_ManStop( pAbc->pAbc8Aig ); - pAbc->pAbc8Aig = pAigNew; - return 0; - -usage: - Abc_Print( -2, "usage: *b [-xlvh]\n" ); - Abc_Print( -2, "\t performs balancing of the AIG\n" ); - Abc_Print( -2, "\t-x : toggle using XOR-balancing [default = %s]\n", fExor? "yes": "no" ); - Abc_Print( -2, "\t-l : toggle updating level [default = %s]\n", fUpdateLevel? "yes": "no" ); - Abc_Print( -2, "\t-v : toggle verbose printout [default = %s]\n", fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Speedup( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Aig_Man_t * pAigNew; - int c; - int fUseLutLib = 0; - int Percentage = 100; - int Degree = 5; - int fVerbose = 0; - int fVeryVerbose = 0; - - // set defaults - fUseLutLib = 0; - Percentage = 5; - Degree = 2; - fVerbose = 0; - fVeryVerbose = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "PNlvwh" ) ) != EOF ) - { - switch ( c ) - { - case 'P': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-P\" should be followed by an integer.\n" ); - goto usage; - } - Percentage = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( Percentage < 1 || Percentage > 100 ) - goto usage; - break; - case 'N': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-N\" should be followed by an integer.\n" ); - goto usage; - } - Degree = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( Degree < 1 || Degree > 5 ) - goto usage; - break; - case 'l': - fUseLutLib ^= 1; - break; - case 'v': - fVerbose ^= 1; - break; - case 'w': - fVeryVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Nwk == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Speedup(): There is no mapped network to strash.\n" ); - return 1; - } - - pAigNew = Nwk_ManSpeedup( pAbc->pAbc8Nwk, fUseLutLib, Percentage, Degree, fVerbose, fVeryVerbose ); - if ( pAigNew == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Speedup(): Tranformation has failed.\n" ); - return 1; - } - Aig_ManStop( pAbc->pAbc8Aig ); - pAbc->pAbc8Aig = pAigNew; - return 0; - -usage: - Abc_Print( -2, "usage: *speedup [-P num] [-N num] [-lvwh]\n" ); - Abc_Print( -2, "\t transforms LUT-mapped network into an AIG with choices;\n" ); - Abc_Print( -2, "\t the choices are added to speedup the next round of mapping\n" ); - Abc_Print( -2, "\t-P <num> : delay delta defining critical path for library model [default = %d%%]\n", Percentage ); - Abc_Print( -2, "\t-N <num> : the max critical path degree for resynthesis (0 < num < 6) [default = %d]\n", Degree ); - Abc_Print( -2, "\t-l : toggle using unit- or LUT-library-delay model [default = %s]\n", fUseLutLib? "lib" : "unit" ); - Abc_Print( -2, "\t-v : toggle printing optimization summary [default = %s]\n", fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-w : toggle printing detailed stats for each node [default = %s]\n", fVeryVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Merge( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Nwk_LMPars_t Pars, * pPars = &Pars; - Vec_Int_t * vResult; - int c; - - // set defaults - memset( pPars, 0, sizeof(Nwk_LMPars_t) ); - pPars->nMaxLutSize = 5; // the max LUT size for merging (N=5) - pPars->nMaxSuppSize = 5; // the max total support size after merging (S=5) - pPars->nMaxDistance = 3; // the max number of nodes separating LUTs - pPars->nMaxLevelDiff = 2; // the max difference in levels - pPars->nMaxFanout = 100; // the max number of fanouts to traverse - pPars->fUseDiffSupp = 0; // enables the use of nodes with different support - pPars->fUseTfiTfo = 0; // enables the use of TFO/TFO nodes as candidates - pPars->fVeryVerbose = 0; // enables additional verbose output - pPars->fVerbose = 1; // enables verbose output - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "NSDLFscvwh" ) ) != EOF ) - { - switch ( c ) - { - case 'N': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-N\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nMaxLutSize = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nMaxLutSize < 2 ) - goto usage; - break; - case 'S': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-S\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nMaxSuppSize = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nMaxSuppSize < 2 ) - goto usage; - break; - case 'D': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-D\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nMaxDistance = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nMaxDistance < 2 ) - goto usage; - break; - case 'L': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-L\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nMaxLevelDiff = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nMaxLevelDiff < 2 ) - goto usage; - break; - case 'F': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-F\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nMaxFanout = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nMaxFanout < 2 ) - goto usage; - break; - case 's': - pPars->fUseDiffSupp ^= 1; - break; - case 'c': - pPars->fUseTfiTfo ^= 1; - break; - case 'w': - pPars->fVeryVerbose ^= 1; - break; - case 'v': - pPars->fVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Nwk == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Speedup(): There is no mapped network to merge LUTs.\n" ); - return 1; - } - - vResult = Nwk_ManLutMerge( pAbc->pAbc8Nwk, pPars ); - Vec_IntFree( vResult ); - return 0; - -usage: - Abc_Print( -2, "usage: *merge [-NSDLF num] [-scwvh]\n" ); - Abc_Print( -2, "\t creates pairs of topologically-related LUTs\n" ); - Abc_Print( -2, "\t-N <num> : the max LUT size for merging (1 < num) [default = %d]\n", pPars->nMaxLutSize ); - Abc_Print( -2, "\t-S <num> : the max total support size after merging (1 < num) [default = %d]\n", pPars->nMaxSuppSize ); - Abc_Print( -2, "\t-D <num> : the max distance in terms of LUTs (0 < num) [default = %d]\n", pPars->nMaxDistance ); - Abc_Print( -2, "\t-L <num> : the max difference in levels (0 <= num) [default = %d]\n", pPars->nMaxLevelDiff ); - Abc_Print( -2, "\t-F <num> : the max number of fanouts to stop traversal (0 < num) [default = %d]\n", pPars->nMaxFanout ); - Abc_Print( -2, "\t-s : toggle the use of nodes without support overlap [default = %s]\n", pPars->fUseDiffSupp? "yes" : "no" ); - Abc_Print( -2, "\t-c : toggle the use of TFI/TFO nodes as candidates [default = %s]\n", pPars->fUseTfiTfo? "yes" : "no" ); - Abc_Print( -2, "\t-w : toggle printing detailed stats for each node [default = %s]\n", pPars->fVeryVerbose? "yes": "no" ); - Abc_Print( -2, "\t-v : toggle printing optimization summary [default = %s]\n", pPars->fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Insert( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Ntl_Man_t * pNtlNew; - int c; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF ) - { - switch ( c ) - { - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Insert(): There is no design.\n" ); - return 1; - } - if ( pAbc->pAbc8Nwk == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Insert(): There is no network to insert.\n" ); - return 1; - } - pNtlNew = Ntl_ManInsertNtk( pAbc->pAbc8Ntl, pAbc->pAbc8Nwk ); - Abc_FrameClearDesign(); - pAbc->pAbc8Ntl = pNtlNew; - return 0; - -usage: - Abc_Print( -2, "usage: *insert [-h]\n" ); - Abc_Print( -2, "\t inserts the mapped network into the netlist\n" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8ClpLut( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Ntl_Man_t * pNtlNew; - int c; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF ) - { - switch ( c ) - { - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Insert(): There is no design.\n" ); - return 1; - } - pNtlNew = Ntl_ManDupCollapseLuts( pAbc->pAbc8Ntl ); - Abc_FrameClearDesign(); - pAbc->pAbc8Ntl = pNtlNew; - pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl ); - return 0; - -usage: - Abc_Print( -2, "usage: *clplut [-h]\n" ); - Abc_Print( -2, "\t collapses comb white boxes whose model name begins with \"LUT\"\n" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Fraig( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Ntl_Man_t * pNtlNew, * pNtlOld; - int c, fVerbose; - int nPartSize; - int nConfLimit; - int nLevelMax; - int fUseCSat; - - // set defaults - nPartSize = 0; - nConfLimit = 100; - nLevelMax = 0; - fUseCSat = 0; - fVerbose = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "PCLcvh" ) ) != EOF ) - { - switch ( c ) - { - case 'P': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-P\" should be followed by an integer.\n" ); - goto usage; - } - nPartSize = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( nPartSize < 0 ) - goto usage; - break; - case 'C': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" ); - goto usage; - } - nConfLimit = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( nConfLimit < 0 ) - goto usage; - break; - case 'L': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-L\" should be followed by an integer.\n" ); - goto usage; - } - nLevelMax = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( nLevelMax < 0 ) - goto usage; - break; - case 'c': - fUseCSat ^= 1; - break; - case 'v': - fVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Fraig(): There is no design to SAT sweep.\n" ); - return 1; - } - - // get the input file name - pNtlOld = pAbc->pAbc8Ntl; pAbc->pAbc8Ntl = NULL; - pNtlNew = Ntl_ManFraig( pNtlOld, nPartSize, nConfLimit, nLevelMax, fUseCSat, fVerbose ); - if ( pNtlNew == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Fraig(): Tranformation has failed.\n" ); - return 1; - } - - Abc_FrameClearDesign(); - pAbc->pAbc8Ntl = pNtlNew; - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Fraig(): Reading BLIF has failed.\n" ); - return 1; - } - pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl ); - if ( pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Fraig(): AIG extraction has failed.\n" ); - return 1; - } - return 0; - -usage: - Abc_Print( -2, "usage: *fraig [-P num] [-C num] [-L num] [-vh]\n" ); - Abc_Print( -2, "\t applies SAT sweeping to netlist with white-boxes\n" ); - Abc_Print( -2, "\t-P num : partition size (0 = partitioning is not used) [default = %d]\n", nPartSize ); - Abc_Print( -2, "\t-C num : limit on the number of conflicts [default = %d]\n", nConfLimit ); - Abc_Print( -2, "\t-L num : limit on node level to fraig (0 = fraig all nodes) [default = %d]\n", nLevelMax ); -// Abc_Print( -2, "\t-c : toggle using new AIG package and SAT solver [default = %s]\n", fUseCSat? "yes": "no" ); - Abc_Print( -2, "\t-v : toggle verbose printout [default = %s]\n", fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Scl( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Ntl_Man_t * pNtlNew, * pNtlOld; - int c; - int fLatchConst; - int fLatchEqual; - int fVerbose; - - // set defaults - fLatchConst = 1; - fLatchEqual = 1; - fVerbose = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "cevh" ) ) != EOF ) - { - switch ( c ) - { - case 'c': - fLatchConst ^= 1; - break; - case 'e': - fLatchEqual ^= 1; - break; - case 'v': - fVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Scl(): There is no design to SAT sweep.\n" ); - return 1; - } - - if ( Ntl_ManIsComb(pAbc->pAbc8Ntl) ) - { - Abc_Print( -1, "Abc_CommandAbc8Scl(): The network is combinational.\n" ); - return 0; - } - - // get the input file name - pNtlOld = pAbc->pAbc8Ntl; pAbc->pAbc8Ntl = NULL; - pNtlNew = Ntl_ManScl( pNtlOld, fLatchConst, fLatchEqual, fVerbose ); - if ( pNtlNew == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Scl(): Tranformation has failed.\n" ); - return 1; - } - - Abc_FrameClearDesign(); - pAbc->pAbc8Ntl = pNtlNew; - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Scl(): Reading BLIF has failed.\n" ); - return 1; - } - pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl ); - if ( pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Scl(): AIG extraction has failed.\n" ); - return 1; - } - return 0; - -usage: - Abc_Print( -2, "usage: *scl [-cevh]\n" ); - Abc_Print( -2, "\t performs sequential cleanup of the netlist\n" ); - Abc_Print( -2, "\t by removing nodes and latches that do not feed into POs\n" ); - Abc_Print( -2, "\t-c : sweep stuck-at latches detected by ternary simulation [default = %s]\n", fLatchConst? "yes": "no" ); - Abc_Print( -2, "\t-e : merge equal latches (same data inputs and init states) [default = %s]\n", fLatchEqual? "yes": "no" ); - Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Lcorr( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Ntl_Man_t * pNtlNew, * pNtlOld; - int c; - int fScorrGia; - int fUseCSat; - int nFramesP; - int nConfMax; - int fVerbose; - - // set defaults - fScorrGia = 0; - fUseCSat = 0; - nFramesP = 0; - nConfMax = 10000; - fVerbose = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "PCncvh" ) ) != EOF ) - { - switch ( c ) - { - case 'P': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-P\" should be followed by an integer.\n" ); - goto usage; - } - nFramesP = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( nFramesP < 0 ) - goto usage; - break; - case 'C': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" ); - goto usage; - } - nConfMax = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( nConfMax < 0 ) - goto usage; - break; - case 'n': - fScorrGia ^= 1; - break; - case 'c': - fUseCSat ^= 1; - break; - case 'v': - fVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Lcorr(): There is no design to SAT sweep.\n" ); - return 1; - } - - if ( Ntl_ManIsComb(pAbc->pAbc8Ntl) ) - { - Abc_Print( -1, "Abc_CommandAbc8Lcorr(): The network is combinational.\n" ); - return 0; - } - - // get the input file name - pNtlOld = pAbc->pAbc8Ntl; pAbc->pAbc8Ntl = NULL; - pNtlNew = Ntl_ManLcorr( pNtlOld, nConfMax, fScorrGia, fUseCSat, fVerbose ); - if ( pNtlNew == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Lcorr(): Tranformation has failed.\n" ); - return 1; - } - - Abc_FrameClearDesign(); - pAbc->pAbc8Ntl = pNtlNew; - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Lcorr(): Reading BLIF has failed.\n" ); - return 1; - } - pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl ); - if ( pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Lcorr(): AIG extraction has failed.\n" ); - return 1; - } - return 0; - -usage: - Abc_Print( -2, "usage: *lcorr [-C num] [-ncvh]\n" ); - Abc_Print( -2, "\t computes latch correspondence for the netlist\n" ); -// Abc_Print( -2, "\t-P num : number of time frames to use as the prefix [default = %d]\n", nFramesP ); - Abc_Print( -2, "\t-C num : limit on the number of conflicts [default = %d]\n", nConfMax ); - Abc_Print( -2, "\t-n : toggle using new AIG package [default = %s]\n", fScorrGia? "yes": "no" ); - Abc_Print( -2, "\t-c : toggle using new AIG package and SAT solver [default = %s]\n", fUseCSat? "yes": "no" ); - Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Ssw( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Ntl_Man_t * pNtlNew, * pNtlOld; - Fra_Ssw_t Pars, * pPars = &Pars; - int c; - - // set defaults - pPars->nPartSize = 0; - pPars->nOverSize = 0; - pPars->nFramesP = 0; - pPars->nFramesK = 1; - pPars->nMaxImps = 5000; - pPars->nMaxLevs = 0; - pPars->nMinDomSize = 100; - pPars->fUseImps = 0; - pPars->fRewrite = 0; - pPars->fFraiging = 0; - pPars->fLatchCorr = 0; - pPars->fWriteImps = 0; - pPars->fUse1Hot = 0; - pPars->fVerbose = 0; - pPars->TimeLimit = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "PQNFILDirfletvh" ) ) != EOF ) - { - switch ( c ) - { - case 'P': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-P\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nPartSize = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nPartSize < 2 ) - goto usage; - break; - case 'Q': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-Q\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nOverSize = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nOverSize < 0 ) - goto usage; - break; - case 'N': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-N\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nFramesP = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nFramesP < 0 ) - goto usage; - break; - case 'F': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-F\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nFramesK = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nFramesK <= 0 ) - goto usage; - break; - case 'I': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-I\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nMaxImps = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nMaxImps <= 0 ) - goto usage; - break; - case 'L': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-L\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nMaxLevs = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nMaxLevs <= 0 ) - goto usage; - break; - case 'D': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-D\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nMinDomSize = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nMinDomSize <= 0 ) - goto usage; - break; - case 'i': - pPars->fUseImps ^= 1; - break; - case 'r': - pPars->fRewrite ^= 1; - break; - case 'f': - pPars->fFraiging ^= 1; - break; - case 'l': - pPars->fLatchCorr ^= 1; - break; - case 'e': - pPars->fWriteImps ^= 1; - break; - case 't': - pPars->fUse1Hot ^= 1; - break; - case 'v': - pPars->fVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Ssw(): There is no design to SAT sweep.\n" ); - return 1; - } - - if ( Ntl_ManIsComb(pAbc->pAbc8Ntl) ) - { - Abc_Print( -1, "The network is combinational.\n" ); - return 0; - } - - if ( pPars->nFramesK > 1 && pPars->fUse1Hot ) - { - Abc_Print( -1, "Currrently can only use one-hotness for simple induction (K=1).\n" ); - return 0; - } - - if ( pPars->nFramesP && pPars->fUse1Hot ) - { - Abc_Print( -1, "Currrently can only use one-hotness without prefix.\n" ); - return 0; - } - - // get the input file name - pNtlOld = pAbc->pAbc8Ntl; pAbc->pAbc8Ntl = NULL; - pNtlNew = Ntl_ManSsw( pNtlOld, pPars ); - if ( pNtlNew == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Ssw(): Tranformation has failed.\n" ); - return 1; - } - - Abc_FrameClearDesign(); - pAbc->pAbc8Ntl = pNtlNew; - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Ssw(): Reading BLIF has failed.\n" ); - return 1; - } - pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl ); - if ( pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Ssw(): AIG extraction has failed.\n" ); - return 1; - } - return 0; - -usage: - Abc_Print( -2, "usage: *ssw [-PQNFLD num] [-lrfetvh]\n" ); - Abc_Print( -2, "\t performs sequential sweep using K-step induction on the netlist \n" ); - Abc_Print( -2, "\t-P num : max partition size (0 = no partitioning) [default = %d]\n", pPars->nPartSize ); - Abc_Print( -2, "\t-Q num : partition overlap (0 = no overlap) [default = %d]\n", pPars->nOverSize ); - Abc_Print( -2, "\t-N num : number of time frames to use as the prefix [default = %d]\n", pPars->nFramesP ); - Abc_Print( -2, "\t-F num : number of time frames for induction (1=simple) [default = %d]\n", pPars->nFramesK ); - Abc_Print( -2, "\t-L num : max number of levels to consider (0=all) [default = %d]\n", pPars->nMaxLevs ); - Abc_Print( -2, "\t-D num : min size of a clock domain used for synthesis [default = %d]\n", pPars->nMinDomSize ); -// Abc_Print( -2, "\t-I num : max number of implications to consider [default = %d]\n", pPars->nMaxImps ); -// Abc_Print( -2, "\t-i : toggle using implications [default = %s]\n", pPars->fUseImps? "yes": "no" ); - Abc_Print( -2, "\t-l : toggle latch correspondence only [default = %s]\n", pPars->fLatchCorr? "yes": "no" ); - Abc_Print( -2, "\t-r : toggle AIG rewriting [default = %s]\n", pPars->fRewrite? "yes": "no" ); - Abc_Print( -2, "\t-f : toggle fraiging (combinational SAT sweeping) [default = %s]\n", pPars->fFraiging? "yes": "no" ); - Abc_Print( -2, "\t-e : toggle writing implications as assertions [default = %s]\n", pPars->fWriteImps? "yes": "no" ); - Abc_Print( -2, "\t-t : toggle using one-hotness conditions [default = %s]\n", pPars->fUse1Hot? "yes": "no" ); - Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", pPars->fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Scorr( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Ntl_Man_t * pNtlNew, * pNtlOld; - Ssw_Pars_t Pars, * pPars = &Pars; - int c; - - // set defaults - Ssw_ManSetDefaultParams( pPars ); - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "PQFCLSDVMpldsncvh" ) ) != EOF ) - { - switch ( c ) - { - case 'P': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-P\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nPartSize = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nPartSize < 2 ) - goto usage; - break; - case 'Q': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-Q\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nOverSize = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nOverSize < 0 ) - goto usage; - break; - case 'F': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-F\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nFramesK = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nFramesK <= 0 ) - goto usage; - break; - case 'C': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nBTLimit = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nBTLimit <= 0 ) - goto usage; - break; - case 'L': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-L\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nMaxLevs = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nMaxLevs <= 0 ) - goto usage; - break; - case 'S': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-S\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nFramesAddSim = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nFramesAddSim < 0 ) - goto usage; - break; - case 'D': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-D\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nMinDomSize = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nMinDomSize < 0 ) - goto usage; - break; - case 'V': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-V\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nSatVarMax2 = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nSatVarMax2 < 0 ) - goto usage; - break; - case 'M': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-M\" should be followed by an integer.\n" ); - goto usage; - } - pPars->nRecycleCalls2 = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pPars->nRecycleCalls2 < 0 ) - goto usage; - break; - case 'p': - pPars->fPolarFlip ^= 1; - break; - case 'l': - pPars->fLatchCorr ^= 1; - break; - case 'd': - pPars->fDynamic ^= 1; - break; - case 's': - pPars->fLocalSim ^= 1; - break; - case 'n': - pPars->fScorrGia ^= 1; - break; - case 'c': - pPars->fUseCSat ^= 1; - break; - case 'v': - pPars->fVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Ssw(): There is no design to SAT sweep.\n" ); - return 1; - } - - if ( Ntl_ManIsComb(pAbc->pAbc8Ntl) ) - { - Abc_Print( -1, "The network is combinational.\n" ); - return 0; - } - - if ( pPars->fDynamic && (pPars->nPartSize || pPars->nOverSize) ) - { - pPars->nPartSize = 0; - pPars->nOverSize = 0; - Abc_Print( -1, "With dynamic partitioning (-d) enabled, static one (-P <num> -Q <num>) is ignored.\n" ); - } - - // get the input file name - pNtlOld = pAbc->pAbc8Ntl; pAbc->pAbc8Ntl = NULL; - pNtlNew = Ntl_ManScorr( pNtlOld, pPars ); - if ( pNtlNew == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Scorr(): Tranformation has failed.\n" ); - return 1; - } - - Abc_FrameClearDesign(); - pAbc->pAbc8Ntl = pNtlNew; - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Scorr(): Reading BLIF has failed.\n" ); - return 1; - } - pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl ); - if ( pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Scorr(): AIG extraction has failed.\n" ); - return 1; - } - return 0; - -usage: - Abc_Print( -2, "usage: *scorr [-PQFCLSDVM num] [-pldsncvh]\n" ); - Abc_Print( -2, "\t performs sequential sweep using K-step induction\n" ); - Abc_Print( -2, "\t-P num : max partition size (0 = no partitioning) [default = %d]\n", pPars->nPartSize ); - Abc_Print( -2, "\t-Q num : partition overlap (0 = no overlap) [default = %d]\n", pPars->nOverSize ); - Abc_Print( -2, "\t-F num : number of time frames for induction (1=simple) [default = %d]\n", pPars->nFramesK ); - Abc_Print( -2, "\t-C num : max number of conflicts at a node (0=inifinite) [default = %d]\n", pPars->nBTLimit ); - Abc_Print( -2, "\t-L num : max number of levels to consider (0=all) [default = %d]\n", pPars->nMaxLevs ); - Abc_Print( -2, "\t-S num : additional simulation frames for c-examples (0=none) [default = %d]\n", pPars->nFramesAddSim ); - Abc_Print( -2, "\t-D num : min size of a clock domain used for synthesis [default = %d]\n", pPars->nMinDomSize ); - Abc_Print( -2, "\t-V num : min var num needed to recycle the SAT solver [default = %d]\n", pPars->nSatVarMax2 ); - Abc_Print( -2, "\t-M num : min call num needed to recycle the SAT solver [default = %d]\n", pPars->nRecycleCalls2 ); - Abc_Print( -2, "\t-p : toggle alighning polarity of SAT variables [default = %s]\n", pPars->fPolarFlip? "yes": "no" ); - Abc_Print( -2, "\t-l : toggle latch correspondence only [default = %s]\n", pPars->fLatchCorr? "yes": "no" ); - Abc_Print( -2, "\t-d : toggle dynamic addition of constraints [default = %s]\n", pPars->fDynamic? "yes": "no" ); - Abc_Print( -2, "\t-s : toggle local simulation in the cone of influence [default = %s]\n", pPars->fLocalSim? "yes": "no" ); - Abc_Print( -2, "\t-n : toggle using new AIG package [default = %s]\n", pPars->fScorrGia? "yes": "no" ); - Abc_Print( -2, "\t-c : toggle using new AIG package and SAT solver [default = %s]\n", pPars->fUseCSat? "yes": "no" ); - Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", pPars->fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Sweep( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Ntl_Man_t * pNtlTemp; - int Counter; - int fMapped; - int fVerbose; - int c; - - // set defaults - fMapped = 0; - fVerbose = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "mvh" ) ) != EOF ) - { - switch ( c ) - { - case 'm': - fMapped ^= 1; - break; - case 'v': - fVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Sweep(): There is no design to sweep.\n" ); - return 1; - } - - // if mapped, insert the network - if ( fMapped ) - { - if ( pAbc->pAbc8Nwk == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Sweep(): There is no mapped network to sweep.\n" ); - return 1; - } - pNtlTemp = Ntl_ManInsertNtk( pAbc->pAbc8Ntl, pAbc->pAbc8Nwk ); - if ( pNtlTemp == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Sweep(): Inserting mapped network has failed.\n" ); - return 1; - } - Abc_FrameClearDesign(); - pAbc->pAbc8Ntl = pNtlTemp; - } - - // sweep the current design - Counter = Ntl_ManSweep( pAbc->pAbc8Ntl, fVerbose ); - if ( Counter == 0 && fVerbose ) - Abc_Print( -1, "The netlist is unchanged by sweep.\n" ); - - // if mapped, create new AIG and new mapped network - if ( fMapped ) - { - pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl ); - if ( pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Sweep(): AIG extraction has failed.\n" ); - return 1; - } - pAbc->pAbc8Nwk = Ntl_ManExtractNwk( pAbc->pAbc8Ntl, pAbc->pAbc8Aig, NULL ); - if ( pAbc->pAbc8Nwk == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Sweep(): Failed to extract the mapped network.\n" ); - return 1; - } - } - else // remove old AIG/mapped and create new AIG - { - pNtlTemp = pAbc->pAbc8Ntl; pAbc->pAbc8Ntl = NULL; - Abc_FrameClearDesign(); - pAbc->pAbc8Ntl = pNtlTemp; - // extract new AIG - pAbc->pAbc8Aig = Ntl_ManExtract( pAbc->pAbc8Ntl ); - if ( pAbc->pAbc8Aig == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Sweep(): AIG extraction has failed.\n" ); - return 1; - } - } - return 0; - -usage: - Abc_Print( -2, "usage: *sw [-mvh]\n" ); - Abc_Print( -2, "\t performs structural sweep of the netlist\n" ); - Abc_Print( -2, "\t removes dangling nodes, registers, and white-boxes\n" ); - Abc_Print( -2, "\t-m : inserts mapped network into netlist and sweeps it [default = %s]\n", fMapped? "yes": "no" ); - Abc_Print( -2, "\t-v : toggles verbose output [default = %s]\n", fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Zero( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Ntl_Man_t * pNtlNew; - int fVerbose; - int c; - - // set defaults - fVerbose = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF ) - { - switch ( c ) - { - case 'v': - fVerbose ^= 1; - break; - case 'h': - goto usage; - default: - goto usage; - } - } - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Zero(): There is no design to convert.\n" ); - return 1; - } - - // transform the registers - pNtlNew = pAbc->pAbc8Ntl; - pAbc->pAbc8Ntl = NULL; - Ntl_ManTransformInitValues( pNtlNew ); - - // replace the design - Abc_FrameClearDesign(); - pAbc->pAbc8Ntl = pNtlNew; - return 0; - -usage: - Abc_Print( -2, "usage: *zero [-h]\n" ); - Abc_Print( -2, "\t converts registers to have constant-0 initial value\n" ); - Abc_Print( -2, "\t-v : toggles verbose output [default = %s]\n", fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8Cec( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Aig_Man_t * pAig1, * pAig2; - Ntl_Man_t * pTemp1, * pTemp2; - char ** pArgvNew; - int nArgcNew; - int c; - int fVerbose; - int nConfLimit; - int fSmart; - int nPartSize; - extern int Fra_FraigCecTop( Aig_Man_t * pMan1, Aig_Man_t * pMan2, int nConfLimit, int nPartSize, int fSmart, int fVerbose ); - - // set defaults - nConfLimit = 100000; - nPartSize = 100; - fSmart = 0; - fVerbose = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "CPsvh" ) ) != EOF ) - { - switch ( c ) - { - case 'C': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-C\" should be followed by an integer.\n" ); - goto usage; - } - nConfLimit = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( nConfLimit < 0 ) - goto usage; - break; - case 'P': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-P\" should be followed by an integer.\n" ); - goto usage; - } - nPartSize = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( nPartSize < 0 ) - goto usage; - break; - case 's': - fSmart ^= 1; - break; - case 'v': - fVerbose ^= 1; - break; - default: - goto usage; - } - } - - pArgvNew = argv + globalUtilOptind; - nArgcNew = argc - globalUtilOptind; - if ( nArgcNew != 0 && nArgcNew != 2 ) - { - Abc_Print( -1, "Currently can only compare current mapped network against the spec, or designs derived from two files.\n" ); - return 0; - } - if ( nArgcNew == 2 ) - { - Ntl_ManPrepareCec( pArgvNew[0], pArgvNew[1], &pAig1, &pAig2 ); - if ( !pAig1 || !pAig2 ) - return 1; - Fra_FraigCecTop( pAig1, pAig2, nConfLimit, nPartSize, fSmart, fVerbose ); - Aig_ManStop( pAig1 ); - Aig_ManStop( pAig2 ); - return 0; - } - - if ( pAbc->pAbc8Ntl == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Cec(): There is no design to verify.\n" ); - return 1; - } - if ( pAbc->pAbc8Nwk == NULL ) - { - Abc_Print( -1, "Abc_CommandAbc8Cec(): There is no mapped network to verify.\n" ); - return 1; - } -// Abc_Print( -1, "Currently *cec works only for two designs given on command line.\n" ); - - // insert the mapped network - pTemp1 = Ntl_ManDup( pAbc->pAbc8Ntl ); - pTemp2 = Ntl_ManInsertNtk( pAbc->pAbc8Ntl, pAbc->pAbc8Nwk ); - if ( pTemp2 == NULL ) - { - Ntl_ManFree( pTemp1 ); - Abc_Print( -1, "Abc_CommandAbc8Cec(): Inserting the design has failed.\n" ); - return 1; - } - Ntl_ManPrepareCecMans( pTemp1, pTemp2, &pAig1, &pAig2 ); - Ntl_ManFree( pTemp1 ); - Ntl_ManFree( pTemp2 ); - if ( !pAig1 || !pAig2 ) - return 1; - Fra_FraigCecTop( pAig1, pAig2, nConfLimit, nPartSize, fSmart, fVerbose ); - Aig_ManStop( pAig1 ); - Aig_ManStop( pAig2 ); - return 0; - -usage: - Abc_Print( -2, "usage: *cec [-C num] [-P num] [-svh] <file1> <file2>\n" ); - Abc_Print( -2, "\t performs combinational equivalence checking\n" ); - Abc_Print( -2, "\t-C num : limit on the number of conflicts [default = %d]\n", nConfLimit ); - Abc_Print( -2, "\t-P num : the partition size for partitioned CEC [default = %d]\n", nPartSize ); - Abc_Print( -2, "\t-s : toggle smart and natural output partitioning [default = %s]\n", fSmart? "smart": "natural" ); - Abc_Print( -2, "\t-v : toggles verbose output [default = %s]\n", fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - Abc_Print( -2, "\tfile1 : (optional) the file with the first network\n"); - Abc_Print( -2, "\tfile2 : (optional) the file with the second network\n"); - Abc_Print( -2, "\t if no files are given, uses the current network and its spec\n"); - Abc_Print( -2, "\t if two files are given, compares designs derived from files\n"); - return 1; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_CommandAbc8DSec( Abc_Frame_t * pAbc, int argc, char ** argv ) -{ - Fra_Sec_t SecPar, * pSecPar = &SecPar; - Aig_Man_t * pAig; - char ** pArgvNew; - int nArgcNew; - int c; - - extern void Fra_SecSetDefaultParams( Fra_Sec_t * pSecPar ); - extern int Fra_FraigSec( Aig_Man_t * p, Fra_Sec_t * pSecPar, Aig_Man_t ** ppResult ); - - // set defaults - Fra_SecSetDefaultParams( pSecPar ); - pSecPar->nFramesMax = 4; - pSecPar->fPhaseAbstract = 0; - pSecPar->fRetimeFirst = 0; - pSecPar->fRetimeRegs = 0; - Extra_UtilGetoptReset(); - while ( ( c = Extra_UtilGetopt( argc, argv, "Farmfwvh" ) ) != EOF ) - { - switch ( c ) - { - case 'F': - if ( globalUtilOptind >= argc ) - { - Abc_Print( -1, "Command line switch \"-F\" should be followed by an integer.\n" ); - goto usage; - } - pSecPar->nFramesMax = atoi(argv[globalUtilOptind]); - globalUtilOptind++; - if ( pSecPar->nFramesMax < 0 ) - goto usage; - break; - case 'a': - pSecPar->fPhaseAbstract ^= 1; - break; - case 'r': - pSecPar->fRetimeFirst ^= 1; - break; - case 'm': - pSecPar->fRetimeRegs ^= 1; - break; - case 'f': - pSecPar->fFraiging ^= 1; - break; - case 'w': - pSecPar->fVeryVerbose ^= 1; - break; - case 'v': - pSecPar->fVerbose ^= 1; - break; - default: - goto usage; - } - } - - pArgvNew = argv + globalUtilOptind; - nArgcNew = argc - globalUtilOptind; - if ( nArgcNew != 2 ) - { - Abc_Print( -1, "Only works for two designs written from files specified on the command line.\n" ); - return 1; - } - - pAig = Ntl_ManPrepareSec( pArgvNew[0], pArgvNew[1] ); - if ( pAig == NULL ) - return 0; - Fra_FraigSec( pAig, pSecPar, NULL ); - Aig_ManStop( pAig ); - return 0; - -usage: - Abc_Print( -2, "usage: *dsec [-F num] [-armfwvh] <file1> <file2>\n" ); - Abc_Print( -2, "\t performs sequential equivalence checking for two designs\n" ); - Abc_Print( -2, "\t-F num : the limit on the depth of induction [default = %d]\n", pSecPar->nFramesMax ); - Abc_Print( -2, "\t-a : toggles the use of phase abstraction [default = %s]\n", pSecPar->fPhaseAbstract? "yes": "no" ); - Abc_Print( -2, "\t-r : toggles forward retiming at the beginning [default = %s]\n", pSecPar->fRetimeFirst? "yes": "no" ); - Abc_Print( -2, "\t-m : toggles min-register retiming [default = %s]\n", pSecPar->fRetimeRegs? "yes": "no" ); - Abc_Print( -2, "\t-f : toggles the internal use of fraiging [default = %s]\n", pSecPar->fFraiging? "yes": "no" ); - Abc_Print( -2, "\t-v : toggles verbose output [default = %s]\n", pSecPar->fVerbose? "yes": "no" ); - Abc_Print( -2, "\t-w : toggles additional verbose output [default = %s]\n", pSecPar->fVeryVerbose? "yes": "no" ); - Abc_Print( -2, "\t-h : print the command usage\n"); - Abc_Print( -2, "\tfile1 : the file with the first design\n"); - Abc_Print( -2, "\tfile2 : the file with the second design\n"); -// Abc_Print( -2, "\t if no files are given, uses the current network and its spec\n"); -// Abc_Print( -2, "\t if one file is given, uses the current network and the file\n"); - return 1; -} - - /**Function************************************************************* Synopsis [] @@ -24791,7 +21607,7 @@ int Abc_CommandAbc9Put( Abc_Frame_t * pAbc, int argc, char ** argv ) Abc_NtkForEachCi( pNtk, pObj, i ) { if (i < Vec_PtrSize(pAbc->pGia->vNamesIn)) { Nm_ManDeleteIdName(pNtk->pManName, pObj->Id); - Abc_ObjAssignName( pObj, Vec_PtrEntry(pAbc->pGia->vNamesIn, i), NULL ); + Abc_ObjAssignName( pObj, (char *)Vec_PtrEntry(pAbc->pGia->vNamesIn, i), NULL ); } } } @@ -28188,14 +25004,14 @@ int Abc_CommandAbc9If( Abc_Frame_t * pAbc, int argc, char ** argv ) int c; extern void Gia_ManSetIfParsDefault( If_Par_t * pPars ); extern int Gia_MappingIf( Gia_Man_t * p, If_Par_t * pPars ); - if ( pAbc->pAbc8Lib == NULL ) - { - Abc_Print( -1, "LUT library is not given. Using default LUT library.\n" ); - pAbc->pAbc8Lib = If_SetSimpleLutLib( 6 ); - } // set defaults Gia_ManSetIfParsDefault( pPars ); - pPars->pLutLib = pAbc->pAbc8Lib; +// if ( pAbc->pAbc8Lib == NULL ) +// { +// Abc_Print( -1, "LUT library is not given. Using default LUT library.\n" ); +// pAbc->pAbc8Lib = If_SetSimpleLutLib( 6 ); +// } +// pPars->pLutLib = pAbc->pAbc8Lib; Extra_UtilGetoptReset(); while ( ( c = Extra_UtilGetopt( argc, argv, "KCFADEqaflepmrsdbvh" ) ) != EOF ) { diff --git a/src/base/abci/abcAbc8.c b/src/base/abci/abcAbc8.c deleted file mode 100644 index 3bfaaa98..00000000 --- a/src/base/abci/abcAbc8.c +++ /dev/null @@ -1,280 +0,0 @@ -/**CFile**************************************************************** - - FileName [abcAbc8.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Network and node package.] - - Synopsis [] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: abcAbc8.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "abc.h" -#include "nwk.h" -#include "mfx.h" - -#include "main.h" - -ABC_NAMESPACE_IMPL_START - - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Converts old ABC network into new ABC network.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Nwk_Man_t * Abc_NtkToNtkNew( Abc_Ntk_t * pNtk ) -{ - Vec_Ptr_t * vNodes; - Nwk_Man_t * pNtkNew; - Nwk_Obj_t * pObjNew; - Abc_Obj_t * pObj, * pFanin; - int i, k; - if ( !Abc_NtkIsLogic(pNtk) ) - { - fprintf( stdout, "This is not a logic network.\n" ); - return 0; - } - // convert into the AIG - if ( !Abc_NtkToAig(pNtk) ) - { - fprintf( stdout, "Converting to AIGs has failed.\n" ); - return 0; - } - assert( Abc_NtkHasAig(pNtk) ); - // construct the network - pNtkNew = Nwk_ManAlloc(); - pNtkNew->pName = Extra_UtilStrsav( pNtk->pName ); - pNtkNew->pSpec = Extra_UtilStrsav( pNtk->pSpec ); - Abc_NtkForEachCi( pNtk, pObj, i ) - pObj->pCopy = (Abc_Obj_t *)Nwk_ManCreateCi( pNtkNew, Abc_ObjFanoutNum(pObj) ); - vNodes = Abc_NtkDfs( pNtk, 1 ); - Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i ) - { - pObjNew = Nwk_ManCreateNode( pNtkNew, Abc_ObjFaninNum(pObj), Abc_ObjFanoutNum(pObj) ); - Abc_ObjForEachFanin( pObj, pFanin, k ) - Nwk_ObjAddFanin( pObjNew, (Nwk_Obj_t *)pFanin->pCopy ); - pObjNew->pFunc = Hop_Transfer( (Hop_Man_t *)pNtk->pManFunc, pNtkNew->pManHop, (Hop_Obj_t *)pObj->pData, Abc_ObjFaninNum(pObj) ); - pObj->pCopy = (Abc_Obj_t *)pObjNew; - } - Vec_PtrFree( vNodes ); - Abc_NtkForEachCo( pNtk, pObj, i ) - { - pObjNew = Nwk_ManCreateCo( pNtkNew ); - Nwk_ObjAddFanin( pObjNew, (Nwk_Obj_t *)Abc_ObjFanin0(pObj)->pCopy ); - } -// if ( !Nwk_ManCheck( pNtkNew ) ) -// fprintf( stdout, "Abc_NtkToNtkNew(): Network check has failed.\n" ); - return pNtkNew; -} - -/**Function************************************************************* - - Synopsis [Converts new ABC network into old ABC network.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Abc_NtkFromNtkNew( Abc_Ntk_t * pNtkOld, Nwk_Man_t * pNtk ) -{ - Vec_Ptr_t * vNodes; - Abc_Ntk_t * pNtkNew; - Abc_Obj_t * pObjNew, * pFaninNew; - Nwk_Obj_t * pObj, * pFanin; - int i, k; - // construct the network - pNtkNew = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_AIG, 1 ); - pNtkNew->pName = Extra_UtilStrsav( pNtk->pName ); - pNtkNew->pSpec = Extra_UtilStrsav( pNtk->pSpec ); - Nwk_ManForEachCi( pNtk, pObj, i ) - { - pObjNew = Abc_NtkCreatePi( pNtkNew ); - pObj->pCopy = (Nwk_Obj_t *)pObjNew; - Abc_ObjAssignName( pObjNew, Abc_ObjName( Abc_NtkCi(pNtkOld, i) ), NULL ); - } - vNodes = Nwk_ManDfs( pNtk ); - Vec_PtrForEachEntry( Nwk_Obj_t *, vNodes, pObj, i ) - { - if ( !Nwk_ObjIsNode(pObj) ) - continue; - pObjNew = Abc_NtkCreateNode( pNtkNew ); - Nwk_ObjForEachFanin( pObj, pFanin, k ) - Abc_ObjAddFanin( pObjNew, (Abc_Obj_t *)pFanin->pCopy ); - pObjNew->pData = Hop_Transfer( pNtk->pManHop, (Hop_Man_t *)pNtkNew->pManFunc, pObj->pFunc, Nwk_ObjFaninNum(pObj) ); - pObj->pCopy = (Nwk_Obj_t *)pObjNew; - } - Vec_PtrFree( vNodes ); - Nwk_ManForEachCo( pNtk, pObj, i ) - { - pObjNew = Abc_NtkCreatePo( pNtkNew ); - if ( pObj->fInvert ) - pFaninNew = Abc_NtkCreateNodeInv( pNtkNew, (Abc_Obj_t *)Nwk_ObjFanin0(pObj)->pCopy ); - else - pFaninNew = (Abc_Obj_t *)Nwk_ObjFanin0(pObj)->pCopy; - Abc_ObjAddFanin( pObjNew, pFaninNew ); - Abc_ObjAssignName( pObjNew, Abc_ObjName( Abc_NtkCo(pNtkOld, i) ), NULL ); - } - if ( !Abc_NtkCheck( pNtkNew ) ) - fprintf( stdout, "Abc_NtkFromNtkNew(): Network check has failed.\n" ); - return pNtkNew; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Abc_NtkNtkTest2( Abc_Ntk_t * pNtk ) -{ - extern void Abc_NtkSupportSum( Abc_Ntk_t * pNtk ); - Abc_Ntk_t * pNtkNew; - Nwk_Man_t * pMan; - int clk; - -clk = clock(); - Abc_NtkSupportSum( pNtk ); -ABC_PRT( "Time", clock() - clk ); - - pMan = Abc_NtkToNtkNew( pNtk ); -clk = clock(); - Nwk_ManSupportSum( pMan ); -ABC_PRT( "Time", clock() - clk ); - - pNtkNew = Abc_NtkFromNtkNew( pNtk, pMan ); - Nwk_ManFree( pMan ); - return pNtkNew; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Abc_NtkNtkTest3( Abc_Ntk_t * pNtk ) -{ - extern void Abc_NtkSupportSum( Abc_Ntk_t * pNtk ); - extern void * Abc_FrameReadLibLut(); - - Abc_Ntk_t * pNtkNew; - Nwk_Man_t * pMan; - int clk; - -clk = clock(); - printf( "%6.2f\n", Abc_NtkDelayTraceLut( pNtk, 1 ) ); -ABC_PRT( "Time", clock() - clk ); - - pMan = Abc_NtkToNtkNew( pNtk ); - pMan->pLutLib = (If_Lib_t *)Abc_FrameReadLibLut(); -clk = clock(); - printf( "%6.2f\n", Nwk_ManDelayTraceLut( pMan ) ); -ABC_PRT( "Time", clock() - clk ); - - pNtkNew = Abc_NtkFromNtkNew( pNtk, pMan ); - Nwk_ManFree( pMan ); - return pNtkNew; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Abc_NtkNtkTest4( Abc_Ntk_t * pNtk, If_Lib_t * pLutLib ) -{ - - Mfx_Par_t Pars, * pPars = &Pars; - Abc_Ntk_t * pNtkNew; - Nwk_Man_t * pMan; - pMan = Abc_NtkToNtkNew( pNtk ); - - Mfx_ParsDefault( pPars ); - Mfx_Perform( pMan, pPars, pLutLib ); - - pNtkNew = Abc_NtkFromNtkNew( pNtk, pMan ); - Nwk_ManFree( pMan ); - return pNtkNew; -} - -/**Function************************************************************* - - Synopsis [] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Abc_NtkNtkTest( Abc_Ntk_t * pNtk, If_Lib_t * pLutLib ) -{ - Vec_Ptr_t * vNodes; - extern Vec_Ptr_t * Nwk_ManRetimeCutForward( Nwk_Man_t * pMan, int nLatches, int fVerbose ); - extern Vec_Ptr_t * Nwk_ManRetimeCutBackward( Nwk_Man_t * pMan, int nLatches, int fVerbose ); - - Abc_Ntk_t * pNtkNew; - Nwk_Man_t * pMan; - pMan = Abc_NtkToNtkNew( pNtk ); - - vNodes = Nwk_ManRetimeCutBackward( pMan, Abc_NtkLatchNum(pNtk), 1 ); -// vNodes = Nwk_ManRetimeCutForward( pMan, Abc_NtkLatchNum(pNtk), 1 ); - Vec_PtrFree( vNodes ); - - pNtkNew = Abc_NtkFromNtkNew( pNtk, pMan ); - Nwk_ManFree( pMan ); - return pNtkNew; -} - - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - - -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/abci/abcAttach.c b/src/base/abci/abcAttach.c index d1712f4d..6408b54f 100644 --- a/src/base/abci/abcAttach.c +++ b/src/base/abci/abcAttach.c @@ -18,9 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "main.h" -#include "mio.h" +#include "src/base/abc/abc.h" +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcAuto.c b/src/base/abci/abcAuto.c index 02d5fd17..e1e479e3 100644 --- a/src/base/abci/abcAuto.c +++ b/src/base/abci/abcAuto.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcBalance.c b/src/base/abci/abcBalance.c index a4fa0451..c46fd4b7 100644 --- a/src/base/abci/abcBalance.c +++ b/src/base/abci/abcBalance.c @@ -18,8 +18,7 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcBidec.c b/src/base/abci/abcBidec.c index bae29e07..fc093420 100644 --- a/src/base/abci/abcBidec.c +++ b/src/base/abci/abcBidec.c @@ -18,9 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "bdc.h" -#include "kit.h" +#include "src/base/abc/abc.h" +#include "src/bool/bdc/bdc.h" +#include "src/bool/kit/kit.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcBm.c b/src/base/abci/abcBm.c index 25fba5fd..3a8567fe 100644 --- a/src/base/abci/abcBm.c +++ b/src/base/abci/abcBm.c @@ -27,10 +27,10 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" -#include "sim.h" -#include "satSolver.h" +#include "src/base/abc/abc.h" +#include "src/opt/sim/sim.h" +#include "src/sat/bsat/satSolver.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcBmc.c b/src/base/abci/abcBmc.c index 21f2d484..6ea4435c 100644 --- a/src/base/abci/abcBmc.c +++ b/src/base/abci/abcBmc.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "ivy.h" +#include "src/base/abc/abc.h" +#include "src/aig/ivy/ivy.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcCas.c b/src/base/abci/abcCas.c index 68c91343..7e80c919 100644 --- a/src/base/abci/abcCas.c +++ b/src/base/abci/abcCas.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcCascade.c b/src/base/abci/abcCascade.c index 533321c5..a477077d 100644 --- a/src/base/abci/abcCascade.c +++ b/src/base/abci/abcCascade.c @@ -18,8 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "reo.h" +#include "src/base/abc/abc.h" +#include "src/bdd/reo/reo.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START @@ -263,7 +264,7 @@ int Abc_ResCofCount( DdManager * dd, DdNode * bFunc, unsigned uMask, int * pChec Vec_PtrFree( vCofs ); if ( pCheck ) { - *pCheck = Abc_ResCheckNonStrict( Pattern, nVars, Extra_Base2Log(Result) ); + *pCheck = Abc_ResCheckNonStrict( Pattern, nVars, Abc_Base2Log(Result) ); /* if ( *pCheck == 1 && nVars == 4 && Result == 8 ) { @@ -290,7 +291,7 @@ int Abc_ResCofCount( DdManager * dd, DdNode * bFunc, unsigned uMask, int * pChec int Abc_ResCost( DdManager * dd, DdNode * bFunc, unsigned uMask, int * pnCofs, int * pCheck ) { int nCofs = Abc_ResCofCount( dd, bFunc, uMask, pCheck ); - int n2Log = Extra_Base2Log( nCofs ); + int n2Log = Abc_Base2Log( nCofs ); if ( pnCofs ) *pnCofs = nCofs; return 10000 * n2Log + (nCofs - (1 << (n2Log-1))) * (nCofs - (1 << (n2Log-1))); } @@ -360,7 +361,7 @@ void Abc_ResPrint( DdManager * dd, DdNode * bFunc, int nInputs, unsigned uParts[ CostAll += Cost; for ( k = 0; k < nInputs; k++ ) printf( "%c", (uParts[i] & (1 << k))? 'a' + k : '-' ); - printf( " %2d %d-%d %6d ", nCofs, Extra_Base2Log(nCofs), fCheck, Cost ); + printf( " %2d %d-%d %6d ", nCofs, Abc_Base2Log(nCofs), fCheck, Cost ); } printf( "%4d\n", CostAll ); } @@ -390,7 +391,7 @@ void Abc_ResPrintAllCofs( DdManager * dd, DdNode * bFunc, int nInputs, int nCofM for ( k = 0; k < nInputs; k++ ) printf( "%c", (i & (1 << k))? 'a' + k : '-' ); printf( " n=%2d c=%2d l=%d-%d %6d\n", - Extra_WordCountOnes(i), nCofs, Extra_Base2Log(nCofs), fCheck, Cost ); + Extra_WordCountOnes(i), nCofs, Abc_Base2Log(nCofs), fCheck, Cost ); } } diff --git a/src/base/abci/abcCollapse.c b/src/base/abci/abcCollapse.c index 07996b9a..69525e2f 100644 --- a/src/base/abci/abcCollapse.c +++ b/src/base/abci/abcCollapse.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcCut.c b/src/base/abci/abcCut.c index a08ce490..6116649e 100644 --- a/src/base/abci/abcCut.c +++ b/src/base/abci/abcCut.c @@ -18,9 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "cut.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/opt/cut/cut.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcDar.c b/src/base/abci/abcDar.c index 4a74ad7e..b032b4e4 100644 --- a/src/base/abci/abcDar.c +++ b/src/base/abci/abcDar.c @@ -18,22 +18,22 @@ ***********************************************************************/ -#include "abc.h" -#include "main.h" -#include "giaAig.h" -#include "dar.h" -#include "cnf.h" -#include "fra.h" -#include "fraig.h" -#include "int.h" -#include "dch.h" -#include "ssw.h" -#include "cgt.h" -#include "bbr.h" -#include "gia.h" -#include "cec.h" -#include "csw.h" -#include "pdr.h" +#include "src/base/abc/abc.h" +#include "src/base/main/main.h" +#include "src/aig/gia/giaAig.h" +#include "src/opt/dar/dar.h" +#include "src/sat/cnf/cnf.h" +#include "src/proof/fra/fra.h" +#include "src/proof/fraig/fraig.h" +#include "src/proof/int/int.h" +#include "src/proof/dch/dch.h" +#include "src/proof/ssw/ssw.h" +#include "src/opt/cgt/cgt.h" +#include "src/proof/bbr/bbr.h" +#include "src/aig/gia/gia.h" +#include "src/proof/cec/cec.h" +#include "src/opt/csw/csw.h" +#include "src/proof/pdr/pdr.h" ABC_NAMESPACE_IMPL_START @@ -358,7 +358,7 @@ Abc_Ntk_t * Abc_NtkFromDarSeqSweep( Abc_Ntk_t * pNtkOld, Aig_Man_t * pMan ) } */ assert( Abc_NtkBoxNum(pNtkOld) == Abc_NtkLatchNum(pNtkOld) ); - nDigits = Extra_Base10Log( Abc_NtkLatchNum(pNtkNew) ); + nDigits = Abc_Base10Log( Abc_NtkLatchNum(pNtkNew) ); Abc_NtkForEachLatch( pNtkNew, pObjNew, i ) { pLatch = Abc_NtkBox( pNtkOld, Vec_IntEntry( pMan->vFlopNums, i ) ); @@ -1669,7 +1669,7 @@ Abc_Ntk_t * Abc_NtkDarLcorrNew( Abc_Ntk_t * pNtk, int nVarsMax, int nConfMax, in /* #include <signal.h> -#include "utilMem.h" +#include "src/misc/util/utilMem.h" static void sigfunc( int signo ) { if (signo == SIGINT) { @@ -2160,10 +2160,10 @@ int Abc_NtkDarDemiterDual( Abc_Ntk_t * pNtk, int fVerbose ) } // create new AIG ABC_FREE( pPart0->pName ); - pPart0->pName = Aig_UtilStrsav( "part0" ); + pPart0->pName = Abc_UtilStrsav( "part0" ); // create new AIGs ABC_FREE( pPart1->pName ); - pPart1->pName = Aig_UtilStrsav( "part1" ); + pPart1->pName = Abc_UtilStrsav( "part1" ); // create file names pFileNameGeneric = Extra_FileNameGeneric( pNtk->pSpec ); sprintf( pFileName0, "%s%s", pFileNameGeneric, "_part0.aig" ); @@ -3831,8 +3831,8 @@ int Abc_NtkDarReach( Abc_Ntk_t * pNtk, Saig_ParBbr_t * pPars ) ABC_NAMESPACE_IMPL_END -#include "amap.h" -#include "mio.h" +#include "src/map/amap/amap.h" +#include "src/map/mio/mio.h" ABC_NAMESPACE_IMPL_START @@ -4095,7 +4095,7 @@ void Abc_NtkDarConstrProfile( Abc_Ntk_t * pNtk, int fVerbose ) printf( "Primary output : ", i ); else printf( "Constraint %3d : ", i-(Saig_ManPoNum(pMan) - Saig_ManConstrNum(pMan)) ); - printf( "ProbOne = %f ", Aig_Int2Float(Entry) ); + printf( "ProbOne = %f ", Abc_Int2Float(Entry) ); printf( "AllZeroValue = %d ", Aig_ObjPhase(pObj) ); printf( "\n" ); } diff --git a/src/base/abci/abcDebug.c b/src/base/abci/abcDebug.c index 43ceb63a..baf87944 100644 --- a/src/base/abci/abcDebug.c +++ b/src/base/abci/abcDebug.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "ioAbc.h" +#include "src/base/abc/abc.h" +#include "src/base/io/ioAbc.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcDress.c b/src/base/abci/abcDress.c index c9c956e4..745dcac0 100644 --- a/src/base/abci/abcDress.c +++ b/src/base/abci/abcDress.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "ioAbc.h" +#include "src/base/abc/abc.h" +#include "src/base/io/ioAbc.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcDress2.c b/src/base/abci/abcDress2.c index 039a4fed..fbaf833a 100644 --- a/src/base/abci/abcDress2.c +++ b/src/base/abci/abcDress2.c @@ -18,9 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "aig.h" -#include "dch.h" +#include "src/base/abc/abc.h" +#include "src/aig/aig/aig.h" +#include "src/proof/dch/dch.h" ABC_NAMESPACE_IMPL_START @@ -392,8 +392,8 @@ void Abc_NtkDressPrintStats( Vec_Ptr_t * vRes, int nNodes0, int nNodes1, int Tim NegAll[1] += Neg[1]; // total negative polarity in network 1 // assuming that the name can be transferred to only one node - PairsAll += ABC_MIN(Neg[0] + Pos[0], Neg[1] + Pos[1]); - PairsOne += ABC_MIN(Neg[0], Neg[1]) + ABC_MIN(Pos[0], Pos[1]); + PairsAll += Abc_MinInt(Neg[0] + Pos[0], Neg[1] + Pos[1]); + PairsOne += Abc_MinInt(Neg[0], Neg[1]) + Abc_MinInt(Pos[0], Pos[1]); } printf( "Total number of equiv classes = %7d.\n", Vec_PtrSize(vRes) ); printf( "Participating nodes from both networks = %7d.\n", NegAll[0]+PosAll[0]+NegAll[1]+PosAll[1] ); diff --git a/src/base/abci/abcDsd.c b/src/base/abci/abcDsd.c index 250cac14..c4086ce7 100644 --- a/src/base/abci/abcDsd.c +++ b/src/base/abci/abcDsd.c @@ -18,9 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" -#include "dsd.h" +#include "src/base/abc/abc.h" +#include "src/misc/extra/extraBdd.h" +#include "src/bdd/dsd/dsd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcEspresso.c b/src/base/abci/abcEspresso.c index c8c1d8e1..2e78ad3f 100644 --- a/src/base/abci/abcEspresso.c +++ b/src/base/abci/abcEspresso.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "espresso.h" +#include "base/abc/abc.h" +#include "misc/espresso/espresso.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcExtract.c b/src/base/abci/abcExtract.c index 8eca34a6..e6b4193b 100644 --- a/src/base/abci/abcExtract.c +++ b/src/base/abci/abcExtract.c @@ -18,7 +18,7 @@ ***********************************************************************/ -#include "abc.h" +#include "src/base/abc/abc.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcFlop.c b/src/base/abci/abcFlop.c index a735f279..6ed411f7 100644 --- a/src/base/abci/abcFlop.c +++ b/src/base/abci/abcFlop.c @@ -18,7 +18,7 @@ ***********************************************************************/ -#include "abc.h" +#include "base/abc/abc.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcFpga.c b/src/base/abci/abcFpga.c index 0c45c7d2..4d6b2978 100644 --- a/src/base/abci/abcFpga.c +++ b/src/base/abci/abcFpga.c @@ -18,8 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "fpgaInt.h" +#include "src/base/abc/abc.h" +#include "src/map/fpga/fpgaInt.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcFpgaFast.c b/src/base/abci/abcFpgaFast.c index 46572fa8..1c5693fd 100644 --- a/src/base/abci/abcFpgaFast.c +++ b/src/base/abci/abcFpgaFast.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "ivy.h" +#include "src/base/abc/abc.h" +#include "src/aig/ivy/ivy.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcFraig.c b/src/base/abci/abcFraig.c index 1beab4f4..e1c12b3f 100644 --- a/src/base/abci/abcFraig.c +++ b/src/base/abci/abcFraig.c @@ -18,9 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "fraig.h" -#include "main.h" +#include "src/base/abc/abc.h" +#include "src/proof/fraig/fraig.h" +#include "src/base/main/main.h" ABC_NAMESPACE_IMPL_START @@ -722,7 +722,7 @@ Abc_Ntk_t * Abc_NtkFraigRestore() // no more than 256M for one circuit (128M + 128M) nWords1 = 32; nWords2 = (1<<27) / (Abc_NtkNodeNum(pNtk) + Abc_NtkCiNum(pNtk)); - nWordsMin = ABC_MIN( nWords1, nWords2 ); + nWordsMin = Abc_MinInt( nWords1, nWords2 ); // set parameters for fraiging Fraig_ParamsSetDefault( &Params ); diff --git a/src/base/abci/abcFxu.c b/src/base/abci/abcFxu.c index dbbcb1b1..2470a1d1 100644 --- a/src/base/abci/abcFxu.c +++ b/src/base/abci/abcFxu.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "fxu.h" +#include "src/base/abc/abc.h" +#include "src/opt/fxu/fxu.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcGen.c b/src/base/abci/abcGen.c index 3299a968..55191021 100644 --- a/src/base/abci/abcGen.c +++ b/src/base/abci/abcGen.c @@ -18,8 +18,7 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" ABC_NAMESPACE_IMPL_START @@ -122,7 +121,7 @@ void Abc_GenSorter( char * pFileName, int nVars ) fprintf( pFile, "\n" ); Counter = 0; - nDigits = Extra_Base10Log( (nVars-2)*nVars ); + nDigits = Abc_Base10Log( (nVars-2)*nVars ); if ( nVars == 2 ) fprintf( pFile, ".subckt Comp a=x00 b=x01 x=y00 y=y01\n" ); else @@ -427,7 +426,7 @@ void Abc_GenFpga( char * pFileName, int nLutSize, int nLuts, int nVars ) int fGenerateFunc = 1; FILE * pFile; int nVarsLut = (1 << nLutSize); // the number of LUT variables - int nVarsLog = Extra_Base2Log( nVars + nLuts - 1 ); // the number of encoding vars + int nVarsLog = Abc_Base2Log( nVars + nLuts - 1 ); // the number of encoding vars int nVarsDeg = (1 << nVarsLog); // the number of LUT variables (total) int nParsLut = nLuts * (1 << nLutSize); // the number of LUT params int nParsVar = nLuts * nLutSize * nVarsLog; // the number of var params @@ -548,12 +547,12 @@ void Abc_GenOneHot( char * pFileName, int nVars ) fprintf( pFile, "# One-hotness condition for %d vars generated by ABC on %s\n", nVars, Extra_TimeStamp() ); fprintf( pFile, ".model 1hot_%dvars\n", nVars ); fprintf( pFile, ".inputs" ); - nDigitsIn = Extra_Base10Log( nVars ); + nDigitsIn = Abc_Base10Log( nVars ); for ( i = 0; i < nVars; i++ ) fprintf( pFile, " i%0*d", nDigitsIn, i ); fprintf( pFile, "\n" ); fprintf( pFile, ".outputs" ); - nDigitsOut = Extra_Base10Log( nVars * (nVars - 1) / 2 ); + nDigitsOut = Abc_Base10Log( nVars * (nVars - 1) / 2 ); for ( i = 0; i < nVars * (nVars - 1) / 2; i++ ) fprintf( pFile, " o%0*d", nDigitsOut, i ); fprintf( pFile, "\n" ); @@ -598,12 +597,12 @@ void Abc_GenOneHotIntervals( char * pFileName, int nPis, int nRegs, Vec_Ptr_t * fprintf( pFile, "}\n" ); fprintf( pFile, ".model 1hot_%dvars_%dregs\n", nPis, nRegs ); fprintf( pFile, ".inputs" ); - nDigitsIn = Extra_Base10Log( nPis+nRegs ); + nDigitsIn = Abc_Base10Log( nPis+nRegs ); for ( i = 0; i < nPis+nRegs; i++ ) fprintf( pFile, " i%0*d", nDigitsIn, i ); fprintf( pFile, "\n" ); fprintf( pFile, ".outputs" ); - nDigitsOut = Extra_Base10Log( Counter ); + nDigitsOut = Abc_Base10Log( Counter ); for ( i = 0; i < Counter; i++ ) fprintf( pFile, " o%0*d", nDigitsOut, i ); fprintf( pFile, "\n" ); @@ -626,7 +625,7 @@ void Abc_GenOneHotIntervals( char * pFileName, int nPis, int nRegs, Vec_Ptr_t * ABC_NAMESPACE_IMPL_END -#include "aig.h" +#include "src/aig/aig/aig.h" ABC_NAMESPACE_IMPL_START @@ -646,7 +645,7 @@ void Abc_GenRandom( char * pFileName, int nPis ) { FILE * pFile; unsigned * pTruth; - int i, b, w, nWords = Aig_TruthWordNum( nPis ); + int i, b, w, nWords = Abc_TruthWordNum( nPis ); int nDigitsIn; Aig_ManRandom( 1 ); pTruth = ABC_ALLOC( unsigned, nWords ); @@ -656,18 +655,18 @@ void Abc_GenRandom( char * pFileName, int nPis ) fprintf( pFile, "# Random function with %d inputs generated by ABC on %s\n", nPis, Extra_TimeStamp() ); fprintf( pFile, ".model rand%d\n", nPis ); fprintf( pFile, ".inputs" ); - nDigitsIn = Extra_Base10Log( nPis ); + nDigitsIn = Abc_Base10Log( nPis ); for ( i = 0; i < nPis; i++ ) fprintf( pFile, " i%0*d", nDigitsIn, i ); fprintf( pFile, "\n" ); fprintf( pFile, ".outputs f\n" ); fprintf( pFile, ".names" ); - nDigitsIn = Extra_Base10Log( nPis ); + nDigitsIn = Abc_Base10Log( nPis ); for ( i = 0; i < nPis; i++ ) fprintf( pFile, " i%0*d", nDigitsIn, i ); fprintf( pFile, " f\n" ); for ( i = 0; i < (1<<nPis); i++ ) - if ( Aig_InfoHasBit(pTruth, i) ) + if ( Abc_InfoHasBit(pTruth, i) ) { for ( b = nPis-1; b >= 0; b-- ) fprintf( pFile, "%d", (i>>b)&1 ); diff --git a/src/base/abci/abcHaig.c b/src/base/abci/abcHaig.c index b102e04f..073defd0 100644 --- a/src/base/abci/abcHaig.c +++ b/src/base/abci/abcHaig.c @@ -18,7 +18,7 @@ ***********************************************************************/ -#include "abc.h" +#include "src/base/abc/abc.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcIf.c b/src/base/abci/abcIf.c index 674a4550..ded34d3c 100644 --- a/src/base/abci/abcIf.c +++ b/src/base/abci/abcIf.c @@ -18,11 +18,11 @@ ***********************************************************************/ -#include "abc.h" -#include "main.h" -#include "if.h" -#include "kit.h" -#include "aig.h" +#include "src/base/abc/abc.h" +#include "src/base/main/main.h" +#include "src/map/if/if.h" +#include "src/bool/kit/kit.h" +#include "src/aig/aig/aig.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcIfMux.c b/src/base/abci/abcIfMux.c index bf9d6cff..545adafb 100644 --- a/src/base/abci/abcIfMux.c +++ b/src/base/abci/abcIfMux.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "if.h" +#include "src/base/abc/abc.h" +#include "src/map/if/if.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcIvy.c b/src/base/abci/abcIvy.c index 28ff0ee6..c2637a08 100644 --- a/src/base/abci/abcIvy.c +++ b/src/base/abci/abcIvy.c @@ -18,13 +18,14 @@ ***********************************************************************/ -#include "abc.h" -#include "dec.h" -#include "fra.h" -#include "ivy.h" -#include "fraig.h" -#include "mio.h" -#include "aig.h" +#include "src/base/abc/abc.h" +#include "src/bool/dec/dec.h" +#include "src/proof/fra/fra.h" +#include "src/aig/ivy/ivy.h" +#include "src/proof/fraig/fraig.h" +#include "src/map/mio/mio.h" +#include "src/aig/aig/aig.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcLog.c b/src/base/abci/abcLog.c index ecccb36b..aa926a41 100644 --- a/src/base/abci/abcLog.c +++ b/src/base/abci/abcLog.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "gia.h" +#include "src/base/abc/abc.h" +#include "src/aig/gia/gia.h" ABC_NAMESPACE_IMPL_START @@ -102,7 +102,7 @@ void Abc_NtkWriteLogFile( char * pFileName, Abc_Cex_t * pCex, int Status, int nF else { for ( i = 0; i < pCex->nRegs; i++ ) - fprintf( pFile, "%d", Gia_InfoHasBit(pCex->pData,i) ); + fprintf( pFile, "%d", Abc_InfoHasBit(pCex->pData,i) ); } fprintf( pFile, "\n" ); // write <TRACE> @@ -112,7 +112,7 @@ void Abc_NtkWriteLogFile( char * pFileName, Abc_Cex_t * pCex, int Status, int nF { assert( pCex->nBits - pCex->nRegs == pCex->nPis * (pCex->iFrame + 1) ); for ( i = pCex->nRegs; i < pCex->nBits; i++ ) - fprintf( pFile, "%d", Gia_InfoHasBit(pCex->pData,i) ); + fprintf( pFile, "%d", Abc_InfoHasBit(pCex->pData,i) ); } fprintf( pFile, "\n" ); fclose( pFile ); @@ -211,7 +211,7 @@ int Abc_NtkReadLogFile( char * pFileName, Abc_Cex_t ** ppCex, int * pnFrames ) assert( Vec_IntSize(vNums) == pCex->nBits ); for ( c = 0; c < pCex->nBits; c++ ) if ( Vec_IntEntry(vNums, c) ) - Gia_InfoSetBit( pCex->pData, c ); + Abc_InfoSetBit( pCex->pData, c ); Vec_IntFree( vNums ); if ( ppCex ) *ppCex = pCex; diff --git a/src/base/abci/abcLut.c b/src/base/abci/abcLut.c index 98991e25..1653918f 100644 --- a/src/base/abci/abcLut.c +++ b/src/base/abci/abcLut.c @@ -18,9 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" -#include "cut.h" +#include "src/base/abc/abc.h" +#include "src/opt/cut/cut.h" ABC_NAMESPACE_IMPL_START @@ -175,7 +174,7 @@ int Abc_NtkSuperChoiceLut( Abc_Ntk_t * pNtk, int nLutSize, int nCutSizeMax, int if ( Abc_ObjFaninNum(pFanin) == 1 ) pFanin = Abc_ObjFanin0( pFanin ); // get the new level - LevelMax = ABC_MAX( LevelMax, (int)pFanin->Level ); + LevelMax = Abc_MaxInt( LevelMax, (int)pFanin->Level ); } if ( fVerbose ) @@ -516,7 +515,7 @@ int Abc_NodeGetLevel( Abc_Obj_t * pObj ) int i, Level; Level = 0; Abc_ObjForEachFanin( pObj, pFanin, i ) - Level = ABC_MAX( Level, (int)pFanin->Level ); + Level = Abc_MaxInt( Level, (int)pFanin->Level ); return Level + 1; } @@ -723,7 +722,7 @@ int Abc_NodeDecomposeStep( Abc_ManScl_t * p ) return 0; } // the number of cofactors is acceptable - nVarsNew = Extra_Base2Log( nClasses ); + nVarsNew = Abc_Base2Log( nClasses ); assert( nVarsNew < p->nLutSize ); // create the remainder truth table // for each class of cofactors, multiply cofactor truth table by its code diff --git a/src/base/abci/abcLutmin.c b/src/base/abci/abcLutmin.c index 6d62f330..d740777c 100644 --- a/src/base/abci/abcLutmin.c +++ b/src/base/abci/abcLutmin.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START @@ -418,8 +418,8 @@ Abc_Obj_t * Abc_NtkBddCurtis( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode, Vec_Ptr_t DdManager * ddNew = (DdManager *)pNtkNew->pManFunc; DdNode * bCof, * bUniq, * bMint, * bTemp, * bFunc, * bBits[10], ** pbCodeVars; Abc_Obj_t * pNodeNew = NULL, * pNodeBS[10]; - int nLutSize = Extra_Base2Log( Vec_PtrSize(vCofs) ); - int nBits = Extra_Base2Log( Vec_PtrSize(vUniq) ); + int nLutSize = Abc_Base2Log( Vec_PtrSize(vCofs) ); + int nBits = Abc_Base2Log( Vec_PtrSize(vUniq) ); int b, c, u, i; assert( nBits + 2 <= nLutSize ); assert( nLutSize < Abc_ObjFaninNum(pNode) ); diff --git a/src/base/abci/abcMap.c b/src/base/abci/abcMap.c index 578727cc..eeeaf15f 100644 --- a/src/base/abci/abcMap.c +++ b/src/base/abci/abcMap.c @@ -18,10 +18,10 @@ ***********************************************************************/ -#include "abc.h" -#include "main.h" -#include "mio.h" -#include "mapper.h" +#include "src/base/abc/abc.h" +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" +#include "src/map/mapper/mapper.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcMeasure.c b/src/base/abci/abcMeasure.c index 5352084f..a366b830 100644 --- a/src/base/abci/abcMeasure.c +++ b/src/base/abci/abcMeasure.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "kit.h" +#include "src/base/abc/abc.h" +#include "src/bool/kit/kit.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcMerge.c b/src/base/abci/abcMerge.c index d7abece8..917a97da 100644 --- a/src/base/abci/abcMerge.c +++ b/src/base/abci/abcMerge.c @@ -18,9 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "aig.h" -#include "nwkMerge.h" +#include "src/base/abc/abc.h" +#include "src/aig/aig/aig.h" +#include "src/opt/nwk/nwkMerge.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcMffc.c b/src/base/abci/abcMffc.c index b4510bd0..b88452e8 100644 --- a/src/base/abci/abcMffc.c +++ b/src/base/abci/abcMffc.c @@ -18,7 +18,7 @@ ***********************************************************************/ -#include "abc.h" +#include "src/base/abc/abc.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcMini.c b/src/base/abci/abcMini.c index 429c40c6..0af87d36 100644 --- a/src/base/abci/abcMini.c +++ b/src/base/abci/abcMini.c @@ -18,7 +18,7 @@ ***********************************************************************/ -#include "abc.h" +#include "src/base/abc/abc.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcMiter.c b/src/base/abci/abcMiter.c index 9cda4608..66734c04 100644 --- a/src/base/abci/abcMiter.c +++ b/src/base/abci/abcMiter.c @@ -18,8 +18,7 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcMulti.c b/src/base/abci/abcMulti.c index 299e22d5..c8247b28 100644 --- a/src/base/abci/abcMulti.c +++ b/src/base/abci/abcMulti.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcMv.c b/src/base/abci/abcMv.c index 98d27a19..5f612b62 100644 --- a/src/base/abci/abcMv.c +++ b/src/base/abci/abcMv.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcNpnSave.c b/src/base/abci/abcNpnSave.c index 568a3e28..b57d2ef3 100644 --- a/src/base/abci/abcNpnSave.c +++ b/src/base/abci/abcNpnSave.c @@ -18,9 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "aig.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/aig/aig/aig.h" ABC_NAMESPACE_IMPL_START @@ -81,7 +80,7 @@ static Npn_Man_t * pNpnMan = NULL; void Npn_TruthPermute_rec( char * pStr, int mid, int end ) { static int count = 0; - char * pTemp = Aig_UtilStrsav(pStr); + char * pTemp = Abc_UtilStrsav(pStr); char e; int i; if ( mid == end ) @@ -329,7 +328,7 @@ static inline word Npn_TruthCanon( word t, int nVars, int * pPhase ) } else { - if ( ABC_MIN(pSigs[2*v],pSigs[2*v+1]) >= ABC_MIN(pSigs[2*(v+1)],pSigs[2*(v+1)+1]) ) + if ( Abc_MinInt(pSigs[2*v],pSigs[2*v+1]) >= Abc_MinInt(pSigs[2*(v+1)],pSigs[2*(v+1)+1]) ) continue; } fChange = 1; @@ -400,7 +399,7 @@ clk = clock(); pBinsOld = p->pBins; nBinsOld = p->nBins; // get the new Bins - p->nBins = Aig_PrimeCudd( 3 * nBinsOld ); + p->nBins = Abc_PrimeCudd( 3 * nBinsOld ); p->pBins = ABC_CALLOC( int, p->nBins ); // rehash the entries from the old table Counter = 1; @@ -594,7 +593,7 @@ Npn_Man_t * Npn_ManStart( char * pFileName ) p->nBufferSize = 1000000; p->nBufferSize = 100; p->pBuffer = ABC_ALLOC( Npn_Obj_t, p->nBufferSize ); - p->nBins = Aig_PrimeCudd( p->nBufferSize / 2 ); + p->nBins = Abc_PrimeCudd( p->nBufferSize / 2 ); p->pBins = ABC_CALLOC( int, p->nBins ); p->nEntries = 1; } @@ -609,7 +608,7 @@ Npn_Man_t * Npn_ManStart( char * pFileName ) fclose( pFile ); p->nBufferSize = 4 * ( Extra_FileSize(pFileName) / 20 ); p->pBuffer = ABC_ALLOC( Npn_Obj_t, p->nBufferSize ); - p->nBins = Aig_PrimeCudd( p->nBufferSize / 2 ); + p->nBins = Abc_PrimeCudd( p->nBufferSize / 2 ); p->pBins = ABC_CALLOC( int, p->nBins ); p->nEntries = 1; Npn_ManRead( p, pFileName ); diff --git a/src/base/abci/abcNtbdd.c b/src/base/abci/abcNtbdd.c index e3df605e..a1fab695 100644 --- a/src/base/abci/abcNtbdd.c +++ b/src/base/abci/abcNtbdd.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcOdc.c b/src/base/abci/abcOdc.c index 50694832..e0f6d6de 100644 --- a/src/base/abci/abcOdc.c +++ b/src/base/abci/abcOdc.c @@ -18,8 +18,7 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcOrder.c b/src/base/abci/abcOrder.c index c306d01d..a3f66a63 100644 --- a/src/base/abci/abcOrder.c +++ b/src/base/abci/abcOrder.c @@ -18,7 +18,7 @@ ***********************************************************************/ -#include "abc.h" +#include "src/base/abc/abc.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcPart.c b/src/base/abci/abcPart.c index 5df5af62..7ae435d8 100644 --- a/src/base/abci/abcPart.c +++ b/src/base/abci/abcPart.c @@ -18,9 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "main.h" -#include "cmd.h" +#include "src/base/abc/abc.h" +#include "src/base/main/main.h" +#include "src/base/cmd/cmd.h" ABC_NAMESPACE_IMPL_START @@ -594,7 +594,7 @@ int Abc_NtkPartitionSmartFindPart( Vec_Ptr_t * vPartSuppsAll, Vec_Ptr_t * vParts if ( Vec_IntSize(vPartSupp) < 100 ) Repulse = 1; else - Repulse = 1+Extra_Base2Log(Vec_IntSize(vPartSupp)-100); + Repulse = 1+Abc_Base2Log(Vec_IntSize(vPartSupp)-100); Value = Attract/Repulse; if ( ValueBest < Value ) { diff --git a/src/base/abci/abcPlace.c b/src/base/abci/abcPlace.c index 06c23e65..7faa5d77 100644 --- a/src/base/abci/abcPlace.c +++ b/src/base/abci/abcPlace.c @@ -18,10 +18,10 @@ ***********************************************************************/ -#include "abc.h" +#include "base/abc/abc.h" // placement includes -#include "place_base.h" +#include "phys/place/place_base.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcPrint.c b/src/base/abci/abcPrint.c index 9e2f48d3..af34029e 100644 --- a/src/base/abci/abcPrint.c +++ b/src/base/abci/abcPrint.c @@ -19,12 +19,13 @@ ***********************************************************************/ #include <math.h> -#include "abc.h" -#include "dec.h" -#include "main.h" -#include "mio.h" -#include "aig.h" -#include "if.h" +#include "src/base/abc/abc.h" +#include "src/bool/dec/dec.h" +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" +#include "src/aig/aig/aig.h" +#include "src/map/if/if.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START @@ -523,7 +524,7 @@ void Abc_NtkPrintFanio( FILE * pFile, Abc_Ntk_t * pNtk ) if ( nFanins > vFanins->nSize || nFanouts > vFanouts->nSize ) { nOldSize = vFanins->nSize; - nNewSize = ABC_MAX(nFanins, nFanouts) + 10; + nNewSize = Abc_MaxInt(nFanins, nFanouts) + 10; Vec_IntGrow( vFanins, nNewSize ); Vec_IntGrow( vFanouts, nNewSize ); for ( k = nOldSize; k < nNewSize; k++ ) @@ -592,12 +593,12 @@ void Abc_NtkPrintFanioNew( FILE * pFile, Abc_Ntk_t * pNtk, int fMffc ) nFanouts = Abc_ObjFanoutNum(pNode); nFaninsAll += nFanins; nFanoutsAll += nFanouts; - nFaninsMax = ABC_MAX( nFaninsMax, nFanins ); - nFanoutsMax = ABC_MAX( nFanoutsMax, nFanouts ); + nFaninsMax = Abc_MaxInt( nFaninsMax, nFanins ); + nFanoutsMax = Abc_MaxInt( nFanoutsMax, nFanouts ); } // allocate storage for fanin/fanout numbers - nSizeMax = ABC_MAX( 10 * (Extra_Base10Log(nFaninsMax) + 1), 10 * (Extra_Base10Log(nFanoutsMax) + 1) ); + nSizeMax = Abc_MaxInt( 10 * (Abc_Base10Log(nFaninsMax) + 1), 10 * (Abc_Base10Log(nFanoutsMax) + 1) ); vFanins = Vec_IntStart( nSizeMax ); vFanouts = Vec_IntStart( nSizeMax ); diff --git a/src/base/abci/abcProve.c b/src/base/abci/abcProve.c index 154c5e1c..3a6c42a4 100644 --- a/src/base/abci/abcProve.c +++ b/src/base/abci/abcProve.c @@ -18,10 +18,11 @@ ***********************************************************************/ -#include "abc.h" -#include "fraig.h" -#include "math.h" -#include "extra.h" +#include <math.h> + +#include "src/base/abc/abc.h" +#include "src/proof/fraig/fraig.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START @@ -254,7 +255,7 @@ Abc_Ntk_t * Abc_NtkMiterFraig( Abc_Ntk_t * pNtk, int nBTLimit, ABC_INT64_T nInsp // no more than 256M for one circuit (128M + 128M) nWords1 = 32; nWords2 = (1<<27) / (Abc_NtkNodeNum(pNtk) + Abc_NtkCiNum(pNtk)); - nWordsMin = ABC_MIN( nWords1, nWords2 ); + nWordsMin = Abc_MinInt( nWords1, nWords2 ); // set the FRAIGing parameters Fraig_ParamsSetDefault( pParams ); diff --git a/src/base/abci/abcQbf.c b/src/base/abci/abcQbf.c index e6395ef3..98cb3eb6 100644 --- a/src/base/abci/abcQbf.c +++ b/src/base/abci/abcQbf.c @@ -18,7 +18,7 @@ ***********************************************************************/ -#include "abc.h" +#include "src/base/abc/abc.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcQuant.c b/src/base/abci/abcQuant.c index 262797d2..7185cf8d 100644 --- a/src/base/abci/abcQuant.c +++ b/src/base/abci/abcQuant.c @@ -18,8 +18,7 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcReach.c b/src/base/abci/abcReach.c index f7bc5186..e1ffa309 100644 --- a/src/base/abci/abcReach.c +++ b/src/base/abci/abcReach.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcRec.c b/src/base/abci/abcRec.c index abb4be4b..e51b15bd 100644 --- a/src/base/abci/abcRec.c +++ b/src/base/abci/abcRec.c @@ -18,9 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "if.h" -#include "kit.h" +#include "src/base/abc/abc.h" +#include "src/map/if/if.h" +#include "src/bool/kit/kit.h" ABC_NAMESPACE_IMPL_START @@ -246,7 +246,7 @@ void Rec_ObjSet(Abc_ManRec_t* p, Rec_Obj_t* pRecObj, Abc_Obj_t* pObj, char* newD Abc_NodeSetTravIdCurrent(pObj); Delay0 = If_CutDelayRecComput_rec(Abc_ObjFanin0(pObj), vCosts); Delay1 = If_CutDelayRecComput_rec(Abc_ObjFanin1(pObj), vCosts); - Delay = ABC_MAX(Delay0, Delay1) + 1; + Delay = Abc_MaxInt(Delay0, Delay1) + 1; Vec_StrWriteEntry(vCosts,pObj->Id,Delay); return Delay; }*/ @@ -299,7 +299,7 @@ char If_CutDepthRecComput_rec(Abc_Obj_t* pObj, int iLeaf) return -IF_BIG_CHAR; Depth0 = If_CutDepthRecComput_rec(Abc_ObjFanin0(pObj), iLeaf); Depth1 = If_CutDepthRecComput_rec(Abc_ObjFanin1(pObj), iLeaf); - Depth = ABC_MAX(Depth0, Depth1); + Depth = Abc_MaxInt(Depth0, Depth1); Depth = (Depth == -IF_BIG_CHAR) ? -IF_BIG_CHAR : Depth + 1; assert(Depth <= 127); return Depth; @@ -1064,7 +1064,7 @@ void Abc_NtkRecLibMerge(Abc_Ntk_t* pNtk) Abc_NtkForEachPi( pNtk, pObj, i ) Abc_ObjSetMax( pObj, i+1 ); Abc_AigForEachAnd( pNtk, pObj, i ) - Abc_ObjSetMax( pObj, ABC_MAX( Abc_ObjGetMax(Abc_ObjFanin0(pObj)), Abc_ObjGetMax(Abc_ObjFanin1(pObj)) ) ); + Abc_ObjSetMax( pObj, Abc_MaxInt( Abc_ObjGetMax(Abc_ObjFanin0(pObj)), Abc_ObjGetMax(Abc_ObjFanin1(pObj)) ) ); // insert the PO nodes into the table Abc_NtkForEachPo( pNtk, pObj, i ) @@ -1105,7 +1105,7 @@ void Abc_NtkRecRezieHash(Abc_ManRec_t* p) int nBinsNew, Counter, i; int clk = clock(); // get the new table size - nBinsNew = Cudd_Prime( 3 * p->nBins ); + nBinsNew = Abc_PrimeCudd( 3 * p->nBins ); printf("Hash table resize from %d to %d.\n", p->nBins, nBinsNew); // allocate a new array pBinsNew = ABC_ALLOC( Rec_Obj_t *, nBinsNew ); @@ -1242,7 +1242,7 @@ p->timeTruth += clock() - clk; Abc_NtkForEachPi( pNtk, pObj, i ) Abc_ObjSetMax( pObj, i+1 ); Abc_AigForEachAnd( pNtk, pObj, i ) - Abc_ObjSetMax( pObj, ABC_MAX( Abc_ObjGetMax(Abc_ObjFanin0(pObj)), Abc_ObjGetMax(Abc_ObjFanin1(pObj)) ) ); + Abc_ObjSetMax( pObj, Abc_MaxInt( Abc_ObjGetMax(Abc_ObjFanin0(pObj)), Abc_ObjGetMax(Abc_ObjFanin1(pObj)) ) ); // insert the PO nodes into the table timeInsert = clock(); @@ -1308,7 +1308,7 @@ void Abc_NtkRecDumpTruthTables( Abc_ManRec_t * p ) for ( i = 0; i < p->nBins; i++ ) for ( pObj = p->pBins[i]; pObj; pObj = pObj->pCopy ) { - pTruth = Vec_PtrEntry(p->vTtNodes, pObj->Id); + pTruth = (unsigned *)Vec_PtrEntry(p->vTtNodes, pObj->Id); if ( (int)Kit_TruthSupport(pTruth, nVars) != (1<<nVars)-1 ) continue; Extra_PrintHex( pFile, pTruth, nVars ); @@ -1418,7 +1418,7 @@ void Abc_NtkRecPs(int fPrintLib) Abc_NtkForEachPi( pNtk, pObj, i ) Abc_ObjSetMax( pObj, i+1 ); Abc_AigForEachAnd( pNtk, pObj, i ) - Abc_ObjSetMax( pObj, ABC_MAX( Abc_ObjGetMax(Abc_ObjFanin0(pObj)), Abc_ObjGetMax(Abc_ObjFanin1(pObj)) ) ); + Abc_ObjSetMax( pObj, Abc_MaxInt( Abc_ObjGetMax(Abc_ObjFanin0(pObj)), Abc_ObjGetMax(Abc_ObjFanin1(pObj)) ) ); if(fPrintLib) { pFile = fopen( "tt10.txt", "wb" ); @@ -1426,7 +1426,7 @@ for ( i = 0; i < p->nBins; i++ ) for ( entry = p->pBins[i]; entry; entry = entry->pCopy ) { int tmp = 0; - pTruth = Vec_PtrEntry(p->vTtNodes, entry->Id); + pTruth = (unsigned *)Vec_PtrEntry(p->vTtNodes, entry->Id); /*if ( (int)Kit_TruthSupport(pTruth, nVars) != (1<<nVars)-1 ) continue;*/ Extra_PrintHex( pFile, pTruth, nVars ); @@ -2416,7 +2416,7 @@ char Abc_NtkRecCurrentDepth_rec(If_Obj_t * pObj, int iLeaf) return -IF_BIG_CHAR; Depth0 = Abc_NtkRecCurrentDepth_rec(If_ObjFanin0(pObj), iLeaf); Depth1 = Abc_NtkRecCurrentDepth_rec(If_ObjFanin1(pObj), iLeaf); - Depth = ABC_MAX(Depth0, Depth1); + Depth = Abc_MaxInt(Depth0, Depth1); Depth = (Depth == -IF_BIG_CHAR) ? -IF_BIG_CHAR : Depth + 1; assert(Depth <= 127); return Depth; diff --git a/src/base/abci/abcReconv.c b/src/base/abci/abcReconv.c index e0cec5cd..4a5be4a2 100644 --- a/src/base/abci/abcReconv.c +++ b/src/base/abci/abcReconv.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcRefactor.c b/src/base/abci/abcRefactor.c index 3ba171b7..69d84b0c 100644 --- a/src/base/abci/abcRefactor.c +++ b/src/base/abci/abcRefactor.c @@ -18,9 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "dec.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/bool/dec/dec.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcRenode.c b/src/base/abci/abcRenode.c index 848021a0..35cebd9d 100644 --- a/src/base/abci/abcRenode.c +++ b/src/base/abci/abcRenode.c @@ -18,10 +18,11 @@ ***********************************************************************/ -#include "abc.h" -#include "reo.h" -#include "if.h" -#include "kit.h" +#include "src/base/abc/abc.h" +#include "src/bdd/reo/reo.h" +#include "src/map/if/if.h" +#include "src/bool/kit/kit.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcReorder.c b/src/base/abci/abcReorder.c index d2e7dcea..5fd041ae 100644 --- a/src/base/abci/abcReorder.c +++ b/src/base/abci/abcReorder.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "reo.h" +#include "src/base/abc/abc.h" +#include "src/bdd/reo/reo.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcRestruct.c b/src/base/abci/abcRestruct.c index 719d722e..66b1d8e8 100644 --- a/src/base/abci/abcRestruct.c +++ b/src/base/abci/abcRestruct.c @@ -18,11 +18,11 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" -#include "dec.h" -#include "dsd.h" -#include "cut.h" +#include "src/base/abc/abc.h" +#include "src/bool/dec/dec.h" +#include "src/opt/cut/cut.h" +#include "src/misc/extra/extraBdd.h" +#include "src/bdd/dsd/dsd.h" ABC_NAMESPACE_IMPL_START @@ -655,7 +655,7 @@ Dec_Edge_t Abc_NodeEvaluateDsd_rec( Dec_Graph_t * pGraph, Abc_ManRst_t * pManRst // set level Level1 = Dec_GraphNode( pGraph, eNode1.Node )->Level; Level2 = Dec_GraphNode( pGraph, eNode2.Node )->Level; - Dec_GraphNode( pGraph, eNode3.Node )->Level = 1 + ABC_MAX(Level1, Level2); + Dec_GraphNode( pGraph, eNode3.Node )->Level = 1 + Abc_MaxInt(Level1, Level2); // get the new node if possible if ( pNode3 ) { @@ -708,7 +708,7 @@ Dec_Edge_t Abc_NodeEvaluateDsd_rec( Dec_Graph_t * pGraph, Abc_ManRst_t * pManRst // set level Level1 = Dec_GraphNode( pGraph, eNode1.Node )->Level; Level2 = Dec_GraphNode( pGraph, eNode2.Node )->Level; - Dec_GraphNode( pGraph, eNode3.Node )->Level = 2 + ABC_MAX(Level1, Level2); + Dec_GraphNode( pGraph, eNode3.Node )->Level = 2 + Abc_MaxInt(Level1, Level2); // get the new node if possible if ( pNode3 ) { @@ -824,7 +824,7 @@ Dec_Edge_t Abc_NodeEvaluateDsd_rec( Dec_Graph_t * pGraph, Abc_ManRst_t * pManRst Level1 = Dec_GraphNode( pGraph, eNode1.Node )->Level; Level2 = Dec_GraphNode( pGraph, eNode2.Node )->Level; Level3 = Dec_GraphNode( pGraph, eNode3.Node )->Level; - Dec_GraphNode( pGraph, eResult.Node )->Level = 2 + ABC_MAX( ABC_MAX(Level1, Level2), Level3 ); + Dec_GraphNode( pGraph, eResult.Node )->Level = 2 + Abc_MaxInt( Abc_MaxInt(Level1, Level2), Level3 ); // get the new node if possible if ( pNode4 ) { diff --git a/src/base/abci/abcResub.c b/src/base/abci/abcResub.c index aab4d1ce..b03c36aa 100644 --- a/src/base/abci/abcResub.c +++ b/src/base/abci/abcResub.c @@ -18,9 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "dec.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/bool/dec/dec.h" ABC_NAMESPACE_IMPL_START @@ -1151,7 +1150,7 @@ Dec_Graph_t * Abc_ManResubDivs12( Abc_ManRes_t * p, int Required ) break; if ( w == p->nWords ) { - LevelMax = ABC_MAX( pObj0->Level, ABC_MAX(pObj1->Level, pObj2->Level) ); + LevelMax = Abc_MaxInt( pObj0->Level, Abc_MaxInt(pObj1->Level, pObj2->Level) ); assert( LevelMax <= Required - 1 ); pObjMax = NULL; @@ -1192,7 +1191,7 @@ Dec_Graph_t * Abc_ManResubDivs12( Abc_ManRes_t * p, int Required ) break; if ( w == p->nWords ) { - LevelMax = ABC_MAX( pObj0->Level, ABC_MAX(pObj1->Level, pObj2->Level) ); + LevelMax = Abc_MaxInt( pObj0->Level, Abc_MaxInt(pObj1->Level, pObj2->Level) ); assert( LevelMax <= Required - 1 ); pObjMax = NULL; diff --git a/src/base/abci/abcRewrite.c b/src/base/abci/abcRewrite.c index 54e19f50..5e2745b9 100644 --- a/src/base/abci/abcRewrite.c +++ b/src/base/abci/abcRewrite.c @@ -18,10 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" -#include "rwr.h" -#include "dec.h" +#include "src/base/abc/abc.h" +#include "src/opt/rwr/rwr.h" +#include "src/bool/dec/dec.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcRr.c b/src/base/abci/abcRr.c index 3e60ebf9..61c8d085 100644 --- a/src/base/abci/abcRr.c +++ b/src/base/abci/abcRr.c @@ -18,10 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "fraig.h" -#include "extra.h" -#include "sim.h" +#include "src/base/abc/abc.h" +#include "src/proof/fraig/fraig.h" +#include "src/opt/sim/sim.h" ABC_NAMESPACE_IMPL_START @@ -434,7 +433,7 @@ int Abc_NtkRRWindow( Abc_RRMan_t * p ) pEdgeFanout = p->pFanout? p->pFanout : p->pNode; pEdgeFanin = p->pFanout? p->pNode : p->pFanin; // get the minimum and maximum levels of the window - LevelMin = ABC_MAX( 0, ((int)p->pFanin->Level) - p->nFaninLevels ); + LevelMin = Abc_MaxInt( 0, ((int)p->pFanin->Level) - p->nFaninLevels ); LevelMax = (int)pEdgeFanout->Level + p->nFanoutLevels; // start the TFI leaves with the fanin diff --git a/src/base/abci/abcSat.c b/src/base/abci/abcSat.c index b0c5024a..29f13bda 100644 --- a/src/base/abci/abcSat.c +++ b/src/base/abci/abcSat.c @@ -18,10 +18,11 @@ ***********************************************************************/ -#include "abc.h" -#include "main.h" -#include "cmd.h" -#include "satSolver.h" +#include "src/base/abc/abc.h" +#include "src/base/main/main.h" +#include "src/base/cmd/cmd.h" +#include "src/sat/bsat/satSolver.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START @@ -590,7 +591,7 @@ int Abc_NtkMiterSatCreateInt( sat_solver * pSat, Abc_Ntk_t * pNtk ) continue; pPrefVars[nVars++] = (int)pNode->pCopy; } - nVars = ABC_MIN( nVars, 10 ); + nVars = Abc_MinInt( nVars, 10 ); ASat_SolverSetPrefVars( pSat, pPrefVars, nVars ); } */ diff --git a/src/base/abci/abcScorr.c b/src/base/abci/abcScorr.c index 9687003b..e7683edf 100644 --- a/src/base/abci/abcScorr.c +++ b/src/base/abci/abcScorr.c @@ -18,13 +18,13 @@ ***********************************************************************/ -#include "abc.h" -#include "ioAbc.h" -#include "saig.h" -#include "ssw.h" -#include "gia.h" -#include "cec.h" -#include "giaAig.h" +#include "src/base/abc/abc.h" +#include "src/base/io/ioAbc.h" +#include "src/aig/saig/saig.h" +#include "src/proof/ssw/ssw.h" +#include "src/aig/gia/gia.h" +#include "src/proof/cec/cec.h" +#include "src/aig/gia/giaAig.h" ABC_NAMESPACE_IMPL_START @@ -80,7 +80,7 @@ Vec_Int_t * Abc_NtkMapGiaIntoNameId( Abc_Ntk_t * pNetlist, Aig_Man_t * pAig, Gia if ( pGia == NULL ) Vec_IntWriteEntry( vId2Name, Aig_ObjId(pObjAig), Abc_ObjId(pNet) ); else - Vec_IntWriteEntry( vId2Name, Gia_Lit2Var(pObjAig->iData), Abc_ObjId(pNet) ); + Vec_IntWriteEntry( vId2Name, Abc_Lit2Var(pObjAig->iData), Abc_ObjId(pNet) ); } } // overwrite CO names @@ -95,7 +95,7 @@ Vec_Int_t * Abc_NtkMapGiaIntoNameId( Abc_Ntk_t * pNetlist, Aig_Man_t * pAig, Gia if ( pGia == NULL ) Vec_IntWriteEntry( vId2Name, Aig_ObjId(pObjAig), Abc_ObjId(pNet) ); else - Vec_IntWriteEntry( vId2Name, Gia_Lit2Var(pObjAig->iData), Abc_ObjId(pNet) ); + Vec_IntWriteEntry( vId2Name, Abc_Lit2Var(pObjAig->iData), Abc_ObjId(pNet) ); } } // overwrite CI names @@ -110,7 +110,7 @@ Vec_Int_t * Abc_NtkMapGiaIntoNameId( Abc_Ntk_t * pNetlist, Aig_Man_t * pAig, Gia if ( pGia == NULL ) Vec_IntWriteEntry( vId2Name, Aig_ObjId(pObjAig), Abc_ObjId(pNet) ); else - Vec_IntWriteEntry( vId2Name, Gia_Lit2Var(pObjAig->iData), Abc_ObjId(pNet) ); + Vec_IntWriteEntry( vId2Name, Abc_Lit2Var(pObjAig->iData), Abc_ObjId(pNet) ); } } return vId2Name; diff --git a/src/base/abci/abcSense.c b/src/base/abci/abcSense.c index 8a477c4e..3bcbc205 100644 --- a/src/base/abci/abcSense.c +++ b/src/base/abci/abcSense.c @@ -18,9 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "fraig.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/proof/fraig/fraig.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcSpeedup.c b/src/base/abci/abcSpeedup.c index 35a901ad..2c3ebca0 100644 --- a/src/base/abci/abcSpeedup.c +++ b/src/base/abci/abcSpeedup.c @@ -18,10 +18,10 @@ ***********************************************************************/ -#include "abc.h" -#include "main.h" -#include "if.h" -#include "aig.h" +#include "src/base/abc/abc.h" +#include "src/base/main/main.h" +#include "src/map/if/if.h" +#include "src/aig/aig/aig.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcStrash.c b/src/base/abci/abcStrash.c index e08def57..996c9db0 100644 --- a/src/base/abci/abcStrash.c +++ b/src/base/abci/abcStrash.c @@ -18,9 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" -#include "dec.h" +#include "src/base/abc/abc.h" +#include "src/bool/dec/dec.h" ABC_NAMESPACE_IMPL_START @@ -468,7 +467,7 @@ Abc_Ntk_t * Abc_NtkTopmost( Abc_Ntk_t * pNtk, int nLevels ) assert( Abc_NtkIsStrash(pNtk) ); assert( Abc_NtkCoNum(pNtk) == 1 ); // get the cutoff level - LevelCut = ABC_MAX( 0, Abc_AigLevel(pNtk) - nLevels ); + LevelCut = Abc_MaxInt( 0, Abc_AigLevel(pNtk) - nLevels ); // start the network pNtkNew = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG, 1 ); pNtkNew->pName = Extra_UtilStrsav(pNtk->pName); diff --git a/src/base/abci/abcSweep.c b/src/base/abci/abcSweep.c index 43c99d90..a898f26c 100644 --- a/src/base/abci/abcSweep.c +++ b/src/base/abci/abcSweep.c @@ -18,13 +18,13 @@ ***********************************************************************/ -#include "abc.h" -#include "main.h" -#include "fraig.h" +#include "src/base/abc/abc.h" +#include "src/base/main/main.h" +#include "src/proof/fraig/fraig.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START - //////////////////////////////////////////////////////////////////////// /// DECLARATIONS /// //////////////////////////////////////////////////////////////////////// diff --git a/src/base/abci/abcSymm.c b/src/base/abci/abcSymm.c index 41abc4db..2a36be14 100644 --- a/src/base/abci/abcSymm.c +++ b/src/base/abci/abcSymm.c @@ -18,9 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" -#include "sim.h" +#include "src/base/abc/abc.h" +#include "src/opt/sim/sim.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcTiming.c b/src/base/abci/abcTiming.c index 79768645..d8334e9d 100644 --- a/src/base/abci/abcTiming.c +++ b/src/base/abci/abcTiming.c @@ -18,9 +18,9 @@ ***********************************************************************/ -#include "abc.h" -#include "main.h" -#include "mio.h" +#include "src/base/abc/abc.h" +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" ABC_NAMESPACE_IMPL_START @@ -139,7 +139,7 @@ void Abc_NtkTimeSetDefaultArrival( Abc_Ntk_t * pNtk, float Rise, float Fall ) pNtk->pManTime = Abc_ManTimeStart(); pNtk->pManTime->tArrDef.Rise = Rise; pNtk->pManTime->tArrDef.Fall = Fall; - pNtk->pManTime->tArrDef.Worst = ABC_MAX( Rise, Fall ); + pNtk->pManTime->tArrDef.Worst = Abc_MaxInt( Rise, Fall ); } /**Function************************************************************* @@ -161,7 +161,7 @@ void Abc_NtkTimeSetDefaultRequired( Abc_Ntk_t * pNtk, float Rise, float Fall ) pNtk->pManTime = Abc_ManTimeStart(); pNtk->pManTime->tReqDef.Rise = Rise; pNtk->pManTime->tReqDef.Fall = Fall; - pNtk->pManTime->tReqDef.Worst = ABC_MAX( Rise, Fall ); + pNtk->pManTime->tReqDef.Worst = Abc_MaxInt( Rise, Fall ); } /**Function************************************************************* @@ -189,7 +189,7 @@ void Abc_NtkTimeSetArrival( Abc_Ntk_t * pNtk, int ObjId, float Rise, float Fall pTime = (Abc_Time_t *)vTimes->pArray[ObjId]; pTime->Rise = Rise; pTime->Fall = Fall; - pTime->Worst = ABC_MAX( Rise, Fall ); + pTime->Worst = Abc_MaxInt( Rise, Fall ); } /**Function************************************************************* @@ -217,7 +217,7 @@ void Abc_NtkTimeSetRequired( Abc_Ntk_t * pNtk, int ObjId, float Rise, float Fall pTime = (Abc_Time_t *)vTimes->pArray[ObjId]; pTime->Rise = Rise; pTime->Fall = Fall; - pTime->Worst = ABC_MAX( Rise, Fall ); + pTime->Worst = Abc_MaxInt( Rise, Fall ); } /**Function************************************************************* @@ -625,7 +625,7 @@ void Abc_NodeDelayTraceArrival( Abc_Obj_t * pNode ) } pPin = Mio_PinReadNext(pPin); } - pTimeOut->Worst = ABC_MAX( pTimeOut->Rise, pTimeOut->Fall ); + pTimeOut->Worst = Abc_MaxInt( pTimeOut->Rise, pTimeOut->Fall ); } @@ -647,7 +647,7 @@ int Abc_ObjLevelNew( Abc_Obj_t * pObj ) Abc_Obj_t * pFanin; int i, Level = 0; Abc_ObjForEachFanin( pObj, pFanin, i ) - Level = ABC_MAX( Level, Abc_ObjLevel(pFanin) ); + Level = Abc_MaxInt( Level, Abc_ObjLevel(pFanin) ); return Level + 1; } @@ -669,7 +669,7 @@ int Abc_ObjReverseLevelNew( Abc_Obj_t * pObj ) Abc_ObjForEachFanout( pObj, pFanout, i ) { LevelCur = Abc_ObjReverseLevel( pFanout ); - Level = ABC_MAX( Level, LevelCur ); + Level = Abc_MaxInt( Level, LevelCur ); } return Level + 1; } @@ -827,7 +827,7 @@ void Abc_NtkUpdateLevel( Abc_Obj_t * pObjNew, Vec_Vec_t * vLevels ) assert( Abc_ObjLevel(pFanout) >= Lev ); Vec_VecPush( vLevels, Abc_ObjLevel(pFanout), pFanout ); // Counter++; -// CounterMax = ABC_MAX( CounterMax, Counter ); +// CounterMax = Abc_MaxInt( CounterMax, Counter ); pFanout->fMarkA = 1; } } diff --git a/src/base/abci/abcUnate.c b/src/base/abci/abcUnate.c index 829a83bd..a56973b6 100644 --- a/src/base/abci/abcUnate.c +++ b/src/base/abci/abcUnate.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcUnreach.c b/src/base/abci/abcUnreach.c index f62ec7fc..72514029 100644 --- a/src/base/abci/abcUnreach.c +++ b/src/base/abci/abcUnreach.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcVerify.c b/src/base/abci/abcVerify.c index 7a9a5239..9b88cb8a 100644 --- a/src/base/abci/abcVerify.c +++ b/src/base/abci/abcVerify.c @@ -18,15 +18,15 @@ ***********************************************************************/ -#include "abc.h" -#include "main.h" -#include "cmd.h" -#include "fraig.h" -#include "sim.h" -#include "aig.h" -#include "saig.h" -#include "gia.h" -#include "ssw.h" +#include "src/base/abc/abc.h" +#include "src/base/main/main.h" +#include "src/base/cmd/cmd.h" +#include "src/proof/fraig/fraig.h" +#include "src/opt/sim/sim.h" +#include "src/aig/aig/aig.h" +#include "src/aig/saig/saig.h" +#include "src/aig/gia/gia.h" +#include "src/proof/ssw/ssw.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/abcXsim.c b/src/base/abci/abcXsim.c index 12ad0e68..23bbbe1a 100644 --- a/src/base/abci/abcXsim.c +++ b/src/base/abci/abcXsim.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "gia.h" +#include "src/base/abc/abc.h" +#include "src/aig/gia/gia.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/abci/fahout_cut.c b/src/base/abci/fahout_cut.c new file mode 100644 index 00000000..0b4b421f --- /dev/null +++ b/src/base/abci/fahout_cut.c @@ -0,0 +1,357 @@ +/**CFile**************************************************************** + + FileName [abcMerge.c] + + SystemName [ABC: Logic synthesis and verification system.] + + PackageName [Network and node package.] + + Synopsis [LUT merging algorithm.] + + Author [Alan Mishchenko] + + Affiliation [UC Berkeley] + + Date [Ver. 1.0. Started - June 20, 2005.] + + Revision [$Id: abcMerge.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] + +***********************************************************************/ + +#include "base/abc/abc.h" +#include "aig/aig/aig.h" +#include "aig/nwk/nwkMerge.h" + +ABC_NAMESPACE_IMPL_START + + +//////////////////////////////////////////////////////////////////////// +/// DECLARATIONS /// +//////////////////////////////////////////////////////////////////////// + +//////////////////////////////////////////////////////////////////////// +/// FUNCTION DEFINITIONS /// +//////////////////////////////////////////////////////////////////////// + +/**Function************************************************************* + + Synopsis [Marks the fanins of the node with the current trav ID.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Abc_NtkMarkFanins_rec( Abc_Obj_t * pLut, int nLevMin ) +{ + Abc_Obj_t * pNext; + int i; + if ( !Abc_ObjIsNode(pLut) ) + return; + if ( Abc_NodeIsTravIdCurrent( pLut ) ) + return; + Abc_NodeSetTravIdCurrent( pLut ); + if ( Abc_ObjLevel(pLut) < nLevMin ) + return; + Abc_ObjForEachFanin( pLut, pNext, i ) + Abc_NtkMarkFanins_rec( pNext, nLevMin ); +} + +/**Function************************************************************* + + Synopsis [Marks the fanouts of the node with the current trav ID.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Abc_NtkMarkFanouts_rec( Abc_Obj_t * pLut, int nLevMax, int nFanMax ) +{ + Abc_Obj_t * pNext; + int i; + if ( !Abc_ObjIsNode(pLut) ) + return; + if ( Abc_NodeIsTravIdCurrent( pLut ) ) + return; + Abc_NodeSetTravIdCurrent( pLut ); + if ( Abc_ObjLevel(pLut) > nLevMax ) + return; + if ( Abc_ObjFanoutNum(pLut) > nFanMax ) + return; + Abc_ObjForEachFanout( pLut, pNext, i ) + Abc_NtkMarkFanouts_rec( pNext, nLevMax, nFanMax ); +} + +/**Function************************************************************* + + Synopsis [Collects the circle of nodes around the given set.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Abc_NtkCollectCircle( Vec_Ptr_t * vStart, Vec_Ptr_t * vNext, int nFanMax ) +{ + Abc_Obj_t * pObj, * pNext; + int i, k; + Vec_PtrClear( vNext ); + Vec_PtrForEachEntry( Vec_Int_t *, vStart, pObj, i ) + { + Abc_ObjForEachFanin( pObj, pNext, k ) + { + if ( !Abc_ObjIsNode(pNext) ) + continue; + if ( Abc_NodeIsTravIdCurrent( pNext ) ) + continue; + Abc_NodeSetTravIdCurrent( pNext ); + Vec_PtrPush( vNext, pNext ); + } + Abc_ObjForEachFanout( pObj, pNext, k ) + { + if ( !Abc_ObjIsNode(pNext) ) + continue; + if ( Abc_NodeIsTravIdCurrent( pNext ) ) + continue; + Abc_NodeSetTravIdCurrent( pNext ); + if ( Abc_ObjFanoutNum(pNext) > nFanMax ) + continue; + Vec_PtrPush( vNext, pNext ); + } + } +} + +/**Function************************************************************* + + Synopsis [Collects the circle of nodes removes from the given one.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Abc_NtkCollectNonOverlapCands( Abc_Obj_t * pLut, Vec_Ptr_t * vStart, Vec_Ptr_t * vNext, Vec_Ptr_t * vCands, Nwk_LMPars_t * pPars ) +{ + Vec_Ptr_t * vTemp; + Abc_Obj_t * pObj; + int i, k; + Vec_PtrClear( vCands ); + if ( pPars->nMaxSuppSize - Abc_ObjFaninNum(pLut) <= 1 ) + return; + + // collect nodes removed by this distance + assert( pPars->nMaxDistance > 0 ); + Vec_PtrClear( vStart ); + Vec_PtrPush( vStart, pLut ); + Abc_NtkIncrementTravId( pLut->pNtk ); + Abc_NodeSetTravIdCurrent( pLut ); + for ( i = 1; i <= pPars->nMaxDistance; i++ ) + { + Abc_NtkCollectCircle( vStart, vNext, pPars->nMaxFanout ); + vTemp = vStart; + vStart = vNext; + vNext = vTemp; + // collect the nodes in vStart + Vec_PtrForEachEntry( Vec_Int_t *, vStart, pObj, k ) + Vec_PtrPush( vCands, pObj ); + } + + // mark the TFI/TFO nodes + Abc_NtkIncrementTravId( pLut->pNtk ); + if ( pPars->fUseTfiTfo ) + Abc_NodeSetTravIdCurrent( pLut ); + else + { + Abc_NodeSetTravIdPrevious( pLut ); + Abc_NtkMarkFanins_rec( pLut, Abc_ObjLevel(pLut) - pPars->nMaxDistance ); + Abc_NodeSetTravIdPrevious( pLut ); + Abc_NtkMarkFanouts_rec( pLut, Abc_ObjLevel(pLut) + pPars->nMaxDistance, pPars->nMaxFanout ); + } + + // collect nodes satisfying the following conditions: + // - they are close enough in terms of distance + // - they are not in the TFI/TFO of the LUT + // - they have no more than the given number of fanins + // - they have no more than the given diff in delay + k = 0; + Vec_PtrForEachEntry( Vec_Int_t *, vCands, pObj, i ) + { + if ( Abc_NodeIsTravIdCurrent(pObj) ) + continue; + if ( Abc_ObjFaninNum(pLut) + Abc_ObjFaninNum(pObj) > pPars->nMaxSuppSize ) + continue; + if ( Abc_ObjLevel(pLut) - Abc_ObjLevel(pObj) > pPars->nMaxLevelDiff || + Abc_ObjLevel(pObj) - Abc_ObjLevel(pLut) > pPars->nMaxLevelDiff ) + continue; + Vec_PtrWriteEntry( vCands, k++, pObj ); + } + Vec_PtrShrink( vCands, k ); +} + + +/**Function************************************************************* + + Synopsis [Count the total number of fanins.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +int Abc_NtkCountTotalFanins( Abc_Obj_t * pLut, Abc_Obj_t * pCand ) +{ + Abc_Obj_t * pFanin; + int i, nCounter = Abc_ObjFaninNum(pLut); + Abc_ObjForEachFanin( pCand, pFanin, i ) + nCounter += !pFanin->fMarkC; + return nCounter; +} + +/**Function************************************************************* + + Synopsis [Collects overlapping candidates.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Abc_NtkCollectOverlapCands( Abc_Obj_t * pLut, Vec_Ptr_t * vCands, Nwk_LMPars_t * pPars ) +{ + Abc_Obj_t * pFanin, * pObj; + int i, k; + // mark fanins of pLut + Abc_ObjForEachFanin( pLut, pFanin, i ) + pFanin->fMarkC = 1; + // collect the matching fanouts of each fanin of the node + Vec_PtrClear( vCands ); + Abc_NtkIncrementTravId( pLut->pNtk ); + Abc_NodeSetTravIdCurrent( pLut ); + Abc_ObjForEachFanin( pLut, pFanin, i ) + { + if ( !Abc_ObjIsNode(pFanin) ) + continue; + if ( Abc_ObjFanoutNum(pFanin) > pPars->nMaxFanout ) + continue; + Abc_ObjForEachFanout( pFanin, pObj, k ) + { + if ( !Abc_ObjIsNode(pObj) ) + continue; + if ( Abc_NodeIsTravIdCurrent( pObj ) ) + continue; + Abc_NodeSetTravIdCurrent( pObj ); + // check the difference in delay + if ( Abc_ObjLevel(pLut) - Abc_ObjLevel(pObj) > pPars->nMaxLevelDiff || + Abc_ObjLevel(pObj) - Abc_ObjLevel(pLut) > pPars->nMaxLevelDiff ) + continue; + // check the total number of fanins of the node + if ( Abc_NtkCountTotalFanins(pLut, pObj) > pPars->nMaxSuppSize ) + continue; + Vec_PtrPush( vCands, pObj ); + } + } + // unmark fanins of pLut + Abc_ObjForEachFanin( pLut, pFanin, i ) + pFanin->fMarkC = 0; +} + +/**Function************************************************************* + + Synopsis [Performs LUT merging with parameters.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Vec_Int_t * Abc_NtkLutMerge( Abc_Ntk_t * pNtk, Nwk_LMPars_t * pPars ) +{ + Nwk_Grf_t * p; + Vec_Int_t * vResult; + Vec_Ptr_t * vStart, * vNext, * vCands1, * vCands2; + Abc_Obj_t * pLut, * pCand; + int i, k, nVertsMax, nCands, clk = clock(); + // count the number of vertices + nVertsMax = 0; + Abc_NtkForEachNode( pNtk, pLut, i ) + nVertsMax += (int)(Abc_ObjFaninNum(pLut) <= pPars->nMaxLutSize); + p = Nwk_ManGraphAlloc( nVertsMax ); + // create graph + vStart = Vec_PtrAlloc( 1000 ); + vNext = Vec_PtrAlloc( 1000 ); + vCands1 = Vec_PtrAlloc( 1000 ); + vCands2 = Vec_PtrAlloc( 1000 ); + nCands = 0; + Abc_NtkForEachNode( pNtk, pLut, i ) + { + if ( Abc_ObjFaninNum(pLut) > pPars->nMaxLutSize ) + continue; + Abc_NtkCollectOverlapCands( pLut, vCands1, pPars ); + if ( pPars->fUseDiffSupp ) + Abc_NtkCollectNonOverlapCands( pLut, vStart, vNext, vCands2, pPars ); + if ( Vec_PtrSize(vCands1) == 0 && Vec_PtrSize(vCands2) == 0 ) + continue; + nCands += Vec_PtrSize(vCands1) + Vec_PtrSize(vCands2); + // save candidates + Vec_PtrForEachEntry( Vec_Int_t *, vCands1, pCand, k ) + Nwk_ManGraphHashEdge( p, Abc_ObjId(pLut), Abc_ObjId(pCand) ); + Vec_PtrForEachEntry( Vec_Int_t *, vCands2, pCand, k ) + Nwk_ManGraphHashEdge( p, Abc_ObjId(pLut), Abc_ObjId(pCand) ); + // print statistics about this node + if ( pPars->fVeryVerbose ) + printf( "Node %6d : Fanins = %d. Fanouts = %3d. Cand1 = %3d. Cand2 = %3d.\n", + Abc_ObjId(pLut), Abc_ObjFaninNum(pLut), Abc_ObjFaninNum(pLut), + Vec_PtrSize(vCands1), Vec_PtrSize(vCands2) ); + } + Vec_PtrFree( vStart ); + Vec_PtrFree( vNext ); + Vec_PtrFree( vCands1 ); + Vec_PtrFree( vCands2 ); + if ( pPars->fVerbose ) + { + printf( "Mergable LUTs = %6d. Total cands = %6d. ", p->nVertsMax, nCands ); + ABC_PRT( "Deriving graph", clock() - clk ); + } + // solve the graph problem + clk = clock(); + Nwk_ManGraphSolve( p ); + if ( pPars->fVerbose ) + { + printf( "GRAPH: Nodes = %6d. Edges = %6d. Pairs = %6d. ", + p->nVerts, p->nEdges, Vec_IntSize(p->vPairs)/2 ); + ABC_PRT( "Solving", clock() - clk ); + Nwk_ManGraphReportMemoryUsage( p ); + } + vResult = p->vPairs; p->vPairs = NULL; +/* + for ( i = 0; i < vResult->nSize; i += 2 ) + printf( "(%d,%d) ", vResult->pArray[i], vResult->pArray[i+1] ); + printf( "\n" ); +*/ + Nwk_ManGraphFree( p ); + return vResult; +} + + +//////////////////////////////////////////////////////////////////////// +/// END OF FILE /// +//////////////////////////////////////////////////////////////////////// + + +ABC_NAMESPACE_IMPL_END + diff --git a/src/base/abci/module.make b/src/base/abci/module.make index 965e0258..8b2ef27b 100644 --- a/src/base/abci/module.make +++ b/src/base/abci/module.make @@ -1,5 +1,4 @@ SRC += src/base/abci/abc.c \ - src/base/abci/abcAbc8.c \ src/base/abci/abcAttach.c \ src/base/abci/abcAuto.c \ src/base/abci/abcBalance.c \ diff --git a/src/base/cmd/cmd.c b/src/base/cmd/cmd.c index 35eb535a..6c8a3c2e 100644 --- a/src/base/cmd/cmd.c +++ b/src/base/cmd/cmd.c @@ -24,10 +24,10 @@ #include <unistd.h> #endif -#include "abc.h" -#include "mainInt.h" +#include "src/base/abc/abc.h" +#include "src/base/main/mainInt.h" #include "cmdInt.h" -#include "utilSignal.h" +#include "src/misc/util/utilSignal.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/cmd/cmd.h b/src/base/cmd/cmd.h index 740cf758..f424f090 100644 --- a/src/base/cmd/cmd.h +++ b/src/base/cmd/cmd.h @@ -18,8 +18,8 @@ ***********************************************************************/ -#ifndef __CMD_H__ -#define __CMD_H__ +#ifndef ABC__base__cmd__cmd_h +#define ABC__base__cmd__cmd_h //////////////////////////////////////////////////////////////////////// diff --git a/src/base/cmd/cmdAlias.c b/src/base/cmd/cmdAlias.c index 6078927d..67cdc318 100644 --- a/src/base/cmd/cmdAlias.c +++ b/src/base/cmd/cmdAlias.c @@ -18,7 +18,7 @@ ***********************************************************************/ -#include "abc.h" +#include "src/base/abc/abc.h" #include "cmdInt.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/cmd/cmdApi.c b/src/base/cmd/cmdApi.c index 40c1dbf9..9357a93c 100644 --- a/src/base/cmd/cmdApi.c +++ b/src/base/cmd/cmdApi.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "mainInt.h" +#include "src/base/abc/abc.h" +#include "src/base/main/mainInt.h" #include "cmdInt.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/cmd/cmdFlag.c b/src/base/cmd/cmdFlag.c index a220042b..7b46e8fc 100644 --- a/src/base/cmd/cmdFlag.c +++ b/src/base/cmd/cmdFlag.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "mainInt.h" +#include "src/base/abc/abc.h" +#include "src/base/main/mainInt.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/cmd/cmdHist.c b/src/base/cmd/cmdHist.c index a2f64027..b6a4d535 100644 --- a/src/base/cmd/cmdHist.c +++ b/src/base/cmd/cmdHist.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "mainInt.h" +#include "src/base/abc/abc.h" +#include "src/base/main/mainInt.h" #include "cmd.h" #include "cmdInt.h" diff --git a/src/base/cmd/cmdInt.h b/src/base/cmd/cmdInt.h index 0ea9b364..6c1add92 100644 --- a/src/base/cmd/cmdInt.h +++ b/src/base/cmd/cmdInt.h @@ -18,15 +18,15 @@ ***********************************************************************/ -#ifndef __CMD_INT_H__ -#define __CMD_INT_H__ +#ifndef ABC__base__cmd__cmdInt_h +#define ABC__base__cmd__cmdInt_h //////////////////////////////////////////////////////////////////////// /// INCLUDES /// //////////////////////////////////////////////////////////////////////// -#include "mainInt.h" +#include "src/base/main/mainInt.h" #include "cmd.h" ABC_NAMESPACE_HEADER_START diff --git a/src/base/cmd/cmdLoad.c b/src/base/cmd/cmdLoad.c index 797275db..e4d8269a 100644 --- a/src/base/cmd/cmdLoad.c +++ b/src/base/cmd/cmdLoad.c @@ -18,11 +18,11 @@ ***********************************************************************/ -#include "abc.h" -#include "mainInt.h" +#include "src/base/abc/abc.h" +#include "src/base/main/mainInt.h" #include "cmd.h" #include "cmdInt.h" -#include "utilSignal.h" +#include "src/misc/util/utilSignal.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/cmd/cmdPlugin.c b/src/base/cmd/cmdPlugin.c index 8649d465..84e89cb1 100644 --- a/src/base/cmd/cmdPlugin.c +++ b/src/base/cmd/cmdPlugin.c @@ -25,11 +25,11 @@ #include <unistd.h> #endif -#include "abc.h" -#include "mainInt.h" +#include "src/base/abc/abc.h" +#include "src/base/main/mainInt.h" #include "cmd.h" #include "cmdInt.h" -#include "utilSignal.h" +#include "src/misc/util/utilSignal.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/cmd/cmdUtils.c b/src/base/cmd/cmdUtils.c index 683d336e..e6dbed4e 100644 --- a/src/base/cmd/cmdUtils.c +++ b/src/base/cmd/cmdUtils.c @@ -18,8 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "mainInt.h" +#include "src/base/abc/abc.h" +#include "src/base/main/mainInt.h" #include "cmdInt.h" #include <ctype.h> diff --git a/src/base/io/io.c b/src/base/io/io.c index 1cea2e37..92dbe9fc 100644 --- a/src/base/io/io.c +++ b/src/base/io/io.c @@ -19,8 +19,8 @@ ***********************************************************************/ #include "ioAbc.h" -#include "mainInt.h" -#include "saig.h" +#include "src/base/main/mainInt.h" +#include "src/aig/saig/saig.h" ABC_NAMESPACE_IMPL_START @@ -1998,7 +1998,7 @@ usage: ABC_NAMESPACE_IMPL_END -#include "fra.h" +#include "src/proof/fra/fra.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/io/ioAbc.h b/src/base/io/ioAbc.h index f3db4c15..7a38ae5c 100644 --- a/src/base/io/ioAbc.h +++ b/src/base/io/ioAbc.h @@ -18,16 +18,16 @@ ***********************************************************************/ -#ifndef __IO_H__ -#define __IO_H__ +#ifndef ABC__base__io__ioAbc_h +#define ABC__base__io__ioAbc_h //////////////////////////////////////////////////////////////////////// /// INCLUDES /// //////////////////////////////////////////////////////////////////////// -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" +#include "src/misc/extra/extra.h" //////////////////////////////////////////////////////////////////////// /// PARAMETERS /// diff --git a/src/base/io/ioInt.h b/src/base/io/ioInt.h index 9ded63e4..fed639a4 100644 --- a/src/base/io/ioInt.h +++ b/src/base/io/ioInt.h @@ -18,8 +18,8 @@ ***********************************************************************/ -#ifndef __IO_INT_H__ -#define __IO_INT_H__ +#ifndef ABC__base__io__ioInt_h +#define ABC__base__io__ioInt_h ABC_NAMESPACE_HEADER_START diff --git a/src/base/io/ioReadAiger.c b/src/base/io/ioReadAiger.c index 13987a1b..55ef16db 100644 --- a/src/base/io/ioReadAiger.c +++ b/src/base/io/ioReadAiger.c @@ -21,9 +21,9 @@ // The code in this file is developed in collaboration with Mark Jarvin of Toronto. -#include "bzlib.h" +#include "src/misc/bzlib/bzlib.h" #include "ioAbc.h" -#include "zlib.h" +#include "src/misc/zlib/zlib.h" ABC_NAMESPACE_IMPL_START @@ -358,7 +358,7 @@ Abc_Ntk_t * Io_ReadAiger( char * pFileName, int fCheck ) pObj = Abc_NtkCreatePo(pNtkNew); } // create the latches - nDigits = Extra_Base10Log( nLatches ); + nDigits = Abc_Base10Log( nLatches ); for ( i = 0; i < nLatches; i++ ) { pObj = Abc_NtkCreateLatch(pNtkNew); diff --git a/src/base/io/ioReadBblif.c b/src/base/io/ioReadBblif.c index 5b15c9d4..873a5671 100644 --- a/src/base/io/ioReadBblif.c +++ b/src/base/io/ioReadBblif.c @@ -19,8 +19,8 @@ ***********************************************************************/ #include "ioAbc.h" -#include "dec.h" -#include "bblif.h" +#include "src/bool/dec/dec.h" +#include "src/misc/bbl/bblif.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/io/ioReadBlif.c b/src/base/io/ioReadBlif.c index 9fd41261..faf0f53e 100644 --- a/src/base/io/ioReadBlif.c +++ b/src/base/io/ioReadBlif.c @@ -19,8 +19,8 @@ ***********************************************************************/ #include "ioAbc.h" -#include "main.h" -#include "mio.h" +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/io/ioReadBlifAig.c b/src/base/io/ioReadBlifAig.c index 1ef61196..f365cb4d 100644 --- a/src/base/io/ioReadBlifAig.c +++ b/src/base/io/ioReadBlifAig.c @@ -18,9 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" -#include "vecPtr.h" +#include "src/base/abc/abc.h" +#include "src/misc/vec/vecPtr.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/io/ioReadBlifMv.c b/src/base/io/ioReadBlifMv.c index 20ec8aa1..3e226824 100644 --- a/src/base/io/ioReadBlifMv.c +++ b/src/base/io/ioReadBlifMv.c @@ -18,9 +18,8 @@ ***********************************************************************/ -#include "abc.h" -#include "extra.h" -#include "vecPtr.h" +#include "src/base/abc/abc.h" +#include "src/misc/vec/vecPtr.h" #include "ioAbc.h" ABC_NAMESPACE_IMPL_START @@ -2029,8 +2028,8 @@ Io_MvVar_t * Abc_NtkMvVarDup( Abc_Ntk_t * pNtk, Io_MvVar_t * pVar ) ABC_NAMESPACE_IMPL_END -#include "mio.h" -#include "main.h" +#include "src/map/mio/mio.h" +#include "src/base/main/main.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/io/ioReadDsd.c b/src/base/io/ioReadDsd.c index 3608507b..514c664a 100644 --- a/src/base/io/ioReadDsd.c +++ b/src/base/io/ioReadDsd.c @@ -241,7 +241,7 @@ Abc_Ntk_t * Io_ReadDsd( char * pForm ) nInputs = 0; for ( pCur = pForm; *pCur; pCur++ ) if ( *pCur >= 'a' && *pCur <= 'z' ) - nInputs = ABC_MAX( nInputs, *pCur - 'a' ); + nInputs = Abc_MaxInt( nInputs, *pCur - 'a' ); nInputs++; // create the network diff --git a/src/base/io/ioReadPla.c b/src/base/io/ioReadPla.c index 927cf7e5..46ab811e 100644 --- a/src/base/io/ioReadPla.c +++ b/src/base/io/ioReadPla.c @@ -158,7 +158,7 @@ Abc_Ntk_t * Io_ReadPlaNetwork( Extra_FileReader_t * p, int fZeros ) ABC_FREE( ppSops ); return NULL; } - nDigits = Extra_Base10Log( nInputs ); + nDigits = Abc_Base10Log( nInputs ); for ( i = 0; i < nInputs; i++ ) { sprintf( Buffer, "x%0*d", nDigits, i ); @@ -175,7 +175,7 @@ Abc_Ntk_t * Io_ReadPlaNetwork( Extra_FileReader_t * p, int fZeros ) ABC_FREE( ppSops ); return NULL; } - nDigits = Extra_Base10Log( nOutputs ); + nDigits = Abc_Base10Log( nOutputs ); for ( i = 0; i < nOutputs; i++ ) { sprintf( Buffer, "z%0*d", nDigits, i ); diff --git a/src/base/io/ioReadVerilog.c b/src/base/io/ioReadVerilog.c index 3a8c6045..da74d8d9 100644 --- a/src/base/io/ioReadVerilog.c +++ b/src/base/io/ioReadVerilog.c @@ -19,7 +19,7 @@ ***********************************************************************/ #include "ioAbc.h" -#include "ver.h" +#include "src/base/ver/ver.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/io/ioUtil.c b/src/base/io/ioUtil.c index 9a50c0c8..e8a018c2 100644 --- a/src/base/io/ioUtil.c +++ b/src/base/io/ioUtil.c @@ -19,7 +19,7 @@ ***********************************************************************/ #include "ioAbc.h" -#include "main.h" +#include "src/base/main/main.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/io/ioWriteAiger.c b/src/base/io/ioWriteAiger.c index 9ab0905e..0f725be3 100644 --- a/src/base/io/ioWriteAiger.c +++ b/src/base/io/ioWriteAiger.c @@ -21,11 +21,11 @@ // The code in this file is developed in collaboration with Mark Jarvin of Toronto. -#include "bzlib.h" +#include "src/misc/bzlib/bzlib.h" #include "ioAbc.h" #include <stdarg.h> -#include "zlib.h" +#include "src/misc/zlib/zlib.h" ABC_NAMESPACE_IMPL_START @@ -770,8 +770,8 @@ void Io_WriteAiger( Abc_Ntk_t * pNtk, char * pFileName, int fWriteSymbols, int f } -#include "giaAig.h" -#include "saig.h" +#include "src/aig/gia/giaAig.h" +#include "src/aig/saig/saig.h" /**Function************************************************************* @@ -825,8 +825,8 @@ void Io_WriteAigerCex( Abc_Cex_t * pCex, Abc_Ntk_t * pNtk, void * pG, char * pFi { for ( k = 0; k < pCex->nPis; k++ ) { - fprintf( pFile, "%d", Aig_InfoHasBit(pCex->pData, b) ); - Aig_ManPi( pAig, k )->fMarkA = Aig_InfoHasBit(pCex->pData, b++); + fprintf( pFile, "%d", Abc_InfoHasBit(pCex->pData, b) ); + Aig_ManPi( pAig, k )->fMarkA = Abc_InfoHasBit(pCex->pData, b++); } fprintf( pFile, " " ); Aig_ManForEachNode( pAig, pObj, k ) diff --git a/src/base/io/ioWriteBblif.c b/src/base/io/ioWriteBblif.c index 5cace190..09bb1da9 100644 --- a/src/base/io/ioWriteBblif.c +++ b/src/base/io/ioWriteBblif.c @@ -19,7 +19,7 @@ ***********************************************************************/ #include "ioAbc.h" -#include "bblif.h" +#include "src/misc/bbl/bblif.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/io/ioWriteBlif.c b/src/base/io/ioWriteBlif.c index 9dc96afb..d8d3f787 100644 --- a/src/base/io/ioWriteBlif.c +++ b/src/base/io/ioWriteBlif.c @@ -19,10 +19,10 @@ ***********************************************************************/ #include "ioAbc.h" -#include "main.h" -#include "mio.h" -#include "kit.h" -#include "if.h" +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" +#include "src/bool/kit/kit.h" +#include "src/map/if/if.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/io/ioWriteBlifMv.c b/src/base/io/ioWriteBlifMv.c index 62028606..fd054d5f 100644 --- a/src/base/io/ioWriteBlifMv.c +++ b/src/base/io/ioWriteBlifMv.c @@ -19,8 +19,8 @@ ***********************************************************************/ #include "ioAbc.h" -#include "main.h" -#include "mio.h" +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/io/ioWriteBook.c b/src/base/io/ioWriteBook.c index 45807ce6..ae717c8d 100644 --- a/src/base/io/ioWriteBook.c +++ b/src/base/io/ioWriteBook.c @@ -18,9 +18,11 @@ ***********************************************************************/ +#include <math.h> + +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" #include "ioAbc.h" -#include "main.h" -#include "mio.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/io/ioWriteCnf.c b/src/base/io/ioWriteCnf.c index 6cb82a0a..d5d377cc 100644 --- a/src/base/io/ioWriteCnf.c +++ b/src/base/io/ioWriteCnf.c @@ -19,7 +19,7 @@ ***********************************************************************/ #include "ioAbc.h" -#include "satSolver.h" +#include "src/sat/bsat/satSolver.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/io/ioWriteDot.c b/src/base/io/ioWriteDot.c index c1b9befc..9a9bcd82 100644 --- a/src/base/io/ioWriteDot.c +++ b/src/base/io/ioWriteDot.c @@ -19,8 +19,8 @@ ***********************************************************************/ #include "ioAbc.h" -#include "main.h" -#include "mio.h" +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/io/ioWriteVerilog.c b/src/base/io/ioWriteVerilog.c index 7f9bee95..511eb9f0 100644 --- a/src/base/io/ioWriteVerilog.c +++ b/src/base/io/ioWriteVerilog.c @@ -19,8 +19,8 @@ ***********************************************************************/ #include "ioAbc.h" -#include "main.h" -#include "mio.h" +#include "src/base/main/main.h" +#include "src/map/mio/mio.h" ABC_NAMESPACE_IMPL_START @@ -492,7 +492,7 @@ void Io_WriteVerilogObjects( FILE * pFile, Abc_Ntk_t * pNtk ) int i, k, Counter, nDigits, Length; // write boxes - nDigits = Extra_Base10Log( Abc_NtkBoxNum(pNtk)-Abc_NtkLatchNum(pNtk) ); + nDigits = Abc_Base10Log( Abc_NtkBoxNum(pNtk)-Abc_NtkLatchNum(pNtk) ); Counter = 0; Abc_NtkForEachBox( pNtk, pObj, i ) { @@ -517,7 +517,7 @@ void Io_WriteVerilogObjects( FILE * pFile, Abc_Ntk_t * pNtk ) if ( Abc_NtkHasMapping(pNtk) ) { Length = Mio_LibraryReadGateNameMax((Mio_Library_t *)pNtk->pManFunc); - nDigits = Extra_Base10Log( Abc_NtkNodeNum(pNtk) ); + nDigits = Abc_Base10Log( Abc_NtkNodeNum(pNtk) ); Counter = 0; Abc_NtkForEachNode( pNtk, pObj, k ) { diff --git a/src/base/main/libSupport.c b/src/base/main/libSupport.c index 3c0b20c7..8c92a595 100644 --- a/src/base/main/libSupport.c +++ b/src/base/main/libSupport.c @@ -21,7 +21,7 @@ #include <stdio.h> #include <string.h> -#include "abc.h" +#include "src/base/abc/abc.h" #include "mainInt.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/main/main.c b/src/base/main/main.c index 16c6e362..27b4b0bd 100644 --- a/src/base/main/main.c +++ b/src/base/main/main.c @@ -18,7 +18,7 @@ ***********************************************************************/ -#include "abc.h" +#include "src/base/abc/abc.h" #include "mainInt.h" #ifdef ABC_PYTHON_EMBED diff --git a/src/base/main/main.h b/src/base/main/main.h index 134af6e2..33f8a110 100644 --- a/src/base/main/main.h +++ b/src/base/main/main.h @@ -18,30 +18,29 @@ ***********************************************************************/ -#ifndef __MAIN_H__ -#define __MAIN_H__ +#ifndef ABC__base__main__main_h +#define ABC__base__main__main_h //////////////////////////////////////////////////////////////////////// /// INCLUDES /// //////////////////////////////////////////////////////////////////////// -// data structure packages -#include "extra.h" -#include "vec.h" -#include "st.h" - // core packages -#include "abc.h" -#include "gia.h" +#include "src/base/abc/abc.h" +#include "src/aig/gia/gia.h" + +// data structure packages +#include "src/misc/vec/vec.h" +#include "src/misc/st/st.h" ABC_NAMESPACE_HEADER_START // the framework containing all data typedef struct Abc_Frame_t_ Abc_Frame_t; ABC_NAMESPACE_HEADER_END -#include "cmd.h" -#include "ioAbc.h" +#include "src/base/cmd/cmd.h" +#include "src/base/io/ioAbc.h" ABC_NAMESPACE_HEADER_START diff --git a/src/base/main/mainFrame.c b/src/base/main/mainFrame.c index 658bc34e..d03acf28 100644 --- a/src/base/main/mainFrame.c +++ b/src/base/main/mainFrame.c @@ -18,9 +18,10 @@ ***********************************************************************/ -#include "abc.h" +#include "src/base/abc/abc.h" #include "mainInt.h" -#include "dec.h" +#include "src/bool/dec/dec.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/main/mainInit.c b/src/base/main/mainInit.c index c15ca872..73abd548 100644 --- a/src/base/main/mainInit.c +++ b/src/base/main/mainInit.c @@ -18,7 +18,7 @@ ***********************************************************************/ -#include "abc.h" +#include "src/base/abc/abc.h" #include "mainInt.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/main/mainInt.h b/src/base/main/mainInt.h index c008fc8b..979d376c 100644 --- a/src/base/main/mainInt.h +++ b/src/base/main/mainInt.h @@ -18,8 +18,8 @@ ***********************************************************************/ -#ifndef __MAIN_INT_H__ -#define __MAIN_INT_H__ +#ifndef ABC__base__main__mainInt_h +#define ABC__base__main__mainInt_h //////////////////////////////////////////////////////////////////////// @@ -27,15 +27,16 @@ //////////////////////////////////////////////////////////////////////// #include "main.h" -#include "tim.h" -#include "if.h" -#include "aig.h" -#include "gia.h" -#include "ssw.h" -#include "fra.h" -#include "nwkMerge.h" -#include "ntlnwk.h" -#include "ext.h" +#include "src/misc/tim/tim.h" +#include "src/map/if/if.h" +#include "src/aig/aig/aig.h" +#include "src/aig/gia/gia.h" +#include "src/proof/ssw/ssw.h" +#include "src/proof/fra/fra.h" +//#include "src/aig/nwk/nwkMerge.h" +//#include "src/aig/ntl/ntlnwk.h" +#include "src/misc/ext/ext.h" +#include "src/misc/extra/extraBdd.h" ABC_NAMESPACE_HEADER_START @@ -89,12 +90,6 @@ struct Abc_Frame_t_ void * pLibVer; // the current Verilog library // new code - Ntl_Man_t * pAbc8Ntl; // the current design - Nwk_Man_t * pAbc8Nwk; // the current mapped network - Aig_Man_t * pAbc8Aig; // the current AIG - If_Lib_t * pAbc8Lib; // the current LUT library - If_Lib_t * pAbc85Lib; // the current LUT library - Gia_Man_t * pGia; Gia_Man_t * pGia2; Abc_Cex_t * pCex; diff --git a/src/base/main/mainLib.c b/src/base/main/mainLib.c index 39078ed9..83bae04f 100644 --- a/src/base/main/mainLib.c +++ b/src/base/main/mainLib.c @@ -18,7 +18,7 @@ ***********************************************************************/ -#include "abc.h" +#include "src/base/abc/abc.h" #include "mainInt.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/main/mainMC.c b/src/base/main/mainMC.c index 5e77db57..6d9f4c73 100644 --- a/src/base/main/mainMC.c +++ b/src/base/main/mainMC.c @@ -19,10 +19,10 @@ ***********************************************************************/ #include "mainInt.h" -#include "aig.h" -#include "saig.h" -#include "fra.h" -#include "ioa.h" +#include "aig/aig/aig.h" +#include "aig/saig/saig.h" +#include "aig/fra/fra.h" +#include "aig/ioa/ioa.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/main/mainUtils.c b/src/base/main/mainUtils.c index c849a53d..e263bc94 100644 --- a/src/base/main/mainUtils.c +++ b/src/base/main/mainUtils.c @@ -18,7 +18,7 @@ ***********************************************************************/ -#include "abc.h" +#include "src/base/abc/abc.h" #include "mainInt.h" #ifndef _WIN32 diff --git a/src/base/seq/module.make b/src/base/seq/module.make deleted file mode 100644 index c7716180..00000000 --- a/src/base/seq/module.make +++ /dev/null @@ -1,14 +0,0 @@ -SRC += src/base/seq/seqAigCore.c \ - src/base/seq/seqAigIter.c \ - src/base/seq/seqCreate.c \ - src/base/seq/seqFpgaCore.c \ - src/base/seq/seqFpgaIter.c \ - src/base/seq/seqLatch.c \ - src/base/seq/seqMan.c \ - src/base/seq/seqMapCore.c \ - src/base/seq/seqMapIter.c \ - src/base/seq/seqMaxMeanCycle.c \ - src/base/seq/seqRetCore.c \ - src/base/seq/seqRetIter.c \ - src/base/seq/seqShare.c \ - src/base/seq/seqUtil.c diff --git a/src/base/seq/seq.h b/src/base/seq/seq.h deleted file mode 100644 index 7faefe19..00000000 --- a/src/base/seq/seq.h +++ /dev/null @@ -1,105 +0,0 @@ -/**CFile**************************************************************** - - FileName [seq.h] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [External declarations.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seq.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#ifndef __SEQ_H__ -#define __SEQ_H__ - - -//////////////////////////////////////////////////////////////////////// -/// INCLUDES /// -//////////////////////////////////////////////////////////////////////// - -//////////////////////////////////////////////////////////////////////// -/// PARAMETERS /// -//////////////////////////////////////////////////////////////////////// - - - -ABC_NAMESPACE_HEADER_START - - -//////////////////////////////////////////////////////////////////////// -/// BASIC TYPES /// -//////////////////////////////////////////////////////////////////////// - -typedef struct Abc_Seq_t_ Abc_Seq_t; - -//////////////////////////////////////////////////////////////////////// -/// MACRO DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -/*=== seqAigCore.c ===========================================================*/ -extern void Seq_NtkSeqRetimeDelay( Abc_Ntk_t * pNtk, int nMaxIters, int fInitial, int fVerbose ); -extern void Seq_NtkSeqRetimeForward( Abc_Ntk_t * pNtk, int fInitial, int fVerbose ); -extern void Seq_NtkSeqRetimeBackward( Abc_Ntk_t * pNtk, int fInitial, int fVerbose ); -/*=== seqFpgaCore.c ===============================================================*/ -extern Abc_Ntk_t * Seq_NtkFpgaMapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose ); -/*=== seqMapCore.c ===============================================================*/ -extern Abc_Ntk_t * Seq_MapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose ); -/*=== seqRetCore.c ===========================================================*/ -extern Abc_Ntk_t * Seq_NtkRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fInitial, int fVerbose ); -/*=== seqLatch.c ===============================================================*/ -extern void Seq_NodeDupLats( Abc_Obj_t * pObjNew, Abc_Obj_t * pObj, int Edge ); -extern int Seq_NodeCompareLats( Abc_Obj_t * pObj1, int Edge1, Abc_Obj_t * pObj2, int Edge2 ); -/*=== seqMan.c ===============================================================*/ -extern Abc_Seq_t * Seq_Create( Abc_Ntk_t * pNtk ); -extern void Seq_Resize( Abc_Seq_t * p, int nMaxId ); -extern void Seq_Delete( Abc_Seq_t * p ); -/*=== seqMaxMeanCycle.c ======================================================*/ -extern float Seq_NtkHoward( Abc_Ntk_t * pNtk, int fVerbose ); -extern void Seq_NtkSkewForward( Abc_Ntk_t * pNtk, float period, int fMinimize ); -/*=== abcSeq.c ===============================================================*/ -extern Abc_Ntk_t * Abc_NtkAigToSeq( Abc_Ntk_t * pNtk ); -extern Abc_Ntk_t * Abc_NtkSeqToLogicSop( Abc_Ntk_t * pNtk ); -extern int Abc_NtkSeqCheck( Abc_Ntk_t * pNtk ); -/*=== seqShare.c =============================================================*/ -extern void Seq_NtkShareFanouts( Abc_Ntk_t * pNtk ); -extern void Seq_NtkShareLatches( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk ); -extern void Seq_NtkShareLatchesMapping( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, Vec_Ptr_t * vMapAnds, int fFpga ); -extern void Seq_NtkShareLatchesClean( Abc_Ntk_t * pNtk ); -/*=== seqUtil.c ==============================================================*/ -extern char * Seq_ObjFaninGetInitPrintable( Abc_Obj_t * pObj, int Edge ); -extern void Seq_NtkLatchSetValues( Abc_Ntk_t * pNtk, Abc_InitType_t Init ); -extern int Seq_NtkLatchNum( Abc_Ntk_t * pNtk ); -extern int Seq_NtkLatchNumMax( Abc_Ntk_t * pNtk ); -extern int Seq_NtkLatchNumShared( Abc_Ntk_t * pNtk ); -extern void Seq_NtkLatchGetInitNums( Abc_Ntk_t * pNtk, int * pInits ); -extern int Seq_NtkLatchGetEqualFaninNum( Abc_Ntk_t * pNtk ); -extern int Seq_NtkCountNodesAboveLimit( Abc_Ntk_t * pNtk, int Limit ); -extern int Seq_MapComputeAreaFlows( Abc_Ntk_t * pNtk, int fVerbose ); -extern Vec_Ptr_t * Seq_NtkReachNodes( Abc_Ntk_t * pNtk, int fFromPos ); -extern int Seq_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose ); - - - -ABC_NAMESPACE_HEADER_END - - - -#endif - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - diff --git a/src/base/seq/seqAigCore.c b/src/base/seq/seqAigCore.c deleted file mode 100644 index ce4563f9..00000000 --- a/src/base/seq/seqAigCore.c +++ /dev/null @@ -1,981 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqRetCore.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [The core of retiming procedures.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqRetCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "seqInt.h" - -ABC_NAMESPACE_IMPL_START - - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -/* - Retiming can be represented in three equivalent forms: - - as a set of integer lags for each node (array of chars by node ID) - - as a set of node numbers with lag for each, fwd and bwd (two arrays of Seq_RetStep_t_) - - as a set of latch moves over the nodes, fwd and bwd (two arrays of node pointers Abc_Obj_t *) -*/ - -static void Abc_ObjRetimeForward( Abc_Obj_t * pObj ); -static int Abc_ObjRetimeBackward( Abc_Obj_t * pObj, Abc_Ntk_t * pNtk, stmm_table * tTable, Vec_Int_t * vValues ); -static void Abc_ObjRetimeBackwardUpdateEdge( Abc_Obj_t * pObj, int Edge, stmm_table * tTable ); -static void Abc_NtkRetimeSetInitialValues( Abc_Ntk_t * pNtk, stmm_table * tTable, int * pModel ); - -static void Seq_NtkImplementRetimingForward( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMoves ); -static int Seq_NtkImplementRetimingBackward( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMoves, int fVerbose ); -static void Abc_ObjRetimeForward( Abc_Obj_t * pObj ); -static int Abc_ObjRetimeBackward( Abc_Obj_t * pObj, Abc_Ntk_t * pNtk, stmm_table * tTable, Vec_Int_t * vValues ); -static void Abc_ObjRetimeBackwardUpdateEdge( Abc_Obj_t * pObj, int Edge, stmm_table * tTable ); -static void Abc_NtkRetimeSetInitialValues( Abc_Ntk_t * pNtk, stmm_table * tTable, int * pModel ); - -static Vec_Ptr_t * Abc_NtkUtilRetimingTry( Abc_Ntk_t * pNtk, int fForward ); -static Vec_Ptr_t * Abc_NtkUtilRetimingGetMoves( Abc_Ntk_t * pNtk, Vec_Int_t * vSteps, int fForward ); -static Vec_Int_t * Abc_NtkUtilRetimingSplit( Vec_Str_t * vLags, int fForward ); -static void Abc_ObjRetimeForwardTry( Abc_Obj_t * pObj, int nLatches ); -static void Abc_ObjRetimeBackwardTry( Abc_Obj_t * pObj, int nLatches ); - - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Performs performs optimal delay retiming.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkSeqRetimeDelay( Abc_Ntk_t * pNtk, int nMaxIters, int fInitial, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - int RetValue; - if ( !fInitial ) - Seq_NtkLatchSetValues( pNtk, ABC_INIT_DC ); - // get the retiming lags - p->nMaxIters = nMaxIters; - if ( !Seq_AigRetimeDelayLags( pNtk, fVerbose ) ) - return; - // implement this retiming - RetValue = Seq_NtkImplementRetiming( pNtk, p->vLags, fVerbose ); - if ( RetValue == 0 ) - printf( "Retiming completed but initial state computation has failed.\n" ); -} - -/**Function************************************************************* - - Synopsis [Performs most forward retiming.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkSeqRetimeForward( Abc_Ntk_t * pNtk, int fInitial, int fVerbose ) -{ - Vec_Ptr_t * vMoves; - Abc_Obj_t * pNode; - int i; - if ( !fInitial ) - Seq_NtkLatchSetValues( pNtk, ABC_INIT_DC ); - // get the forward moves - vMoves = Abc_NtkUtilRetimingTry( pNtk, 1 ); - // undo the forward moves - Vec_PtrForEachEntryReverse( Abc_Obj_t *, vMoves, pNode, i ) - Abc_ObjRetimeBackwardTry( pNode, 1 ); - // implement this forward retiming - Seq_NtkImplementRetimingForward( pNtk, vMoves ); - Vec_PtrFree( vMoves ); -} - -/**Function************************************************************* - - Synopsis [Performs most backward retiming.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkSeqRetimeBackward( Abc_Ntk_t * pNtk, int fInitial, int fVerbose ) -{ - Vec_Ptr_t * vMoves; - Abc_Obj_t * pNode; - int i, RetValue; - if ( !fInitial ) - Seq_NtkLatchSetValues( pNtk, ABC_INIT_DC ); - // get the backward moves - vMoves = Abc_NtkUtilRetimingTry( pNtk, 0 ); - // undo the backward moves - Vec_PtrForEachEntryReverse( Abc_Obj_t *, vMoves, pNode, i ) - Abc_ObjRetimeForwardTry( pNode, 1 ); - // implement this backward retiming - RetValue = Seq_NtkImplementRetimingBackward( pNtk, vMoves, fVerbose ); - Vec_PtrFree( vMoves ); - if ( RetValue == 0 ) - printf( "Retiming completed but initial state computation has failed.\n" ); -} - - - - -/**Function************************************************************* - - Synopsis [Implements the retiming on the sequential AIG.] - - Description [Split the retiming into forward and backward.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkImplementRetiming( Abc_Ntk_t * pNtk, Vec_Str_t * vLags, int fVerbose ) -{ - Vec_Int_t * vSteps; - Vec_Ptr_t * vMoves; - int RetValue; - - // forward retiming - vSteps = Abc_NtkUtilRetimingSplit( vLags, 1 ); - // translate each set of steps into moves - if ( fVerbose ) - printf( "The number of forward steps = %6d.\n", Vec_IntSize(vSteps) ); - vMoves = Abc_NtkUtilRetimingGetMoves( pNtk, vSteps, 1 ); - if ( fVerbose ) - printf( "The number of forward moves = %6d.\n", Vec_PtrSize(vMoves) ); - // implement this retiming - Seq_NtkImplementRetimingForward( pNtk, vMoves ); - Vec_IntFree( vSteps ); - Vec_PtrFree( vMoves ); - - // backward retiming - vSteps = Abc_NtkUtilRetimingSplit( vLags, 0 ); - // translate each set of steps into moves - if ( fVerbose ) - printf( "The number of backward steps = %6d.\n", Vec_IntSize(vSteps) ); - vMoves = Abc_NtkUtilRetimingGetMoves( pNtk, vSteps, 0 ); - if ( fVerbose ) - printf( "The number of backward moves = %6d.\n", Vec_PtrSize(vMoves) ); - // implement this retiming - RetValue = Seq_NtkImplementRetimingBackward( pNtk, vMoves, fVerbose ); - Vec_IntFree( vSteps ); - Vec_PtrFree( vMoves ); - return RetValue; -} - -/**Function************************************************************* - - Synopsis [Implements the given retiming on the sequential AIG.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkImplementRetimingForward( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMoves ) -{ - Abc_Obj_t * pNode; - int i; - Vec_PtrForEachEntry( Abc_Obj_t *, vMoves, pNode, i ) - Abc_ObjRetimeForward( pNode ); -} - -/**Function************************************************************* - - Synopsis [Retimes node forward by one latch.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Abc_ObjRetimeForward( Abc_Obj_t * pObj ) -{ - Abc_Obj_t * pFanout; - int Init0, Init1, Init, i; - assert( Abc_ObjFaninNum(pObj) == 2 ); - assert( Seq_ObjFaninL0(pObj) >= 1 ); - assert( Seq_ObjFaninL1(pObj) >= 1 ); - // remove the init values from the fanins - Init0 = Seq_NodeDeleteFirst( pObj, 0 ); - Init1 = Seq_NodeDeleteFirst( pObj, 1 ); - assert( Init0 != ABC_INIT_NONE ); - assert( Init1 != ABC_INIT_NONE ); - // take into account the complements in the node - if ( Abc_ObjFaninC0(pObj) ) - { - if ( Init0 == ABC_INIT_ZERO ) - Init0 = ABC_INIT_ONE; - else if ( Init0 == ABC_INIT_ONE ) - Init0 = ABC_INIT_ZERO; - } - if ( Abc_ObjFaninC1(pObj) ) - { - if ( Init1 == ABC_INIT_ZERO ) - Init1 = ABC_INIT_ONE; - else if ( Init1 == ABC_INIT_ONE ) - Init1 = ABC_INIT_ZERO; - } - // compute the value at the output of the node - if ( Init0 == ABC_INIT_ZERO || Init1 == ABC_INIT_ZERO ) - Init = ABC_INIT_ZERO; - else if ( Init0 == ABC_INIT_ONE && Init1 == ABC_INIT_ONE ) - Init = ABC_INIT_ONE; - else - Init = ABC_INIT_DC; - - // make sure the label is clean - Abc_ObjForEachFanout( pObj, pFanout, i ) - assert( pFanout->fMarkC == 0 ); - // add the init values to the fanouts - Abc_ObjForEachFanout( pObj, pFanout, i ) - { - if ( pFanout->fMarkC ) - continue; - pFanout->fMarkC = 1; - if ( Abc_ObjFaninId0(pFanout) != Abc_ObjFaninId1(pFanout) ) - Seq_NodeInsertLast( pFanout, Abc_ObjFanoutEdgeNum(pObj, pFanout), Init ); - else - { - assert( Abc_ObjFanin0(pFanout) == pObj ); - Seq_NodeInsertLast( pFanout, 0, Init ); - Seq_NodeInsertLast( pFanout, 1, Init ); - } - } - // clean the label - Abc_ObjForEachFanout( pObj, pFanout, i ) - pFanout->fMarkC = 0; -} - - -/**Function************************************************************* - - Synopsis [Implements the given retiming on the sequential AIG.] - - Description [Returns 0 of initial state computation fails.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkImplementRetimingBackward( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMoves, int fVerbose ) -{ - Seq_RetEdge_t RetEdge; - stmm_table * tTable; - stmm_generator * gen; - Vec_Int_t * vValues; - Abc_Ntk_t * pNtkProb, * pNtkMiter, * pNtkCnf; - Abc_Obj_t * pNode, * pNodeNew; - int * pModel, RetValue, i, clk; - - // return if the retiming is trivial - if ( Vec_PtrSize(vMoves) == 0 ) - return 1; - - // create the network for the initial state computation - // start the table and the array of PO values - pNtkProb = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_SOP, 1 ); - tTable = stmm_init_table( stmm_numcmp, stmm_numhash ); - vValues = Vec_IntAlloc( 100 ); - - // perform the backward moves and build the network for initial state computation - RetValue = 0; - Vec_PtrForEachEntry( Abc_Obj_t *, vMoves, pNode, i ) - RetValue |= Abc_ObjRetimeBackward( pNode, pNtkProb, tTable, vValues ); - - // add the PIs corresponding to the white spots - stmm_foreach_item( tTable, gen, (char **)&RetEdge, (char **)&pNodeNew ) - Abc_ObjAddFanin( pNodeNew, Abc_NtkCreatePi(pNtkProb) ); - - // add the PI/PO names - Abc_NtkAddDummyPiNames( pNtkProb ); - Abc_NtkAddDummyPoNames( pNtkProb ); - - // make sure everything is okay with the network structure - if ( !Abc_NtkDoCheck( pNtkProb ) ) - { - printf( "Seq_NtkImplementRetimingBackward: The internal network check has failed.\n" ); - Abc_NtkRetimeSetInitialValues( pNtk, tTable, NULL ); - Abc_NtkDelete( pNtkProb ); - stmm_free_table( tTable ); - Vec_IntFree( vValues ); - return 0; - } - - // check if conflict is found - if ( RetValue ) - { - printf( "Seq_NtkImplementRetimingBackward: A top level conflict is detected. DC latch values are used.\n" ); - Abc_NtkRetimeSetInitialValues( pNtk, tTable, NULL ); - Abc_NtkDelete( pNtkProb ); - stmm_free_table( tTable ); - Vec_IntFree( vValues ); - return 0; - } - - // get the miter cone - pNtkMiter = Abc_NtkCreateTarget( pNtkProb, pNtkProb->vCos, vValues ); - Abc_NtkDelete( pNtkProb ); - Vec_IntFree( vValues ); - - if ( fVerbose ) - printf( "The number of ANDs in the AIG = %5d.\n", Abc_NtkNodeNum(pNtkMiter) ); - - // transform the miter into a logic network for efficient CNF construction -// pNtkCnf = Abc_Ntk_Renode( pNtkMiter, 0, 100, 1, 0, 0 ); -// Abc_NtkDelete( pNtkMiter ); - pNtkCnf = pNtkMiter; - - // solve the miter -clk = clock(); -// RetValue = Abc_NtkMiterSat_OldAndRusty( pNtkCnf, 30, 0 ); - RetValue = Abc_NtkMiterSat( pNtkCnf, (sint64)500000, (sint64)50000000, 0, 0, NULL, NULL ); -if ( fVerbose ) -if ( clock() - clk > 100 ) -{ -PRT( "SAT solving time", clock() - clk ); -} - pModel = pNtkCnf->pModel; pNtkCnf->pModel = NULL; - Abc_NtkDelete( pNtkCnf ); - - // analyze the result - if ( RetValue == -1 || RetValue == 1 ) - { - Abc_NtkRetimeSetInitialValues( pNtk, tTable, NULL ); - if ( RetValue == 1 ) - printf( "Seq_NtkImplementRetimingBackward: The problem is unsatisfiable. DC latch values are used.\n" ); - else - printf( "Seq_NtkImplementRetimingBackward: The SAT problem timed out. DC latch values are used.\n" ); - stmm_free_table( tTable ); - return 0; - } - - // set the values of the latches - Abc_NtkRetimeSetInitialValues( pNtk, tTable, pModel ); - stmm_free_table( tTable ); - free( pModel ); - return 1; -} - -/**Function************************************************************* - - Synopsis [Retimes node backward by one latch.] - - Description [Constructs the problem for initial state computation. - Returns 1 if the conflict is found.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_ObjRetimeBackward( Abc_Obj_t * pObj, Abc_Ntk_t * pNtkNew, stmm_table * tTable, Vec_Int_t * vValues ) -{ - Abc_Obj_t * pFanout; - Abc_InitType_t Init, Value; - Seq_RetEdge_t RetEdge; - Abc_Obj_t * pNodeNew, * pFanoutNew, * pBuffer; - int i, Edge, fMet0, fMet1, fMetN; - - // make sure the node can be retimed - assert( Seq_ObjFanoutLMin(pObj) > 0 ); - // get the fanout values - fMet0 = fMet1 = fMetN = 0; - Abc_ObjForEachFanout( pObj, pFanout, i ) - { - if ( Abc_ObjFaninId0(pFanout) == pObj->Id ) - { - Init = Seq_NodeGetInitLast( pFanout, 0 ); - if ( Init == ABC_INIT_ZERO ) - fMet0 = 1; - else if ( Init == ABC_INIT_ONE ) - fMet1 = 1; - else if ( Init == ABC_INIT_NONE ) - fMetN = 1; - } - if ( Abc_ObjFaninId1(pFanout) == pObj->Id ) - { - Init = Seq_NodeGetInitLast( pFanout, 1 ); - if ( Init == ABC_INIT_ZERO ) - fMet0 = 1; - else if ( Init == ABC_INIT_ONE ) - fMet1 = 1; - else if ( Init == ABC_INIT_NONE ) - fMetN = 1; - } - } - - // consider the case when all fanout latches have don't-care values - // the new values on the fanin edges will be don't-cares - if ( !fMet0 && !fMet1 && !fMetN ) - { - // make sure the label is clean - Abc_ObjForEachFanout( pObj, pFanout, i ) - assert( pFanout->fMarkC == 0 ); - // update the fanout edges - Abc_ObjForEachFanout( pObj, pFanout, i ) - { - if ( pFanout->fMarkC ) - continue; - pFanout->fMarkC = 1; - if ( Abc_ObjFaninId0(pFanout) == pObj->Id ) - Seq_NodeDeleteLast( pFanout, 0 ); - if ( Abc_ObjFaninId1(pFanout) == pObj->Id ) - Seq_NodeDeleteLast( pFanout, 1 ); - } - // clean the label - Abc_ObjForEachFanout( pObj, pFanout, i ) - pFanout->fMarkC = 0; - // update the fanin edges - Abc_ObjRetimeBackwardUpdateEdge( pObj, 0, tTable ); - Abc_ObjRetimeBackwardUpdateEdge( pObj, 1, tTable ); - Seq_NodeInsertFirst( pObj, 0, ABC_INIT_DC ); - Seq_NodeInsertFirst( pObj, 1, ABC_INIT_DC ); - return 0; - } - // the initial values on the fanout edges contain 0, 1, or unknown - // the new values on the fanin edges will be unknown - - // add new AND-gate to the network - pNodeNew = Abc_NtkCreateNode( pNtkNew ); - pNodeNew->pData = Abc_SopCreateAnd2( (Extra_MmFlex_t *)pNtkNew->pManFunc, Abc_ObjFaninC0(pObj), Abc_ObjFaninC1(pObj) ); - - // add PO fanouts if any - if ( fMet0 ) - { - Abc_ObjAddFanin( Abc_NtkCreatePo(pNtkNew), pNodeNew ); - Vec_IntPush( vValues, 0 ); - } - if ( fMet1 ) - { - Abc_ObjAddFanin( Abc_NtkCreatePo(pNtkNew), pNodeNew ); - Vec_IntPush( vValues, 1 ); - } - - // make sure the label is clean - Abc_ObjForEachFanout( pObj, pFanout, i ) - assert( pFanout->fMarkC == 0 ); - // perform the changes - Abc_ObjForEachFanout( pObj, pFanout, i ) - { - if ( pFanout->fMarkC ) - continue; - pFanout->fMarkC = 1; - if ( Abc_ObjFaninId0(pFanout) == pObj->Id ) - { - Edge = 0; - Value = Seq_NodeDeleteLast( pFanout, Edge ); - if ( Value == ABC_INIT_NONE ) - { - // value is unknown, remove it from the table - RetEdge.iNode = pFanout->Id; - RetEdge.iEdge = Edge; - RetEdge.iLatch = Seq_ObjFaninL( pFanout, Edge ); // after edge is removed - if ( !stmm_delete( tTable, (char **)&RetEdge, (char **)&pFanoutNew ) ) - assert( 0 ); - // create the fanout of the AND gate - Abc_ObjAddFanin( pFanoutNew, pNodeNew ); - } - } - if ( Abc_ObjFaninId1(pFanout) == pObj->Id ) - { - Edge = 1; - Value = Seq_NodeDeleteLast( pFanout, Edge ); - if ( Value == ABC_INIT_NONE ) - { - // value is unknown, remove it from the table - RetEdge.iNode = pFanout->Id; - RetEdge.iEdge = Edge; - RetEdge.iLatch = Seq_ObjFaninL( pFanout, Edge ); // after edge is removed - if ( !stmm_delete( tTable, (char **)&RetEdge, (char **)&pFanoutNew ) ) - assert( 0 ); - // create the fanout of the AND gate - Abc_ObjAddFanin( pFanoutNew, pNodeNew ); - } - } - } - // clean the label - Abc_ObjForEachFanout( pObj, pFanout, i ) - pFanout->fMarkC = 0; - - // update the fanin edges - Abc_ObjRetimeBackwardUpdateEdge( pObj, 0, tTable ); - Abc_ObjRetimeBackwardUpdateEdge( pObj, 1, tTable ); - Seq_NodeInsertFirst( pObj, 0, ABC_INIT_NONE ); - Seq_NodeInsertFirst( pObj, 1, ABC_INIT_NONE ); - - // add the buffer - pBuffer = Abc_NtkCreateNode( pNtkNew ); - pBuffer->pData = Abc_SopCreateBuf( (Extra_MmFlex_t *)pNtkNew->pManFunc ); - Abc_ObjAddFanin( pNodeNew, pBuffer ); - // point to it from the table - RetEdge.iNode = pObj->Id; - RetEdge.iEdge = 0; - RetEdge.iLatch = 0; - if ( stmm_insert( tTable, (char *)Seq_RetEdge2Int(RetEdge), (char *)pBuffer ) ) - assert( 0 ); - - // add the buffer - pBuffer = Abc_NtkCreateNode( pNtkNew ); - pBuffer->pData = Abc_SopCreateBuf( (Extra_MmFlex_t *)pNtkNew->pManFunc ); - Abc_ObjAddFanin( pNodeNew, pBuffer ); - // point to it from the table - RetEdge.iNode = pObj->Id; - RetEdge.iEdge = 1; - RetEdge.iLatch = 0; - if ( stmm_insert( tTable, (char *)Seq_RetEdge2Int(RetEdge), (char *)pBuffer ) ) - assert( 0 ); - - // report conflict is found - return fMet0 && fMet1; -} - -/**Function************************************************************* - - Synopsis [Generates the printable edge label with the initial state.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Abc_ObjRetimeBackwardUpdateEdge( Abc_Obj_t * pObj, int Edge, stmm_table * tTable ) -{ - Abc_Obj_t * pFanoutNew; - Seq_RetEdge_t RetEdge; - Abc_InitType_t Init; - int nLatches, i; - - // get the number of latches on the edge - nLatches = Seq_ObjFaninL( pObj, Edge ); - for ( i = nLatches - 1; i >= 0; i-- ) - { - // get the value of this latch - Init = Seq_NodeGetInitOne( pObj, Edge, i ); - if ( Init != ABC_INIT_NONE ) - continue; - // get the retiming edge - RetEdge.iNode = pObj->Id; - RetEdge.iEdge = Edge; - RetEdge.iLatch = i; - // remove entry from table and add it with a different key - if ( !stmm_delete( tTable, (char **)&RetEdge, (char **)&pFanoutNew ) ) - assert( 0 ); - RetEdge.iLatch++; - if ( stmm_insert( tTable, (char *)Seq_RetEdge2Int(RetEdge), (char *)pFanoutNew ) ) - assert( 0 ); - } -} - -/**Function************************************************************* - - Synopsis [Sets the initial values.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Abc_NtkRetimeSetInitialValues( Abc_Ntk_t * pNtk, stmm_table * tTable, int * pModel ) -{ - Abc_Obj_t * pNode; - stmm_generator * gen; - Seq_RetEdge_t RetEdge; - Abc_InitType_t Init; - int i; - - i = 0; - stmm_foreach_item( tTable, gen, (char **)&RetEdge, NULL ) - { - pNode = Abc_NtkObj( pNtk, RetEdge.iNode ); - Init = pModel? (pModel[i]? ABC_INIT_ONE : ABC_INIT_ZERO) : ABC_INIT_DC; - Seq_NodeSetInitOne( pNode, RetEdge.iEdge, RetEdge.iLatch, Init ); - i++; - } -} - - - -/**Function************************************************************* - - Synopsis [Performs forward retiming of the sequential AIG.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Vec_Ptr_t * Abc_NtkUtilRetimingTry( Abc_Ntk_t * pNtk, int fForward ) -{ - Vec_Ptr_t * vNodes, * vMoves; - Abc_Obj_t * pNode, * pFanout, * pFanin; - int i, k, nLatches; - assert( Abc_NtkIsSeq( pNtk ) ); - // assume that all nodes can be retimed - vNodes = Vec_PtrAlloc( 100 ); - Abc_AigForEachAnd( pNtk, pNode, i ) - { - Vec_PtrPush( vNodes, pNode ); - pNode->fMarkA = 1; - } - // process the nodes - vMoves = Vec_PtrAlloc( 100 ); - Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pNode, i ) - { -// printf( "(%d,%d) ", Seq_ObjFaninL0(pNode), Seq_ObjFaninL0(pNode) ); - // unmark the node as processed - pNode->fMarkA = 0; - // get the number of latches to retime - if ( fForward ) - nLatches = Seq_ObjFaninLMin(pNode); - else - nLatches = Seq_ObjFanoutLMin(pNode); - if ( nLatches == 0 ) - continue; - assert( nLatches > 0 ); - // retime the latches forward - if ( fForward ) - Abc_ObjRetimeForwardTry( pNode, nLatches ); - else - Abc_ObjRetimeBackwardTry( pNode, nLatches ); - // write the moves - for ( k = 0; k < nLatches; k++ ) - Vec_PtrPush( vMoves, pNode ); - // schedule fanouts for updating - if ( fForward ) - { - Abc_ObjForEachFanout( pNode, pFanout, k ) - { - if ( Abc_ObjFaninNum(pFanout) != 2 || pFanout->fMarkA ) - continue; - pFanout->fMarkA = 1; - Vec_PtrPush( vNodes, pFanout ); - } - } - else - { - Abc_ObjForEachFanin( pNode, pFanin, k ) - { - if ( Abc_ObjFaninNum(pFanin) != 2 || pFanin->fMarkA ) - continue; - pFanin->fMarkA = 1; - Vec_PtrPush( vNodes, pFanin ); - } - } - } - Vec_PtrFree( vNodes ); - // make sure the marks are clean the the retiming is final - Abc_AigForEachAnd( pNtk, pNode, i ) - { - assert( pNode->fMarkA == 0 ); - if ( fForward ) - assert( Seq_ObjFaninLMin(pNode) == 0 ); - else - assert( Seq_ObjFanoutLMin(pNode) == 0 ); - } - return vMoves; -} - -/**Function************************************************************* - - Synopsis [Translates retiming steps into retiming moves.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Vec_Ptr_t * Abc_NtkUtilRetimingGetMoves( Abc_Ntk_t * pNtk, Vec_Int_t * vSteps, int fForward ) -{ - Seq_RetStep_t RetStep; - Vec_Ptr_t * vMoves; - Abc_Obj_t * pNode; - int i, k, iNode, nLatches, Number; - int fChange; - assert( Abc_NtkIsSeq( pNtk ) ); - -/* - // try implementing all the moves at once - Vec_IntForEachEntry( vSteps, Number, i ) - { - // get the retiming step - RetStep = Seq_Int2RetStep( Number ); - // get the node to be retimed - pNode = Abc_NtkObj( pNtk, RetStep.iNode ); - assert( RetStep.nLatches > 0 ); - nLatches = RetStep.nLatches; - - if ( fForward ) - Abc_ObjRetimeForwardTry( pNode, nLatches ); - else - Abc_ObjRetimeBackwardTry( pNode, nLatches ); - } - // now look if any node has wrong number of latches - Abc_AigForEachAnd( pNtk, pNode, i ) - { - if ( Seq_ObjFaninL0(pNode) < 0 ) - printf( "Wrong 0node %d.\n", pNode->Id ); - if ( Seq_ObjFaninL1(pNode) < 0 ) - printf( "Wrong 1node %d.\n", pNode->Id ); - } - // try implementing all the moves at once - Vec_IntForEachEntry( vSteps, Number, i ) - { - // get the retiming step - RetStep = Seq_Int2RetStep( Number ); - // get the node to be retimed - pNode = Abc_NtkObj( pNtk, RetStep.iNode ); - assert( RetStep.nLatches > 0 ); - nLatches = RetStep.nLatches; - - if ( !fForward ) - Abc_ObjRetimeForwardTry( pNode, nLatches ); - else - Abc_ObjRetimeBackwardTry( pNode, nLatches ); - } -*/ - - // process the nodes - vMoves = Vec_PtrAlloc( 100 ); - while ( Vec_IntSize(vSteps) > 0 ) - { - iNode = 0; - fChange = 0; - Vec_IntForEachEntry( vSteps, Number, i ) - { - // get the retiming step - RetStep = Seq_Int2RetStep( Number ); - // get the node to be retimed - pNode = Abc_NtkObj( pNtk, RetStep.iNode ); - assert( RetStep.nLatches > 0 ); - // get the number of latches that can be retimed - if ( fForward ) - nLatches = Seq_ObjFaninLMin(pNode); - else - nLatches = Seq_ObjFanoutLMin(pNode); - if ( nLatches == 0 ) - { - Vec_IntWriteEntry( vSteps, iNode++, Seq_RetStep2Int(RetStep) ); - continue; - } - assert( nLatches > 0 ); - fChange = 1; - // get the number of latches to be retimed over this node - nLatches = ABC_MIN( nLatches, (int)RetStep.nLatches ); - // retime the latches forward - if ( fForward ) - Abc_ObjRetimeForwardTry( pNode, nLatches ); - else - Abc_ObjRetimeBackwardTry( pNode, nLatches ); - // write the moves - for ( k = 0; k < nLatches; k++ ) - Vec_PtrPush( vMoves, pNode ); - // subtract the retiming performed - RetStep.nLatches -= nLatches; - // store the node if it is not retimed completely - if ( RetStep.nLatches > 0 ) - Vec_IntWriteEntry( vSteps, iNode++, Seq_RetStep2Int(RetStep) ); - } - // reduce the array - Vec_IntShrink( vSteps, iNode ); - if ( !fChange ) - { - printf( "Warning: %d strange steps (a minor bug to be fixed later).\n", Vec_IntSize(vSteps) ); -/* - Vec_IntForEachEntry( vSteps, Number, i ) - { - RetStep = Seq_Int2RetStep( Number ); - printf( "%d(%d) ", RetStep.iNode, RetStep.nLatches ); - } - printf( "\n" ); -*/ - break; - } - } - // undo the tentative retiming - if ( fForward ) - { - Vec_PtrForEachEntryReverse( Abc_Obj_t *, vMoves, pNode, i ) - Abc_ObjRetimeBackwardTry( pNode, 1 ); - } - else - { - Vec_PtrForEachEntryReverse( Abc_Obj_t *, vMoves, pNode, i ) - Abc_ObjRetimeForwardTry( pNode, 1 ); - } - return vMoves; -} - - -/**Function************************************************************* - - Synopsis [Splits retiming into forward and backward.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Vec_Int_t * Abc_NtkUtilRetimingSplit( Vec_Str_t * vLags, int fForward ) -{ - Vec_Int_t * vNodes; - Seq_RetStep_t RetStep; - int Value, i; - vNodes = Vec_IntAlloc( 100 ); - Vec_StrForEachEntry( vLags, Value, i ) - { - if ( Value < 0 && fForward ) - { - RetStep.iNode = i; - RetStep.nLatches = -Value; - Vec_IntPush( vNodes, Seq_RetStep2Int(RetStep) ); - } - else if ( Value > 0 && !fForward ) - { - RetStep.iNode = i; - RetStep.nLatches = Value; - Vec_IntPush( vNodes, Seq_RetStep2Int(RetStep) ); - } - } - return vNodes; -} - -/**Function************************************************************* - - Synopsis [Retime node forward without initial states.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Abc_ObjRetimeForwardTry( Abc_Obj_t * pObj, int nLatches ) -{ - Abc_Obj_t * pFanout; - int i; - // make sure it is an AND gate - assert( Abc_ObjFaninNum(pObj) == 2 ); - // make sure it has enough latches -// assert( Seq_ObjFaninL0(pObj) >= nLatches ); -// assert( Seq_ObjFaninL1(pObj) >= nLatches ); - // subtract these latches on the fanin side - Seq_ObjAddFaninL0( pObj, -nLatches ); - Seq_ObjAddFaninL1( pObj, -nLatches ); - // make sure the label is clean - Abc_ObjForEachFanout( pObj, pFanout, i ) - assert( pFanout->fMarkC == 0 ); - // add these latches on the fanout side - Abc_ObjForEachFanout( pObj, pFanout, i ) - { - if ( pFanout->fMarkC ) - continue; - pFanout->fMarkC = 1; - if ( Abc_ObjFaninId0(pFanout) != Abc_ObjFaninId1(pFanout) ) - Seq_ObjAddFanoutL( pObj, pFanout, nLatches ); - else - { - assert( Abc_ObjFanin0(pFanout) == pObj ); - Seq_ObjAddFaninL0( pFanout, nLatches ); - Seq_ObjAddFaninL1( pFanout, nLatches ); - } - } - // clean the label - Abc_ObjForEachFanout( pObj, pFanout, i ) - pFanout->fMarkC = 0; -} - -/**Function************************************************************* - - Synopsis [Retime node backward without initial states.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Abc_ObjRetimeBackwardTry( Abc_Obj_t * pObj, int nLatches ) -{ - Abc_Obj_t * pFanout; - int i; - // make sure it is an AND gate - assert( Abc_ObjFaninNum(pObj) == 2 ); - // make sure the label is clean - Abc_ObjForEachFanout( pObj, pFanout, i ) - assert( pFanout->fMarkC == 0 ); - // subtract these latches on the fanout side - Abc_ObjForEachFanout( pObj, pFanout, i ) - { - if ( pFanout->fMarkC ) - continue; - pFanout->fMarkC = 1; -// assert( Abc_ObjFanoutL(pObj, pFanout) >= nLatches ); - if ( Abc_ObjFaninId0(pFanout) != Abc_ObjFaninId1(pFanout) ) - Seq_ObjAddFanoutL( pObj, pFanout, -nLatches ); - else - { - assert( Abc_ObjFanin0(pFanout) == pObj ); - Seq_ObjAddFaninL0( pFanout, -nLatches ); - Seq_ObjAddFaninL1( pFanout, -nLatches ); - } - } - // clean the label - Abc_ObjForEachFanout( pObj, pFanout, i ) - pFanout->fMarkC = 0; - // add these latches on the fanin side - Seq_ObjAddFaninL0( pObj, nLatches ); - Seq_ObjAddFaninL1( pObj, nLatches ); -} - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - - -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/seq/seqAigIter.c b/src/base/seq/seqAigIter.c deleted file mode 100644 index b71312f7..00000000 --- a/src/base/seq/seqAigIter.c +++ /dev/null @@ -1,273 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqRetIter.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [The iterative L-Value computation for retiming procedures.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqRetIter.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "seqInt.h" - -ABC_NAMESPACE_IMPL_START - - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -// the internal procedures -static int Seq_RetimeSearch_rec( Abc_Ntk_t * pNtk, int FiMin, int FiMax, int fVerbose ); -static int Seq_RetimeForPeriod( Abc_Ntk_t * pNtk, int Fi, int fVerbose ); -static int Seq_RetimeNodeUpdateLValue( Abc_Obj_t * pObj, int Fi ); - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Retimes AIG for optimal delay using Pan's algorithm.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Abc_Obj_t * pNode; - int i, FiMax, RetValue, clk, clkIter; - char NodeLag; - - assert( Abc_NtkIsSeq( pNtk ) ); - - // get the upper bound on the clock period - FiMax = 2 + Seq_NtkLevelMax(pNtk); - - // make sure this clock period is feasible - if ( !Seq_RetimeForPeriod( pNtk, FiMax, fVerbose ) ) - { - Vec_StrFill( p->vLags, p->nSize, 0 ); - printf( "Error: The upper bound on the clock period cannot be computed.\n" ); - printf( "The reason for this error may be the presence in the circuit of logic\n" ); - printf( "that is not reachable from the PIs. Mapping/retiming is not performed.\n" ); - return 0; - } - - // search for the optimal clock period between 0 and nLevelMax -clk = clock(); - p->FiBestInt = Seq_RetimeSearch_rec( pNtk, 0, FiMax, fVerbose ); -clkIter = clock() - clk; - - // recompute the best l-values - RetValue = Seq_RetimeForPeriod( pNtk, p->FiBestInt, fVerbose ); - assert( RetValue ); - - // fix the problem with non-converged delays - Abc_AigForEachAnd( pNtk, pNode, i ) - if ( Seq_NodeGetLValue(pNode) < -ABC_INFINITY/2 ) - Seq_NodeSetLValue( pNode, 0 ); - - // write the retiming lags - Vec_StrFill( p->vLags, p->nSize, 0 ); - Abc_AigForEachAnd( pNtk, pNode, i ) - { - NodeLag = Seq_NodeComputeLag( Seq_NodeGetLValue(pNode), p->FiBestInt ); - Seq_NodeSetLag( pNode, NodeLag ); - } - - // print the result - if ( fVerbose ) - printf( "The best clock period is %3d.\n", p->FiBestInt ); - -/* - printf( "lvalues and lags : " ); - Abc_AigForEachAnd( pNtk, pNode, i ) - printf( "%d=%d(%d) ", pNode->Id, Seq_NodeGetLValue(pNode), Seq_NodeGetLag(pNode) ); - printf( "\n" ); -*/ -/* - { - FILE * pTable; - pTable = fopen( "stats.txt", "a+" ); - fprintf( pTable, "%s ", pNtk->pName ); - fprintf( pTable, "%d ", FiBest ); - fprintf( pTable, "\n" ); - fclose( pTable ); - } -*/ -/* - { - FILE * pTable; - pTable = fopen( "stats.txt", "a+" ); - fprintf( pTable, "%s ", pNtk->pName ); - fprintf( pTable, "%.2f ", (float)(p->timeCuts)/(float)(CLOCKS_PER_SEC) ); - fprintf( pTable, "%.2f ", (float)(clkIter)/(float)(CLOCKS_PER_SEC) ); - fprintf( pTable, "\n" ); - fclose( pTable ); - } -*/ - return 1; - -} - -/**Function************************************************************* - - Synopsis [Performs binary search for the optimal clock period.] - - Description [Assumes that FiMin is infeasible while FiMax is feasible.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_RetimeSearch_rec( Abc_Ntk_t * pNtk, int FiMin, int FiMax, int fVerbose ) -{ - int Median; - assert( FiMin < FiMax ); - if ( FiMin + 1 == FiMax ) - return FiMax; - Median = FiMin + (FiMax - FiMin)/2; - if ( Seq_RetimeForPeriod( pNtk, Median, fVerbose ) ) - return Seq_RetimeSearch_rec( pNtk, FiMin, Median, fVerbose ); // Median is feasible - else - return Seq_RetimeSearch_rec( pNtk, Median, FiMax, fVerbose ); // Median is infeasible -} - -/**Function************************************************************* - - Synopsis [Returns 1 if retiming with this clock period is feasible.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_RetimeForPeriod( Abc_Ntk_t * pNtk, int Fi, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Abc_Obj_t * pObj; - int i, c, RetValue, fChange, Counter; - char * pReason = ""; - - // set l-values of all nodes to be minus infinity - Vec_IntFill( p->vLValues, p->nSize, -ABC_INFINITY ); - - // set l-values of constants and PIs - pObj = Abc_NtkObj( pNtk, 0 ); - Seq_NodeSetLValue( pObj, 0 ); - Abc_NtkForEachPi( pNtk, pObj, i ) - Seq_NodeSetLValue( pObj, 0 ); - - // update all values iteratively - Counter = 0; - for ( c = 0; c < p->nMaxIters; c++ ) - { - fChange = 0; - Abc_AigForEachAnd( pNtk, pObj, i ) - { - Counter++; - if ( Seq_NodeCutMan(pObj) ) - RetValue = Seq_FpgaNodeUpdateLValue( pObj, Fi ); - else - RetValue = Seq_RetimeNodeUpdateLValue( pObj, Fi ); - if ( RetValue == SEQ_UPDATE_YES ) - fChange = 1; - } - Abc_NtkForEachPo( pNtk, pObj, i ) - { - if ( Seq_NodeCutMan(pObj) ) - RetValue = Seq_FpgaNodeUpdateLValue( pObj, Fi ); - else - RetValue = Seq_RetimeNodeUpdateLValue( pObj, Fi ); - if ( RetValue == SEQ_UPDATE_FAIL ) - break; - } - if ( RetValue == SEQ_UPDATE_FAIL ) - break; - if ( fChange == 0 ) - break; - } - if ( c == p->nMaxIters ) - { - RetValue = SEQ_UPDATE_FAIL; - pReason = "(timeout)"; - } - else - c++; - // report the results - if ( fVerbose ) - { - if ( RetValue == SEQ_UPDATE_FAIL ) - printf( "Period = %3d. Iterations = %3d. Updates = %10d. Infeasible %s\n", Fi, c, Counter, pReason ); - else - printf( "Period = %3d. Iterations = %3d. Updates = %10d. Feasible\n", Fi, c, Counter ); - } -/* - // check if any AND gates have infinite delay - Counter = 0; - Abc_AigForEachAnd( pNtk, pObj, i ) - Counter += (Seq_NodeGetLValue(pObj) < -ABC_INFINITY/2); - if ( Counter > 0 ) - printf( "Warning: %d internal nodes have wrong l-values!\n", Counter ); -*/ - return RetValue != SEQ_UPDATE_FAIL; -} - -/**Function************************************************************* - - Synopsis [Computes the l-value of the node.] - - Description [The node can be internal or a PO.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_RetimeNodeUpdateLValue( Abc_Obj_t * pObj, int Fi ) -{ - int lValueNew, lValueOld, lValue0, lValue1; - assert( !Abc_ObjIsPi(pObj) ); - assert( Abc_ObjFaninNum(pObj) > 0 ); - lValue0 = Seq_NodeGetLValue(Abc_ObjFanin0(pObj)) - Fi * Seq_ObjFaninL0(pObj); - if ( Abc_ObjIsPo(pObj) ) - return (lValue0 > Fi)? SEQ_UPDATE_FAIL : SEQ_UPDATE_NO; - if ( Abc_ObjFaninNum(pObj) == 2 ) - lValue1 = Seq_NodeGetLValue(Abc_ObjFanin1(pObj)) - Fi * Seq_ObjFaninL1(pObj); - else - lValue1 = -ABC_INFINITY; - lValueNew = 1 + ABC_MAX( lValue0, lValue1 ); - lValueOld = Seq_NodeGetLValue(pObj); -// if ( lValueNew == lValueOld ) - if ( lValueNew <= lValueOld ) - return SEQ_UPDATE_NO; - Seq_NodeSetLValue( pObj, lValueNew ); - return SEQ_UPDATE_YES; -} - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - - -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/seq/seqCreate.c b/src/base/seq/seqCreate.c deleted file mode 100644 index ec4fa6aa..00000000 --- a/src/base/seq/seqCreate.c +++ /dev/null @@ -1,487 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqCreate.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [Transformations to and from the sequential AIG.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqCreate.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "seqInt.h" - -ABC_NAMESPACE_IMPL_START - - -/* - A sequential network is similar to AIG in that it contains only - AND gates. However, the AND-gates are currently not hashed. - - When converting AIG into sequential AIG: - - Const1/PIs/POs remain the same as in the original AIG. - - Instead of the latches, a new cutset is added, which is currently - defined as a set of AND gates that have a latch among their fanouts. - - The edges of a sequential AIG are labeled with latch attributes - in addition to the complementation attibutes. - - The attributes contain information about the number of latches - and their initial states. - - The number of latches is stored directly on the edges. The initial - states are stored in the sequential AIG manager. - - In the current version of the code, the sequential AIG is static - in the sense that the new AIG nodes are never created. - The retiming (or retiming/mapping) is performed by moving the - latches over the static nodes of the AIG. - The new initial state after backward retiming is computed - by setting up and solving a SAT problem. -*/ - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -static Abc_Obj_t * Abc_NodeAigToSeq( Abc_Obj_t * pObjNew, Abc_Obj_t * pObj, int Edge, Vec_Int_t * vInitValues ); -static void Abc_NtkAigCutsetCopy( Abc_Ntk_t * pNtk ); -static Abc_Obj_t * Abc_NodeSeqToLogic( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pFanin, Seq_Lat_t * pRing, int nLatches ); - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - - -/**Function************************************************************* - - Synopsis [Converts combinational AIG with latches into sequential AIG.] - - Description [The const/PI/PO nodes are duplicated. The internal - nodes are duplicated in the topological order. The dangling nodes - are not duplicated. The choice nodes are duplicated.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Abc_NtkAigToSeq( Abc_Ntk_t * pNtk ) -{ - Abc_Ntk_t * pNtkNew; - Abc_Obj_t * pObj, * pFaninNew; - Vec_Int_t * vInitValues; - Abc_InitType_t Init; - int i, k, RetValue; - - // make sure it is an AIG without self-feeding latches - assert( Abc_NtkIsStrash(pNtk) ); - assert( Abc_NtkIsDfsOrdered(pNtk) ); - - if ( RetValue = Abc_NtkRemoveSelfFeedLatches(pNtk) ) - printf( "Modified %d self-feeding latches. The result may not verify.\n", RetValue ); - assert( Abc_NtkCountSelfFeedLatches(pNtk) == 0 ); - - // start the network - pNtkNew = Abc_NtkAlloc( ABC_NTK_SEQ, ABC_FUNC_AIG, 1 ); - // duplicate the name and the spec - pNtkNew->pName = Extra_UtilStrsav(pNtk->pName); - pNtkNew->pSpec = Extra_UtilStrsav(pNtk->pSpec); - - // map the constant nodes - Abc_NtkCleanCopy( pNtk ); - Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew); - - // copy all objects, except the latches and constant - Vec_PtrFill( pNtkNew->vObjs, Abc_NtkObjNumMax(pNtk), NULL ); - Vec_PtrWriteEntry( pNtkNew->vObjs, 0, Abc_AigConst1(pNtk)->pCopy ); - Abc_NtkForEachObj( pNtk, pObj, i ) - { - if ( i == 0 || Abc_ObjIsLatch(pObj) ) - continue; - pObj->pCopy = Abc_ObjAlloc( pNtkNew, pObj->Type ); - pObj->pCopy->Id = pObj->Id; // the ID is the same for both - pObj->pCopy->fPhase = pObj->fPhase; // used to work with choices - pObj->pCopy->Level = pObj->Level; // used for upper bound on clock cycle - Vec_PtrWriteEntry( pNtkNew->vObjs, pObj->pCopy->Id, pObj->pCopy ); - pNtkNew->nObjs++; - } - pNtkNew->nObjCounts[ABC_OBJ_NODE] = pNtk->nObjCounts[ABC_OBJ_NODE]; - - // create PI/PO and their names - Abc_NtkForEachPi( pNtk, pObj, i ) - { - Vec_PtrPush( pNtkNew->vPis, pObj->pCopy ); - Vec_PtrPush( pNtkNew->vCis, pObj->pCopy ); - Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL ); - } - Abc_NtkForEachPo( pNtk, pObj, i ) - { - Vec_PtrPush( pNtkNew->vPos, pObj->pCopy ); - Vec_PtrPush( pNtkNew->vCos, pObj->pCopy ); - Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL ); - } - Abc_NtkForEachAssert( pNtk, pObj, i ) - { - Vec_PtrPush( pNtkNew->vAsserts, pObj->pCopy ); - Vec_PtrPush( pNtkNew->vCos, pObj->pCopy ); - Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL ); - } - - // relink the choice nodes - Abc_AigForEachAnd( pNtk, pObj, i ) - if ( pObj->pData ) - pObj->pCopy->pData = ((Abc_Obj_t *)pObj->pData)->pCopy; - - // start the storage for initial states - Seq_Resize( pNtkNew->pManFunc, Abc_NtkObjNumMax(pNtkNew) ); - // reconnect the internal nodes - vInitValues = Vec_IntAlloc( 100 ); - Abc_NtkForEachObj( pNtk, pObj, i ) - { - // skip constants, PIs, and latches - if ( Abc_ObjFaninNum(pObj) == 0 || Abc_ObjIsLatch(pObj) ) - continue; - // process the first fanin - Vec_IntClear( vInitValues ); - pFaninNew = Abc_NodeAigToSeq( pObj->pCopy, pObj, 0, vInitValues ); - Abc_ObjAddFanin( pObj->pCopy, pFaninNew ); - // store the initial values - Vec_IntForEachEntry( vInitValues, Init, k ) - Seq_NodeInsertFirst( pObj->pCopy, 0, Init ); - // skip single-input nodes - if ( Abc_ObjFaninNum(pObj) == 1 ) - continue; - // process the second fanin - Vec_IntClear( vInitValues ); - pFaninNew = Abc_NodeAigToSeq( pObj->pCopy, pObj, 1, vInitValues ); - Abc_ObjAddFanin( pObj->pCopy, pFaninNew ); - // store the initial values - Vec_IntForEachEntry( vInitValues, Init, k ) - Seq_NodeInsertFirst( pObj->pCopy, 1, Init ); - } - Vec_IntFree( vInitValues ); - - // set the cutset composed of latch drivers - Abc_NtkAigCutsetCopy( pNtk ); - Seq_NtkLatchGetEqualFaninNum( pNtkNew ); - - // copy EXDC and check correctness - if ( pNtk->pExdc ) - fprintf( stdout, "Warning: EXDC is not copied when converting to sequential AIG.\n" ); - if ( !Abc_NtkCheck( pNtkNew ) ) - fprintf( stdout, "Abc_NtkAigToSeq(): Network check has failed.\n" ); - return pNtkNew; -} - -/**Function************************************************************* - - Synopsis [Determines the fanin that is transparent for latches.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Obj_t * Abc_NodeAigToSeq( Abc_Obj_t * pObjNew, Abc_Obj_t * pObj, int Edge, Vec_Int_t * vInitValues ) -{ - Abc_Obj_t * pFanin, * pFaninNew; - Abc_InitType_t Init; - // get the given fanin of the node - pFanin = Abc_ObjFanin( pObj, Edge ); - // if fanin is the internal node, return its copy in the corresponding polarity - if ( !Abc_ObjIsLatch(pFanin) ) - return Abc_ObjNotCond( pFanin->pCopy, Abc_ObjFaninC(pObj, Edge) ); - // fanin is a latch - // get the new fanins - pFaninNew = Abc_NodeAigToSeq( pObjNew, pFanin, 0, vInitValues ); - // get the initial state - Init = Abc_LatchInit(pFanin); - // complement the initial state if the inv is retimed over the latch - if ( Abc_ObjIsComplement(pFaninNew) ) - { - if ( Init == ABC_INIT_ZERO ) - Init = ABC_INIT_ONE; - else if ( Init == ABC_INIT_ONE ) - Init = ABC_INIT_ZERO; - else if ( Init != ABC_INIT_DC ) - assert( 0 ); - } - // record the initial state - Vec_IntPush( vInitValues, Init ); - return Abc_ObjNotCond( pFaninNew, Abc_ObjFaninC(pObj, Edge) ); -} - -/**Function************************************************************* - - Synopsis [Collects the cut set nodes.] - - Description [These are internal AND gates that have latch fanouts.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Abc_NtkAigCutsetCopy( Abc_Ntk_t * pNtk ) -{ - Abc_Obj_t * pLatch, * pDriver, * pDriverNew; - int i; - Abc_NtkIncrementTravId(pNtk); - Abc_NtkForEachLatch( pNtk, pLatch, i ) - { - pDriver = Abc_ObjFanin0(pLatch); - if ( Abc_NodeIsTravIdCurrent(pDriver) || !Abc_AigNodeIsAnd(pDriver) ) - continue; - Abc_NodeSetTravIdCurrent(pDriver); - pDriverNew = pDriver->pCopy; - Vec_PtrPush( pDriverNew->pNtk->vCutSet, pDriverNew ); - } -} - -/**Function************************************************************* - - Synopsis [Converts a sequential AIG into a logic SOP network.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Abc_NtkSeqToLogicSop( Abc_Ntk_t * pNtk ) -{ - Abc_Ntk_t * pNtkNew; - Abc_Obj_t * pObj, * pFaninNew; - Seq_Lat_t * pRing; - int i; - - assert( Abc_NtkIsSeq(pNtk) ); - // start the network without latches - pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP ); - // duplicate the nodes - Abc_AigForEachAnd( pNtk, pObj, i ) - { - Abc_NtkDupObj(pNtkNew, pObj, 0); - pObj->pCopy->pData = Abc_SopCreateAnd2( (Extra_MmFlex_t *)pNtkNew->pManFunc, Abc_ObjFaninC0(pObj), Abc_ObjFaninC1(pObj) ); - } - // share and create the latches - Seq_NtkShareLatches( pNtkNew, pNtk ); - // connect the objects - Abc_AigForEachAnd( pNtk, pObj, i ) - { - if ( pRing = Seq_NodeGetRing(pObj,0) ) - pFaninNew = pRing->pLatch; - else - pFaninNew = Abc_ObjFanin0(pObj)->pCopy; - Abc_ObjAddFanin( pObj->pCopy, pFaninNew ); - - if ( pRing = Seq_NodeGetRing(pObj,1) ) - pFaninNew = pRing->pLatch; - else - pFaninNew = Abc_ObjFanin1(pObj)->pCopy; - Abc_ObjAddFanin( pObj->pCopy, pFaninNew ); - } - // connect the POs - Abc_NtkForEachPo( pNtk, pObj, i ) - { - if ( pRing = Seq_NodeGetRing(pObj,0) ) - pFaninNew = pRing->pLatch; - else - pFaninNew = Abc_ObjFanin0(pObj)->pCopy; - pFaninNew = Abc_ObjNotCond( pFaninNew, Abc_ObjFaninC0(pObj) ); - Abc_ObjAddFanin( pObj->pCopy, pFaninNew ); - } - // clean the latch pointers - Seq_NtkShareLatchesClean( pNtk ); - - // add the latches and their names - Abc_NtkAddDummyBoxNames( pNtkNew ); - Abc_NtkOrderCisCos( pNtkNew ); - // fix the problem with complemented and duplicated CO edges - Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 ); - if ( !Abc_NtkCheck( pNtkNew ) ) - fprintf( stdout, "Abc_NtkSeqToLogicSop(): Network check has failed.\n" ); - return pNtkNew; -} - - -/**Function************************************************************* - - Synopsis [Converts a sequential AIG into a logic SOP network.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Abc_NtkSeqToLogicSop_old( Abc_Ntk_t * pNtk ) -{ - Abc_Ntk_t * pNtkNew; - Abc_Obj_t * pObj, * pFaninNew; - int i; - - assert( Abc_NtkIsSeq(pNtk) ); - // start the network without latches - pNtkNew = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_SOP ); - - // duplicate the nodes, create node functions - Abc_NtkForEachNode( pNtk, pObj, i ) - { - // skip the constant - if ( Abc_ObjFaninNum(pObj) == 0 ) - continue; - // duplicate the node - Abc_NtkDupObj(pNtkNew, pObj, 0); - if ( Abc_ObjFaninNum(pObj) == 1 ) - { - assert( !Abc_ObjFaninC0(pObj) ); - pObj->pCopy->pData = Abc_SopCreateBuf( (Extra_MmFlex_t *)pNtkNew->pManFunc ); - continue; - } - pObj->pCopy->pData = Abc_SopCreateAnd2( (Extra_MmFlex_t *)pNtkNew->pManFunc, Abc_ObjFaninC0(pObj), Abc_ObjFaninC1(pObj) ); - } - // connect the objects - Abc_NtkForEachObj( pNtk, pObj, i ) - { - assert( (int)pObj->Id == i ); - // skip PIs and the constant - if ( Abc_ObjFaninNum(pObj) == 0 ) - continue; - // create the edge - pFaninNew = Abc_NodeSeqToLogic( pNtkNew, Abc_ObjFanin0(pObj), Seq_NodeGetRing(pObj,0), Seq_ObjFaninL0(pObj) ); - Abc_ObjAddFanin( pObj->pCopy, pFaninNew ); - if ( Abc_ObjFaninNum(pObj) == 1 ) - { - // create the complemented edge - if ( Abc_ObjFaninC0(pObj) ) - Abc_ObjSetFaninC( pObj->pCopy, 0 ); - continue; - } - // create the edge - pFaninNew = Abc_NodeSeqToLogic( pNtkNew, Abc_ObjFanin1(pObj), Seq_NodeGetRing(pObj,1), Seq_ObjFaninL1(pObj) ); - Abc_ObjAddFanin( pObj->pCopy, pFaninNew ); - // the complemented edges are subsumed by the node function - } - // add the latches and their names - Abc_NtkAddDummyBoxNames( pNtkNew ); - Abc_NtkOrderCisCos( pNtkNew ); - // fix the problem with complemented and duplicated CO edges - Abc_NtkLogicMakeSimpleCos( pNtkNew, 0 ); - if ( !Abc_NtkCheck( pNtkNew ) ) - fprintf( stdout, "Abc_NtkSeqToLogicSop(): Network check has failed.\n" ); - return pNtkNew; -} - - -/**Function************************************************************* - - Synopsis [Creates latches on one edge.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Obj_t * Abc_NodeSeqToLogic( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pFanin, Seq_Lat_t * pRing, int nLatches ) -{ - Abc_Obj_t * pLatch; - if ( nLatches == 0 ) - { - assert( pFanin->pCopy ); - return pFanin->pCopy; - } - pFanin = Abc_NodeSeqToLogic( pNtkNew, pFanin, Seq_LatNext(pRing), nLatches - 1 ); - pLatch = Abc_NtkCreateLatch( pNtkNew ); - pLatch->pData = (void *)Seq_LatInit( pRing ); - Abc_ObjAddFanin( pLatch, pFanin ); - return pLatch; -} - -/**Function************************************************************* - - Synopsis [Makes sure that every node in the table is in the network and vice versa.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Abc_NtkSeqCheck( Abc_Ntk_t * pNtk ) -{ - Abc_Obj_t * pObj; - int i, nFanins; - Abc_NtkForEachNode( pNtk, pObj, i ) - { - nFanins = Abc_ObjFaninNum(pObj); - if ( nFanins == 0 ) - { - if ( pObj != Abc_AigConst1(pNtk) ) - { - printf( "Abc_SeqCheck: The AIG has non-standard constant nodes.\n" ); - return 0; - } - continue; - } - if ( nFanins == 1 ) - { - printf( "Abc_SeqCheck: The AIG has single input nodes.\n" ); - return 0; - } - if ( nFanins > 2 ) - { - printf( "Abc_SeqCheck: The AIG has non-standard nodes.\n" ); - return 0; - } - } - // check the correctness of the internal representation of the initial states - Abc_NtkForEachObj( pNtk, pObj, i ) - { - nFanins = Abc_ObjFaninNum(pObj); - if ( nFanins == 0 ) - continue; - if ( nFanins == 1 ) - { - if ( Seq_NodeCountLats(pObj, 0) != Seq_ObjFaninL0(pObj) ) - { - printf( "Abc_SeqCheck: Node %d has mismatch in the number of latches.\n", Abc_ObjName(pObj) ); - return 0; - } - } - // look at both inputs - if ( Seq_NodeCountLats(pObj, 0) != Seq_ObjFaninL0(pObj) ) - { - printf( "Abc_SeqCheck: The first fanin of node %d has mismatch in the number of latches.\n", Abc_ObjName(pObj) ); - return 0; - } - if ( Seq_NodeCountLats(pObj, 1) != Seq_ObjFaninL1(pObj) ) - { - printf( "Abc_SeqCheck: The second fanin of node %d has mismatch in the number of latches.\n", Abc_ObjName(pObj) ); - return 0; - } - } - return 1; -} - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - - -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/seq/seqFpgaCore.c b/src/base/seq/seqFpgaCore.c deleted file mode 100644 index 8ab97b43..00000000 --- a/src/base/seq/seqFpgaCore.c +++ /dev/null @@ -1,648 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqFpgaCore.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [The core of FPGA mapping/retiming package.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqFpgaCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "seqInt.h" - -ABC_NAMESPACE_IMPL_START - - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -static Abc_Ntk_t * Seq_NtkFpgaDup( Abc_Ntk_t * pNtk ); -static int Seq_NtkFpgaInitCompatible( Abc_Ntk_t * pNtk, int fVerbose ); -static Abc_Ntk_t * Seq_NtkSeqFpgaMapped( Abc_Ntk_t * pNtkNew ); -static int Seq_FpgaMappingCount( Abc_Ntk_t * pNtk ); -static int Seq_FpgaMappingCount_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves ); -static Abc_Obj_t * Seq_FpgaMappingBuild_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, unsigned SeqEdge, int fTop, int LagCut, Vec_Ptr_t * vLeaves ); -static DdNode * Seq_FpgaMappingBdd_rec( DdManager * dd, Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves ); -static void Seq_FpgaMappingEdges_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, Vec_Ptr_t * vLeaves, Vec_Vec_t * vMapEdges ); -static void Seq_FpgaMappingConnect_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves ); -static DdNode * Seq_FpgaMappingConnectBdd_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves ); - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Performs FPGA mapping and retiming.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Seq_NtkFpgaMapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Abc_Ntk_t * pNtkNew; - Abc_Ntk_t * pNtkMap; - int RetValue; - - // get the LUT library - p->nVarsMax = Fpga_LutLibReadVarMax( Abc_FrameReadLibLut() ); - p->nMaxIters = nMaxIters; - - // find the best mapping and retiming for all nodes (p->vLValues, p->vBestCuts, p->vLags) - if ( !Seq_FpgaMappingDelays( pNtk, fVerbose ) ) - return NULL; - if ( RetValue = Abc_NtkGetChoiceNum(pNtk) ) - { - printf( "The network has %d choices. The resulting network is not derived (this is temporary).\n", RetValue ); - printf( "The mininum clock period computed is %d.\n", p->FiBestInt ); - return NULL; - } - - // duplicate the nodes contained in multiple cuts - pNtkNew = Seq_NtkFpgaDup( pNtk ); -// return pNtkNew; - - // implement the retiming - RetValue = Seq_NtkImplementRetiming( pNtkNew, ((Abc_Seq_t *)pNtkNew->pManFunc)->vLags, fVerbose ); - if ( RetValue == 0 ) - printf( "Retiming completed but initial state computation has failed.\n" ); -// return pNtkNew; - - // check the compatibility of initial states computed - if ( RetValue = Seq_NtkFpgaInitCompatible( pNtkNew, fVerbose ) ) - printf( "The number of LUTs with incompatible edges = %d.\n", RetValue ); - - // create the final mapped network - pNtkMap = Seq_NtkSeqFpgaMapped( pNtkNew ); - Abc_NtkDelete( pNtkNew ); - if ( RetValue ) - printf( "The number of LUTs with more than %d inputs = %d.\n", - p->nVarsMax, Seq_NtkCountNodesAboveLimit(pNtkMap, p->nVarsMax) ); - return pNtkMap; -} - -/**Function************************************************************* - - Synopsis [Derives the network by duplicating some of the nodes.] - - Description [Information about mapping is given as mapping nodes (p->vMapAnds) - and best cuts for each node (p->vMapCuts).] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Seq_NtkFpgaDup( Abc_Ntk_t * pNtk ) -{ - Abc_Seq_t * pNew, * p = pNtk->pManFunc; - Abc_Ntk_t * pNtkNew; - Abc_Obj_t * pObj, * pLeaf; - Vec_Ptr_t * vLeaves; - unsigned SeqEdge; - int i, k, nObjsNew, Lag; - - assert( Abc_NtkIsSeq(pNtk) ); - - // start the expanded network - pNtkNew = Abc_NtkStartFrom( pNtk, pNtk->ntkType, pNtk->ntkFunc ); - - // start the new sequential AIG manager - nObjsNew = 1 + Abc_NtkPiNum(pNtk) + Abc_NtkPoNum(pNtk) + Seq_FpgaMappingCount(pNtk); - Seq_Resize( pNtkNew->pManFunc, nObjsNew ); - - // duplicate the nodes in the mapping - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i ) - Abc_NtkDupObj( pNtkNew, pObj, 0 ); - - // recursively construct the internals of each node - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i ) - { - vLeaves = Vec_VecEntry( p->vMapCuts, i ); - Seq_FpgaMappingBuild_rec( pNtkNew, pNtk, pObj->Id << 8, 1, Seq_NodeGetLag(pObj), vLeaves ); - } - assert( nObjsNew == pNtkNew->nObjs ); - - // set the POs - Abc_NtkFinalize( pNtk, pNtkNew ); - // duplicate the latches on the PO edges - Abc_NtkForEachPo( pNtk, pObj, i ) - Seq_NodeDupLats( pObj->pCopy, pObj, 0 ); - - // transfer the mapping info to the new manager - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i ) - { - // get the leaves of the cut - vLeaves = Vec_VecEntry( p->vMapCuts, i ); - // convert the leaf nodes - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, k ) - { - SeqEdge = (unsigned)pLeaf; - pLeaf = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - Lag = (SeqEdge & 255) + Seq_NodeGetLag(pObj) - Seq_NodeGetLag(pLeaf); - assert( Lag >= 0 ); - // translate the old leaf into the leaf in the new network - Vec_PtrWriteEntry( vLeaves, k, (void *)((pLeaf->pCopy->Id << 8) | Lag) ); -// printf( "%d -> %d\n", pLeaf->Id, pLeaf->pCopy->Id ); - } - // convert the root node - Vec_PtrWriteEntry( p->vMapAnds, i, pObj->pCopy ); - } - pNew = pNtkNew->pManFunc; - pNew->nVarsMax = p->nVarsMax; - pNew->vMapAnds = p->vMapAnds; p->vMapAnds = NULL; - pNew->vMapCuts = p->vMapCuts; p->vMapCuts = NULL; - - if ( !Abc_NtkCheck( pNtkNew ) ) - fprintf( stdout, "Seq_NtkFpgaDup(): Network check has failed.\n" ); - return pNtkNew; -} - - -/**Function************************************************************* - - Synopsis [Checks if the initial states are compatible.] - - Description [Checks of all the initial states on the fanins edges - of the cut have compatible number of latches and initial states. - If this is not true, then the mapped network with the does not have initial - state. Returns the number of LUTs with incompatible edges.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkFpgaInitCompatible( Abc_Ntk_t * pNtk, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Abc_Obj_t * pAnd, * pLeaf, * pFanout0, * pFanout1; - Vec_Vec_t * vTotalEdges; - Vec_Ptr_t * vLeaves, * vEdges; - int i, k, m, Edge0, Edge1, nLatchAfter, nLatches1, nLatches2; - unsigned SeqEdge; - int CountBad = 0, CountAll = 0; - - vTotalEdges = Vec_VecStart( p->nVarsMax ); - // go through all the nodes (cuts) used in the mapping - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pAnd, i ) - { -// printf( "*** Node %d.\n", pAnd->Id ); - - // get the cut of this gate - vLeaves = Vec_VecEntry( p->vMapCuts, i ); - - // get the edges pointing to the leaves - Vec_VecClear( vTotalEdges ); - Seq_FpgaMappingEdges_rec( pNtk, pAnd->Id << 8, NULL, vLeaves, vTotalEdges ); - - // for each leaf, consider its edges - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, k ) - { - SeqEdge = (unsigned)pLeaf; - pLeaf = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - nLatchAfter = SeqEdge & 255; - if ( nLatchAfter == 0 ) - continue; - - // go through the edges - vEdges = Vec_VecEntry( vTotalEdges, k ); - pFanout0 = NULL; - Vec_PtrForEachEntry( Abc_Obj_t *, vEdges, pFanout1, m ) - { - Edge1 = Abc_ObjIsComplement(pFanout1); - pFanout1 = Abc_ObjRegular(pFanout1); -//printf( "Fanin = %d. Fanout = %d.\n", pLeaf->Id, pFanout1->Id ); - - // make sure this is the same fanin - if ( Edge1 ) - assert( pLeaf == Abc_ObjFanin1(pFanout1) ); - else - assert( pLeaf == Abc_ObjFanin0(pFanout1) ); - - // save the first one - if ( pFanout0 == NULL ) - { - pFanout0 = pFanout1; - Edge0 = Edge1; - continue; - } - // compare the rings - // if they have different number of latches, this is the bug - nLatches1 = Seq_NodeCountLats(pFanout0, Edge0); - nLatches2 = Seq_NodeCountLats(pFanout1, Edge1); - assert( nLatches1 == nLatches2 ); - assert( nLatches1 == nLatchAfter ); - assert( nLatches1 > 0 ); - - // if they have different initial states, this is the problem - if ( !Seq_NodeCompareLats(pFanout0, Edge0, pFanout1, Edge1) ) - { - CountBad++; - break; - } - CountAll++; - } - } - } - if ( fVerbose ) - printf( "The number of pairs of edges checked = %d.\n", CountAll ); - Vec_VecFree( vTotalEdges ); - return CountBad; -} - -/**Function************************************************************* - - Synopsis [Derives the final mapped network.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Seq_NtkSeqFpgaMapped( Abc_Ntk_t * pNtk ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Abc_Ntk_t * pNtkMap; - Vec_Ptr_t * vLeaves; - Abc_Obj_t * pObj, * pFaninNew; - Seq_Lat_t * pRing; - int i; - - assert( Abc_NtkIsSeq(pNtk) ); - - // start the network - pNtkMap = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_BDD ); - - // duplicate the nodes used in the mapping - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i ) - pObj->pCopy = Abc_NtkCreateNode( pNtkMap ); - - // create and share the latches - Seq_NtkShareLatchesMapping( pNtkMap, pNtk, p->vMapAnds, 1 ); - - // connect the nodes - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i ) - { - // get the leaves of this gate - vLeaves = Vec_VecEntry( p->vMapCuts, i ); - // get the BDD of the node - pObj->pCopy->pData = Seq_FpgaMappingConnectBdd_rec( pNtk, pObj->Id << 8, NULL, -1, pObj, vLeaves ); - Cudd_Ref( pObj->pCopy->pData ); - // complement the BDD of the cut if it came from the opposite polarity choice cut -// if ( Vec_StrEntry(p->vPhase, i) ) -// pObj->pCopy->pData = Cudd_Not( pObj->pCopy->pData ); - } - - // set the POs - Abc_NtkForEachPo( pNtk, pObj, i ) - { - if ( pRing = Seq_NodeGetRing(pObj,0) ) - pFaninNew = pRing->pLatch; - else - pFaninNew = Abc_ObjFanin0(pObj)->pCopy; - pFaninNew = Abc_ObjNotCond( pFaninNew, Abc_ObjFaninC0(pObj) ); - Abc_ObjAddFanin( pObj->pCopy, pFaninNew ); - } - - // add the latches and their names - Abc_NtkAddDummyBoxNames( pNtkMap ); - Abc_NtkOrderCisCos( pNtkMap ); - // fix the problem with complemented and duplicated CO edges - Abc_NtkLogicMakeSimpleCos( pNtkMap, 1 ); - // make the network minimum base - Abc_NtkMinimumBase( pNtkMap ); - if ( !Abc_NtkCheck( pNtkMap ) ) - fprintf( stdout, "Seq_NtkSeqFpgaMapped(): Network check has failed.\n" ); - return pNtkMap; -} - - -/**Function************************************************************* - - Synopsis [Counts the number of nodes in the bag.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_FpgaMappingCount( Abc_Ntk_t * pNtk ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Vec_Ptr_t * vLeaves; - Abc_Obj_t * pAnd; - int i, Counter = 0; - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pAnd, i ) - { - vLeaves = Vec_VecEntry( p->vMapCuts, i ); - Counter += Seq_FpgaMappingCount_rec( pNtk, pAnd->Id << 8, vLeaves ); - } - return Counter; -} - -/**Function************************************************************* - - Synopsis [Counts the number of nodes in the bag.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_FpgaMappingCount_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves ) -{ - Abc_Obj_t * pObj, * pLeaf; - unsigned SeqEdge0, SeqEdge1; - int Lag, i; - // get the object and the lag - pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - Lag = SeqEdge & 255; - // if the node is the fanin of the cut, return - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i ) - if ( SeqEdge == (unsigned)pLeaf ) - return 0; - // continue unfolding - assert( Abc_AigNodeIsAnd(pObj) ); - // get new sequential edges - assert( Lag + Seq_ObjFaninL0(pObj) < 255 ); - assert( Lag + Seq_ObjFaninL1(pObj) < 255 ); - SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj); - SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj); - // call for the children - return 1 + Seq_FpgaMappingCount_rec( pNtk, SeqEdge0, vLeaves ) + - Seq_FpgaMappingCount_rec( pNtk, SeqEdge1, vLeaves ); -} - -/**Function************************************************************* - - Synopsis [Collects the edges pointing to the leaves of the cut.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Obj_t * Seq_FpgaMappingBuild_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, unsigned SeqEdge, int fTop, int LagCut, Vec_Ptr_t * vLeaves ) -{ - Abc_Obj_t * pObj, * pObjNew, * pLeaf, * pFaninNew0, * pFaninNew1; - unsigned SeqEdge0, SeqEdge1; - int Lag, i; - // get the object and the lag - pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - Lag = SeqEdge & 255; - // if the node is the fanin of the cut, return - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i ) - if ( SeqEdge == (unsigned)pLeaf ) - return pObj->pCopy; - // continue unfolding - assert( Abc_AigNodeIsAnd(pObj) ); - // get new sequential edges - assert( Lag + Seq_ObjFaninL0(pObj) < 255 ); - assert( Lag + Seq_ObjFaninL1(pObj) < 255 ); - SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj); - SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj); - // call for the children - pObjNew = fTop? pObj->pCopy : Abc_NtkCreateNode( pNtkNew ); - // solve subproblems - pFaninNew0 = Seq_FpgaMappingBuild_rec( pNtkNew, pNtk, SeqEdge0, 0, LagCut, vLeaves ); - pFaninNew1 = Seq_FpgaMappingBuild_rec( pNtkNew, pNtk, SeqEdge1, 0, LagCut, vLeaves ); - // add the fanins to the node - Abc_ObjAddFanin( pObjNew, Abc_ObjNotCond( pFaninNew0, Abc_ObjFaninC0(pObj) ) ); - Abc_ObjAddFanin( pObjNew, Abc_ObjNotCond( pFaninNew1, Abc_ObjFaninC1(pObj) ) ); - Seq_NodeDupLats( pObjNew, pObj, 0 ); - Seq_NodeDupLats( pObjNew, pObj, 1 ); - // set the lag of the new node equal to the internal lag plus mapping/retiming lag - Seq_NodeSetLag( pObjNew, (char)(Lag + LagCut) ); -// Seq_NodeSetLag( pObjNew, (char)(Lag) ); - return pObjNew; -} - -/**Function************************************************************* - - Synopsis [Derives the BDD of the selected cut.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -DdNode * Seq_FpgaMappingBdd_rec( DdManager * dd, Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves ) -{ - Abc_Obj_t * pObj, * pLeaf; - DdNode * bFunc0, * bFunc1, * bFunc; - unsigned SeqEdge0, SeqEdge1; - int Lag, i; - // get the object and the lag - pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - Lag = SeqEdge & 255; - // if the node is the fanin of the cut, return - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i ) - if ( SeqEdge == (unsigned)pLeaf ) - return Cudd_bddIthVar( dd, i ); - // continue unfolding - assert( Abc_AigNodeIsAnd(pObj) ); - // get new sequential edges - assert( Lag + Seq_ObjFaninL0(pObj) < 255 ); - assert( Lag + Seq_ObjFaninL1(pObj) < 255 ); - SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj); - SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj); - // call for the children - bFunc0 = Seq_FpgaMappingBdd_rec( dd, pNtk, SeqEdge0, vLeaves ); Cudd_Ref( bFunc0 ); - bFunc1 = Seq_FpgaMappingBdd_rec( dd, pNtk, SeqEdge1, vLeaves ); Cudd_Ref( bFunc1 ); - bFunc0 = Cudd_NotCond( bFunc0, Abc_ObjFaninC0(pObj) ); - bFunc1 = Cudd_NotCond( bFunc1, Abc_ObjFaninC1(pObj) ); - // get the BDD of the node - bFunc = Cudd_bddAnd( dd, bFunc0, bFunc1 ); Cudd_Ref( bFunc ); - Cudd_RecursiveDeref( dd, bFunc0 ); - Cudd_RecursiveDeref( dd, bFunc1 ); - // return the BDD - Cudd_Deref( bFunc ); - return bFunc; -} - -/**Function************************************************************* - - Synopsis [Collects the edges pointing to the leaves of the cut.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_FpgaMappingEdges_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, Vec_Ptr_t * vLeaves, Vec_Vec_t * vMapEdges ) -{ - Abc_Obj_t * pObj, * pLeaf; - unsigned SeqEdge0, SeqEdge1; - int Lag, i; - // get the object and the lag - pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - Lag = SeqEdge & 255; - // if the node is the fanin of the cut, return - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i ) - { - if ( SeqEdge == (unsigned)pLeaf ) - { - assert( pPrev != NULL ); - Vec_VecPush( vMapEdges, i, pPrev ); - return; - } - } - // continue unfolding - assert( Abc_AigNodeIsAnd(pObj) ); - // get new sequential edges - assert( Lag + Seq_ObjFaninL0(pObj) < 255 ); - assert( Lag + Seq_ObjFaninL1(pObj) < 255 ); - SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj); - SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj); - // call for the children - Seq_FpgaMappingEdges_rec( pNtk, SeqEdge0, pObj , vLeaves, vMapEdges ); - Seq_FpgaMappingEdges_rec( pNtk, SeqEdge1, Abc_ObjNot(pObj), vLeaves, vMapEdges ); -} - -/**Function************************************************************* - - Synopsis [Collects the edges pointing to the leaves of the cut.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_FpgaMappingConnect_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves ) -{ - Seq_Lat_t * pRing; - Abc_Obj_t * pObj, * pLeaf, * pFanin, * pFaninNew; - unsigned SeqEdge0, SeqEdge1; - int Lag, i, k; - // get the object and the lag - pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - Lag = SeqEdge & 255; - // if the node is the fanin of the cut, add the connection and return - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i ) - { - if ( SeqEdge == (unsigned)pLeaf ) - { - assert( pPrev != NULL ); - if ( pRing = Seq_NodeGetRing(pPrev,Edge) ) - pFaninNew = pRing->pLatch; - else - pFaninNew = Abc_ObjFanin(pPrev,Edge)->pCopy; - // check if the root already has this fanin - Abc_ObjForEachFanin( pRoot, pFanin, k ) - if ( pFanin == pFaninNew ) - return; - Abc_ObjAddFanin( pRoot->pCopy, pFaninNew ); - return; - } - } - // continue unfolding - assert( Abc_AigNodeIsAnd(pObj) ); - // get new sequential edges - assert( Lag + Seq_ObjFaninL0(pObj) < 255 ); - assert( Lag + Seq_ObjFaninL1(pObj) < 255 ); - SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj); - SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj); - // call for the children - Seq_FpgaMappingConnect_rec( pNtk, SeqEdge0, pObj, 0, pRoot, vLeaves ); - Seq_FpgaMappingConnect_rec( pNtk, SeqEdge1, pObj, 1, pRoot, vLeaves ); -} - -/**Function************************************************************* - - Synopsis [Collects the edges pointing to the leaves of the cut.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -DdNode * Seq_FpgaMappingConnectBdd_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves ) -{ - Seq_Lat_t * pRing; - Abc_Obj_t * pObj, * pLeaf, * pFanin, * pFaninNew; - unsigned SeqEdge0, SeqEdge1; - DdManager * dd = pRoot->pCopy->pNtk->pManFunc; - DdNode * bFunc, * bFunc0, * bFunc1; - int Lag, i, k; - // get the object and the lag - pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - Lag = SeqEdge & 255; - // if the node is the fanin of the cut, add the connection and return - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i ) - { - if ( SeqEdge == (unsigned)pLeaf ) - { - assert( pPrev != NULL ); - if ( pRing = Seq_NodeGetRing(pPrev,Edge) ) - pFaninNew = pRing->pLatch; - else - pFaninNew = Abc_ObjFanin(pPrev,Edge)->pCopy; - // check if the root already has this fanin - Abc_ObjForEachFanin( pRoot->pCopy, pFanin, k ) - if ( pFanin == pFaninNew ) - return Cudd_bddIthVar( dd, k ); - Abc_ObjAddFanin( pRoot->pCopy, pFaninNew ); - return Cudd_bddIthVar( dd, k ); - } - } - // continue unfolding - assert( Abc_AigNodeIsAnd(pObj) ); - // get new sequential edges - assert( Lag + Seq_ObjFaninL0(pObj) < 255 ); - assert( Lag + Seq_ObjFaninL1(pObj) < 255 ); - SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj); - SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj); - // call for the children - bFunc0 = Seq_FpgaMappingConnectBdd_rec( pNtk, SeqEdge0, pObj, 0, pRoot, vLeaves ); Cudd_Ref( bFunc0 ); - bFunc1 = Seq_FpgaMappingConnectBdd_rec( pNtk, SeqEdge1, pObj, 1, pRoot, vLeaves ); Cudd_Ref( bFunc1 ); - bFunc0 = Cudd_NotCond( bFunc0, Abc_ObjFaninC0(pObj) ); - bFunc1 = Cudd_NotCond( bFunc1, Abc_ObjFaninC1(pObj) ); - // get the BDD of the node - bFunc = Cudd_bddAnd( dd, bFunc0, bFunc1 ); Cudd_Ref( bFunc ); - Cudd_RecursiveDeref( dd, bFunc0 ); - Cudd_RecursiveDeref( dd, bFunc1 ); - // return the BDD - Cudd_Deref( bFunc ); - return bFunc; -} - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - - -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/seq/seqFpgaIter.c b/src/base/seq/seqFpgaIter.c deleted file mode 100644 index c4551a73..00000000 --- a/src/base/seq/seqFpgaIter.c +++ /dev/null @@ -1,275 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqFpgaIter.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [Iterative delay computation in FPGA mapping/retiming package.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqFpgaIter.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "seqInt.h" -#include "main.h" -#include "fpga.h" - -ABC_NAMESPACE_IMPL_START - - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -static void Seq_FpgaMappingCollectNode_rec( Abc_Obj_t * pAnd, Vec_Ptr_t * vMapping, Vec_Vec_t * vMapCuts ); -static Cut_Cut_t * Seq_FpgaMappingSelectCut( Abc_Obj_t * pAnd ); - -extern Cut_Man_t * Abc_NtkSeqCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams ); -extern Cut_Man_t * Abc_NtkCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams ); - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Computes the retiming lags for FPGA mapping.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_FpgaMappingDelays( Abc_Ntk_t * pNtk, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Cut_Params_t Params, * pParams = &Params; - Abc_Obj_t * pObj; - int i, clk; - - // set defaults for cut computation - memset( pParams, 0, sizeof(Cut_Params_t) ); - pParams->nVarsMax = p->nVarsMax; // the max cut size ("k" of the k-feasible cuts) - pParams->nKeepMax = 1000; // the max number of cuts kept at a node - pParams->fTruth = 0; // compute truth tables - pParams->fFilter = 1; // filter dominated cuts - pParams->fSeq = 1; // compute sequential cuts - pParams->fVerbose = fVerbose; // the verbosiness flag - - // compute the cuts -clk = clock(); - p->pCutMan = Abc_NtkSeqCuts( pNtk, pParams ); -// pParams->fSeq = 0; -// p->pCutMan = Abc_NtkCuts( pNtk, pParams ); -p->timeCuts = clock() - clk; - - if ( fVerbose ) - Cut_ManPrintStats( p->pCutMan ); - - // compute area flows -// Seq_MapComputeAreaFlows( pNtk, fVerbose ); - - // compute the delays -clk = clock(); - if ( !Seq_AigRetimeDelayLags( pNtk, fVerbose ) ) - return 0; - p->timeDelay = clock() - clk; - - // collect the nodes and cuts used in the mapping - p->vMapAnds = Vec_PtrAlloc( 1000 ); - p->vMapCuts = Vec_VecAlloc( 1000 ); - Abc_NtkIncrementTravId( pNtk ); - Abc_NtkForEachPo( pNtk, pObj, i ) - Seq_FpgaMappingCollectNode_rec( Abc_ObjFanin0(pObj), p->vMapAnds, p->vMapCuts ); - - if ( fVerbose ) - printf( "The number of LUTs = %d.\n", Vec_PtrSize(p->vMapAnds) ); - - // remove the cuts - Cut_ManStop( p->pCutMan ); - p->pCutMan = NULL; - return 1; -} - -/**Function************************************************************* - - Synopsis [Derives the parameters of the best mapping/retiming for one node.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_FpgaMappingCollectNode_rec( Abc_Obj_t * pAnd, Vec_Ptr_t * vMapping, Vec_Vec_t * vMapCuts ) -{ - Abc_Obj_t * pFanin; - Cut_Cut_t * pCutBest; - int k; - - // skip if this is a non-PI node - if ( !Abc_AigNodeIsAnd(pAnd) ) - return; - // skip a visited node - if ( Abc_NodeIsTravIdCurrent(pAnd) ) - return; - Abc_NodeSetTravIdCurrent(pAnd); - - // visit the fanins of the node - pCutBest = Seq_FpgaMappingSelectCut( pAnd ); - for ( k = 0; k < (int)pCutBest->nLeaves; k++ ) - { - pFanin = Abc_NtkObj( pAnd->pNtk, pCutBest->pLeaves[k] >> 8 ); - Seq_FpgaMappingCollectNode_rec( pFanin, vMapping, vMapCuts ); - } - - // add this node - Vec_PtrPush( vMapping, pAnd ); - for ( k = 0; k < (int)pCutBest->nLeaves; k++ ) - Vec_VecPush( vMapCuts, Vec_PtrSize(vMapping)-1, (void *)pCutBest->pLeaves[k] ); -} - -/**Function************************************************************* - - Synopsis [Selects the best cut to represent the node in the mapping.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Cut_Cut_t * Seq_FpgaMappingSelectCut( Abc_Obj_t * pAnd ) -{ - Abc_Obj_t * pFanin; - Cut_Cut_t * pCut, * pCutBest, * pList; - float CostCur, CostMin = ABC_INFINITY; - int ArrivalCut, ArrivalMin, i; - // get the arrival time of the best non-trivial cut - ArrivalMin = Seq_NodeGetLValue( pAnd ); - // iterate through the cuts and select the one with the minimum cost - pList = Abc_NodeReadCuts( Seq_NodeCutMan(pAnd), pAnd ); - CostMin = ABC_INFINITY; - pCutBest = NULL; - for ( pCut = pList->pNext; pCut; pCut = pCut->pNext ) - { - ArrivalCut = *((int *)&pCut->uSign); -// assert( ArrivalCut >= ArrivalMin ); - if ( ArrivalCut > ArrivalMin ) - continue; - CostCur = 0.0; - for ( i = 0; i < (int)pCut->nLeaves; i++ ) - { - pFanin = Abc_NtkObj( pAnd->pNtk, pCut->pLeaves[i] >> 8 ); - if ( Abc_ObjIsPi(pFanin) ) - continue; - if ( Abc_NodeIsTravIdCurrent(pFanin) ) - continue; - CostCur += (float)(1.0 / Abc_ObjFanoutNum(pFanin)); -// CostCur += Seq_NodeGetFlow( pFanin ); - } - if ( CostMin > CostCur ) - { - CostMin = CostCur; - pCutBest = pCut; - } - } - assert( pCutBest != NULL ); - return pCutBest; -} - - -/**Function************************************************************* - - Synopsis [Computes the l-value of the cut.] - - Description [The node should be internal.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -static inline int Seq_FpgaCutUpdateLValue( Cut_Cut_t * pCut, Abc_Obj_t * pObj, int Fi ) -{ - Abc_Obj_t * pFanin; - int i, lValueMax, lValueCur; - assert( Abc_AigNodeIsAnd(pObj) ); - lValueMax = -ABC_INFINITY; - for ( i = 0; i < (int)pCut->nLeaves; i++ ) - { -// lValue0 = Seq_NodeGetLValue(Abc_ObjFanin0(pObj)) - Fi * Abc_ObjFaninL0(pObj); - pFanin = Abc_NtkObj(pObj->pNtk, pCut->pLeaves[i] >> 8); - lValueCur = Seq_NodeGetLValue(pFanin) - Fi * (pCut->pLeaves[i] & 255); - if ( lValueMax < lValueCur ) - lValueMax = lValueCur; - } - lValueMax += 1; - *((int *)&pCut->uSign) = lValueMax; - return lValueMax; -} - -/**Function************************************************************* - - Synopsis [Computes the l-value of the node.] - - Description [The node can be internal or a PO.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_FpgaNodeUpdateLValue( Abc_Obj_t * pObj, int Fi ) -{ - Cut_Cut_t * pCut, * pList; - int lValueNew, lValueOld, lValueCut; - assert( !Abc_ObjIsPi(pObj) ); - assert( Abc_ObjFaninNum(pObj) > 0 ); - if ( Abc_ObjIsPo(pObj) ) - { - lValueNew = Seq_NodeGetLValue(Abc_ObjFanin0(pObj)) - Fi * Seq_ObjFaninL0(pObj); - return (lValueNew > Fi)? SEQ_UPDATE_FAIL : SEQ_UPDATE_NO; - } - // get the arrival time of the best non-trivial cut - pList = Abc_NodeReadCuts( Seq_NodeCutMan(pObj), pObj ); - // skip the choice nodes - if ( pList == NULL ) - return SEQ_UPDATE_NO; - lValueNew = ABC_INFINITY; - for ( pCut = pList->pNext; pCut; pCut = pCut->pNext ) - { - lValueCut = Seq_FpgaCutUpdateLValue( pCut, pObj, Fi ); - if ( lValueNew > lValueCut ) - lValueNew = lValueCut; - } - // compare the arrival time with the previous arrival time - lValueOld = Seq_NodeGetLValue(pObj); -// if ( lValueNew == lValueOld ) - if ( lValueNew <= lValueOld ) - return SEQ_UPDATE_NO; - Seq_NodeSetLValue( pObj, lValueNew ); -//printf( "%d -> %d ", lValueOld, lValueNew ); - return SEQ_UPDATE_YES; -} - - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - - -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/seq/seqInt.h b/src/base/seq/seqInt.h deleted file mode 100644 index 89ce6843..00000000 --- a/src/base/seq/seqInt.h +++ /dev/null @@ -1,260 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqInt.h] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [Internal declarations.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqInt.h,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#ifndef __SEQ_INT_H__ -#define __SEQ_INT_H__ - - -//////////////////////////////////////////////////////////////////////// -/// INCLUDES /// -//////////////////////////////////////////////////////////////////////// - -#include "abc.h" -#include "cut.h" -#include "main.h" -#include "mio.h" -#include "mapper.h" -#include "fpga.h" -#include "seq.h" - -//////////////////////////////////////////////////////////////////////// -/// PARAMETERS /// -//////////////////////////////////////////////////////////////////////// - - - -ABC_NAMESPACE_HEADER_START - - -#define SEQ_FULL_MASK 0xFFFFFFFF - -// node status after updating its arrival time -enum { SEQ_UPDATE_FAIL, SEQ_UPDATE_NO, SEQ_UPDATE_YES }; - -//////////////////////////////////////////////////////////////////////// -/// BASIC TYPES /// -//////////////////////////////////////////////////////////////////////// - -// manager of sequential AIG -struct Abc_Seq_t_ -{ - // sequential information - Abc_Ntk_t * pNtk; // the network - int nSize; // the number of entries in all internal arrays - Vec_Int_t * vNums; // the number of latches on each edge in the AIG - Vec_Ptr_t * vInits; // the initial states for each edge in the AIG - Extra_MmFixed_t * pMmInits; // memory manager for latch structures used to remember init states - int fVerbose; // the verbose flag - float fEpsilon; // the accuracy for delay computation - int fStandCells; // the flag denoting standard cell mapping - int nMaxIters; // the max number of iterations - int FiBestInt; // the best clock period - float FiBestFloat; // the best clock period - // K-feasible cuts - int nVarsMax; // the max cut size - Cut_Man_t * pCutMan; // cut manager - Map_SuperLib_t * pSuperLib; // the current supergate library - // sequential arrival time computation - Vec_Int_t * vAFlows; // the area flow of each cut - Vec_Int_t * vLValues; // the arrival times (L-Values of nodes) - Vec_Int_t * vLValuesN; // the arrival times (L-Values of nodes) - Vec_Str_t * vLags; // the lags of the mapped nodes - Vec_Str_t * vLagsN; // the lags of the mapped nodes - Vec_Str_t * vUses; // the phase usage - // representation of the mapping - Vec_Ptr_t * vMapAnds; // nodes visible in the mapping - Vec_Vec_t * vMapCuts; // best cuts for each node - Vec_Vec_t * vMapDelays; // the delay of each fanin - Vec_Vec_t * vMapFanins; // the delay of each fanin - // runtime stats - int timeCuts; // runtime to compute the cuts - int timeDelay; // runtime to compute the L-values - int timeRet; // runtime to retime the resulting network - int timeNtk; // runtime to create the final network - -}; - -// data structure to store initial state -typedef struct Seq_Lat_t_ Seq_Lat_t; -struct Seq_Lat_t_ -{ - Seq_Lat_t * pNext; // the next Lat in the ring - Seq_Lat_t * pPrev; // the prev Lat in the ring - Abc_Obj_t * pLatch; // the real latch corresponding to Lat -}; - -// representation of latch on the edge -typedef struct Seq_RetEdge_t_ Seq_RetEdge_t; -struct Seq_RetEdge_t_ // 1 word -{ - unsigned iNode : 24; // the ID of the node - unsigned iEdge : 1; // the edge of the node - unsigned iLatch : 7; // the latch number counting from the node -}; - -// representation of one retiming step -typedef struct Seq_RetStep_t_ Seq_RetStep_t; -struct Seq_RetStep_t_ // 1 word -{ - unsigned iNode : 24; // the ID of the node - unsigned nLatches : 8; // the number of latches to retime -}; - -// representation of one mapping match -typedef struct Seq_Match_t_ Seq_Match_t; -struct Seq_Match_t_ // 3 words -{ - Abc_Obj_t * pAnd; // the AND gate used in the mapping - Cut_Cut_t * pCut; // the cut used to map it - Map_Super_t * pSuper; // the supergate used to implement the cut - unsigned fCompl : 1; // the polarity of the AND gate - unsigned fCutInv : 1; // the polarity of the cut - unsigned PolUse : 2; // the polarity use of this node - unsigned uPhase : 14; // the phase assignment at the boundary - unsigned uPhaseR : 14; // the real phase assignment at the boundary -}; - -//////////////////////////////////////////////////////////////////////// -/// MACRO DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -// transforming retedges into ints and back -static inline int Seq_RetEdge2Int( Seq_RetEdge_t Val ) { return *((int *)&Val); } -static inline Seq_RetEdge_t Seq_Int2RetEdge( int Num ) { return *((Seq_RetEdge_t *)&Num); } -// transforming retsteps into ints and back -static inline int Seq_RetStep2Int( Seq_RetStep_t Val ) { return *((int *)&Val); } -static inline Seq_RetStep_t Seq_Int2RetStep( int Num ) { return *((Seq_RetStep_t *)&Num); } - -// manipulating the number of latches on each edge -static inline Vec_Int_t * Seq_ObjLNums( Abc_Obj_t * pObj ) { return ((Abc_Seq_t*)pObj->pNtk->pManFunc)->vNums; } -static inline int Seq_ObjFaninL( Abc_Obj_t * pObj, int i ) { return Vec_IntEntry(Seq_ObjLNums(pObj), 2*pObj->Id + i); } -static inline int Seq_ObjFaninL0( Abc_Obj_t * pObj ) { return Vec_IntEntry(Seq_ObjLNums(pObj), 2*pObj->Id + 0); } -static inline int Seq_ObjFaninL1( Abc_Obj_t * pObj ) { return Vec_IntEntry(Seq_ObjLNums(pObj), 2*pObj->Id + 1); } -static inline void Seq_ObjSetFaninL( Abc_Obj_t * pObj, int i, int nLats ) { Vec_IntWriteEntry(Seq_ObjLNums(pObj), 2*pObj->Id + i, nLats); } -static inline void Seq_ObjSetFaninL0( Abc_Obj_t * pObj, int nLats ) { Vec_IntWriteEntry(Seq_ObjLNums(pObj), 2*pObj->Id + 0, nLats); } -static inline void Seq_ObjSetFaninL1( Abc_Obj_t * pObj, int nLats ) { Vec_IntWriteEntry(Seq_ObjLNums(pObj), 2*pObj->Id + 1, nLats); } -static inline void Seq_ObjAddFaninL( Abc_Obj_t * pObj, int i, int nLats ) { Vec_IntAddToEntry(Seq_ObjLNums(pObj), 2*pObj->Id + i, nLats); } -static inline void Seq_ObjAddFaninL0( Abc_Obj_t * pObj, int nLats ) { Vec_IntAddToEntry(Seq_ObjLNums(pObj), 2*pObj->Id + 0, nLats); } -static inline void Seq_ObjAddFaninL1( Abc_Obj_t * pObj, int nLats ) { Vec_IntAddToEntry(Seq_ObjLNums(pObj), 2*pObj->Id + 1, nLats); } -static inline int Seq_ObjFanoutL( Abc_Obj_t * pObj, Abc_Obj_t * pFanout ) { return Seq_ObjFaninL( pFanout, Abc_ObjFanoutEdgeNum(pObj,pFanout) ); } -static inline void Seq_ObjSetFanoutL( Abc_Obj_t * pObj, Abc_Obj_t * pFanout, int nLats ) { Seq_ObjSetFaninL( pFanout, Abc_ObjFanoutEdgeNum(pObj,pFanout), nLats ); } -static inline void Seq_ObjAddFanoutL( Abc_Obj_t * pObj, Abc_Obj_t * pFanout, int nLats ) { Seq_ObjAddFaninL( pFanout, Abc_ObjFanoutEdgeNum(pObj,pFanout), nLats ); } -static inline int Seq_ObjFaninLMin( Abc_Obj_t * pObj ) { assert( Abc_ObjIsNode(pObj) ); return ABC_MIN( Seq_ObjFaninL0(pObj), Seq_ObjFaninL1(pObj) ); } -static inline int Seq_ObjFaninLMax( Abc_Obj_t * pObj ) { assert( Abc_ObjIsNode(pObj) ); return ABC_MAX( Seq_ObjFaninL0(pObj), Seq_ObjFaninL1(pObj) ); } - -// reading l-values and lags -static inline Vec_Int_t * Seq_NodeLValues( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->vLValues; } -static inline Vec_Int_t * Seq_NodeLValuesN( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->vLValuesN; } -static inline int Seq_NodeGetLValue( Abc_Obj_t * pNode ) { return Vec_IntEntry( Seq_NodeLValues(pNode), (pNode)->Id ); } -static inline void Seq_NodeSetLValue( Abc_Obj_t * pNode, int Value ) { Vec_IntWriteEntry( Seq_NodeLValues(pNode), (pNode)->Id, Value ); } -static inline float Seq_NodeGetLValueP( Abc_Obj_t * pNode ) { return Abc_Int2Float( Vec_IntEntry( Seq_NodeLValues(pNode), (pNode)->Id ) ); } -static inline float Seq_NodeGetLValueN( Abc_Obj_t * pNode ) { return Abc_Int2Float( Vec_IntEntry( Seq_NodeLValuesN(pNode), (pNode)->Id ) ); } -static inline void Seq_NodeSetLValueP( Abc_Obj_t * pNode, float Value ) { Vec_IntWriteEntry( Seq_NodeLValues(pNode), (pNode)->Id, Abc_Float2Int(Value) ); } -static inline void Seq_NodeSetLValueN( Abc_Obj_t * pNode, float Value ) { Vec_IntWriteEntry( Seq_NodeLValuesN(pNode), (pNode)->Id, Abc_Float2Int(Value) ); } - -// reading area flows -static inline Vec_Int_t * Seq_NodeFlow( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->vAFlows; } -static inline float Seq_NodeGetFlow( Abc_Obj_t * pNode ) { return Abc_Int2Float( Vec_IntEntry( Seq_NodeFlow(pNode), (pNode)->Id ) ); } -static inline void Seq_NodeSetFlow( Abc_Obj_t * pNode, float Value ) { Vec_IntWriteEntry( Seq_NodeFlow(pNode), (pNode)->Id, Abc_Float2Int(Value) ); } - -// reading the contents of the lat -static inline Abc_InitType_t Seq_LatInit( Seq_Lat_t * pLat ) { return ((unsigned)pLat->pPrev) & 3; } -static inline Seq_Lat_t * Seq_LatNext( Seq_Lat_t * pLat ) { return pLat->pNext; } -static inline Seq_Lat_t * Seq_LatPrev( Seq_Lat_t * pLat ) { return (void *)(((unsigned)pLat->pPrev) & (SEQ_FULL_MASK << 2)); } - -// setting the contents of the lat -static inline void Seq_LatSetInit( Seq_Lat_t * pLat, Abc_InitType_t Init ) { pLat->pPrev = (void *)( (3 & Init) | (((unsigned)pLat->pPrev) & (SEQ_FULL_MASK << 2)) ); } -static inline void Seq_LatSetNext( Seq_Lat_t * pLat, Seq_Lat_t * pNext ) { pLat->pNext = pNext; } -static inline void Seq_LatSetPrev( Seq_Lat_t * pLat, Seq_Lat_t * pPrev ) { Abc_InitType_t Init = Seq_LatInit(pLat); pLat->pPrev = pPrev; Seq_LatSetInit(pLat, Init); } - -// accessing retiming lags -static inline Cut_Man_t * Seq_NodeCutMan( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->pCutMan; } -static inline Vec_Str_t * Seq_NodeLags( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->vLags; } -static inline Vec_Str_t * Seq_NodeLagsN( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->vLagsN; } -static inline char Seq_NodeGetLag( Abc_Obj_t * pNode ) { return Vec_StrEntry( Seq_NodeLags(pNode), (pNode)->Id ); } -static inline char Seq_NodeGetLagN( Abc_Obj_t * pNode ) { return Vec_StrEntry( Seq_NodeLagsN(pNode), (pNode)->Id ); } -static inline void Seq_NodeSetLag( Abc_Obj_t * pNode, char Value ) { Vec_StrWriteEntry( Seq_NodeLags(pNode), (pNode)->Id, (Value) ); } -static inline void Seq_NodeSetLagN( Abc_Obj_t * pNode, char Value ) { Vec_StrWriteEntry( Seq_NodeLagsN(pNode), (pNode)->Id, (Value) ); } -static inline int Seq_NodeComputeLag( int LValue, int Fi ) { return (LValue + 1024*Fi)/Fi - 1024 - (int)(LValue % Fi == 0); } -static inline int Seq_NodeComputeLagFloat( float LValue, float Fi ) { return ((int)ceil(LValue/Fi)) - 1; } - -// phase usage -static inline Vec_Str_t * Seq_NodeUses( Abc_Obj_t * pNode ) { return ((Abc_Seq_t *)(pNode)->pNtk->pManFunc)->vUses; } -static inline char Seq_NodeGetUses( Abc_Obj_t * pNode ) { return Vec_StrEntry( Seq_NodeUses(pNode), (pNode)->Id ); } -static inline void Seq_NodeSetUses( Abc_Obj_t * pNode, char Value ) { Vec_StrWriteEntry( Seq_NodeUses(pNode), (pNode)->Id, (Value) ); } - -// accessing initial states -static inline Vec_Ptr_t * Seq_NodeLats( Abc_Obj_t * pObj ) { return ((Abc_Seq_t*)pObj->pNtk->pManFunc)->vInits; } -static inline Seq_Lat_t * Seq_NodeGetRing( Abc_Obj_t * pObj, int Edge ) { return Vec_PtrEntry( Seq_NodeLats(pObj), (pObj->Id<<1)+Edge ); } -static inline void Seq_NodeSetRing( Abc_Obj_t * pObj, int Edge, Seq_Lat_t * pLat ) { Vec_PtrWriteEntry( Seq_NodeLats(pObj), (pObj->Id<<1)+Edge, pLat ); } -static inline Seq_Lat_t * Seq_NodeCreateLat( Abc_Obj_t * pObj ) { Seq_Lat_t * p = (Seq_Lat_t *)Extra_MmFixedEntryFetch( ((Abc_Seq_t*)pObj->pNtk->pManFunc)->pMmInits ); p->pNext = p->pPrev = NULL; p->pLatch = NULL; return p; } -static inline void Seq_NodeRecycleLat( Abc_Obj_t * pObj, Seq_Lat_t * pLat ) { Extra_MmFixedEntryRecycle( ((Abc_Seq_t*)pObj->pNtk->pManFunc)->pMmInits, (char *)pLat ); } - -// getting hold of the structure storing initial states of the latches -static inline Seq_Lat_t * Seq_NodeGetLatFirst( Abc_Obj_t * pObj, int Edge ) { return Seq_NodeGetRing(pObj, Edge); } -static inline Seq_Lat_t * Seq_NodeGetLatLast( Abc_Obj_t * pObj, int Edge ) { return Seq_LatPrev( Seq_NodeGetRing(pObj, Edge) ); } -static inline Seq_Lat_t * Seq_NodeGetLat( Abc_Obj_t * pObj, int Edge, int iLat ) { int c; Seq_Lat_t * pLat = Seq_NodeGetRing(pObj, Edge); for ( c = 0; c != iLat; c++ ) pLat = pLat->pNext; return pLat; } -static inline int Seq_NodeCountLats( Abc_Obj_t * pObj, int Edge ) { int c; Seq_Lat_t * pLat, * pRing = Seq_NodeGetRing(pObj, Edge); if ( pRing == NULL ) return 0; for ( c = 0, pLat = pRing; !c || pLat != pRing; c++ ) pLat = pLat->pNext; return c; } -static inline void Seq_NodeCleanLats( Abc_Obj_t * pObj, int Edge ) { int c; Seq_Lat_t * pLat, * pRing = Seq_NodeGetRing(pObj, Edge); if ( pRing == NULL ) return ; for ( c = 0, pLat = pRing; !c || pLat != pRing; c++ ) pLat->pLatch = NULL, pLat = pLat->pNext; return; } - -// getting/setting initial states of the latches -static inline Abc_InitType_t Seq_NodeGetInitOne( Abc_Obj_t * pObj, int Edge, int iLat ) { return Seq_LatInit( Seq_NodeGetLat(pObj, Edge, iLat) ); } -static inline Abc_InitType_t Seq_NodeGetInitFirst( Abc_Obj_t * pObj, int Edge ) { return Seq_LatInit( Seq_NodeGetLatFirst(pObj, Edge) ); } -static inline Abc_InitType_t Seq_NodeGetInitLast( Abc_Obj_t * pObj, int Edge ) { return Seq_LatInit( Seq_NodeGetLatLast(pObj, Edge) ); } -static inline void Seq_NodeSetInitOne( Abc_Obj_t * pObj, int Edge, int iLat, Abc_InitType_t Init ) { Seq_LatSetInit( Seq_NodeGetLat(pObj, Edge, iLat), Init ); } - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -/*=== seqAigIter.c =============================================================*/ -extern int Seq_AigRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose ); -extern int Seq_NtkImplementRetiming( Abc_Ntk_t * pNtk, Vec_Str_t * vLags, int fVerbose ); -/*=== seqFpgaIter.c ============================================================*/ -extern int Seq_FpgaMappingDelays( Abc_Ntk_t * pNtk, int fVerbose ); -extern int Seq_FpgaNodeUpdateLValue( Abc_Obj_t * pObj, int Fi ); -/*=== seqMapIter.c ============================================================*/ -extern int Seq_MapRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose ); -/*=== seqRetIter.c =============================================================*/ -extern int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose ); -/*=== seqLatch.c ===============================================================*/ -extern void Seq_NodeInsertFirst( Abc_Obj_t * pObj, int Edge, Abc_InitType_t Init ); -extern void Seq_NodeInsertLast( Abc_Obj_t * pObj, int Edge, Abc_InitType_t Init ); -extern Abc_InitType_t Seq_NodeDeleteFirst( Abc_Obj_t * pObj, int Edge ); -extern Abc_InitType_t Seq_NodeDeleteLast( Abc_Obj_t * pObj, int Edge ); -/*=== seqUtil.c ================================================================*/ -extern int Seq_NtkLevelMax( Abc_Ntk_t * pNtk ); -extern int Seq_ObjFanoutLMax( Abc_Obj_t * pObj ); -extern int Seq_ObjFanoutLMin( Abc_Obj_t * pObj ); -extern int Seq_ObjFanoutLSum( Abc_Obj_t * pObj ); -extern int Seq_ObjFaninLSum( Abc_Obj_t * pObj ); - - - -ABC_NAMESPACE_HEADER_END - - - -#endif - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - diff --git a/src/base/seq/seqLatch.c b/src/base/seq/seqLatch.c deleted file mode 100644 index f6384fcb..00000000 --- a/src/base/seq/seqLatch.c +++ /dev/null @@ -1,228 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqLatch.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [Manipulation of latch data structures representing initial states.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqLatch.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "seqInt.h" - -ABC_NAMESPACE_IMPL_START - - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Insert the first Lat on the edge.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NodeInsertFirst( Abc_Obj_t * pObj, int Edge, Abc_InitType_t Init ) -{ - Seq_Lat_t * pLat, * pRing, * pPrev; - pRing = Seq_NodeGetRing( pObj, Edge ); - pLat = Seq_NodeCreateLat( pObj ); - if ( pRing == NULL ) - { - Seq_LatSetPrev( pLat, pLat ); - Seq_LatSetNext( pLat, pLat ); - Seq_NodeSetRing( pObj, Edge, pLat ); - } - else - { - pPrev = Seq_LatPrev( pRing ); - Seq_LatSetPrev( pLat, pPrev ); - Seq_LatSetNext( pPrev, pLat ); - Seq_LatSetPrev( pRing, pLat ); - Seq_LatSetNext( pLat, pRing ); - Seq_NodeSetRing( pObj, Edge, pLat ); // rotate the ring to make pLat the first - } - Seq_LatSetInit( pLat, Init ); - Seq_ObjAddFaninL( pObj, Edge, 1 ); - assert( pLat->pLatch == NULL ); -} - -/**Function************************************************************* - - Synopsis [Insert the last Lat on the edge.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NodeInsertLast( Abc_Obj_t * pObj, int Edge, Abc_InitType_t Init ) -{ - Seq_Lat_t * pLat, * pRing, * pPrev; - pRing = Seq_NodeGetRing( pObj, Edge ); - pLat = Seq_NodeCreateLat( pObj ); - if ( pRing == NULL ) - { - Seq_LatSetPrev( pLat, pLat ); - Seq_LatSetNext( pLat, pLat ); - Seq_NodeSetRing( pObj, Edge, pLat ); - } - else - { - pPrev = Seq_LatPrev( pRing ); - Seq_LatSetPrev( pLat, pPrev ); - Seq_LatSetNext( pPrev, pLat ); - Seq_LatSetPrev( pRing, pLat ); - Seq_LatSetNext( pLat, pRing ); - } - Seq_LatSetInit( pLat, Init ); - Seq_ObjAddFaninL( pObj, Edge, 1 ); -} - -/**Function************************************************************* - - Synopsis [Delete the first Lat on the edge.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_InitType_t Seq_NodeDeleteFirst( Abc_Obj_t * pObj, int Edge ) -{ - Abc_InitType_t Init; - Seq_Lat_t * pLat, * pRing, * pPrev, * pNext; - pRing = Seq_NodeGetRing( pObj, Edge ); - pLat = pRing; // consider the first latch - if ( pLat->pNext == pLat ) - Seq_NodeSetRing( pObj, Edge, NULL ); - else - { - pPrev = Seq_LatPrev( pLat ); - pNext = Seq_LatNext( pLat ); - Seq_LatSetPrev( pNext, pPrev ); - Seq_LatSetNext( pPrev, pNext ); - Seq_NodeSetRing( pObj, Edge, pNext ); // rotate the ring - } - Init = Seq_LatInit( pLat ); - Seq_NodeRecycleLat( pObj, pLat ); - Seq_ObjAddFaninL( pObj, Edge, -1 ); - return Init; -} - -/**Function************************************************************* - - Synopsis [Delete the last Lat on the edge.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_InitType_t Seq_NodeDeleteLast( Abc_Obj_t * pObj, int Edge ) -{ - Abc_InitType_t Init; - Seq_Lat_t * pLat, * pRing, * pPrev, * pNext; - pRing = Seq_NodeGetRing( pObj, Edge ); - pLat = Seq_LatPrev( pRing ); // consider the last latch - if ( pLat->pNext == pLat ) - Seq_NodeSetRing( pObj, Edge, NULL ); - else - { - pPrev = Seq_LatPrev( pLat ); - pNext = Seq_LatNext( pLat ); - Seq_LatSetPrev( pNext, pPrev ); - Seq_LatSetNext( pPrev, pNext ); - } - Init = Seq_LatInit( pLat ); - Seq_NodeRecycleLat( pObj, pLat ); - Seq_ObjAddFaninL( pObj, Edge, -1 ); - return Init; -} - -/**Function************************************************************* - - Synopsis [Insert the last Lat on the edge.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NodeDupLats( Abc_Obj_t * pObjNew, Abc_Obj_t * pObj, int Edge ) -{ - Seq_Lat_t * pRing, * pLat; - int i, nLatches; - pRing = Seq_NodeGetRing( pObj, Edge ); - if ( pRing == NULL ) - return; - nLatches = Seq_NodeCountLats( pObj, Edge ); - for ( i = 0, pLat = pRing; i < nLatches; i++, pLat = pLat->pNext ) - Seq_NodeInsertLast( pObjNew, Edge, Seq_LatInit(pLat) ); -} - -/**Function************************************************************* - - Synopsis [Insert the last Lat on the edge.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NodeCompareLats( Abc_Obj_t * pObj1, int Edge1, Abc_Obj_t * pObj2, int Edge2 ) -{ - Seq_Lat_t * pRing1, * pRing2, * pLat1, * pLat2; - int i, nLatches1, nLatches2; - - nLatches1 = Seq_NodeCountLats( pObj1, Edge1 ); - nLatches2 = Seq_NodeCountLats( pObj2, Edge2 ); - if ( nLatches1 != nLatches2 ) - return 0; - - pRing1 = Seq_NodeGetRing( pObj1, Edge1 ); - pRing2 = Seq_NodeGetRing( pObj2, Edge2 ); - for ( i = 0, pLat1 = pRing1, pLat2 = pRing2; i < nLatches1; i++, pLat1 = pLat1->pNext, pLat2 = pLat2->pNext ) - if ( Seq_LatInit(pLat1) != Seq_LatInit(pLat2) ) - return 0; - - return 1; -} - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - - -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/seq/seqMan.c b/src/base/seq/seqMan.c deleted file mode 100644 index d0697b36..00000000 --- a/src/base/seq/seqMan.c +++ /dev/null @@ -1,138 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqMan.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [Manager of sequential AIG containing.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqMan.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "seqInt.h" - -ABC_NAMESPACE_IMPL_START - - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Allocates sequential AIG manager.] - - Description [The manager contains all the data structures needed to - represent sequential AIG and compute stand-alone retiming as well as - the integrated mapping/retiming of the sequential AIG.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Seq_t * Seq_Create( Abc_Ntk_t * pNtk ) -{ - Abc_Seq_t * p; - // start the manager - p = ALLOC( Abc_Seq_t, 1 ); - memset( p, 0, sizeof(Abc_Seq_t) ); - p->pNtk = pNtk; - p->nSize = 1000; - p->nMaxIters = 15; - p->pMmInits = Extra_MmFixedStart( sizeof(Seq_Lat_t) ); - p->fEpsilon = (float)0.001; - // create internal data structures - p->vNums = Vec_IntStart( 2 * p->nSize ); - p->vInits = Vec_PtrStart( 2 * p->nSize ); - p->vLValues = Vec_IntStart( p->nSize ); - p->vLags = Vec_StrStart( p->nSize ); - p->vLValuesN = Vec_IntStart( p->nSize ); - p->vAFlows = Vec_IntStart( p->nSize ); - p->vLagsN = Vec_StrStart( p->nSize ); - p->vUses = Vec_StrStart( p->nSize ); - return p; -} - -/**Function************************************************************* - - Synopsis [Deallocates sequential AIG manager.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_Resize( Abc_Seq_t * p, int nMaxId ) -{ - if ( p->nSize > nMaxId ) - return; - p->nSize = nMaxId + 1; - Vec_IntFill( p->vNums, 2 * p->nSize, 0 ); - Vec_PtrFill( p->vInits, 2 * p->nSize, NULL ); - Vec_IntFill( p->vLValues, p->nSize, 0 ); - Vec_StrFill( p->vLags, p->nSize, 0 ); - Vec_IntFill( p->vLValuesN, p->nSize, 0 ); - Vec_IntFill( p->vAFlows, p->nSize, 0 ); - Vec_StrFill( p->vLagsN, p->nSize, 0 ); - Vec_StrFill( p->vUses, p->nSize, 0 ); -} - - -/**Function************************************************************* - - Synopsis [Deallocates sequential AIG manager.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_Delete( Abc_Seq_t * p ) -{ - if ( p->fStandCells && p->vMapAnds ) - { - void * pVoid; int i; - Vec_PtrForEachEntry( void *, p->vMapAnds, pVoid, i ) - free( pVoid ); - } - if ( p->vMapDelays ) Vec_VecFree( p->vMapDelays ); // the nodes used in the mapping - if ( p->vMapFanins ) Vec_VecFree( p->vMapFanins ); // the cuts used in the mapping - if ( p->vMapAnds ) Vec_PtrFree( p->vMapAnds ); // the nodes used in the mapping - if ( p->vMapCuts ) Vec_VecFree( p->vMapCuts ); // the cuts used in the mapping - if ( p->vLValues ) Vec_IntFree( p->vLValues ); // the arrival times (L-Values of nodes) - if ( p->vLags ) Vec_StrFree( p->vLags ); // the lags of the mapped nodes - if ( p->vLValuesN ) Vec_IntFree( p->vLValuesN ); // the arrival times (L-Values of nodes) - if ( p->vAFlows ) Vec_IntFree( p->vAFlows ); // the arrival times (L-Values of nodes) - if ( p->vLagsN ) Vec_StrFree( p->vLagsN ); // the lags of the mapped nodes - if ( p->vUses ) Vec_StrFree( p->vUses ); // the uses of phases - if ( p->vInits ) Vec_PtrFree( p->vInits ); // the initial values of the latches - if ( p->vNums ) Vec_IntFree( p->vNums ); // the numbers of latches - Extra_MmFixedStop( p->pMmInits ); - free( p ); -} - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - - -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/seq/seqMapCore.c b/src/base/seq/seqMapCore.c deleted file mode 100644 index db1da0bc..00000000 --- a/src/base/seq/seqMapCore.c +++ /dev/null @@ -1,657 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqMapCore.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [The core of SC mapping/retiming package.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqMapCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "seqInt.h" -#include "main.h" -#include "mio.h" -#include "mapper.h" - -ABC_NAMESPACE_IMPL_START - - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -extern Abc_Ntk_t * Seq_NtkMapDup( Abc_Ntk_t * pNtk ); -extern int Seq_NtkMapInitCompatible( Abc_Ntk_t * pNtk, int fVerbose ); -extern Abc_Ntk_t * Seq_NtkSeqMapMapped( Abc_Ntk_t * pNtk ); - -static int Seq_MapMappingCount( Abc_Ntk_t * pNtk ); -static int Seq_MapMappingCount_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves ); -static Abc_Obj_t * Seq_MapMappingBuild_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, unsigned SeqEdge, int fTop, int fCompl, int LagCut, Vec_Ptr_t * vLeaves, unsigned uPhase ); -static DdNode * Seq_MapMappingBdd_rec( DdManager * dd, Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves ); -static void Seq_MapMappingEdges_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, Vec_Ptr_t * vLeaves, Vec_Vec_t * vMapEdges ); -static void Seq_MapMappingConnect_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves ); -static DdNode * Seq_MapMappingConnectBdd_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves ); - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Performs Map mapping and retiming.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Seq_MapRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Abc_Ntk_t * pNtkNew; - Abc_Ntk_t * pNtkMap; - int RetValue; - - // derive the supergate library - if ( Abc_FrameReadLibSuper() == NULL && Abc_FrameReadLibGen() ) - { -// printf( "A simple supergate library is derived from gate library \"%s\".\n", -// Mio_LibraryReadName(Abc_FrameReadLibGen()) ); - Map_SuperLibDeriveFromGenlib( Abc_FrameReadLibGen() ); - } - p->pSuperLib = Abc_FrameReadLibSuper(); - p->nVarsMax = Map_SuperLibReadVarsMax(p->pSuperLib); - p->nMaxIters = nMaxIters; - p->fStandCells = 1; - - // find the best mapping and retiming for all nodes (p->vLValues, p->vBestCuts, p->vLags) - if ( !Seq_MapRetimeDelayLags( pNtk, fVerbose ) ) - return NULL; - if ( RetValue = Abc_NtkGetChoiceNum(pNtk) ) - { - printf( "The network has %d choices. The resulting network is not derived (this is temporary).\n", RetValue ); - printf( "The mininum clock period computed is %5.2f.\n", p->FiBestFloat ); - return NULL; - } - printf( "The mininum clock period computed is %5.2f.\n", p->FiBestFloat ); - printf( "The resulting network is derived as BDD logic network (this is temporary).\n" ); - - // duplicate the nodes contained in multiple cuts - pNtkNew = Seq_NtkMapDup( pNtk ); - - // implement the retiming - RetValue = Seq_NtkImplementRetiming( pNtkNew, ((Abc_Seq_t *)pNtkNew->pManFunc)->vLags, fVerbose ); - if ( RetValue == 0 ) - printf( "Retiming completed but initial state computation has failed.\n" ); - - // check the compatibility of initial states computed - if ( RetValue = Seq_NtkMapInitCompatible( pNtkNew, fVerbose ) ) - printf( "The number of LUTs with incompatible edges = %d.\n", RetValue ); -// return pNtkNew; - - // create the final mapped network - pNtkMap = Seq_NtkSeqMapMapped( pNtkNew ); - Abc_NtkDelete( pNtkNew ); - return pNtkMap; -} - -/**Function************************************************************* - - Synopsis [Derives the network by duplicating some of the nodes.] - - Description [Information about mapping is given as mapping nodes (p->vMapAnds) - and best cuts for each node (p->vMapCuts).] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Seq_NtkMapDup( Abc_Ntk_t * pNtk ) -{ - Abc_Seq_t * pNew, * p = pNtk->pManFunc; - Seq_Match_t * pMatch; - Abc_Ntk_t * pNtkNew; - Abc_Obj_t * pObj, * pFanin, * pFaninNew, * pLeaf; - Vec_Ptr_t * vLeaves; - unsigned SeqEdge; - int i, k, nObjsNew, Lag; - - assert( Abc_NtkIsSeq(pNtk) ); - - // start the expanded network - pNtkNew = Abc_NtkStartFrom( pNtk, pNtk->ntkType, pNtk->ntkFunc ); - Abc_NtkCleanNext(pNtk); - - // start the new sequential AIG manager - nObjsNew = 1 + Abc_NtkPiNum(pNtk) + Abc_NtkPoNum(pNtk) + Seq_MapMappingCount(pNtk); - Seq_Resize( pNtkNew->pManFunc, nObjsNew ); - - // duplicate the nodes in the mapping - Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i ) - { -// Abc_NtkDupObj( pNtkNew, pMatch->pAnd ); - if ( !pMatch->fCompl ) - pMatch->pAnd->pCopy = Abc_NtkCreateNode( pNtkNew ); - else - pMatch->pAnd->pNext = Abc_NtkCreateNode( pNtkNew ); - } - - // compute the real phase assignment - Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i ) - { - pMatch->uPhaseR = 0; - // get the leaves of the cut - vLeaves = Vec_VecEntry( p->vMapCuts, i ); - // convert the leaf nodes - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, k ) - { - SeqEdge = (unsigned)pLeaf; - pLeaf = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - - // set the phase - if ( pMatch->uPhase & (1 << k) ) // neg is required - { - if ( pLeaf->pNext ) // neg is available - pMatch->uPhaseR |= (1 << k); // neg is used -// else -// Seq_NodeSetLag( pLeaf, Seq_NodeGetLagN(pLeaf) ); - } - else // pos is required - { - if ( pLeaf->pCopy == NULL ) // pos is not available - pMatch->uPhaseR |= (1 << k); // neg is used -// else -// Seq_NodeSetLagN( pLeaf, Seq_NodeGetLag(pLeaf) ); - } - } - } - - - // recursively construct the internals of each node - Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i ) - { -// if ( pMatch->pSuper == NULL ) -// { -// int x = 0; -// } - vLeaves = Vec_VecEntry( p->vMapCuts, i ); - if ( !pMatch->fCompl ) - Seq_MapMappingBuild_rec( pNtkNew, pNtk, pMatch->pAnd->Id << 8, 1, pMatch->fCompl, Seq_NodeGetLag(pMatch->pAnd), vLeaves, pMatch->uPhaseR ); - else - Seq_MapMappingBuild_rec( pNtkNew, pNtk, pMatch->pAnd->Id << 8, 1, pMatch->fCompl, Seq_NodeGetLagN(pMatch->pAnd), vLeaves, pMatch->uPhaseR ); - } - assert( nObjsNew == pNtkNew->nObjs ); - - // set the POs -// Abc_NtkFinalize( pNtk, pNtkNew ); - Abc_NtkForEachPo( pNtk, pObj, i ) - { - pFanin = Abc_ObjFanin0(pObj); - if ( Abc_ObjFaninC0(pObj) ) - pFaninNew = pFanin->pNext ? pFanin->pNext : pFanin->pCopy; - else - pFaninNew = pFanin->pCopy ? pFanin->pCopy : pFanin->pNext; - pFaninNew = Abc_ObjNotCond( pFaninNew, Abc_ObjFaninC0(pObj) ); - Abc_ObjAddFanin( pObj->pCopy, pFaninNew ); - } - - // duplicate the latches on the PO edges - Abc_NtkForEachPo( pNtk, pObj, i ) - Seq_NodeDupLats( pObj->pCopy, pObj, 0 ); - - // transfer the mapping info to the new manager - Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i ) - { - // get the leaves of the cut - vLeaves = Vec_VecEntry( p->vMapCuts, i ); - // convert the leaf nodes - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, k ) - { - SeqEdge = (unsigned)pLeaf; - pLeaf = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - -// Lag = (SeqEdge & 255) + Seq_NodeGetLag(pMatch->pAnd) - Seq_NodeGetLag(pLeaf); - Lag = (SeqEdge & 255) + - (pMatch->fCompl? Seq_NodeGetLagN(pMatch->pAnd) : Seq_NodeGetLag(pMatch->pAnd)) - - (((pMatch->uPhaseR & (1 << k)) > 0)? Seq_NodeGetLagN(pLeaf) : Seq_NodeGetLag(pLeaf) ); - - assert( Lag >= 0 ); - - // translate the old leaf into the leaf in the new network -// if ( pMatch->uPhase & (1 << k) ) // negative phase is required -// pFaninNew = pLeaf->pNext? pLeaf->pNext : pLeaf->pCopy; -// else // positive phase is required -// pFaninNew = pLeaf->pCopy? pLeaf->pCopy : pLeaf->pNext; - - // translate the old leaf into the leaf in the new network - if ( pMatch->uPhaseR & (1 << k) ) // negative phase is required - pFaninNew = pLeaf->pNext; - else // positive phase is required - pFaninNew = pLeaf->pCopy; - - Vec_PtrWriteEntry( vLeaves, k, (void *)((pFaninNew->Id << 8) | Lag) ); -// printf( "%d -> %d\n", pLeaf->Id, pLeaf->pCopy->Id ); - - // UPDATE PHASE!!! leaving only those bits that require inverters - } - // convert the root node -// Vec_PtrWriteEntry( p->vMapAnds, i, pObj->pCopy ); - pMatch->pAnd = pMatch->fCompl? pMatch->pAnd->pNext : pMatch->pAnd->pCopy; - } - pNew = pNtkNew->pManFunc; - pNew->nVarsMax = p->nVarsMax; - pNew->vMapAnds = p->vMapAnds; p->vMapAnds = NULL; - pNew->vMapCuts = p->vMapCuts; p->vMapCuts = NULL; - pNew->fStandCells = p->fStandCells; p->fStandCells = 0; - - if ( !Abc_NtkCheck( pNtkNew ) ) - fprintf( stdout, "Seq_NtkMapDup(): Network check has failed.\n" ); - return pNtkNew; -} - -/**Function************************************************************* - - Synopsis [Checks if the initial states are compatible.] - - Description [Checks of all the initial states on the fanins edges - of the cut have compatible number of latches and initial states. - If this is not true, then the mapped network with the does not have initial - state. Returns the number of LUTs with incompatible edges.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkMapInitCompatible( Abc_Ntk_t * pNtk, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Seq_Match_t * pMatch; - Abc_Obj_t * pAnd, * pLeaf, * pFanout0, * pFanout1; - Vec_Vec_t * vTotalEdges; - Vec_Ptr_t * vLeaves, * vEdges; - int i, k, m, Edge0, Edge1, nLatchAfter, nLatches1, nLatches2; - unsigned SeqEdge; - int CountBad = 0, CountAll = 0; - - vTotalEdges = Vec_VecStart( p->nVarsMax ); - // go through all the nodes (cuts) used in the mapping - Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i ) - { - pAnd = pMatch->pAnd; -// printf( "*** Node %d.\n", pAnd->Id ); - - // get the cut of this gate - vLeaves = Vec_VecEntry( p->vMapCuts, i ); - - // get the edges pointing to the leaves - Vec_VecClear( vTotalEdges ); - Seq_MapMappingEdges_rec( pNtk, pAnd->Id << 8, NULL, vLeaves, vTotalEdges ); - - // for each leaf, consider its edges - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, k ) - { - SeqEdge = (unsigned)pLeaf; - pLeaf = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - nLatchAfter = SeqEdge & 255; - if ( nLatchAfter == 0 ) - continue; - - // go through the edges - vEdges = Vec_VecEntry( vTotalEdges, k ); - pFanout0 = NULL; - Vec_PtrForEachEntry( Abc_Obj_t *, vEdges, pFanout1, m ) - { - Edge1 = Abc_ObjIsComplement(pFanout1); - pFanout1 = Abc_ObjRegular(pFanout1); -//printf( "Fanin = %d. Fanout = %d.\n", pLeaf->Id, pFanout1->Id ); - - // make sure this is the same fanin - if ( Edge1 ) - assert( pLeaf == Abc_ObjFanin1(pFanout1) ); - else - assert( pLeaf == Abc_ObjFanin0(pFanout1) ); - - // save the first one - if ( pFanout0 == NULL ) - { - pFanout0 = pFanout1; - Edge0 = Edge1; - continue; - } - // compare the rings - // if they have different number of latches, this is the bug - nLatches1 = Seq_NodeCountLats(pFanout0, Edge0); - nLatches2 = Seq_NodeCountLats(pFanout1, Edge1); - assert( nLatches1 == nLatches2 ); - assert( nLatches1 == nLatchAfter ); - assert( nLatches1 > 0 ); - - // if they have different initial states, this is the problem - if ( !Seq_NodeCompareLats(pFanout0, Edge0, pFanout1, Edge1) ) - { - CountBad++; - break; - } - CountAll++; - } - } - } - if ( fVerbose ) - printf( "The number of pairs of edges checked = %d.\n", CountAll ); - Vec_VecFree( vTotalEdges ); - return CountBad; -} - -/**Function************************************************************* - - Synopsis [Derives the final mapped network.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Seq_NtkSeqMapMapped( Abc_Ntk_t * pNtk ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Seq_Match_t * pMatch; - Abc_Ntk_t * pNtkMap; - Vec_Ptr_t * vLeaves; - Abc_Obj_t * pObj, * pFaninNew; - Seq_Lat_t * pRing; - int i; - - assert( Abc_NtkIsSeq(pNtk) ); - - // start the network - pNtkMap = Abc_NtkStartFrom( pNtk, ABC_NTK_LOGIC, ABC_FUNC_BDD ); - - // duplicate the nodes used in the mapping - Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i ) - pMatch->pAnd->pCopy = Abc_NtkCreateNode( pNtkMap ); - - // create and share the latches - Seq_NtkShareLatchesMapping( pNtkMap, pNtk, p->vMapAnds, 0 ); - - // connect the nodes - Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i ) - { - pObj = pMatch->pAnd; - // get the leaves of this gate - vLeaves = Vec_VecEntry( p->vMapCuts, i ); - // get the BDD of the node - pObj->pCopy->pData = Seq_MapMappingConnectBdd_rec( pNtk, pObj->Id << 8, NULL, -1, pObj, vLeaves ); - Cudd_Ref( pObj->pCopy->pData ); - // complement the BDD of the cut if it came from the opposite polarity choice cut -// if ( Vec_StrEntry(p->vPhase, i) ) -// pObj->pCopy->pData = Cudd_Not( pObj->pCopy->pData ); - } - - // set the POs - Abc_NtkForEachPo( pNtk, pObj, i ) - { - if ( pRing = Seq_NodeGetRing(pObj,0) ) - pFaninNew = pRing->pLatch; - else - pFaninNew = Abc_ObjFanin0(pObj)->pCopy; - pFaninNew = Abc_ObjNotCond( pFaninNew, Abc_ObjFaninC0(pObj) ); - Abc_ObjAddFanin( pObj->pCopy, pFaninNew ); - } - - // add the latches and their names - Abc_NtkAddDummyBoxNames( pNtkMap ); - Abc_NtkOrderCisCos( pNtkMap ); - // fix the problem with complemented and duplicated CO edges - Abc_NtkLogicMakeSimpleCos( pNtkMap, 1 ); - // make the network minimum base - Abc_NtkMinimumBase( pNtkMap ); - if ( !Abc_NtkCheck( pNtkMap ) ) - fprintf( stdout, "Seq_NtkSeqFpgaMapped(): Network check has failed.\n" ); - return pNtkMap; -} - - - -/**Function************************************************************* - - Synopsis [Counts the number of nodes in the bag.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_MapMappingCount( Abc_Ntk_t * pNtk ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Vec_Ptr_t * vLeaves; - Seq_Match_t * pMatch; - int i, Counter = 0; - Vec_PtrForEachEntry( Seq_Match_t *, p->vMapAnds, pMatch, i ) - { - vLeaves = Vec_VecEntry( p->vMapCuts, i ); - Counter += Seq_MapMappingCount_rec( pNtk, pMatch->pAnd->Id << 8, vLeaves ); - } - return Counter; -} - -/**Function************************************************************* - - Synopsis [Counts the number of nodes in the bag.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_MapMappingCount_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Vec_Ptr_t * vLeaves ) -{ - Abc_Obj_t * pObj, * pLeaf; - unsigned SeqEdge0, SeqEdge1; - int Lag, i; - // get the object and the lag - pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - Lag = SeqEdge & 255; - // if the node is the fanin of the cut, return - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i ) - if ( SeqEdge == (unsigned)pLeaf ) - return 0; - // continue unfolding - assert( Abc_AigNodeIsAnd(pObj) ); - // get new sequential edges - assert( Lag + Seq_ObjFaninL0(pObj) < 255 ); - assert( Lag + Seq_ObjFaninL1(pObj) < 255 ); - SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj); - SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj); - // call for the children - return 1 + Seq_MapMappingCount_rec( pNtk, SeqEdge0, vLeaves ) + - Seq_MapMappingCount_rec( pNtk, SeqEdge1, vLeaves ); -} - -/**Function************************************************************* - - Synopsis [Collects the edges pointing to the leaves of the cut.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Obj_t * Seq_MapMappingBuild_rec( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, unsigned SeqEdge, int fTop, int fCompl, int LagCut, Vec_Ptr_t * vLeaves, unsigned uPhase ) -{ - Abc_Obj_t * pObj, * pObjNew, * pLeaf, * pFaninNew0, * pFaninNew1; - unsigned SeqEdge0, SeqEdge1; - int Lag, i; - // get the object and the lag - pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - Lag = SeqEdge & 255; - // if the node is the fanin of the cut, return - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i ) - if ( SeqEdge == (unsigned)pLeaf ) - { -// if ( uPhase & (1 << i) ) // negative phase is required -// return pObj->pNext? pObj->pNext : pObj->pCopy; -// else // positive phase is required -// return pObj->pCopy? pObj->pCopy : pObj->pNext; - - if ( uPhase & (1 << i) ) // negative phase is required - return pObj->pNext; - else // positive phase is required - return pObj->pCopy; - } - // continue unfolding - assert( Abc_AigNodeIsAnd(pObj) ); - // get new sequential edges - assert( Lag + Seq_ObjFaninL0(pObj) < 255 ); - assert( Lag + Seq_ObjFaninL1(pObj) < 255 ); - SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj); - SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj); - // call for the children - pObjNew = fTop? (fCompl? pObj->pNext : pObj->pCopy) : Abc_NtkCreateNode( pNtkNew ); - // solve subproblems - pFaninNew0 = Seq_MapMappingBuild_rec( pNtkNew, pNtk, SeqEdge0, 0, fCompl, LagCut, vLeaves, uPhase ); - pFaninNew1 = Seq_MapMappingBuild_rec( pNtkNew, pNtk, SeqEdge1, 0, fCompl, LagCut, vLeaves, uPhase ); - // add the fanins to the node - Abc_ObjAddFanin( pObjNew, Abc_ObjNotCond( pFaninNew0, Abc_ObjFaninC0(pObj) ) ); - Abc_ObjAddFanin( pObjNew, Abc_ObjNotCond( pFaninNew1, Abc_ObjFaninC1(pObj) ) ); - Seq_NodeDupLats( pObjNew, pObj, 0 ); - Seq_NodeDupLats( pObjNew, pObj, 1 ); - // set the lag of the new node equal to the internal lag plus mapping/retiming lag - Seq_NodeSetLag( pObjNew, (char)(Lag + LagCut) ); -// Seq_NodeSetLag( pObjNew, (char)(Lag) ); - return pObjNew; -} - - -/**Function************************************************************* - - Synopsis [Collects the edges pointing to the leaves of the cut.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_MapMappingEdges_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, Vec_Ptr_t * vLeaves, Vec_Vec_t * vMapEdges ) -{ - Abc_Obj_t * pObj, * pLeaf; - unsigned SeqEdge0, SeqEdge1; - int Lag, i; - // get the object and the lag - pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - Lag = SeqEdge & 255; - // if the node is the fanin of the cut, return - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i ) - { - if ( SeqEdge == (unsigned)pLeaf ) - { - assert( pPrev != NULL ); - Vec_VecPush( vMapEdges, i, pPrev ); - return; - } - } - // continue unfolding - assert( Abc_AigNodeIsAnd(pObj) ); - // get new sequential edges - assert( Lag + Seq_ObjFaninL0(pObj) < 255 ); - assert( Lag + Seq_ObjFaninL1(pObj) < 255 ); - SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj); - SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj); - // call for the children - Seq_MapMappingEdges_rec( pNtk, SeqEdge0, pObj , vLeaves, vMapEdges ); - Seq_MapMappingEdges_rec( pNtk, SeqEdge1, Abc_ObjNot(pObj), vLeaves, vMapEdges ); -} - -/**Function************************************************************* - - Synopsis [Collects the edges pointing to the leaves of the cut.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -DdNode * Seq_MapMappingConnectBdd_rec( Abc_Ntk_t * pNtk, unsigned SeqEdge, Abc_Obj_t * pPrev, int Edge, Abc_Obj_t * pRoot, Vec_Ptr_t * vLeaves ) -{ - Seq_Lat_t * pRing; - Abc_Obj_t * pObj, * pLeaf, * pFanin, * pFaninNew; - unsigned SeqEdge0, SeqEdge1; - DdManager * dd = pRoot->pCopy->pNtk->pManFunc; - DdNode * bFunc, * bFunc0, * bFunc1; - int Lag, i, k; - // get the object and the lag - pObj = Abc_NtkObj( pNtk, SeqEdge >> 8 ); - Lag = SeqEdge & 255; - // if the node is the fanin of the cut, add the connection and return - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i ) - { - if ( SeqEdge == (unsigned)pLeaf ) - { - assert( pPrev != NULL ); - if ( pRing = Seq_NodeGetRing(pPrev,Edge) ) - pFaninNew = pRing->pLatch; - else - pFaninNew = Abc_ObjFanin(pPrev,Edge)->pCopy; - - // check if the root already has this fanin - Abc_ObjForEachFanin( pRoot->pCopy, pFanin, k ) - if ( pFanin == pFaninNew ) - return Cudd_bddIthVar( dd, k ); - Abc_ObjAddFanin( pRoot->pCopy, pFaninNew ); - return Cudd_bddIthVar( dd, k ); - } - } - // continue unfolding - assert( Abc_AigNodeIsAnd(pObj) ); - // get new sequential edges - assert( Lag + Seq_ObjFaninL0(pObj) < 255 ); - assert( Lag + Seq_ObjFaninL1(pObj) < 255 ); - SeqEdge0 = (Abc_ObjFanin0(pObj)->Id << 8) + Lag + Seq_ObjFaninL0(pObj); - SeqEdge1 = (Abc_ObjFanin1(pObj)->Id << 8) + Lag + Seq_ObjFaninL1(pObj); - // call for the children - bFunc0 = Seq_MapMappingConnectBdd_rec( pNtk, SeqEdge0, pObj, 0, pRoot, vLeaves ); Cudd_Ref( bFunc0 ); - bFunc1 = Seq_MapMappingConnectBdd_rec( pNtk, SeqEdge1, pObj, 1, pRoot, vLeaves ); Cudd_Ref( bFunc1 ); - bFunc0 = Cudd_NotCond( bFunc0, Abc_ObjFaninC0(pObj) ); - bFunc1 = Cudd_NotCond( bFunc1, Abc_ObjFaninC1(pObj) ); - // get the BDD of the node - bFunc = Cudd_bddAnd( dd, bFunc0, bFunc1 ); Cudd_Ref( bFunc ); - Cudd_RecursiveDeref( dd, bFunc0 ); - Cudd_RecursiveDeref( dd, bFunc1 ); - // return the BDD - Cudd_Deref( bFunc ); - return bFunc; -} - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - - -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/seq/seqMapIter.c b/src/base/seq/seqMapIter.c deleted file mode 100644 index bb762d62..00000000 --- a/src/base/seq/seqMapIter.c +++ /dev/null @@ -1,628 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqMapIter.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [Iterative delay computation in SC mapping/retiming package.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqMapIter.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "seqInt.h" -#include "main.h" -#include "mio.h" -#include "mapperInt.h" - -ABC_NAMESPACE_IMPL_START - - -// the internal procedures -static float Seq_MapRetimeDelayLagsInternal( Abc_Ntk_t * pNtk, int fVerbose ); -static float Seq_MapRetimeSearch_rec( Abc_Ntk_t * pNtk, float FiMin, float FiMax, float Delta, int fVerbose ); -static int Seq_MapRetimeForPeriod( Abc_Ntk_t * pNtk, float Fi, int fVerbose ); -static int Seq_MapNodeUpdateLValue( Abc_Obj_t * pObj, float Fi, float DelayInv ); -static float Seq_MapCollectNode_rec( Abc_Obj_t * pAnd, float FiBest, Vec_Ptr_t * vMapping, Vec_Vec_t * vMapCuts ); -static void Seq_MapCanonicizeTruthTables( Abc_Ntk_t * pNtk ); - -extern Cut_Man_t * Abc_NtkSeqCuts( Abc_Ntk_t * pNtk, Cut_Params_t * pParams ); - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Computes the retiming lags for FPGA mapping.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_MapRetimeDelayLags( Abc_Ntk_t * pNtk, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Cut_Params_t Params, * pParams = &Params; - Abc_Obj_t * pObj; - float TotalArea; - int i, clk; - - // set defaults for cut computation - memset( pParams, 0, sizeof(Cut_Params_t) ); - pParams->nVarsMax = p->nVarsMax; // the max cut size ("k" of the k-feasible cuts) - pParams->nKeepMax = 1000; // the max number of cuts kept at a node - pParams->fTruth = 1; // compute truth tables - pParams->fFilter = 1; // filter dominated cuts - pParams->fSeq = 1; // compute sequential cuts - pParams->fVerbose = fVerbose; // the verbosiness flag - - // compute the cuts -clk = clock(); - p->pCutMan = Abc_NtkSeqCuts( pNtk, pParams ); -p->timeCuts = clock() - clk; - if ( fVerbose ) - Cut_ManPrintStats( p->pCutMan ); - - // compute canonical forms of the truth tables of the cuts - Seq_MapCanonicizeTruthTables( pNtk ); - - // compute area flows -// Seq_MapComputeAreaFlows( pNtk, fVerbose ); - - // compute the delays -clk = clock(); - p->FiBestFloat = Seq_MapRetimeDelayLagsInternal( pNtk, fVerbose ); - if ( p->FiBestFloat == 0.0 ) - return 0; -p->timeDelay = clock() - clk; -/* - { - FILE * pTable; - pTable = fopen( "stats.txt", "a+" ); - fprintf( pTable, "%s ", pNtk->pName ); - fprintf( pTable, "%.2f ", p->FiBestFloat ); - fprintf( pTable, "%.2f ", (float)(p->timeCuts)/(float)(CLOCKS_PER_SEC) ); - fprintf( pTable, "%.2f ", (float)(p->timeDelay)/(float)(CLOCKS_PER_SEC) ); - fprintf( pTable, "\n" ); - fclose( pTable ); - } -*/ - // clean the marks - Abc_NtkForEachObj( pNtk, pObj, i ) - assert( !pObj->fMarkA && !pObj->fMarkB ); - - // collect the nodes and cuts used in the mapping - p->vMapAnds = Vec_PtrAlloc( 1000 ); - p->vMapCuts = Vec_VecAlloc( 1000 ); - TotalArea = 0.0; - Abc_NtkForEachPo( pNtk, pObj, i ) - TotalArea += Seq_MapCollectNode_rec( Abc_ObjChild0(pObj), p->FiBestFloat, p->vMapAnds, p->vMapCuts ); - - // clean the marks - Abc_NtkForEachObj( pNtk, pObj, i ) - pObj->fMarkA = pObj->fMarkB = 0; - - if ( fVerbose ) - printf( "Total area = %6.2f.\n", TotalArea ); - - // remove the cuts - Cut_ManStop( p->pCutMan ); - p->pCutMan = NULL; - return 1; -} - -/**Function************************************************************* - - Synopsis [Retimes AIG for optimal delay using Pan's algorithm.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -float Seq_MapRetimeDelayLagsInternal( Abc_Ntk_t * pNtk, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Abc_Obj_t * pNode; - float FiMax, FiBest, Delta; - int i, RetValue; - char NodeLag; - - assert( Abc_NtkIsSeq( pNtk ) ); - - // assign the accuracy for min-period computation - Delta = Mio_LibraryReadDelayNand2Max(Abc_FrameReadLibGen()); - if ( Delta == 0.0 ) - { - Delta = Mio_LibraryReadDelayAnd2Max(Abc_FrameReadLibGen()); - if ( Delta == 0.0 ) - { - printf( "Cannot retime/map if the library does not have NAND2 or AND2.\n" ); - return 0.0; - } - } - - // get the upper bound on the clock period - FiMax = Delta * (5 + Seq_NtkLevelMax(pNtk)); - Delta /= 2; - - // make sure this clock period is feasible - if ( !Seq_MapRetimeForPeriod( pNtk, FiMax, fVerbose ) ) - { - Vec_StrFill( p->vLags, p->nSize, 0 ); - Vec_StrFill( p->vLagsN, p->nSize, 0 ); - printf( "Error: The upper bound on the clock period cannot be computed.\n" ); - printf( "The reason for this error may be the presence in the circuit of logic\n" ); - printf( "that is not reachable from the PIs. Mapping/retiming is not performed.\n" ); - return 0; - } - - // search for the optimal clock period between 0 and nLevelMax - FiBest = Seq_MapRetimeSearch_rec( pNtk, 0.0, FiMax, Delta, fVerbose ); - - // recompute the best l-values - RetValue = Seq_MapRetimeForPeriod( pNtk, FiBest, fVerbose ); - assert( RetValue ); - - // fix the problem with non-converged delays - Abc_AigForEachAnd( pNtk, pNode, i ) - { - if ( Seq_NodeGetLValueP(pNode) < -ABC_INFINITY/2 ) - Seq_NodeSetLValueP( pNode, 0 ); - if ( Seq_NodeGetLValueN(pNode) < -ABC_INFINITY/2 ) - Seq_NodeSetLValueN( pNode, 0 ); - } - - // write the retiming lags for both phases of each node - Vec_StrFill( p->vLags, p->nSize, 0 ); - Vec_StrFill( p->vLagsN, p->nSize, 0 ); - Abc_AigForEachAnd( pNtk, pNode, i ) - { - NodeLag = Seq_NodeComputeLagFloat( Seq_NodeGetLValueP(pNode), FiBest ); - Seq_NodeSetLag( pNode, NodeLag ); - NodeLag = Seq_NodeComputeLagFloat( Seq_NodeGetLValueN(pNode), FiBest ); - Seq_NodeSetLagN( pNode, NodeLag ); -//printf( "%6d=(%d,%d) ", pNode->Id, Seq_NodeGetLag(pNode), Seq_NodeGetLagN(pNode) ); -// if ( Seq_NodeGetLag(pNode) != Seq_NodeGetLagN(pNode) ) -// { -//printf( "%6d=(%d,%d) ", pNode->Id, Seq_NodeGetLag(pNode), Seq_NodeGetLagN(pNode) ); -// } - } -//printf( "\n\n" ); - - // print the result - if ( fVerbose ) - printf( "The best clock period after mapping/retiming is %6.2f.\n", FiBest ); - return FiBest; -} - -/**Function************************************************************* - - Synopsis [Performs binary search for the optimal clock period.] - - Description [Assumes that FiMin is infeasible while FiMax is feasible.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -float Seq_MapRetimeSearch_rec( Abc_Ntk_t * pNtk, float FiMin, float FiMax, float Delta, int fVerbose ) -{ - float Median; - assert( FiMin < FiMax ); - if ( FiMin + Delta >= FiMax ) - return FiMax; - Median = FiMin + (FiMax - FiMin)/2; - if ( Seq_MapRetimeForPeriod( pNtk, Median, fVerbose ) ) - return Seq_MapRetimeSearch_rec( pNtk, FiMin, Median, Delta, fVerbose ); // Median is feasible - else - return Seq_MapRetimeSearch_rec( pNtk, Median, FiMax, Delta, fVerbose ); // Median is infeasible -} - -/**Function************************************************************* - - Synopsis [Returns 1 if retiming with this clock period is feasible.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_MapRetimeForPeriod( Abc_Ntk_t * pNtk, float Fi, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Abc_Obj_t * pObj; - float DelayInv = Mio_LibraryReadDelayInvMax(Abc_FrameReadLibGen()); - int i, c, RetValue, fChange, Counter; - char * pReason = ""; - - // set l-values of all nodes to be minus infinity - Vec_IntFill( p->vLValues, p->nSize, Abc_Float2Int( (float)-ABC_INFINITY ) ); - Vec_IntFill( p->vLValuesN, p->nSize, Abc_Float2Int( (float)-ABC_INFINITY ) ); - Vec_StrFill( p->vUses, p->nSize, 0 ); - - // set l-values of constants and PIs - pObj = Abc_NtkObj( pNtk, 0 ); - Seq_NodeSetLValueP( pObj, 0.0 ); - Seq_NodeSetLValueN( pObj, 0.0 ); - Abc_NtkForEachPi( pNtk, pObj, i ) - { - Seq_NodeSetLValueP( pObj, 0.0 ); - Seq_NodeSetLValueN( pObj, DelayInv ); - } - - // update all values iteratively - Counter = 0; - for ( c = 0; c < p->nMaxIters; c++ ) - { - fChange = 0; - Abc_AigForEachAnd( pNtk, pObj, i ) - { - Counter++; - RetValue = Seq_MapNodeUpdateLValue( pObj, Fi, DelayInv ); - if ( RetValue == SEQ_UPDATE_YES ) - fChange = 1; - } - Abc_NtkForEachPo( pNtk, pObj, i ) - { - RetValue = Seq_MapNodeUpdateLValue( pObj, Fi, DelayInv ); - if ( RetValue == SEQ_UPDATE_FAIL ) - break; - } - if ( RetValue == SEQ_UPDATE_FAIL ) - break; - if ( fChange == 0 ) - break; -//printf( "\n\n" ); - } - if ( c == p->nMaxIters ) - { - RetValue = SEQ_UPDATE_FAIL; - pReason = "(timeout)"; - } - else - c++; - - // report the results - if ( fVerbose ) - { - if ( RetValue == SEQ_UPDATE_FAIL ) - printf( "Period = %6.2f. Iterations = %3d. Updates = %10d. Infeasible %s\n", Fi, c, Counter, pReason ); - else - printf( "Period = %6.2f. Iterations = %3d. Updates = %10d. Feasible\n", Fi, c, Counter ); - } - return RetValue != SEQ_UPDATE_FAIL; -} - - - -/**Function************************************************************* - - Synopsis [Computes the l-value of the cut.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -float Seq_MapSuperGetArrival( Abc_Obj_t * pObj, float Fi, Seq_Match_t * pMatch, float DelayMax ) -{ - Abc_Seq_t * p = pObj->pNtk->pManFunc; - Abc_Obj_t * pFanin; - float lValueCur, lValueMax; - int i; - lValueMax = -ABC_INFINITY; - for ( i = pMatch->pCut->nLeaves - 1; i >= 0; i-- ) - { - // get the arrival time of the fanin - pFanin = Abc_NtkObj( pObj->pNtk, pMatch->pCut->pLeaves[i] >> 8 ); - if ( pMatch->uPhase & (1 << i) ) - lValueCur = Seq_NodeGetLValueN(pFanin) - Fi * (pMatch->pCut->pLeaves[i] & 255); - else - lValueCur = Seq_NodeGetLValueP(pFanin) - Fi * (pMatch->pCut->pLeaves[i] & 255); - // add the arrival time of this pin - if ( lValueMax < lValueCur + pMatch->pSuper->tDelaysR[i].Worst ) - lValueMax = lValueCur + pMatch->pSuper->tDelaysR[i].Worst; - if ( lValueMax < lValueCur + pMatch->pSuper->tDelaysF[i].Worst ) - lValueMax = lValueCur + pMatch->pSuper->tDelaysF[i].Worst; - if ( lValueMax > DelayMax + p->fEpsilon ) - return ABC_INFINITY; - } - return lValueMax; -} - -/**Function************************************************************* - - Synopsis [Computes the l-value of the cut.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -float Seq_MapNodeComputeCut( Abc_Obj_t * pObj, Cut_Cut_t * pCut, int fCompl, float Fi, Seq_Match_t * pMatchBest ) -{ - Seq_Match_t Match, * pMatchCur = &Match; - Abc_Seq_t * p = pObj->pNtk->pManFunc; - Map_Super_t * pSuper, * pSuperList; - unsigned uCanon[2]; - float lValueBest, lValueCur; - int i; - assert( pCut->nLeaves < 6 ); - // get the canonical truth table of this cut - uCanon[0] = uCanon[1] = (fCompl? pCut->uCanon0 : pCut->uCanon1); - if ( uCanon[0] == 0 || ~uCanon[0] == 0 ) - { - if ( pMatchBest ) - { - memset( pMatchBest, 0, sizeof(Seq_Match_t) ); - pMatchBest->pCut = pCut; - } - return (float)0.0; - } - // match the given phase of the cut - pSuperList = Map_SuperTableLookupC( p->pSuperLib, uCanon ); - // compute the arrival times of each supergate - lValueBest = ABC_INFINITY; - for ( pSuper = pSuperList; pSuper; pSuper = pSuper->pNext ) - { - // create the match - pMatchCur->pCut = pCut; - pMatchCur->pSuper = pSuper; - // get the phase - for ( i = 0; i < (int)pSuper->nPhases; i++ ) - { - pMatchCur->uPhase = (fCompl? pCut->Num0 : pCut->Num1) ^ pSuper->uPhases[i]; - // find the arrival time of this match - lValueCur = Seq_MapSuperGetArrival( pObj, Fi, pMatchCur, lValueBest ); - if ( lValueBest > lValueCur )//&& lValueCur > -ABC_INFINITY/2 ) - { - lValueBest = lValueCur; - if ( pMatchBest ) - *pMatchBest = *pMatchCur; - } - } - } -// assert( lValueBest < ABC_INFINITY/2 ); - return lValueBest; -} - -/**Function************************************************************* - - Synopsis [Computes the l-value of the node.] - - Description [The node can be internal or a PO.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -float Seq_MapNodeComputePhase( Abc_Obj_t * pObj, int fCompl, float Fi, Seq_Match_t * pMatchBest ) -{ - Seq_Match_t Match, * pMatchCur = &Match; - Cut_Cut_t * pList, * pCut; - float lValueBest, lValueCut; - // get the list of cuts - pList = Abc_NodeReadCuts( Seq_NodeCutMan(pObj), pObj ); - // get the arrival time of the best non-trivial cut - lValueBest = ABC_INFINITY; - for ( pCut = pList->pNext; pCut; pCut = pCut->pNext ) - { - lValueCut = Seq_MapNodeComputeCut( pObj, pCut, fCompl, Fi, pMatchBest? pMatchCur : NULL ); - if ( lValueBest > lValueCut ) - { - lValueBest = lValueCut; - if ( pMatchBest ) - *pMatchBest = *pMatchCur; - } - } -// assert( lValueBest < ABC_INFINITY/2 ); - return lValueBest; -} - -/**Function************************************************************* - - Synopsis [Computes the l-value of the node.] - - Description [The node can be internal or a PO.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_MapNodeUpdateLValue( Abc_Obj_t * pObj, float Fi, float DelayInv ) -{ - Abc_Seq_t * p = pObj->pNtk->pManFunc; - Cut_Cut_t * pList; - char Use; - float lValueOld0, lValueOld1, lValue0, lValue1, lValue; - assert( !Abc_ObjIsPi(pObj) ); - assert( Abc_ObjFaninNum(pObj) > 0 ); - // consider the case of the PO - if ( Abc_ObjIsPo(pObj) ) - { - if ( Abc_ObjFaninC0(pObj) ) // PO requires negative polarity - lValue = Seq_NodeGetLValueN(Abc_ObjFanin0(pObj)) - Fi * Seq_ObjFaninL0(pObj); - else - lValue = Seq_NodeGetLValueP(Abc_ObjFanin0(pObj)) - Fi * Seq_ObjFaninL0(pObj); - return (lValue > Fi + p->fEpsilon)? SEQ_UPDATE_FAIL : SEQ_UPDATE_NO; - } - // get the cuts - pList = Abc_NodeReadCuts( Seq_NodeCutMan(pObj), pObj ); - if ( pList == NULL ) - return SEQ_UPDATE_NO; - // compute the arrival time of both phases - lValue0 = Seq_MapNodeComputePhase( pObj, 1, Fi, NULL ); - lValue1 = Seq_MapNodeComputePhase( pObj, 0, Fi, NULL ); - // consider the case when negative phase is too slow - if ( lValue0 > lValue1 + DelayInv + p->fEpsilon ) - lValue0 = lValue1 + DelayInv, Use = 2; - else if ( lValue1 > lValue0 + DelayInv + p->fEpsilon ) - lValue1 = lValue0 + DelayInv, Use = 1; - else - Use = 3; - // set the uses of the phases - Seq_NodeSetUses( pObj, Use ); - // get the old arrival times - lValueOld0 = Seq_NodeGetLValueN(pObj); - lValueOld1 = Seq_NodeGetLValueP(pObj); - // compare - if ( lValue0 <= lValueOld0 + p->fEpsilon && lValue1 <= lValueOld1 + p->fEpsilon ) - return SEQ_UPDATE_NO; - assert( lValue0 < ABC_INFINITY/2 ); - assert( lValue1 < ABC_INFINITY/2 ); - // update the values - if ( lValue0 > lValueOld0 + p->fEpsilon ) - Seq_NodeSetLValueN( pObj, lValue0 ); - if ( lValue1 > lValueOld1 + p->fEpsilon ) - Seq_NodeSetLValueP( pObj, lValue1 ); -//printf( "%6d=(%4.2f,%4.2f) ", pObj->Id, Seq_NodeGetLValueP(pObj), Seq_NodeGetLValueN(pObj) ); - return SEQ_UPDATE_YES; -} - - - -/**Function************************************************************* - - Synopsis [Derives the parameters of the best mapping/retiming for one node.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -float Seq_MapCollectNode_rec( Abc_Obj_t * pAnd, float FiBest, Vec_Ptr_t * vMapping, Vec_Vec_t * vMapCuts ) -{ - Seq_Match_t * pMatch; - Abc_Obj_t * pFanin; - int k, fCompl, Use; - float AreaInv = Mio_LibraryReadAreaInv(Abc_FrameReadLibGen()); - float Area; - - // get the polarity of the node - fCompl = Abc_ObjIsComplement(pAnd); - pAnd = Abc_ObjRegular(pAnd); - - // skip visited nodes - if ( !fCompl ) - { // need the positive polarity - if ( pAnd->fMarkA ) - return 0.0; - pAnd->fMarkA = 1; - } - else - { // need the negative polarity - if ( pAnd->fMarkB ) - return 0.0; - pAnd->fMarkB = 1; - } - - // skip if this is a PI or a constant - if ( !Abc_AigNodeIsAnd(pAnd) ) - { - if ( Abc_ObjIsPi(pAnd) && fCompl ) - return AreaInv; - return 0.0; - } - - // check the uses of this node - Use = Seq_NodeGetUses( pAnd ); - if ( !fCompl && Use == 1 ) // the pos phase is required; only the neg phase is used - { - Area = Seq_MapCollectNode_rec( Abc_ObjNot(pAnd), FiBest, vMapping, vMapCuts ); - return Area + AreaInv; - } - if ( fCompl && Use == 2 ) // the neg phase is required; only the pos phase is used - { - Area = Seq_MapCollectNode_rec( pAnd, FiBest, vMapping, vMapCuts ); - return Area + AreaInv; - } - // both phases are used; the needed one can be selected - - // get the best match - pMatch = ALLOC( Seq_Match_t, 1 ); - memset( pMatch, 1, sizeof(Seq_Match_t) ); - Seq_MapNodeComputePhase( pAnd, fCompl, FiBest, pMatch ); - pMatch->pAnd = pAnd; - pMatch->fCompl = fCompl; - pMatch->fCutInv = pMatch->pCut->fCompl; - pMatch->PolUse = Use; - - // call for the fanin cuts - Area = pMatch->pSuper? pMatch->pSuper->Area : (float)0.0; - for ( k = 0; k < (int)pMatch->pCut->nLeaves; k++ ) - { - pFanin = Abc_NtkObj( pAnd->pNtk, pMatch->pCut->pLeaves[k] >> 8 ); - if ( pMatch->uPhase & (1 << k) ) - pFanin = Abc_ObjNot( pFanin ); - Area += Seq_MapCollectNode_rec( pFanin, FiBest, vMapping, vMapCuts ); - } - - // add this node - Vec_PtrPush( vMapping, pMatch ); - for ( k = 0; k < (int)pMatch->pCut->nLeaves; k++ ) - Vec_VecPush( vMapCuts, Vec_PtrSize(vMapping)-1, (void *)pMatch->pCut->pLeaves[k] ); - - // the cut will become unavailable when the cuts are deallocated - pMatch->pCut = NULL; - - return Area; -} - -/**Function************************************************************* - - Synopsis [Computes the canonical versions of the truth tables.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_MapCanonicizeTruthTables( Abc_Ntk_t * pNtk ) -{ - Abc_Obj_t * pObj; - Cut_Cut_t * pCut, * pList; - int i; - Abc_AigForEachAnd( pNtk, pObj, i ) - { - pList = Abc_NodeReadCuts( Seq_NodeCutMan(pObj), pObj ); - if ( pList == NULL ) - continue; - for ( pCut = pList->pNext; pCut; pCut = pCut->pNext ) - Cut_TruthNCanonicize( pCut ); - } -} - - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/seq/seqMaxMeanCycle.c b/src/base/seq/seqMaxMeanCycle.c deleted file mode 100644 index b62e4b33..00000000 --- a/src/base/seq/seqMaxMeanCycle.c +++ /dev/null @@ -1,572 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqMaxMeanCycle.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [Efficient computation of maximum mean cycle times.] - - Author [Aaron P. Hurst] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - May 15, 2006.] - - Revision [$Id: seqMaxMeanCycle.c,v 1.00 2005/05/15 00:00:00 ahurst Exp $] - -***********************************************************************/ - -#include "seqInt.h" -#include "hash.h" - -ABC_NAMESPACE_IMPL_START - - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -struct Abc_ManTime_t_ -{ - Abc_Time_t tArrDef; - Abc_Time_t tReqDef; - Vec_Ptr_t * vArrs; - Vec_Ptr_t * vReqs; -}; - -typedef struct Seq_HowardData_t_ -{ - char visited; - int mark; - int policy; - float cycle; - float skew; - float delay; -} Seq_HowardData_t; - -// accessing the arrival and required times of a node -static inline Abc_Time_t * Abc_NodeArrival( Abc_Obj_t * pNode ) { return pNode->pNtk->pManTime->vArrs->pArray[pNode->Id]; } -static inline Abc_Time_t * Abc_NodeRequired( Abc_Obj_t * pNode ) { return pNode->pNtk->pManTime->vReqs->pArray[pNode->Id]; } - -Hash_Ptr_t * Seq_NtkPathDelays( Abc_Ntk_t * pNtk, int fVerbose ); -void Seq_NtkMergePios( Abc_Ntk_t * pNtk, Hash_Ptr_t * hFwdDelays, int fVerbose ); - -void Seq_NtkHowardLoop( Abc_Ntk_t * pNtk, Hash_Ptr_t * hFwdDelays, - Hash_Ptr_t * hNodeData, int node, - int *howardDepth, float *howardDelay, int *howardSink, - float *maxMeanCycle); -void Abc_NtkDfsReverse_rec2( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Vec_Ptr_t * vEndpoints ); - -#define Seq_NtkGetPathDelay( hFwdDelays, from, to ) \ - (Hash_PtrExists(hFwdDelays, from)?Hash_FltEntry( ((Hash_Flt_t *)Hash_PtrEntry(hFwdDelays, from, 0)), to, 0):0 ) - -#define HOWARD_EPSILON 1e-3 -#define ZERO_SLOP 1e-5 -#define REMOVE_ZERO_SLOP( x ) \ - (x = (x > -ZERO_SLOP && x < ZERO_SLOP)?0:x) - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Computes maximum mean cycle time.] - - Description [Uses Howard's algorithm.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -float Seq_NtkHoward( Abc_Ntk_t * pNtk, int fVerbose ) { - - Abc_Obj_t * pObj; - Hash_Ptr_t * hFwdDelays; - Hash_Flt_t * hOutgoing; - Hash_Ptr_Entry_t * pSourceEntry, * pNodeEntry; - Hash_Flt_Entry_t * pSinkEntry; - int i, j, iteration = 0; - int source, sink; - int fChanged; - int howardDepth, howardSink = 0; - float delay, howardDelay, t; - float maxMeanCycle = -ABC_INFINITY; - Hash_Ptr_t * hNodeData; - Seq_HowardData_t * pNodeData, * pSourceData, * pSinkData; - - // gather timing constraints - hFwdDelays = Seq_NtkPathDelays( pNtk, fVerbose ); - Seq_NtkMergePios( pNtk, hFwdDelays, fVerbose ); - - // initialize data, create initial policy - hNodeData = Hash_PtrAlloc( hFwdDelays->nSize ); - Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) { - Hash_PtrWriteEntry( hNodeData, pSourceEntry->key, - (pNodeData = ALLOC(Seq_HowardData_t, 1)) ); - pNodeData->skew = 0.0; - pNodeData->policy = 0; - hOutgoing = (Hash_Flt_t *)(pSourceEntry->data); - assert(hOutgoing); - - Hash_FltForEachEntry( hOutgoing, pSinkEntry, j ) { - sink = pSinkEntry->key; - delay = pSinkEntry->data; - if (delay > pNodeData->skew) { - pNodeData->policy = sink; - pNodeData->skew = delay; - } - } - } - - // iteratively refine policy - do { - iteration++; - fChanged = 0; - howardDelay = 0.0; - howardDepth = 0; - - // reset data - Hash_PtrForEachEntry( hNodeData, pNodeEntry, i ) { - pNodeData = (Seq_HowardData_t *)pNodeEntry->data; - pNodeData->skew = -ABC_INFINITY; - pNodeData->cycle = -ABC_INFINITY; - pNodeData->mark = 0; - pNodeData->visited = 0; - } - - // find loops in policy graph - Hash_PtrForEachEntry( hNodeData, pNodeEntry, i ) { - pNodeData = (Seq_HowardData_t *)(pNodeEntry->data); - assert(pNodeData); - if (!pNodeData->visited) - Seq_NtkHowardLoop( pNtk, hFwdDelays, - hNodeData, pNodeEntry->key, - &howardDepth, &howardDelay, &howardSink, &maxMeanCycle); - } - - if (!howardSink) { - return -1; - } - - // improve policy by tightening loops - Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) { - source = pSourceEntry->key; - pSourceData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, source, 0 ); - assert(pSourceData); - hOutgoing = (Hash_Flt_t *)(pSourceEntry->data); - assert(hOutgoing); - Hash_FltForEachEntry( hOutgoing, pSinkEntry, j ) { - sink = pSinkEntry->key; - pSinkData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, sink, 0 ); - assert(pSinkData); - delay = pSinkEntry->data; - - if (pSinkData->cycle > pSourceData->cycle + HOWARD_EPSILON) { - fChanged = 1; - pSourceData->cycle = pSinkData->cycle; - pSourceData->policy = sink; - } - } - } - - // improve policy by correcting skews - if (!fChanged) { - Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) { - source = pSourceEntry->key; - pSourceData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, source, 0 ); - assert(pSourceData); - hOutgoing = (Hash_Flt_t *)(pSourceEntry->data); - assert(hOutgoing); - Hash_FltForEachEntry( hOutgoing, pSinkEntry, j ) { - sink = pSinkEntry->key; - pSinkData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, sink, 0 ); - assert(pSinkData); - delay = pSinkEntry->data; - - if (pSinkData->cycle < 0.0 || pSinkData->cycle < pSourceData->cycle) - continue; - - t = delay - pSinkData->cycle + pSinkData->skew; - if (t > pSourceData->skew + HOWARD_EPSILON) { - fChanged = 1; - pSourceData->skew = t; - pSourceData->policy = sink; - } - } - } - } - - if (fVerbose) printf("Iteration %d \t Period = %.2f\n", iteration, maxMeanCycle); - } while (fChanged); - - // set global skew, mmct - pNodeData = Hash_PtrEntry( hNodeData, -1, 0 ); - pNtk->globalSkew = -pNodeData->skew; - pNtk->maxMeanCycle = maxMeanCycle; - - // set endpoint skews - Vec_FltGrow( pNtk->vSkews, Abc_NtkLatchNum( pNtk ) ); - pNtk->vSkews->nSize = Abc_NtkLatchNum( pNtk ); - Abc_NtkForEachLatch( pNtk, pObj, i ) { - pNodeData = Hash_PtrEntry( hNodeData, pObj->Id, 0 ); - // skews are set based on latch # NOT id # - Abc_NtkSetLatSkew( pNtk, i, pNodeData->skew ); - } - - // free node data - Hash_PtrForEachEntry( hNodeData, pNodeEntry, i ) { - pNodeData = (Seq_HowardData_t *)(pNodeEntry->data); - FREE( pNodeData ); - } - Hash_PtrFree(hNodeData); - - // free delay data - Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) { - Hash_FltFree( (Hash_Flt_t *)(pSourceEntry->data) ); - } - Hash_PtrFree(hFwdDelays); - - return maxMeanCycle; -} - -/**Function************************************************************* - - Synopsis [Computes the mean cycle times of current policy graph.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkHowardLoop( Abc_Ntk_t * pNtk, Hash_Ptr_t * hFwdDelays, - Hash_Ptr_t * hNodeData, int node, - int *howardDepth, float *howardDelay, int *howardSink, - float *maxMeanCycle) { - - Seq_HowardData_t * pNodeData, *pToData; - float delay, t; - - pNodeData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, node, 0 ); - assert(pNodeData); - pNodeData->visited = 1; - pNodeData->mark = ++(*howardDepth); - pNodeData->delay = (*howardDelay); - if (pNodeData->policy) { - pToData = (Seq_HowardData_t *)Hash_PtrEntry( hNodeData, pNodeData->policy, 0 ); - assert(pToData); - delay = Seq_NtkGetPathDelay( hFwdDelays, node, pNodeData->policy ); - assert(delay > 0.0); - (*howardDelay) += delay; - if (pToData->mark) { - t = (*howardDelay - pToData->delay) / (*howardDepth - pToData->mark + 1); - pNodeData->cycle = t; - pNodeData->skew = 0.0; - if (*maxMeanCycle < t) { - *maxMeanCycle = t; - *howardSink = pNodeData->policy; - } - } else { - if(!pToData->visited) { - Seq_NtkHowardLoop(pNtk, hFwdDelays, hNodeData, pNodeData->policy, - howardDepth, howardDelay, howardSink, maxMeanCycle); - } - if(pToData->cycle > 0) { - t = delay - pToData->cycle + pToData->skew; - pNodeData->skew = t; - pNodeData->cycle = pToData->cycle; - } - } - } - *howardDelay = pNodeData->delay; - pNodeData->mark = 0; - --(*howardDepth); -} - -/**Function************************************************************* - - Synopsis [Computes the register-to-register delays.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Hash_Ptr_t * Seq_NtkPathDelays( Abc_Ntk_t * pNtk, int fVerbose ) { - - Abc_Time_t * pTime, ** ppTimes; - Abc_Obj_t * pObj, * pDriver, * pStart, * pFanout; - Vec_Ptr_t * vNodes, * vEndpoints; - int i, j, nPaths = 0; - Hash_Flt_t * hOutgoing; - Hash_Ptr_t * hFwdDelays; - float nMaxPath = 0, nSumPath = 0; - - extern void Abc_NtkTimePrepare( Abc_Ntk_t * pNtk ); - extern void Abc_NodeDelayTraceArrival( Abc_Obj_t * pNode ); - - if (fVerbose) printf("Gathering path delays...\n"); - - hFwdDelays = Hash_PtrAlloc( Abc_NtkCiNum( pNtk ) ); - - assert( Abc_NtkIsMappedLogic(pNtk) ); - - Abc_NtkTimePrepare( pNtk ); - ppTimes = (Abc_Time_t **)pNtk->pManTime->vArrs->pArray; - vNodes = Vec_PtrAlloc( 100 ); - vEndpoints = Vec_PtrAlloc( 100 ); - - // set the initial times (i.e. ignore all inputs) - Abc_NtkForEachObj( pNtk, pObj, i) { - pTime = ppTimes[pObj->Id]; - pTime->Fall = pTime->Rise = pTime->Worst = -ABC_INFINITY; - } - - // starting at each Ci, compute timing forward - Abc_NtkForEachCi( pNtk, pStart, j ) { - - hOutgoing = Hash_FltAlloc( 10 ); - Hash_PtrWriteEntry( hFwdDelays, pStart->Id, (void *)(hOutgoing) ); - - // seed the starting point of interest - pTime = ppTimes[pStart->Id]; - pTime->Fall = pTime->Rise = pTime->Worst = 0.0; - - // find a DFS ordering from the start - Abc_NtkIncrementTravId( pNtk ); - Abc_NodeSetTravIdCurrent( pStart ); - pObj = Abc_ObjFanout0Ntk(pStart); - Abc_ObjForEachFanout( pObj, pFanout, i ) - Abc_NtkDfsReverse_rec2( pFanout, vNodes, vEndpoints ); - if ( Abc_ObjIsCo( pStart ) ) - Vec_PtrPush( vEndpoints, pStart ); - - // do timing analysis - for ( i = vNodes->nSize-1; i >= 0; --i ) - Abc_NodeDelayTraceArrival( vNodes->pArray[i] ); - - // there is a path to each set of Co endpoints - Vec_PtrForEachEntry( Abc_Obj_t *, vEndpoints, pObj, i ) - { - assert(pObj); - assert( Abc_ObjIsCo( pObj ) ); - pDriver = Abc_ObjFanin0(pObj); - pTime = Abc_NodeArrival(pDriver); - if ( pTime->Worst > 0 ) { - Hash_FltWriteEntry( hOutgoing, pObj->Id, pTime->Worst ); - nPaths++; - // if (fVerbose) printf("\tpath %d,%d delay = %f\n", pStart->Id, pObj->Id, pTime->Worst); - nSumPath += pTime->Worst; - if (pTime->Worst > nMaxPath) - nMaxPath = pTime->Worst; - } - } - - // clear the times that were altered - for ( i = 0; i < vNodes->nSize; i++ ) { - pObj = (Abc_Obj_t *)(vNodes->pArray[i]); - pTime = ppTimes[pObj->Id]; - pTime->Fall = pTime->Rise = pTime->Worst = -ABC_INFINITY; - } - pTime = ppTimes[pStart->Id]; - pTime->Fall = pTime->Rise = pTime->Worst = -ABC_INFINITY; - - Vec_PtrClear( vNodes ); - Vec_PtrClear( vEndpoints ); - } - - Vec_PtrFree( vNodes ); - - // rezero Cis (note: these should be restored to values if they were nonzero) - Abc_NtkForEachCi( pNtk, pObj, i) { - pTime = ppTimes[pObj->Id]; - pTime->Fall = pTime->Rise = pTime->Worst = 0.0; - } - - if (fVerbose) printf("Num. paths = %d\tMax. Path Delay = %.2f\tAvg. Path Delay = %.2f\n", nPaths, nMaxPath, nSumPath / nPaths); - return hFwdDelays; -} - - -/**Function************************************************************* - - Synopsis [Merges all the Pios together into one ID = -1.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkMergePios( Abc_Ntk_t * pNtk, Hash_Ptr_t * hFwdDelays, - int fVerbose ) { - - Abc_Obj_t * pObj; - Hash_Flt_Entry_t * pSinkEntry; - Hash_Ptr_Entry_t * pSourceEntry; - Hash_Flt_t * hOutgoing, * hPioSource; - int i, j; - int source, sink, nMerges = 0; - float delay = 0, max_delay = 0; - Vec_Int_t * vFreeList; - - vFreeList = Vec_IntAlloc( 10 ); - - // create a new "-1" source entry for the Pios - hPioSource = Hash_FltAlloc( 100 ); - Hash_PtrWriteEntry( hFwdDelays, -1, (void *)(hPioSource) ); - - // merge all edges with a Pio as a source - Abc_NtkForEachPi( pNtk, pObj, i ) { - source = pObj->Id; - hOutgoing = (Hash_Flt_t *)Hash_PtrEntry( hFwdDelays, source, 0 ); - if (!hOutgoing) continue; - - Hash_PtrForEachEntry( hOutgoing, pSinkEntry, j ) { - nMerges++; - sink = pSinkEntry->key; - delay = pSinkEntry->data; - if (Hash_FltEntry( hPioSource, sink, 1 ) < delay) { - Hash_FltWriteEntry( hPioSource, sink, delay ); - } - } - - Hash_FltFree( hOutgoing ); - Hash_PtrRemove( hFwdDelays, source ); - } - - // merge all edges with a Pio as a sink - Hash_PtrForEachEntry( hFwdDelays, pSourceEntry, i ) { - hOutgoing = (Hash_Flt_t *)(pSourceEntry->data); - Hash_FltForEachEntry( hOutgoing, pSinkEntry, j ) { - sink = pSinkEntry->key; - delay = pSinkEntry->data; - - max_delay = -ABC_INFINITY; - if (Abc_ObjIsPo( Abc_NtkObj( pNtk, sink ) )) { - nMerges++; - if (delay > max_delay) - max_delay = delay; - Vec_IntPush( vFreeList, sink ); - } - } - if (max_delay != -ABC_INFINITY) - Hash_FltWriteEntry( hOutgoing, -1, delay ); - // do freeing - while( vFreeList->nSize > 0 ) { - Hash_FltRemove( hOutgoing, Vec_IntPop( vFreeList ) ); - } - } - - if (fVerbose) printf("Merged %d paths into one Pio node\n", nMerges); - -} - -/**Function************************************************************* - - Synopsis [This is a modification of routine from abcDfs.c] - - Description [Recursive DFS from a starting point. Keeps the endpoints.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Abc_NtkDfsReverse_rec2( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes, Vec_Ptr_t * vEndpoints ) -{ - Abc_Obj_t * pFanout; - int i; - assert( !Abc_ObjIsNet(pNode) ); - // if this node is already visited, skip - if ( Abc_NodeIsTravIdCurrent( pNode ) ) - return; - // mark the node as visited - Abc_NodeSetTravIdCurrent( pNode ); - // terminate at the Co - if ( Abc_ObjIsCo(pNode) ) { - Vec_PtrPush( vEndpoints, pNode ); - return; - } - assert( Abc_ObjIsNode( pNode ) ); - // visit the transitive fanin of the node - pNode = Abc_ObjFanout0Ntk(pNode); - Abc_ObjForEachFanout( pNode, pFanout, i ) - Abc_NtkDfsReverse_rec2( pFanout, vNodes, vEndpoints ); - // add the node after the fanins have been added - Vec_PtrPush( vNodes, pNode ); -} - -/**Function************************************************************* - - Synopsis [Converts all skews into forward skews 0<skew<T.] - - Description [Can also minimize total skew by changing global skew.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkSkewForward( Abc_Ntk_t * pNtk, float period, int fMinimize ) { - - Abc_Obj_t * pObj; - int i; - float skew; - float currentSum = 0, bestSum = ABC_INFINITY; - float currentOffset = 0, nextStep, bestOffset = 0; - - assert( pNtk->vSkews->nSize >= Abc_NtkLatchNum( pNtk )-1 ); - - if (fMinimize) { - // search all offsets for the one that minimizes sum of skews - while(currentOffset < period) { - currentSum = 0; - nextStep = period; - Abc_NtkForEachLatch( pNtk, pObj, i ) { - skew = Abc_NtkGetLatSkew( pNtk, i ) + currentOffset; - skew = (float)(skew - period*floor(skew/period)); - currentSum += skew; - if (skew > ZERO_SLOP && skew < nextStep) { - nextStep = skew; - } - } - - if (currentSum < bestSum) { - bestSum = currentSum; - bestOffset = currentOffset; - } - currentOffset += nextStep; - } - printf("Offseting all skews by %.2f\n", bestOffset); - } - - // convert global skew into forward skew - pNtk->globalSkew = pNtk->globalSkew - bestOffset; - pNtk->globalSkew = (float)(pNtk->globalSkew - period*floor(pNtk->globalSkew/period)); - assert(pNtk->globalSkew>= 0 && pNtk->globalSkew < period); - - // convert endpoint skews into forward skews - Abc_NtkForEachLatch( pNtk, pObj, i ) { - skew = Abc_NtkGetLatSkew( pNtk, i ) + bestOffset; - skew = (float)(skew - period*floor(skew/period)); - REMOVE_ZERO_SLOP( skew ); - assert(skew >=0 && skew < period); - - Abc_NtkSetLatSkew( pNtk, i, skew ); - } -} - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/seq/seqRetCore.c b/src/base/seq/seqRetCore.c deleted file mode 100644 index 846a6707..00000000 --- a/src/base/seq/seqRetCore.c +++ /dev/null @@ -1,498 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqRetCore.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [The core of FPGA mapping/retiming package.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqRetCore.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "seqInt.h" -#include "dec.h" - -ABC_NAMESPACE_IMPL_START - - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -static Abc_Ntk_t * Seq_NtkRetimeDerive( Abc_Ntk_t * pNtk, int fVerbose ); -static Abc_Obj_t * Seq_NodeRetimeDerive( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pNode, char * pSop, Vec_Ptr_t * vFanins ); -static Abc_Ntk_t * Seq_NtkRetimeReconstruct( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtkSeq ); -static Abc_Obj_t * Seq_EdgeReconstruct_rec( Abc_Obj_t * pGoal, Abc_Obj_t * pNode ); -static Abc_Obj_t * Seq_EdgeReconstructPO( Abc_Obj_t * pNode ); - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Performs FPGA mapping and retiming.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Seq_NtkRetime( Abc_Ntk_t * pNtk, int nMaxIters, int fInitial, int fVerbose ) -{ - Abc_Seq_t * p; - Abc_Ntk_t * pNtkSeq, * pNtkNew; - int RetValue; - assert( !Abc_NtkHasAig(pNtk) ); - // derive the isomorphic seq AIG - pNtkSeq = Seq_NtkRetimeDerive( pNtk, fVerbose ); - p = pNtkSeq->pManFunc; - p->nMaxIters = nMaxIters; - - if ( !fInitial ) - Seq_NtkLatchSetValues( pNtkSeq, ABC_INIT_DC ); - // find the best mapping and retiming - if ( !Seq_NtkRetimeDelayLags( pNtk, pNtkSeq, fVerbose ) ) - return NULL; - - // implement the retiming - RetValue = Seq_NtkImplementRetiming( pNtkSeq, p->vLags, fVerbose ); - if ( RetValue == 0 ) - printf( "Retiming completed but initial state computation has failed.\n" ); -//return pNtkSeq; - - // create the final mapped network - pNtkNew = Seq_NtkRetimeReconstruct( pNtk, pNtkSeq ); - Abc_NtkDelete( pNtkSeq ); - return pNtkNew; -} - -/**Function************************************************************* - - Synopsis [Derives the isomorphic seq AIG.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Seq_NtkRetimeDerive( Abc_Ntk_t * pNtk, int fVerbose ) -{ - Abc_Seq_t * p; - Abc_Ntk_t * pNtkNew; - Abc_Obj_t * pObj, * pFanin, * pMirror; - Vec_Ptr_t * vMapAnds, * vMirrors; - Vec_Vec_t * vMapFanins; - int i, k, RetValue, fHasBdds; - char * pSop; - - // make sure it is an AIG without self-feeding latches - assert( !Abc_NtkHasAig(pNtk) ); - if ( RetValue = Abc_NtkRemoveSelfFeedLatches(pNtk) ) - printf( "Modified %d self-feeding latches. The result may not verify.\n", RetValue ); - assert( Abc_NtkCountSelfFeedLatches(pNtk) == 0 ); - - // remove the dangling nodes - Abc_NtkCleanup( pNtk, fVerbose ); - - // transform logic functions from BDD to SOP - if ( fHasBdds = Abc_NtkIsBddLogic(pNtk) ) - { - if ( !Abc_NtkBddToSop(pNtk, 0) ) - { - printf( "Seq_NtkRetimeDerive(): Converting to SOPs has failed.\n" ); - return NULL; - } - } - - // start the network - pNtkNew = Abc_NtkAlloc( ABC_NTK_SEQ, ABC_FUNC_AIG, 1 ); - // duplicate the name and the spec - pNtkNew->pName = Extra_UtilStrsav(pNtk->pName); - pNtkNew->pSpec = Extra_UtilStrsav(pNtk->pSpec); - - // map the constant nodes - Abc_NtkCleanCopy( pNtk ); - // clone the PIs/POs/latches - Abc_NtkForEachPi( pNtk, pObj, i ) - Abc_NtkDupObj( pNtkNew, pObj, 0 ); - Abc_NtkForEachPo( pNtk, pObj, i ) - Abc_NtkDupObj( pNtkNew, pObj, 0 ); - // copy the names - Abc_NtkForEachPi( pNtk, pObj, i ) - Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL ); - Abc_NtkForEachPo( pNtk, pObj, i ) - Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL ); - - // create one AND for each logic node in the topological order - vMapAnds = Abc_NtkDfs( pNtk, 0 ); - Vec_PtrForEachEntry( Abc_Obj_t *, vMapAnds, pObj, i ) - { - if ( pObj->Id == 0 ) - { - pObj->pCopy = Abc_AigConst1(pNtkNew); - continue; - } - pObj->pCopy = Abc_NtkCreateNode( pNtkNew ); - } - - // make the new seq AIG point to the old network through pNext - Abc_NtkForEachObj( pNtk, pObj, i ) - if ( pObj->pCopy ) pObj->pCopy->pNext = pObj; - - // make latches point to the latch fanins - Abc_NtkForEachLatch( pNtk, pObj, i ) - { - assert( !Abc_ObjIsLatch(Abc_ObjFanin0(pObj)) ); - pObj->pCopy = Abc_ObjFanin0(pObj)->pCopy; - } - - // create internal AND nodes w/o strashing for each logic node (including constants) - vMapFanins = Vec_VecStart( Vec_PtrSize(vMapAnds) ); - Vec_PtrForEachEntry( Abc_Obj_t *, vMapAnds, pObj, i ) - { - // get the SOP of the node - if ( Abc_NtkHasMapping(pNtk) ) - pSop = Mio_GateReadSop(pObj->pData); - else - pSop = pObj->pData; - pFanin = Seq_NodeRetimeDerive( pNtkNew, pObj, pSop, Vec_VecEntry(vMapFanins, i) ); - Abc_ObjAddFanin( pObj->pCopy, pFanin ); - Abc_ObjAddFanin( pObj->pCopy, pFanin ); - } - // connect the POs - Abc_NtkForEachPo( pNtk, pObj, i ) - Abc_ObjAddFanin( pObj->pCopy, Abc_ObjFanin0(pObj)->pCopy ); - - // start the storage for initial states - p = pNtkNew->pManFunc; - Seq_Resize( p, Abc_NtkObjNumMax(pNtkNew) ); - - // add the sequential edges - Vec_PtrForEachEntry( Abc_Obj_t *, vMapAnds, pObj, i ) - { - vMirrors = Vec_VecEntry( vMapFanins, i ); - Abc_ObjForEachFanin( pObj, pFanin, k ) - { - pMirror = Vec_PtrEntry( vMirrors, k ); - if ( Abc_ObjIsLatch(pFanin) ) - { - Seq_NodeInsertFirst( pMirror, 0, Abc_LatchInit(pFanin) ); - Seq_NodeInsertFirst( pMirror, 1, Abc_LatchInit(pFanin) ); - } - } - } - // add the sequential edges to the POs - Abc_NtkForEachPo( pNtk, pObj, i ) - { - pFanin = Abc_ObjFanin0(pObj); - if ( Abc_ObjIsLatch(pFanin) ) - Seq_NodeInsertFirst( pObj->pCopy, 0, Abc_LatchInit(pFanin) ); - } - - - // save the fanin/delay info - p->vMapAnds = vMapAnds; - p->vMapFanins = vMapFanins; - p->vMapCuts = Vec_VecStart( Vec_PtrSize(p->vMapAnds) ); - p->vMapDelays = Vec_VecStart( Vec_PtrSize(p->vMapAnds) ); - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i ) - { - // change the node to be the new one - Vec_PtrWriteEntry( p->vMapAnds, i, pObj->pCopy ); - // collect the new fanins of this node - Abc_ObjForEachFanin( pObj, pFanin, k ) - Vec_VecPush( p->vMapCuts, i, (void *)( (pFanin->pCopy->Id << 8) | Abc_ObjIsLatch(pFanin) ) ); - // collect the delay info - if ( !Abc_NtkHasMapping(pNtk) ) - { - Abc_ObjForEachFanin( pObj, pFanin, k ) - Vec_VecPush( p->vMapDelays, i, (void *)Abc_Float2Int(1.0) ); - } - else - { - Mio_Pin_t * pPin = Mio_GateReadPins(pObj->pData); - float Max, tDelayBlockRise, tDelayBlockFall; - Abc_ObjForEachFanin( pObj, pFanin, k ) - { - tDelayBlockRise = (float)Mio_PinReadDelayBlockRise( pPin ); - tDelayBlockFall = (float)Mio_PinReadDelayBlockFall( pPin ); - Max = ABC_MAX( tDelayBlockRise, tDelayBlockFall ); - Vec_VecPush( p->vMapDelays, i, (void *)Abc_Float2Int(Max) ); - pPin = Mio_PinReadNext(pPin); - } - } - } - - // set the cutset composed of latch drivers -// Abc_NtkAigCutsetCopy( pNtk ); -// Seq_NtkLatchGetEqualFaninNum( pNtkNew ); - - // convert the network back into BDDs if this is how it was - if ( fHasBdds ) - Abc_NtkSopToBdd(pNtk); - - // copy EXDC and check correctness - if ( pNtk->pExdc ) - fprintf( stdout, "Warning: EXDC is not copied when converting to sequential AIG.\n" ); - if ( !Abc_NtkCheck( pNtkNew ) ) - fprintf( stdout, "Seq_NtkRetimeDerive(): Network check has failed.\n" ); - return pNtkNew; -} - - -/**Function************************************************************* - - Synopsis [Strashes one logic node using its SOP.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Obj_t * Seq_NodeRetimeDerive( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pRoot, char * pSop, Vec_Ptr_t * vFanins ) -{ - extern Abc_Obj_t * Dec_GraphToNetworkNoStrash( Abc_Ntk_t * pNtk, Dec_Graph_t * pGraph ); - Dec_Graph_t * pFForm; - Dec_Node_t * pNode; - Abc_Obj_t * pResult, * pFanin, * pMirror; - int i, nFanins; - - // get the number of node's fanins - nFanins = Abc_ObjFaninNum( pRoot ); - assert( nFanins == Abc_SopGetVarNum(pSop) ); - if ( nFanins < 2 ) - { - if ( Abc_SopIsConst1(pSop) ) - pFanin = Abc_AigConst1(pNtkNew); - else if ( Abc_SopIsConst0(pSop) ) - pFanin = Abc_ObjNot( Abc_AigConst1(pNtkNew) ); - else if ( Abc_SopIsBuf(pSop) ) - pFanin = Abc_ObjFanin0(pRoot)->pCopy; - else if ( Abc_SopIsInv(pSop) ) - pFanin = Abc_ObjNot( Abc_ObjFanin0(pRoot)->pCopy ); - else - assert( 0 ); - // create the node with these fanins - pMirror = Abc_NtkCreateNode( pNtkNew ); - Abc_ObjAddFanin( pMirror, pFanin ); - Abc_ObjAddFanin( pMirror, pFanin ); - Vec_PtrPush( vFanins, pMirror ); - return pMirror; - } - - // perform factoring - pFForm = Dec_Factor( pSop ); - // collect the fanins - Dec_GraphForEachLeaf( pFForm, pNode, i ) - { - pFanin = Abc_ObjFanin(pRoot,i)->pCopy; - pMirror = Abc_NtkCreateNode( pNtkNew ); - Abc_ObjAddFanin( pMirror, pFanin ); - Abc_ObjAddFanin( pMirror, pFanin ); - Vec_PtrPush( vFanins, pMirror ); - pNode->pFunc = pMirror; - } - // perform strashing - pResult = Dec_GraphToNetworkNoStrash( pNtkNew, pFForm ); - Dec_GraphFree( pFForm ); - return pResult; -} - - -/**Function************************************************************* - - Synopsis [Reconstructs the network after retiming.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Ntk_t * Seq_NtkRetimeReconstruct( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtkSeq ) -{ - Abc_Seq_t * p = pNtkSeq->pManFunc; - Seq_Lat_t * pRing0, * pRing1; - Abc_Ntk_t * pNtkNew; - Abc_Obj_t * pObj, * pFanin, * pFaninNew, * pMirror; - Vec_Ptr_t * vMirrors; - int i, k; - - assert( !Abc_NtkIsSeq(pNtkOld) ); - assert( Abc_NtkIsSeq(pNtkSeq) ); - - // transfer the pointers pNtkOld->pNtkSeq from pCopy to pNext - Abc_NtkForEachObj( pNtkOld, pObj, i ) - pObj->pNext = pObj->pCopy; - - // start the final network - pNtkNew = Abc_NtkStartFrom( pNtkSeq, pNtkOld->ntkType, pNtkOld->ntkFunc ); - - // transfer the pointers to the old network - if ( Abc_AigConst1(pNtkOld) ) - Abc_AigConst1(pNtkOld)->pCopy = Abc_AigConst1(pNtkNew); - Abc_NtkForEachPi( pNtkOld, pObj, i ) - pObj->pCopy = pObj->pNext->pCopy; - Abc_NtkForEachPo( pNtkOld, pObj, i ) - pObj->pCopy = pObj->pNext->pCopy; - - // copy the internal nodes of the old network into the new network - // transfer the pointers pNktOld->pNtkNew to pNtkSeq->pNtkNew - Abc_NtkForEachNode( pNtkOld, pObj, i ) - { - if ( i == 0 ) continue; - Abc_NtkDupObj( pNtkNew, pObj, 0 ); - pObj->pNext->pCopy = pObj->pCopy; - } - Abc_NtkForEachLatch( pNtkOld, pObj, i ) - pObj->pCopy = Abc_ObjFanin0(pObj)->pCopy; - - // share the latches - Seq_NtkShareLatches( pNtkNew, pNtkSeq ); - - // connect the objects -// Abc_NtkForEachNode( pNtkOld, pObj, i ) - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i ) - { - // pObj is from pNtkSeq - transform to pNtkOld - pObj = pObj->pNext; - // iterate through the fanins of this node in the old network - vMirrors = Vec_VecEntry( p->vMapFanins, i ); - Abc_ObjForEachFanin( pObj, pFanin, k ) - { - pMirror = Vec_PtrEntry( vMirrors, k ); - assert( Seq_ObjFaninL0(pMirror) == Seq_ObjFaninL1(pMirror) ); - pRing0 = Seq_NodeGetRing( pMirror, 0 ); - pRing1 = Seq_NodeGetRing( pMirror, 1 ); - if ( pRing0 == NULL ) - { - Abc_ObjAddFanin( pObj->pCopy, pFanin->pCopy ); - continue; - } -// assert( pRing0->pLatch == pRing1->pLatch ); - if ( pRing0->pLatch->pData > pRing1->pLatch->pData ) - Abc_ObjAddFanin( pObj->pCopy, pRing0->pLatch ); - else - Abc_ObjAddFanin( pObj->pCopy, pRing1->pLatch ); - } - } - - // connect the POs - Abc_NtkForEachPo( pNtkOld, pObj, i ) - { - pFanin = Abc_ObjFanin0(pObj); - pRing0 = Seq_NodeGetRing( Abc_NtkPo(pNtkSeq, i), 0 ); - if ( pRing0 ) - pFaninNew = pRing0->pLatch; - else - pFaninNew = pFanin->pCopy; - assert( pFaninNew != NULL ); - Abc_ObjAddFanin( pObj->pCopy, pFaninNew ); - } - - // clean the result of latch sharing - Seq_NtkShareLatchesClean( pNtkSeq ); - - // add the latches and their names - Abc_NtkAddDummyBoxNames( pNtkNew ); - Abc_NtkOrderCisCos( pNtkNew ); - // fix the problem with complemented and duplicated CO edges - Abc_NtkLogicMakeSimpleCos( pNtkNew, 1 ); - if ( !Abc_NtkCheck( pNtkNew ) ) - fprintf( stdout, "Seq_NtkRetimeReconstruct(): Network check has failed.\n" ); - return pNtkNew; - -} - -/**Function************************************************************* - - Synopsis [Reconstructs the network after retiming.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Obj_t * Seq_EdgeReconstruct_rec( Abc_Obj_t * pGoal, Abc_Obj_t * pNode ) -{ - Seq_Lat_t * pRing; - Abc_Obj_t * pFanin, * pRes = NULL; - - if ( !Abc_AigNodeIsAnd(pNode) ) - return NULL; - - // consider the first fanin - pFanin = Abc_ObjFanin0(pNode); - if ( pFanin->pCopy == NULL ) // internal node - pRes = Seq_EdgeReconstruct_rec( pGoal, pFanin ); - else if ( pFanin == pGoal ) - { - if ( pRing = Seq_NodeGetRing( pNode, 0 ) ) - pRes = pRing->pLatch; - else - pRes = pFanin->pCopy; - } - if ( pRes != NULL ) - return pRes; - - // consider the second fanin - pFanin = Abc_ObjFanin1(pNode); - if ( pFanin->pCopy == NULL ) // internal node - pRes = Seq_EdgeReconstruct_rec( pGoal, pFanin ); - else if ( pFanin == pGoal ) - { - if ( pRing = Seq_NodeGetRing( pNode, 1 ) ) - pRes = pRing->pLatch; - else - pRes = pFanin->pCopy; - } - return pRes; -} - -/**Function************************************************************* - - Synopsis [Reconstructs the network after retiming.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Obj_t * Seq_EdgeReconstructPO( Abc_Obj_t * pNode ) -{ - Seq_Lat_t * pRing; - assert( Abc_ObjIsPo(pNode) ); - if ( pRing = Seq_NodeGetRing( pNode, 0 ) ) - return pRing->pLatch; - else - return Abc_ObjFanin0(pNode)->pCopy; -} - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - - -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/seq/seqRetIter.c b/src/base/seq/seqRetIter.c deleted file mode 100644 index 816e71a1..00000000 --- a/src/base/seq/seqRetIter.c +++ /dev/null @@ -1,408 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqRetIter.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [Iterative delay computation in FPGA mapping/retiming package.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqRetIter.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "seqInt.h" -#include "main.h" -#include "fpga.h" - -ABC_NAMESPACE_IMPL_START - - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -static float Seq_NtkMappingSearch_rec( Abc_Ntk_t * pNtk, float FiMin, float FiMax, float Delta, int fVerbose ); -static int Seq_NtkMappingForPeriod( Abc_Ntk_t * pNtk, float Fi, int fVerbose ); -static int Seq_NtkNodeUpdateLValue( Abc_Obj_t * pObj, float Fi, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vDelays ); -static void Seq_NodeRetimeSetLag_rec( Abc_Obj_t * pNode, char Lag ); - -static void Seq_NodePrintInfo( Abc_Obj_t * pNode ); -static void Seq_NodePrintInfoPlus( Abc_Obj_t * pNode ); - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Computes the retiming lags for arbitrary network.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkRetimeDelayLags( Abc_Ntk_t * pNtkOld, Abc_Ntk_t * pNtk, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Abc_Obj_t * pNode; - float FiMax, Delta; - int i, RetValue; - char NodeLag; - - assert( Abc_NtkIsSeq( pNtk ) ); - - // the root AND gates and node delay should be assigned - assert( p->vMapAnds ); - assert( p->vMapCuts ); - assert( p->vMapDelays ); - assert( p->vMapFanins ); - - // guess the upper bound on the clock period - if ( Abc_NtkHasMapping(pNtkOld) ) - { - // assign the accuracy for min-period computation - Delta = Mio_LibraryReadDelayNand2Max(Abc_FrameReadLibGen()); - if ( Delta == 0.0 ) - { - Delta = Mio_LibraryReadDelayAnd2Max(Abc_FrameReadLibGen()); - if ( Delta == 0.0 ) - { - printf( "Cannot retime/map if the library does not have NAND2 or AND2.\n" ); - return 0; - } - } - // get the upper bound on the clock period - FiMax = Delta * 2 + Abc_NtkDelayTrace(pNtkOld); - Delta /= 2; - } - else - { - FiMax = (float)2.0 + Abc_NtkGetLevelNum(pNtkOld); - Delta = 1; - } - - // make sure this clock period is feasible - if ( !Seq_NtkMappingForPeriod( pNtk, FiMax, fVerbose ) ) - { - printf( "Error: The upper bound on the clock period cannot be computed.\n" ); - printf( "The reason for this error may be the presence in the circuit of logic\n" ); - printf( "that is not reachable from the PIs. Mapping/retiming is not performed.\n" ); - return 0; - } - - // search for the optimal clock period between 0 and nLevelMax - p->FiBestFloat = Seq_NtkMappingSearch_rec( pNtk, 0.0, FiMax, Delta, fVerbose ); - - // recompute the best l-values - RetValue = Seq_NtkMappingForPeriod( pNtk, p->FiBestFloat, fVerbose ); - assert( RetValue ); - - // fix the problem with non-converged delays - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pNode, i ) - if ( Seq_NodeGetLValueP(pNode) < -ABC_INFINITY/2 ) - Seq_NodeSetLValueP( pNode, 0 ); - - // experiment by adding an epsilon to all LValues -// Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pNode, i ) -// Seq_NodeSetLValueP( pNode, Seq_NodeGetLValueP(pNode) - p->fEpsilon ); - - // save the retiming lags - // mark the nodes - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pNode, i ) - pNode->fMarkA = 1; - // process the nodes - Vec_StrFill( p->vLags, p->nSize, 0 ); - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pNode, i ) - { - if ( Vec_PtrSize( Vec_VecEntry(p->vMapCuts, i) ) == 0 ) - { - Seq_NodeSetLag( pNode, 0 ); - continue; - } - NodeLag = Seq_NodeComputeLagFloat( Seq_NodeGetLValueP(pNode), p->FiBestFloat ); - Seq_NodeRetimeSetLag_rec( pNode, NodeLag ); - } - // unmark the nodes - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pNode, i ) - pNode->fMarkA = 0; - - // print the result - if ( fVerbose ) - printf( "The best clock period is %6.2f.\n", p->FiBestFloat ); -/* - { - FILE * pTable; - pTable = fopen( "stats.txt", "a+" ); - fprintf( pTable, "%s ", pNtk->pName ); - fprintf( pTable, "%.2f ", FiBest ); - fprintf( pTable, "\n" ); - fclose( pTable ); - } -*/ -// Seq_NodePrintInfo( Abc_NtkObj(pNtk, 847) ); - return 1; -} - -/**Function************************************************************* - - Synopsis [Performs binary search for the optimal clock period.] - - Description [Assumes that FiMin is infeasible while FiMax is feasible.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -float Seq_NtkMappingSearch_rec( Abc_Ntk_t * pNtk, float FiMin, float FiMax, float Delta, int fVerbose ) -{ - float Median; - assert( FiMin < FiMax ); - if ( FiMin + Delta >= FiMax ) - return FiMax; - Median = FiMin + (FiMax - FiMin)/2; - if ( Seq_NtkMappingForPeriod( pNtk, Median, fVerbose ) ) - return Seq_NtkMappingSearch_rec( pNtk, FiMin, Median, Delta, fVerbose ); // Median is feasible - else - return Seq_NtkMappingSearch_rec( pNtk, Median, FiMax, Delta, fVerbose ); // Median is infeasible -} - -/**Function************************************************************* - - Synopsis [Returns 1 if retiming with this clock period is feasible.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkMappingForPeriod( Abc_Ntk_t * pNtk, float Fi, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Vec_Ptr_t * vLeaves, * vDelays; - Abc_Obj_t * pObj; - int i, c, RetValue, fChange, Counter; - char * pReason = ""; - - // set l-values of all nodes to be minus infinity - Vec_IntFill( p->vLValues, p->nSize, Abc_Float2Int( (float)-ABC_INFINITY ) ); - - // set l-values of constants and PIs - pObj = Abc_NtkObj( pNtk, 0 ); - Seq_NodeSetLValueP( pObj, 0.0 ); - Abc_NtkForEachPi( pNtk, pObj, i ) - Seq_NodeSetLValueP( pObj, 0.0 ); - - // update all values iteratively - Counter = 0; - for ( c = 0; c < p->nMaxIters; c++ ) - { - fChange = 0; - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, i ) - { - Counter++; - vLeaves = Vec_VecEntry( p->vMapCuts, i ); - vDelays = Vec_VecEntry( p->vMapDelays, i ); - if ( Vec_PtrSize(vLeaves) == 0 ) - { - Seq_NodeSetLValueP( pObj, 0.0 ); - continue; - } - RetValue = Seq_NtkNodeUpdateLValue( pObj, Fi, vLeaves, vDelays ); - if ( RetValue == SEQ_UPDATE_YES ) - fChange = 1; - } - Abc_NtkForEachPo( pNtk, pObj, i ) - { - RetValue = Seq_NtkNodeUpdateLValue( pObj, Fi, NULL, NULL ); - if ( RetValue == SEQ_UPDATE_FAIL ) - break; - } - if ( RetValue == SEQ_UPDATE_FAIL ) - break; - if ( fChange == 0 ) - break; - } - if ( c == p->nMaxIters ) - { - RetValue = SEQ_UPDATE_FAIL; - pReason = "(timeout)"; - } - else - c++; - - // report the results - if ( fVerbose ) - { - if ( RetValue == SEQ_UPDATE_FAIL ) - printf( "Period = %6.2f. Iterations = %3d. Updates = %10d. Infeasible %s\n", Fi, c, Counter, pReason ); - else - printf( "Period = %6.2f. Iterations = %3d. Updates = %10d. Feasible\n", Fi, c, Counter ); - } - return RetValue != SEQ_UPDATE_FAIL; -} - -/**Function************************************************************* - - Synopsis [Computes the l-value of the node.] - - Description [The node can be internal or a PO.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkNodeUpdateLValue( Abc_Obj_t * pObj, float Fi, Vec_Ptr_t * vLeaves, Vec_Ptr_t * vDelays ) -{ - Abc_Seq_t * p = pObj->pNtk->pManFunc; - float lValueOld, lValueNew, lValueCur, lValuePin; - unsigned SeqEdge; - Abc_Obj_t * pLeaf; - int i; - - assert( !Abc_ObjIsPi(pObj) ); - assert( Abc_ObjFaninNum(pObj) > 0 ); - // consider the case of the PO - if ( Abc_ObjIsPo(pObj) ) - { - lValueCur = Seq_NodeGetLValueP(Abc_ObjFanin0(pObj)) - Fi * Seq_ObjFaninL0(pObj); - return (lValueCur > Fi + p->fEpsilon)? SEQ_UPDATE_FAIL : SEQ_UPDATE_NO; - } - // get the new arrival time of the cut output - lValueNew = -ABC_INFINITY; - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i ) - { - SeqEdge = (unsigned)pLeaf; - pLeaf = Abc_NtkObj( pObj->pNtk, SeqEdge >> 8 ); - lValueCur = Seq_NodeGetLValueP(pLeaf) - Fi * (SeqEdge & 255); - lValuePin = Abc_Int2Float( (int)Vec_PtrEntry(vDelays, i) ); - if ( lValueNew < lValuePin + lValueCur ) - lValueNew = lValuePin + lValueCur; - } - // compare - lValueOld = Seq_NodeGetLValueP( pObj ); - if ( lValueNew <= lValueOld + p->fEpsilon ) - return SEQ_UPDATE_NO; - // update the values - if ( lValueNew > lValueOld + p->fEpsilon ) - Seq_NodeSetLValueP( pObj, lValueNew ); - return SEQ_UPDATE_YES; -} - - - -/**Function************************************************************* - - Synopsis [Add sequential edges.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NodeRetimeSetLag_rec( Abc_Obj_t * pNode, char Lag ) -{ - Abc_Obj_t * pFanin; - if ( !Abc_AigNodeIsAnd(pNode) ) - return; - Seq_NodeSetLag( pNode, Lag ); - // consider the first fanin - pFanin = Abc_ObjFanin0(pNode); - if ( pFanin->fMarkA == 0 ) // internal node - Seq_NodeRetimeSetLag_rec( pFanin, Lag ); - // consider the second fanin - pFanin = Abc_ObjFanin1(pNode); - if ( pFanin->fMarkA == 0 ) // internal node - Seq_NodeRetimeSetLag_rec( pFanin, Lag ); -} - - -/**Function************************************************************* - - Synopsis [Add sequential edges.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NodePrintInfo( Abc_Obj_t * pNode ) -{ - Abc_Seq_t * p = pNode->pNtk->pManFunc; - Abc_Obj_t * pFanin, * pObj, * pLeaf; - Vec_Ptr_t * vLeaves; - unsigned SeqEdge; - int i, Number; - - // print the node - printf( " Node = %6d. LValue = %7.2f. Lag = %2d.\n", - pNode->Id, Seq_NodeGetLValueP(pNode), Seq_NodeGetLag(pNode) ); - - // find the number - Vec_PtrForEachEntry( Abc_Obj_t *, p->vMapAnds, pObj, Number ) - if ( pObj == pNode ) - break; - - // get the leaves - vLeaves = Vec_VecEntry( p->vMapCuts, Number ); - - // print the leaves - Vec_PtrForEachEntry( Abc_Obj_t *, vLeaves, pLeaf, i ) - { - SeqEdge = (unsigned)pLeaf; - pFanin = Abc_NtkObj( pNode->pNtk, SeqEdge >> 8 ); - // print the leaf - printf( " Fanin%d(%d) = %6d. LValue = %7.2f. Lag = %2d.\n", i, SeqEdge & 255, - pFanin->Id, Seq_NodeGetLValueP(pFanin), Seq_NodeGetLag(pFanin) ); - } -} - -/**Function************************************************************* - - Synopsis [Add sequential edges.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NodePrintInfoPlus( Abc_Obj_t * pNode ) -{ - Abc_Obj_t * pFanout; - int i; - printf( "CENTRAL NODE:\n" ); - Seq_NodePrintInfo( pNode ); - Abc_ObjForEachFanout( pNode, pFanout, i ) - { - printf( "FANOUT%d:\n", i ); - Seq_NodePrintInfo( pFanout ); - } -} - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - - -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/seq/seqShare.c b/src/base/seq/seqShare.c deleted file mode 100644 index bccfff80..00000000 --- a/src/base/seq/seqShare.c +++ /dev/null @@ -1,393 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqShare.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [Latch sharing at the fanout stems.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqShare.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "seqInt.h" - -ABC_NAMESPACE_IMPL_START - - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -static void Seq_NodeShareFanouts( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes ); -static void Seq_NodeShareOne( Abc_Obj_t * pNode, Abc_InitType_t Init, Vec_Ptr_t * vNodes ); - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Transforms the sequential AIG to take fanout sharing into account.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkShareFanouts( Abc_Ntk_t * pNtk ) -{ - Vec_Ptr_t * vNodes; - Abc_Obj_t * pObj; - int i; - vNodes = Vec_PtrAlloc( 10 ); - // share the PI latches - Abc_NtkForEachPi( pNtk, pObj, i ) - Seq_NodeShareFanouts( pObj, vNodes ); - // share the node latches - Abc_NtkForEachNode( pNtk, pObj, i ) - Seq_NodeShareFanouts( pObj, vNodes ); - Vec_PtrFree( vNodes ); -} - -/**Function************************************************************* - - Synopsis [Transforms the node to take fanout sharing into account.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NodeShareFanouts( Abc_Obj_t * pNode, Vec_Ptr_t * vNodes ) -{ - Abc_Obj_t * pFanout; - Abc_InitType_t Type; - int nLatches[4], i; - // skip the node with only one fanout - if ( Abc_ObjFanoutNum(pNode) < 2 ) - return; - // clean the the fanout counters - for ( i = 0; i < 4; i++ ) - nLatches[i] = 0; - // find the number of fanouts having latches of each type - Abc_ObjForEachFanout( pNode, pFanout, i ) - { - if ( Seq_ObjFanoutL(pNode, pFanout) == 0 ) - continue; - Type = Seq_NodeGetInitLast( pFanout, Abc_ObjFanoutEdgeNum(pNode, pFanout) ); - nLatches[Type]++; - } - // decide what to do - if ( nLatches[ABC_INIT_ZERO] > 1 && nLatches[ABC_INIT_ONE] > 1 ) // 0-group and 1-group - { - Seq_NodeShareOne( pNode, ABC_INIT_ZERO, vNodes ); // shares 0 and DC - Seq_NodeShareOne( pNode, ABC_INIT_ONE, vNodes ); // shares 1 and DC - } - else if ( nLatches[ABC_INIT_ZERO] > 1 ) // 0-group - Seq_NodeShareOne( pNode, ABC_INIT_ZERO, vNodes ); // shares 0 and DC - else if ( nLatches[ABC_INIT_ONE] > 1 ) // 1-group - Seq_NodeShareOne( pNode, ABC_INIT_ONE, vNodes ); // shares 1 and DC - else if ( nLatches[ABC_INIT_DC] > 1 ) // DC-group - { - if ( nLatches[ABC_INIT_ZERO] > 0 ) - Seq_NodeShareOne( pNode, ABC_INIT_ZERO, vNodes ); // shares 0 and DC - else - Seq_NodeShareOne( pNode, ABC_INIT_ONE, vNodes ); // shares 1 and DC - } -} - -/**Function************************************************************* - - Synopsis [Transforms the node to take fanout sharing into account.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NodeShareOne( Abc_Obj_t * pNode, Abc_InitType_t Init, Vec_Ptr_t * vNodes ) -{ - Vec_Int_t * vNums = Seq_ObjLNums( pNode ); - Vec_Ptr_t * vInits = Seq_NodeLats( pNode ); - Abc_Obj_t * pFanout, * pBuffer; - Abc_InitType_t Type, InitNew; - int i; - // collect the fanouts that satisfy the property (have initial value Init or DC) - InitNew = ABC_INIT_DC; - Vec_PtrClear( vNodes ); - Abc_ObjForEachFanout( pNode, pFanout, i ) - { - if ( Seq_ObjFanoutL(pNode, pFanout) == 0 ) - continue; - Type = Seq_NodeGetInitLast( pFanout, Abc_ObjFanoutEdgeNum(pNode, pFanout) ); - if ( Type == Init ) - InitNew = Init; - if ( Type == Init || Type == ABC_INIT_DC ) - { - Vec_PtrPush( vNodes, pFanout ); - Seq_NodeDeleteLast( pFanout, Abc_ObjFanoutEdgeNum(pNode, pFanout) ); - } - } - // create the new buffer - pBuffer = Abc_NtkCreateNode( pNode->pNtk ); - Abc_ObjAddFanin( pBuffer, pNode ); - - // grow storage for initial states - Vec_PtrGrow( vInits, 2 * pBuffer->Id + 2 ); - for ( i = Vec_PtrSize(vInits); i < 2 * (int)pBuffer->Id + 2; i++ ) - Vec_PtrPush( vInits, NULL ); - // grow storage for numbers of latches - Vec_IntGrow( vNums, 2 * pBuffer->Id + 2 ); - for ( i = Vec_IntSize(vNums); i < 2 * (int)pBuffer->Id + 2; i++ ) - Vec_IntPush( vNums, 0 ); - // insert the new latch - Seq_NodeInsertFirst( pBuffer, 0, InitNew ); - - // redirect the fanouts - Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pFanout, i ) - Abc_ObjPatchFanin( pFanout, pNode, pBuffer ); -} - - - - - -/**Function************************************************************* - - Synopsis [Maps virtual latches into real latches.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -static inline unsigned Seq_NtkShareLatchesKey( Abc_Obj_t * pObj, Abc_InitType_t Init ) -{ - return (pObj->Id << 2) | Init; -} - -/**Function************************************************************* - - Synopsis [Maps virtual latches into real latches.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Abc_Obj_t * Seq_NtkShareLatches_rec( Abc_Ntk_t * pNtk, Abc_Obj_t * pObj, Seq_Lat_t * pRing, int nLatch, stmm_table * tLatchMap ) -{ - Abc_Obj_t * pLatch, * pFanin; - Abc_InitType_t Init; - unsigned Key; - if ( nLatch == 0 ) - return pObj; - assert( pRing->pLatch == NULL ); - // get the latch on the previous level - pFanin = Seq_NtkShareLatches_rec( pNtk, pObj, Seq_LatNext(pRing), nLatch - 1, tLatchMap ); - - // get the initial state - Init = Seq_LatInit( pRing ); - // check if the latch with this initial state exists - Key = Seq_NtkShareLatchesKey( pFanin, Init ); - if ( stmm_lookup( tLatchMap, (char *)Key, (char **)&pLatch ) ) - return pRing->pLatch = pLatch; - - // does not exist - if ( Init != ABC_INIT_DC ) - { - // check if the don't-care exists - Key = Seq_NtkShareLatchesKey( pFanin, ABC_INIT_DC ); - if ( stmm_lookup( tLatchMap, (char *)Key, (char **)&pLatch ) ) // yes - { - // update the table - stmm_delete( tLatchMap, (char **)&Key, (char **)&pLatch ); - Key = Seq_NtkShareLatchesKey( pFanin, Init ); - stmm_insert( tLatchMap, (char *)Key, (char *)pLatch ); - // change don't-care to the given value - pLatch->pData = (void *)Init; - return pRing->pLatch = pLatch; - } - - // add the latch with this value - pLatch = Abc_NtkCreateLatch( pNtk ); - pLatch->pData = (void *)Init; - Abc_ObjAddFanin( pLatch, pFanin ); - // add it to the table - Key = Seq_NtkShareLatchesKey( pFanin, Init ); - stmm_insert( tLatchMap, (char *)Key, (char *)pLatch ); - return pRing->pLatch = pLatch; - } - // the init value is the don't-care - - // check if care values exist - Key = Seq_NtkShareLatchesKey( pFanin, ABC_INIT_ZERO ); - if ( stmm_lookup( tLatchMap, (char *)Key, (char **)&pLatch ) ) - { - Seq_LatSetInit( pRing, ABC_INIT_ZERO ); - return pRing->pLatch = pLatch; - } - Key = Seq_NtkShareLatchesKey( pFanin, ABC_INIT_ONE ); - if ( stmm_lookup( tLatchMap, (char *)Key, (char **)&pLatch ) ) - { - Seq_LatSetInit( pRing, ABC_INIT_ONE ); - return pRing->pLatch = pLatch; - } - - // create the don't-care latch - pLatch = Abc_NtkCreateLatch( pNtk ); - pLatch->pData = (void *)ABC_INIT_DC; - Abc_ObjAddFanin( pLatch, pFanin ); - // add it to the table - Key = Seq_NtkShareLatchesKey( pFanin, ABC_INIT_DC ); - stmm_insert( tLatchMap, (char *)Key, (char *)pLatch ); - return pRing->pLatch = pLatch; -} - -/**Function************************************************************* - - Synopsis [Maps virtual latches into real latches.] - - Description [Creates new latches and assigns them to virtual latches - on the edges of a sequential AIG. The nodes of the new network should - be created before this procedure is called.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkShareLatches( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk ) -{ - Abc_Obj_t * pObj, * pFanin; - stmm_table * tLatchMap; - int i; - assert( Abc_NtkIsSeq( pNtk ) ); - tLatchMap = stmm_init_table( (int (*)(void))stmm_ptrcmp, (int (*)(void))stmm_ptrhash ); - Abc_AigForEachAnd( pNtk, pObj, i ) - { - pFanin = Abc_ObjFanin0(pObj); - Seq_NtkShareLatches_rec( pNtkNew, pFanin->pCopy, Seq_NodeGetRing(pObj,0), Seq_NodeCountLats(pObj,0), tLatchMap ); - pFanin = Abc_ObjFanin1(pObj); - Seq_NtkShareLatches_rec( pNtkNew, pFanin->pCopy, Seq_NodeGetRing(pObj,1), Seq_NodeCountLats(pObj,1), tLatchMap ); - } - Abc_NtkForEachPo( pNtk, pObj, i ) - Seq_NtkShareLatches_rec( pNtkNew, Abc_ObjFanin0(pObj)->pCopy, Seq_NodeGetRing(pObj,0), Seq_NodeCountLats(pObj,0), tLatchMap ); - stmm_free_table( tLatchMap ); -} - -/**Function************************************************************* - - Synopsis [Maps virtual latches into real latches.] - - Description [Creates new latches and assigns them to virtual latches - on the edges of a sequential AIG. The nodes of the new network should - be created before this procedure is called.] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkShareLatchesMapping( Abc_Ntk_t * pNtkNew, Abc_Ntk_t * pNtk, Vec_Ptr_t * vMapAnds, int fFpga ) -{ - Seq_Match_t * pMatch; - Abc_Obj_t * pObj, * pFanout; - stmm_table * tLatchMap; - Vec_Ptr_t * vNodes; - int i, k; - assert( Abc_NtkIsSeq( pNtk ) ); - - // start the table - tLatchMap = stmm_init_table( (int (*)(void))stmm_ptrcmp, (int (*)(void))stmm_ptrhash ); - - // create the array of all nodes with sharable fanouts - vNodes = Vec_PtrAlloc( 100 ); - Vec_PtrPush( vNodes, Abc_AigConst1(pNtk) ); - Abc_NtkForEachPi( pNtk, pObj, i ) - Vec_PtrPush( vNodes, pObj ); - if ( fFpga ) - { - Vec_PtrForEachEntry( Abc_Obj_t *, vMapAnds, pObj, i ) - Vec_PtrPush( vNodes, pObj ); - } - else - { - Vec_PtrForEachEntry( Abc_Obj_t *, vMapAnds, pMatch, i ) - Vec_PtrPush( vNodes, pMatch->pAnd ); - } - - // process nodes used in the mapping - Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i ) - { - // make sure the label is clean - Abc_ObjForEachFanout( pObj, pFanout, k ) - assert( pFanout->fMarkC == 0 ); - Abc_ObjForEachFanout( pObj, pFanout, k ) - { - if ( pFanout->fMarkC ) - continue; - pFanout->fMarkC = 1; - if ( Abc_ObjFaninId0(pFanout) == pObj->Id ) - Seq_NtkShareLatches_rec( pNtkNew, pObj->pCopy, Seq_NodeGetRing(pFanout,0), Seq_NodeCountLats(pFanout,0), tLatchMap ); - if ( Abc_ObjFaninId1(pFanout) == pObj->Id ) - Seq_NtkShareLatches_rec( pNtkNew, pObj->pCopy, Seq_NodeGetRing(pFanout,1), Seq_NodeCountLats(pFanout,1), tLatchMap ); - } - // clean the label - Abc_ObjForEachFanout( pObj, pFanout, k ) - pFanout->fMarkC = 0; - } - stmm_free_table( tLatchMap ); - // return to the old array - Vec_PtrFree( vNodes ); -} - -/**Function************************************************************* - - Synopsis [Clean the latches after sharing them.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkShareLatchesClean( Abc_Ntk_t * pNtk ) -{ - Abc_Obj_t * pObj; - int i; - assert( Abc_NtkIsSeq( pNtk ) ); - Abc_AigForEachAnd( pNtk, pObj, i ) - { - Seq_NodeCleanLats( pObj, 0 ); - Seq_NodeCleanLats( pObj, 1 ); - } - Abc_NtkForEachPo( pNtk, pObj, i ) - Seq_NodeCleanLats( pObj, 0 ); -} - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/seq/seqUtil.c b/src/base/seq/seqUtil.c deleted file mode 100644 index 137151e2..00000000 --- a/src/base/seq/seqUtil.c +++ /dev/null @@ -1,602 +0,0 @@ -/**CFile**************************************************************** - - FileName [seqUtil.c] - - SystemName [ABC: Logic synthesis and verification system.] - - PackageName [Construction and manipulation of sequential AIGs.] - - Synopsis [Various utilities working with sequential AIGs.] - - Author [Alan Mishchenko] - - Affiliation [UC Berkeley] - - Date [Ver. 1.0. Started - June 20, 2005.] - - Revision [$Id: seqUtil.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] - -***********************************************************************/ - -#include "seqInt.h" - -ABC_NAMESPACE_IMPL_START - - -//////////////////////////////////////////////////////////////////////// -/// DECLARATIONS /// -//////////////////////////////////////////////////////////////////////// - -//////////////////////////////////////////////////////////////////////// -/// FUNCTION DEFINITIONS /// -//////////////////////////////////////////////////////////////////////// - -/**Function************************************************************* - - Synopsis [Returns the maximum latch number on any of the fanouts.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkLevelMax( Abc_Ntk_t * pNtk ) -{ - Abc_Obj_t * pNode; - int i, Result; - assert( Abc_NtkIsSeq(pNtk) ); - Result = 0; - Abc_NtkForEachPo( pNtk, pNode, i ) - { - pNode = Abc_ObjFanin0(pNode); - if ( Result < (int)pNode->Level ) - Result = pNode->Level; - } - Abc_SeqForEachCutsetNode( pNtk, pNode, i ) - { - if ( Result < (int)pNode->Level ) - Result = pNode->Level; - } - return Result; -} - -/**Function************************************************************* - - Synopsis [Returns the maximum latch number on any of the fanouts.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_ObjFanoutLMax( Abc_Obj_t * pObj ) -{ - Abc_Obj_t * pFanout; - int i, nLatchCur, nLatchRes; - if ( Abc_ObjFanoutNum(pObj) == 0 ) - return 0; - nLatchRes = 0; - Abc_ObjForEachFanout( pObj, pFanout, i ) - { - nLatchCur = Seq_ObjFanoutL(pObj, pFanout); - if ( nLatchRes < nLatchCur ) - nLatchRes = nLatchCur; - } - assert( nLatchRes >= 0 ); - return nLatchRes; -} - -/**Function************************************************************* - - Synopsis [Returns the minimum latch number on any of the fanouts.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_ObjFanoutLMin( Abc_Obj_t * pObj ) -{ - Abc_Obj_t * pFanout; - int i, nLatchCur, nLatchRes; - if ( Abc_ObjFanoutNum(pObj) == 0 ) - return 0; - nLatchRes = ABC_INFINITY; - Abc_ObjForEachFanout( pObj, pFanout, i ) - { - nLatchCur = Seq_ObjFanoutL(pObj, pFanout); - if ( nLatchRes > nLatchCur ) - nLatchRes = nLatchCur; - } - assert( nLatchRes < ABC_INFINITY ); - return nLatchRes; -} - -/**Function************************************************************* - - Synopsis [Returns the sum of latches on the fanout edges.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_ObjFanoutLSum( Abc_Obj_t * pObj ) -{ - Abc_Obj_t * pFanout; - int i, nSum = 0; - Abc_ObjForEachFanout( pObj, pFanout, i ) - nSum += Seq_ObjFanoutL(pObj, pFanout); - return nSum; -} - -/**Function************************************************************* - - Synopsis [Returns the sum of latches on the fanin edges.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_ObjFaninLSum( Abc_Obj_t * pObj ) -{ - Abc_Obj_t * pFanin; - int i, nSum = 0; - Abc_ObjForEachFanin( pObj, pFanin, i ) - nSum += Seq_ObjFaninL(pObj, i); - return nSum; -} - -/**Function************************************************************* - - Synopsis [Generates the printable edge label with the initial state.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -char * Seq_ObjFaninGetInitPrintable( Abc_Obj_t * pObj, int Edge ) -{ - static char Buffer[1000]; - Abc_InitType_t Init; - int nLatches, i; - nLatches = Seq_ObjFaninL( pObj, Edge ); - for ( i = 0; i < nLatches; i++ ) - { - Init = Seq_LatInit( Seq_NodeGetLat(pObj, Edge, i) ); - if ( Init == ABC_INIT_NONE ) - Buffer[i] = '_'; - else if ( Init == ABC_INIT_ZERO ) - Buffer[i] = '0'; - else if ( Init == ABC_INIT_ONE ) - Buffer[i] = '1'; - else if ( Init == ABC_INIT_DC ) - Buffer[i] = 'x'; - else assert( 0 ); - } - Buffer[nLatches] = 0; - return Buffer; -} - -/**Function************************************************************* - - Synopsis [Sets the given value to all the latches of the edge.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NodeLatchSetValues( Abc_Obj_t * pObj, int Edge, Abc_InitType_t Init ) -{ - Seq_Lat_t * pLat, * pRing; - int c; - pRing = Seq_NodeGetRing(pObj, Edge); - if ( pRing == NULL ) - return; - for ( c = 0, pLat = pRing; !c || pLat != pRing; c++, pLat = pLat->pNext ) - Seq_LatSetInit( pLat, Init ); -} - -/**Function************************************************************* - - Synopsis [Sets the given value to all the latches of the edge.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkLatchSetValues( Abc_Ntk_t * pNtk, Abc_InitType_t Init ) -{ - Abc_Obj_t * pObj; - int i; - assert( Abc_NtkIsSeq( pNtk ) ); - Abc_NtkForEachPo( pNtk, pObj, i ) - Seq_NodeLatchSetValues( pObj, 0, Init ); - Abc_NtkForEachNode( pNtk, pObj, i ) - { - Seq_NodeLatchSetValues( pObj, 0, Init ); - Seq_NodeLatchSetValues( pObj, 1, Init ); - } -} - - -/**Function************************************************************* - - Synopsis [Counts the number of latches in the sequential AIG.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkLatchNum( Abc_Ntk_t * pNtk ) -{ - Abc_Obj_t * pObj; - int i, Counter; - assert( Abc_NtkIsSeq( pNtk ) ); - Counter = 0; - Abc_NtkForEachNode( pNtk, pObj, i ) - Counter += Seq_ObjFaninLSum( pObj ); - Abc_NtkForEachPo( pNtk, pObj, i ) - Counter += Seq_ObjFaninLSum( pObj ); - return Counter; -} - -/**Function************************************************************* - - Synopsis [Counts the number of latches in the sequential AIG.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkLatchNumMax( Abc_Ntk_t * pNtk ) -{ - Abc_Obj_t * pObj; - int i, Max, Cur; - assert( Abc_NtkIsSeq( pNtk ) ); - Max = 0; - Abc_AigForEachAnd( pNtk, pObj, i ) - { - Cur = Seq_ObjFaninLMax( pObj ); - if ( Max < Cur ) - Max = Cur; - } - Abc_NtkForEachPo( pNtk, pObj, i ) - { - Cur = Seq_ObjFaninL0( pObj ); - if ( Max < Cur ) - Max = Cur; - } - return Max; -} - -/**Function************************************************************* - - Synopsis [Counts the number of latches in the sequential AIG.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkLatchNumShared( Abc_Ntk_t * pNtk ) -{ - Abc_Obj_t * pObj; - int i, Counter; - assert( Abc_NtkIsSeq( pNtk ) ); - Counter = 0; - Abc_NtkForEachPi( pNtk, pObj, i ) - Counter += Seq_ObjFanoutLMax( pObj ); - Abc_NtkForEachNode( pNtk, pObj, i ) - Counter += Seq_ObjFanoutLMax( pObj ); - return Counter; -} - -/**Function************************************************************* - - Synopsis [Counts the number of latches in the sequential AIG.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_ObjLatchGetInitNums( Abc_Obj_t * pObj, int Edge, int * pInits ) -{ - Abc_InitType_t Init; - int nLatches, i; - nLatches = Seq_ObjFaninL( pObj, Edge ); - for ( i = 0; i < nLatches; i++ ) - { - Init = Seq_NodeGetInitOne( pObj, Edge, i ); - pInits[Init]++; - } -} - -/**Function************************************************************* - - Synopsis [Counts the number of latches in the sequential AIG.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkLatchGetInitNums( Abc_Ntk_t * pNtk, int * pInits ) -{ - Abc_Obj_t * pObj; - int i; - assert( Abc_NtkIsSeq( pNtk ) ); - for ( i = 0; i < 4; i++ ) - pInits[i] = 0; - Abc_NtkForEachPo( pNtk, pObj, i ) - Seq_ObjLatchGetInitNums( pObj, 0, pInits ); - Abc_NtkForEachNode( pNtk, pObj, i ) - { - if ( Abc_ObjFaninNum(pObj) > 0 ) - Seq_ObjLatchGetInitNums( pObj, 0, pInits ); - if ( Abc_ObjFaninNum(pObj) > 1 ) - Seq_ObjLatchGetInitNums( pObj, 1, pInits ); - } -} - -/**Function************************************************************* - - Synopsis [Report nodes with equal fanins.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkLatchGetEqualFaninNum( Abc_Ntk_t * pNtk ) -{ - Abc_Obj_t * pObj; - int i, Counter; - assert( Abc_NtkIsSeq( pNtk ) ); - Counter = 0; - Abc_AigForEachAnd( pNtk, pObj, i ) - if ( Abc_ObjFaninId0(pObj) == Abc_ObjFaninId1(pObj) ) - Counter++; - if ( Counter ) - printf( "The number of nodes with equal fanins = %d.\n", Counter ); - return Counter; -} - -/**Function************************************************************* - - Synopsis [Returns the maximum latch number on any of the fanouts.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkCountNodesAboveLimit( Abc_Ntk_t * pNtk, int Limit ) -{ - Abc_Obj_t * pNode; - int i, Counter; - assert( !Abc_NtkIsSeq(pNtk) ); - Counter = 0; - Abc_NtkForEachNode( pNtk, pNode, i ) - if ( Abc_ObjFaninNum(pNode) > Limit ) - Counter++; - return Counter; -} - -/**Function************************************************************* - - Synopsis [Computes area flows.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_MapComputeAreaFlows( Abc_Ntk_t * pNtk, int fVerbose ) -{ - Abc_Seq_t * p = pNtk->pManFunc; - Abc_Obj_t * pObj; - float AFlow; - int i, c; - - assert( Abc_NtkIsSeq(pNtk) ); - - Vec_IntFill( p->vAFlows, p->nSize, Abc_Float2Int( (float)0.0 ) ); - - // update all values iteratively - for ( c = 0; c < 7; c++ ) - { - Abc_AigForEachAnd( pNtk, pObj, i ) - { - AFlow = (float)1.0 + Seq_NodeGetFlow( Abc_ObjFanin0(pObj) ) + Seq_NodeGetFlow( Abc_ObjFanin1(pObj) ); - AFlow /= Abc_ObjFanoutNum(pObj); - pObj->pNext = (void *)Abc_Float2Int( AFlow ); - } - Abc_AigForEachAnd( pNtk, pObj, i ) - { - AFlow = Abc_Int2Float( (int)pObj->pNext ); - pObj->pNext = NULL; - Seq_NodeSetFlow( pObj, AFlow ); - -// printf( "%5d : %6.1f\n", pObj->Id, Seq_NodeGetFlow(pObj) ); - } -// printf( "\n" ); - } - return 1; -} - - -/**Function************************************************************* - - Synopsis [Collects all the internal nodes reachable from POs.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkReachNodesFromPos_rec( Abc_Obj_t * pAnd, Vec_Ptr_t * vNodes ) -{ - // skip if this is a non-PI node - if ( !Abc_AigNodeIsAnd(pAnd) ) - return; - // skip a visited node - if ( Abc_NodeIsTravIdCurrent(pAnd) ) - return; - Abc_NodeSetTravIdCurrent(pAnd); - // visit the fanin nodes - Seq_NtkReachNodesFromPos_rec( Abc_ObjFanin0(pAnd), vNodes ); - Seq_NtkReachNodesFromPos_rec( Abc_ObjFanin1(pAnd), vNodes ); - // add this node - Vec_PtrPush( vNodes, pAnd ); -} - -/**Function************************************************************* - - Synopsis [Collects all the internal nodes reachable from POs.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Seq_NtkReachNodesFromPis_rec( Abc_Obj_t * pAnd, Vec_Ptr_t * vNodes ) -{ - Abc_Obj_t * pFanout; - int k; - // skip if this is a non-PI node - if ( !Abc_AigNodeIsAnd(pAnd) ) - return; - // skip a visited node - if ( Abc_NodeIsTravIdCurrent(pAnd) ) - return; - Abc_NodeSetTravIdCurrent(pAnd); - // visit the fanin nodes - Abc_ObjForEachFanout( pAnd, pFanout, k ) - Seq_NtkReachNodesFromPis_rec( pFanout, vNodes ); - // add this node - Vec_PtrPush( vNodes, pAnd ); -} - -/**Function************************************************************* - - Synopsis [Collects all the internal nodes reachable from POs.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -Vec_Ptr_t * Seq_NtkReachNodes( Abc_Ntk_t * pNtk, int fFromPos ) -{ - Vec_Ptr_t * vNodes; - Abc_Obj_t * pObj, * pFanout; - int i, k; - assert( Abc_NtkIsSeq(pNtk) ); - vNodes = Vec_PtrAlloc( 1000 ); - Abc_NtkIncrementTravId( pNtk ); - if ( fFromPos ) - { - // traverse the cone of each PO - Abc_NtkForEachPo( pNtk, pObj, i ) - Seq_NtkReachNodesFromPos_rec( Abc_ObjFanin0(pObj), vNodes ); - } - else - { - // tranvers the reverse cone of the constant node - pObj = Abc_AigConst1( pNtk ); - Abc_ObjForEachFanout( pObj, pFanout, k ) - Seq_NtkReachNodesFromPis_rec( pFanout, vNodes ); - // tranvers the reverse cone of the PIs - Abc_NtkForEachPi( pNtk, pObj, i ) - Abc_ObjForEachFanout( pObj, pFanout, k ) - Seq_NtkReachNodesFromPis_rec( pFanout, vNodes ); - } - return vNodes; -} - -/**Function************************************************************* - - Synopsis [Perform sequential cleanup.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -int Seq_NtkCleanup( Abc_Ntk_t * pNtk, int fVerbose ) -{ - Vec_Ptr_t * vNodesPo, * vNodesPi; - int Counter = 0; - assert( Abc_NtkIsSeq(pNtk) ); - // collect the nodes reachable from POs and PIs - vNodesPo = Seq_NtkReachNodes( pNtk, 1 ); - vNodesPi = Seq_NtkReachNodes( pNtk, 0 ); - printf( "Total nodes = %6d. Reachable from POs = %6d. Reachable from PIs = %6d.\n", - Abc_NtkNodeNum(pNtk), Vec_PtrSize(vNodesPo), Vec_PtrSize(vNodesPi) ); - if ( Abc_NtkNodeNum(pNtk) > Vec_PtrSize(vNodesPo) ) - { -// Counter = Abc_NtkReduceNodes( pNtk, vNodesPo ); - Counter = 0; - if ( fVerbose ) - printf( "Cleanup removed %d nodes that are not reachable from the POs.\n", Counter ); - } - Vec_PtrFree( vNodesPo ); - Vec_PtrFree( vNodesPi ); - return Counter; -} - -//////////////////////////////////////////////////////////////////////// -/// END OF FILE /// -//////////////////////////////////////////////////////////////////////// - - -ABC_NAMESPACE_IMPL_END - diff --git a/src/base/test/test.c b/src/base/test/test.c index f603befd..92094d9a 100644 --- a/src/base/test/test.c +++ b/src/base/test/test.c @@ -18,7 +18,7 @@ ***********************************************************************/ -#include "main.h" +#include "src/base/main/main.h" ABC_NAMESPACE_IMPL_START diff --git a/src/base/ver/ver.h b/src/base/ver/ver.h index e421ff95..8c9d6e00 100644 --- a/src/base/ver/ver.h +++ b/src/base/ver/ver.h @@ -18,8 +18,8 @@ ***********************************************************************/ -#ifndef __VER_H__ -#define __VER_H__ +#ifndef ABC__base__ver__ver_h +#define ABC__base__ver__ver_h //////////////////////////////////////////////////////////////////////// @@ -27,8 +27,7 @@ //////////////////////////////////////////////////////////////////////// #include <stdio.h> -#include "abc.h" -#include "extra.h" +#include "src/base/abc/abc.h" //////////////////////////////////////////////////////////////////////// /// PARAMETERS /// diff --git a/src/base/ver/verCore.c b/src/base/ver/verCore.c index d2744402..1a924c31 100644 --- a/src/base/ver/verCore.c +++ b/src/base/ver/verCore.c @@ -19,8 +19,8 @@ ***********************************************************************/ #include "ver.h" -#include "mio.h" -#include "main.h" +#include "src/map/mio/mio.h" +#include "src/base/main/main.h" ABC_NAMESPACE_IMPL_START |