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-rw-r--r--src/opt/res/res.h16
-rw-r--r--src/opt/res/resCore.c17
-rw-r--r--src/opt/res/resDivs.c15
-rw-r--r--src/opt/res/resFilter.c27
-rw-r--r--src/opt/res/resInt.h16
-rw-r--r--src/opt/res/resSat.c49
-rw-r--r--src/opt/res/resSim.c59
-rw-r--r--src/opt/res/resSim_old.c9
-rw-r--r--src/opt/res/resStrash.c21
-rw-r--r--src/opt/res/resWin.c21
-rw-r--r--src/opt/res/res_.c5
11 files changed, 154 insertions, 101 deletions
diff --git a/src/opt/res/res.h b/src/opt/res/res.h
index 88d985a3..bd328d54 100644
--- a/src/opt/res/res.h
+++ b/src/opt/res/res.h
@@ -21,6 +21,7 @@
#ifndef __RES_H__
#define __RES_H__
+
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@@ -29,9 +30,10 @@
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
-#ifdef __cplusplus
-extern "C" {
-#endif
+
+
+ABC_NAMESPACE_HEADER_START
+
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
@@ -63,9 +65,11 @@ struct Res_Par_t_
extern int Abc_NtkResynthesize( Abc_Ntk_t * pNtk, Res_Par_t * pPars );
-#ifdef __cplusplus
-}
-#endif
+
+
+ABC_NAMESPACE_HEADER_END
+
+
#endif
diff --git a/src/opt/res/resCore.c b/src/opt/res/resCore.c
index cce3b48a..c27b3874 100644
--- a/src/opt/res/resCore.c
+++ b/src/opt/res/resCore.c
@@ -23,6 +23,9 @@
#include "kit.h"
#include "satStore.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -187,7 +190,7 @@ void Res_UpdateNetwork( Abc_Obj_t * pObj, Vec_Ptr_t * vFanins, Hop_Obj_t * pFunc
// create the new node
pObjNew = Abc_NtkCreateNode( pObj->pNtk );
pObjNew->pData = pFunc;
- Vec_PtrForEachEntry( vFanins, pFanin, k )
+ Vec_PtrForEachEntry( Abc_Obj_t *, vFanins, pFanin, k )
Abc_ObjAddFanin( pObjNew, pFanin );
// replace the old node by the new node
//printf( "Replacing node " ); Abc_ObjPrint( stdout, pObj );
@@ -316,8 +319,8 @@ p->timeSim += clock() - clk;
{
p->nConstsUsed++;
- pFunc = p->pSim->fConst1? Hop_ManConst1(pNtk->pManFunc) : Hop_ManConst0(pNtk->pManFunc);
- vFanins = Vec_VecEntry( p->vResubsW, 0 );
+ pFunc = p->pSim->fConst1? Hop_ManConst1((Hop_Man_t *)pNtk->pManFunc) : Hop_ManConst0((Hop_Man_t *)pNtk->pManFunc);
+ vFanins = (Vec_Ptr_t *)Vec_VecEntry( p->vResubsW, 0 );
Vec_PtrClear( vFanins );
Res_UpdateNetwork( pObj, vFanins, pFunc, p->vLevels );
continue;
@@ -349,7 +352,7 @@ p->timeCand += clock() - clk;
// solve the SAT problem and get clauses
clk = clock();
if ( p->pCnf ) Sto_ManFree( p->pCnf );
- p->pCnf = Res_SatProveUnsat( p->pAig, vFanins );
+ p->pCnf = (Sto_Man_t *)Res_SatProveUnsat( p->pAig, vFanins );
if ( p->pCnf == NULL )
{
p->timeSatSat += clock() - clk;
@@ -381,12 +384,12 @@ p->timeInt += clock() - clk;
pGraph = Kit_TruthToGraph( puTruth, nFanins, p->vMem );
// derive the AIG for the decomposition tree
- pFunc = Kit_GraphToHop( pNtk->pManFunc, pGraph );
+ pFunc = Kit_GraphToHop( (Hop_Man_t *)pNtk->pManFunc, pGraph );
Kit_GraphFree( pGraph );
// update the network
clk = clock();
- Res_UpdateNetwork( pObj, Vec_VecEntry(p->vResubsW, k), pFunc, p->vLevels );
+ Res_UpdateNetwork( pObj, (Vec_Ptr_t *)Vec_VecEntry(p->vResubsW, k), pFunc, p->vLevels );
p->timeUpd += clock() - clk;
break;
}
@@ -420,3 +423,5 @@ s_ResynTime += clock() - clkTotal;
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/res/resDivs.c b/src/opt/res/resDivs.c
index f6c8a801..6d9ffd9f 100644
--- a/src/opt/res/resDivs.c
+++ b/src/opt/res/resDivs.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "resInt.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -70,7 +73,7 @@ void Res_WinDivisors( Res_Win_t * p, int nLevDivMax )
// start collecting the divisors
Vec_PtrClear( p->vDivs );
- Vec_PtrForEachEntry( p->vLeaves, pObj, k )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vLeaves, pObj, k )
{
assert( (int)pObj->Level >= p->nLevLeafMin );
if ( !Abc_NodeIsTravIdPrevious(pObj) )
@@ -80,7 +83,7 @@ void Res_WinDivisors( Res_Win_t * p, int nLevDivMax )
Vec_PtrPush( p->vDivs, pObj );
}
// add the internal nodes to the data structure
- Vec_PtrForEachEntry( p->vNodes, pObj, k )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vNodes, pObj, k )
{
if ( !Abc_NodeIsTravIdPrevious(pObj) )
continue;
@@ -91,7 +94,7 @@ void Res_WinDivisors( Res_Win_t * p, int nLevDivMax )
// explore the fanouts of already collected divisors
p->nDivsPlus = 0;
- Vec_PtrForEachEntry( p->vDivs, pObj, k )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vDivs, pObj, k )
{
// consider fanouts of this node
Abc_ObjForEachFanout( pObj, pFanout, f )
@@ -126,7 +129,7 @@ void Res_WinDivisors( Res_Win_t * p, int nLevDivMax )
}
/*
printf( "Node level = %d. ", Abc_ObjLevel(p->pNode) );
- Vec_PtrForEachEntryStart( p->vDivs, pObj, k, Vec_PtrSize(p->vDivs)-p->nDivsPlus )
+ Vec_PtrForEachEntryStart( Abc_Obj_t *, p->vDivs, pObj, k, Vec_PtrSize(p->vDivs)-p->nDivsPlus )
printf( "%d ", Abc_ObjLevel(pObj) );
printf( "\n" );
*/
@@ -173,7 +176,7 @@ void Res_WinMarkTfi( Res_Win_t * p )
Abc_Obj_t * pObj;
int i;
// mark the leaves
- Vec_PtrForEachEntry( p->vLeaves, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vLeaves, pObj, i )
Abc_NodeSetTravIdCurrent( pObj );
// start from the node
Res_WinMarkTfi_rec( p, p->pNode );
@@ -283,3 +286,5 @@ int Res_WinVisitMffc( Abc_Obj_t * pNode )
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/res/resFilter.c b/src/opt/res/resFilter.c
index f2ca41d3..b9d62dd8 100644
--- a/src/opt/res/resFilter.c
+++ b/src/opt/res/resFilter.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "resInt.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -50,7 +53,7 @@ int Res_FilterCandidates( Res_Win_t * pWin, Abc_Ntk_t * pAig, Res_Sim_t * pSim,
int Counter, RetValue, i, i2, d, d2, iDiv, iDiv2, k;
// check that the info the node is one
- pInfo = Vec_PtrEntry( pSim->vOuts, 1 );
+ pInfo = (unsigned *)Vec_PtrEntry( pSim->vOuts, 1 );
RetValue = Abc_InfoIsOne( pInfo, pSim->nWordsOut );
if ( RetValue == 0 )
{
@@ -109,7 +112,7 @@ int Res_FilterCandidates( Res_Win_t * pWin, Abc_Ntk_t * pAig, Res_Sim_t * pSim,
// go over the set of divisors
for ( d = Abc_ObjFaninNum(pWin->pNode) + 2; d < Abc_NtkPoNum(pAig); d++ )
{
- pInfoDiv = Vec_PtrEntry( pSim->vOuts, d );
+ pInfoDiv = (unsigned *)Vec_PtrEntry( pSim->vOuts, d );
iDiv = d - (Abc_ObjFaninNum(pWin->pNode) + 2);
if ( !Abc_InfoIsOrOne( pInfo, pInfoDiv, pSim->nWordsOut ) )
continue;
@@ -147,12 +150,12 @@ int Res_FilterCandidates( Res_Win_t * pWin, Abc_Ntk_t * pAig, Res_Sim_t * pSim,
// go over the set of divisors
for ( d = Abc_ObjFaninNum(pWin->pNode) + 2; d < Abc_NtkPoNum(pAig); d++ )
{
- pInfoDiv = Vec_PtrEntry( pSim->vOuts, d );
+ pInfoDiv = (unsigned *)Vec_PtrEntry( pSim->vOuts, d );
iDiv = d - (Abc_ObjFaninNum(pWin->pNode) + 2);
// go through the second divisor
for ( d2 = d + 1; d2 < Abc_NtkPoNum(pAig); d2++ )
{
- pInfoDiv2 = Vec_PtrEntry( pSim->vOuts, d2 );
+ pInfoDiv2 = (unsigned *)Vec_PtrEntry( pSim->vOuts, d2 );
iDiv2 = d2 - (Abc_ObjFaninNum(pWin->pNode) + 2);
if ( !Abc_InfoIsOrOne3( pInfo, pInfoDiv, pInfoDiv2, pSim->nWordsOut ) )
continue;
@@ -194,7 +197,7 @@ int Res_FilterCandidates( Res_Win_t * pWin, Abc_Ntk_t * pAig, Res_Sim_t * pSim,
// go over the set of divisors
for ( d = Abc_ObjFaninNum(pWin->pNode) + 2; d < Abc_NtkPoNum(pAig); d++ )
{
- pInfoDiv = Vec_PtrEntry( pSim->vOuts, d );
+ pInfoDiv = (unsigned *)Vec_PtrEntry( pSim->vOuts, d );
iDiv = d - (Abc_ObjFaninNum(pWin->pNode) + 2);
if ( !Abc_InfoIsOrOne( pInfo, pInfoDiv, pSim->nWordsOut ) )
continue;
@@ -242,7 +245,7 @@ int Res_FilterCandidatesArea( Res_Win_t * pWin, Abc_Ntk_t * pAig, Res_Sim_t * pS
int Counter, RetValue, d, d2, k, iDiv, iDiv2, iBest;
// check that the info the node is one
- pInfo = Vec_PtrEntry( pSim->vOuts, 1 );
+ pInfo = (unsigned *)Vec_PtrEntry( pSim->vOuts, 1 );
RetValue = Abc_InfoIsOne( pInfo, pSim->nWordsOut );
if ( RetValue == 0 )
{
@@ -294,7 +297,7 @@ int Res_FilterCandidatesArea( Res_Win_t * pWin, Abc_Ntk_t * pAig, Res_Sim_t * pS
// go through the divisors
for ( d = Abc_ObjFaninNum(pWin->pNode) + 2; d < Abc_NtkPoNum(pAig); d++ )
{
- pInfoDiv = Vec_PtrEntry( pSim->vOuts, d );
+ pInfoDiv = (unsigned *)Vec_PtrEntry( pSim->vOuts, d );
iDiv = d - (Abc_ObjFaninNum(pWin->pNode) + 2);
if ( !Abc_InfoIsOrOne( pInfo, pInfoDiv, pSim->nWordsOut ) )
continue;
@@ -327,12 +330,12 @@ int Res_FilterCandidatesArea( Res_Win_t * pWin, Abc_Ntk_t * pAig, Res_Sim_t * pS
// try to find the node pairs
for ( d = Abc_ObjFaninNum(pWin->pNode) + 2; d < Abc_NtkPoNum(pAig); d++ )
{
- pInfoDiv = Vec_PtrEntry( pSim->vOuts, d );
+ pInfoDiv = (unsigned *)Vec_PtrEntry( pSim->vOuts, d );
iDiv = d - (Abc_ObjFaninNum(pWin->pNode) + 2);
// go through the second divisor
for ( d2 = d + 1; d2 < Abc_NtkPoNum(pAig); d2++ )
{
- pInfoDiv2 = Vec_PtrEntry( pSim->vOuts, d2 );
+ pInfoDiv2 = (unsigned *)Vec_PtrEntry( pSim->vOuts, d2 );
iDiv2 = d2 - (Abc_ObjFaninNum(pWin->pNode) + 2);
if ( !Abc_InfoIsOrOne3( pInfo, pInfoDiv, pInfoDiv2, pSim->nWordsOut ) )
@@ -382,12 +385,12 @@ unsigned * Res_FilterCollectFaninInfo( Res_Win_t * pWin, Res_Sim_t * pSim, unsig
Abc_Obj_t * pFanin;
unsigned * pInfo;
int i;
- pInfo = Vec_PtrEntry( pSim->vOuts, 0 );
+ pInfo = (unsigned *)Vec_PtrEntry( pSim->vOuts, 0 );
Abc_InfoClear( pInfo, pSim->nWordsOut );
Abc_ObjForEachFanin( pWin->pNode, pFanin, i )
{
if ( uMask & (1 << i) )
- Abc_InfoOr( pInfo, Vec_PtrEntry(pSim->vOuts, 2+i), pSim->nWordsOut );
+ Abc_InfoOr( pInfo, (unsigned *)Vec_PtrEntry(pSim->vOuts, 2+i), pSim->nWordsOut );
}
return pInfo;
}
@@ -432,3 +435,5 @@ int Res_FilterCriticalFanin( Abc_Obj_t * pNode )
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/res/resInt.h b/src/opt/res/resInt.h
index 172b5369..ae238359 100644
--- a/src/opt/res/resInt.h
+++ b/src/opt/res/resInt.h
@@ -21,6 +21,7 @@
#ifndef __RES_INT_H__
#define __RES_INT_H__
+
////////////////////////////////////////////////////////////////////////
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
@@ -31,9 +32,10 @@
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
-#ifdef __cplusplus
-extern "C" {
-#endif
+
+
+ABC_NAMESPACE_HEADER_START
+
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
@@ -125,9 +127,11 @@ extern int Res_WinIsTrivial( Res_Win_t * p );
extern int Res_WinCompute( Abc_Obj_t * pNode, int nWinTfiMax, int nWinTfoMax, Res_Win_t * p );
-#ifdef __cplusplus
-}
-#endif
+
+
+ABC_NAMESPACE_HEADER_END
+
+
#endif
diff --git a/src/opt/res/resSat.c b/src/opt/res/resSat.c
index d5983942..a17f92fa 100644
--- a/src/opt/res/resSat.c
+++ b/src/opt/res/resSat.c
@@ -23,6 +23,9 @@
#include "hop.h"
#include "satSolver.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -55,7 +58,7 @@ void * Res_SatProveUnsat( Abc_Ntk_t * pAig, Vec_Ptr_t * vFanins )
int i, nNodes, status;
// make sure fanins contain POs of the AIG
- pObj = Vec_PtrEntry( vFanins, 0 );
+ pObj = (Abc_Obj_t *)Vec_PtrEntry( vFanins, 0 );
assert( pObj->pNtk == pAig && Abc_ObjIsPo(pObj) );
// collect reachable nodes
@@ -63,13 +66,13 @@ void * Res_SatProveUnsat( Abc_Ntk_t * pAig, Vec_Ptr_t * vFanins )
// assign unique numbers to each node
nNodes = 0;
- Abc_AigConst1(pAig)->pCopy = (void *)(ABC_PTRUINT_T)nNodes++;
+ Abc_AigConst1(pAig)->pCopy = (Abc_Obj_t *)(ABC_PTRUINT_T)nNodes++;
Abc_NtkForEachPi( pAig, pObj, i )
- pObj->pCopy = (void *)(ABC_PTRUINT_T)nNodes++;
- Vec_PtrForEachEntry( vNodes, pObj, i )
- pObj->pCopy = (void *)(ABC_PTRUINT_T)nNodes++;
- Vec_PtrForEachEntry( vFanins, pObj, i ) // useful POs
- pObj->pCopy = (void *)(ABC_PTRUINT_T)nNodes++;
+ pObj->pCopy = (Abc_Obj_t *)(ABC_PTRUINT_T)nNodes++;
+ Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i )
+ pObj->pCopy = (Abc_Obj_t *)(ABC_PTRUINT_T)nNodes++;
+ Vec_PtrForEachEntry( Abc_Obj_t *, vFanins, pObj, i ) // useful POs
+ pObj->pCopy = (Abc_Obj_t *)(ABC_PTRUINT_T)nNodes++;
// start the solver
pSat = sat_solver_new();
@@ -78,28 +81,28 @@ void * Res_SatProveUnsat( Abc_Ntk_t * pAig, Vec_Ptr_t * vFanins )
// add clause for the constant node
Res_SatAddConst1( pSat, (int)(ABC_PTRUINT_T)Abc_AigConst1(pAig)->pCopy, 0 );
// add clauses for AND gates
- Vec_PtrForEachEntry( vNodes, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i )
Res_SatAddAnd( pSat, (int)(ABC_PTRUINT_T)pObj->pCopy,
(int)(ABC_PTRUINT_T)Abc_ObjFanin0(pObj)->pCopy, (int)(ABC_PTRUINT_T)Abc_ObjFanin1(pObj)->pCopy, Abc_ObjFaninC0(pObj), Abc_ObjFaninC1(pObj) );
Vec_PtrFree( vNodes );
// add clauses for POs
- Vec_PtrForEachEntry( vFanins, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, vFanins, pObj, i )
Res_SatAddEqual( pSat, (int)(ABC_PTRUINT_T)pObj->pCopy,
(int)(ABC_PTRUINT_T)Abc_ObjFanin0(pObj)->pCopy, Abc_ObjFaninC0(pObj) );
// add trivial clauses
- pObj = Vec_PtrEntry(vFanins, 0);
+ pObj = (Abc_Obj_t *)Vec_PtrEntry(vFanins, 0);
Res_SatAddConst1( pSat, (int)(ABC_PTRUINT_T)pObj->pCopy, 0 ); // care-set
- pObj = Vec_PtrEntry(vFanins, 1);
+ pObj = (Abc_Obj_t *)Vec_PtrEntry(vFanins, 1);
Res_SatAddConst1( pSat, (int)(ABC_PTRUINT_T)pObj->pCopy, 0 ); // on-set
// bookmark the clauses of A
sat_solver_store_mark_clauses_a( pSat );
// duplicate the clauses
- pObj = Vec_PtrEntry(vFanins, 1);
+ pObj = (Abc_Obj_t *)Vec_PtrEntry(vFanins, 1);
Sat_SolverDoubleClauses( pSat, (int)(ABC_PTRUINT_T)pObj->pCopy );
// add the equality constraints
- Vec_PtrForEachEntryStart( vFanins, pObj, i, 2 )
+ Vec_PtrForEachEntryStart( Abc_Obj_t *, vFanins, pObj, i, 2 )
Res_SatAddEqual( pSat, (int)(ABC_PTRUINT_T)pObj->pCopy, ((int)(ABC_PTRUINT_T)pObj->pCopy) + nNodes, 0 );
// bookmark the roots
@@ -155,13 +158,13 @@ void * Res_SatSimulateConstr( Abc_Ntk_t * pAig, int fOnSet )
// assign unique numbers to each node
nNodes = 0;
- Abc_AigConst1(pAig)->pCopy = (void *)(ABC_PTRUINT_T)nNodes++;
+ Abc_AigConst1(pAig)->pCopy = (Abc_Obj_t *)(ABC_PTRUINT_T)nNodes++;
Abc_NtkForEachPi( pAig, pObj, i )
- pObj->pCopy = (void *)(ABC_PTRUINT_T)nNodes++;
- Vec_PtrForEachEntry( vNodes, pObj, i )
- pObj->pCopy = (void *)(ABC_PTRUINT_T)nNodes++;
- Vec_PtrForEachEntry( vFanins, pObj, i ) // useful POs
- pObj->pCopy = (void *)(ABC_PTRUINT_T)nNodes++;
+ pObj->pCopy = (Abc_Obj_t *)(ABC_PTRUINT_T)nNodes++;
+ Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i )
+ pObj->pCopy = (Abc_Obj_t *)(ABC_PTRUINT_T)nNodes++;
+ Vec_PtrForEachEntry( Abc_Obj_t *, vFanins, pObj, i ) // useful POs
+ pObj->pCopy = (Abc_Obj_t *)(ABC_PTRUINT_T)nNodes++;
// start the solver
pSat = sat_solver_new();
@@ -169,7 +172,7 @@ void * Res_SatSimulateConstr( Abc_Ntk_t * pAig, int fOnSet )
// add clause for the constant node
Res_SatAddConst1( pSat, (int)(ABC_PTRUINT_T)Abc_AigConst1(pAig)->pCopy, 0 );
// add clauses for AND gates
- Vec_PtrForEachEntry( vNodes, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i )
Res_SatAddAnd( pSat, (int)(ABC_PTRUINT_T)pObj->pCopy,
(int)(ABC_PTRUINT_T)Abc_ObjFanin0(pObj)->pCopy, (int)(ABC_PTRUINT_T)Abc_ObjFanin1(pObj)->pCopy, Abc_ObjFaninC0(pObj), Abc_ObjFaninC1(pObj) );
Vec_PtrFree( vNodes );
@@ -232,7 +235,7 @@ int Res_SatSimulate( Res_Sim_t * p, int nPatsLimit, int fOnSet )
assert( iPat < nPatsLimit );
// derive the SAT solver
- pSat = Res_SatSimulateConstr( p->pAig, fOnSet );
+ pSat = (sat_solver *)Res_SatSimulateConstr( p->pAig, fOnSet );
pSat->fSkipSimplify = 1;
status = sat_solver_simplify( pSat );
if ( status == 0 )
@@ -278,7 +281,7 @@ int Res_SatSimulate( Res_Sim_t * p, int nPatsLimit, int fOnSet )
Var = (int)(ABC_PTRUINT_T)Abc_NtkPi(p->pAig,i)->pCopy;
value = (int)(pSat->model.ptr[Var] == l_True);
if ( value )
- Abc_InfoSetBit( Vec_PtrEntry(vPats, i), k );
+ Abc_InfoSetBit( (unsigned *)Vec_PtrEntry(vPats, i), k );
Lit = toLitCond( Var, value );
Vec_IntPush( vLits, Lit );
// printf( "%d", value );
@@ -406,3 +409,5 @@ int Res_SatAddAnd( sat_solver * pSat, int iVar, int iVar0, int iVar1, int fCompl
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/res/resSim.c b/src/opt/res/resSim.c
index 59b2b6ea..560acc43 100644
--- a/src/opt/res/resSim.c
+++ b/src/opt/res/resSim.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "resInt.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -102,8 +105,8 @@ void Res_SimAdjust( Res_Sim_t * p, Abc_Ntk_t * pAig, int nTruePis )
p->vOuts = Vec_PtrAllocSimInfo( Abc_NtkPoNum(pAig), p->nWordsOut );
}
// clean storage info for patterns
- Abc_InfoClear( Vec_PtrEntry(p->vPats0,0), p->nWords * nTruePis );
- Abc_InfoClear( Vec_PtrEntry(p->vPats1,0), p->nWords * nTruePis );
+ Abc_InfoClear( (unsigned *)Vec_PtrEntry(p->vPats0,0), p->nWords * nTruePis );
+ Abc_InfoClear( (unsigned *)Vec_PtrEntry(p->vPats1,0), p->nWords * nTruePis );
p->nPats0 = 0;
p->nPats1 = 0;
p->fConst0 = 0;
@@ -175,7 +178,7 @@ void Res_SimSetRandomBytes( Res_Sim_t * p )
int i;
Abc_NtkForEachPi( p->pAig, pObj, i )
{
- pInfo = Vec_PtrEntry( p->vPats, pObj->Id );
+ pInfo = (unsigned *)Vec_PtrEntry( p->vPats, pObj->Id );
if ( i < p->nTruePis )
Abc_InfoRandomBytes( pInfo, p->nWordsIn );
else
@@ -220,7 +223,7 @@ void Res_SimSetDerivedBytes( Res_Sim_t * p, int fUseWalk )
{
if ( i == p->nTruePis )
break;
- Abc_InfoRandomBytes( Vec_PtrEntry(p->vPats, pObj->Id), nPats/4 );
+ Abc_InfoRandomBytes( (unsigned *)Vec_PtrEntry(p->vPats, pObj->Id), nPats/4 );
}
// set special patterns
@@ -283,7 +286,7 @@ void Res_SimSetDerivedBytes( Res_Sim_t * p, int fUseWalk )
if ( i == p->nTruePis )
break;
pInfo = (unsigned char *)Vec_PtrEntry( p->vPats, pObj->Id );
- if ( (i == k) ^ Abc_InfoHasBit( Vec_PtrEntry(vPatsSource[z], i), s ) )
+ if ( (i == k) ^ Abc_InfoHasBit( (unsigned *)Vec_PtrEntry(vPatsSource[z], i), s ) )
{
pInfo[nPats] = 0xff;
// if ( s == 0 )
@@ -347,8 +350,8 @@ void Res_SimSetGiven( Res_Sim_t * p, Vec_Ptr_t * vInfo )
{
if ( i == p->nTruePis )
break;
- pInfo = Vec_PtrEntry( p->vPats, pObj->Id );
- pInfo2 = Vec_PtrEntry( vInfo, i );
+ pInfo = (unsigned *)Vec_PtrEntry( p->vPats, pObj->Id );
+ pInfo2 = (unsigned *)Vec_PtrEntry( vInfo, i );
for ( w = 0; w < p->nWords; w++ )
pInfo[w] = pInfo2[w];
}
@@ -371,9 +374,9 @@ void Res_SimPerformOne( Abc_Obj_t * pNode, Vec_Ptr_t * vSimInfo, int nSimWords )
int k, fComp1, fComp2;
// simulate the internal nodes
assert( Abc_ObjIsNode(pNode) );
- pInfo = Vec_PtrEntry(vSimInfo, pNode->Id);
- pInfo1 = Vec_PtrEntry(vSimInfo, Abc_ObjFaninId0(pNode));
- pInfo2 = Vec_PtrEntry(vSimInfo, Abc_ObjFaninId1(pNode));
+ pInfo = (unsigned *)Vec_PtrEntry(vSimInfo, pNode->Id);
+ pInfo1 = (unsigned *)Vec_PtrEntry(vSimInfo, Abc_ObjFaninId0(pNode));
+ pInfo2 = (unsigned *)Vec_PtrEntry(vSimInfo, Abc_ObjFaninId1(pNode));
fComp1 = Abc_ObjFaninC0(pNode);
fComp2 = Abc_ObjFaninC1(pNode);
if ( fComp1 && fComp2 )
@@ -407,8 +410,8 @@ void Res_SimTransferOne( Abc_Obj_t * pNode, Vec_Ptr_t * vSimInfo, int nSimWords
int k, fComp1;
// simulate the internal nodes
assert( Abc_ObjIsCo(pNode) );
- pInfo = Vec_PtrEntry(vSimInfo, pNode->Id);
- pInfo1 = Vec_PtrEntry(vSimInfo, Abc_ObjFaninId0(pNode));
+ pInfo = (unsigned *)Vec_PtrEntry(vSimInfo, pNode->Id);
+ pInfo1 = (unsigned *)Vec_PtrEntry(vSimInfo, Abc_ObjFaninId0(pNode));
fComp1 = Abc_ObjFaninC0(pNode);
if ( fComp1 )
for ( k = 0; k < nSimWords; k++ )
@@ -433,7 +436,7 @@ void Res_SimPerformRound( Res_Sim_t * p, int nWords )
{
Abc_Obj_t * pObj;
int i;
- Abc_InfoFill( Vec_PtrEntry(p->vPats,0), nWords );
+ Abc_InfoFill( (unsigned *)Vec_PtrEntry(p->vPats,0), nWords );
Abc_AigForEachAnd( p->pAig, pObj, i )
Res_SimPerformOne( pObj, p->vPats, nWords );
Abc_NtkForEachPo( p->pAig, pObj, i )
@@ -460,14 +463,14 @@ void Res_SimPadSimInfo( Vec_Ptr_t * vPats, int nPats, int nWords )
// pad the first word
if ( nPats < 8 * sizeof(unsigned) )
{
- Vec_PtrForEachEntry( vPats, pInfo, i )
+ Vec_PtrForEachEntry( unsigned *, vPats, pInfo, i )
if ( pInfo[0] & 1 )
pInfo[0] |= ((~0) << nPats);
nPats = 8 * sizeof(unsigned);
}
// pad the empty words
iWords = nPats / (8 * sizeof(unsigned));
- Vec_PtrForEachEntry( vPats, pInfo, i )
+ Vec_PtrForEachEntry( unsigned *, vPats, pInfo, i )
{
for ( w = iWords; w < nWords; w++ )
pInfo[w] = pInfo[0];
@@ -492,8 +495,8 @@ void Res_SimDeriveInfoReplicate( Res_Sim_t * p )
int i, j, w;
Abc_NtkForEachPo( p->pAig, pObj, i )
{
- pInfo = Vec_PtrEntry( p->vPats, pObj->Id );
- pInfo2 = Vec_PtrEntry( p->vOuts, i );
+ pInfo = (unsigned *)Vec_PtrEntry( p->vPats, pObj->Id );
+ pInfo2 = (unsigned *)Vec_PtrEntry( p->vOuts, i );
for ( j = 0; j < p->nPats; j++ )
for ( w = 0; w < p->nWords; w++ )
*pInfo2++ = pInfo[w];
@@ -518,8 +521,8 @@ void Res_SimDeriveInfoComplement( Res_Sim_t * p )
int i, j, w;
Abc_NtkForEachPo( p->pAig, pObj, i )
{
- pInfo = Vec_PtrEntry( p->vPats, pObj->Id );
- pInfo2 = Vec_PtrEntry( p->vOuts, i );
+ pInfo = (unsigned *)Vec_PtrEntry( p->vPats, pObj->Id );
+ pInfo2 = (unsigned *)Vec_PtrEntry( p->vOuts, i );
for ( j = 0; j < p->nPats; j++, pInfo2 += p->nWords )
if ( Abc_InfoHasBit( pInfo, j ) )
for ( w = 0; w < p->nWords; w++ )
@@ -545,7 +548,7 @@ void Res_SimPrintOutPatterns( Res_Sim_t * p, Abc_Ntk_t * pAig )
int i;
Abc_NtkForEachPo( pAig, pObj, i )
{
- pInfo2 = Vec_PtrEntry( p->vOuts, i );
+ pInfo2 = (unsigned *)Vec_PtrEntry( p->vOuts, i );
Extra_PrintBinary( stdout, pInfo2, p->nPatsOut );
printf( "\n" );
}
@@ -565,7 +568,7 @@ void Res_SimPrintOutPatterns( Res_Sim_t * p, Abc_Ntk_t * pAig )
void Res_SimPrintNodePatterns( Res_Sim_t * p, Abc_Ntk_t * pAig )
{
unsigned * pInfo;
- pInfo = Vec_PtrEntry( p->vPats, Abc_NtkPo(p->pAig, 1)->Id );
+ pInfo = (unsigned *)Vec_PtrEntry( p->vPats, Abc_NtkPo(p->pAig, 1)->Id );
Extra_PrintBinary( stdout, pInfo, p->nPats );
printf( "\n" );
}
@@ -643,7 +646,7 @@ void Res_SimCollectPatterns( Res_Sim_t * p, int fVerbose )
pInfo = (unsigned char *)Vec_PtrEntry( p->vPats, pObj->Id );
assert( pInfo[i] == 0 || pInfo[i] == 0xff );
if ( pInfo[i] )
- Abc_InfoSetBit( Vec_PtrEntry(p->vPats0, j), p->nPats0 );
+ Abc_InfoSetBit( (unsigned *)Vec_PtrEntry(p->vPats0, j), p->nPats0 );
}
p->nPats0++;
}
@@ -658,7 +661,7 @@ void Res_SimCollectPatterns( Res_Sim_t * p, int fVerbose )
pInfo = (unsigned char *)Vec_PtrEntry( p->vPats, pObj->Id );
assert( pInfo[i] == 0 || pInfo[i] == 0xff );
if ( pInfo[i] )
- Abc_InfoSetBit( Vec_PtrEntry(p->vPats1, j), p->nPats1 );
+ Abc_InfoSetBit( (unsigned *)Vec_PtrEntry(p->vPats1, j), p->nPats1 );
}
p->nPats1++;
}
@@ -696,20 +699,20 @@ int Res_SimVerifyValue( Res_Sim_t * p, int fOnSet )
break;
if ( fOnSet )
{
- pInfo2 = Vec_PtrEntry( p->vPats1, i );
+ pInfo2 = (unsigned *)Vec_PtrEntry( p->vPats1, i );
value = Abc_InfoHasBit( pInfo2, p->nPats1 - 1 );
}
else
{
- pInfo2 = Vec_PtrEntry( p->vPats0, i );
+ pInfo2 = (unsigned *)Vec_PtrEntry( p->vPats0, i );
value = Abc_InfoHasBit( pInfo2, p->nPats0 - 1 );
}
- pInfo = Vec_PtrEntry( p->vPats, pObj->Id );
+ pInfo = (unsigned *)Vec_PtrEntry( p->vPats, pObj->Id );
pInfo[0] = value ? ~0 : 0;
}
Res_SimPerformRound( p, 1 );
pObj = Abc_NtkPo( p->pAig, 1 );
- pInfo = Vec_PtrEntry( p->vPats, pObj->Id );
+ pInfo = (unsigned *)Vec_PtrEntry( p->vPats, pObj->Id );
assert( pInfo[0] == 0 || pInfo[0] == ~0 );
return pInfo[0] > 0;
}
@@ -788,3 +791,5 @@ int Res_SimPrepare( Res_Sim_t * p, Abc_Ntk_t * pAig, int nTruePis, int fVerbose
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/res/resSim_old.c b/src/opt/res/resSim_old.c
index 23ce29e4..ebadeec0 100644
--- a/src/opt/res/resSim_old.c
+++ b/src/opt/res/resSim_old.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "resInt.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -327,14 +330,14 @@ void Res_SimPadSimInfo( Vec_Ptr_t * vPats, int nPats, int nWords )
// pad the first word
if ( nPats < 8 * sizeof(unsigned) )
{
- Vec_PtrForEachEntry( vPats, pInfo, i )
+ Vec_PtrForEachEntry( unsigned *, vPats, pInfo, i )
if ( pInfo[0] & 1 )
pInfo[0] |= ((~0) << nPats);
nPats = 8 * sizeof(unsigned);
}
// pad the empty words
iWords = nPats / (8 * sizeof(unsigned));
- Vec_PtrForEachEntry( vPats, pInfo, i )
+ Vec_PtrForEachEntry( unsigned *, vPats, pInfo, i )
{
for ( w = iWords; w < nWords; w++ )
pInfo[w] = pInfo[0];
@@ -519,3 +522,5 @@ int Res_SimPrepare( Res_Sim_t * p, Abc_Ntk_t * pAig, int nTruePis, int fVerbose
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/res/resStrash.c b/src/opt/res/resStrash.c
index a75b84cc..9740af4c 100644
--- a/src/opt/res/resStrash.c
+++ b/src/opt/res/resStrash.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "resInt.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -55,12 +58,12 @@ Abc_Ntk_t * Res_WndStrash( Res_Win_t * p )
pAig = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG, 1 );
pAig->pName = Extra_UtilStrsav( "window" );
// create the inputs
- Vec_PtrForEachEntry( p->vLeaves, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vLeaves, pObj, i )
pObj->pCopy = Abc_NtkCreatePi( pAig );
- Vec_PtrForEachEntry( p->vBranches, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vBranches, pObj, i )
pObj->pCopy = Abc_NtkCreatePi( pAig );
// go through the nodes in the topological order
- Vec_PtrForEachEntry( p->vNodes, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vNodes, pObj, i )
{
pObj->pCopy = Abc_ConvertAigToAig( pAig, pObj );
if ( pObj == p->pNode )
@@ -68,7 +71,7 @@ Abc_Ntk_t * Res_WndStrash( Res_Win_t * p )
}
// collect the POs
vPairs = Vec_PtrAlloc( 2 * Vec_PtrSize(p->vRoots) );
- Vec_PtrForEachEntry( p->vRoots, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vRoots, pObj, i )
{
Vec_PtrPush( vPairs, pObj->pCopy );
Vec_PtrPush( vPairs, NULL );
@@ -80,16 +83,16 @@ Abc_Ntk_t * Res_WndStrash( Res_Win_t * p )
p->pNode->pCopy = Abc_ObjNot( p->pNode->pCopy );
Abc_NodeSetTravIdPrevious( p->pNode );
// redo strashing in the TFO
- Vec_PtrForEachEntry( p->vNodes, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vNodes, pObj, i )
{
if ( Abc_NodeIsTravIdCurrent(pObj) )
pObj->pCopy = Abc_ConvertAigToAig( pAig, pObj );
}
// collect the POs
- Vec_PtrForEachEntry( p->vRoots, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vRoots, pObj, i )
Vec_PtrWriteEntry( vPairs, 2 * i + 1, pObj->pCopy );
// add the miter
- pMiter = Abc_AigMiter( pAig->pManFunc, vPairs, 0 );
+ pMiter = Abc_AigMiter( (Abc_Aig_t *)pAig->pManFunc, vPairs, 0 );
Abc_ObjAddFanin( Abc_NtkCreatePo(pAig), pMiter );
Vec_PtrFree( vPairs );
// add the node
@@ -98,7 +101,7 @@ Abc_Ntk_t * Res_WndStrash( Res_Win_t * p )
Abc_ObjForEachFanin( p->pNode, pObj, i )
Abc_ObjAddFanin( Abc_NtkCreatePo(pAig), pObj->pCopy );
// add the divisors
- Vec_PtrForEachEntry( p->vDivs, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vDivs, pObj, i )
Abc_ObjAddFanin( Abc_NtkCreatePo(pAig), pObj->pCopy );
// add the names
Abc_NtkAddDummyPiNames( pAig );
@@ -115,3 +118,5 @@ Abc_Ntk_t * Res_WndStrash( Res_Win_t * p )
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/res/resWin.c b/src/opt/res/resWin.c
index e46fdc70..a26e7831 100644
--- a/src/opt/res/resWin.c
+++ b/src/opt/res/resWin.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "resInt.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -113,7 +116,7 @@ int Res_WinCollectLeavesAndNodes( Res_Win_t * p )
Vec_PtrClear( p->vLeaves );
Vec_VecForEachLevelStartStop( p->vMatrix, vFront, i, 0, p->nWinTfiMax )
{
- Vec_PtrForEachEntry( vFront, pObj, k )
+ Vec_PtrForEachEntry( Abc_Obj_t *, vFront, pObj, k )
{
Abc_ObjForEachFanin( pObj, pTemp, m )
{
@@ -134,14 +137,14 @@ int Res_WinCollectLeavesAndNodes( Res_Win_t * p )
Vec_PtrClear( p->vNodes );
Vec_VecForEachLevelReverseStartStop( p->vMatrix, vFront, i, p->nWinTfiMax, 0 )
{
- Vec_PtrForEachEntry( vFront, pObj, k )
+ Vec_PtrForEachEntry( Abc_Obj_t *, vFront, pObj, k )
Vec_PtrPush( p->vNodes, pObj );
Vec_PtrClear( vFront );
}
// get the lowest leaf level
p->nLevLeafMin = ABC_INFINITY;
- Vec_PtrForEachEntry( p->vLeaves, pObj, k )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vLeaves, pObj, k )
p->nLevLeafMin = ABC_MIN( p->nLevLeafMin, (int)pObj->Level );
// set minimum traversal level
@@ -284,12 +287,12 @@ void Res_WinMarkPaths( Res_Win_t * p )
// mark the leaves
Abc_NtkIncrementTravId( p->pNode->pNtk );
Abc_NtkIncrementTravId( p->pNode->pNtk );
- Vec_PtrForEachEntry( p->vLeaves, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vLeaves, pObj, i )
Abc_NodeSetTravIdCurrent( pObj );
// traverse from the roots and mark the nodes that can reach leaves
// the nodes that do not reach leaves have previous trav ID
// the nodes that reach leaves have current trav ID
- Vec_PtrForEachEntry( p->vRoots, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vRoots, pObj, i )
Res_WinMarkPaths_rec( pObj, p->pNode, p->nLevTravMin );
}
@@ -404,14 +407,14 @@ void Res_WinAddMissing( Res_Win_t * p )
int i;
// mark the leaves
Abc_NtkIncrementTravId( p->pNode->pNtk );
- Vec_PtrForEachEntry( p->vLeaves, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vLeaves, pObj, i )
Abc_NodeSetTravIdCurrent( pObj );
// mark the already collected nodes
- Vec_PtrForEachEntry( p->vNodes, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vNodes, pObj, i )
Abc_NodeSetTravIdCurrent( pObj );
// explore from the roots
Vec_PtrClear( p->vBranches );
- Vec_PtrForEachEntry( p->vRoots, pObj, i )
+ Vec_PtrForEachEntry( Abc_Obj_t *, p->vRoots, pObj, i )
Res_WinAddMissing_rec( p, pObj, p->nLevTravMin );
}
@@ -483,3 +486,5 @@ int Res_WinCompute( Abc_Obj_t * pNode, int nWinTfiMax, int nWinTfoMax, Res_Win_t
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
diff --git a/src/opt/res/res_.c b/src/opt/res/res_.c
index a50affd7..ffbc4946 100644
--- a/src/opt/res/res_.c
+++ b/src/opt/res/res_.c
@@ -21,6 +21,9 @@
#include "abc.h"
#include "res.h"
+ABC_NAMESPACE_IMPL_START
+
+
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
@@ -48,3 +51,5 @@
////////////////////////////////////////////////////////////////////////
+ABC_NAMESPACE_IMPL_END
+
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-05 19:54:38 +0000