diff options
Diffstat (limited to 'src/sat/aig/fraigSim.c')
-rw-r--r-- | src/sat/aig/fraigSim.c | 184 |
1 files changed, 136 insertions, 48 deletions
diff --git a/src/sat/aig/fraigSim.c b/src/sat/aig/fraigSim.c index 1d547621..415b6918 100644 --- a/src/sat/aig/fraigSim.c +++ b/src/sat/aig/fraigSim.c @@ -1,6 +1,6 @@ /**CFile**************************************************************** - FileName [aigSim.c] + FileName [fraigSim.c] SystemName [ABC: Logic synthesis and verification system.] @@ -14,7 +14,7 @@ Date [Ver. 1.0. Started - June 20, 2005.] - Revision [$Id: aigSim.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] + Revision [$Id: fraigSim.c,v 1.00 2005/06/20 00:00:00 alanmi Exp $] ***********************************************************************/ @@ -30,59 +30,28 @@ /**Function************************************************************* - Synopsis [Simulates all nodes using random simulation.] - - Description [] - - SideEffects [] - - SeeAlso [] - -***********************************************************************/ -void Aig_ManSimulateRandomFirst( Aig_Man_t * p ) -{ - Aig_SimInfo_t * pInfoPi, * pInfoAll; - assert( p->pInfo && p->pInfoTemp ); - // create random PI info - pInfoPi = Aig_SimInfoAlloc( p->vPis->nSize, Aig_BitWordNum(p->pParam->nPatsRand), 0 ); - Aig_SimInfoRandom( pInfoPi ); - // simulate it though the circuit - pInfoAll = Aig_ManSimulateInfo( p, pInfoPi ); - // detect classes - p->vClasses = Aig_ManDeriveClassesFirst( p, pInfoAll ); - Aig_SimInfoFree( pInfoAll ); - // save simulation info - p->pInfo = pInfoPi; - p->pInfoTemp = Aig_SimInfoAlloc( p->vNodes->nSize, Aig_BitWordNum(p->vPis->nSize), 1 ); -} - -/**Function************************************************************* - Synopsis [Simulates all nodes using the given simulation info.] - Description [] + Description [Returns the simulation info for all nodes.] SideEffects [] SeeAlso [] ***********************************************************************/ -Aig_SimInfo_t * Aig_ManSimulateInfo( Aig_Man_t * p, Aig_SimInfo_t * pInfoPi ) +void Aig_ManSimulateInfo( Aig_Man_t * p, Aig_SimInfo_t * pInfoPi, Aig_SimInfo_t * pInfoAll ) { - Aig_SimInfo_t * pInfoAll; Aig_Node_t * pNode; - unsigned * pDataPi, * pData0, * pData1, * pDataAnd; + unsigned * pDataPi, * pDataPo, * pData0, * pData1, * pDataAnd; int i, k, fComp0, fComp1; assert( !pInfoPi->Type ); // PI siminfo - // allocate sim info for all nodes - pInfoAll = Aig_SimInfoAlloc( p->vNodes->nSize, pInfoPi->nWords, 1 ); // set the constant sim info pData1 = Aig_SimInfoForNode( pInfoAll, p->pConst1 ); for ( k = 0; k < pInfoPi->nWords; k++ ) pData1[k] = ~((unsigned)0); - // copy the PI siminfo - Vec_PtrForEachEntry( p->vPis, pNode, i ) + // set the PI siminfo + Aig_ManForEachPi( p, pNode, i ) { pDataPi = Aig_SimInfoForPi( pInfoPi, i ); pDataAnd = Aig_SimInfoForNode( pInfoAll, pNode ); @@ -90,10 +59,8 @@ Aig_SimInfo_t * Aig_ManSimulateInfo( Aig_Man_t * p, Aig_SimInfo_t * pInfoPi ) pDataAnd[k] = pDataPi[k]; } // simulate the nodes - Vec_PtrForEachEntry( p->vNodes, pNode, i ) + Aig_ManForEachAnd( p, pNode, i ) { - if ( !Aig_NodeIsAnd(pNode) ) - continue; pData0 = Aig_SimInfoForNode( pInfoAll, Aig_NodeFanin0(pNode) ); pData1 = Aig_SimInfoForNode( pInfoAll, Aig_NodeFanin1(pNode) ); pDataAnd = Aig_SimInfoForNode( pInfoAll, pNode ); @@ -112,13 +79,25 @@ Aig_SimInfo_t * Aig_ManSimulateInfo( Aig_Man_t * p, Aig_SimInfo_t * pInfoPi ) for ( k = 0; k < pInfoPi->nWords; k++ ) pDataAnd[k] = pData0[k] & pData1[k]; } - return pInfoAll; + // derive the PO siminfo + Aig_ManForEachPi( p, pNode, i ) + { + pDataPo = Aig_SimInfoForNode( pInfoAll, pNode ); + pDataAnd = Aig_SimInfoForNode( pInfoAll, Aig_NodeFanin0(pNode) ); + if ( Aig_NodeFaninC0(pNode) ) + for ( k = 0; k < pInfoPi->nWords; k++ ) + pDataPo[k] = ~pDataAnd[k]; + else + for ( k = 0; k < pInfoPi->nWords; k++ ) + pDataPo[k] = pDataAnd[k]; + } } + /**Function************************************************************* - Synopsis [] + Synopsis [Allocates the simulation info.] Description [] @@ -142,7 +121,7 @@ Aig_SimInfo_t * Aig_SimInfoAlloc( int nNodes, int nWords, int Type ) /**Function************************************************************* - Synopsis [] + Synopsis [Sets the simulation info to zero.] Description [] @@ -161,7 +140,7 @@ void Aig_SimInfoClean( Aig_SimInfo_t * p ) /**Function************************************************************* - Synopsis [] + Synopsis [Sets the random simulation info.] Description [] @@ -187,7 +166,40 @@ void Aig_SimInfoRandom( Aig_SimInfo_t * p ) /**Function************************************************************* - Synopsis [] + Synopsis [Sets the random simulation info.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Aig_SimInfoFromPattern( Aig_SimInfo_t * p, Aig_Pattern_t * pPat ) +{ + unsigned * pData; + int i, k; + assert( p->Type == 0 ); + assert( p->nNodes == pPat->nBits ); + for ( i = 0; i < p->nNodes; i++ ) + { + // get the pointer to the bitdata for node i + pData = p->pData + p->nWords * i; + // fill in the bit data according to the pattern + if ( Aig_InfoHasBit(pPat->pData, i) ) // PI has bit set to 1 + for ( k = 0; k < p->nWords; k++ ) + pData[k] = ~((unsigned)0); + else + for ( k = 0; k < p->nWords; k++ ) + pData[k] = 0; + // flip one bit + Aig_InfoXorBit( pData, i ); + } +} + +/**Function************************************************************* + + Synopsis [Resizes the simulation info.] Description [] @@ -209,13 +221,15 @@ void Aig_SimInfoResize( Aig_SimInfo_t * p ) for ( k = 0; k < p->nWords; k++ ) pData[2 * p->nWords * i + k + p->nWords] = 0; } - p->nPatsMax *= 2; p->nWords *= 2; + p->nPatsMax *= 2; + free( p->pData ); + p->pData = pData; } /**Function************************************************************* - Synopsis [] + Synopsis [Deallocates the simulation info.] Description [] @@ -231,6 +245,80 @@ void Aig_SimInfoFree( Aig_SimInfo_t * p ) } +/**Function************************************************************* + + Synopsis [Allocates the simulation info.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +Aig_Pattern_t * Aig_PatternAlloc( int nBits ) +{ + Aig_Pattern_t * pPat; + pPat = ALLOC( Aig_Pattern_t, 1 ); + memset( pPat, 0, sizeof(Aig_Pattern_t) ); + pPat->nBits = nBits; + pPat->nWords = Aig_BitWordNum(nBits); + pPat->pData = ALLOC( unsigned, pPat->nWords ); + return pPat; +} + +/**Function************************************************************* + + Synopsis [Cleans the pattern.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Aig_PatternClean( Aig_Pattern_t * pPat ) +{ + memset( pPat->pData, 0, sizeof(unsigned) * pPat->nWords ); +} + +/**Function************************************************************* + + Synopsis [Sets the random pattern.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Aig_PatternRandom( Aig_Pattern_t * pPat ) +{ + int i; + for ( i = 0; i < pPat->nWords; i++ ) + pPat->pData[i] = ((((unsigned)rand()) << 24) ^ (((unsigned)rand()) << 12) ^ ((unsigned)rand())); +} + +/**Function************************************************************* + + Synopsis [Deallocates the pattern.] + + Description [] + + SideEffects [] + + SeeAlso [] + +***********************************************************************/ +void Aig_PatternFree( Aig_Pattern_t * pPat ) +{ + free( pPat->pData ); + free( pPat ); +} + + //////////////////////////////////////////////////////////////////////// /// END OF FILE /// //////////////////////////////////////////////////////////////////////// |