iCE40/abc - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	New ISOP computation.	Alan Mishchenko	2014-10-04	2	-0/+522
\|
*	Deriving AIG after cell mapping.	Alan Mishchenko	2014-10-03	5	-2/+69
\|
*	Bug fix in Verilog writer.	Alan Mishchenko	2014-10-02	1	-8/+8
\|
*	Adding switch -R to 'if'.	Alan Mishchenko	2014-10-02	1	-27/+39
\|
*	Improvements to bit-blaster.	Alan Mishchenko	2014-10-01	2	-23/+88
\|
*	Improvements to bit-blaster.	Alan Mishchenko	2014-09-30	1	-1/+1
\|
*	Improvements to bit-blaster.	Alan Mishchenko	2014-09-30	4	-75/+122
\|
*	Adding options to &flow.	Alan Mishchenko	2014-09-29	2	-12/+19
\|
*	Adding options to &flow2.	Alan Mishchenko	2014-09-29	1	-4/+4
\|
*	Adding options to &flow2.	Alan Mishchenko	2014-09-29	2	-9/+14
\|
*	Adding options to &flow.	Alan Mishchenko	2014-09-29	2	-21/+26
\|
*	Command to rename files in the same directory.	Alan Mishchenko	2014-09-28	1	-0/+191
\|
*	Adding out-of-bounds checks to AIGER readers.	Alan Mishchenko	2014-09-28	2	-2/+2
\|
*	Adding features to CNF generation.	Alan Mishchenko	2014-09-28	2	-8/+18
\|
*	Renaming DSD commands (dsd_tune -> dsd_match; dsd_clean -> dsd_filter).	Alan Mishchenko	2014-09-28	3	-11/+51
\|
*	Support for sequential designs in word-level Verilog.	Alan Mishchenko	2014-09-26	5	-79/+196
\|
*	Enabling print-out, for each operator, of the percetage of AND nodes after ↵	Alan Mishchenko	2014-09-25	4	-14/+35
\| \| \| \|	bit-blasting.
*	Printing node type statistics.	Alan Mishchenko	2014-09-24	1	-33/+57
\|
*	Printing node type statistics.	Alan Mishchenko	2014-09-24	1	-10/+10
\|
*	Printing node type statistics.	Alan Mishchenko	2014-09-24	2	-2/+106
\|
*	Bug fix in handling MUXes in Verilog parser, induced by recent changes.	Alan Mishchenko	2014-09-24	1	-0/+2
\|
*	Added switch -t to &flow2.	Alan Mishchenko	2014-09-24	2	-9/+14
\|
*	Added support of word-level MUXes represented as 'always'-statements.	Alan Mishchenko	2014-09-24	1	-2/+2
\|
*	Added support of word-level MUXes represented as 'always'-statements.	Alan Mishchenko	2014-09-24	3	-18/+167
\|
*	Enables dumping stats into a file.	Alan Mishchenko	2014-09-23	2	-1/+15
\|
*	Extending &cec to take a single-output miter (usage of switch -d has changed!).	Alan Mishchenko	2014-09-23	3	-10/+50
\|
*	Debugging the bit-blaster.	Alan Mishchenko	2014-09-23	1	-1/+15
\|
*	Debugging the bit-blaster.	Alan Mishchenko	2014-09-23	2	-8/+28
\|
*	Adding switch to enable SOP balancing in '&flow2'.	Alan Mishchenko	2014-09-21	2	-14/+30
\|
*	Tuning the flow scripts.	Alan Mishchenko	2014-09-20	1	-1/+1
\|
*	Extending resource limit.	Alan Mishchenko	2014-09-20	1	-2/+2
\|
*	Tuning the flow scripts.	Alan Mishchenko	2014-09-20	2	-5/+70
\|
*	Synchronizing packages.	Alan Mishchenko	2014-09-20	3	-6/+6
\|
*	Synchronizing packages.	Alan Mishchenko	2014-09-20	1	-0/+2
\|
*	Synchronizing packages.	Alan Mishchenko	2014-09-20	2	-3/+3
\|
*	Synchronizing packages.	Alan Mishchenko	2014-09-20	2	-1/+3
\|
*	Updating command 'dsd_clean'.	Alan Mishchenko	2014-09-20	4	-10/+45
\|
*	Tuning the flow scripts.	Alan Mishchenko	2014-09-20	2	-141/+248
\|
*	Updating DSD balance to handle XOR gate as having the same delay as AND gate.	Alan Mishchenko	2014-09-19	4	-10/+11
\|
*	Improvements to Boolean matching.	Alan Mishchenko	2014-09-19	2	-33/+98
\|
*	Improvements to Boolean matching.	Alan Mishchenko	2014-09-19	8	-88/+563
\|
*	Improvements to Boolean matching.	Alan Mishchenko	2014-09-18	5	-14/+30
\|
*	Improvements to Boolean matching.	Alan Mishchenko	2014-09-18	5	-19/+57
\|
*	Improvements to Boolean matching.	Alan Mishchenko	2014-09-18	1	-14/+29
\|
*	Improving DSD manager.	Alan Mishchenko	2014-09-18	3	-6/+89
\|
*	Concurrency for Boolean matching.	Alan Mishchenko	2014-09-18	10	-65/+331
\|
*	Improvements to Boolean matching.	Alan Mishchenko	2014-09-17	4	-64/+220
\|
*	Improvements to word-level Verilog parser.	Alan Mishchenko	2014-09-17	2	-3/+4
\|
*	Improvements to word-level Verilog parser.	Alan Mishchenko	2014-09-17	5	-230/+488
\|
*	Spurious assertion.	Alan Mishchenko	2014-09-17	1	-1/+1
\|