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iCE40/abc
yosys-experimental
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*
Supporting ~^ as equality operator in Wlc.
Alan Mishchenko
2016-03-04
1
-2
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+3
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*
New hierarchical TT NPN matching.
Alan Mishchenko
2016-02-26
4
-3
/
+170
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*
Disabling formula cleaner to avoid problems with reading GENLIB on some ↵
Alan Mishchenko
2016-02-21
1
-1
/
+2
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libraries.
*
Re-doing the same change.
Alan Mishchenko
2016-02-15
1
-2
/
+2
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*
Temporarily undoing one of the recent changes.
Alan Mishchenko
2016-02-15
1
-2
/
+2
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*
Improving bit-blasting of a multiplier and squarer.
Alan Mishchenko
2016-02-13
2
-16
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+46
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*
Adding support for a different bit-blasting of a multiplier and squarer.
Alan Mishchenko
2016-02-13
5
-1
/
+655
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*
Adding support for a different bit-blasting of a multiplier and squarer.
Alan Mishchenko
2016-02-12
5
-2
/
+97
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*
Experiments with SAT-based mapping.
Alan Mishchenko
2016-02-08
3
-95
/
+176
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*
Experiments with SAT-based mapping.
Alan Mishchenko
2016-02-07
5
-0
/
+658
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*
Bug fix in liberty parser and change suggested by Clifford.
Alan Mishchenko
2016-02-07
2
-1
/
+17
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*
Added recursive bit-blasting of a carry-lookahead adder.
Alan Mishchenko
2016-02-06
1
-0
/
+51
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*
GENLIB parsing bug, which led to a crash.
Alan Mishchenko
2016-02-06
1
-1
/
+4
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*
Fixing the problem of identically named signals in 'retime'.
Alan Mishchenko
2016-02-05
2
-4
/
+4
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*
Making flop names after 'retime' more meaningful.
Alan Mishchenko
2016-02-03
2
-4
/
+6
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*
Preserving internal signal names when 'strash' is not used.
Alan Mishchenko
2016-02-03
2
-0
/
+7
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*
Supporting X-valued constants in Wlc_Ntk_t.
Alan Mishchenko
2016-02-02
1
-1
/
+1
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*
Supporting X-valued constants in Wlc_Ntk_t.
Alan Mishchenko
2016-02-02
1
-6
/
+13
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*
Supporting X-valued constants in Wlc_Ntk_t.
Alan Mishchenko
2016-02-02
4
-11
/
+26
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*
An add-on to write Verilog for circuits mapped into simple gates.
Alan Mishchenko
2016-02-01
1
-9
/
+22
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*
Rare bug fix in 'dch' resulting in choice nodes having internal fanout.
Alan Mishchenko
2016-01-31
1
-1
/
+8
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*
Fixing mismatch in the TLS flow induced by adding cell configs in the DSD ↵
Alan Mishchenko
2016-01-30
1
-1
/
+1
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manager.
*
Small changes to sort for timing.
Alan Mishchenko
2016-01-24
2
-3
/
+11
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*
Bug fix in 'aig', for the case of non-min-base SOPs.
Alan Mishchenko
2016-01-20
1
-0
/
+1
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*
Generating sorting network as a PLA file.
Alan Mishchenko
2016-01-20
2
-3
/
+52
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*
New command to dump LUT network.
Alan Mishchenko
2016-01-16
4
-33
/
+232
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*
Changing the resource file to get rid of a warning on Linux.
Alan Mishchenko
2016-01-14
1
-1
/
+1
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*
Compiler warning.
Alan Mishchenko
2016-01-14
1
-1
/
+0
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*
Changes to PDR to compute f-inf clauses and import invariant (or clauses) as ↵
Alan Mishchenko
2016-01-14
15
-68
/
+457
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a network.
*
Experiments with SAT-based mapping.
Alan Mishchenko
2016-01-14
1
-50
/
+83
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*
Adding a way to derive cardinality constraint as a sorting network.
Alan Mishchenko
2016-01-13
1
-4
/
+89
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*
Adding support for delay/area tradeoff.
Alan Mishchenko
2016-01-13
5
-36
/
+70
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*
Integrating new CNF generation into &bmc.
Alan Mishchenko
2016-01-12
3
-16
/
+26
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*
Better print-out of SOPs. Changing default of 'fx'. Updating 'satclp' to ↵
Alan Mishchenko
2016-01-12
5
-10
/
+184
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fine prine SOPs.
*
Experiments with SAT-based mapping.
Alan Mishchenko
2016-01-10
1
-0
/
+1
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*
Experiments with SAT-based mapping.
Alan Mishchenko
2016-01-10
2
-0
/
+164
|
*
Adding support of candinality clause to the SAT solver.
Alan Mishchenko
2016-01-10
5
-7
/
+52
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*
Consolidating timing manager Scl_Con_t and propagating changes.
Alan Mishchenko
2016-01-07
11
-54
/
+93
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*
Bug fix in constraint file reader.
Alan Mishchenko
2016-01-07
2
-2
/
+8
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*
Adding switch &miter -x for XORs outputs of two word-level POs.
Alan Mishchenko
2016-01-06
3
-2
/
+57
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*
Fixing last-minute bug fix in &nf.
Alan Mishchenko
2016-01-05
1
-2
/
+2
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*
Buf fix in floating time reporting.
Alan Mishchenko
2016-01-05
1
-20
/
+21
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*
Fix in &nf for the case when PO can be driven by an inverter.
Alan Mishchenko
2016-01-05
1
-0
/
+5
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*
Fix in &nf for the case when PO can be driven by an inverter.
Alan Mishchenko
2016-01-05
1
-0
/
+30
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*
Migrating to using 32-bit timing representation in &nf.
Alan Mishchenko
2016-01-05
5
-242
/
+239
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*
Migrating back to using 'float' in area-flow computation in &nf.
Alan Mishchenko
2016-01-05
5
-77
/
+86
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*
Corner-case bug in 'read_profile'.
Alan Mishchenko
2015-12-22
1
-1
/
+1
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*
Adding names to GIA inputs/outputs (addressing x-valued flops).
Alan Mishchenko
2015-12-22
1
-1
/
+51
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*
Adding names to GIA inputs/outputs. Changing polarity of invariant ↵
Alan Mishchenko
2015-12-22
1
-1
/
+1
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generated by PDR.
*
Adding names to GIA inputs/outputs. Changing polarity of invariant ↵
Alan Mishchenko
2015-12-21
1
-0
/
+34
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generated by PDR.
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