Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | Resetting the random seed in 'sparsify'. | Alan Mishchenko | 2014-09-11 | 1 | -0/+1 | |
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* | Updating timing info during normalization. | Alan Mishchenko | 2014-09-10 | 1 | -1/+1 | |
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* | Updating timing info during normalization. | Alan Mishchenko | 2014-09-10 | 1 | -1/+3 | |
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* | Bug fix in transferring timing info. | Alan Mishchenko | 2014-09-09 | 4 | -6/+67 | |
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* | Corner-case bug fix in balancing. | Alan Mishchenko | 2014-09-08 | 1 | -0/+2 | |
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* | Added command 'move_names'. | Alan Mishchenko | 2014-08-28 | 1 | -1/+1 | |
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* | Added command 'move_names'. | Alan Mishchenko | 2014-08-28 | 2 | -0/+106 | |
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* | Tuning LUT mapping flow. | Alan Mishchenko | 2014-08-28 | 2 | -1/+5 | |
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* | Tuning LUT mapping flow. | Alan Mishchenko | 2014-08-27 | 2 | -4/+6 | |
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* | Compiler warning. | Alan Mishchenko | 2014-08-27 | 1 | -2/+2 | |
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* | Tuning LUT mapping flow. | Alan Mishchenko | 2014-08-27 | 2 | -0/+254 | |
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* | Improvements BLIF parser. | Alan Mishchenko | 2014-08-27 | 3 | -4/+130 | |
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* | Improvements to DSD balancing. | Alan Mishchenko | 2014-08-27 | 6 | -43/+109 | |
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* | Adding commands to save/load best network. | Alan Mishchenko | 2014-08-26 | 6 | -9/+342 | |
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* | Improvements to the timing manager. | Alan Mishchenko | 2014-08-25 | 5 | -12/+15 | |
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* | Improving GIA interfaces for some procedures. | Alan Mishchenko | 2014-08-25 | 8 | -54/+70 | |
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* | Correcting incorrect handling of timing in several &-commands. | Alan Mishchenko | 2014-08-25 | 7 | -44/+172 | |
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* | Improving print-out of 'dsd -p'. | Alan Mishchenko | 2014-08-22 | 4 | -1/+154 | |
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* | Propagating timing support to the new synthesis/mapping commands. | Alan Mishchenko | 2014-08-20 | 9 | -41/+34 | |
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* | Extended command &cone to extract timing critical cones. | Alan Mishchenko | 2014-08-19 | 3 | -39/+141 | |
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* | Added command 'sparsify' to derive ISF from CSF. | Alan Mishchenko | 2014-08-18 | 2 | -0/+212 | |
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* | Changing default CNF generation in &bmc. | Alan Mishchenko | 2014-08-18 | 3 | -1/+9 | |
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* | Added DSD-based collapsing &dsd. | Alan Mishchenko | 2014-08-16 | 2 | -2/+2 | |
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* | Added DSD-based collapsing &dsd. | Alan Mishchenko | 2014-08-16 | 1 | -2/+3 | |
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* | Adding specialized matching to 'if'. | Alan Mishchenko | 2014-08-16 | 1 | -1/+1 | |
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* | Added DSD-based collapsing &dsd. | Alan Mishchenko | 2014-08-16 | 1 | -0/+1 | |
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* | Adding specialized matching to 'if'. | Alan Mishchenko | 2014-08-16 | 6 | -0/+140 | |
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* | Added DSD-based collapsing &dsd. | Alan Mishchenko | 2014-08-16 | 5 | -5/+440 | |
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* | Suggested fix to allow .constr files to have empty lines. | Alan Mishchenko | 2014-08-13 | 1 | -0/+2 | |
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* | Enabling circuit solver in &fraig. | Alan Mishchenko | 2014-08-12 | 6 | -13/+100 | |
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* | Bug fix in &fraig -L <num>. | Alan Mishchenko | 2014-08-12 | 3 | -86/+5 | |
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* | Bug fix in &fraig -L <num>. | Alan Mishchenko | 2014-08-12 | 5 | -8/+107 | |
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* | Increasing the size of pre-allocated memory in &syn2. | Alan Mishchenko | 2014-08-11 | 1 | -1/+1 | |
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* | Adding delay optimization to synthesis script &syn2. | Alan Mishchenko | 2014-08-08 | 8 | -22/+123 | |
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* | Enabling cofactoring in the mapper. | Alan Mishchenko | 2014-08-06 | 2 | -2/+23 | |
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* | Profiling code for SOP/DSD/LMS balancing. | Alan Mishchenko | 2014-08-04 | 1 | -0/+69 | |
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* | Compiler warnings. | Alan Mishchenko | 2014-08-04 | 5 | -11/+67 | |
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* | Enabling ISOP-based minimization in 'collapse' if EXDC is available. | Alan Mishchenko | 2014-08-04 | 2 | -2/+35 | |
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* | Compiler warnings. | Alan Mishchenko | 2014-08-02 | 2 | -1/+2 | |
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* | Profiling code for SOP/DSD/LMS balancing. | Alan Mishchenko | 2014-08-02 | 5 | -0/+465 | |
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* | Changes to the hopelessly limited Verilog parser to skip one-bit bit-ranges, ↵ | Alan Mishchenko | 2014-08-02 | 1 | -4/+26 | |
| | | | | such as [7:7], which seems to help in some cases. | |||||
* | Small changes. | Alan Mishchenko | 2014-07-29 | 2 | -3/+4 | |
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* | Adding support for standard-cell mapping. | Alan Mishchenko | 2014-07-28 | 5 | -10/+147 | |
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* | Generating abstraction of standard cell library. | Alan Mishchenko | 2014-07-26 | 1 | -1/+1 | |
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* | Generating abstraction of standard cell library. | Alan Mishchenko | 2014-07-26 | 5 | -0/+397 | |
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* | Generating abstraction of standard cell library. | Alan Mishchenko | 2014-07-25 | 8 | -19/+181 | |
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* | Fixing option 'if -G <num>' after changes. | Alan Mishchenko | 2014-07-25 | 3 | -10/+10 | |
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* | Adding message prefix. | Alan Mishchenko | 2014-07-24 | 1 | -8/+9 | |
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* | Bug fix in 'print_gates' due to the mix-up of the inverter. | Alan Mishchenko | 2014-07-22 | 1 | -1/+1 | |
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* | Undoing previous change to SOP balancing. | Alan Mishchenko | 2014-07-22 | 1 | -6/+6 | |
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