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* Added hierarchical BLIF output for mapping with LUT structures (write_blif ↵Alan Mishchenko2012-10-244-17/+299
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* Integrating GIA with LUT mapping.Alan Mishchenko2012-10-244-44/+214
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* Integrating GIA with LUT mapping.Alan Mishchenko2012-10-2414-362/+962
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* Creating dedicated choice representation for GIA.Alan Mishchenko2012-10-247-23/+122
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* Adding frontier comptuation based on reversed CO order in &ps.Alan Mishchenko2012-10-244-9/+59
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* Fixing frontier computation in &ps.Alan Mishchenko2012-10-241-4/+43
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* Disabling SAT sweeping in 'map' by default.Alan Mishchenko2012-10-231-1/+1
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* Adding #ifdef to guard windows-specific debugging option.Alan Mishchenko2012-10-201-3/+5
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* Bug fix in hierarchical BLIF reader.Alan Mishchenko2012-10-111-3/+2
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* Commenting out printout.Alan Mishchenko2012-10-101-2/+2
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* Added procedure to check correctness of the topo order during AIG construction.Alan Mishchenko2012-10-101-0/+27
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* Added command to transform GIA into the file with truth tables for each output.Alan Mishchenko2012-10-101-0/+77
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* Improvements to gate sizing.Alan Mishchenko2012-10-093-41/+46
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* Improvements to gate sizing.Alan Mishchenko2012-10-097-163/+221
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* Making report about the number of correcty covered frames consistent across ↵Alan Mishchenko2012-10-094-6/+7
| | | | the engines.
* Improvements to gate-sizing.Alan Mishchenko2012-10-092-3/+5
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* Improvements to gate-sizing.Alan Mishchenko2012-10-093-9/+27
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* Improvements to gate sizing (bug fix).Alan Mishchenko2012-10-091-4/+6
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* Improvements to gate sizing (bug fix).Alan Mishchenko2012-10-091-1/+2
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* Bug fix in &gla (incorrect reporting of proved timeframes).Alan Mishchenko2012-10-091-2/+2
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* Bug fix in &gla (incorrect reporting of proved timeframes).Alan Mishchenko2012-10-091-1/+2
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* Improvements to gate sizing.Alan Mishchenko2012-10-091-2/+2
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* Improvements to gate sizing.Alan Mishchenko2012-10-094-14/+24
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* Improvements to gate sizing.Alan Mishchenko2012-10-093-6/+35
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* Uploading pthread library for Windows.Alan Mishchenko2012-10-095-1/+1716
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* Making explicit cast to 64-bit unsigned in a few places.Alan Mishchenko2012-10-0910-31/+31
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* Extending the default GIA writing buffer.Alan Mishchenko2012-10-091-1/+1
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* Improvements to gate sizing.Alan Mishchenko2012-10-093-82/+82
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* Bug fix in LMS code.Alan Mishchenko2012-10-081-1/+1
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* Improvements to gate sizing.Alan Mishchenko2012-10-0812-203/+910
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* Bug fix in reading AIGER with both signal names and extensions.Alan Mishchenko2012-10-081-79/+79
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* Updating readme.Alan Mishchenko2012-10-061-4/+0
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* Updating readme.Alan Mishchenko2012-10-061-3/+4
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* Updating readme.Alan Mishchenko2012-10-063-14/+785
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* Updating readme.Alan Mishchenko2012-10-061-12/+19
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* New AIG optimization package.Alan Mishchenko2012-10-061-5/+5
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* Updating readme.Alan Mishchenko2012-10-065-70/+91
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* New AIG optimization package.Alan Mishchenko2012-10-061-31/+18
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* New AIG optimization package.Alan Mishchenko2012-10-063-27/+59
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* New AIG optimization package.Alan Mishchenko2012-10-063-3/+4
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* New AIG optimization package.Alan Mishchenko2012-10-069-1/+712
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* Allow for binary input file in 'testdec' and 'testnpn'.Alan Mishchenko2012-10-052-3/+15
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* Allow for binary input file in 'testdec' and 'testnpn'.Alan Mishchenko2012-10-051-2/+4
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* Allow for binary input file in 'testdec' and 'testnpn'.Alan Mishchenko2012-10-053-54/+144
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* Simplification in AIG manager object counting.Alan Mishchenko2012-10-052-4/+3
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* Bug fix in loading the timing manager.Alan Mishchenko2012-10-051-0/+8
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* Bug fix in XOR balancing (command 'balance -x').Alan Mishchenko2012-10-051-1/+1
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* Changed 'readline' declaration rules.Alan Mishchenko2012-10-041-2/+2
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* Minor bug fix.Alan Mishchenko2012-10-041-3/+3
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* Minor bug fix.Alan Mishchenko2012-10-041-0/+3
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