iCE40/abc - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Bug fix in 'int'.	Alan Mishchenko	2013-08-05	1	-2/+2
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*	Bug fix in 'int'.	Alan Mishchenko	2013-08-05	1	-42/+35
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*	Adding new (un)buffering with phase information.	Alan Mishchenko	2013-08-05	1	-5/+30
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*	Adding new (un)buffering with phase information.	Alan Mishchenko	2013-08-05	6	-10/+142
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*	Adding code to estimate buffer trees.	Alan Mishchenko	2013-08-05	7	-43/+249
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*	Change from input slew to input drive strength in the BLIF file.	Alan Mishchenko	2013-08-04	5	-10/+81
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*	Adding switch 'buffer -p' to enable buffing of the primary inputs.	Alan Mishchenko	2013-08-02	3	-9/+16
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*	Code for parsing the transcripts.	Alan Mishchenko	2013-08-02	1	-0/+18
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*	SAT solver with dynamic CNF loading.	Alan Mishchenko	2013-08-01	1	-0/+210
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*	SAT solver with dynamic CNF loading.	Alan Mishchenko	2013-08-01	6	-4/+139
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*	Internal parameter tuning.	Alan Mishchenko	2013-07-31	1	-1/+1
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*	Code for parsing the transcripts.	Alan Mishchenko	2013-07-30	1	-0/+124
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*	Parametrizing standard-cell mapper to account for the fanout delay.	Alan Mishchenko	2013-07-30	7	-16/+68
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*	Added commands 'maxsize' and 'unbuffer'.	Alan Mishchenko	2013-07-29	1	-3/+8
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*	Added commands 'maxsize' and 'unbuffer'.	Alan Mishchenko	2013-07-29	4	-8/+198
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*	Compiler warning.	Alan Mishchenko	2013-07-29	1	-1/+1
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*	Compiler warning.	Alan Mishchenko	2013-07-29	1	-1/+1
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*	Improved buffering.	Alan Mishchenko	2013-07-29	9	-337/+334
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*	Improved gate-sizing.	Alan Mishchenko	2013-07-29	8	-3/+604
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*	Adding support for input slew and output capacitance to timer and gate-sizer ↵	Alan Mishchenko	2013-07-24	3	-4/+46
\| \| \| \|	(bug fix).
*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-24	13	-82/+165
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*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-23	2	-4/+5
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*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-23	1	-1/+1
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*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-23	9	-191/+277
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*	Bug fix and warning print.	Alan Mishchenko	2013-07-22	3	-4/+47
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*	Enabling pin sorting in &if.	Alan Mishchenko	2013-07-22	1	-0/+3
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*	Generating GENLIB library from SCL.	Alan Mishchenko	2013-07-22	8	-185/+470
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*	Restructuring gate-sizing code trying to separate timing analysis.	Alan Mishchenko	2013-07-21	14	-302/+588
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*	New technology mapper.	Alan Mishchenko	2013-07-21	6	-20/+25
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*	Improvements to post-mapping re-sizing.	Alan Mishchenko	2013-07-21	8	-145/+175
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*	Memory leaks.	Alan Mishchenko	2013-07-21	2	-9/+5
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*	Adding support for input slew and output capacitance to timer and gate-sizer.	Alan Mishchenko	2013-07-21	6	-6/+99
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*	Adding support for input slew (.input_drive) and output capacitance ↵	Alan Mishchenko	2013-07-21	7	-115/+387
\| \| \| \|	(.output_load) in BLIF reader/writer.
*	Improvements to the SCL package.	Alan Mishchenko	2013-07-20	6	-159/+52
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*	Added command 'dnsize' to complement command 'upsize'.	Alan Mishchenko	2013-07-20	9	-31/+734
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*	Experiment with 'pdr'.	Alan Mishchenko	2013-07-19	6	-34/+189
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*	Small data-structure improvements in 'pdr'.	Alan Mishchenko	2013-07-19	3	-25/+33
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*	Small changes to the printout in timing analysis.	Alan Mishchenko	2013-07-19	3	-3/+5
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*	Temprary changes.	Alan Mishchenko	2013-07-18	1	-1/+50
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*	New technology mapper.	Alan Mishchenko	2013-07-18	1	-1/+1
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*	New technology mapper.	Alan Mishchenko	2013-07-18	3	-53/+32
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*	Temprary changes.	Alan Mishchenko	2013-07-18	1	-0/+49
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*	New technology mapper.	Alan Mishchenko	2013-07-18	5	-86/+49
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*	New technology mapper.	Alan Mishchenko	2013-07-18	3	-46/+93
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*	New technology mapper.	Alan Mishchenko	2013-07-17	5	-24/+46
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*	New technology mapper.	Alan Mishchenko	2013-07-17	1	-1/+1
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*	New technology mapper.	Alan Mishchenko	2013-07-17	1	-1/+1
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*	New technology mapper.	Alan Mishchenko	2013-07-17	10	-36/+408
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*	Commenting out assertion related to choices in 'if'.	Alan Mishchenko	2013-07-16	1	-1/+1
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*	Enabling switch -a in 'mfs2'.	Alan Mishchenko	2013-07-16	1	-0/+2
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