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* Command &esop to convert AIG into ESOP.Alan Mishchenko2016-04-096-0/+600
* Adding hashing of windows in &satlut.Alan Mishchenko2016-04-071-3/+19
* Adding AIG rehashing after LUT mapping in Gia.Alan Mishchenko2016-04-071-3/+0
* Adding AIG rehashing after LUT mapping in Gia.Alan Mishchenko2016-04-075-9/+82
* Supporting edges in delay-optimization in &satlut.Alan Mishchenko2016-04-072-19/+46
* Supporting edges in delay-optimization in &satlut.Alan Mishchenko2016-04-075-20/+236
* Supporting edges in delay-optimization in &satlut.Alan Mishchenko2016-04-077-151/+568
* Supporting edge information during mapping.Alan Mishchenko2016-04-067-2/+304
* Supporting negative and reverse ranges of word-level variables in Wlc.Alan Mishchenko2016-04-046-106/+168
* Improvements to delay-optimization in &satlut.Alan Mishchenko2016-04-044-112/+214
* Improvements to delay-optimization in &satlut.Alan Mishchenko2016-04-043-158/+269
* Improvements to delay-optimization in &satlut.Alan Mishchenko2016-04-044-23/+112
* Improvements to delay-optimization in &satlut.Alan Mishchenko2016-04-033-87/+330
* Enabling native Gia visualization in &show.Alan Mishchenko2016-04-035-7/+390
* Allowing Cba manager to be derived from another Cba manager.Alan Mishchenko2016-04-022-3/+3
* Windowing for technology mapping.Alan Mishchenko2016-03-309-190/+460
* Windowing for technology mapping.Alan Mishchenko2016-03-296-13/+436
* Bug fix in truth table reading for funcs with less than 6 vars.Alan Mishchenko2016-03-283-3/+3
* Corner-case bug fix in 'satclp' with conflict limit.Alan Mishchenko2016-03-251-5/+10
* Sorting multiplier inputs based on the number of constant bits.Alan Mishchenko2016-03-241-0/+21
* Procedure to check inductive invariant for Gia package.Alan Mishchenko2016-03-211-0/+61
* Typo in operator in Wlc_Ntk_t.Alan Mishchenko2016-03-181-1/+1
* Supporting bit-wise XNOR operator in Wlc_Ntk_t.Alan Mishchenko2016-03-185-3/+9
* Supporting complemented reduction operators.Alan Mishchenko2016-03-111-6/+7
* Adding API to convert Genlib into a simple Liberty.Alan Mishchenko2016-03-114-1/+145
* Supporting complemented reduction operators.Alan Mishchenko2016-03-105-11/+40
* Change error to warning in 'scorr'.Alan Mishchenko2016-03-091-2/+2
* Bug fix in &fftest: not outputting test patterns when user test patterns are ...Alan Mishchenko2016-03-091-8/+15
* Supporting ~^ as equality operator in Wlc.Alan Mishchenko2016-03-041-2/+3
* New hierarchical TT NPN matching.Alan Mishchenko2016-02-264-3/+170
* Disabling formula cleaner to avoid problems with reading GENLIB on some libra...Alan Mishchenko2016-02-211-1/+2
* Re-doing the same change.Alan Mishchenko2016-02-151-2/+2
* Temporarily undoing one of the recent changes.Alan Mishchenko2016-02-151-2/+2
* Improving bit-blasting of a multiplier and squarer.Alan Mishchenko2016-02-132-16/+46
* Adding support for a different bit-blasting of a multiplier and squarer.Alan Mishchenko2016-02-135-1/+655
* Adding support for a different bit-blasting of a multiplier and squarer.Alan Mishchenko2016-02-125-2/+97
* Experiments with SAT-based mapping.Alan Mishchenko2016-02-083-95/+176
* Experiments with SAT-based mapping.Alan Mishchenko2016-02-075-0/+658
* Bug fix in liberty parser and change suggested by Clifford.Alan Mishchenko2016-02-072-1/+17
* Added recursive bit-blasting of a carry-lookahead adder.Alan Mishchenko2016-02-061-0/+51
* GENLIB parsing bug, which led to a crash.Alan Mishchenko2016-02-061-1/+4
* Fixing the problem of identically named signals in 'retime'.Alan Mishchenko2016-02-052-4/+4
* Making flop names after 'retime' more meaningful.Alan Mishchenko2016-02-032-4/+6
* Preserving internal signal names when 'strash' is not used.Alan Mishchenko2016-02-032-0/+7
* Supporting X-valued constants in Wlc_Ntk_t.Alan Mishchenko2016-02-021-1/+1
* Supporting X-valued constants in Wlc_Ntk_t.Alan Mishchenko2016-02-021-6/+13
* Supporting X-valued constants in Wlc_Ntk_t.Alan Mishchenko2016-02-024-11/+26
* An add-on to write Verilog for circuits mapped into simple gates.Alan Mishchenko2016-02-011-9/+22
* Rare bug fix in 'dch' resulting in choice nodes having internal fanout.Alan Mishchenko2016-01-311-1/+8
* Fixing mismatch in the TLS flow induced by adding cell configs in the DSD man...Alan Mishchenko2016-01-301-1/+1
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