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* Support computation experiments with different network data-structures.Alan Mishchenko2012-01-143-0/+127
* Small bug fix in printing DSD for Boolean functions.Alan Mishchenko2012-01-141-1/+1
* New hierarchy manager.Alan Mishchenko2012-01-133-10/+53
* New hierarchy manager.Alan Mishchenko2012-01-133-19/+18
* New hierarchy manager.Alan Mishchenko2012-01-134-1/+63
* Improving printout in the SAT solver.Alan Mishchenko2012-01-132-2/+4
* Commented out a printout line which cases a warning to be printed.Alan Mishchenko2012-01-131-1/+1
* Added bit vector.Alan Mishchenko2012-01-132-0/+580
* Added counting hits and misses during structural hashing.Alan Mishchenko2012-01-134-2/+10
* New hierarchy manager.Alan Mishchenko2012-01-131-3/+12
* New hierarchy manager.Alan Mishchenko2012-01-132-31/+206
* Added new name manager and modified hierarchy manager to use it.Alan Mishchenko2012-01-137-82/+769
* New hierarchy manager.Alan Mishchenko2012-01-133-0/+449
* Added model ID inside the design.Alan Mishchenko2012-01-122-0/+3
* Bug fix related to not properly resizing SAT solver's model array.Alan Mishchenko2012-01-122-0/+2
* Changes to the lazy man's synthesis code.Alan Mishchenko2012-01-116-202/+566
* Gate level abstraction.Alan Mishchenko2012-01-111-109/+627
* Gate level abstraction.Alan Mishchenko2012-01-082-59/+305
* Backward reachability using circuit cofactoring.Alan Mishchenko2012-01-081-5/+31
* Backward reachability using circuit cofactoring.Alan Mishchenko2012-01-071-9/+13
* Backward reachability using circuit cofactoring.Alan Mishchenko2012-01-071-13/+12
* Crash fix in 'tempor' in case the leading length is 0.Alan Mishchenko2012-01-071-0/+6
* Gate level abstraction.Alan Mishchenko2012-01-071-238/+78
* Bug fix: changing output number to 0 in the CEX after ORing POs.Alan Mishchenko2012-01-071-0/+3
* Bug fix related to not properly resizing SAT solver's model array.Alan Mishchenko2012-01-0611-151/+45
* Added warning when the network from file has no primary inputs.Alan Mishchenko2012-01-061-0/+5
* APIs to represent simple gates in CNF.Alan Mishchenko2012-01-051-0/+112
* Backward reachability using circuit cofactoring.Alan Mishchenko2012-01-053-217/+250
* APIs to represent simple gates in CNF.Alan Mishchenko2012-01-051-0/+100
* Configuration changes in the Boolean matching code.Alan Mishchenko2012-01-051-1/+1
* Backward reachability using circuit cofactoring.Alan Mishchenko2012-01-011-0/+442
* Backward reachability using circuit cofactoring.Alan Mishchenko2012-01-015-13/+483
* Delay optimization using precomputed library.Alan Mishchenko2011-12-301-4/+11
* Delay optimization using precomputed library.Alan Mishchenko2011-12-301-1/+3
* Delay optimization using precomputed library.Alan Mishchenko2011-12-301-29/+29
* Delay optimization using precomputed library.Alan Mishchenko2011-12-301-5/+80
* Delay optimization using precomputed library.Alan Mishchenko2011-12-296-186/+1072
* Experiments with flattening hierarchy.Alan Mishchenko2011-12-290-0/+0
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| * Experiments with flattening hierarchy.Alan Mishchenko2011-12-281-8/+288
* | New variable-time frame abstraction.Alan Mishchenko2011-12-294-8/+527
* | Experiments with flattening hierarchy.Alan Mishchenko2011-12-281-27/+274
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* Transforming the solver to use different clause representation.Alan Mishchenko2011-12-233-38/+83
* Transforming the solver to use different clause representation.Alan Mishchenko2011-12-233-91/+45
* Transforming the solver to use different clause representation.Alan Mishchenko2011-12-232-4/+4
* Transforming the solver to use different clause representation.Alan Mishchenko2011-12-2311-543/+2489
* Transforming the solver to use different clause representation.Alan Mishchenko2011-12-222-144/+144
* Added switch -n to 'miter' to ignore PI/PO names.Alan Mishchenko2011-12-221-3/+15
* Added alias blif2aig = undc; strash; zeroAlan Mishchenko2011-12-221-0/+1
* Computing interpolants as truth tables.Alan Mishchenko2011-12-2211-6/+849
* Improvements to hierarchical BLIF parser.Alan Mishchenko2011-12-221-4/+6