index
:
iCE40/abc
yosys-experimental
[no description]
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
aig
/
miniaig
Commit message (
Expand
)
Author
Age
Files
Lines
*
Experiments with retiming (adding new APIs).
Alan Mishchenko
2018-12-09
1
-0
/
+2
*
Experiments with word-level retiming.
Alan Mishchenko
2018-09-30
1
-2
/
+5
*
Extending NDR to support adder/subtractor.
Alan Mishchenko
2018-06-14
1
-0
/
+36
*
Bug fix (accessing unassigned memory).
Alan Mishchenko
2018-06-12
1
-1
/
+7
*
Compiler warnings.
Alan Mishchenko
2018-06-08
1
-2
/
+2
*
Supporting the decoder primitive in NDR and bit-blasting.
Alan Mishchenko
2018-06-05
1
-0
/
+32
*
Supporting NMUX and SEL in NDR.
Alan Mishchenko
2018-05-24
1
-0
/
+55
*
Updates to NDR format (bug fixes).
Alan Mishchenko
2018-05-03
2
-21
/
+29
*
Updates to NDR format (flops, memories, signed mult, etc).
Alan Mishchenko
2018-04-29
2
-61
/
+244
*
Adding adder-subtractor primitive.
Alan Mishchenko
2018-04-11
1
-1
/
+3
*
Adding support for adders with carry-in in WLC and NDR.
Alan Mishchenko
2018-02-24
1
-0
/
+98
*
Improvements to NDR to represent hierarchical designs.
Alan Mishchenko
2018-02-05
1
-2
/
+2
*
Improvements to NDR to represent hierarchical designs.
Alan Mishchenko
2018-02-05
1
-1
/
+1
*
Improvements to NDR to represent hierarchical designs.
Alan Mishchenko
2018-02-05
1
-47
/
+198
*
Adding support of reading and writing designs using a new internal format.
Alan Mishchenko
2018-01-28
1
-1
/
+2
*
Adding API to dump MiniAIG into a Verilog file and other small changes.
Alan Mishchenko
2017-10-22
1
-7
/
+72
*
Merged in boschmitt/abc (pull request #77)
Alan Mishchenko
2017-07-04
1
-8
/
+8
|
\
|
*
Small fixes for C++ compilers
Bruno Schmitt
2017-07-04
1
-8
/
+8
*
|
Synchronizing various data-structures.
Alan Mishchenko
2017-07-04
1
-3
/
+3
|
/
*
Compiler warnings.
Alan Mishchenko
2017-04-28
2
-16
/
+16
*
Compiler warnings.
Alan Mishchenko
2017-04-28
1
-5
/
+5
*
Experiments with new network data-structure.
Alan Mishchenko
2017-03-19
1
-3
/
+3
*
Experiments with new network data-structure.
Alan Mishchenko
2017-03-19
2
-134
/
+268
*
Small changes.
Alan Mishchenko
2017-03-16
1
-2
/
+24
*
Moving global declarations into 'abcapi.h' and moving it into 'main' package.
Alan Mishchenko
2017-03-02
1
-84
/
+0
*
Network interface exploration.
Alan Mishchenko
2017-03-02
1
-0
/
+614
*
Adding two external APIs.
Alan Mishchenko
2017-01-05
1
-0
/
+2
*
Correcting API names for inputing/outputing MiniLut.
Alan Mishchenko
2016-12-23
1
-3
/
+3
*
Adding support for minimalistic representation of LUT mapping.
Alan Mishchenko
2016-12-05
1
-0
/
+4
*
Compiler warnings.
Alan Mishchenko
2016-12-05
1
-2
/
+2
*
Adding support for minimalistic representation of LUT mapping.
Alan Mishchenko
2016-12-05
2
-0
/
+289
*
Adding procedure Abc_NtkSetAndGateDelay().
Alan Mishchenko
2015-11-04
1
-0
/
+3
*
Fix C++ compilation errors
Baruch Sterin
2015-10-16
1
-0
/
+4
*
Adding API to set the number of flops after reading MiniAIG.
Alan Mishchenko
2015-09-24
1
-0
/
+1
*
Adding APIs to specified input/output arrival/required times.
Alan Mishchenko
2014-02-12
1
-0
/
+4
*
Compiler warnings.
Alan Mishchenko
2013-10-30
1
-1
/
+1
*
Adding API to return the mapped network.
Alan Mishchenko
2013-09-22
1
-0
/
+4
*
External APIs needed to use ABC as a static library.
Alan Mishchenko
2012-10-31
1
-0
/
+66
*
Added procedure to check correctness of the topo order during AIG construction.
Alan Mishchenko
2012-10-10
1
-0
/
+27
*
Added serialization of Mini AIG.
Alan Mishchenko
2012-09-29
1
-6
/
+62
*
Experiments with mini AIG manager.
Alan Mishchenko
2012-09-29
2
-0
/
+194