iCE40/abc - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Detecting full-adder chains and putting them into white boxes.	Alan Mishchenko	2014-11-09	4	-94/+530
*	Full adder detection code.	Alan Mishchenko	2014-11-08	1	-0/+300
*	Making public some APIs.	Alan Mishchenko	2014-11-03	2	-18/+27
*	Added switches '-c' and '-n' to 'init'.	Alan Mishchenko	2014-11-02	1	-0/+64
*	Compiler warnings.	Alan Mishchenko	2014-10-28	2	-2/+2
*	Adding MAJ gate to GIA package.	Alan Mishchenko	2014-10-26	2	-0/+20
*	New command &satenum to enumerate SAT assignments of a miter in a naive way.	Alan Mishchenko	2014-10-25	1	-0/+59
*	Bug fix in seq synthesis due to resent code restructuring.	Alan Mishchenko	2014-10-21	2	-4/+4
*	Adding switch &qbf -q to quantify functional variables.	Alan Mishchenko	2014-10-20	1	-2/+1
*	Adding switch &qbf -q to quantify functional variables.	Alan Mishchenko	2014-10-20	1	-1/+41
*	Improved QBF solver.	Alan Mishchenko	2014-10-18	1	-19/+94
*	Improved QBF solver.	Alan Mishchenko	2014-10-18	1	-10/+25
*	Improved QBF solver.	Alan Mishchenko	2014-10-18	2	-0/+305
*	MUX decomposition during mapping.	Alan Mishchenko	2014-10-13	1	-5/+19
*	MUX decomposition during mapping.	Alan Mishchenko	2014-10-12	2	-9/+17
*	MUX decomposition during mapping.	Alan Mishchenko	2014-10-12	1	-7/+10
*	Recommended changes for portability.	Alan Mishchenko	2014-10-12	2	-4/+39
*	MUX decomposition during mapping.	Alan Mishchenko	2014-10-11	1	-25/+121
*	Deriving network in terms of programmable cells.	Alan Mishchenko	2014-10-11	1	-5/+12
*	Correction to the patch to compile with Visual Studio.	Alan Mishchenko	2014-10-10	1	-1/+1
*	Suggested patch for type-punned warnings	Alan Mishchenko	2014-10-10	2	-6/+16
*	Small changes.	Alan Mishchenko	2014-10-08	1	-8/+8
*	Compiler warnings.	Alan Mishchenko	2014-10-08	1	-1/+1
*	Detection of threshold functions.	Alan Mishchenko	2014-10-08	1	-9/+11
*	Updates to &flow and &flow2.	Alan Mishchenko	2014-10-05	1	-9/+9
*	Deriving cell mapping with &if -kz.	Alan Mishchenko	2014-10-04	4	-18/+73
*	Deriving AIG after cell mapping.	Alan Mishchenko	2014-10-03	1	-0/+29
*	Adding options to &flow.	Alan Mishchenko	2014-09-29	1	-8/+10
*	Adding options to &flow2.	Alan Mishchenko	2014-09-29	1	-4/+4
*	Adding options to &flow2.	Alan Mishchenko	2014-09-29	1	-5/+5
*	Adding options to &flow.	Alan Mishchenko	2014-09-29	1	-17/+17
*	Adding out-of-bounds checks to AIGER readers.	Alan Mishchenko	2014-09-28	1	-1/+1
*	Adding features to CNF generation.	Alan Mishchenko	2014-09-28	1	-2/+2
*	Added switch -t to &flow2.	Alan Mishchenko	2014-09-24	1	-5/+5
*	Extending &cec to take a single-output miter (usage of switch -d has changed!).	Alan Mishchenko	2014-09-23	2	-0/+26
*	Adding switch to enable SOP balancing in '&flow2'.	Alan Mishchenko	2014-09-21	1	-10/+21
*	Tuning the flow scripts.	Alan Mishchenko	2014-09-20	1	-1/+1
*	Tuning the flow scripts.	Alan Mishchenko	2014-09-20	1	-5/+69
*	Tuning the flow scripts.	Alan Mishchenko	2014-09-20	1	-124/+173
*	Concurrency for Boolean matching.	Alan Mishchenko	2014-09-18	1	-2/+10
*	Spurious assertion.	Alan Mishchenko	2014-09-17	1	-1/+1
*	New choice computation.	Alan Mishchenko	2014-09-16	1	-3/+123
*	Code restructuring.	Alan Mishchenko	2014-09-16	5	-316/+373
*	Updating timing info during normalization.	Alan Mishchenko	2014-09-10	1	-1/+1
*	Updating timing info during normalization.	Alan Mishchenko	2014-09-10	1	-1/+3
*	Bug fix in transferring timing info.	Alan Mishchenko	2014-09-09	1	-1/+1
*	Tuning LUT mapping flow.	Alan Mishchenko	2014-08-28	1	-1/+4
*	Tuning LUT mapping flow.	Alan Mishchenko	2014-08-27	1	-3/+5
*	Tuning LUT mapping flow.	Alan Mishchenko	2014-08-27	1	-0/+119
*	Improvements to DSD balancing.	Alan Mishchenko	2014-08-27	2	-6/+6