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* Extending BLIF parser/write to hangle multi-output cells.Alan Mishchenko2012-09-191-0/+3
* Changes to command 'upsize'.Alan Mishchenko2012-09-181-0/+3
* Enabled recording the name of the file GIA is coming from.Alan Mishchenko2012-09-042-0/+3
* Handling constant nodes in gate sizing.Alan Mishchenko2012-08-301-0/+3
* New package to read/write a subset of Liberty for STA.Alan Mishchenko2012-08-291-0/+3
* Added an API to convert a multi-output PLA into a shared AIG.Alan Mishchenko2012-08-291-0/+77
* Added buffering based on combinational merging.Alan Mishchenko2012-08-282-3/+37
* Added precomputation of TFO ordering for incremental network updates.Alan Mishchenko2012-08-273-0/+118
* Updated code for lazy man's synthesis.Alan Mishchenko2012-07-151-0/+11
* Replacing Mb/Gb to be MB/GB.Alan Mishchenko2012-07-092-3/+3
* Updating project settings to have simpler include paths.Alan Mishchenko2012-07-0713-38/+38
* Fixing time primtouts throughout the code.Alan Mishchenko2012-07-075-8/+9
* Prevent network from being unmapped after equivalence checking.Alan Mishchenko2012-05-151-2/+4
* Better resolution of CO drivers. Should impact the QoR after 'if'.Alan Mishchenko2012-05-153-2/+211
* Preventing 'show' from unmapping the network.Alan Mishchenko2012-05-141-7/+12
* Adding iterative refinement to 'addbuffs'.Alan Mishchenko2012-04-141-0/+43
* Adding iterative refinement to 'addbuffs'.Alan Mishchenko2012-04-131-3/+24
* Adding iterative refinement to 'addbuffs'.Alan Mishchenko2012-04-111-34/+2
* Adding iterative refinement to 'addbuffs'.Alan Mishchenko2012-04-111-3/+143
* Adding reverse order to 'addbuffs'.Alan Mishchenko2012-04-111-1/+16
* Improving printouts of critical path.Alan Mishchenko2012-04-061-2/+1
* Bug fix in 'addbuffs'.Alan Mishchenko2012-03-291-2/+2
* Enabling mapping into multi-input AND/OR gates.Alan Mishchenko2012-03-271-0/+82
* Logic sharing for multi-input gates.Alan Mishchenko2012-03-251-0/+2
* Logic sharing for multi-input gates.Alan Mishchenko2012-03-251-0/+3
* Added command 'addbuffs' to create balanced CI/CO paths.Alan Mishchenko2012-03-231-0/+57
* Additional features for delay optimizationAlan Mishchenko2012-03-213-2/+66
* Added command 'nodedup' to duplicate nodes with high fanout.Alan Mishchenko2012-03-111-0/+44
* Enabling user-specified required times in 'map'.Alan Mishchenko2012-03-022-1/+9
* Added switch -z to command 'removepo' to enable removing const1 outputs.Alan Mishchenko2012-02-271-2/+2
* Added printout of BMC tents in &ps.Alan Mishchenko2012-02-191-3/+3
* Silencing some of the gcc warnings.Alan Mishchenko2012-02-162-7/+7
* Added switch -f to 'print_io' to suppress printing flops.Alan Mishchenko2012-02-111-1/+1
* Lazy man's logic synthesis.Alan Mishchenko2012-02-011-1/+1
* Major restructuring of the code.Alan Mishchenko2012-01-2120-100/+91
* New hierarchy manager.Alan Mishchenko2012-01-201-7/+13
* New hierarchy manager.Alan Mishchenko2012-01-191-5/+195
* New hierarchy manager.Alan Mishchenko2012-01-191-16/+13
* New hierarchy manager.Alan Mishchenko2012-01-191-6/+32
* New hierarchy manager.Alan Mishchenko2012-01-181-2/+36
* New hierarchy manager.Alan Mishchenko2012-01-181-4/+133
* New hierarchy manager.Alan Mishchenko2012-01-171-6/+158
* New hierarchy manager.Alan Mishchenko2012-01-171-47/+147
* New hierarchy manager.Alan Mishchenko2012-01-161-0/+216
* New hierarchy manager plus additional printout in the GIA package.Alan Mishchenko2012-01-162-9/+16
* Changes to the lazy man's synthesis code.Alan Mishchenko2012-01-141-1/+1
* Bug fixes in the Verilog parser.Alan Mishchenko2012-01-141-1/+3
* New hierarchy manager.Alan Mishchenko2012-01-142-54/+151
* Support computation experiments with different network data-structures.Alan Mishchenko2012-01-141-0/+64
* New hierarchy manager.Alan Mishchenko2012-01-133-10/+53
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