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iCE40/abc
yosys-experimental
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abc
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Author
Age
Files
Lines
*
New word-level representation package.
Alan Mishchenko
2014-09-12
1
-4
/
+6
*
Added command 'move_names'.
Alan Mishchenko
2014-08-28
1
-0
/
+27
*
Added DSD-based collapsing &dsd.
Alan Mishchenko
2014-08-16
1
-1
/
+1
*
Changes to align node IDs in Abc_Ntk_t representing a logic network with Abc_...
Alan Mishchenko
2014-06-30
1
-14
/
+12
*
Changes to align node IDs in Abc_Ntk_t representing a logic network with Abc_...
Alan Mishchenko
2014-06-30
1
-10
/
+14
*
Added transformation of CEX after 'fix_aig' and checking of transformed CEXes...
Alan Mishchenko
2014-06-17
1
-0
/
+51
*
Adding print-out to &splitprove to see impact of cof variable on AIG size.
Alan Mishchenko
2014-06-07
1
-1
/
+1
*
Adding duplicator of the design manager.
Alan Mishchenko
2014-05-12
1
-1
/
+9
*
Bug fix in handling barrier buffers.
Alan Mishchenko
2014-05-11
1
-2
/
+8
*
Adding duplicator of the design manager.
Alan Mishchenko
2014-05-10
2
-0
/
+25
*
Bug fix in a recent code for mapping.
Alan Mishchenko
2014-05-04
1
-1
/
+1
*
Added dumping original object names into a file.
Alan Mishchenko
2014-04-28
1
-2
/
+2
*
Added dumping original object names into a file.
Alan Mishchenko
2014-04-26
3
-1
/
+139
*
Adding new code to support barrier buffers.
Alan Mishchenko
2014-04-09
2
-0
/
+119
*
Cleanup and bug fixing in hierarchy handling.
Alan Mishchenko
2014-04-09
4
-5
/
+30
*
Renamed Abc_Lib_t into Abc_Des_t and removed some dead code.
Alan Mishchenko
2014-04-09
5
-192
/
+77
*
Integrating barrier buffers into the mapper.
Alan Mishchenko
2014-03-23
3
-0
/
+109
*
Updating code to support barrier buffers.
Alan Mishchenko
2014-03-18
2
-4
/
+4
*
Updating code to support barrier buffers.
Alan Mishchenko
2014-03-18
4
-4
/
+28
*
Adding barrier buffers.
Alan Mishchenko
2014-03-18
1
-29
/
+59
*
Adding barrier buffers.
Alan Mishchenko
2014-03-18
1
-110
/
+76
*
Adding barrier buffers.
Alan Mishchenko
2014-03-17
2
-98
/
+72
*
Adding barrier buffers.
Alan Mishchenko
2014-03-16
2
-2
/
+4
*
Adding barrier buffers.
Alan Mishchenko
2014-03-16
4
-4
/
+381
*
g++ compiler errors.
Alan Mishchenko
2014-02-25
1
-4
/
+4
*
Removing unused LMS code.
Alan Mishchenko
2014-02-16
1
-23
/
+0
*
Add command 'splitsop' to split large node SOPs into smaller ones.
Alan Mishchenko
2013-11-23
1
-0
/
+74
*
Fixing the wire-load approximation problem.
Alan Mishchenko
2013-11-07
2
-0
/
+12
*
Compiler warnings.
Alan Mishchenko
2013-10-30
1
-1
/
+1
*
Compiler warnings.
Alan Mishchenko
2013-10-17
1
-1
/
+1
*
Fix for writing choices into a BLIF file.
Alan Mishchenko
2013-10-16
1
-2
/
+8
*
Improvements to buffering and sizing.
Alan Mishchenko
2013-10-12
1
-1
/
+4
*
Improving printouts in sharing extraction.
Alan Mishchenko
2013-09-28
1
-1
/
+1
*
Bug fix.
Alan Mishchenko
2013-09-27
1
-1
/
+1
*
Fix a bug in 'zeropo'.
Alan Mishchenko
2013-09-13
1
-1
/
+1
*
Unifying parameters for the &ps command.
Alan Mishchenko
2013-09-05
1
-3
/
+3
*
Adding switch 'ps -s' to skip counting buffers/inverters as nodes.
Alan Mishchenko
2013-09-02
3
-2
/
+23
*
Removing some old useless code.
Alan Mishchenko
2013-09-02
3
-44
/
+1
*
Adding interpolant computation sat_solver2.
Alan Mishchenko
2013-09-02
1
-1
/
+1
*
Modify level computation to take discretized arrival times into account.
Alan Mishchenko
2013-09-02
1
-3
/
+7
*
Adding switch &get -m to import mapped network into the &-space.
Alan Mishchenko
2013-09-01
1
-2
/
+2
*
Adding switch &get -m to import mapped network into the &-space.
Alan Mishchenko
2013-09-01
2
-0
/
+113
*
Extending 'permute' to handle user-specified flop permutation.
Alan Mishchenko
2013-08-16
2
-3
/
+60
*
Integrated buffering and sizing.
Alan Mishchenko
2013-08-08
2
-0
/
+5
*
Improvements to buffering and sizing.
Alan Mishchenko
2013-08-06
2
-0
/
+8
*
Improvements to buffering and sizing.
Alan Mishchenko
2013-08-06
1
-2
/
+2
*
Adding new (un)buffering with phase information.
Alan Mishchenko
2013-08-05
3
-1
/
+35
*
Added commands 'maxsize' and 'unbuffer'.
Alan Mishchenko
2013-07-29
1
-0
/
+6
*
Adding support for input slew and output capacitance to timer and gate-sizer ...
Alan Mishchenko
2013-07-24
1
-2
/
+2
*
Adding support for input slew and output capacitance to timer and gate-sizer.
Alan Mishchenko
2013-07-21
1
-1
/
+0
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