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* Adding command-line switch 'testnpn -A 12' for P-only canonical form ↵Alan Mishchenko2021-12-032-1/+15
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* Disabling choices when they are computed incorrectly.Alan Mishchenko2021-11-301-1/+5
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* Changes to make compiler happy.Alan Mishchenko2021-11-271-1/+2
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* Bug fix in sweep (which happens to be a rare bug in Abc_NodeMinimumBase).Alan Mishchenko2021-10-232-3/+3
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* Changing static to extern for two procedures.Alan Mishchenko2021-10-171-2/+2
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* Experiments with SAT solving.Alan Mishchenko2021-10-091-3/+22
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* New command &stochsyn for stochastic synthesis.Alan Mishchenko2021-10-061-0/+103
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* Changing declaration of Vec_Ptr_t sorting function to satisfy some compilers.Alan Mishchenko2021-09-267-7/+7
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* Two rare corner-case bugs in &if mapper.Alan Mishchenko2021-09-261-1/+5
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* Adding command &reshape.Alan Mishchenko2021-09-211-6/+11
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* Adding command &reshape.Alan Mishchenko2021-09-211-0/+63
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* Removing unused command.Alan Mishchenko2021-09-211-155/+0
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* Various changes.Alan Mishchenko2021-09-211-5/+9
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* Improving MiniAIG and name manager.Alan Mishchenko2021-09-161-1/+1
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* Enable command 'pipe' for pipelining.Alan Mishchenko2021-09-132-3/+12
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* Disabling command print_mint when CUDD is not used.Alan Mishchenko2021-09-071-0/+7
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* Bug fix in the timing manager.Alan Mishchenko2021-09-061-28/+30
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* Various changes.Alan Mishchenko2021-09-041-1/+1
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* Various changes.Alan Mishchenko2021-09-021-2/+16
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* Allow &mfs to work on sequential AIGs.Alan Mishchenko2021-08-241-1/+10
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* Compiler warnings.Alan Mishchenko2021-08-232-2/+4
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* Support of pair-wise miter and other changes.Alan Mishchenko2021-08-221-2/+19
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* Extending &trim to trim structurally equivalent primary outputs.Alan Mishchenko2021-08-191-3/+14
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* Improving AIG to Verilog converter.Alan Mishchenko2021-08-171-3/+8
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* Suggested changes to collect and pass timing information (unused variable).Alan Mishchenko2021-08-121-1/+1
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* Suggested changes to collect and pass timing information (compiler issues).Alan Mishchenko2021-08-121-7/+5
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* Suggested changes to collect and pass timing information.Alan Mishchenko2021-08-121-8/+50
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* Making &cec support the miter circuit.Alan Mishchenko2021-08-051-0/+14
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* Adding node ordering options to command &dfs.Alan Mishchenko2021-08-051-22/+13
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* Experiments with LUT mapping for small functions.Alan Mishchenko2021-08-021-7/+3
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* Experiments with LUT mapping for small functions.Alan Mishchenko2021-08-011-1/+2
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* Upgrading choice computation.Alan Mishchenko2021-07-312-21/+31
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* Experiments with cofactoring.Alan Mishchenko2021-07-311-6/+23
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* Experimental simulation commands.Alan Mishchenko2021-07-251-0/+180
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* Command to move CI/CO names.Alan Mishchenko2021-07-161-2/+3
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* Command to move CI/CO names.Alan Mishchenko2021-07-161-0/+63
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* Experiments with LUT mapping for small functions.Alan Mishchenko2021-07-131-3/+14
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* Experiments with CEC.Alan Mishchenko2021-07-101-4/+26
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* Experiments with MUX decomposition.Alan Mishchenko2021-07-081-1/+55
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* Adding place holder file for resub experiments.Alan Mishchenko2021-06-241-6/+7
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* Experiments with LUT mapping for small functions.Alan Mishchenko2021-06-191-25/+44
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* Experiments with cut computation.Alan Mishchenko2021-06-051-0/+1
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* Disabled special handling of 2-input LUTs.Alan Mishchenko2021-06-031-1/+1
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* Updating LUT synthesis code.Alan Mishchenko2021-05-252-35/+120
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* Adding command &extract.Alan Mishchenko2021-05-182-1/+84
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* Updating LUT synthesis code.Alan Mishchenko2021-05-163-45/+344
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* Adding switch muxes -a to create networks of ADDs.Alan Mishchenko2021-05-152-13/+36
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* Updating LUT synthesis code.Alan Mishchenko2021-05-111-14/+25
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* Disable cube-sort when deriving SOPs.Alan Mishchenko2021-05-117-10/+19
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* Updating LUT synthesis code.Alan Mishchenko2021-05-111-9/+91
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