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* Reason for assertion failure in &nf.Alan Mishchenko2015-04-031-10/+10
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* Added backward flop order to &icheck (switch -b).Alan Mishchenko2015-04-012-6/+10
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* Revising the timing manager.Alan Mishchenko2015-04-011-9/+12
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* Updating command &satfx.Alan Mishchenko2015-03-311-10/+25
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* Print-out of sequential equivalences in &scorr.Alan Mishchenko2015-03-311-8/+17
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* Changed in comparing user timing.Alan Mishchenko2015-03-311-8/+16
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* Small bug in user timing computation.Alan Mishchenko2015-03-271-1/+1
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* Bug fix in initializing user timing in 'map'.Alan Mishchenko2015-03-261-6/+6
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* Trying to reduce delay degradation afer 'map' with user timing.Alan Mishchenko2015-03-244-0/+131
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* Scalable SOP manipulation package.Alan Mishchenko2015-03-231-2/+4
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* Fix for not propagating user timing correctly after &nf.Alan Mishchenko2015-03-181-4/+39
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* Adding switch '-b' in 'read_pla'.Alan Mishchenko2015-03-181-1/+1
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* Bug fix in &cec (not generating a CEX).Alan Mishchenko2015-03-171-0/+1
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* Several bug fixes and silencing requests.Alan Mishchenko2015-03-161-1/+1
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* Adding flop-input-only switch -f in &fftest for '-S str'.Alan Mishchenko2015-03-161-1/+1
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* Enable arrival/required times in &nf.Alan Mishchenko2015-03-152-3/+28
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* Adding silent mode to &cec -m.Alan Mishchenko2015-03-151-2/+8
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* Adding flop-input-only switch -f in &fftest.Alan Mishchenko2015-03-141-2/+6
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* Adding silent mode to &splitprove.Alan Mishchenko2015-03-141-5/+9
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* Support for representing programmable cell configuration data.Alan Mishchenko2015-03-081-6/+4
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* Experiments with SAT-based cube enumeration.Alan Mishchenko2015-03-051-0/+68
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* Adding switch -x to command &fadds.Alan Mishchenko2015-02-261-5/+9
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* Committed by mistake.Alan Mishchenko2015-02-191-1/+1
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* Performance bug fix in 'clp' (different way of removing redundant fanins).Alan Mishchenko2015-02-191-1/+68
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* Propagating changes after updating flag of 'sop'.Alan Mishchenko2015-02-1910-14/+18
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* Changing semantics of switch -C in 'sop' to limit cubes at one node.Alan Mishchenko2015-02-181-8/+8
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* Modifications to read SMTLIB file from stdin.Alan Mishchenko2015-02-151-10/+18
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* Added switch -n to 'sop'.Alan Mishchenko2015-02-141-5/+7
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* Adding resource limit switch -C to 'sop'.Alan Mishchenko2015-02-1110-22/+34
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* Adding resource limit to 'fx'.Alan Mishchenko2015-02-101-2/+20
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* Adding switch '-p' to control pin-permutation in &nf.Alan Mishchenko2015-02-081-2/+6
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* Diabling pin-permutation in &nf mapper.Alan Mishchenko2015-02-081-4/+8
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* Fixed a typo in variable names.Alan Mishchenko2015-02-071-1/+1
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* Improvements and tuning of CBA with buffering/sizing.Alan Mishchenko2015-02-041-2/+2
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* Bug fix in &nf.Alan Mishchenko2015-02-021-3/+3
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* Improvements and tuning of CBA.Alan Mishchenko2015-02-011-1/+1
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* Preprocessing for multi-output PLA tables.Alan Mishchenko2015-01-311-17/+17
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* Bug fix in &cone (not able to extract the last PO).Alan Mishchenko2015-01-221-1/+1
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* Organizing commands for barbuf-aware flow.Alan Mishchenko2015-01-201-8/+13
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* Returning multiple counter-examples.Alan Mishchenko2015-01-031-2/+4
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* Exprimental features in tech-mapping.Alan Mishchenko2014-12-211-6/+12
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* Simplifying AIG with barrier buffers.Alan Mishchenko2014-12-191-2/+2
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* Integrating barrier buffers.Alan Mishchenko2014-12-131-0/+161
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* Adding relax ratio to &synch2.Alan Mishchenko2014-12-131-4/+17
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* Integrating barrier buffers.Alan Mishchenko2014-12-112-5/+24
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* Converting AIG with MUXes into a logic network.Alan Mishchenko2014-12-102-16/+53
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* New flavor of DSD-friendly 'eliminate'.Alan Mishchenko2014-12-091-3/+12
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* Integrating barrier buffers.Alan Mishchenko2014-12-085-11/+84
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* Changes to the parser.Alan Mishchenko2014-12-041-2/+2
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* Changes to the parser.Alan Mishchenko2014-12-031-0/+4
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