index
:
iCE40/abc
yosys-experimental
[no description]
summary
refs
log
tree
commit
diff
stats
log msg
author
committer
range
path:
root
/
src
/
base
/
abci
Commit message (
Expand
)
Author
Age
Files
Lines
*
Adding resource limit to stop &gla when the number of remaining objects is le...
Alan Mishchenko
2013-09-21
1
-1
/
+1
*
Added bridge integration for multi-output 'bmc3 -a'.
Alan Mishchenko
2013-09-17
1
-0
/
+1
*
Unifying standard cell library representations.
Alan Mishchenko
2013-09-17
2
-3
/
+13
*
Adding switch to enable reuse of proof-obligations in the last timeframe.
Alan Mishchenko
2013-09-16
1
-1
/
+5
*
Adding new switch to &if to relax the delay.
Alan Mishchenko
2013-09-16
1
-2
/
+14
*
Added bridge integration for multi-output 'pdr -a'.
Alan Mishchenko
2013-09-16
1
-1
/
+1
*
Added bridge integration for multi-output 'pdr -a'.
Alan Mishchenko
2013-09-16
1
-2
/
+3
*
Infrastructure to support full Liberty format and unitification of library re...
Alan Mishchenko
2013-09-15
2
-1
/
+5
*
Enabling additional printouts in 'pdr'.
Alan Mishchenko
2013-09-13
1
-0
/
+7
*
Added command &struct for profiling non-dec structures.
Alan Mishchenko
2013-09-13
1
-0
/
+61
*
Improvements to the new technology mapper.
Alan Mishchenko
2013-09-12
1
-2
/
+14
*
Improvements to the new technology mapper.
Alan Mishchenko
2013-09-12
1
-4
/
+12
*
Improvements to the new technology mapper.
Alan Mishchenko
2013-09-12
1
-2
/
+6
*
Command '&slice' to cut out the bottom part of the AIG.
Alan Mishchenko
2013-09-11
1
-0
/
+60
*
Small performance bug in new 'fx'.
Alan Mishchenko
2013-09-11
1
-1
/
+1
*
Updates for the new BMC engine.
Alan Mishchenko
2013-09-10
1
-2
/
+15
*
New API to return the set of all reachable states as an AIG.
Alan Mishchenko
2013-09-10
1
-1
/
+4
*
Updates for the new BMC engine.
Alan Mishchenko
2013-09-09
1
-3
/
+52
*
Improvements to the new technology mapper.
Alan Mishchenko
2013-09-09
1
-1
/
+32
*
Improvements to the &ps.
Alan Mishchenko
2013-09-08
1
-2
/
+6
*
Improvements to the new technology mapper.
Alan Mishchenko
2013-09-07
1
-2
/
+6
*
Improvements to the new technology mapper.
Alan Mishchenko
2013-09-07
1
-2
/
+123
*
Unifying parameters for the &ps command.
Alan Mishchenko
2013-09-05
1
-12
/
+15
*
Updates for the new BMC engine.
Alan Mishchenko
2013-09-05
1
-6
/
+11
*
Updates for the new BMC engine.
Alan Mishchenko
2013-09-05
1
-1
/
+1
*
Updates for the new BMC engine.
Alan Mishchenko
2013-09-05
1
-6
/
+12
*
Adding check to &sim3 for the case when the AIG is combinational.
Alan Mishchenko
2013-09-05
1
-1
/
+5
*
Improved unrolling manager.
Alan Mishchenko
2013-09-05
1
-7
/
+7
*
Adding switch 'ps -s' to skip counting buffers/inverters as nodes.
Alan Mishchenko
2013-09-02
1
-16
/
+10
*
Adding switch 'ps -s' to skip counting buffers/inverters as nodes.
Alan Mishchenko
2013-09-02
3
-9
/
+15
*
Removing some old useless code.
Alan Mishchenko
2013-09-02
4
-515
/
+2
*
Adding interpolant computation sat_solver2.
Alan Mishchenko
2013-09-02
3
-10
/
+19
*
Adding switch &get -m to import mapped network into the &-space.
Alan Mishchenko
2013-09-01
2
-15
/
+28
*
Buf fixes and minor changes to the &if mapper.
Alan Mishchenko
2013-08-29
1
-1
/
+1
*
Added switch &sim -g to enable flop grouping.
Alan Mishchenko
2013-08-20
1
-2
/
+6
*
Extending 'permute' to handle user-specified flop permutation.
Alan Mishchenko
2013-08-16
1
-10
/
+21
*
Enabling LUT decomposition in two special cases.
Alan Mishchenko
2013-08-14
1
-0
/
+5
*
Enabling additional matching feature in the LUT mapper.
Alan Mishchenko
2013-08-12
1
-11
/
+1
*
Enabling additional matching feature in the LUT mapper.
Alan Mishchenko
2013-08-12
1
-7
/
+31
*
Improvements to buffering and sizing.
Alan Mishchenko
2013-08-09
2
-1
/
+7
*
SAT solver with dynamic CNF loading.
Alan Mishchenko
2013-08-01
1
-0
/
+86
*
Parametrizing standard-cell mapper to account for the fanout delay.
Alan Mishchenko
2013-07-30
2
-6
/
+21
*
Compiler warning.
Alan Mishchenko
2013-07-29
1
-1
/
+1
*
Adding support for input slew and output capacitance to timer and gate-sizer ...
Alan Mishchenko
2013-07-24
1
-0
/
+24
*
Tuning standard-cell mapping flow.
Alan Mishchenko
2013-07-24
2
-17
/
+51
*
Tuning standard-cell mapping flow.
Alan Mishchenko
2013-07-23
1
-16
/
+28
*
Bug fix and warning print.
Alan Mishchenko
2013-07-22
1
-2
/
+42
*
Memory leaks.
Alan Mishchenko
2013-07-21
1
-8
/
+4
*
Adding support for input slew and output capacitance to timer and gate-sizer.
Alan Mishchenko
2013-07-21
1
-2
/
+2
*
Adding support for input slew (.input_drive) and output capacitance (.output_...
Alan Mishchenko
2013-07-21
3
-111
/
+159
[next]