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path: root/src/base/io/io.c
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* Merge remote-tracking branch 'upstream/master' into yosys-experimentalMiodrag Milanovic2022-07-041-19/+87
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| * Supporting new resub problem format.Alan Mishchenko2022-06-021-0/+53
| * Improving truth table handling.Alan Mishchenko2022-02-161-0/+10
| * Improving truth table handling.Alan Mishchenko2022-02-031-19/+24
* | read_cex: Allow reading cex that has extra registersJannis Harder2022-07-011-0/+6
* | distinquish between old and new format as wellMiodrag Milanovic2022-05-061-3/+3
* | Give more reasonable error on read_cex and handle statusMiodrag Milanovic2022-05-061-4/+7
* | Fix for unhandled aiw file commandsMiodrag Milanovic2022-04-151-2/+2
* | Make read_cex able to append if some latches are missingMiodrag Milanovic2022-04-131-3/+11
* | fix buffer errorMiodrag Milanovic2022-03-221-2/+5
* | gcc 4.8 fixMiodrag Milanovic2022-03-041-3/+3
* | read_cex (#12)Miodrag Milanović2022-03-041-7/+285
* | Fixes and more cleanups in write_cex output codeClaire Xenia Wolf2022-02-151-34/+27
* | Cleanups in write_cex output formatClaire Xenia Wolf2022-02-151-2/+7
* | Enable writing of minimized Cex in non-names modeClaire Xenia Wolf2022-02-151-3/+7
* | write_cex - add minimize using algorithm from cexinfo commandMiodrag Milanovic2021-11-191-4/+36
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* Updating LUT synthesis code.Alan Mishchenko2021-05-161-5/+15
* Adding an option to write Verilog with LUT instances (compiler warnings).Alan Mishchenko2020-10-311-1/+1
* Adding an option to write Verilog with LUT instances.Alan Mishchenko2020-10-311-3/+19
* Fixing a clang error related to 'unlink'.Alan Mishchenko2020-10-091-0/+3
* New command 'read_sf'.Alan Mishchenko2020-10-011-0/+73
* Ongoing changes to the simulator.Alan Mishchenko2020-03-091-0/+2
* Adding CNF variable mapping rules.Alan Mishchenko2020-01-181-0/+11
* Updates to JSON parser.Alan Mishchenko2019-12-021-6/+12
* Adding logfile dump to print_status.Alan Mishchenko2019-11-251-0/+26
* Dumping multiple counter-examples.Alan Mishchenko2019-11-191-1/+1
* Dumping multiple counter-examples.Alan Mishchenko2019-11-191-1/+1
* Dumping multiple counter-examples.Alan Mishchenko2019-11-191-104/+139
* Adding synonym of 'read_dsd'.Alan Mishchenko2019-06-201-0/+1
* Modifying 'write_truth' to dump truth table in hex.Alan Mishchenko2019-05-071-3/+11
* Adding switch 'read_truth -f <file_name>' to read truth table from file.Alan Mishchenko2019-04-151-9/+22
* Add skip feature to CEX printing.Alan Mishchenko2019-02-081-1/+9
* Exploring other ways of CEX writing.Alan Mishchenko2019-01-211-5/+51
* Undoing some recent changes for improved CEX writing.Alan Mishchenko2019-01-211-65/+8
* Fixing the problem with outputting word-level CEXes after retiming.Alan Mishchenko2019-01-181-12/+28
* Fixing the problem with outputting word-level CEXes after retiming.Alan Mishchenko2019-01-171-19/+37
* Fixing the problem with outputting word-level CEXes.Alan Mishchenko2019-01-161-1/+24
* Various usability changes.Alan Mishchenko2018-11-181-3/+14
* Adding switch to 'write_pla' to write random onset minterms of the first PO f...Alan Mishchenko2018-09-281-8/+31
* Integrating SAT-based CEX minimization (bug fix).Alan Mishchenko2018-03-251-2/+2
* Integrating SAT-based CEX minimization.Alan Mishchenko2018-03-251-8/+20
* Adding switch -a to 'write_verilog' to write factored forms without XORs and ...Alan Mishchenko2017-12-031-3/+16
* Adding PDR with abstraction.Alan Mishchenko2017-02-101-1/+1
* Improving CEX minimization.Alan Mishchenko2017-02-101-1/+1
* Updates to arithmetic verification.Alan Mishchenko2017-01-301-1/+1
* Commenting out bailout in 'print_cex' when CEX has latches initialized to 1.Alan Mishchenko2016-11-301-1/+2
* Parser for JSON format.Alan Mishchenko2016-10-251-2/+115
* New multi-output PLA reader and preprocessor (read_plamo) (added dist-1 merge).Alan Mishchenko2016-06-161-5/+9
* New multi-output PLA reader and preprocessor (read_plamo).Alan Mishchenko2016-06-161-0/+52
* Detecting properties of internal nodes.Alan Mishchenko2016-06-121-0/+58