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* Compiler warnings.Alan Mishchenko2013-10-171-4/+8
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* Debugging and finetuning the flow.Alan Mishchenko2013-09-172-1/+3
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* Unifying standard cell library representations.Alan Mishchenko2013-09-171-1/+1
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* Adding switch 'ps -s' to skip counting buffers/inverters as nodes.Alan Mishchenko2013-09-021-2/+0
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* Removing some old useless code.Alan Mishchenko2013-09-021-4/+0
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* Removing some old useless code.Alan Mishchenko2013-09-022-257/+2
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* Adding support for input slew and output capacitance to timer and gate-sizer ↵Alan Mishchenko2013-07-241-2/+20
| | | | (bug fix).
* Tuning standard-cell mapping flow.Alan Mishchenko2013-07-231-1/+1
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* Improvements to post-mapping re-sizing.Alan Mishchenko2013-07-211-14/+16
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* Memory leaks.Alan Mishchenko2013-07-211-1/+1
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* Adding support for input slew (.input_drive) and output capacitance ↵Alan Mishchenko2013-07-212-0/+211
| | | | (.output_load) in BLIF reader/writer.
* Adding a wrapper around clock() for more accurate time counting in ABC.Alan Mishchenko2013-05-271-18/+18
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* New MFS package.Alan Mishchenko2013-05-241-4/+4
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* Commenting assertion that does not hold in AIGER 1.9, accoring to Baruch Sterin.Alan Mishchenko2013-05-131-1/+1
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* Enabled 'cec' to be applied to networks derived from BLIF with EXDCs.Alan Mishchenko2013-04-181-3/+4
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* Enabled reading the EXDC network by the default BLIF reader.Alan Mishchenko2013-04-182-5/+29
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* Fixing both AIGER readers (read_aiger and &r) to work with AIGER 1.9 (except ↵Alan Mishchenko2013-04-181-2/+8
| | | | for liveness properties).
* Fixing both AIGER readers (read_aiger and &r) to work with AIGER 1.9 (except ↵Alan Mishchenko2013-04-171-4/+4
| | | | for liveness properties).
* Bug fix in 'write_pla'.Alan Mishchenko2013-04-151-1/+1
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* Improvements to the hierarchy/timing manager.Alan Mishchenko2013-03-051-0/+2
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* Fixing compilation problems on Linux-32 related to constants of type ↵Alan Mishchenko2013-01-301-12/+12
| | | | unsigned long long.
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-0/+3
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* Improvements to LMS code.Alan Mishchenko2012-11-061-2/+2
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* Adding binary file dumping for truth tables.Alan Mishchenko2012-10-251-1/+1
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* Adding binary file dumping for truth tables.Alan Mishchenko2012-10-251-4/+18
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* Added hierarchical BLIF output for mapping with LUT structures (write_blif ↵Alan Mishchenko2012-10-243-15/+296
| | | | -a -S <XYZ>).
* Bug fix in hierarchical BLIF reader.Alan Mishchenko2012-10-111-3/+2
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* Added command to transform GIA into the file with truth tables for each output.Alan Mishchenko2012-10-101-0/+77
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* Making explicit cast to 64-bit unsigned in a few places.Alan Mishchenko2012-10-091-1/+1
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* C++ portability changes.Alan Mishchenko2012-10-031-1/+1
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* Replacing 'st_table' by 'st__table' to resolve linker problems.Alan Mishchenko2012-09-291-1/+1
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* Cleaned up interfaces of genlib/liberty/supergate reading/writing.Alan Mishchenko2012-09-251-5/+18
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* Changed printouts in a few places in supergate computation.Alan Mishchenko2012-09-241-0/+2
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* Added simplification before the concurrent call to PDR.Alan Mishchenko2012-09-201-2/+2
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* Modified 'read' to read all types of libraries (genlib, liberty, scl).Alan Mishchenko2012-09-201-0/+2
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* Modified 'read' to read all types of libraries (genlib, liberty, scl).Alan Mishchenko2012-09-202-2/+17
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* Fixes to Verilog parser.Alan Mishchenko2012-09-201-0/+6
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* Extending Liberty parser to handle multi-output cells.Alan Mishchenko2012-09-191-6/+6
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* Extending Liberty parser to handle multi-output cells.Alan Mishchenko2012-09-191-18/+7
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* Extending BLIF parser/write to hangle multi-output cells.Alan Mishchenko2012-09-193-93/+210
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* Created new abstraction package from the code that was all over the place.Alan Mishchenko2012-09-151-0/+1
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* Scalable gate-level abstraction.Alan Mishchenko2012-09-111-9/+30
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* Fixing Verilog writer's way of writing module names.Alan Mishchenko2012-09-111-1/+1
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* Fixing the way constants are written into mapped Verilog files.Alan Mishchenko2012-08-311-0/+5
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* Updating project settings to have simpler include paths.Alan Mishchenko2012-07-0717-37/+37
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* Fixing time primtouts throughout the code.Alan Mishchenko2012-07-071-1/+2
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* Fixing time primtouts throughout the code.Alan Mishchenko2012-07-073-5/+3
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* Diabling compact AIGER writing by default.Alan Mishchenko2012-07-071-1/+1
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* Improving printouts of critical path.Alan Mishchenko2012-04-091-2/+4
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* Silencing a gcc warning.Alan Mishchenko2012-03-231-1/+1
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