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wlc
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wlc.h
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Author
Age
Files
Lines
*
Changes to Wlc to accommodate signed signals in SMT-LIB.
Alan Mishchenko
2016-06-07
1
-0
/
+2
*
New profiling features for word-level optimizations.
Alan Mishchenko
2016-06-04
1
-1
/
+1
*
Improving SMT-LIB parser.
Alan Mishchenko
2016-05-23
1
-8
/
+10
*
Improving SMT-LIB parser.
Alan Mishchenko
2016-05-21
1
-36
/
+37
*
Improving SMT-LIB parser.
Alan Mishchenko
2016-05-20
1
-0
/
+2
*
Enabling AIGs without structural hashing.
Alan Mishchenko
2016-05-20
1
-1
/
+1
*
Experiments with CEC for arithmetic circuits.
Alan Mishchenko
2016-05-07
1
-0
/
+1
*
Supporting negative and reverse ranges of word-level variables in Wlc.
Alan Mishchenko
2016-04-04
1
-38
/
+40
*
Supporting bit-wise XNOR operator in Wlc_Ntk_t.
Alan Mishchenko
2016-03-18
1
-0
/
+1
*
Supporting complemented reduction operators.
Alan Mishchenko
2016-03-10
1
-0
/
+3
*
Adding support for a different bit-blasting of a multiplier and squarer.
Alan Mishchenko
2016-02-12
1
-2
/
+3
*
Supporting X-valued constants in Wlc_Ntk_t.
Alan Mishchenko
2016-02-02
1
-0
/
+1
*
Improving Wlc_Ntk_t data-structure by extending bit-ranges up to 4B enabling ...
Alan Mishchenko
2015-07-16
1
-4
/
+4
*
Improved bit-blasting of various operators in Wlc_Ntk_t; added SQRT operator ...
Alan Mishchenko
2015-07-14
1
-2
/
+4
*
Bug fixing in %blast when blasting MUX coming from always-statement.
Alan Mishchenko
2015-07-07
1
-1
/
+1
*
Bug fixing in %blast when blasting mod operator (handling zero divisor).
Alan Mishchenko
2015-07-07
1
-1
/
+1
*
Adding new debugging feature to Wlc_Ntk_t.
Alan Mishchenko
2015-06-19
1
-0
/
+1
*
Sequential word-level simulator for Wlc_Ntk_t.
Alan Mishchenko
2015-06-04
1
-0
/
+4
*
Fix inconsistency between operators and symbols in Wlc_Ntk_t.
Alan Mishchenko
2015-04-25
1
-19
/
+19
*
Modifications to read SMTLIB file from stdin.
Alan Mishchenko
2015-02-18
1
-3
/
+2
*
Modifications to read SMTLIB file from stdin.
Alan Mishchenko
2015-02-15
1
-18
/
+21
*
Modifications to read SMTLIB file from stdin.
Alan Mishchenko
2015-02-11
1
-0
/
+6
*
Added SMT parser for Wlc_Ntk_t.
Alan Mishchenko
2015-02-07
1
-2
/
+4
*
Outputting initial state in Wlc_Ntk_t.
Alan Mishchenko
2015-01-25
1
-1
/
+1
*
Support of init-state in AIGs derived from word-level designs in Wlc_Ntk_t.
Alan Mishchenko
2015-01-21
1
-0
/
+2
*
Improvements to word-level network package.
Alan Mishchenko
2014-11-14
1
-56
/
+63
*
Enabling AIGs with boxes for word-level and sequential designs.
Alan Mishchenko
2014-11-13
1
-1
/
+4
*
Support for sequential designs in word-level Verilog.
Alan Mishchenko
2014-09-26
1
-7
/
+25
*
Enabling print-out, for each operator, of the percetage of AND nodes after bi...
Alan Mishchenko
2014-09-25
1
-1
/
+2
*
Printing node type statistics.
Alan Mishchenko
2014-09-24
1
-0
/
+2
*
Improvements to word-level Verilog parser.
Alan Mishchenko
2014-09-17
1
-69
/
+72
*
Improvements to word-level Verilog parser.
Alan Mishchenko
2014-09-16
1
-1
/
+5
*
Compiler error (duplicate typedef).
Alan Mishchenko
2014-09-15
1
-1
/
+0
*
Compiler warnings.
Alan Mishchenko
2014-09-12
1
-45
/
+1
*
New word-level representation package.
Alan Mishchenko
2014-09-12
1
-0
/
+273