| Commit message (Collapse) | Author | Age | Files | Lines | |
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| * | Experimental cost function in technology mapping. | Alan Mishchenko | 2020-11-01 | 1 | -1/+5 |
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| * | Adding an option to write Verilog with LUT instances (compiler warnings). | Alan Mishchenko | 2020-10-31 | 2 | -3/+3 |
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| * | Adding an option to write Verilog with LUT instances. | Alan Mishchenko | 2020-10-31 | 2 | -3/+196 |
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| * | Fixing a clang error related to 'unlink'. | Alan Mishchenko | 2020-10-09 | 1 | -0/+3 |
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| * | New command 'read_sf'. | Alan Mishchenko | 2020-10-01 | 2 | -0/+128 |
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| * | Changing SAT sweepers (ifraig and &fraig) to be stronger by default. | Alan Mishchenko | 2020-09-24 | 1 | -1/+2 |
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| * | Improving MFFC computation code. | Alan Mishchenko | 2020-09-17 | 6 | -172/+181 |
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| * | Compiler warnings. | Alan Mishchenko | 2020-09-13 | 1 | -1/+1 |
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| * | Experiments with iterative synthesis. | Alan Mishchenko | 2020-09-13 | 4 | -37/+120 |
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| * | Adding switch &cec -w to print SAT solver stats. | Alan Mishchenko | 2020-09-06 | 1 | -2/+6 |
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| * | Fixing a typo in setting the miter type. | Alan Mishchenko | 2020-09-06 | 1 | -1/+1 |
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| * | Verifying new resub code. | Alan Mishchenko | 2020-09-06 | 1 | -0/+1 |
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| * | Experiments with ICCAD CAD benchmarks (Problem A). | Alan Mishchenko | 2020-09-03 | 2 | -7/+627 |
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| * | Experiments with window computation. | Alan Mishchenko | 2020-08-15 | 1 | -0/+1 |
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| * | Making &cec use precomputed simulation info. | Alan Mishchenko | 2020-08-12 | 1 | -0/+5 |
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| * | New ways of reading MiniAIG. | Alan Mishchenko | 2020-07-29 | 1 | -3/+10 |
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| * | Experiment with structural similarity. | Alan Mishchenko | 2020-07-16 | 2 | -0/+75 |
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| * | Fixing commands 'putontop' and 'topmost'; adding command 'bottommost'. | Alan Mishchenko | 2020-07-11 | 2 | -16/+171 |
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| * | Bug fix in &cec (properly updating the status after the corner case bug fix\). | Alan Mishchenko | 2020-06-24 | 1 | -0/+1 |
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| * | Bug fix in &cec (handling the case when the miter is disproved by the all-0 ↵ | Alan Mishchenko | 2020-06-24 | 1 | -5/+23 |
| | | | | | pattern). | ||||
| * | Compiler error. | Alan Mishchenko | 2020-06-04 | 1 | -4/+4 |
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| * | Experimental simulation. | Alan Mishchenko | 2020-06-04 | 1 | -1/+1 |
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| * | Experimental simulation. | Alan Mishchenko | 2020-06-03 | 1 | -1/+1 |
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| * | Dumping BDD variable order after 'clp'. | Alan Mishchenko | 2020-05-18 | 6 | -10/+27 |
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| * | Experimental resubstitution. | Alan Mishchenko | 2020-05-15 | 1 | -5/+5 |
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| * | Adding new utility procedures. | Alan Mishchenko | 2020-05-11 | 6 | -45/+159 |
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| * | Adding new utility procedures. | Alan Mishchenko | 2020-05-10 | 3 | -9/+172 |
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| * | Fixing the accidentally broken build. | Alan Mishchenko | 2020-05-06 | 1 | -1/+0 |
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| * | Experiment with permutations. | Alan Mishchenko | 2020-05-03 | 1 | -1/+2 |
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| * | Compiler warnings and errors. | Alan Mishchenko | 2020-05-03 | 2 | -5/+3 |
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| * | Experimental resubstitution. | Alan Mishchenko | 2020-05-03 | 3 | -2/+106 |
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| * | Merge pull request #57 from whitequark/patch-1 | alanminko | 2020-04-30 | 1 | -2/+2 |
| |\ | | | | | Make use of setrlimit conditional on ABC_NO_RLIMIT | ||||
| | * | Make use of setrlimit conditional on ABC_NO_RLIMIT. | whitequark | 2020-04-30 | 1 | -2/+2 |
| | | | | | | | | | | | This is useful for POSIX-like platforms that do not have rlimit, such as WASI. | ||||
| * | | Bug fix in 'resub' to enable additional divisors, by Siang-Yun Lee. | Alan Mishchenko | 2020-04-27 | 1 | -124/+368 |
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| * | New AIG restructuring feature. | Alan Mishchenko | 2020-04-23 | 1 | -0/+49 |
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| * | Fix a bug in comb loop detection. | Alan Mishchenko | 2020-04-22 | 4 | -17/+22 |
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| * | Improving simulation patterns by local search. | Alan Mishchenko | 2020-04-17 | 1 | -0/+1 |
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| * | Improving simulation patterns by local search. | Alan Mishchenko | 2020-04-17 | 1 | -28/+129 |
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| * | Fixing broken build and compiler warnings. | Alan Mishchenko | 2020-04-17 | 2 | -3/+3 |
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| * | Fixing broken build and compiler warnings. | Alan Mishchenko | 2020-04-17 | 1 | -1/+1 |
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| * | Fixing broken build and compiler warnings. | Alan Mishchenko | 2020-04-17 | 6 | -8/+8 |
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| * | Removing debug stop. | Alan Mishchenko | 2020-04-17 | 1 | -4/+0 |
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| * | Memory leak. | Alan Mishchenko | 2020-04-17 | 1 | -0/+3 |
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| * | Adding check for comb loops in NDR. | Alan Mishchenko | 2020-04-17 | 3 | -1/+141 |
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| * | QBF-based code generation. | Alan Mishchenko | 2020-04-12 | 1 | -5/+90 |
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| * | Procedures to explore structural support of an AIG. | Alan Mishchenko | 2020-04-10 | 1 | -0/+1 |
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| * | Various changes. | Alan Mishchenko | 2020-04-10 | 2 | -1/+3 |
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| * | Various changes. | Alan Mishchenko | 2020-04-10 | 3 | -20/+151 |
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| * | Debugging a combo loop in NDR. | Alan Mishchenko | 2020-04-09 | 1 | -2/+3 |
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| * | Adding option to &saveaig to compare AIGs by node count. | Alan Mishchenko | 2020-04-09 | 1 | -0/+3 |
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index : iCE40/abc | |
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