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* New logic sharing extraction.Alan Mishchenko2013-09-281-3/+8
* New logic sharing extraction.Alan Mishchenko2013-09-281-11/+21
* Performance balancing command &b.Alan Mishchenko2013-09-271-0/+74
* Generation of plain AIG after mapping.Alan Mishchenko2013-09-271-1/+1
* Generation of plain AIG after mapping.Alan Mishchenko2013-09-271-4/+7
* Bug fix.Alan Mishchenko2013-09-271-1/+1
* Improving DAG-aware unmapping.Alan Mishchenko2013-09-251-3/+5
* Changes to enable decomposition of non-DSD functions.Alan Mishchenko2013-09-251-1/+9
* Changing switch -R <num> in &gla to mean the max allowed size of abstraction....Alan Mishchenko2013-09-231-3/+15
* Adding API to return the mapped network.Alan Mishchenko2013-09-221-3/+4
* Adding API to return the mapped network.Alan Mishchenko2013-09-222-2/+160
* Adding resource limit to stop &gla when the number of remaining objects is le...Alan Mishchenko2013-09-211-1/+1
* Added bridge integration for multi-output 'bmc3 -a'.Alan Mishchenko2013-09-171-0/+1
* Debugging and finetuning the flow.Alan Mishchenko2013-09-172-1/+3
* Adding commands to set and print timing constraints.Alan Mishchenko2013-09-173-0/+14
* Unifying standard cell library representations.Alan Mishchenko2013-09-174-4/+17
* Adding switch to enable reuse of proof-obligations in the last timeframe.Alan Mishchenko2013-09-161-1/+5
* Adding new switch to &if to relax the delay.Alan Mishchenko2013-09-161-2/+14
* Added bridge integration for multi-output 'pdr -a'.Alan Mishchenko2013-09-161-1/+1
* Added bridge integration for multi-output 'pdr -a'.Alan Mishchenko2013-09-161-2/+3
* Infrastructure to support full Liberty format and unitification of library re...Alan Mishchenko2013-09-152-1/+5
* Enabling additional printouts in 'pdr'.Alan Mishchenko2013-09-131-0/+7
* Added command &struct for profiling non-dec structures.Alan Mishchenko2013-09-131-0/+61
* Fix a bug in 'zeropo'.Alan Mishchenko2013-09-131-1/+1
* Improvements to the new technology mapper.Alan Mishchenko2013-09-121-2/+14
* Improvements to the new technology mapper.Alan Mishchenko2013-09-121-4/+12
* Improvements to the new technology mapper.Alan Mishchenko2013-09-121-2/+6
* Command '&slice' to cut out the bottom part of the AIG.Alan Mishchenko2013-09-111-0/+60
* Small performance bug in new 'fx'.Alan Mishchenko2013-09-111-1/+1
* Updates for the new BMC engine.Alan Mishchenko2013-09-101-2/+15
* New API to return the set of all reachable states as an AIG.Alan Mishchenko2013-09-101-1/+4
* Updates for the new BMC engine.Alan Mishchenko2013-09-091-3/+52
* Improvements to the new technology mapper.Alan Mishchenko2013-09-091-1/+32
* Improvements to the &ps.Alan Mishchenko2013-09-081-2/+6
* Improvements to the new technology mapper.Alan Mishchenko2013-09-071-2/+6
* Improvements to the new technology mapper.Alan Mishchenko2013-09-071-2/+123
* Unifying parameters for the &ps command.Alan Mishchenko2013-09-052-15/+18
* Updates for the new BMC engine.Alan Mishchenko2013-09-051-6/+11
* Updates for the new BMC engine.Alan Mishchenko2013-09-051-1/+1
* Updates for the new BMC engine.Alan Mishchenko2013-09-051-6/+12
* Adding check to &sim3 for the case when the AIG is combinational.Alan Mishchenko2013-09-051-1/+5
* Improved unrolling manager.Alan Mishchenko2013-09-051-7/+7
* Added Python API status_get_vector() similar to cex_get_vector().Alan Mishchenko2013-09-042-0/+2
* Adding switch 'ps -s' to skip counting buffers/inverters as nodes.Alan Mishchenko2013-09-021-16/+10
* Adding switch 'ps -s' to skip counting buffers/inverters as nodes.Alan Mishchenko2013-09-027-13/+38
* Removing some old useless code.Alan Mishchenko2013-09-021-4/+0
* Removing some old useless code.Alan Mishchenko2013-09-029-816/+5
* Adding interpolant computation sat_solver2.Alan Mishchenko2013-09-024-11/+20
* Modify level computation to take discretized arrival times into account.Alan Mishchenko2013-09-021-3/+7
* Adding switch &get -m to import mapped network into the &-space.Alan Mishchenko2013-09-011-2/+2
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