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* Adding switch &get -m to import mapped network into the &-space.Alan Mishchenko2013-09-014-15/+141
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* Buf fixes and minor changes to the &if mapper.Alan Mishchenko2013-08-291-1/+1
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* Added switch &sim -g to enable flop grouping.Alan Mishchenko2013-08-201-2/+6
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* Extending 'permute' to handle user-specified flop permutation.Alan Mishchenko2013-08-163-13/+81
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* Enabling LUT decomposition in two special cases.Alan Mishchenko2013-08-141-0/+5
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* Enabling additional matching feature in the LUT mapper.Alan Mishchenko2013-08-121-11/+1
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* Enabling additional matching feature in the LUT mapper.Alan Mishchenko2013-08-121-7/+31
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* Improvements to buffering and sizing.Alan Mishchenko2013-08-092-1/+7
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* Integrated buffering and sizing.Alan Mishchenko2013-08-082-0/+5
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* Improvements to buffering and sizing.Alan Mishchenko2013-08-062-0/+8
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* Improvements to buffering and sizing.Alan Mishchenko2013-08-061-2/+2
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* Adding new (un)buffering with phase information.Alan Mishchenko2013-08-053-1/+35
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* Code for parsing the transcripts.Alan Mishchenko2013-08-021-0/+18
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* SAT solver with dynamic CNF loading.Alan Mishchenko2013-08-011-0/+86
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* Code for parsing the transcripts.Alan Mishchenko2013-07-301-0/+124
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* Parametrizing standard-cell mapper to account for the fanout delay.Alan Mishchenko2013-07-302-6/+21
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* Added commands 'maxsize' and 'unbuffer'.Alan Mishchenko2013-07-291-0/+6
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* Compiler warning.Alan Mishchenko2013-07-291-1/+1
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* Adding support for input slew and output capacitance to timer and gate-sizer ↵Alan Mishchenko2013-07-243-4/+46
| | | | (bug fix).
* Tuning standard-cell mapping flow.Alan Mishchenko2013-07-244-17/+53
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* Tuning standard-cell mapping flow.Alan Mishchenko2013-07-232-17/+29
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* Bug fix and warning print.Alan Mishchenko2013-07-221-2/+42
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* Improvements to post-mapping re-sizing.Alan Mishchenko2013-07-211-14/+16
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* Memory leaks.Alan Mishchenko2013-07-212-9/+5
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* Adding support for input slew and output capacitance to timer and gate-sizer.Alan Mishchenko2013-07-212-3/+2
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* Adding support for input slew (.input_drive) and output capacitance ↵Alan Mishchenko2013-07-217-115/+387
| | | | (.output_load) in BLIF reader/writer.
* New technology mapper.Alan Mishchenko2013-07-181-4/+8
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* New technology mapper.Alan Mishchenko2013-07-171-11/+48
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* Improved printout of XOR/MUX/AND in 'print_stats'.Alan Mishchenko2013-07-161-12/+18
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* Imporvements to 'eliminate'.Alan Mishchenko2013-07-162-8/+40
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* Adding another network duplicator.Alan Mishchenko2013-07-161-2/+2
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* Adding another network duplicator.Alan Mishchenko2013-07-161-0/+58
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* New technology mapper.Alan Mishchenko2013-07-152-3/+17
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* New technology mapper.Alan Mishchenko2013-07-141-2/+2
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* New technology mapper.Alan Mishchenko2013-07-142-4/+23
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* New technology mapper.Alan Mishchenko2013-07-131-3/+8
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* New technology mapper.Alan Mishchenko2013-07-131-2/+6
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* New technology mapper.Alan Mishchenko2013-07-131-1/+1
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* New technology mapper.Alan Mishchenko2013-07-121-4/+33
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* Compiler warnings.Alan Mishchenko2013-07-121-1/+1
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* Compiler warnings.Alan Mishchenko2013-07-122-24/+24
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* New technology mapper.Alan Mishchenko2013-07-121-8/+85
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* Compiler problem.Alan Mishchenko2013-07-012-150/+150
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* Compiler problem.Alan Mishchenko2013-07-011-20/+20
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* Fixing a typo.Alan Mishchenko2013-07-011-1/+1
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* Adding commands 'bm2' and 'saucy3' developed by Hadi Katebi, Igor Markov, ↵Alan Mishchenko2013-07-013-0/+3614
| | | | and Karem Sakallah at U Michigan.
* Updating new mapper.Alan Mishchenko2013-06-291-4/+5
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* Adding timeout to command 'ind'.Alan Mishchenko2013-06-282-8/+22
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* Data-structure experiment.Alan Mishchenko2013-06-271-4/+4
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* Unifying representation of mapping in GIA.Alan Mishchenko2013-06-253-9/+118
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