summaryrefslogtreecommitdiffstats
path: root/src/base
Commit message (Expand)AuthorAgeFilesLines
* Experiments with SAT sweeping.Alan Mishchenko2020-11-101-7/+23
* Setting default conflict limit in &fraig to be high.Alan Mishchenko2020-11-091-0/+1
* Experiments with SAT sweeping.Alan Mishchenko2020-11-091-2/+8
* Trying to explicitly compute don't-cares during optimization.Alan Mishchenko2020-11-012-5/+14
* Experimental cost function in technology mapping.Alan Mishchenko2020-11-011-1/+5
* Adding an option to write Verilog with LUT instances (compiler warnings).Alan Mishchenko2020-10-312-3/+3
* Adding an option to write Verilog with LUT instances.Alan Mishchenko2020-10-312-3/+196
* Fixing a clang error related to 'unlink'.Alan Mishchenko2020-10-091-0/+3
* New command 'read_sf'.Alan Mishchenko2020-10-012-0/+128
* Changing SAT sweepers (ifraig and &fraig) to be stronger by default.Alan Mishchenko2020-09-241-1/+2
* Improving MFFC computation code.Alan Mishchenko2020-09-176-172/+181
* Compiler warnings.Alan Mishchenko2020-09-131-1/+1
* Experiments with iterative synthesis.Alan Mishchenko2020-09-134-37/+120
* Adding switch &cec -w to print SAT solver stats.Alan Mishchenko2020-09-061-2/+6
* Fixing a typo in setting the miter type.Alan Mishchenko2020-09-061-1/+1
* Verifying new resub code.Alan Mishchenko2020-09-061-0/+1
* Experiments with ICCAD CAD benchmarks (Problem A).Alan Mishchenko2020-09-032-7/+627
* Experiments with window computation.Alan Mishchenko2020-08-151-0/+1
* Making &cec use precomputed simulation info.Alan Mishchenko2020-08-121-0/+5
* New ways of reading MiniAIG.Alan Mishchenko2020-07-291-3/+10
* Experiment with structural similarity.Alan Mishchenko2020-07-162-0/+75
* Fixing commands 'putontop' and 'topmost'; adding command 'bottommost'.Alan Mishchenko2020-07-112-16/+171
* Bug fix in &cec (properly updating the status after the corner case bug fix\).Alan Mishchenko2020-06-241-0/+1
* Bug fix in &cec (handling the case when the miter is disproved by the all-0 p...Alan Mishchenko2020-06-241-5/+23
* Compiler error.Alan Mishchenko2020-06-041-4/+4
* Experimental simulation.Alan Mishchenko2020-06-041-1/+1
* Experimental simulation.Alan Mishchenko2020-06-031-1/+1
* Dumping BDD variable order after 'clp'.Alan Mishchenko2020-05-186-10/+27
* Experimental resubstitution.Alan Mishchenko2020-05-151-5/+5
* Adding new utility procedures.Alan Mishchenko2020-05-116-45/+159
* Adding new utility procedures.Alan Mishchenko2020-05-103-9/+172
* Fixing the accidentally broken build.Alan Mishchenko2020-05-061-1/+0
* Experiment with permutations.Alan Mishchenko2020-05-031-1/+2
* Compiler warnings and errors.Alan Mishchenko2020-05-032-5/+3
* Experimental resubstitution.Alan Mishchenko2020-05-033-2/+106
* Merge pull request #57 from whitequark/patch-1alanminko2020-04-301-2/+2
|\
| * Make use of setrlimit conditional on ABC_NO_RLIMIT.whitequark2020-04-301-2/+2
* | Bug fix in 'resub' to enable additional divisors, by Siang-Yun Lee.Alan Mishchenko2020-04-271-124/+368
|/
* New AIG restructuring feature.Alan Mishchenko2020-04-231-0/+49
* Fix a bug in comb loop detection.Alan Mishchenko2020-04-224-17/+22
* Improving simulation patterns by local search.Alan Mishchenko2020-04-171-0/+1
* Improving simulation patterns by local search.Alan Mishchenko2020-04-171-28/+129
* Fixing broken build and compiler warnings.Alan Mishchenko2020-04-172-3/+3
* Fixing broken build and compiler warnings.Alan Mishchenko2020-04-171-1/+1
* Fixing broken build and compiler warnings.Alan Mishchenko2020-04-176-8/+8
* Removing debug stop.Alan Mishchenko2020-04-171-4/+0
* Memory leak.Alan Mishchenko2020-04-171-0/+3
* Adding check for comb loops in NDR.Alan Mishchenko2020-04-173-1/+141
* QBF-based code generation.Alan Mishchenko2020-04-121-5/+90
* Procedures to explore structural support of an AIG.Alan Mishchenko2020-04-101-0/+1