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* Added switches '-c' and '-n' to 'init'.Alan Mishchenko2014-11-022-13/+49
* Compiler warnings.Alan Mishchenko2014-10-281-1/+1
* Changes to enable building external code.Alan Mishchenko2014-10-283-32/+2
* Changes to enable building external code.Alan Mishchenko2014-10-273-378/+376
* Changing switch -v in 'qbf' and '&qbf' to be non-verbose by default.Alan Mishchenko2014-10-261-2/+2
* New command &satenum to enumerate SAT assignments of a miter in a naive way.Alan Mishchenko2014-10-251-0/+69
* Adding switch &fftest -N <num> to detect fixed vars after each <num> iterations.Alan Mishchenko2014-10-251-2/+14
* Merged in sterin/abc (pull request #9)Alan Mishchenko2014-10-232-0/+45
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| * make it easy to add intialization functions to Abc_FrameInit()/Abc_FrameEnd()Baruch Sterin2014-10-222-0/+45
* | One bug fix and two small changes.Alan Mishchenko2014-10-221-2/+2
* | One bug fix and two small changes.Alan Mishchenko2014-10-222-7/+13
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* Disabling MiniSAT 2.2 for now.Alan Mishchenko2014-10-211-1/+1
* Compiler problems.Alan Mishchenko2014-10-211-1/+5
* Preparing to work with C++ code.Alan Mishchenko2014-10-212-0/+44
* Adding commands backup/restore.Alan Mishchenko2014-10-213-0/+84
* Adding switch &qbf -q to quantify functional variables.Alan Mishchenko2014-10-201-2/+20
* Improved QBF solver.Alan Mishchenko2014-10-181-2/+125
* Fixed "bm" command hang issue.grigora2014-10-111-7/+6
* Improvements to the parser.Alan Mishchenko2014-10-101-7/+86
* Naive (SAT-only) CEC option.Alan Mishchenko2014-10-101-2/+6
* Bug fix in the bit-blaster.Alan Mishchenko2014-10-101-3/+3
* Improvements to ISOP.Alan Mishchenko2014-10-102-5/+7
* Improvements to ISOP.Alan Mishchenko2014-10-102-4/+10
* Detection of threshold functions.Alan Mishchenko2014-10-082-3/+25
* Bug fix in move_names.Alan Mishchenko2014-10-051-0/+1
* Deriving cell mapping with &if -kz.Alan Mishchenko2014-10-041-1/+6
* Deriving cell mapping with &if -kz.Alan Mishchenko2014-10-041-1/+14
* Deriving AIG after cell mapping.Alan Mishchenko2014-10-032-2/+29
* Bug fix in Verilog writer.Alan Mishchenko2014-10-021-8/+8
* Adding switch -R to 'if'.Alan Mishchenko2014-10-021-27/+39
* Improvements to bit-blaster.Alan Mishchenko2014-10-012-23/+88
* Improvements to bit-blaster.Alan Mishchenko2014-09-301-1/+1
* Improvements to bit-blaster.Alan Mishchenko2014-09-303-75/+120
* Adding options to &flow.Alan Mishchenko2014-09-291-4/+9
* Adding options to &flow2.Alan Mishchenko2014-09-291-4/+9
* Adding options to &flow.Alan Mishchenko2014-09-291-4/+9
* Command to rename files in the same directory.Alan Mishchenko2014-09-281-0/+191
* Adding out-of-bounds checks to AIGER readers.Alan Mishchenko2014-09-281-1/+1
* Adding features to CNF generation.Alan Mishchenko2014-09-281-6/+16
* Renaming DSD commands (dsd_tune -> dsd_match; dsd_clean -> dsd_filter).Alan Mishchenko2014-09-283-11/+51
* Support for sequential designs in word-level Verilog.Alan Mishchenko2014-09-265-79/+196
* Enabling print-out, for each operator, of the percetage of AND nodes after bi...Alan Mishchenko2014-09-254-14/+35
* Printing node type statistics.Alan Mishchenko2014-09-241-33/+57
* Printing node type statistics.Alan Mishchenko2014-09-241-10/+10
* Printing node type statistics.Alan Mishchenko2014-09-242-2/+106
* Bug fix in handling MUXes in Verilog parser, induced by recent changes.Alan Mishchenko2014-09-241-0/+2
* Added switch -t to &flow2.Alan Mishchenko2014-09-241-4/+9
* Added support of word-level MUXes represented as 'always'-statements.Alan Mishchenko2014-09-241-2/+2
* Added support of word-level MUXes represented as 'always'-statements.Alan Mishchenko2014-09-243-18/+167
* Enables dumping stats into a file.Alan Mishchenko2014-09-232-1/+15
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