Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | Adding commands backup/restore. | Alan Mishchenko | 2014-10-21 | 3 | -0/+84 | |
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* | Adding switch &qbf -q to quantify functional variables. | Alan Mishchenko | 2014-10-20 | 1 | -2/+20 | |
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* | Improved QBF solver. | Alan Mishchenko | 2014-10-18 | 1 | -2/+125 | |
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* | Fixed "bm" command hang issue. | grigora | 2014-10-11 | 1 | -7/+6 | |
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* | Improvements to the parser. | Alan Mishchenko | 2014-10-10 | 1 | -7/+86 | |
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* | Naive (SAT-only) CEC option. | Alan Mishchenko | 2014-10-10 | 1 | -2/+6 | |
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* | Bug fix in the bit-blaster. | Alan Mishchenko | 2014-10-10 | 1 | -3/+3 | |
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* | Improvements to ISOP. | Alan Mishchenko | 2014-10-10 | 2 | -5/+7 | |
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* | Improvements to ISOP. | Alan Mishchenko | 2014-10-10 | 2 | -4/+10 | |
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* | Detection of threshold functions. | Alan Mishchenko | 2014-10-08 | 2 | -3/+25 | |
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* | Bug fix in move_names. | Alan Mishchenko | 2014-10-05 | 1 | -0/+1 | |
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* | Deriving cell mapping with &if -kz. | Alan Mishchenko | 2014-10-04 | 1 | -1/+6 | |
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* | Deriving cell mapping with &if -kz. | Alan Mishchenko | 2014-10-04 | 1 | -1/+14 | |
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* | Deriving AIG after cell mapping. | Alan Mishchenko | 2014-10-03 | 2 | -2/+29 | |
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* | Bug fix in Verilog writer. | Alan Mishchenko | 2014-10-02 | 1 | -8/+8 | |
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* | Adding switch -R to 'if'. | Alan Mishchenko | 2014-10-02 | 1 | -27/+39 | |
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* | Improvements to bit-blaster. | Alan Mishchenko | 2014-10-01 | 2 | -23/+88 | |
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* | Improvements to bit-blaster. | Alan Mishchenko | 2014-09-30 | 1 | -1/+1 | |
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* | Improvements to bit-blaster. | Alan Mishchenko | 2014-09-30 | 3 | -75/+120 | |
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* | Adding options to &flow. | Alan Mishchenko | 2014-09-29 | 1 | -4/+9 | |
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* | Adding options to &flow2. | Alan Mishchenko | 2014-09-29 | 1 | -4/+9 | |
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* | Adding options to &flow. | Alan Mishchenko | 2014-09-29 | 1 | -4/+9 | |
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* | Command to rename files in the same directory. | Alan Mishchenko | 2014-09-28 | 1 | -0/+191 | |
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* | Adding out-of-bounds checks to AIGER readers. | Alan Mishchenko | 2014-09-28 | 1 | -1/+1 | |
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* | Adding features to CNF generation. | Alan Mishchenko | 2014-09-28 | 1 | -6/+16 | |
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* | Renaming DSD commands (dsd_tune -> dsd_match; dsd_clean -> dsd_filter). | Alan Mishchenko | 2014-09-28 | 3 | -11/+51 | |
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* | Support for sequential designs in word-level Verilog. | Alan Mishchenko | 2014-09-26 | 5 | -79/+196 | |
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* | Enabling print-out, for each operator, of the percetage of AND nodes after ↵ | Alan Mishchenko | 2014-09-25 | 4 | -14/+35 | |
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* | Printing node type statistics. | Alan Mishchenko | 2014-09-24 | 1 | -33/+57 | |
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* | Printing node type statistics. | Alan Mishchenko | 2014-09-24 | 1 | -10/+10 | |
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* | Printing node type statistics. | Alan Mishchenko | 2014-09-24 | 2 | -2/+106 | |
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* | Bug fix in handling MUXes in Verilog parser, induced by recent changes. | Alan Mishchenko | 2014-09-24 | 1 | -0/+2 | |
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* | Added switch -t to &flow2. | Alan Mishchenko | 2014-09-24 | 1 | -4/+9 | |
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* | Added support of word-level MUXes represented as 'always'-statements. | Alan Mishchenko | 2014-09-24 | 1 | -2/+2 | |
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* | Added support of word-level MUXes represented as 'always'-statements. | Alan Mishchenko | 2014-09-24 | 3 | -18/+167 | |
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* | Enables dumping stats into a file. | Alan Mishchenko | 2014-09-23 | 2 | -1/+15 | |
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* | Extending &cec to take a single-output miter (usage of switch -d has changed!). | Alan Mishchenko | 2014-09-23 | 1 | -10/+24 | |
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* | Debugging the bit-blaster. | Alan Mishchenko | 2014-09-23 | 1 | -1/+15 | |
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* | Debugging the bit-blaster. | Alan Mishchenko | 2014-09-23 | 2 | -8/+28 | |
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* | Adding switch to enable SOP balancing in '&flow2'. | Alan Mishchenko | 2014-09-21 | 1 | -4/+9 | |
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* | Synchronizing packages. | Alan Mishchenko | 2014-09-20 | 3 | -6/+6 | |
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* | Updating command 'dsd_clean'. | Alan Mishchenko | 2014-09-20 | 1 | -7/+29 | |
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* | Tuning the flow scripts. | Alan Mishchenko | 2014-09-20 | 1 | -17/+75 | |
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* | Improvements to Boolean matching. | Alan Mishchenko | 2014-09-19 | 1 | -22/+20 | |
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* | Improvements to Boolean matching. | Alan Mishchenko | 2014-09-18 | 1 | -4/+4 | |
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* | Improvements to Boolean matching. | Alan Mishchenko | 2014-09-18 | 1 | -14/+28 | |
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* | Improving DSD manager. | Alan Mishchenko | 2014-09-18 | 1 | -6/+20 | |
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* | Concurrency for Boolean matching. | Alan Mishchenko | 2014-09-18 | 3 | -13/+47 | |
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* | Improvements to Boolean matching. | Alan Mishchenko | 2014-09-17 | 1 | -4/+29 | |
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* | Improvements to word-level Verilog parser. | Alan Mishchenko | 2014-09-17 | 2 | -3/+4 | |
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