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iCE40/abc
yosys-experimental
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Author
Age
Files
Lines
*
Fixing C++ compilation issues.
Alan Mishchenko
2013-01-08
1
-1
/
+1
*
Adding support of flops to the conversion of MiniAIG into ABC network.
Alan Mishchenko
2013-01-08
2
-0
/
+127
*
Technology mapper.
Alan Mishchenko
2013-01-08
1
-2
/
+4
*
New unrolling manager.
Alan Mishchenko
2012-12-24
1
-2
/
+6
*
Assembling timing/hierarchy manager from input data.
Alan Mishchenko
2012-12-15
1
-4
/
+49
*
Assembling timing/hierarchy manager from input data.
Alan Mishchenko
2012-12-13
4
-118
/
+131
*
Unifification of custom extensions.
Alan Mishchenko
2012-12-10
4
-21
/
+21
*
Retiring old 'fpga' command and package.
Alan Mishchenko
2012-12-10
1
-2
/
+0
*
Renaming If_Lut_t into If_LibLut_t.
Alan Mishchenko
2012-12-10
4
-12
/
+11
*
Adding box library.
Alan Mishchenko
2012-12-10
5
-9
/
+16
*
Enabling multi-output solving in 'pdr'.
Alan Mishchenko
2012-12-09
1
-2
/
+2
*
Enabling multi-output solving in 'pdr'.
Alan Mishchenko
2012-12-09
1
-4
/
+4
*
Renaming multi-output mode enable switch 'bmc3 -s' to be 'bmc3 -a'.
Alan Mishchenko
2012-12-09
1
-4
/
+4
*
Enabling multi-output solving in 'pdr'.
Alan Mishchenko
2012-12-09
1
-15
/
+29
*
Enabling multi-output solving in 'pdr'.
Alan Mishchenko
2012-12-09
2
-56
/
+42
*
Enabling multi-output solving in 'pdr'.
Alan Mishchenko
2012-12-09
1
-1
/
+9
*
Enabling multi-output solving in 'pdr'.
Alan Mishchenko
2012-12-09
2
-4
/
+18
*
Deriving CEX after phase/tempor/reparam.
Alan Mishchenko
2012-12-09
1
-1
/
+5
*
Deriving CEX after phase/tempor/reparam.
Alan Mishchenko
2012-12-08
1
-9
/
+8
*
Deriving CEX after phase/tempor/reparam.
Alan Mishchenko
2012-12-08
1
-21
/
+92
*
Enabling additional stat printouts.
Alan Mishchenko
2012-12-02
1
-0
/
+2
*
Enabling additional stat printouts.
Alan Mishchenko
2012-12-02
1
-1
/
+1
*
Enabling additional stat printouts.
Alan Mishchenko
2012-12-02
1
-10
/
+11
*
Enabling command &append for combiming multiple AIGs.
Alan Mishchenko
2012-12-01
1
-0
/
+80
*
Enabling additional stat printouts.
Alan Mishchenko
2012-12-01
1
-2
/
+114
*
Counter-example analysis and optimization.
Alan Mishchenko
2012-11-30
1
-6
/
+6
*
Counter-example analysis and optimization.
Alan Mishchenko
2012-11-30
1
-0
/
+57
*
Counter-example analysis and optimization.
Alan Mishchenko
2012-11-28
1
-1
/
+9
*
DSD manager.
Alan Mishchenko
2012-11-20
2
-3
/
+17
*
DSD manager.
Alan Mishchenko
2012-11-19
1
-0
/
+14
*
Added switch 'cexcut -m' to generate bad states for all frames after G.
Alan Mishchenko
2012-11-15
1
-9
/
+17
*
Added switch 'cexcut -n' to generate only one bad state.
Alan Mishchenko
2012-11-15
1
-86
/
+18
*
Added command 'cexcut' and 'cexmerge'.
Alan Mishchenko
2012-11-14
1
-12
/
+22
*
Added command 'cexcut' and 'cexmerge'.
Alan Mishchenko
2012-11-14
1
-0
/
+2
*
Added command 'cexcut' and 'cexmerge'.
Alan Mishchenko
2012-11-14
1
-10
/
+208
*
Added command 'cexcut' and 'cexmerge'.
Alan Mishchenko
2012-11-14
1
-2
/
+97
*
Added command 'cexsave' and 'cexload'.
Alan Mishchenko
2012-11-14
3
-4
/
+189
*
Isolating BMC code into a separate package.
Alan Mishchenko
2012-11-14
2
-0
/
+2
*
Modifying parameter limits to allow mapping into 2-LUTs.
Alan Mishchenko
2012-11-14
1
-3
/
+3
*
Made print-out of frontier cut an option ('-c') in '&ps'.
Alan Mishchenko
2012-11-12
2
-7
/
+12
*
Extending GIA to represent pintypes and pins.
Alan Mishchenko
2012-11-12
2
-1
/
+95
*
Improved DSD.
Alan Mishchenko
2012-11-11
1
-10
/
+6
*
Improved DSD.
Alan Mishchenko
2012-11-10
1
-2
/
+6
*
Improved DSD.
Alan Mishchenko
2012-11-10
1
-2
/
+2
*
Performance bug fix in choice generation.
Alan Mishchenko
2012-11-09
4
-25
/
+35
*
Improvements to LMS code.
Alan Mishchenko
2012-11-06
3
-251
/
+234
*
Improved DSD.
Alan Mishchenko
2012-11-03
1
-0
/
+4
*
Adding dumping truth tables from LMS manager.
Alan Mishchenko
2012-11-02
2
-22
/
+117
*
Fixing out-of-bound problem when collecting GIA nodes.
Alan Mishchenko
2012-11-02
1
-0
/
+5
*
Improvements to LMS code.
Alan Mishchenko
2012-11-02
1
-7
/
+82
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