iCE40/abc - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Removing some old useless code.	Alan Mishchenko	2013-09-02	1	-4/+0
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*	Removing some old useless code.	Alan Mishchenko	2013-09-02	9	-816/+5
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*	Adding interpolant computation sat_solver2.	Alan Mishchenko	2013-09-02	4	-11/+20
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*	Modify level computation to take discretized arrival times into account.	Alan Mishchenko	2013-09-02	1	-3/+7
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*	Adding switch &get -m to import mapped network into the &-space.	Alan Mishchenko	2013-09-01	1	-2/+2
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*	Adding switch &get -m to import mapped network into the &-space.	Alan Mishchenko	2013-09-01	4	-15/+141
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*	Buf fixes and minor changes to the &if mapper.	Alan Mishchenko	2013-08-29	1	-1/+1
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*	Added switch &sim -g to enable flop grouping.	Alan Mishchenko	2013-08-20	1	-2/+6
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*	Extending 'permute' to handle user-specified flop permutation.	Alan Mishchenko	2013-08-16	3	-13/+81
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*	Enabling LUT decomposition in two special cases.	Alan Mishchenko	2013-08-14	1	-0/+5
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*	Enabling additional matching feature in the LUT mapper.	Alan Mishchenko	2013-08-12	1	-11/+1
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*	Enabling additional matching feature in the LUT mapper.	Alan Mishchenko	2013-08-12	1	-7/+31
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*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-09	2	-1/+7
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*	Integrated buffering and sizing.	Alan Mishchenko	2013-08-08	2	-0/+5
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*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-06	2	-0/+8
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*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-06	1	-2/+2
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*	Adding new (un)buffering with phase information.	Alan Mishchenko	2013-08-05	3	-1/+35
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*	Code for parsing the transcripts.	Alan Mishchenko	2013-08-02	1	-0/+18
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*	SAT solver with dynamic CNF loading.	Alan Mishchenko	2013-08-01	1	-0/+86
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*	Code for parsing the transcripts.	Alan Mishchenko	2013-07-30	1	-0/+124
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*	Parametrizing standard-cell mapper to account for the fanout delay.	Alan Mishchenko	2013-07-30	2	-6/+21
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*	Added commands 'maxsize' and 'unbuffer'.	Alan Mishchenko	2013-07-29	1	-0/+6
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*	Compiler warning.	Alan Mishchenko	2013-07-29	1	-1/+1
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*	Adding support for input slew and output capacitance to timer and gate-sizer ↵	Alan Mishchenko	2013-07-24	3	-4/+46
\| \| \| \|	(bug fix).
*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-24	4	-17/+53
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*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-23	2	-17/+29
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*	Bug fix and warning print.	Alan Mishchenko	2013-07-22	1	-2/+42
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*	Improvements to post-mapping re-sizing.	Alan Mishchenko	2013-07-21	1	-14/+16
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*	Memory leaks.	Alan Mishchenko	2013-07-21	2	-9/+5
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*	Adding support for input slew and output capacitance to timer and gate-sizer.	Alan Mishchenko	2013-07-21	2	-3/+2
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*	Adding support for input slew (.input_drive) and output capacitance ↵	Alan Mishchenko	2013-07-21	7	-115/+387
\| \| \| \|	(.output_load) in BLIF reader/writer.
*	New technology mapper.	Alan Mishchenko	2013-07-18	1	-4/+8
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*	New technology mapper.	Alan Mishchenko	2013-07-17	1	-11/+48
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*	Improved printout of XOR/MUX/AND in 'print_stats'.	Alan Mishchenko	2013-07-16	1	-12/+18
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*	Imporvements to 'eliminate'.	Alan Mishchenko	2013-07-16	2	-8/+40
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*	Adding another network duplicator.	Alan Mishchenko	2013-07-16	1	-2/+2
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*	Adding another network duplicator.	Alan Mishchenko	2013-07-16	1	-0/+58
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*	New technology mapper.	Alan Mishchenko	2013-07-15	2	-3/+17
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*	New technology mapper.	Alan Mishchenko	2013-07-14	1	-2/+2
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*	New technology mapper.	Alan Mishchenko	2013-07-14	2	-4/+23
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*	New technology mapper.	Alan Mishchenko	2013-07-13	1	-3/+8
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*	New technology mapper.	Alan Mishchenko	2013-07-13	1	-2/+6
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*	New technology mapper.	Alan Mishchenko	2013-07-13	1	-1/+1
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*	New technology mapper.	Alan Mishchenko	2013-07-12	1	-4/+33
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*	Compiler warnings.	Alan Mishchenko	2013-07-12	1	-1/+1
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*	Compiler warnings.	Alan Mishchenko	2013-07-12	2	-24/+24
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*	New technology mapper.	Alan Mishchenko	2013-07-12	1	-8/+85
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*	Compiler problem.	Alan Mishchenko	2013-07-01	2	-150/+150
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*	Compiler problem.	Alan Mishchenko	2013-07-01	1	-20/+20
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*	Fixing a typo.	Alan Mishchenko	2013-07-01	1	-1/+1
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