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* Adding switch 'ps -s' to skip counting buffers/inverters as nodes.Alan Mishchenko2013-09-027-13/+38
* Removing some old useless code.Alan Mishchenko2013-09-021-4/+0
* Removing some old useless code.Alan Mishchenko2013-09-029-816/+5
* Adding interpolant computation sat_solver2.Alan Mishchenko2013-09-024-11/+20
* Modify level computation to take discretized arrival times into account.Alan Mishchenko2013-09-021-3/+7
* Adding switch &get -m to import mapped network into the &-space.Alan Mishchenko2013-09-011-2/+2
* Adding switch &get -m to import mapped network into the &-space.Alan Mishchenko2013-09-014-15/+141
* Buf fixes and minor changes to the &if mapper.Alan Mishchenko2013-08-291-1/+1
* Added switch &sim -g to enable flop grouping.Alan Mishchenko2013-08-201-2/+6
* Extending 'permute' to handle user-specified flop permutation.Alan Mishchenko2013-08-163-13/+81
* Enabling LUT decomposition in two special cases.Alan Mishchenko2013-08-141-0/+5
* Enabling additional matching feature in the LUT mapper.Alan Mishchenko2013-08-121-11/+1
* Enabling additional matching feature in the LUT mapper.Alan Mishchenko2013-08-121-7/+31
* Improvements to buffering and sizing.Alan Mishchenko2013-08-092-1/+7
* Integrated buffering and sizing.Alan Mishchenko2013-08-082-0/+5
* Improvements to buffering and sizing.Alan Mishchenko2013-08-062-0/+8
* Improvements to buffering and sizing.Alan Mishchenko2013-08-061-2/+2
* Adding new (un)buffering with phase information.Alan Mishchenko2013-08-053-1/+35
* Code for parsing the transcripts.Alan Mishchenko2013-08-021-0/+18
* SAT solver with dynamic CNF loading.Alan Mishchenko2013-08-011-0/+86
* Code for parsing the transcripts.Alan Mishchenko2013-07-301-0/+124
* Parametrizing standard-cell mapper to account for the fanout delay.Alan Mishchenko2013-07-302-6/+21
* Added commands 'maxsize' and 'unbuffer'.Alan Mishchenko2013-07-291-0/+6
* Compiler warning.Alan Mishchenko2013-07-291-1/+1
* Adding support for input slew and output capacitance to timer and gate-sizer ...Alan Mishchenko2013-07-243-4/+46
* Tuning standard-cell mapping flow.Alan Mishchenko2013-07-244-17/+53
* Tuning standard-cell mapping flow.Alan Mishchenko2013-07-232-17/+29
* Bug fix and warning print.Alan Mishchenko2013-07-221-2/+42
* Improvements to post-mapping re-sizing.Alan Mishchenko2013-07-211-14/+16
* Memory leaks.Alan Mishchenko2013-07-212-9/+5
* Adding support for input slew and output capacitance to timer and gate-sizer.Alan Mishchenko2013-07-212-3/+2
* Adding support for input slew (.input_drive) and output capacitance (.output_...Alan Mishchenko2013-07-217-115/+387
* New technology mapper.Alan Mishchenko2013-07-181-4/+8
* New technology mapper.Alan Mishchenko2013-07-171-11/+48
* Improved printout of XOR/MUX/AND in 'print_stats'.Alan Mishchenko2013-07-161-12/+18
* Imporvements to 'eliminate'.Alan Mishchenko2013-07-162-8/+40
* Adding another network duplicator.Alan Mishchenko2013-07-161-2/+2
* Adding another network duplicator.Alan Mishchenko2013-07-161-0/+58
* New technology mapper.Alan Mishchenko2013-07-152-3/+17
* New technology mapper.Alan Mishchenko2013-07-141-2/+2
* New technology mapper.Alan Mishchenko2013-07-142-4/+23
* New technology mapper.Alan Mishchenko2013-07-131-3/+8
* New technology mapper.Alan Mishchenko2013-07-131-2/+6
* New technology mapper.Alan Mishchenko2013-07-131-1/+1
* New technology mapper.Alan Mishchenko2013-07-121-4/+33
* Compiler warnings.Alan Mishchenko2013-07-121-1/+1
* Compiler warnings.Alan Mishchenko2013-07-122-24/+24
* New technology mapper.Alan Mishchenko2013-07-121-8/+85
* Compiler problem.Alan Mishchenko2013-07-012-150/+150
* Compiler problem.Alan Mishchenko2013-07-011-20/+20