iCE40/abc - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Disabling MiniSAT 2.2 for now.	Alan Mishchenko	2014-10-21	1	-1/+1
\|
*	Compiler problems.	Alan Mishchenko	2014-10-21	1	-1/+5
\|
*	Preparing to work with C++ code.	Alan Mishchenko	2014-10-21	2	-0/+44
\|
*	Adding commands backup/restore.	Alan Mishchenko	2014-10-21	3	-0/+84
\|
*	Adding switch &qbf -q to quantify functional variables.	Alan Mishchenko	2014-10-20	1	-2/+20
\|
*	Improved QBF solver.	Alan Mishchenko	2014-10-18	1	-2/+125
\|
*	Fixed "bm" command hang issue.	grigora	2014-10-11	1	-7/+6
\|
*	Improvements to the parser.	Alan Mishchenko	2014-10-10	1	-7/+86
\|
*	Naive (SAT-only) CEC option.	Alan Mishchenko	2014-10-10	1	-2/+6
\|
*	Bug fix in the bit-blaster.	Alan Mishchenko	2014-10-10	1	-3/+3
\|
*	Improvements to ISOP.	Alan Mishchenko	2014-10-10	2	-5/+7
\|
*	Improvements to ISOP.	Alan Mishchenko	2014-10-10	2	-4/+10
\|
*	Detection of threshold functions.	Alan Mishchenko	2014-10-08	2	-3/+25
\|
*	Bug fix in move_names.	Alan Mishchenko	2014-10-05	1	-0/+1
\|
*	Deriving cell mapping with &if -kz.	Alan Mishchenko	2014-10-04	1	-1/+6
\|
*	Deriving cell mapping with &if -kz.	Alan Mishchenko	2014-10-04	1	-1/+14
\|
*	Deriving AIG after cell mapping.	Alan Mishchenko	2014-10-03	2	-2/+29
\|
*	Bug fix in Verilog writer.	Alan Mishchenko	2014-10-02	1	-8/+8
\|
*	Adding switch -R to 'if'.	Alan Mishchenko	2014-10-02	1	-27/+39
\|
*	Improvements to bit-blaster.	Alan Mishchenko	2014-10-01	2	-23/+88
\|
*	Improvements to bit-blaster.	Alan Mishchenko	2014-09-30	1	-1/+1
\|
*	Improvements to bit-blaster.	Alan Mishchenko	2014-09-30	3	-75/+120
\|
*	Adding options to &flow.	Alan Mishchenko	2014-09-29	1	-4/+9
\|
*	Adding options to &flow2.	Alan Mishchenko	2014-09-29	1	-4/+9
\|
*	Adding options to &flow.	Alan Mishchenko	2014-09-29	1	-4/+9
\|
*	Command to rename files in the same directory.	Alan Mishchenko	2014-09-28	1	-0/+191
\|
*	Adding out-of-bounds checks to AIGER readers.	Alan Mishchenko	2014-09-28	1	-1/+1
\|
*	Adding features to CNF generation.	Alan Mishchenko	2014-09-28	1	-6/+16
\|
*	Renaming DSD commands (dsd_tune -> dsd_match; dsd_clean -> dsd_filter).	Alan Mishchenko	2014-09-28	3	-11/+51
\|
*	Support for sequential designs in word-level Verilog.	Alan Mishchenko	2014-09-26	5	-79/+196
\|
*	Enabling print-out, for each operator, of the percetage of AND nodes after ↵	Alan Mishchenko	2014-09-25	4	-14/+35
\| \| \| \|	bit-blasting.
*	Printing node type statistics.	Alan Mishchenko	2014-09-24	1	-33/+57
\|
*	Printing node type statistics.	Alan Mishchenko	2014-09-24	1	-10/+10
\|
*	Printing node type statistics.	Alan Mishchenko	2014-09-24	2	-2/+106
\|
*	Bug fix in handling MUXes in Verilog parser, induced by recent changes.	Alan Mishchenko	2014-09-24	1	-0/+2
\|
*	Added switch -t to &flow2.	Alan Mishchenko	2014-09-24	1	-4/+9
\|
*	Added support of word-level MUXes represented as 'always'-statements.	Alan Mishchenko	2014-09-24	1	-2/+2
\|
*	Added support of word-level MUXes represented as 'always'-statements.	Alan Mishchenko	2014-09-24	3	-18/+167
\|
*	Enables dumping stats into a file.	Alan Mishchenko	2014-09-23	2	-1/+15
\|
*	Extending &cec to take a single-output miter (usage of switch -d has changed!).	Alan Mishchenko	2014-09-23	1	-10/+24
\|
*	Debugging the bit-blaster.	Alan Mishchenko	2014-09-23	1	-1/+15
\|
*	Debugging the bit-blaster.	Alan Mishchenko	2014-09-23	2	-8/+28
\|
*	Adding switch to enable SOP balancing in '&flow2'.	Alan Mishchenko	2014-09-21	1	-4/+9
\|
*	Synchronizing packages.	Alan Mishchenko	2014-09-20	3	-6/+6
\|
*	Updating command 'dsd_clean'.	Alan Mishchenko	2014-09-20	1	-7/+29
\|
*	Tuning the flow scripts.	Alan Mishchenko	2014-09-20	1	-17/+75
\|
*	Improvements to Boolean matching.	Alan Mishchenko	2014-09-19	1	-22/+20
\|
*	Improvements to Boolean matching.	Alan Mishchenko	2014-09-18	1	-4/+4
\|
*	Improvements to Boolean matching.	Alan Mishchenko	2014-09-18	1	-14/+28
\|
*	Improving DSD manager.	Alan Mishchenko	2014-09-18	1	-6/+20
\|