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* Integration of timing manager.Alan Mishchenko2013-02-031-2/+77
* Added switch 'zeropo -s' to skip comb sweep after removing a PO.Alan Mishchenko2013-02-012-5/+12
* Fixing compilation problems on Linux-32 related to constants of type unsigned...Alan Mishchenko2013-01-303-52/+52
* Added new Python API is_const_po( int iPoNum ), which returns 0/1 if current ...Alan Mishchenko2013-01-252-2/+35
* Fixed a corner-case when 'sim3 -a' does not work for costant POs.Alan Mishchenko2013-01-251-0/+5
* Added switch &trim -V <num> to remove const POs with specific value <num>.Alan Mishchenko2013-01-251-3/+16
* Extending verification status file format to allow for SAT status without CEX.Alan Mishchenko2013-01-251-4/+15
* Enabled detecting CEXes in multiple POs without stopping (sim3 -a).Alan Mishchenko2013-01-232-10/+46
* Enabled detecting CEXes in multiple POs without stopping (sim3 -a).Alan Mishchenko2013-01-232-6/+12
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-0/+3
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-0/+3
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-2/+2
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-1/+0
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-3/+3
* Fixing C++ compilation issues.Alan Mishchenko2013-01-081-1/+1
* Adding support of flops to the conversion of MiniAIG into ABC network.Alan Mishchenko2013-01-082-0/+127
* Technology mapper.Alan Mishchenko2013-01-081-2/+4
* New unrolling manager.Alan Mishchenko2012-12-241-2/+6
* Assembling timing/hierarchy manager from input data.Alan Mishchenko2012-12-151-4/+49
* Assembling timing/hierarchy manager from input data.Alan Mishchenko2012-12-134-118/+131
* Unifification of custom extensions.Alan Mishchenko2012-12-104-21/+21
* Retiring old 'fpga' command and package.Alan Mishchenko2012-12-101-2/+0
* Renaming If_Lut_t into If_LibLut_t.Alan Mishchenko2012-12-104-12/+11
* Adding box library.Alan Mishchenko2012-12-105-9/+16
* Enabling multi-output solving in 'pdr'.Alan Mishchenko2012-12-091-2/+2
* Enabling multi-output solving in 'pdr'.Alan Mishchenko2012-12-091-4/+4
* Renaming multi-output mode enable switch 'bmc3 -s' to be 'bmc3 -a'.Alan Mishchenko2012-12-091-4/+4
* Enabling multi-output solving in 'pdr'.Alan Mishchenko2012-12-091-15/+29
* Enabling multi-output solving in 'pdr'.Alan Mishchenko2012-12-092-56/+42
* Enabling multi-output solving in 'pdr'.Alan Mishchenko2012-12-091-1/+9
* Enabling multi-output solving in 'pdr'.Alan Mishchenko2012-12-092-4/+18
* Deriving CEX after phase/tempor/reparam.Alan Mishchenko2012-12-091-1/+5
* Deriving CEX after phase/tempor/reparam.Alan Mishchenko2012-12-081-9/+8
* Deriving CEX after phase/tempor/reparam.Alan Mishchenko2012-12-081-21/+92
* Enabling additional stat printouts.Alan Mishchenko2012-12-021-0/+2
* Enabling additional stat printouts.Alan Mishchenko2012-12-021-1/+1
* Enabling additional stat printouts.Alan Mishchenko2012-12-021-10/+11
* Enabling command &append for combiming multiple AIGs.Alan Mishchenko2012-12-011-0/+80
* Enabling additional stat printouts.Alan Mishchenko2012-12-011-2/+114
* Counter-example analysis and optimization.Alan Mishchenko2012-11-301-6/+6
* Counter-example analysis and optimization.Alan Mishchenko2012-11-301-0/+57
* Counter-example analysis and optimization.Alan Mishchenko2012-11-281-1/+9
* DSD manager.Alan Mishchenko2012-11-202-3/+17
* DSD manager.Alan Mishchenko2012-11-191-0/+14
* Added switch 'cexcut -m' to generate bad states for all frames after G.Alan Mishchenko2012-11-151-9/+17
* Added switch 'cexcut -n' to generate only one bad state.Alan Mishchenko2012-11-151-86/+18
* Added command 'cexcut' and 'cexmerge'.Alan Mishchenko2012-11-141-12/+22
* Added command 'cexcut' and 'cexmerge'.Alan Mishchenko2012-11-141-0/+2
* Added command 'cexcut' and 'cexmerge'.Alan Mishchenko2012-11-141-10/+208
* Added command 'cexcut' and 'cexmerge'.Alan Mishchenko2012-11-141-2/+97
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