| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Updating DSD balance to handle XOR gate as having the same delay as AND gate. | Alan Mishchenko | 2014-09-19 | 1 | -2/+2 |
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| * | Improvements to DSD balancing. | Alan Mishchenko | 2014-04-19 | 1 | -0/+31 |
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| * | Implementation of DSD balancing. | Alan Mishchenko | 2014-04-06 | 1 | -0/+490 |
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index : iCE40/abc | |
| [no description] |
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