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* Bug fix in truth table computation.Alan Mishchenko2014-10-151-11/+9
* MUX decomposition during mapping.Alan Mishchenko2014-10-111-1/+0
* Deriving network in terms of programmable cells.Alan Mishchenko2014-10-111-1/+2
* Small changes.Alan Mishchenko2014-10-081-0/+2
* Compiler warnings.Alan Mishchenko2014-10-082-1/+3
* Detection of threshold functions.Alan Mishchenko2014-10-082-0/+74
* Deriving cell mapping with &if -kz.Alan Mishchenko2014-10-041-2/+9
* Deriving cell mapping with &if -kz.Alan Mishchenko2014-10-043-15/+126
* Deriving AIG after cell mapping.Alan Mishchenko2014-10-032-0/+11
* Synchronizing packages.Alan Mishchenko2014-09-201-0/+2
* Synchronizing packages.Alan Mishchenko2014-09-202-3/+3
* Synchronizing packages.Alan Mishchenko2014-09-201-0/+2
* Updating command 'dsd_clean'.Alan Mishchenko2014-09-203-3/+16
* Updating DSD balance to handle XOR gate as having the same delay as AND gate.Alan Mishchenko2014-09-194-10/+11
* Improvements to Boolean matching.Alan Mishchenko2014-09-192-33/+98
* Improvements to Boolean matching.Alan Mishchenko2014-09-196-66/+474
* Improvements to Boolean matching.Alan Mishchenko2014-09-182-6/+22
* Improvements to Boolean matching.Alan Mishchenko2014-09-184-5/+29
* Improvements to Boolean matching.Alan Mishchenko2014-09-181-14/+29
* Improving DSD manager.Alan Mishchenko2014-09-182-0/+69
* Concurrency for Boolean matching.Alan Mishchenko2014-09-184-47/+263
* Improvements to Boolean matching.Alan Mishchenko2014-09-173-60/+191
* New choice computation.Alan Mishchenko2014-09-161-9/+9
* Improvements to Boolean matching.Alan Mishchenko2014-09-161-201/+554
* Improvements to the timing manager.Alan Mishchenko2014-08-251-2/+2
* Correcting incorrect handling of timing in several &-commands.Alan Mishchenko2014-08-251-1/+1
* Adding specialized matching to 'if'.Alan Mishchenko2014-08-161-1/+1
* Adding specialized matching to 'if'.Alan Mishchenko2014-08-164-0/+130
* Profiling code for SOP/DSD/LMS balancing.Alan Mishchenko2014-08-041-0/+69
* Compiler warnings.Alan Mishchenko2014-08-042-1/+2
* Profiling code for SOP/DSD/LMS balancing.Alan Mishchenko2014-08-022-0/+50
* Fixing option 'if -G <num>' after changes.Alan Mishchenko2014-07-253-10/+10
* Undoing previous change to SOP balancing.Alan Mishchenko2014-07-221-6/+6
* Small improvement to SOP balancing.Alan Mishchenko2014-07-221-4/+16
* Adding new command &sopb for resource-aware SOP balancing.Alan Mishchenko2014-07-212-0/+34
* Specializing some truth-table functions to 6 inputs.Alan Mishchenko2014-06-141-2/+2
* Various modifications.Alan Mishchenko2014-06-122-5/+10
* Correcting switching activity computation.Alan Mishchenko2014-06-051-0/+1
* Added optimization for average rather than maximum delay.Alan Mishchenko2014-04-291-4/+20
* Added optimization for average rather than maximum delay.Alan Mishchenko2014-04-193-245/+254
* Improvements to DSD balancing.Alan Mishchenko2014-04-192-2/+2
* Improvements to DSD balancing.Alan Mishchenko2014-04-195-29/+147
* Fix SOP balancing.Alan Mishchenko2014-04-191-1/+1
* Improvements in technology mapping.Alan Mishchenko2014-04-173-20/+19
* Changes in the LUT mapper data-structures.Alan Mishchenko2014-04-147-59/+16
* New feature to optimize delay during mapping.Alan Mishchenko2014-04-132-10/+45
* New feature to optimize delay during mapping.Alan Mishchenko2014-04-112-5/+6
* New feature to optimize delay during mapping.Alan Mishchenko2014-04-112-5/+7
* Improvements to DSD in technology mapping.Alan Mishchenko2014-04-113-19/+9
* New feature to optimize delay during mapping.Alan Mishchenko2014-04-115-8/+115
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