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iCE40/abc
yosys-experimental
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Author
Age
Files
Lines
*
Fixing mismatch in the TLS flow induced by adding cell configs in the DSD ↵
Alan Mishchenko
2016-01-30
1
-1
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+1
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manager.
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Compiler warnings.
Alan Mishchenko
2015-10-21
1
-2
/
+2
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*
Moving BDD-based threshold function detection to the BDD part of the code.
Alan Mishchenko
2015-10-16
2
-0
/
+9
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*
Two fixes in 'dsd_filter'.
Alan Mishchenko
2015-10-07
1
-1
/
+1
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*
Bug fix in 'if -g' (incorrect use of a macro).
Alan Mishchenko
2015-10-07
1
-3
/
+3
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*
Threshold logic checking code by Augusto Neutzling and Jody Matos.
Alan Mishchenko
2015-09-23
1
-3
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+6
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*
Experiments with mapping plus small changes.
Alan Mishchenko
2015-08-23
3
-3
/
+10
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*
Small changes to enable collecting results using &ps -D file.
Alan Mishchenko
2015-07-09
2
-0
/
+2
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*
Bug fix in programmable cell parser and minor tuning.
Alan Mishchenko
2015-07-08
1
-1
/
+2
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C++ compiler typecast problem.
Alan Mishchenko
2015-07-08
1
-1
/
+1
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*
Undo recent assert.
Alan Mishchenko
2015-06-27
1
-2
/
+2
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*
Supporting AND-gate cuts in 'if' and '&if'
Alan Mishchenko
2015-06-21
3
-6
/
+27
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*
Bug fix in 'dsd_tune' when processing cells with 0-input LUTs.
Alan Mishchenko
2015-05-15
1
-2
/
+7
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Making sure 0-input LUTs are supported by the DSD matching code.
Alan Mishchenko
2015-05-14
1
-5
/
+5
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*
Support for representing programmable cell configuration data (bug fix).
Alan Mishchenko
2015-03-09
1
-1
/
+4
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Support for representing programmable cell configuration data.
Alan Mishchenko
2015-03-08
1
-1
/
+2
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*
Support for representing programmable cell configuration data.
Alan Mishchenko
2015-03-08
3
-64
/
+222
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*
Experiments with SAT-based cube enumeration.
Alan Mishchenko
2015-03-05
1
-3
/
+4
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*
Fixed a typo in variable names.
Alan Mishchenko
2015-02-07
1
-2
/
+2
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*
New assertions and bug fix in DSD balancing.
Alan Mishchenko
2015-01-27
2
-8
/
+11
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Exprimental features in tech-mapping.
Alan Mishchenko
2014-12-21
1
-2
/
+3
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*
Bug fix in reading box library.
Alan Mishchenko
2014-12-20
1
-1
/
+1
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*
Adding new mapping feature.
Alan Mishchenko
2014-12-11
4
-18
/
+56
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*
Bug fix in truth table computation.
Alan Mishchenko
2014-10-15
1
-11
/
+9
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*
MUX decomposition during mapping.
Alan Mishchenko
2014-10-11
1
-1
/
+0
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*
Deriving network in terms of programmable cells.
Alan Mishchenko
2014-10-11
1
-1
/
+2
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*
Small changes.
Alan Mishchenko
2014-10-08
1
-0
/
+2
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*
Compiler warnings.
Alan Mishchenko
2014-10-08
2
-1
/
+3
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*
Detection of threshold functions.
Alan Mishchenko
2014-10-08
2
-0
/
+74
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*
Deriving cell mapping with &if -kz.
Alan Mishchenko
2014-10-04
1
-2
/
+9
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*
Deriving cell mapping with &if -kz.
Alan Mishchenko
2014-10-04
3
-15
/
+126
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*
Deriving AIG after cell mapping.
Alan Mishchenko
2014-10-03
2
-0
/
+11
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Synchronizing packages.
Alan Mishchenko
2014-09-20
1
-0
/
+2
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Synchronizing packages.
Alan Mishchenko
2014-09-20
2
-3
/
+3
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*
Synchronizing packages.
Alan Mishchenko
2014-09-20
1
-0
/
+2
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*
Updating command 'dsd_clean'.
Alan Mishchenko
2014-09-20
3
-3
/
+16
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*
Updating DSD balance to handle XOR gate as having the same delay as AND gate.
Alan Mishchenko
2014-09-19
4
-10
/
+11
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*
Improvements to Boolean matching.
Alan Mishchenko
2014-09-19
2
-33
/
+98
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*
Improvements to Boolean matching.
Alan Mishchenko
2014-09-19
6
-66
/
+474
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*
Improvements to Boolean matching.
Alan Mishchenko
2014-09-18
2
-6
/
+22
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Improvements to Boolean matching.
Alan Mishchenko
2014-09-18
4
-5
/
+29
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*
Improvements to Boolean matching.
Alan Mishchenko
2014-09-18
1
-14
/
+29
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*
Improving DSD manager.
Alan Mishchenko
2014-09-18
2
-0
/
+69
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*
Concurrency for Boolean matching.
Alan Mishchenko
2014-09-18
4
-47
/
+263
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*
Improvements to Boolean matching.
Alan Mishchenko
2014-09-17
3
-60
/
+191
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*
New choice computation.
Alan Mishchenko
2014-09-16
1
-9
/
+9
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*
Improvements to Boolean matching.
Alan Mishchenko
2014-09-16
1
-201
/
+554
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*
Improvements to the timing manager.
Alan Mishchenko
2014-08-25
1
-2
/
+2
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*
Correcting incorrect handling of timing in several &-commands.
Alan Mishchenko
2014-08-25
1
-1
/
+1
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*
Adding specialized matching to 'if'.
Alan Mishchenko
2014-08-16
1
-1
/
+1
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