summaryrefslogtreecommitdiffstats
path: root/src/map/if
Commit message (Expand)AuthorAgeFilesLines
* Experiments with the mapper.Alan Mishchenko2022-06-234-0/+68
* Adding switch to dsd_match to skip small functions.Alan Mishchenko2022-05-182-5/+5
* Two rare corner-case bugs in &if mapper.Alan Mishchenko2021-09-261-1/+1
* Experiments with CEC.Alan Mishchenko2021-07-101-2/+2
* Experiments with MUX decomposition.Alan Mishchenko2021-07-081-4/+4
* Updating LUT synthesis code.Alan Mishchenko2021-05-261-0/+1
* Updating the mapper when user-specific matching is used.Alan Mishchenko2021-01-091-0/+12
* Rare bug fix in mapping with choices.Alan Mishchenko2020-10-291-1/+2
* Making sure arrival time of constant node is -infinity.Alan Mishchenko2020-01-021-0/+2
* Adding switch to &if to consider special type of 6-input cuts.Alan Mishchenko2019-09-264-0/+84
* Making &mfs work with boxes larger than 6 inputs. Adding option &if -w to pri...Alan Mishchenko2019-09-191-0/+1
* Fixing some update gcc.Alan Mishchenko2019-07-241-1/+1
* Adding support for user-specified wire delays in &if.Alan Mishchenko2019-05-291-1/+1
* Prevent assertions from firing for deep logic networks.Alan Mishchenko2019-03-201-4/+4
* Fixing some warnings by adding cast from 'int' to 'size_t' in memset, memcpy,...Alan Mishchenko2019-03-052-3/+3
* Fixing float overflow during edge-flow computation in 'if' mapper (change to ...Alan Mishchenko2018-12-121-0/+8
* Fixing float overflow during edge-flow computation in 'if' mapper.Alan Mishchenko2018-12-121-3/+7
* Adding switch &w -n to modify the comment section of the AIGER file written.Alan Mishchenko2018-11-211-2/+2
* Adding parameters and improvements to %blast.Alan Mishchenko2018-02-282-0/+8
* Adding API to dump MiniAIG into a Verilog file and other small changes.Alan Mishchenko2017-10-222-0/+3
* Maintenance and updates.Alan Mishchenko2017-09-242-3/+3
* Maintenance and updates.Alan Mishchenko2017-09-202-3/+7
* Maintenance and updates.Alan Mishchenko2017-09-181-0/+1
* Compiler warnings.Alan Mishchenko2017-07-223-4/+4
* Synchronizing various data-structures.Alan Mishchenko2017-07-042-7/+162
* Saturating floating point computation.Alan Mishchenko2017-07-011-3/+7
* Bug fixes by Clifford Wolf.Alan Mishchenko2017-01-081-0/+4
* Compiler warnings.Alan Mishchenko2017-01-071-1/+1
* Adding truth table occurrence counters for 'if -c'.Alan Mishchenko2016-08-083-0/+14
* Enabled progress bar in the 'if' mapper (warning).Alan Mishchenko2016-08-081-1/+1
* Enabled delay computation for the cut output using cut inputs.Alan Mishchenko2016-08-083-2/+52
* Enabled progress bar in the 'if' mapper.Alan Mishchenko2016-08-081-5/+5
* Adding one argument to the delay-estimation API used for exact synthesis.Alan Mishchenko2016-07-311-3/+3
* Infrastructure for using the results of exact SAT-based synthesis during mapp...Alan Mishchenko2016-07-291-3/+25
* Infrastructure for using the results of exact SAT-based synthesis during mapp...Alan Mishchenko2016-07-293-17/+33
* Adding option to rehash AIG after mapping.Alan Mishchenko2016-04-271-0/+1
* Fixing mismatch in the TLS flow induced by adding cell configs in the DSD man...Alan Mishchenko2016-01-301-1/+1
* Compiler warnings.Alan Mishchenko2015-10-211-2/+2
* Moving BDD-based threshold function detection to the BDD part of the code.Alan Mishchenko2015-10-162-0/+9
* Two fixes in 'dsd_filter'.Alan Mishchenko2015-10-071-1/+1
* Bug fix in 'if -g' (incorrect use of a macro).Alan Mishchenko2015-10-071-3/+3
* Threshold logic checking code by Augusto Neutzling and Jody Matos.Alan Mishchenko2015-09-231-3/+6
* Experiments with mapping plus small changes.Alan Mishchenko2015-08-233-3/+10
* Small changes to enable collecting results using &ps -D file.Alan Mishchenko2015-07-092-0/+2
* Bug fix in programmable cell parser and minor tuning.Alan Mishchenko2015-07-081-1/+2
* C++ compiler typecast problem.Alan Mishchenko2015-07-081-1/+1
* Undo recent assert.Alan Mishchenko2015-06-271-2/+2
* Supporting AND-gate cuts in 'if' and '&if'Alan Mishchenko2015-06-213-6/+27
* Bug fix in 'dsd_tune' when processing cells with 0-input LUTs.Alan Mishchenko2015-05-151-2/+7
* Making sure 0-input LUTs are supported by the DSD matching code.Alan Mishchenko2015-05-141-5/+5
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-28 21:42:32 +0000