iCE40/abc - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-07	1	-14/+30
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*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-06	1	-0/+30
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*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-06	1	-1/+2
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*	Adding new (un)buffering with phase information.	Alan Mishchenko	2013-08-05	1	-0/+2
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*	Adding code to estimate buffer trees.	Alan Mishchenko	2013-08-05	1	-2/+7
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*	Change from input slew to input drive strength in the BLIF file.	Alan Mishchenko	2013-08-04	1	-1/+4
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*	Adding switch 'buffer -p' to enable buffing of the primary inputs.	Alan Mishchenko	2013-08-02	1	-1/+1
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*	Added commands 'maxsize' and 'unbuffer'.	Alan Mishchenko	2013-07-29	1	-0/+1
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*	Improved buffering.	Alan Mishchenko	2013-07-29	1	-11/+23
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*	Improved gate-sizing.	Alan Mishchenko	2013-07-29	1	-0/+2
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*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-24	1	-2/+3
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*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-23	1	-3/+3
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*	Generating GENLIB library from SCL.	Alan Mishchenko	2013-07-22	1	-0/+1
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*	Restructuring gate-sizing code trying to separate timing analysis.	Alan Mishchenko	2013-07-21	1	-0/+405