iCE40/abc - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Buf fix in Liberty parser.	Alan Mishchenko	2013-09-19	1	-1/+1
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*	Integrating input driving cell constraint into buffering/sizing.	Alan Mishchenko	2013-09-17	4	-3/+26
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*	Debugging and finetuning the flow.	Alan Mishchenko	2013-09-17	4	-64/+88
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*	Debugging and finetuning the flow.	Alan Mishchenko	2013-09-17	1	-1/+1
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*	Debugging and finetuning the flow.	Alan Mishchenko	2013-09-17	5	-19/+54
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*	Adding commands to set and print timing constraints.	Alan Mishchenko	2013-09-17	5	-38/+203
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*	Unifying standard cell library representations.	Alan Mishchenko	2013-09-17	5	-93/+255
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*	Infrastructure to support full Liberty format and unitification of library ↵	Alan Mishchenko	2013-09-15	1	-4/+4
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*	Infrastructure to support full Liberty format and unitification of library ↵	Alan Mishchenko	2013-09-15	1	-2/+4
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*	Infrastructure to support full Liberty format and unitification of library ↵	Alan Mishchenko	2013-09-15	6	-610/+2202
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*	Integrated buffering and sizing.	Alan Mishchenko	2013-08-11	7	-63/+89
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*	Integrated buffering and sizing.	Alan Mishchenko	2013-08-11	6	-21/+44
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*	Integrated buffering and sizing.	Alan Mishchenko	2013-08-10	1	-1/+1
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*	Integrated buffering and sizing.	Alan Mishchenko	2013-08-10	8	-102/+186
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*	Integrated buffering and sizing.	Alan Mishchenko	2013-08-10	1	-5/+5
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*	Bug fix in incremental timing.	Alan Mishchenko	2013-08-10	2	-12/+18
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*	Enable wire load estimation in buffering/sizing.	Alan Mishchenko	2013-08-10	6	-38/+46
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*	Integrated buffering and sizing.	Alan Mishchenko	2013-08-09	3	-19/+16
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*	Integrated buffering and sizing.	Alan Mishchenko	2013-08-09	4	-21/+19
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*	Integrated buffering and sizing.	Alan Mishchenko	2013-08-09	4	-67/+89
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*	Integrated buffering and sizing.	Alan Mishchenko	2013-08-09	4	-30/+67
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*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-09	6	-29/+101
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*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-09	7	-85/+242
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*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-09	3	-67/+26
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*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-09	7	-124/+181
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*	Compiler warnings.	Alan Mishchenko	2013-08-08	1	-1/+1
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*	Integrated buffering and sizing.	Alan Mishchenko	2013-08-08	12	-99/+683
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*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-07	2	-172/+159
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*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-06	8	-36/+502
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*	Improvements to buffering and sizing.	Alan Mishchenko	2013-08-06	4	-18/+288
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*	Adding new (un)buffering with phase information.	Alan Mishchenko	2013-08-05	1	-5/+30
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*	Adding new (un)buffering with phase information.	Alan Mishchenko	2013-08-05	3	-9/+107
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*	Adding code to estimate buffer trees.	Alan Mishchenko	2013-08-05	7	-43/+249
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*	Change from input slew to input drive strength in the BLIF file.	Alan Mishchenko	2013-08-04	5	-10/+81
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*	Adding switch 'buffer -p' to enable buffing of the primary inputs.	Alan Mishchenko	2013-08-02	3	-9/+16
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*	Internal parameter tuning.	Alan Mishchenko	2013-07-31	1	-1/+1
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*	Added commands 'maxsize' and 'unbuffer'.	Alan Mishchenko	2013-07-29	1	-3/+8
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*	Added commands 'maxsize' and 'unbuffer'.	Alan Mishchenko	2013-07-29	3	-8/+192
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*	Compiler warning.	Alan Mishchenko	2013-07-29	1	-1/+1
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*	Improved buffering.	Alan Mishchenko	2013-07-29	7	-332/+333
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*	Improved gate-sizing.	Alan Mishchenko	2013-07-29	4	-3/+587
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*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-24	3	-5/+21
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*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-23	2	-4/+5
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*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-23	1	-1/+1
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*	Tuning standard-cell mapping flow.	Alan Mishchenko	2013-07-23	6	-171/+246
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*	Bug fix and warning print.	Alan Mishchenko	2013-07-22	2	-2/+5
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*	Generating GENLIB library from SCL.	Alan Mishchenko	2013-07-22	8	-185/+470
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*	Restructuring gate-sizing code trying to separate timing analysis.	Alan Mishchenko	2013-07-21	12	-297/+578
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*	New technology mapper.	Alan Mishchenko	2013-07-21	1	-0/+3
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*	Improvements to post-mapping re-sizing.	Alan Mishchenko	2013-07-21	7	-131/+159
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