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path: root/src/map/scl
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* Gate sizing with barrier buffers.Alan Mishchenko2014-12-213-1/+52
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* Integrating barrier buffers.Alan Mishchenko2014-12-135-10/+76
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* Support for leakage power in Liberty parser and sizer.Alan Mishchenko2014-09-165-5/+122
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* Suggested fix to allow .constr files to have empty lines.Alan Mishchenko2014-08-131-0/+2
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* Adding color to sizing stats.Alan Mishchenko2014-04-191-4/+4
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* Adding color to sizing stats.Alan Mishchenko2014-04-191-0/+26
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* Handling latches in combinational sizing.Alan Mishchenko2014-02-131-3/+4
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* Fixing assertion failure when all POs have constant functions.Alan Mishchenko2014-02-062-1/+4
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* Fixing Liberty parser to handle 'scalar' delay/slew tables.Alan Mishchenko2014-02-063-0/+33
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* Handling C++-style comments in Liberty parser.Alan Mishchenko2014-01-281-0/+26
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* Commeting out an assertion in sizing.Alan Mishchenko2013-11-271-1/+1
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* Bug fix in timing update.Alan Mishchenko2013-11-261-1/+1
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* Bug fix in liberty parser.Alan Mishchenko2013-11-231-2/+4
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* Several changes to allow Liberty files without delay info.Alan Mishchenko2013-11-213-17/+64
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* Fixing several simple bugs in library handling.Alan Mishchenko2013-11-213-1/+3
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* Improvements to the standard cell flow.Alan Mishchenko2013-11-083-13/+9
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* Organizing the timing report functions.Alan Mishchenko2013-11-072-23/+22
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* Fixing the wire-load approximation problem.Alan Mishchenko2013-11-076-64/+76
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* Improving critical path print-out.Alan Mishchenko2013-10-311-6/+47
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* Changes to Liberty parser.Alan Mishchenko2013-10-301-54/+132
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* Changes to Liberty parser.Alan Mishchenko2013-10-301-2/+169
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* Bug fix in gate-sizing.Alan Mishchenko2013-10-161-1/+5
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* Improvements to buffering and sizing.Alan Mishchenko2013-10-137-32/+67
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* Cleaning up buffering code.Alan Mishchenko2013-10-135-322/+107
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* Normalization of slew/load values.Alan Mishchenko2013-10-138-112/+36
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* Normalization of slew/load values.Alan Mishchenko2013-10-138-17/+95
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* Improvements to buffering and sizing.Alan Mishchenko2013-10-123-50/+59
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* Bug fixes in the library processing,.Alan Mishchenko2013-10-024-16/+45
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* Changing default values.Alan Mishchenko2013-10-022-3/+3
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* Buf fix in Liberty parser.Alan Mishchenko2013-09-191-1/+1
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* Integrating input driving cell constraint into buffering/sizing.Alan Mishchenko2013-09-174-3/+26
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* Debugging and finetuning the flow.Alan Mishchenko2013-09-174-64/+88
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* Debugging and finetuning the flow.Alan Mishchenko2013-09-171-1/+1
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* Debugging and finetuning the flow.Alan Mishchenko2013-09-175-19/+54
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* Adding commands to set and print timing constraints.Alan Mishchenko2013-09-175-38/+203
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* Unifying standard cell library representations.Alan Mishchenko2013-09-175-93/+255
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* Infrastructure to support full Liberty format and unitification of library ↵Alan Mishchenko2013-09-151-4/+4
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* Infrastructure to support full Liberty format and unitification of library ↵Alan Mishchenko2013-09-151-2/+4
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* Infrastructure to support full Liberty format and unitification of library ↵Alan Mishchenko2013-09-156-610/+2202
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* Integrated buffering and sizing.Alan Mishchenko2013-08-117-63/+89
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* Integrated buffering and sizing.Alan Mishchenko2013-08-116-21/+44
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* Integrated buffering and sizing.Alan Mishchenko2013-08-101-1/+1
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* Integrated buffering and sizing.Alan Mishchenko2013-08-108-102/+186
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* Integrated buffering and sizing.Alan Mishchenko2013-08-101-5/+5
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* Bug fix in incremental timing.Alan Mishchenko2013-08-102-12/+18
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* Enable wire load estimation in buffering/sizing.Alan Mishchenko2013-08-106-38/+46
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* Integrated buffering and sizing.Alan Mishchenko2013-08-093-19/+16
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* Integrated buffering and sizing.Alan Mishchenko2013-08-094-21/+19
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* Integrated buffering and sizing.Alan Mishchenko2013-08-094-67/+89
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* Integrated buffering and sizing.Alan Mishchenko2013-08-094-30/+67
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