| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Improvements to Cba data-structure. | Alan Mishchenko | 2015-08-09 | 1 | -6/+2 |
| * | Improvements to Cba data-structure. | Alan Mishchenko | 2015-08-08 | 1 | -37/+75 |
| * | Major rehash of the CBA code. | Alan Mishchenko | 2015-01-31 | 1 | -1/+1 |
| * | Changes to the parser. | Alan Mishchenko | 2014-12-04 | 1 | -0/+1 |
| * | Changes to the parser. | Alan Mishchenko | 2014-12-03 | 1 | -2/+19 |
| * | New parser and framework. | Alan Mishchenko | 2014-11-29 | 1 | -12/+62 |
| * | Adding a wrapper around clock() for more accurate time counting in ABC. | Alan Mishchenko | 2013-05-27 | 1 | -2/+2 |
| * | Allowing for Verilog names of the type slash-<name>-space-[N]. | Alan Mishchenko | 2013-02-22 | 1 | -2/+8 |
| * | Updating project settings to have simpler include paths. | Alan Mishchenko | 2012-07-07 | 1 | -1/+1 |
| * | Misc changes. | Alan Mishchenko | 2012-04-20 | 1 | -1/+3 |
| * | Major restructuring of the code. | Alan Mishchenko | 2012-01-21 | 1 | -2/+2 |
| * | New hierarchy manager. | Alan Mishchenko | 2012-01-17 | 1 | -2/+2 |
| * | Added new name manager and modified hierarchy manager to use it. | Alan Mishchenko | 2012-01-13 | 1 | -0/+492 |
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index : iCE40/abc | |
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