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yosys-experimental
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Author
Age
Files
Lines
*
New technology mapper.
Alan Mishchenko
2013-07-14
2
-7
/
+23
*
New technology mapper.
Alan Mishchenko
2013-07-13
1
-3
/
+12
*
Precomputing DSD functions.
Alan Mishchenko
2013-07-11
1
-0
/
+13
*
Compiler warning.
Alan Mishchenko
2013-07-01
1
-4
/
+6
*
Adding #include <stdlib.h> to 'abc_global.h' to prevent compilation problem o...
Alan Mishchenko
2013-07-01
1
-0
/
+1
*
Updating new mapper.
Alan Mishchenko
2013-06-29
1
-4
/
+15
*
Forgot that LIN64 was used in place of LIN for 64-bit architectures. Fixed.
Niklas Een
2013-06-29
1
-2
/
+2
*
Fixed a problem in BridgeMode; it will now correctly detect if the pipe has b...
Niklas Een
2013-06-28
1
-4
/
+22
*
Updating new mapper.
Alan Mishchenko
2013-06-28
1
-40
/
+47
*
Suggested changes to counting time in Abc_Clock()
Alan Mishchenko
2013-06-18
1
-10
/
+10
*
New MFS package.
Alan Mishchenko
2013-05-30
1
-0
/
+8
*
New DSD detection code.
Alan Mishchenko
2013-05-30
1
-9
/
+18
*
Adding a wrapper around clock() for more accurate time counting in ABC.
Alan Mishchenko
2013-05-27
1
-1
/
+1
*
Adding a wrapper around clock() for more accurate time counting in ABC.
Alan Mishchenko
2013-05-27
11
-56
/
+74
*
New MFS package.
Alan Mishchenko
2013-05-27
1
-0
/
+19
*
New MFS package.
Alan Mishchenko
2013-05-23
1
-1
/
+18
*
Extending cube representation to handle SOPs with many cubes.
Alan Mishchenko
2013-05-12
1
-5
/
+5
*
New MFS package.
Alan Mishchenko
2013-05-12
2
-3
/
+11
*
Changing the queue to work in the same the array of costs is realloced.
Alan Mishchenko
2013-05-05
3
-5
/
+13
*
New fast extract.
Alan Mishchenko
2013-05-05
3
-7
/
+198
*
C++ compiler errors.
Alan Mishchenko
2013-05-04
1
-2
/
+4
*
Adding new API to the queue.
Alan Mishchenko
2013-05-04
1
-0
/
+4
*
Changes to the ABC data-structures to allow for larger designs.
Alan Mishchenko
2013-05-04
1
-2
/
+2
*
Compiler warnings.
Alan Mishchenko
2013-05-03
1
-1
/
+0
*
Reading/writing MiniAIG and several minor changes.
Alan Mishchenko
2013-05-03
1
-0
/
+19
*
Minor changes and improvement in PO partitioning (command &popart).
Alan Mishchenko
2013-05-01
1
-0
/
+14
*
Faster isomorphism detection (command &iso).
Alan Mishchenko
2013-05-01
1
-1
/
+92
*
SAT sweeping under constraints.
Alan Mishchenko
2013-04-28
1
-0
/
+20
*
New fast extract.
Alan Mishchenko
2013-04-27
5
-1
/
+860
*
Shrink for 6-LUTs.
Alan Mishchenko
2013-03-31
1
-2
/
+138
*
Adding command &miter2 to derive a specified sequential miter.
Alan Mishchenko
2013-03-27
2
-0
/
+27
*
PO partitioning algorithm.
Alan Mishchenko
2013-03-09
1
-12
/
+10
*
Integrating box library.
Alan Mishchenko
2013-03-08
1
-0
/
+1
*
Improvements to the hierarchy/timing manager.
Alan Mishchenko
2013-03-05
2
-0
/
+10
*
Improvements to the hierarchy/timing manager.
Alan Mishchenko
2013-03-05
4
-20
/
+78
*
User-controlable SAT sweeper and other small changes.
Alan Mishchenko
2013-02-27
2
-4
/
+2
*
User-controlable SAT sweeper.
Alan Mishchenko
2013-02-26
1
-0
/
+8
*
User-controlable SAT sweeper.
Alan Mishchenko
2013-02-25
1
-1
/
+2
*
User-controlable SAT sweeper.
Alan Mishchenko
2013-02-25
1
-0
/
+5
*
Integrating sweeping information.
Alan Mishchenko
2013-02-23
1
-1
/
+3
*
Integrating sweeping information.
Alan Mishchenko
2013-02-23
2
-3
/
+5
*
Allowing for Verilog names of the type slash-<name>-space-[N].
Alan Mishchenko
2013-02-22
1
-2
/
+8
*
Integrating sweeping information.
Alan Mishchenko
2013-02-20
1
-0
/
+1
*
Integrating sweeping information.
Alan Mishchenko
2013-02-20
1
-7
/
+8
*
Integrating sweeping information.
Alan Mishchenko
2013-02-20
1
-1
/
+1
*
Integrating hierarchy information (reporting incorrect topological order).
Alan Mishchenko
2013-02-20
2
-0
/
+24
*
Adding STG generation (&era -d) and STG encoding (&read_stg <file>).
Alan Mishchenko
2013-02-19
1
-0
/
+1
*
Integrating sweeping information.
Alan Mishchenko
2013-02-19
1
-27
/
+35
*
Integrating sweeping information.
Alan Mishchenko
2013-02-18
2
-6
/
+136
*
Integration of timing manager.
Alan Mishchenko
2013-02-03
1
-1
/
+1
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