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* Enumerating decompositions.Alan Mishchenko2012-10-292-1/+255
* Integrating GIA with LUT mapping.Alan Mishchenko2012-10-241-1/+0
* Making explicit cast to 64-bit unsigned in a few places.Alan Mishchenko2012-10-091-5/+5
* New AIG optimization package.Alan Mishchenko2012-10-061-5/+5
* New AIG optimization package.Alan Mishchenko2012-10-061-31/+18
* New AIG optimization package.Alan Mishchenko2012-10-061-19/+59
* New AIG optimization package.Alan Mishchenko2012-10-062-3/+3
* New AIG optimization package.Alan Mishchenko2012-10-065-0/+683
* Bug fix in XOR balancing (command 'balance -x').Alan Mishchenko2012-10-051-1/+1
* Renamed reference counting APIs in GIA package.Alan Mishchenko2012-10-021-4/+4
* Replacing 'st_table' by 'st__table' to resolve linker problems.Alan Mishchenko2012-09-294-24/+24
* Cleaing AIG manager by removing pointers to HAIG.Alan Mishchenko2012-09-232-58/+0
* Upgrading hierarchy timing manager.Alan Mishchenko2012-09-212-2/+2
* Created new abstraction package from the code that was all over the place.Alan Mishchenko2012-09-151-1/+1
* Enabled recording the name of the file GIA is coming from.Alan Mishchenko2012-09-041-0/+1
* Added an API to convert a multi-output PLA into a shared AIG.Alan Mishchenko2012-08-291-1/+3
* Added simulation of comb circuits with user-specified patterns in command 'sim'.Alan Mishchenko2012-08-241-1/+1
* Replacing Mb/Gb to be MB/GB.Alan Mishchenko2012-07-096-10/+10
* Updating project settings to have simpler include paths.Alan Mishchenko2012-07-0751-88/+88
* Fixing time primtouts throughout the code.Alan Mishchenko2012-07-071-1/+1
* Fixing time primtouts throughout the code.Alan Mishchenko2012-07-0712-21/+31
* Fixing time primtouts throughout the code.Alan Mishchenko2012-07-0751-177/+211
* Bug fix in &gla_refine.Alan Mishchenko2012-07-071-0/+3
* Various changes to enable sensitization-based refinement in &gla.Alan Mishchenko2012-07-044-10/+10
* Performance improvement in &gla_refine.Alan Mishchenko2012-07-031-1/+1
* Other improvements to bmc2 and bmc3.Alan Mishchenko2012-07-011-0/+85
* Bug fix in &gla_refine.Alan Mishchenko2012-06-291-8/+4
* Added min-cut-based refinement of gate-level abstraction (command &gla_refine).Alan Mishchenko2012-06-241-0/+185
* Changing 'if' to allow for delay optimization on sequential paths only.Alan Mishchenko2012-05-202-2/+4
* Important bug fix in XOR balancing (balance -x).Alan Mishchenko2012-03-261-185/+91
* Logic sharing for multi-input gates.Alan Mishchenko2012-03-261-7/+194
* Renamed Aig_ObjPioNum to be Aig_ObjCioId.Alan Mishchenko2012-03-094-9/+9
* Renamed Aig_ObjIsPi/Po to be ...Ci/Co and Aig_Man(Pi/Po)Num to be ...(Ci/Co)...Alan Mishchenko2012-03-0915-51/+51
* Renamed Aig_ManForEachPi/Po to be ...Ci/Co and Aig_ObjCreatePi/Po to be ...Ci...Alan Mishchenko2012-03-098-40/+40
* Silencing some of the gcc warnings.Alan Mishchenko2012-02-1611-16/+13
* Silencing some of the gcc warnings.Alan Mishchenko2012-02-161-2/+3
* Major restructuring of the code.Alan Mishchenko2012-01-21137-6571/+30552
* Bug fix related to not properly resizing SAT solver's model array.Alan Mishchenko2012-01-061-1/+2
* Adding switch '-W' to fx to control the quality of extracted divisors.Alan Mishchenko2011-12-151-1/+1
* Adding switch '-W' to fx to control the quality of extracted divisors.Alan Mishchenko2011-12-153-11/+25
* Making computation in 'fx' run-to-run reproducible.Alan Mishchenko2011-11-121-1/+1
* Removed useless typecasts related to changes in Vec_VecEntry().Alan Mishchenko2011-08-017-13/+13
* Determine LUT size form the LUT library if present.Alan Mishchenko2011-07-271-1/+5
* Fixed a number of small bugs and memory leaks.Alan Mishchenko2011-03-275-15/+14
* Improvements in Vec_Vec_t.Alan Mishchenko2011-03-271-2/+2
* Exploration of Sasao's decomposition and minor improvements.Alan Mishchenko2011-03-111-2/+2
* Made abc.h independent of CUDD and Extra.Alan Mishchenko2011-03-0326-4/+26
* Cumulative changes in the last few weeks.Alan Mishchenko2011-01-138-49/+55
* NPN class computation.Alan Mishchenko2010-11-281-0/+1
* initial commit of public abcAlan Mishchenko2010-11-01107-974/+1808
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