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path: root/src/proof/ssw/sswRarity.c
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* Bug fix in CEC generation after rarity simulation and few small changes.Alan Mishchenko2014-06-161-1/+1
* Multi-output property solver.Alan Mishchenko2013-10-261-0/+2
* Multi-output property solver.Alan Mishchenko2013-10-261-2/+2
* Multi-output property solver.Alan Mishchenko2013-10-231-0/+12
* Adding procedures to specify permutations with unused flops.Alan Mishchenko2013-08-281-3/+12
* Added switch &sim -g to enable flop grouping.Alan Mishchenko2013-08-201-1/+37
* Adding a wrapper around clock() for more accurate time counting in ABC.Alan Mishchenko2013-05-271-24/+24
* Compiler warning.Alan Mishchenko2013-04-171-2/+0
* Adding callback to bmc3, sim3, pdr in the multi-output mode.Alan Mishchenko2013-04-171-79/+87
* Adding parameter structure for rarity simulation.Alan Mishchenko2013-04-171-70/+99
* Updating 'sim3' to move the design into the last rare state.Alan Mishchenko2013-04-011-4/+12
* Improving verbose printout of 'sim3' when solving multiple outputs.Alan Mishchenko2013-03-301-6/+14
* Added 'gap timeout' to bmc3 and sim3.Alan Mishchenko2013-02-161-0/+1
* Added 'gap timeout' to bmc3 and sim3.Alan Mishchenko2013-02-151-3/+12
* Fixed a corner-case when 'sim3 -a' does not work for costant POs.Alan Mishchenko2013-01-251-5/+27
* Enabled detecting CEXes in multiple POs without stopping (sim3 -a).Alan Mishchenko2013-01-231-28/+24
* Enabled detecting CEXes in multiple POs without stopping (sim3 -a).Alan Mishchenko2013-01-231-26/+41
* Enabled detecting CEXes in multiple POs without stopping (sim3 -a).Alan Mishchenko2013-01-231-17/+49
* Isolating BMC code into a separate package.Alan Mishchenko2012-11-141-0/+1
* Replaced printfs with Abc_PrintNiklas Een2012-10-291-92/+91
* Making explicit cast to 64-bit unsigned in a few places.Alan Mishchenko2012-10-091-6/+6
* Unified print-out of property failures produced by all engines.Alan Mishchenko2012-09-091-2/+2
* Added new command &gla_shrink.Alan Mishchenko2012-09-041-1/+1
* Upgraded &equiv3 to periodically restart simulation from the init state.Alan Mishchenko2012-07-121-7/+24
* Adding restart to rarity simulation in sim3 and &sim3.Alan Mishchenko2012-07-081-16/+37
* Updating project settings to have simpler include paths.Alan Mishchenko2012-07-071-2/+2
* Fixing time primtouts throughout the code.Alan Mishchenko2012-07-071-7/+10
* Making 'pdr', &gla, &vta print correctly in batch mode.Alan Mishchenko2012-07-071-2/+3
* Renamed Aig_ObjIsPi/Po to be ...Ci/Co and Aig_Man(Pi/Po)Num to be ...(Ci/Co)...Alan Mishchenko2012-03-091-1/+1
* Renamed Aig_ManForEachPi/Po to be ...Ci/Co and Aig_ObjCreatePi/Po to be ...Ci...Alan Mishchenko2012-03-091-3/+3
* Silencing some of the gcc warnings.Alan Mishchenko2012-02-161-2/+2
* Major restructuring of the code.Alan Mishchenko2012-01-211-0/+1158