iCE40/abc - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Added new name manager and modified hierarchy manager to use it.	Alan Mishchenko	2012-01-13	6	-82/+761
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*	New hierarchy manager.	Alan Mishchenko	2012-01-13	2	-0/+445
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*	Added model ID inside the design.	Alan Mishchenko	2012-01-12	2	-0/+3
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*	Bug fix related to not properly resizing SAT solver's model array.	Alan Mishchenko	2012-01-12	2	-0/+2
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*	Changes to the lazy man's synthesis code.	Alan Mishchenko	2012-01-11	6	-202/+566
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*	Gate level abstraction.	Alan Mishchenko	2012-01-11	1	-109/+627
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*	Gate level abstraction.	Alan Mishchenko	2012-01-08	2	-59/+305
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*	Backward reachability using circuit cofactoring.	Alan Mishchenko	2012-01-08	1	-5/+31
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*	Backward reachability using circuit cofactoring.	Alan Mishchenko	2012-01-07	1	-9/+13
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*	Backward reachability using circuit cofactoring.	Alan Mishchenko	2012-01-07	1	-13/+12
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*	Crash fix in 'tempor' in case the leading length is 0.	Alan Mishchenko	2012-01-07	1	-0/+6
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*	Gate level abstraction.	Alan Mishchenko	2012-01-07	1	-238/+78
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*	Bug fix: changing output number to 0 in the CEX after ORing POs.	Alan Mishchenko	2012-01-07	1	-0/+3
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*	Bug fix related to not properly resizing SAT solver's model array.	Alan Mishchenko	2012-01-06	11	-151/+45
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*	Added warning when the network from file has no primary inputs.	Alan Mishchenko	2012-01-06	1	-0/+5
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*	APIs to represent simple gates in CNF.	Alan Mishchenko	2012-01-05	1	-0/+112
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*	Backward reachability using circuit cofactoring.	Alan Mishchenko	2012-01-05	3	-217/+250
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*	APIs to represent simple gates in CNF.	Alan Mishchenko	2012-01-05	1	-0/+100
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*	Configuration changes in the Boolean matching code.	Alan Mishchenko	2012-01-05	1	-1/+1
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*	Backward reachability using circuit cofactoring.	Alan Mishchenko	2012-01-01	1	-0/+442
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*	Backward reachability using circuit cofactoring.	Alan Mishchenko	2012-01-01	4	-13/+479
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*	Delay optimization using precomputed library.	Alan Mishchenko	2011-12-30	1	-4/+11
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*	Delay optimization using precomputed library.	Alan Mishchenko	2011-12-30	1	-1/+3
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*	Delay optimization using precomputed library.	Alan Mishchenko	2011-12-30	1	-29/+29
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*	Delay optimization using precomputed library.	Alan Mishchenko	2011-12-30	1	-5/+80
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*	Delay optimization using precomputed library.	Alan Mishchenko	2011-12-29	6	-186/+1072
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*	New variable-time frame abstraction.	Alan Mishchenko	2011-12-29	3	-8/+523
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*	Experiments with flattening hierarchy.	Alan Mishchenko	2011-12-28	1	-27/+274
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*	Transforming the solver to use different clause representation.	Alan Mishchenko	2011-12-23	3	-38/+83
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*	Transforming the solver to use different clause representation.	Alan Mishchenko	2011-12-23	3	-91/+45
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*	Transforming the solver to use different clause representation.	Alan Mishchenko	2011-12-23	2	-4/+4
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*	Transforming the solver to use different clause representation.	Alan Mishchenko	2011-12-23	11	-543/+2489
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*	Transforming the solver to use different clause representation.	Alan Mishchenko	2011-12-22	2	-144/+144
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*	Added switch -n to 'miter' to ignore PI/PO names.	Alan Mishchenko	2011-12-22	1	-3/+15
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*	Computing interpolants as truth tables.	Alan Mishchenko	2011-12-22	10	-6/+837
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*	Improvements to hierarchical BLIF parser.	Alan Mishchenko	2011-12-22	1	-4/+6
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*	Improvements to hierarchical BLIF parser.	Alan Mishchenko	2011-12-21	1	-7/+34
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*	Fixed a bug in matching code.	Alan Mishchenko	2011-12-17	2	-2/+5
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*	Added utility to sort lines in a file alphabetically.	Alan Mishchenko	2011-12-17	1	-0/+97
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*	Performance improvement in 'dch' for designs having nodes with many fanouts.	Alan Mishchenko	2011-12-15	1	-28/+56
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*	Added optional printout of the hierarchy structure before collapsing.	Alan Mishchenko	2011-12-15	1	-0/+1
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*	Undoing temporary change to the solver.	Alan Mishchenko	2011-12-15	1	-1/+1
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*	Temporary change to the solver.	Alan Mishchenko	2011-12-15	1	-1/+1
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*	Adding switch '-W' to fx to control the quality of extracted divisors.	Alan Mishchenko	2011-12-15	1	-1/+1
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*	Adding switch '-W' to fx to control the quality of extracted divisors.	Alan Mishchenko	2011-12-15	4	-15/+41
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*	Trying to make sorting of nodes platform-indendent.	Alan Mishchenko	2011-12-15	1	-1/+1
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*	Enabling balance again.	Alan Mishchenko	2011-12-15	1	-0/+5
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*	Temporarily disabling balance.	Alan Mishchenko	2011-12-15	1	-1/+1
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*	Additional print-outs in dc2.	Alan Mishchenko	2011-12-15	1	-10/+10
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*	Trying to make sorting of nodes platform-indendent.	Alan Mishchenko	2011-12-15	6	-0/+30
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