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iCE40/abc
yosys-experimental
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Author
Age
Files
Lines
...
*
Fixing a typo in setting the miter type.
Alan Mishchenko
2020-09-06
1
-1
/
+1
*
Verifying new resub code.
Alan Mishchenko
2020-09-06
2
-19
/
+156
*
Experiments with ICCAD CAD benchmarks (Problem A).
Alan Mishchenko
2020-09-03
2
-7
/
+627
*
Experiments with window computation.
Alan Mishchenko
2020-08-15
2
-16
/
+365
*
Making &cec use precomputed simulation info.
Alan Mishchenko
2020-08-12
4
-12
/
+42
*
Extending &sim_read to use non-64-divisible pattern counts.
Alan Mishchenko
2020-08-12
1
-3
/
+13
*
New ways of reading MiniAIG.
Alan Mishchenko
2020-07-29
1
-1
/
+1
*
New ways of reading MiniAIG.
Alan Mishchenko
2020-07-29
2
-3
/
+278
*
Fixing new resub code.
Alan Mishchenko
2020-07-20
1
-2
/
+1
*
Fixing new resub code.
Alan Mishchenko
2020-07-20
2
-122
/
+215
*
Experiment with structural similarity.
Alan Mishchenko
2020-07-16
6
-0
/
+220
*
Correctly handling transfer of additional AIG info when AIG has no internal n...
Alan Mishchenko
2020-07-13
2
-4
/
+20
*
Fixing commands 'putontop' and 'topmost'; adding command 'bottommost'.
Alan Mishchenko
2020-07-11
2
-16
/
+171
*
Adding new resub code.
Alan Mishchenko
2020-07-08
2
-0
/
+580
*
Bug fix in &cec (properly updating the status after the corner case bug fix\).
Alan Mishchenko
2020-06-24
1
-0
/
+1
*
Bug fix in &cec (handling the case when the miter is disproved by the all-0 p...
Alan Mishchenko
2020-06-24
1
-5
/
+23
*
Compiler error.
Alan Mishchenko
2020-06-04
1
-4
/
+4
*
Experimental simulation.
Alan Mishchenko
2020-06-04
2
-10
/
+73
*
Experimental simulation.
Alan Mishchenko
2020-06-03
2
-1
/
+100
*
Dumping BDD variable order after 'clp'.
Alan Mishchenko
2020-05-18
6
-10
/
+27
*
Experimental resubstitution.
Alan Mishchenko
2020-05-15
7
-263
/
+512
*
Experimental resubstitution.
Alan Mishchenko
2020-05-13
1
-67
/
+221
*
Experimental resubstitution.
Alan Mishchenko
2020-05-11
1
-4
/
+10
*
Adding new utility procedures.
Alan Mishchenko
2020-05-11
6
-45
/
+159
*
Adding new utility procedures.
Alan Mishchenko
2020-05-10
3
-9
/
+172
*
Experimental resubstitution.
Alan Mishchenko
2020-05-08
2
-37
/
+125
*
Experimental resubstitution.
Alan Mishchenko
2020-05-07
1
-35
/
+87
*
Experimental resubstitution.
Alan Mishchenko
2020-05-07
2
-233
/
+450
*
Fixing the accidentally broken build.
Alan Mishchenko
2020-05-06
1
-1
/
+0
*
Experiment with permutations.
Alan Mishchenko
2020-05-03
1
-1
/
+1
*
Experiment with permutations.
Alan Mishchenko
2020-05-03
2
-1
/
+97
*
Compiler warnings and errors.
Alan Mishchenko
2020-05-03
4
-8
/
+8
*
Compiler warnings.
Alan Mishchenko
2020-05-03
2
-2
/
+0
*
Adding dumping of genlib library in Verilog.
Alan Mishchenko
2020-05-03
2
-30
/
+30
*
Adding dumping of genlib library in Verilog.
Alan Mishchenko
2020-05-03
1
-1
/
+1
*
Adding dumping of genlib library in Verilog.
Alan Mishchenko
2020-05-03
4
-7
/
+110
*
Experimental resubstitution.
Alan Mishchenko
2020-05-03
9
-5
/
+1049
*
Merge pull request #57 from whitequark/patch-1
alanminko
2020-04-30
1
-2
/
+2
|
\
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*
Make use of setrlimit conditional on ABC_NO_RLIMIT.
whitequark
2020-04-30
1
-2
/
+2
|
*
Gia_ManDupPermFlop to behave as Gia_ManDupPerm
Eddie Hung
2020-04-27
1
-5
/
+7
*
|
Merge pull request #65 from FPGeh/fix_seq_synth
alanminko
2020-04-30
1
-5
/
+7
|
\
\
|
*
|
Gia_ManDupPermFlop to behave as Gia_ManDupPerm
Eddie Hung
2020-01-23
1
-5
/
+7
*
|
|
Adding new API to MiniAIG.
Alan Mishchenko
2020-04-29
1
-2
/
+2
*
|
|
Adding new API to MiniAIG.
Alan Mishchenko
2020-04-29
2
-0
/
+210
*
|
|
Bug fix in 'resub' to enable additional divisors, by Siang-Yun Lee.
Alan Mishchenko
2020-04-27
1
-124
/
+368
|
|
/
|
/
|
*
|
New AIG restructuring feature.
Alan Mishchenko
2020-04-23
2
-0
/
+230
*
|
Fix a bug in comb loop detection.
Alan Mishchenko
2020-04-22
4
-17
/
+22
*
|
Improving simulation patterns by local search.
Alan Mishchenko
2020-04-17
1
-0
/
+1
*
|
Improving simulation patterns by local search.
Alan Mishchenko
2020-04-17
3
-38
/
+528
*
|
Fixing broken build and compiler warnings.
Alan Mishchenko
2020-04-17
5
-7
/
+7
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