iCE40/abc - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Added GIA normalization using timing manager.	Alan Mishchenko	2012-09-22	3	-8/+96
\|
*	Upgrading hierarchy timing manager.	Alan Mishchenko	2012-09-21	16	-997/+1431
\|
*	Added switch '-E <filename>' to 'read_library' to exclude gates listed while ↵	Alan Mishchenko	2012-09-21	1	-35/+44
\| \| \| \|	reading a Genlib file.
*	Added simplification before the concurrent call to PDR.	Alan Mishchenko	2012-09-20	4	-14/+22
\|
*	Added simplification before the concurrent call to PDR.	Alan Mishchenko	2012-09-20	2	-3/+17
\|
*	Added slack computation to 'stime'.	Alan Mishchenko	2012-09-20	3	-19/+55
\|
*	Modified 'read' to read all types of libraries (genlib, liberty, scl).	Alan Mishchenko	2012-09-20	1	-0/+2
\|
*	Modified 'read' to read all types of libraries (genlib, liberty, scl).	Alan Mishchenko	2012-09-20	7	-8/+27
\|
*	Added command 'minsize' to reduce all gates to their minimum size in the ↵	Alan Mishchenko	2012-09-20	3	-19/+121
\| \| \| \|	library.
*	Fixes to Verilog parser.	Alan Mishchenko	2012-09-20	3	-3/+9
\|
*	Extending Liberty parser to handle multi-output cells.	Alan Mishchenko	2012-09-19	4	-8/+8
\|
*	Extending Liberty parser to handle multi-output cells.	Alan Mishchenko	2012-09-19	12	-21/+106
\|
*	Extending Liberty parser to handle multi-output cells.	Alan Mishchenko	2012-09-19	10	-48/+104
\|
*	Extending BLIF parser/write to hangle multi-output cells.	Alan Mishchenko	2012-09-19	15	-136/+289
\|
*	Extending Genlib to hangle multi-output cells.	Alan Mishchenko	2012-09-19	3	-57/+105
\|
*	Changes to command 'upsize'.	Alan Mishchenko	2012-09-18	3	-66/+138
\|
*	Changes to command 'upsize'.	Alan Mishchenko	2012-09-18	8	-47/+352
\|
*	Fixing mismatch between declaration of the output value of Extra_CpuTime.	Alan Mishchenko	2012-09-18	3	-5/+9
\|
*	Bug fix in bmc3.	Alan Mishchenko	2012-09-17	1	-1/+6
\|
*	Bug fix: no need to normalize const0 node.	Alan Mishchenko	2012-09-17	1	-2/+2
\|
*	Fixed timeout problem in bmc3 -s.	Alan Mishchenko	2012-09-17	1	-12/+7
\|
*	Moving binary IO streams to the vector package.	Alan Mishchenko	2012-09-17	3	-116/+116
\|
*	Added delay multipliers to 'map'.	Alan Mishchenko	2012-09-16	2	-8/+14
\|
*	Added delay multipliers to 'map'.	Alan Mishchenko	2012-09-16	4	-22/+63
\|
*	Improving printouts in 'stime'.	Alan Mishchenko	2012-09-16	5	-10/+17
\|
*	Improving printouts in &gla.	Alan Mishchenko	2012-09-16	1	-17/+8
\|
*	Improving printouts in &gla.	Alan Mishchenko	2012-09-16	3	-11/+15
\|
*	Changed a few things in the refinement package of &gla.	Alan Mishchenko	2012-09-16	4	-24/+118
\|
*	Restructured the code to post-process object used during refinement in &gla.	Alan Mishchenko	2012-09-16	11	-322/+351
\|
*	Made abstraction and PDR communicate in-memory rather than through a file.	Alan Mishchenko	2012-09-16	3	-65/+59
\|
*	Cleaned 'abc.c' by removing useless procedures.	Alan Mishchenko	2012-09-15	1	-1689/+939
\|
*	Created new abstraction package from the code that was all over the place.	Alan Mishchenko	2012-09-15	34	-3490/+2193
\|
*	Corrected &gla -a to work as expected.	Alan Mishchenko	2012-09-15	1	-33/+52
\|
*	Prepared &gla to try abstracting and proving concurrently.	Alan Mishchenko	2012-09-14	3	-3/+7
\|
*	Prepared &gla to try abstracting and proving concurrently.	Alan Mishchenko	2012-09-14	1	-1/+1
\|
*	Prepared &gla to try abstracting and proving concurrently.	Alan Mishchenko	2012-09-14	11	-139/+145
\|
*	Prepared &gla to try abstracting and proving concurrently.	Alan Mishchenko	2012-09-14	1	-1/+1
\|
*	Prepared &gla to try abstracting and proving concurrently.	Alan Mishchenko	2012-09-14	5	-46/+166
\|
*	Prepared &gla to try abstracting and proving concurrently.	Alan Mishchenko	2012-09-14	6	-57/+205
\|
*	Added new command 'upsize'.	Alan Mishchenko	2012-09-12	7	-44/+241
\|
*	Reversed to a buggy version of reduceDB in complete proof-logging, because ↵	Alan Mishchenko	2012-09-12	1	-2/+2
\| \| \| \|	it works with rollback and it is not used in &gla -pn -L 0.
*	Added code to collect experimental results.	Alan Mishchenko	2012-09-11	2	-2/+2
\|
*	Added code to collect experimental results.	Alan Mishchenko	2012-09-11	2	-2/+2
\|
*	Added code to collect experimental results.	Alan Mishchenko	2012-09-11	2	-2/+2
\|
*	Added code to collect experimental results.	Alan Mishchenko	2012-09-11	2	-4/+4
\|
*	Improved topo print-out.	Alan Mishchenko	2012-09-11	1	-0/+2
\|
*	Scalable gate-level abstraction.	Alan Mishchenko	2012-09-11	1	-9/+30
\|
*	Added -C to command line for running commands, then staying in interactive mode	Niklas Een	2012-09-11	1	-28/+39
\|
*	Fixing Verilog writer's way of writing module names.	Alan Mishchenko	2012-09-11	1	-1/+1
\|
*	Added code to collect experimental results.	Alan Mishchenko	2012-09-11	2	-2/+2
\|