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iCE40/abc
yosys-experimental
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Author
Age
Files
Lines
*
Adding AIG rehashing after LUT mapping in Gia.
Alan Mishchenko
2016-04-07
1
-3
/
+0
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Adding AIG rehashing after LUT mapping in Gia.
Alan Mishchenko
2016-04-07
5
-9
/
+82
|
*
Supporting edges in delay-optimization in &satlut.
Alan Mishchenko
2016-04-07
2
-19
/
+46
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*
Supporting edges in delay-optimization in &satlut.
Alan Mishchenko
2016-04-07
5
-20
/
+236
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*
Supporting edges in delay-optimization in &satlut.
Alan Mishchenko
2016-04-07
7
-151
/
+568
|
*
Supporting edge information during mapping.
Alan Mishchenko
2016-04-06
6
-2
/
+300
|
*
Supporting negative and reverse ranges of word-level variables in Wlc.
Alan Mishchenko
2016-04-04
6
-106
/
+168
|
*
Improvements to delay-optimization in &satlut.
Alan Mishchenko
2016-04-04
4
-112
/
+214
|
*
Improvements to delay-optimization in &satlut.
Alan Mishchenko
2016-04-04
3
-158
/
+269
|
*
Improvements to delay-optimization in &satlut.
Alan Mishchenko
2016-04-04
4
-23
/
+112
|
*
Improvements to delay-optimization in &satlut.
Alan Mishchenko
2016-04-03
3
-87
/
+330
|
*
Enabling native Gia visualization in &show.
Alan Mishchenko
2016-04-03
4
-7
/
+386
|
*
Allowing Cba manager to be derived from another Cba manager.
Alan Mishchenko
2016-04-02
2
-3
/
+3
|
*
Windowing for technology mapping.
Alan Mishchenko
2016-03-30
9
-190
/
+460
|
*
Windowing for technology mapping.
Alan Mishchenko
2016-03-29
5
-13
/
+432
|
*
Bug fix in truth table reading for funcs with less than 6 vars.
Alan Mishchenko
2016-03-28
3
-3
/
+3
|
*
Corner-case bug fix in 'satclp' with conflict limit.
Alan Mishchenko
2016-03-25
1
-5
/
+10
|
*
Sorting multiplier inputs based on the number of constant bits.
Alan Mishchenko
2016-03-24
1
-0
/
+21
|
*
Procedure to check inductive invariant for Gia package.
Alan Mishchenko
2016-03-21
1
-0
/
+61
|
*
Typo in operator in Wlc_Ntk_t.
Alan Mishchenko
2016-03-18
1
-1
/
+1
|
*
Supporting bit-wise XNOR operator in Wlc_Ntk_t.
Alan Mishchenko
2016-03-18
5
-3
/
+9
|
*
Supporting complemented reduction operators.
Alan Mishchenko
2016-03-11
1
-6
/
+7
|
*
Adding API to convert Genlib into a simple Liberty.
Alan Mishchenko
2016-03-11
4
-1
/
+145
|
*
Supporting complemented reduction operators.
Alan Mishchenko
2016-03-10
5
-11
/
+40
|
*
Change error to warning in 'scorr'.
Alan Mishchenko
2016-03-09
1
-2
/
+2
|
*
Bug fix in &fftest: not outputting test patterns when user test patterns are ↵
Alan Mishchenko
2016-03-09
1
-8
/
+15
|
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given.
*
Supporting ~^ as equality operator in Wlc.
Alan Mishchenko
2016-03-04
1
-2
/
+3
|
*
New hierarchical TT NPN matching.
Alan Mishchenko
2016-02-26
4
-3
/
+170
|
*
Disabling formula cleaner to avoid problems with reading GENLIB on some ↵
Alan Mishchenko
2016-02-21
1
-1
/
+2
|
|
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libraries.
*
Re-doing the same change.
Alan Mishchenko
2016-02-15
1
-2
/
+2
|
*
Temporarily undoing one of the recent changes.
Alan Mishchenko
2016-02-15
1
-2
/
+2
|
*
Improving bit-blasting of a multiplier and squarer.
Alan Mishchenko
2016-02-13
2
-16
/
+46
|
*
Adding support for a different bit-blasting of a multiplier and squarer.
Alan Mishchenko
2016-02-13
4
-1
/
+651
|
*
Adding support for a different bit-blasting of a multiplier and squarer.
Alan Mishchenko
2016-02-12
5
-2
/
+97
|
*
Experiments with SAT-based mapping.
Alan Mishchenko
2016-02-08
3
-95
/
+176
|
*
Experiments with SAT-based mapping.
Alan Mishchenko
2016-02-07
4
-0
/
+654
|
*
Bug fix in liberty parser and change suggested by Clifford.
Alan Mishchenko
2016-02-07
2
-1
/
+17
|
*
Added recursive bit-blasting of a carry-lookahead adder.
Alan Mishchenko
2016-02-06
1
-0
/
+51
|
*
GENLIB parsing bug, which led to a crash.
Alan Mishchenko
2016-02-06
1
-1
/
+4
|
*
Fixing the problem of identically named signals in 'retime'.
Alan Mishchenko
2016-02-05
2
-4
/
+4
|
*
Making flop names after 'retime' more meaningful.
Alan Mishchenko
2016-02-03
2
-4
/
+6
|
*
Preserving internal signal names when 'strash' is not used.
Alan Mishchenko
2016-02-03
2
-0
/
+7
|
*
Supporting X-valued constants in Wlc_Ntk_t.
Alan Mishchenko
2016-02-02
1
-1
/
+1
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*
Supporting X-valued constants in Wlc_Ntk_t.
Alan Mishchenko
2016-02-02
1
-6
/
+13
|
*
Supporting X-valued constants in Wlc_Ntk_t.
Alan Mishchenko
2016-02-02
4
-11
/
+26
|
*
An add-on to write Verilog for circuits mapped into simple gates.
Alan Mishchenko
2016-02-01
1
-9
/
+22
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*
Rare bug fix in 'dch' resulting in choice nodes having internal fanout.
Alan Mishchenko
2016-01-31
1
-1
/
+8
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*
Fixing mismatch in the TLS flow induced by adding cell configs in the DSD ↵
Alan Mishchenko
2016-01-30
1
-1
/
+1
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manager.
*
Small changes to sort for timing.
Alan Mishchenko
2016-01-24
1
-3
/
+7
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*
Bug fix in 'aig', for the case of non-min-base SOPs.
Alan Mishchenko
2016-01-20
1
-0
/
+1
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