iCE40/abc - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Adding commands backup/restore.	Alan Mishchenko	2014-10-21	3	-0/+84
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*	Adding switch &qbf -q to quantify functional variables.	Alan Mishchenko	2014-10-20	1	-2/+1
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*	Adding switch &qbf -q to quantify functional variables.	Alan Mishchenko	2014-10-20	2	-3/+61
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*	Improved QBF solver.	Alan Mishchenko	2014-10-18	1	-19/+94
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*	Improved QBF solver.	Alan Mishchenko	2014-10-18	1	-10/+25
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*	Improved QBF solver.	Alan Mishchenko	2014-10-18	4	-2/+436
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*	Bug fix in truth table computation.	Alan Mishchenko	2014-10-15	2	-11/+15
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*	Compiler problem with includes.	Alan Mishchenko	2014-10-13	1	-1/+1
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*	MUX decomposition during mapping.	Alan Mishchenko	2014-10-13	1	-5/+19
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*	MUX decomposition during mapping.	Alan Mishchenko	2014-10-12	2	-9/+17
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*	MUX decomposition during mapping.	Alan Mishchenko	2014-10-12	1	-7/+10
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*	Recommended changes for portability.	Alan Mishchenko	2014-10-12	6	-9/+44
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*	Merged in grigora/abc/grigora/fixed-hang-issue-in-bm-command-1413034154897 ↵	Alan Mishchenko	2014-10-11	1	-7/+6
\|\ \| \| \| \| \| \| \| \| \| \|	(pull request #8) Fix for hang issue in "bm" command.
\| *	Fixed "bm" command hang issue.	grigora	2014-10-11	1	-7/+6
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* \|	MUX decomposition during mapping.	Alan Mishchenko	2014-10-11	2	-26/+121
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* \|	Deriving network in terms of programmable cells.	Alan Mishchenko	2014-10-11	2	-6/+14
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*	Improvements to the parser.	Alan Mishchenko	2014-10-10	1	-7/+86
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*	Naive (SAT-only) CEC option.	Alan Mishchenko	2014-10-10	3	-2/+116
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*	Bug fix in the bit-blaster.	Alan Mishchenko	2014-10-10	2	-5/+5
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*	Improvements to ISOP.	Alan Mishchenko	2014-10-10	2	-5/+7
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*	Improvements to ISOP.	Alan Mishchenko	2014-10-10	4	-283/+795
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*	Correction to the patch to compile with Visual Studio.	Alan Mishchenko	2014-10-10	1	-1/+1
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*	Suggested patch for type-punned warnings	Alan Mishchenko	2014-10-10	5	-12/+35
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*	Small changes.	Alan Mishchenko	2014-10-08	2	-8/+10
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*	Compiler warnings.	Alan Mishchenko	2014-10-08	2	-2/+2
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*	Compiler warnings.	Alan Mishchenko	2014-10-08	1	-1/+1
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*	Compiler warnings.	Alan Mishchenko	2014-10-08	3	-2/+4
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*	Detection of threshold functions.	Alan Mishchenko	2014-10-08	9	-65/+544
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*	New ISOP computation.	Alan Mishchenko	2014-10-07	1	-36/+196
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*	Bug fix in move_names.	Alan Mishchenko	2014-10-05	1	-0/+1
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*	Updates to &flow and &flow2.	Alan Mishchenko	2014-10-05	1	-9/+9
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*	Deriving cell mapping with &if -kz.	Alan Mishchenko	2014-10-04	2	-3/+15
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*	Deriving cell mapping with &if -kz.	Alan Mishchenko	2014-10-04	9	-38/+217
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*	New ISOP computation.	Alan Mishchenko	2014-10-04	2	-0/+522
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*	Deriving AIG after cell mapping.	Alan Mishchenko	2014-10-03	5	-2/+69
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*	Bug fix in Verilog writer.	Alan Mishchenko	2014-10-02	1	-8/+8
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*	Adding switch -R to 'if'.	Alan Mishchenko	2014-10-02	1	-27/+39
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*	Improvements to bit-blaster.	Alan Mishchenko	2014-10-01	2	-23/+88
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*	Improvements to bit-blaster.	Alan Mishchenko	2014-09-30	1	-1/+1
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*	Improvements to bit-blaster.	Alan Mishchenko	2014-09-30	4	-75/+122
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*	Adding options to &flow.	Alan Mishchenko	2014-09-29	2	-12/+19
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*	Adding options to &flow2.	Alan Mishchenko	2014-09-29	1	-4/+4
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*	Adding options to &flow2.	Alan Mishchenko	2014-09-29	2	-9/+14
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*	Adding options to &flow.	Alan Mishchenko	2014-09-29	2	-21/+26
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*	Command to rename files in the same directory.	Alan Mishchenko	2014-09-28	1	-0/+191
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*	Adding out-of-bounds checks to AIGER readers.	Alan Mishchenko	2014-09-28	2	-2/+2
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*	Adding features to CNF generation.	Alan Mishchenko	2014-09-28	2	-8/+18
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*	Renaming DSD commands (dsd_tune -> dsd_match; dsd_clean -> dsd_filter).	Alan Mishchenko	2014-09-28	3	-11/+51
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*	Support for sequential designs in word-level Verilog.	Alan Mishchenko	2014-09-26	5	-79/+196
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*	Enabling print-out, for each operator, of the percetage of AND nodes after ↵	Alan Mishchenko	2014-09-25	4	-14/+35
\| \| \| \|	bit-blasting.